1 /* 2 * Driver for NeoMagic 256AV and 256ZX chipsets. 3 * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de> 4 * 5 * Based on nm256_audio.c OSS driver in linux kernel. 6 * The original author of OSS nm256 driver wishes to remain anonymous, 7 * so I just put my acknoledgment to him/her here. 8 * The original author's web page is found at 9 * http://www.uglx.org/sony.html 10 * 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/io.h> 28 #include <linux/delay.h> 29 #include <linux/interrupt.h> 30 #include <linux/init.h> 31 #include <linux/pci.h> 32 #include <linux/slab.h> 33 #include <linux/module.h> 34 #include <linux/mutex.h> 35 36 #include <sound/core.h> 37 #include <sound/info.h> 38 #include <sound/control.h> 39 #include <sound/pcm.h> 40 #include <sound/ac97_codec.h> 41 #include <sound/initval.h> 42 43 #define CARD_NAME "NeoMagic 256AV/ZX" 44 #define DRIVER_NAME "NM256" 45 46 MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>"); 47 MODULE_DESCRIPTION("NeoMagic NM256AV/ZX"); 48 MODULE_LICENSE("GPL"); 49 MODULE_SUPPORTED_DEVICE("{{NeoMagic,NM256AV}," 50 "{NeoMagic,NM256ZX}}"); 51 52 /* 53 * some compile conditions. 54 */ 55 56 static int index = SNDRV_DEFAULT_IDX1; /* Index */ 57 static char *id = SNDRV_DEFAULT_STR1; /* ID for this card */ 58 static int playback_bufsize = 16; 59 static int capture_bufsize = 16; 60 static bool force_ac97; /* disabled as default */ 61 static int buffer_top; /* not specified */ 62 static bool use_cache; /* disabled */ 63 static bool vaio_hack; /* disabled */ 64 static bool reset_workaround; 65 static bool reset_workaround_2; 66 67 module_param(index, int, 0444); 68 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard."); 69 module_param(id, charp, 0444); 70 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard."); 71 module_param(playback_bufsize, int, 0444); 72 MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard."); 73 module_param(capture_bufsize, int, 0444); 74 MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard."); 75 module_param(force_ac97, bool, 0444); 76 MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard."); 77 module_param(buffer_top, int, 0444); 78 MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard."); 79 module_param(use_cache, bool, 0444); 80 MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access."); 81 module_param(vaio_hack, bool, 0444); 82 MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks."); 83 module_param(reset_workaround, bool, 0444); 84 MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops."); 85 module_param(reset_workaround_2, bool, 0444); 86 MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops."); 87 88 /* just for backward compatibility */ 89 static bool enable; 90 module_param(enable, bool, 0444); 91 92 93 94 /* 95 * hw definitions 96 */ 97 98 /* The BIOS signature. */ 99 #define NM_SIGNATURE 0x4e4d0000 100 /* Signature mask. */ 101 #define NM_SIG_MASK 0xffff0000 102 103 /* Size of the second memory area. */ 104 #define NM_PORT2_SIZE 4096 105 106 /* The base offset of the mixer in the second memory area. */ 107 #define NM_MIXER_OFFSET 0x600 108 109 /* The maximum size of a coefficient entry. */ 110 #define NM_MAX_PLAYBACK_COEF_SIZE 0x5000 111 #define NM_MAX_RECORD_COEF_SIZE 0x1260 112 113 /* The interrupt register. */ 114 #define NM_INT_REG 0xa04 115 /* And its bits. */ 116 #define NM_PLAYBACK_INT 0x40 117 #define NM_RECORD_INT 0x100 118 #define NM_MISC_INT_1 0x4000 119 #define NM_MISC_INT_2 0x1 120 #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1) 121 122 /* The AV's "mixer ready" status bit and location. */ 123 #define NM_MIXER_STATUS_OFFSET 0xa04 124 #define NM_MIXER_READY_MASK 0x0800 125 #define NM_MIXER_PRESENCE 0xa06 126 #define NM_PRESENCE_MASK 0x0050 127 #define NM_PRESENCE_VALUE 0x0040 128 129 /* 130 * For the ZX. It uses the same interrupt register, but it holds 32 131 * bits instead of 16. 132 */ 133 #define NM2_PLAYBACK_INT 0x10000 134 #define NM2_RECORD_INT 0x80000 135 #define NM2_MISC_INT_1 0x8 136 #define NM2_MISC_INT_2 0x2 137 #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X)) 138 139 /* The ZX's "mixer ready" status bit and location. */ 140 #define NM2_MIXER_STATUS_OFFSET 0xa06 141 #define NM2_MIXER_READY_MASK 0x0800 142 143 /* The playback registers start from here. */ 144 #define NM_PLAYBACK_REG_OFFSET 0x0 145 /* The record registers start from here. */ 146 #define NM_RECORD_REG_OFFSET 0x200 147 148 /* The rate register is located 2 bytes from the start of the register area. */ 149 #define NM_RATE_REG_OFFSET 2 150 151 /* Mono/stereo flag, number of bits on playback, and rate mask. */ 152 #define NM_RATE_STEREO 1 153 #define NM_RATE_BITS_16 2 154 #define NM_RATE_MASK 0xf0 155 156 /* Playback enable register. */ 157 #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1) 158 #define NM_PLAYBACK_ENABLE_FLAG 1 159 #define NM_PLAYBACK_ONESHOT 2 160 #define NM_PLAYBACK_FREERUN 4 161 162 /* Mutes the audio output. */ 163 #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18) 164 #define NM_AUDIO_MUTE_LEFT 0x8000 165 #define NM_AUDIO_MUTE_RIGHT 0x0080 166 167 /* Recording enable register. */ 168 #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0) 169 #define NM_RECORD_ENABLE_FLAG 1 170 #define NM_RECORD_FREERUN 2 171 172 /* coefficient buffer pointer */ 173 #define NM_COEFF_START_OFFSET 0x1c 174 #define NM_COEFF_END_OFFSET 0x20 175 176 /* DMA buffer offsets */ 177 #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4) 178 #define NM_RBUFFER_END (NM_RECORD_REG_OFFSET + 0x10) 179 #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc) 180 #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8) 181 182 #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4) 183 #define NM_PBUFFER_END (NM_PLAYBACK_REG_OFFSET + 0x14) 184 #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc) 185 #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8) 186 187 struct nm256_stream { 188 189 struct nm256 *chip; 190 struct snd_pcm_substream *substream; 191 int running; 192 int suspended; 193 194 u32 buf; /* offset from chip->buffer */ 195 int bufsize; /* buffer size in bytes */ 196 void __iomem *bufptr; /* mapped pointer */ 197 unsigned long bufptr_addr; /* physical address of the mapped pointer */ 198 199 int dma_size; /* buffer size of the substream in bytes */ 200 int period_size; /* period size in bytes */ 201 int periods; /* # of periods */ 202 int shift; /* bit shifts */ 203 int cur_period; /* current period # */ 204 205 }; 206 207 struct nm256 { 208 209 struct snd_card *card; 210 211 void __iomem *cport; /* control port */ 212 struct resource *res_cport; /* its resource */ 213 unsigned long cport_addr; /* physical address */ 214 215 void __iomem *buffer; /* buffer */ 216 struct resource *res_buffer; /* its resource */ 217 unsigned long buffer_addr; /* buffer phyiscal address */ 218 219 u32 buffer_start; /* start offset from pci resource 0 */ 220 u32 buffer_end; /* end offset */ 221 u32 buffer_size; /* total buffer size */ 222 223 u32 all_coeff_buf; /* coefficient buffer */ 224 u32 coeff_buf[2]; /* coefficient buffer for each stream */ 225 226 unsigned int coeffs_current: 1; /* coeff. table is loaded? */ 227 unsigned int use_cache: 1; /* use one big coef. table */ 228 unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */ 229 unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */ 230 unsigned int in_resume: 1; 231 232 int mixer_base; /* register offset of ac97 mixer */ 233 int mixer_status_offset; /* offset of mixer status reg. */ 234 int mixer_status_mask; /* bit mask to test the mixer status */ 235 236 int irq; 237 int irq_acks; 238 irq_handler_t interrupt; 239 int badintrcount; /* counter to check bogus interrupts */ 240 struct mutex irq_mutex; 241 242 struct nm256_stream streams[2]; 243 244 struct snd_ac97 *ac97; 245 unsigned short *ac97_regs; /* register caches, only for valid regs */ 246 247 struct snd_pcm *pcm; 248 249 struct pci_dev *pci; 250 251 spinlock_t reg_lock; 252 253 }; 254 255 256 /* 257 * include coefficient table 258 */ 259 #include "nm256_coef.c" 260 261 262 /* 263 * PCI ids 264 */ 265 static const struct pci_device_id snd_nm256_ids[] = { 266 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0}, 267 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0}, 268 {PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0}, 269 {0,}, 270 }; 271 272 MODULE_DEVICE_TABLE(pci, snd_nm256_ids); 273 274 275 /* 276 * lowlvel stuffs 277 */ 278 279 static inline u8 280 snd_nm256_readb(struct nm256 *chip, int offset) 281 { 282 return readb(chip->cport + offset); 283 } 284 285 static inline u16 286 snd_nm256_readw(struct nm256 *chip, int offset) 287 { 288 return readw(chip->cport + offset); 289 } 290 291 static inline u32 292 snd_nm256_readl(struct nm256 *chip, int offset) 293 { 294 return readl(chip->cport + offset); 295 } 296 297 static inline void 298 snd_nm256_writeb(struct nm256 *chip, int offset, u8 val) 299 { 300 writeb(val, chip->cport + offset); 301 } 302 303 static inline void 304 snd_nm256_writew(struct nm256 *chip, int offset, u16 val) 305 { 306 writew(val, chip->cport + offset); 307 } 308 309 static inline void 310 snd_nm256_writel(struct nm256 *chip, int offset, u32 val) 311 { 312 writel(val, chip->cport + offset); 313 } 314 315 static inline void 316 snd_nm256_write_buffer(struct nm256 *chip, void *src, int offset, int size) 317 { 318 offset -= chip->buffer_start; 319 #ifdef CONFIG_SND_DEBUG 320 if (offset < 0 || offset >= chip->buffer_size) { 321 dev_err(chip->card->dev, 322 "write_buffer invalid offset = %d size = %d\n", 323 offset, size); 324 return; 325 } 326 #endif 327 memcpy_toio(chip->buffer + offset, src, size); 328 } 329 330 /* 331 * coefficient handlers -- what a magic! 332 */ 333 334 static u16 335 snd_nm256_get_start_offset(int which) 336 { 337 u16 offset = 0; 338 while (which-- > 0) 339 offset += coefficient_sizes[which]; 340 return offset; 341 } 342 343 static void 344 snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which) 345 { 346 u32 coeff_buf = chip->coeff_buf[stream]; 347 u16 offset = snd_nm256_get_start_offset(which); 348 u16 size = coefficient_sizes[which]; 349 350 snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size); 351 snd_nm256_writel(chip, port, coeff_buf); 352 /* ??? Record seems to behave differently than playback. */ 353 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 354 size--; 355 snd_nm256_writel(chip, port + 4, coeff_buf + size); 356 } 357 358 static void 359 snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number) 360 { 361 /* The enable register for the specified engine. */ 362 u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ? 363 NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG); 364 u32 addr = NM_COEFF_START_OFFSET; 365 366 addr += (stream == SNDRV_PCM_STREAM_CAPTURE ? 367 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET); 368 369 if (snd_nm256_readb(chip, poffset) & 1) { 370 dev_dbg(chip->card->dev, 371 "NM256: Engine was enabled while loading coefficients!\n"); 372 return; 373 } 374 375 /* The recording engine uses coefficient values 8-15. */ 376 number &= 7; 377 if (stream == SNDRV_PCM_STREAM_CAPTURE) 378 number += 8; 379 380 if (! chip->use_cache) { 381 snd_nm256_load_one_coefficient(chip, stream, addr, number); 382 return; 383 } 384 if (! chip->coeffs_current) { 385 snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf, 386 NM_TOTAL_COEFF_COUNT * 4); 387 chip->coeffs_current = 1; 388 } else { 389 u32 base = chip->all_coeff_buf; 390 u32 offset = snd_nm256_get_start_offset(number); 391 u32 end_offset = offset + coefficient_sizes[number]; 392 snd_nm256_writel(chip, addr, base + offset); 393 if (stream == SNDRV_PCM_STREAM_PLAYBACK) 394 end_offset--; 395 snd_nm256_writel(chip, addr + 4, base + end_offset); 396 } 397 } 398 399 400 /* The actual rates supported by the card. */ 401 static const unsigned int samplerates[8] = { 402 8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000, 403 }; 404 static const struct snd_pcm_hw_constraint_list constraints_rates = { 405 .count = ARRAY_SIZE(samplerates), 406 .list = samplerates, 407 .mask = 0, 408 }; 409 410 /* 411 * return the index of the target rate 412 */ 413 static int 414 snd_nm256_fixed_rate(unsigned int rate) 415 { 416 unsigned int i; 417 for (i = 0; i < ARRAY_SIZE(samplerates); i++) { 418 if (rate == samplerates[i]) 419 return i; 420 } 421 snd_BUG(); 422 return 0; 423 } 424 425 /* 426 * set sample rate and format 427 */ 428 static void 429 snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s, 430 struct snd_pcm_substream *substream) 431 { 432 struct snd_pcm_runtime *runtime = substream->runtime; 433 int rate_index = snd_nm256_fixed_rate(runtime->rate); 434 unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK; 435 436 s->shift = 0; 437 if (snd_pcm_format_width(runtime->format) == 16) { 438 ratebits |= NM_RATE_BITS_16; 439 s->shift++; 440 } 441 if (runtime->channels > 1) { 442 ratebits |= NM_RATE_STEREO; 443 s->shift++; 444 } 445 446 runtime->rate = samplerates[rate_index]; 447 448 switch (substream->stream) { 449 case SNDRV_PCM_STREAM_PLAYBACK: 450 snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */ 451 snd_nm256_writeb(chip, 452 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET, 453 ratebits); 454 break; 455 case SNDRV_PCM_STREAM_CAPTURE: 456 snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */ 457 snd_nm256_writeb(chip, 458 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET, 459 ratebits); 460 break; 461 } 462 } 463 464 /* acquire interrupt */ 465 static int snd_nm256_acquire_irq(struct nm256 *chip) 466 { 467 mutex_lock(&chip->irq_mutex); 468 if (chip->irq < 0) { 469 if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED, 470 KBUILD_MODNAME, chip)) { 471 dev_err(chip->card->dev, 472 "unable to grab IRQ %d\n", chip->pci->irq); 473 mutex_unlock(&chip->irq_mutex); 474 return -EBUSY; 475 } 476 chip->irq = chip->pci->irq; 477 } 478 chip->irq_acks++; 479 mutex_unlock(&chip->irq_mutex); 480 return 0; 481 } 482 483 /* release interrupt */ 484 static void snd_nm256_release_irq(struct nm256 *chip) 485 { 486 mutex_lock(&chip->irq_mutex); 487 if (chip->irq_acks > 0) 488 chip->irq_acks--; 489 if (chip->irq_acks == 0 && chip->irq >= 0) { 490 free_irq(chip->irq, chip); 491 chip->irq = -1; 492 } 493 mutex_unlock(&chip->irq_mutex); 494 } 495 496 /* 497 * start / stop 498 */ 499 500 /* update the watermark (current period) */ 501 static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg) 502 { 503 s->cur_period++; 504 s->cur_period %= s->periods; 505 snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size); 506 } 507 508 #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK) 509 #define snd_nm256_capture_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK) 510 511 static void 512 snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s, 513 struct snd_pcm_substream *substream) 514 { 515 /* program buffer pointers */ 516 snd_nm256_writel(chip, NM_PBUFFER_START, s->buf); 517 snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift)); 518 snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf); 519 snd_nm256_playback_mark(chip, s); 520 521 /* Enable playback engine and interrupts. */ 522 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 523 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN); 524 /* Enable both channels. */ 525 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0); 526 } 527 528 static void 529 snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s, 530 struct snd_pcm_substream *substream) 531 { 532 /* program buffer pointers */ 533 snd_nm256_writel(chip, NM_RBUFFER_START, s->buf); 534 snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size); 535 snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf); 536 snd_nm256_capture_mark(chip, s); 537 538 /* Enable playback engine and interrupts. */ 539 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 540 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN); 541 } 542 543 /* Stop the play engine. */ 544 static void 545 snd_nm256_playback_stop(struct nm256 *chip) 546 { 547 /* Shut off sound from both channels. */ 548 snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 549 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT); 550 /* Disable play engine. */ 551 snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0); 552 } 553 554 static void 555 snd_nm256_capture_stop(struct nm256 *chip) 556 { 557 /* Disable recording engine. */ 558 snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0); 559 } 560 561 static int 562 snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd) 563 { 564 struct nm256 *chip = snd_pcm_substream_chip(substream); 565 struct nm256_stream *s = substream->runtime->private_data; 566 int err = 0; 567 568 if (snd_BUG_ON(!s)) 569 return -ENXIO; 570 571 spin_lock(&chip->reg_lock); 572 switch (cmd) { 573 case SNDRV_PCM_TRIGGER_RESUME: 574 s->suspended = 0; 575 /* fallthru */ 576 case SNDRV_PCM_TRIGGER_START: 577 if (! s->running) { 578 snd_nm256_playback_start(chip, s, substream); 579 s->running = 1; 580 } 581 break; 582 case SNDRV_PCM_TRIGGER_SUSPEND: 583 s->suspended = 1; 584 /* fallthru */ 585 case SNDRV_PCM_TRIGGER_STOP: 586 if (s->running) { 587 snd_nm256_playback_stop(chip); 588 s->running = 0; 589 } 590 break; 591 default: 592 err = -EINVAL; 593 break; 594 } 595 spin_unlock(&chip->reg_lock); 596 return err; 597 } 598 599 static int 600 snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd) 601 { 602 struct nm256 *chip = snd_pcm_substream_chip(substream); 603 struct nm256_stream *s = substream->runtime->private_data; 604 int err = 0; 605 606 if (snd_BUG_ON(!s)) 607 return -ENXIO; 608 609 spin_lock(&chip->reg_lock); 610 switch (cmd) { 611 case SNDRV_PCM_TRIGGER_START: 612 case SNDRV_PCM_TRIGGER_RESUME: 613 if (! s->running) { 614 snd_nm256_capture_start(chip, s, substream); 615 s->running = 1; 616 } 617 break; 618 case SNDRV_PCM_TRIGGER_STOP: 619 case SNDRV_PCM_TRIGGER_SUSPEND: 620 if (s->running) { 621 snd_nm256_capture_stop(chip); 622 s->running = 0; 623 } 624 break; 625 default: 626 err = -EINVAL; 627 break; 628 } 629 spin_unlock(&chip->reg_lock); 630 return err; 631 } 632 633 634 /* 635 * prepare playback/capture channel 636 */ 637 static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream) 638 { 639 struct nm256 *chip = snd_pcm_substream_chip(substream); 640 struct snd_pcm_runtime *runtime = substream->runtime; 641 struct nm256_stream *s = runtime->private_data; 642 643 if (snd_BUG_ON(!s)) 644 return -ENXIO; 645 s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size); 646 s->period_size = frames_to_bytes(runtime, substream->runtime->period_size); 647 s->periods = substream->runtime->periods; 648 s->cur_period = 0; 649 650 spin_lock_irq(&chip->reg_lock); 651 s->running = 0; 652 snd_nm256_set_format(chip, s, substream); 653 spin_unlock_irq(&chip->reg_lock); 654 655 return 0; 656 } 657 658 659 /* 660 * get the current pointer 661 */ 662 static snd_pcm_uframes_t 663 snd_nm256_playback_pointer(struct snd_pcm_substream *substream) 664 { 665 struct nm256 *chip = snd_pcm_substream_chip(substream); 666 struct nm256_stream *s = substream->runtime->private_data; 667 unsigned long curp; 668 669 if (snd_BUG_ON(!s)) 670 return 0; 671 curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf; 672 curp %= s->dma_size; 673 return bytes_to_frames(substream->runtime, curp); 674 } 675 676 static snd_pcm_uframes_t 677 snd_nm256_capture_pointer(struct snd_pcm_substream *substream) 678 { 679 struct nm256 *chip = snd_pcm_substream_chip(substream); 680 struct nm256_stream *s = substream->runtime->private_data; 681 unsigned long curp; 682 683 if (snd_BUG_ON(!s)) 684 return 0; 685 curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf; 686 curp %= s->dma_size; 687 return bytes_to_frames(substream->runtime, curp); 688 } 689 690 /* Remapped I/O space can be accessible as pointer on i386 */ 691 /* This might be changed in the future */ 692 #ifndef __i386__ 693 /* 694 * silence / copy for playback 695 */ 696 static int 697 snd_nm256_playback_silence(struct snd_pcm_substream *substream, 698 int channel, unsigned long pos, unsigned long count) 699 { 700 struct snd_pcm_runtime *runtime = substream->runtime; 701 struct nm256_stream *s = runtime->private_data; 702 703 memset_io(s->bufptr + pos, 0, count); 704 return 0; 705 } 706 707 static int 708 snd_nm256_playback_copy(struct snd_pcm_substream *substream, 709 int channel, unsigned long pos, 710 void __user *src, unsigned long count) 711 { 712 struct snd_pcm_runtime *runtime = substream->runtime; 713 struct nm256_stream *s = runtime->private_data; 714 715 if (copy_from_user_toio(s->bufptr + pos, src, count)) 716 return -EFAULT; 717 return 0; 718 } 719 720 static int 721 snd_nm256_playback_copy_kernel(struct snd_pcm_substream *substream, 722 int channel, unsigned long pos, 723 void *src, unsigned long count) 724 { 725 struct snd_pcm_runtime *runtime = substream->runtime; 726 struct nm256_stream *s = runtime->private_data; 727 728 memcpy_toio(s->bufptr + pos, src, count); 729 return 0; 730 } 731 732 /* 733 * copy to user 734 */ 735 static int 736 snd_nm256_capture_copy(struct snd_pcm_substream *substream, 737 int channel, unsigned long pos, 738 void __user *dst, unsigned long count) 739 { 740 struct snd_pcm_runtime *runtime = substream->runtime; 741 struct nm256_stream *s = runtime->private_data; 742 743 if (copy_to_user_fromio(dst, s->bufptr + pos, count)) 744 return -EFAULT; 745 return 0; 746 } 747 748 static int 749 snd_nm256_capture_copy_kernel(struct snd_pcm_substream *substream, 750 int channel, unsigned long pos, 751 void *dst, unsigned long count) 752 { 753 struct snd_pcm_runtime *runtime = substream->runtime; 754 struct nm256_stream *s = runtime->private_data; 755 756 memcpy_fromio(dst, s->bufptr + pos, count); 757 return 0; 758 } 759 760 #endif /* !__i386__ */ 761 762 763 /* 764 * update playback/capture watermarks 765 */ 766 767 /* spinlock held! */ 768 static void 769 snd_nm256_playback_update(struct nm256 *chip) 770 { 771 struct nm256_stream *s; 772 773 s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK]; 774 if (s->running && s->substream) { 775 spin_unlock(&chip->reg_lock); 776 snd_pcm_period_elapsed(s->substream); 777 spin_lock(&chip->reg_lock); 778 snd_nm256_playback_mark(chip, s); 779 } 780 } 781 782 /* spinlock held! */ 783 static void 784 snd_nm256_capture_update(struct nm256 *chip) 785 { 786 struct nm256_stream *s; 787 788 s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE]; 789 if (s->running && s->substream) { 790 spin_unlock(&chip->reg_lock); 791 snd_pcm_period_elapsed(s->substream); 792 spin_lock(&chip->reg_lock); 793 snd_nm256_capture_mark(chip, s); 794 } 795 } 796 797 /* 798 * hardware info 799 */ 800 static struct snd_pcm_hardware snd_nm256_playback = 801 { 802 .info = SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID | 803 SNDRV_PCM_INFO_INTERLEAVED | 804 /*SNDRV_PCM_INFO_PAUSE |*/ 805 SNDRV_PCM_INFO_RESUME, 806 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 807 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, 808 .rate_min = 8000, 809 .rate_max = 48000, 810 .channels_min = 1, 811 .channels_max = 2, 812 .periods_min = 2, 813 .periods_max = 1024, 814 .buffer_bytes_max = 128 * 1024, 815 .period_bytes_min = 256, 816 .period_bytes_max = 128 * 1024, 817 }; 818 819 static struct snd_pcm_hardware snd_nm256_capture = 820 { 821 .info = SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID | 822 SNDRV_PCM_INFO_INTERLEAVED | 823 /*SNDRV_PCM_INFO_PAUSE |*/ 824 SNDRV_PCM_INFO_RESUME, 825 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 826 .rates = SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000, 827 .rate_min = 8000, 828 .rate_max = 48000, 829 .channels_min = 1, 830 .channels_max = 2, 831 .periods_min = 2, 832 .periods_max = 1024, 833 .buffer_bytes_max = 128 * 1024, 834 .period_bytes_min = 256, 835 .period_bytes_max = 128 * 1024, 836 }; 837 838 839 /* set dma transfer size */ 840 static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream, 841 struct snd_pcm_hw_params *hw_params) 842 { 843 /* area and addr are already set and unchanged */ 844 substream->runtime->dma_bytes = params_buffer_bytes(hw_params); 845 return 0; 846 } 847 848 /* 849 * open 850 */ 851 static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s, 852 struct snd_pcm_substream *substream, 853 struct snd_pcm_hardware *hw_ptr) 854 { 855 struct snd_pcm_runtime *runtime = substream->runtime; 856 857 s->running = 0; 858 runtime->hw = *hw_ptr; 859 runtime->hw.buffer_bytes_max = s->bufsize; 860 runtime->hw.period_bytes_max = s->bufsize / 2; 861 runtime->dma_area = (void __force *) s->bufptr; 862 runtime->dma_addr = s->bufptr_addr; 863 runtime->dma_bytes = s->bufsize; 864 runtime->private_data = s; 865 s->substream = substream; 866 867 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 868 &constraints_rates); 869 } 870 871 static int 872 snd_nm256_playback_open(struct snd_pcm_substream *substream) 873 { 874 struct nm256 *chip = snd_pcm_substream_chip(substream); 875 876 if (snd_nm256_acquire_irq(chip) < 0) 877 return -EBUSY; 878 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK], 879 substream, &snd_nm256_playback); 880 return 0; 881 } 882 883 static int 884 snd_nm256_capture_open(struct snd_pcm_substream *substream) 885 { 886 struct nm256 *chip = snd_pcm_substream_chip(substream); 887 888 if (snd_nm256_acquire_irq(chip) < 0) 889 return -EBUSY; 890 snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE], 891 substream, &snd_nm256_capture); 892 return 0; 893 } 894 895 /* 896 * close - we don't have to do special.. 897 */ 898 static int 899 snd_nm256_playback_close(struct snd_pcm_substream *substream) 900 { 901 struct nm256 *chip = snd_pcm_substream_chip(substream); 902 903 snd_nm256_release_irq(chip); 904 return 0; 905 } 906 907 908 static int 909 snd_nm256_capture_close(struct snd_pcm_substream *substream) 910 { 911 struct nm256 *chip = snd_pcm_substream_chip(substream); 912 913 snd_nm256_release_irq(chip); 914 return 0; 915 } 916 917 /* 918 * create a pcm instance 919 */ 920 static const struct snd_pcm_ops snd_nm256_playback_ops = { 921 .open = snd_nm256_playback_open, 922 .close = snd_nm256_playback_close, 923 .ioctl = snd_pcm_lib_ioctl, 924 .hw_params = snd_nm256_pcm_hw_params, 925 .prepare = snd_nm256_pcm_prepare, 926 .trigger = snd_nm256_playback_trigger, 927 .pointer = snd_nm256_playback_pointer, 928 #ifndef __i386__ 929 .copy_user = snd_nm256_playback_copy, 930 .copy_kernel = snd_nm256_playback_copy_kernel, 931 .fill_silence = snd_nm256_playback_silence, 932 #endif 933 .mmap = snd_pcm_lib_mmap_iomem, 934 }; 935 936 static const struct snd_pcm_ops snd_nm256_capture_ops = { 937 .open = snd_nm256_capture_open, 938 .close = snd_nm256_capture_close, 939 .ioctl = snd_pcm_lib_ioctl, 940 .hw_params = snd_nm256_pcm_hw_params, 941 .prepare = snd_nm256_pcm_prepare, 942 .trigger = snd_nm256_capture_trigger, 943 .pointer = snd_nm256_capture_pointer, 944 #ifndef __i386__ 945 .copy_user = snd_nm256_capture_copy, 946 .copy_kernel = snd_nm256_capture_copy_kernel, 947 #endif 948 .mmap = snd_pcm_lib_mmap_iomem, 949 }; 950 951 static int 952 snd_nm256_pcm(struct nm256 *chip, int device) 953 { 954 struct snd_pcm *pcm; 955 int i, err; 956 957 for (i = 0; i < 2; i++) { 958 struct nm256_stream *s = &chip->streams[i]; 959 s->bufptr = chip->buffer + (s->buf - chip->buffer_start); 960 s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start); 961 } 962 963 err = snd_pcm_new(chip->card, chip->card->driver, device, 964 1, 1, &pcm); 965 if (err < 0) 966 return err; 967 968 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops); 969 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops); 970 971 pcm->private_data = chip; 972 pcm->info_flags = 0; 973 chip->pcm = pcm; 974 975 return 0; 976 } 977 978 979 /* 980 * Initialize the hardware. 981 */ 982 static void 983 snd_nm256_init_chip(struct nm256 *chip) 984 { 985 /* Reset everything. */ 986 snd_nm256_writeb(chip, 0x0, 0x11); 987 snd_nm256_writew(chip, 0x214, 0); 988 /* stop sounds.. */ 989 //snd_nm256_playback_stop(chip); 990 //snd_nm256_capture_stop(chip); 991 } 992 993 994 static irqreturn_t 995 snd_nm256_intr_check(struct nm256 *chip) 996 { 997 if (chip->badintrcount++ > 1000) { 998 /* 999 * I'm not sure if the best thing is to stop the card from 1000 * playing or just release the interrupt (after all, we're in 1001 * a bad situation, so doing fancy stuff may not be such a good 1002 * idea). 1003 * 1004 * I worry about the card engine continuing to play noise 1005 * over and over, however--that could become a very 1006 * obnoxious problem. And we know that when this usually 1007 * happens things are fairly safe, it just means the user's 1008 * inserted a PCMCIA card and someone's spamming us with IRQ 9s. 1009 */ 1010 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) 1011 snd_nm256_playback_stop(chip); 1012 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) 1013 snd_nm256_capture_stop(chip); 1014 chip->badintrcount = 0; 1015 return IRQ_HANDLED; 1016 } 1017 return IRQ_NONE; 1018 } 1019 1020 /* 1021 * Handle a potential interrupt for the device referred to by DEV_ID. 1022 * 1023 * I don't like the cut-n-paste job here either between the two routines, 1024 * but there are sufficient differences between the two interrupt handlers 1025 * that parameterizing it isn't all that great either. (Could use a macro, 1026 * I suppose...yucky bleah.) 1027 */ 1028 1029 static irqreturn_t 1030 snd_nm256_interrupt(int irq, void *dev_id) 1031 { 1032 struct nm256 *chip = dev_id; 1033 u16 status; 1034 u8 cbyte; 1035 1036 status = snd_nm256_readw(chip, NM_INT_REG); 1037 1038 /* Not ours. */ 1039 if (status == 0) 1040 return snd_nm256_intr_check(chip); 1041 1042 chip->badintrcount = 0; 1043 1044 /* Rather boring; check for individual interrupts and process them. */ 1045 1046 spin_lock(&chip->reg_lock); 1047 if (status & NM_PLAYBACK_INT) { 1048 status &= ~NM_PLAYBACK_INT; 1049 NM_ACK_INT(chip, NM_PLAYBACK_INT); 1050 snd_nm256_playback_update(chip); 1051 } 1052 1053 if (status & NM_RECORD_INT) { 1054 status &= ~NM_RECORD_INT; 1055 NM_ACK_INT(chip, NM_RECORD_INT); 1056 snd_nm256_capture_update(chip); 1057 } 1058 1059 if (status & NM_MISC_INT_1) { 1060 status &= ~NM_MISC_INT_1; 1061 NM_ACK_INT(chip, NM_MISC_INT_1); 1062 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); 1063 snd_nm256_writew(chip, NM_INT_REG, 0x8000); 1064 cbyte = snd_nm256_readb(chip, 0x400); 1065 snd_nm256_writeb(chip, 0x400, cbyte | 2); 1066 } 1067 1068 if (status & NM_MISC_INT_2) { 1069 status &= ~NM_MISC_INT_2; 1070 NM_ACK_INT(chip, NM_MISC_INT_2); 1071 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); 1072 cbyte = snd_nm256_readb(chip, 0x400); 1073 snd_nm256_writeb(chip, 0x400, cbyte & ~2); 1074 } 1075 1076 /* Unknown interrupt. */ 1077 if (status) { 1078 dev_dbg(chip->card->dev, 1079 "NM256: Fire in the hole! Unknown status 0x%x\n", 1080 status); 1081 /* Pray. */ 1082 NM_ACK_INT(chip, status); 1083 } 1084 1085 spin_unlock(&chip->reg_lock); 1086 return IRQ_HANDLED; 1087 } 1088 1089 /* 1090 * Handle a potential interrupt for the device referred to by DEV_ID. 1091 * This handler is for the 256ZX, and is very similar to the non-ZX 1092 * routine. 1093 */ 1094 1095 static irqreturn_t 1096 snd_nm256_interrupt_zx(int irq, void *dev_id) 1097 { 1098 struct nm256 *chip = dev_id; 1099 u32 status; 1100 u8 cbyte; 1101 1102 status = snd_nm256_readl(chip, NM_INT_REG); 1103 1104 /* Not ours. */ 1105 if (status == 0) 1106 return snd_nm256_intr_check(chip); 1107 1108 chip->badintrcount = 0; 1109 1110 /* Rather boring; check for individual interrupts and process them. */ 1111 1112 spin_lock(&chip->reg_lock); 1113 if (status & NM2_PLAYBACK_INT) { 1114 status &= ~NM2_PLAYBACK_INT; 1115 NM2_ACK_INT(chip, NM2_PLAYBACK_INT); 1116 snd_nm256_playback_update(chip); 1117 } 1118 1119 if (status & NM2_RECORD_INT) { 1120 status &= ~NM2_RECORD_INT; 1121 NM2_ACK_INT(chip, NM2_RECORD_INT); 1122 snd_nm256_capture_update(chip); 1123 } 1124 1125 if (status & NM2_MISC_INT_1) { 1126 status &= ~NM2_MISC_INT_1; 1127 NM2_ACK_INT(chip, NM2_MISC_INT_1); 1128 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n"); 1129 cbyte = snd_nm256_readb(chip, 0x400); 1130 snd_nm256_writeb(chip, 0x400, cbyte | 2); 1131 } 1132 1133 if (status & NM2_MISC_INT_2) { 1134 status &= ~NM2_MISC_INT_2; 1135 NM2_ACK_INT(chip, NM2_MISC_INT_2); 1136 dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n"); 1137 cbyte = snd_nm256_readb(chip, 0x400); 1138 snd_nm256_writeb(chip, 0x400, cbyte & ~2); 1139 } 1140 1141 /* Unknown interrupt. */ 1142 if (status) { 1143 dev_dbg(chip->card->dev, 1144 "NM256: Fire in the hole! Unknown status 0x%x\n", 1145 status); 1146 /* Pray. */ 1147 NM2_ACK_INT(chip, status); 1148 } 1149 1150 spin_unlock(&chip->reg_lock); 1151 return IRQ_HANDLED; 1152 } 1153 1154 /* 1155 * AC97 interface 1156 */ 1157 1158 /* 1159 * Waits for the mixer to become ready to be written; returns a zero value 1160 * if it timed out. 1161 */ 1162 static int 1163 snd_nm256_ac97_ready(struct nm256 *chip) 1164 { 1165 int timeout = 10; 1166 u32 testaddr; 1167 u16 testb; 1168 1169 testaddr = chip->mixer_status_offset; 1170 testb = chip->mixer_status_mask; 1171 1172 /* 1173 * Loop around waiting for the mixer to become ready. 1174 */ 1175 while (timeout-- > 0) { 1176 if ((snd_nm256_readw(chip, testaddr) & testb) == 0) 1177 return 1; 1178 udelay(100); 1179 } 1180 return 0; 1181 } 1182 1183 /* 1184 * Initial register values to be written to the AC97 mixer. 1185 * While most of these are identical to the reset values, we do this 1186 * so that we have most of the register contents cached--this avoids 1187 * reading from the mixer directly (which seems to be problematic, 1188 * probably due to ignorance). 1189 */ 1190 1191 struct initialValues { 1192 unsigned short reg; 1193 unsigned short value; 1194 }; 1195 1196 static struct initialValues nm256_ac97_init_val[] = 1197 { 1198 { AC97_MASTER, 0x8000 }, 1199 { AC97_HEADPHONE, 0x8000 }, 1200 { AC97_MASTER_MONO, 0x8000 }, 1201 { AC97_PC_BEEP, 0x8000 }, 1202 { AC97_PHONE, 0x8008 }, 1203 { AC97_MIC, 0x8000 }, 1204 { AC97_LINE, 0x8808 }, 1205 { AC97_CD, 0x8808 }, 1206 { AC97_VIDEO, 0x8808 }, 1207 { AC97_AUX, 0x8808 }, 1208 { AC97_PCM, 0x8808 }, 1209 { AC97_REC_SEL, 0x0000 }, 1210 { AC97_REC_GAIN, 0x0B0B }, 1211 { AC97_GENERAL_PURPOSE, 0x0000 }, 1212 { AC97_3D_CONTROL, 0x8000 }, 1213 { AC97_VENDOR_ID1, 0x8384 }, 1214 { AC97_VENDOR_ID2, 0x7609 }, 1215 }; 1216 1217 static int nm256_ac97_idx(unsigned short reg) 1218 { 1219 int i; 1220 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) 1221 if (nm256_ac97_init_val[i].reg == reg) 1222 return i; 1223 return -1; 1224 } 1225 1226 /* 1227 * some nm256 easily crash when reading from mixer registers 1228 * thus we're treating it as a write-only mixer and cache the 1229 * written values 1230 */ 1231 static unsigned short 1232 snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 1233 { 1234 struct nm256 *chip = ac97->private_data; 1235 int idx = nm256_ac97_idx(reg); 1236 1237 if (idx < 0) 1238 return 0; 1239 return chip->ac97_regs[idx]; 1240 } 1241 1242 /* 1243 */ 1244 static void 1245 snd_nm256_ac97_write(struct snd_ac97 *ac97, 1246 unsigned short reg, unsigned short val) 1247 { 1248 struct nm256 *chip = ac97->private_data; 1249 int tries = 2; 1250 int idx = nm256_ac97_idx(reg); 1251 u32 base; 1252 1253 if (idx < 0) 1254 return; 1255 1256 base = chip->mixer_base; 1257 1258 snd_nm256_ac97_ready(chip); 1259 1260 /* Wait for the write to take, too. */ 1261 while (tries-- > 0) { 1262 snd_nm256_writew(chip, base + reg, val); 1263 msleep(1); /* a little delay here seems better.. */ 1264 if (snd_nm256_ac97_ready(chip)) { 1265 /* successful write: set cache */ 1266 chip->ac97_regs[idx] = val; 1267 return; 1268 } 1269 } 1270 dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n"); 1271 } 1272 1273 /* static resolution table */ 1274 static const struct snd_ac97_res_table nm256_res_table[] = { 1275 { AC97_MASTER, 0x1f1f }, 1276 { AC97_HEADPHONE, 0x1f1f }, 1277 { AC97_MASTER_MONO, 0x001f }, 1278 { AC97_PC_BEEP, 0x001f }, 1279 { AC97_PHONE, 0x001f }, 1280 { AC97_MIC, 0x001f }, 1281 { AC97_LINE, 0x1f1f }, 1282 { AC97_CD, 0x1f1f }, 1283 { AC97_VIDEO, 0x1f1f }, 1284 { AC97_AUX, 0x1f1f }, 1285 { AC97_PCM, 0x1f1f }, 1286 { AC97_REC_GAIN, 0x0f0f }, 1287 { } /* terminator */ 1288 }; 1289 1290 /* initialize the ac97 into a known state */ 1291 static void 1292 snd_nm256_ac97_reset(struct snd_ac97 *ac97) 1293 { 1294 struct nm256 *chip = ac97->private_data; 1295 1296 /* Reset the mixer. 'Tis magic! */ 1297 snd_nm256_writeb(chip, 0x6c0, 1); 1298 if (! chip->reset_workaround) { 1299 /* Dell latitude LS will lock up by this */ 1300 snd_nm256_writeb(chip, 0x6cc, 0x87); 1301 } 1302 if (! chip->reset_workaround_2) { 1303 /* Dell latitude CSx will lock up by this */ 1304 snd_nm256_writeb(chip, 0x6cc, 0x80); 1305 snd_nm256_writeb(chip, 0x6cc, 0x0); 1306 } 1307 if (! chip->in_resume) { 1308 int i; 1309 for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) { 1310 /* preload the cache, so as to avoid even a single 1311 * read of the mixer regs 1312 */ 1313 snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg, 1314 nm256_ac97_init_val[i].value); 1315 } 1316 } 1317 } 1318 1319 /* create an ac97 mixer interface */ 1320 static int 1321 snd_nm256_mixer(struct nm256 *chip) 1322 { 1323 struct snd_ac97_bus *pbus; 1324 struct snd_ac97_template ac97; 1325 int err; 1326 static struct snd_ac97_bus_ops ops = { 1327 .reset = snd_nm256_ac97_reset, 1328 .write = snd_nm256_ac97_write, 1329 .read = snd_nm256_ac97_read, 1330 }; 1331 1332 chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val), 1333 sizeof(short), GFP_KERNEL); 1334 if (! chip->ac97_regs) 1335 return -ENOMEM; 1336 1337 if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0) 1338 return err; 1339 1340 memset(&ac97, 0, sizeof(ac97)); 1341 ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */ 1342 ac97.private_data = chip; 1343 ac97.res_table = nm256_res_table; 1344 pbus->no_vra = 1; 1345 err = snd_ac97_mixer(pbus, &ac97, &chip->ac97); 1346 if (err < 0) 1347 return err; 1348 if (! (chip->ac97->id & (0xf0000000))) { 1349 /* looks like an invalid id */ 1350 sprintf(chip->card->mixername, "%s AC97", chip->card->driver); 1351 } 1352 return 0; 1353 } 1354 1355 /* 1356 * See if the signature left by the NM256 BIOS is intact; if so, we use 1357 * the associated address as the end of our audio buffer in the video 1358 * RAM. 1359 */ 1360 1361 static int 1362 snd_nm256_peek_for_sig(struct nm256 *chip) 1363 { 1364 /* The signature is located 1K below the end of video RAM. */ 1365 void __iomem *temp; 1366 /* Default buffer end is 5120 bytes below the top of RAM. */ 1367 unsigned long pointer_found = chip->buffer_end - 0x1400; 1368 u32 sig; 1369 1370 temp = ioremap_nocache(chip->buffer_addr + chip->buffer_end - 0x400, 16); 1371 if (temp == NULL) { 1372 dev_err(chip->card->dev, 1373 "Unable to scan for card signature in video RAM\n"); 1374 return -EBUSY; 1375 } 1376 1377 sig = readl(temp); 1378 if ((sig & NM_SIG_MASK) == NM_SIGNATURE) { 1379 u32 pointer = readl(temp + 4); 1380 1381 /* 1382 * If it's obviously invalid, don't use it 1383 */ 1384 if (pointer == 0xffffffff || 1385 pointer < chip->buffer_size || 1386 pointer > chip->buffer_end) { 1387 dev_err(chip->card->dev, 1388 "invalid signature found: 0x%x\n", pointer); 1389 iounmap(temp); 1390 return -ENODEV; 1391 } else { 1392 pointer_found = pointer; 1393 dev_info(chip->card->dev, 1394 "found card signature in video RAM: 0x%x\n", 1395 pointer); 1396 } 1397 } 1398 1399 iounmap(temp); 1400 chip->buffer_end = pointer_found; 1401 1402 return 0; 1403 } 1404 1405 #ifdef CONFIG_PM_SLEEP 1406 /* 1407 * APM event handler, so the card is properly reinitialized after a power 1408 * event. 1409 */ 1410 static int nm256_suspend(struct device *dev) 1411 { 1412 struct snd_card *card = dev_get_drvdata(dev); 1413 struct nm256 *chip = card->private_data; 1414 1415 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1416 snd_ac97_suspend(chip->ac97); 1417 chip->coeffs_current = 0; 1418 return 0; 1419 } 1420 1421 static int nm256_resume(struct device *dev) 1422 { 1423 struct snd_card *card = dev_get_drvdata(dev); 1424 struct nm256 *chip = card->private_data; 1425 int i; 1426 1427 /* Perform a full reset on the hardware */ 1428 chip->in_resume = 1; 1429 1430 snd_nm256_init_chip(chip); 1431 1432 /* restore ac97 */ 1433 snd_ac97_resume(chip->ac97); 1434 1435 for (i = 0; i < 2; i++) { 1436 struct nm256_stream *s = &chip->streams[i]; 1437 if (s->substream && s->suspended) { 1438 spin_lock_irq(&chip->reg_lock); 1439 snd_nm256_set_format(chip, s, s->substream); 1440 spin_unlock_irq(&chip->reg_lock); 1441 } 1442 } 1443 1444 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1445 chip->in_resume = 0; 1446 return 0; 1447 } 1448 1449 static SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume); 1450 #define NM256_PM_OPS &nm256_pm 1451 #else 1452 #define NM256_PM_OPS NULL 1453 #endif /* CONFIG_PM_SLEEP */ 1454 1455 static int snd_nm256_free(struct nm256 *chip) 1456 { 1457 if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running) 1458 snd_nm256_playback_stop(chip); 1459 if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running) 1460 snd_nm256_capture_stop(chip); 1461 1462 if (chip->irq >= 0) 1463 free_irq(chip->irq, chip); 1464 1465 iounmap(chip->cport); 1466 iounmap(chip->buffer); 1467 release_and_free_resource(chip->res_cport); 1468 release_and_free_resource(chip->res_buffer); 1469 1470 pci_disable_device(chip->pci); 1471 kfree(chip->ac97_regs); 1472 kfree(chip); 1473 return 0; 1474 } 1475 1476 static int snd_nm256_dev_free(struct snd_device *device) 1477 { 1478 struct nm256 *chip = device->device_data; 1479 return snd_nm256_free(chip); 1480 } 1481 1482 static int 1483 snd_nm256_create(struct snd_card *card, struct pci_dev *pci, 1484 struct nm256 **chip_ret) 1485 { 1486 struct nm256 *chip; 1487 int err, pval; 1488 static struct snd_device_ops ops = { 1489 .dev_free = snd_nm256_dev_free, 1490 }; 1491 u32 addr; 1492 1493 *chip_ret = NULL; 1494 1495 if ((err = pci_enable_device(pci)) < 0) 1496 return err; 1497 1498 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1499 if (chip == NULL) { 1500 pci_disable_device(pci); 1501 return -ENOMEM; 1502 } 1503 1504 chip->card = card; 1505 chip->pci = pci; 1506 chip->use_cache = use_cache; 1507 spin_lock_init(&chip->reg_lock); 1508 chip->irq = -1; 1509 mutex_init(&chip->irq_mutex); 1510 1511 /* store buffer sizes in bytes */ 1512 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024; 1513 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024; 1514 1515 /* 1516 * The NM256 has two memory ports. The first port is nothing 1517 * more than a chunk of video RAM, which is used as the I/O ring 1518 * buffer. The second port has the actual juicy stuff (like the 1519 * mixer and the playback engine control registers). 1520 */ 1521 1522 chip->buffer_addr = pci_resource_start(pci, 0); 1523 chip->cport_addr = pci_resource_start(pci, 1); 1524 1525 /* Init the memory port info. */ 1526 /* remap control port (#2) */ 1527 chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE, 1528 card->driver); 1529 if (chip->res_cport == NULL) { 1530 dev_err(card->dev, "memory region 0x%lx (size 0x%x) busy\n", 1531 chip->cport_addr, NM_PORT2_SIZE); 1532 err = -EBUSY; 1533 goto __error; 1534 } 1535 chip->cport = ioremap_nocache(chip->cport_addr, NM_PORT2_SIZE); 1536 if (chip->cport == NULL) { 1537 dev_err(card->dev, "unable to map control port %lx\n", 1538 chip->cport_addr); 1539 err = -ENOMEM; 1540 goto __error; 1541 } 1542 1543 if (!strcmp(card->driver, "NM256AV")) { 1544 /* Ok, try to see if this is a non-AC97 version of the hardware. */ 1545 pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE); 1546 if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) { 1547 if (! force_ac97) { 1548 dev_err(card->dev, 1549 "no ac97 is found!\n"); 1550 dev_err(card->dev, 1551 "force the driver to load by passing in the module parameter\n"); 1552 dev_err(card->dev, 1553 " force_ac97=1\n"); 1554 dev_err(card->dev, 1555 "or try sb16, opl3sa2, or cs423x drivers instead.\n"); 1556 err = -ENXIO; 1557 goto __error; 1558 } 1559 } 1560 chip->buffer_end = 2560 * 1024; 1561 chip->interrupt = snd_nm256_interrupt; 1562 chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET; 1563 chip->mixer_status_mask = NM_MIXER_READY_MASK; 1564 } else { 1565 /* Not sure if there is any relevant detect for the ZX or not. */ 1566 if (snd_nm256_readb(chip, 0xa0b) != 0) 1567 chip->buffer_end = 6144 * 1024; 1568 else 1569 chip->buffer_end = 4096 * 1024; 1570 1571 chip->interrupt = snd_nm256_interrupt_zx; 1572 chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET; 1573 chip->mixer_status_mask = NM2_MIXER_READY_MASK; 1574 } 1575 1576 chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize + 1577 chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; 1578 if (chip->use_cache) 1579 chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4; 1580 else 1581 chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE; 1582 1583 if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end) 1584 chip->buffer_end = buffer_top; 1585 else { 1586 /* get buffer end pointer from signature */ 1587 if ((err = snd_nm256_peek_for_sig(chip)) < 0) 1588 goto __error; 1589 } 1590 1591 chip->buffer_start = chip->buffer_end - chip->buffer_size; 1592 chip->buffer_addr += chip->buffer_start; 1593 1594 dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n", 1595 chip->buffer_start, chip->buffer_end); 1596 1597 chip->res_buffer = request_mem_region(chip->buffer_addr, 1598 chip->buffer_size, 1599 card->driver); 1600 if (chip->res_buffer == NULL) { 1601 dev_err(card->dev, "buffer 0x%lx (size 0x%x) busy\n", 1602 chip->buffer_addr, chip->buffer_size); 1603 err = -EBUSY; 1604 goto __error; 1605 } 1606 chip->buffer = ioremap_nocache(chip->buffer_addr, chip->buffer_size); 1607 if (chip->buffer == NULL) { 1608 err = -ENOMEM; 1609 dev_err(card->dev, "unable to map ring buffer at %lx\n", 1610 chip->buffer_addr); 1611 goto __error; 1612 } 1613 1614 /* set offsets */ 1615 addr = chip->buffer_start; 1616 chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr; 1617 addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize; 1618 chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr; 1619 addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize; 1620 if (chip->use_cache) { 1621 chip->all_coeff_buf = addr; 1622 } else { 1623 chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr; 1624 addr += NM_MAX_PLAYBACK_COEF_SIZE; 1625 chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr; 1626 } 1627 1628 /* Fixed setting. */ 1629 chip->mixer_base = NM_MIXER_OFFSET; 1630 1631 chip->coeffs_current = 0; 1632 1633 snd_nm256_init_chip(chip); 1634 1635 // pci_set_master(pci); /* needed? */ 1636 1637 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) 1638 goto __error; 1639 1640 *chip_ret = chip; 1641 return 0; 1642 1643 __error: 1644 snd_nm256_free(chip); 1645 return err; 1646 } 1647 1648 1649 enum { NM_BLACKLISTED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 }; 1650 1651 static struct snd_pci_quirk nm256_quirks[] = { 1652 /* HP omnibook 4150 has cs4232 codec internally */ 1653 SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_BLACKLISTED), 1654 /* Reset workarounds to avoid lock-ups */ 1655 SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND), 1656 SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND), 1657 SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2), 1658 { } /* terminator */ 1659 }; 1660 1661 1662 static int snd_nm256_probe(struct pci_dev *pci, 1663 const struct pci_device_id *pci_id) 1664 { 1665 struct snd_card *card; 1666 struct nm256 *chip; 1667 int err; 1668 const struct snd_pci_quirk *q; 1669 1670 q = snd_pci_quirk_lookup(pci, nm256_quirks); 1671 if (q) { 1672 dev_dbg(&pci->dev, "Enabled quirk for %s.\n", 1673 snd_pci_quirk_name(q)); 1674 switch (q->value) { 1675 case NM_BLACKLISTED: 1676 dev_info(&pci->dev, 1677 "The device is blacklisted. Loading stopped\n"); 1678 return -ENODEV; 1679 case NM_RESET_WORKAROUND_2: 1680 reset_workaround_2 = 1; 1681 /* Fall-through */ 1682 case NM_RESET_WORKAROUND: 1683 reset_workaround = 1; 1684 break; 1685 } 1686 } 1687 1688 err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card); 1689 if (err < 0) 1690 return err; 1691 1692 switch (pci->device) { 1693 case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO: 1694 strcpy(card->driver, "NM256AV"); 1695 break; 1696 case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO: 1697 strcpy(card->driver, "NM256ZX"); 1698 break; 1699 case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO: 1700 strcpy(card->driver, "NM256XL+"); 1701 break; 1702 default: 1703 dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device); 1704 snd_card_free(card); 1705 return -EINVAL; 1706 } 1707 1708 if (vaio_hack) 1709 buffer_top = 0x25a800; /* this avoids conflicts with XFree86 server */ 1710 1711 if (playback_bufsize < 4) 1712 playback_bufsize = 4; 1713 if (playback_bufsize > 128) 1714 playback_bufsize = 128; 1715 if (capture_bufsize < 4) 1716 capture_bufsize = 4; 1717 if (capture_bufsize > 128) 1718 capture_bufsize = 128; 1719 if ((err = snd_nm256_create(card, pci, &chip)) < 0) { 1720 snd_card_free(card); 1721 return err; 1722 } 1723 card->private_data = chip; 1724 1725 if (reset_workaround) { 1726 dev_dbg(&pci->dev, "reset_workaround activated\n"); 1727 chip->reset_workaround = 1; 1728 } 1729 1730 if (reset_workaround_2) { 1731 dev_dbg(&pci->dev, "reset_workaround_2 activated\n"); 1732 chip->reset_workaround_2 = 1; 1733 } 1734 1735 if ((err = snd_nm256_pcm(chip, 0)) < 0 || 1736 (err = snd_nm256_mixer(chip)) < 0) { 1737 snd_card_free(card); 1738 return err; 1739 } 1740 1741 sprintf(card->shortname, "NeoMagic %s", card->driver); 1742 sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d", 1743 card->shortname, 1744 chip->buffer_addr, chip->cport_addr, chip->irq); 1745 1746 if ((err = snd_card_register(card)) < 0) { 1747 snd_card_free(card); 1748 return err; 1749 } 1750 1751 pci_set_drvdata(pci, card); 1752 return 0; 1753 } 1754 1755 static void snd_nm256_remove(struct pci_dev *pci) 1756 { 1757 snd_card_free(pci_get_drvdata(pci)); 1758 } 1759 1760 1761 static struct pci_driver nm256_driver = { 1762 .name = KBUILD_MODNAME, 1763 .id_table = snd_nm256_ids, 1764 .probe = snd_nm256_probe, 1765 .remove = snd_nm256_remove, 1766 .driver = { 1767 .pm = NM256_PM_OPS, 1768 }, 1769 }; 1770 1771 module_pci_driver(nm256_driver); 1772