xref: /openbmc/linux/sound/pci/nm256/nm256.c (revision c4f7ac64)
1  // SPDX-License-Identifier: GPL-2.0-or-later
2  /*
3   * Driver for NeoMagic 256AV and 256ZX chipsets.
4   * Copyright (c) 2000 by Takashi Iwai <tiwai@suse.de>
5   *
6   * Based on nm256_audio.c OSS driver in linux kernel.
7   * The original author of OSS nm256 driver wishes to remain anonymous,
8   * so I just put my acknoledgment to him/her here.
9   * The original author's web page is found at
10   *	http://www.uglx.org/sony.html
11   */
12  
13  #include <linux/io.h>
14  #include <linux/delay.h>
15  #include <linux/interrupt.h>
16  #include <linux/init.h>
17  #include <linux/pci.h>
18  #include <linux/slab.h>
19  #include <linux/module.h>
20  #include <linux/mutex.h>
21  
22  #include <sound/core.h>
23  #include <sound/info.h>
24  #include <sound/control.h>
25  #include <sound/pcm.h>
26  #include <sound/ac97_codec.h>
27  #include <sound/initval.h>
28  
29  #define CARD_NAME "NeoMagic 256AV/ZX"
30  #define DRIVER_NAME "NM256"
31  
32  MODULE_AUTHOR("Takashi Iwai <tiwai@suse.de>");
33  MODULE_DESCRIPTION("NeoMagic NM256AV/ZX");
34  MODULE_LICENSE("GPL");
35  
36  /*
37   * some compile conditions.
38   */
39  
40  static int index = SNDRV_DEFAULT_IDX1;	/* Index */
41  static char *id = SNDRV_DEFAULT_STR1;	/* ID for this card */
42  static int playback_bufsize = 16;
43  static int capture_bufsize = 16;
44  static bool force_ac97;			/* disabled as default */
45  static int buffer_top;			/* not specified */
46  static bool use_cache;			/* disabled */
47  static bool vaio_hack;			/* disabled */
48  static bool reset_workaround;
49  static bool reset_workaround_2;
50  
51  module_param(index, int, 0444);
52  MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
53  module_param(id, charp, 0444);
54  MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
55  module_param(playback_bufsize, int, 0444);
56  MODULE_PARM_DESC(playback_bufsize, "DAC frame size in kB for " CARD_NAME " soundcard.");
57  module_param(capture_bufsize, int, 0444);
58  MODULE_PARM_DESC(capture_bufsize, "ADC frame size in kB for " CARD_NAME " soundcard.");
59  module_param(force_ac97, bool, 0444);
60  MODULE_PARM_DESC(force_ac97, "Force to use AC97 codec for " CARD_NAME " soundcard.");
61  module_param(buffer_top, int, 0444);
62  MODULE_PARM_DESC(buffer_top, "Set the top address of audio buffer for " CARD_NAME " soundcard.");
63  module_param(use_cache, bool, 0444);
64  MODULE_PARM_DESC(use_cache, "Enable the cache for coefficient table access.");
65  module_param(vaio_hack, bool, 0444);
66  MODULE_PARM_DESC(vaio_hack, "Enable workaround for Sony VAIO notebooks.");
67  module_param(reset_workaround, bool, 0444);
68  MODULE_PARM_DESC(reset_workaround, "Enable AC97 RESET workaround for some laptops.");
69  module_param(reset_workaround_2, bool, 0444);
70  MODULE_PARM_DESC(reset_workaround_2, "Enable extended AC97 RESET workaround for some other laptops.");
71  
72  /* just for backward compatibility */
73  static bool enable;
74  module_param(enable, bool, 0444);
75  
76  
77  
78  /*
79   * hw definitions
80   */
81  
82  /* The BIOS signature. */
83  #define NM_SIGNATURE 0x4e4d0000
84  /* Signature mask. */
85  #define NM_SIG_MASK 0xffff0000
86  
87  /* Size of the second memory area. */
88  #define NM_PORT2_SIZE 4096
89  
90  /* The base offset of the mixer in the second memory area. */
91  #define NM_MIXER_OFFSET 0x600
92  
93  /* The maximum size of a coefficient entry. */
94  #define NM_MAX_PLAYBACK_COEF_SIZE	0x5000
95  #define NM_MAX_RECORD_COEF_SIZE		0x1260
96  
97  /* The interrupt register. */
98  #define NM_INT_REG 0xa04
99  /* And its bits. */
100  #define NM_PLAYBACK_INT 0x40
101  #define NM_RECORD_INT 0x100
102  #define NM_MISC_INT_1 0x4000
103  #define NM_MISC_INT_2 0x1
104  #define NM_ACK_INT(chip, X) snd_nm256_writew(chip, NM_INT_REG, (X) << 1)
105  
106  /* The AV's "mixer ready" status bit and location. */
107  #define NM_MIXER_STATUS_OFFSET 0xa04
108  #define NM_MIXER_READY_MASK 0x0800
109  #define NM_MIXER_PRESENCE 0xa06
110  #define NM_PRESENCE_MASK 0x0050
111  #define NM_PRESENCE_VALUE 0x0040
112  
113  /*
114   * For the ZX.  It uses the same interrupt register, but it holds 32
115   * bits instead of 16.
116   */
117  #define NM2_PLAYBACK_INT 0x10000
118  #define NM2_RECORD_INT 0x80000
119  #define NM2_MISC_INT_1 0x8
120  #define NM2_MISC_INT_2 0x2
121  #define NM2_ACK_INT(chip, X) snd_nm256_writel(chip, NM_INT_REG, (X))
122  
123  /* The ZX's "mixer ready" status bit and location. */
124  #define NM2_MIXER_STATUS_OFFSET 0xa06
125  #define NM2_MIXER_READY_MASK 0x0800
126  
127  /* The playback registers start from here. */
128  #define NM_PLAYBACK_REG_OFFSET 0x0
129  /* The record registers start from here. */
130  #define NM_RECORD_REG_OFFSET 0x200
131  
132  /* The rate register is located 2 bytes from the start of the register area. */
133  #define NM_RATE_REG_OFFSET 2
134  
135  /* Mono/stereo flag, number of bits on playback, and rate mask. */
136  #define NM_RATE_STEREO 1
137  #define NM_RATE_BITS_16 2
138  #define NM_RATE_MASK 0xf0
139  
140  /* Playback enable register. */
141  #define NM_PLAYBACK_ENABLE_REG (NM_PLAYBACK_REG_OFFSET + 0x1)
142  #define NM_PLAYBACK_ENABLE_FLAG 1
143  #define NM_PLAYBACK_ONESHOT 2
144  #define NM_PLAYBACK_FREERUN 4
145  
146  /* Mutes the audio output. */
147  #define NM_AUDIO_MUTE_REG (NM_PLAYBACK_REG_OFFSET + 0x18)
148  #define NM_AUDIO_MUTE_LEFT 0x8000
149  #define NM_AUDIO_MUTE_RIGHT 0x0080
150  
151  /* Recording enable register. */
152  #define NM_RECORD_ENABLE_REG (NM_RECORD_REG_OFFSET + 0)
153  #define NM_RECORD_ENABLE_FLAG 1
154  #define NM_RECORD_FREERUN 2
155  
156  /* coefficient buffer pointer */
157  #define NM_COEFF_START_OFFSET	0x1c
158  #define NM_COEFF_END_OFFSET	0x20
159  
160  /* DMA buffer offsets */
161  #define NM_RBUFFER_START (NM_RECORD_REG_OFFSET + 0x4)
162  #define NM_RBUFFER_END   (NM_RECORD_REG_OFFSET + 0x10)
163  #define NM_RBUFFER_WMARK (NM_RECORD_REG_OFFSET + 0xc)
164  #define NM_RBUFFER_CURRP (NM_RECORD_REG_OFFSET + 0x8)
165  
166  #define NM_PBUFFER_START (NM_PLAYBACK_REG_OFFSET + 0x4)
167  #define NM_PBUFFER_END   (NM_PLAYBACK_REG_OFFSET + 0x14)
168  #define NM_PBUFFER_WMARK (NM_PLAYBACK_REG_OFFSET + 0xc)
169  #define NM_PBUFFER_CURRP (NM_PLAYBACK_REG_OFFSET + 0x8)
170  
171  struct nm256_stream {
172  
173  	struct nm256 *chip;
174  	struct snd_pcm_substream *substream;
175  	int running;
176  	int suspended;
177  
178  	u32 buf;	/* offset from chip->buffer */
179  	int bufsize;	/* buffer size in bytes */
180  	void __iomem *bufptr;		/* mapped pointer */
181  	unsigned long bufptr_addr;	/* physical address of the mapped pointer */
182  
183  	int dma_size;		/* buffer size of the substream in bytes */
184  	int period_size;	/* period size in bytes */
185  	int periods;		/* # of periods */
186  	int shift;		/* bit shifts */
187  	int cur_period;		/* current period # */
188  
189  };
190  
191  struct nm256 {
192  
193  	struct snd_card *card;
194  
195  	void __iomem *cport;		/* control port */
196  	struct resource *res_cport;	/* its resource */
197  	unsigned long cport_addr;	/* physical address */
198  
199  	void __iomem *buffer;		/* buffer */
200  	struct resource *res_buffer;	/* its resource */
201  	unsigned long buffer_addr;	/* buffer phyiscal address */
202  
203  	u32 buffer_start;		/* start offset from pci resource 0 */
204  	u32 buffer_end;			/* end offset */
205  	u32 buffer_size;		/* total buffer size */
206  
207  	u32 all_coeff_buf;		/* coefficient buffer */
208  	u32 coeff_buf[2];		/* coefficient buffer for each stream */
209  
210  	unsigned int coeffs_current: 1;	/* coeff. table is loaded? */
211  	unsigned int use_cache: 1;	/* use one big coef. table */
212  	unsigned int reset_workaround: 1; /* Workaround for some laptops to avoid freeze */
213  	unsigned int reset_workaround_2: 1; /* Extended workaround for some other laptops to avoid freeze */
214  	unsigned int in_resume: 1;
215  
216  	int mixer_base;			/* register offset of ac97 mixer */
217  	int mixer_status_offset;	/* offset of mixer status reg. */
218  	int mixer_status_mask;		/* bit mask to test the mixer status */
219  
220  	int irq;
221  	int irq_acks;
222  	irq_handler_t interrupt;
223  	int badintrcount;		/* counter to check bogus interrupts */
224  	struct mutex irq_mutex;
225  
226  	struct nm256_stream streams[2];
227  
228  	struct snd_ac97 *ac97;
229  	unsigned short *ac97_regs; /* register caches, only for valid regs */
230  
231  	struct snd_pcm *pcm;
232  
233  	struct pci_dev *pci;
234  
235  	spinlock_t reg_lock;
236  
237  };
238  
239  
240  /*
241   * include coefficient table
242   */
243  #include "nm256_coef.c"
244  
245  
246  /*
247   * PCI ids
248   */
249  static const struct pci_device_id snd_nm256_ids[] = {
250  	{PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO), 0},
251  	{PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO), 0},
252  	{PCI_VDEVICE(NEOMAGIC, PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO), 0},
253  	{0,},
254  };
255  
256  MODULE_DEVICE_TABLE(pci, snd_nm256_ids);
257  
258  
259  /*
260   * lowlvel stuffs
261   */
262  
263  static inline u8
264  snd_nm256_readb(struct nm256 *chip, int offset)
265  {
266  	return readb(chip->cport + offset);
267  }
268  
269  static inline u16
270  snd_nm256_readw(struct nm256 *chip, int offset)
271  {
272  	return readw(chip->cport + offset);
273  }
274  
275  static inline u32
276  snd_nm256_readl(struct nm256 *chip, int offset)
277  {
278  	return readl(chip->cport + offset);
279  }
280  
281  static inline void
282  snd_nm256_writeb(struct nm256 *chip, int offset, u8 val)
283  {
284  	writeb(val, chip->cport + offset);
285  }
286  
287  static inline void
288  snd_nm256_writew(struct nm256 *chip, int offset, u16 val)
289  {
290  	writew(val, chip->cport + offset);
291  }
292  
293  static inline void
294  snd_nm256_writel(struct nm256 *chip, int offset, u32 val)
295  {
296  	writel(val, chip->cport + offset);
297  }
298  
299  static inline void
300  snd_nm256_write_buffer(struct nm256 *chip, const void *src, int offset, int size)
301  {
302  	offset -= chip->buffer_start;
303  #ifdef CONFIG_SND_DEBUG
304  	if (offset < 0 || offset >= chip->buffer_size) {
305  		dev_err(chip->card->dev,
306  			"write_buffer invalid offset = %d size = %d\n",
307  			   offset, size);
308  		return;
309  	}
310  #endif
311  	memcpy_toio(chip->buffer + offset, src, size);
312  }
313  
314  /*
315   * coefficient handlers -- what a magic!
316   */
317  
318  static u16
319  snd_nm256_get_start_offset(int which)
320  {
321  	u16 offset = 0;
322  	while (which-- > 0)
323  		offset += coefficient_sizes[which];
324  	return offset;
325  }
326  
327  static void
328  snd_nm256_load_one_coefficient(struct nm256 *chip, int stream, u32 port, int which)
329  {
330  	u32 coeff_buf = chip->coeff_buf[stream];
331  	u16 offset = snd_nm256_get_start_offset(which);
332  	u16 size = coefficient_sizes[which];
333  
334  	snd_nm256_write_buffer(chip, coefficients + offset, coeff_buf, size);
335  	snd_nm256_writel(chip, port, coeff_buf);
336  	/* ???  Record seems to behave differently than playback.  */
337  	if (stream == SNDRV_PCM_STREAM_PLAYBACK)
338  		size--;
339  	snd_nm256_writel(chip, port + 4, coeff_buf + size);
340  }
341  
342  static void
343  snd_nm256_load_coefficient(struct nm256 *chip, int stream, int number)
344  {
345  	/* The enable register for the specified engine.  */
346  	u32 poffset = (stream == SNDRV_PCM_STREAM_CAPTURE ?
347  		       NM_RECORD_ENABLE_REG : NM_PLAYBACK_ENABLE_REG);
348  	u32 addr = NM_COEFF_START_OFFSET;
349  
350  	addr += (stream == SNDRV_PCM_STREAM_CAPTURE ?
351  		 NM_RECORD_REG_OFFSET : NM_PLAYBACK_REG_OFFSET);
352  
353  	if (snd_nm256_readb(chip, poffset) & 1) {
354  		dev_dbg(chip->card->dev,
355  			"NM256: Engine was enabled while loading coefficients!\n");
356  		return;
357  	}
358  
359  	/* The recording engine uses coefficient values 8-15.  */
360  	number &= 7;
361  	if (stream == SNDRV_PCM_STREAM_CAPTURE)
362  		number += 8;
363  
364  	if (! chip->use_cache) {
365  		snd_nm256_load_one_coefficient(chip, stream, addr, number);
366  		return;
367  	}
368  	if (! chip->coeffs_current) {
369  		snd_nm256_write_buffer(chip, coefficients, chip->all_coeff_buf,
370  				       NM_TOTAL_COEFF_COUNT * 4);
371  		chip->coeffs_current = 1;
372  	} else {
373  		u32 base = chip->all_coeff_buf;
374  		u32 offset = snd_nm256_get_start_offset(number);
375  		u32 end_offset = offset + coefficient_sizes[number];
376  		snd_nm256_writel(chip, addr, base + offset);
377  		if (stream == SNDRV_PCM_STREAM_PLAYBACK)
378  			end_offset--;
379  		snd_nm256_writel(chip, addr + 4, base + end_offset);
380  	}
381  }
382  
383  
384  /* The actual rates supported by the card. */
385  static const unsigned int samplerates[8] = {
386  	8000, 11025, 16000, 22050, 24000, 32000, 44100, 48000,
387  };
388  static const struct snd_pcm_hw_constraint_list constraints_rates = {
389  	.count = ARRAY_SIZE(samplerates),
390  	.list = samplerates,
391  	.mask = 0,
392  };
393  
394  /*
395   * return the index of the target rate
396   */
397  static int
398  snd_nm256_fixed_rate(unsigned int rate)
399  {
400  	unsigned int i;
401  	for (i = 0; i < ARRAY_SIZE(samplerates); i++) {
402  		if (rate == samplerates[i])
403  			return i;
404  	}
405  	snd_BUG();
406  	return 0;
407  }
408  
409  /*
410   * set sample rate and format
411   */
412  static void
413  snd_nm256_set_format(struct nm256 *chip, struct nm256_stream *s,
414  		     struct snd_pcm_substream *substream)
415  {
416  	struct snd_pcm_runtime *runtime = substream->runtime;
417  	int rate_index = snd_nm256_fixed_rate(runtime->rate);
418  	unsigned char ratebits = (rate_index << 4) & NM_RATE_MASK;
419  
420  	s->shift = 0;
421  	if (snd_pcm_format_width(runtime->format) == 16) {
422  		ratebits |= NM_RATE_BITS_16;
423  		s->shift++;
424  	}
425  	if (runtime->channels > 1) {
426  		ratebits |= NM_RATE_STEREO;
427  		s->shift++;
428  	}
429  
430  	runtime->rate = samplerates[rate_index];
431  
432  	switch (substream->stream) {
433  	case SNDRV_PCM_STREAM_PLAYBACK:
434  		snd_nm256_load_coefficient(chip, 0, rate_index); /* 0 = playback */
435  		snd_nm256_writeb(chip,
436  				 NM_PLAYBACK_REG_OFFSET + NM_RATE_REG_OFFSET,
437  				 ratebits);
438  		break;
439  	case SNDRV_PCM_STREAM_CAPTURE:
440  		snd_nm256_load_coefficient(chip, 1, rate_index); /* 1 = record */
441  		snd_nm256_writeb(chip,
442  				 NM_RECORD_REG_OFFSET + NM_RATE_REG_OFFSET,
443  				 ratebits);
444  		break;
445  	}
446  }
447  
448  /* acquire interrupt */
449  static int snd_nm256_acquire_irq(struct nm256 *chip)
450  {
451  	mutex_lock(&chip->irq_mutex);
452  	if (chip->irq < 0) {
453  		if (request_irq(chip->pci->irq, chip->interrupt, IRQF_SHARED,
454  				KBUILD_MODNAME, chip)) {
455  			dev_err(chip->card->dev,
456  				"unable to grab IRQ %d\n", chip->pci->irq);
457  			mutex_unlock(&chip->irq_mutex);
458  			return -EBUSY;
459  		}
460  		chip->irq = chip->pci->irq;
461  		chip->card->sync_irq = chip->irq;
462  	}
463  	chip->irq_acks++;
464  	mutex_unlock(&chip->irq_mutex);
465  	return 0;
466  }
467  
468  /* release interrupt */
469  static void snd_nm256_release_irq(struct nm256 *chip)
470  {
471  	mutex_lock(&chip->irq_mutex);
472  	if (chip->irq_acks > 0)
473  		chip->irq_acks--;
474  	if (chip->irq_acks == 0 && chip->irq >= 0) {
475  		free_irq(chip->irq, chip);
476  		chip->irq = -1;
477  		chip->card->sync_irq = -1;
478  	}
479  	mutex_unlock(&chip->irq_mutex);
480  }
481  
482  /*
483   * start / stop
484   */
485  
486  /* update the watermark (current period) */
487  static void snd_nm256_pcm_mark(struct nm256 *chip, struct nm256_stream *s, int reg)
488  {
489  	s->cur_period++;
490  	s->cur_period %= s->periods;
491  	snd_nm256_writel(chip, reg, s->buf + s->cur_period * s->period_size);
492  }
493  
494  #define snd_nm256_playback_mark(chip, s) snd_nm256_pcm_mark(chip, s, NM_PBUFFER_WMARK)
495  #define snd_nm256_capture_mark(chip, s)  snd_nm256_pcm_mark(chip, s, NM_RBUFFER_WMARK)
496  
497  static void
498  snd_nm256_playback_start(struct nm256 *chip, struct nm256_stream *s,
499  			 struct snd_pcm_substream *substream)
500  {
501  	/* program buffer pointers */
502  	snd_nm256_writel(chip, NM_PBUFFER_START, s->buf);
503  	snd_nm256_writel(chip, NM_PBUFFER_END, s->buf + s->dma_size - (1 << s->shift));
504  	snd_nm256_writel(chip, NM_PBUFFER_CURRP, s->buf);
505  	snd_nm256_playback_mark(chip, s);
506  
507  	/* Enable playback engine and interrupts. */
508  	snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG,
509  			 NM_PLAYBACK_ENABLE_FLAG | NM_PLAYBACK_FREERUN);
510  	/* Enable both channels. */
511  	snd_nm256_writew(chip, NM_AUDIO_MUTE_REG, 0x0);
512  }
513  
514  static void
515  snd_nm256_capture_start(struct nm256 *chip, struct nm256_stream *s,
516  			struct snd_pcm_substream *substream)
517  {
518  	/* program buffer pointers */
519  	snd_nm256_writel(chip, NM_RBUFFER_START, s->buf);
520  	snd_nm256_writel(chip, NM_RBUFFER_END, s->buf + s->dma_size);
521  	snd_nm256_writel(chip, NM_RBUFFER_CURRP, s->buf);
522  	snd_nm256_capture_mark(chip, s);
523  
524  	/* Enable playback engine and interrupts. */
525  	snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG,
526  			 NM_RECORD_ENABLE_FLAG | NM_RECORD_FREERUN);
527  }
528  
529  /* Stop the play engine. */
530  static void
531  snd_nm256_playback_stop(struct nm256 *chip)
532  {
533  	/* Shut off sound from both channels. */
534  	snd_nm256_writew(chip, NM_AUDIO_MUTE_REG,
535  			 NM_AUDIO_MUTE_LEFT | NM_AUDIO_MUTE_RIGHT);
536  	/* Disable play engine. */
537  	snd_nm256_writeb(chip, NM_PLAYBACK_ENABLE_REG, 0);
538  }
539  
540  static void
541  snd_nm256_capture_stop(struct nm256 *chip)
542  {
543  	/* Disable recording engine. */
544  	snd_nm256_writeb(chip, NM_RECORD_ENABLE_REG, 0);
545  }
546  
547  static int
548  snd_nm256_playback_trigger(struct snd_pcm_substream *substream, int cmd)
549  {
550  	struct nm256 *chip = snd_pcm_substream_chip(substream);
551  	struct nm256_stream *s = substream->runtime->private_data;
552  	int err = 0;
553  
554  	if (snd_BUG_ON(!s))
555  		return -ENXIO;
556  
557  	spin_lock(&chip->reg_lock);
558  	switch (cmd) {
559  	case SNDRV_PCM_TRIGGER_RESUME:
560  		s->suspended = 0;
561  		fallthrough;
562  	case SNDRV_PCM_TRIGGER_START:
563  		if (! s->running) {
564  			snd_nm256_playback_start(chip, s, substream);
565  			s->running = 1;
566  		}
567  		break;
568  	case SNDRV_PCM_TRIGGER_SUSPEND:
569  		s->suspended = 1;
570  		fallthrough;
571  	case SNDRV_PCM_TRIGGER_STOP:
572  		if (s->running) {
573  			snd_nm256_playback_stop(chip);
574  			s->running = 0;
575  		}
576  		break;
577  	default:
578  		err = -EINVAL;
579  		break;
580  	}
581  	spin_unlock(&chip->reg_lock);
582  	return err;
583  }
584  
585  static int
586  snd_nm256_capture_trigger(struct snd_pcm_substream *substream, int cmd)
587  {
588  	struct nm256 *chip = snd_pcm_substream_chip(substream);
589  	struct nm256_stream *s = substream->runtime->private_data;
590  	int err = 0;
591  
592  	if (snd_BUG_ON(!s))
593  		return -ENXIO;
594  
595  	spin_lock(&chip->reg_lock);
596  	switch (cmd) {
597  	case SNDRV_PCM_TRIGGER_START:
598  	case SNDRV_PCM_TRIGGER_RESUME:
599  		if (! s->running) {
600  			snd_nm256_capture_start(chip, s, substream);
601  			s->running = 1;
602  		}
603  		break;
604  	case SNDRV_PCM_TRIGGER_STOP:
605  	case SNDRV_PCM_TRIGGER_SUSPEND:
606  		if (s->running) {
607  			snd_nm256_capture_stop(chip);
608  			s->running = 0;
609  		}
610  		break;
611  	default:
612  		err = -EINVAL;
613  		break;
614  	}
615  	spin_unlock(&chip->reg_lock);
616  	return err;
617  }
618  
619  
620  /*
621   * prepare playback/capture channel
622   */
623  static int snd_nm256_pcm_prepare(struct snd_pcm_substream *substream)
624  {
625  	struct nm256 *chip = snd_pcm_substream_chip(substream);
626  	struct snd_pcm_runtime *runtime = substream->runtime;
627  	struct nm256_stream *s = runtime->private_data;
628  
629  	if (snd_BUG_ON(!s))
630  		return -ENXIO;
631  	s->dma_size = frames_to_bytes(runtime, substream->runtime->buffer_size);
632  	s->period_size = frames_to_bytes(runtime, substream->runtime->period_size);
633  	s->periods = substream->runtime->periods;
634  	s->cur_period = 0;
635  
636  	spin_lock_irq(&chip->reg_lock);
637  	s->running = 0;
638  	snd_nm256_set_format(chip, s, substream);
639  	spin_unlock_irq(&chip->reg_lock);
640  
641  	return 0;
642  }
643  
644  
645  /*
646   * get the current pointer
647   */
648  static snd_pcm_uframes_t
649  snd_nm256_playback_pointer(struct snd_pcm_substream *substream)
650  {
651  	struct nm256 *chip = snd_pcm_substream_chip(substream);
652  	struct nm256_stream *s = substream->runtime->private_data;
653  	unsigned long curp;
654  
655  	if (snd_BUG_ON(!s))
656  		return 0;
657  	curp = snd_nm256_readl(chip, NM_PBUFFER_CURRP) - (unsigned long)s->buf;
658  	curp %= s->dma_size;
659  	return bytes_to_frames(substream->runtime, curp);
660  }
661  
662  static snd_pcm_uframes_t
663  snd_nm256_capture_pointer(struct snd_pcm_substream *substream)
664  {
665  	struct nm256 *chip = snd_pcm_substream_chip(substream);
666  	struct nm256_stream *s = substream->runtime->private_data;
667  	unsigned long curp;
668  
669  	if (snd_BUG_ON(!s))
670  		return 0;
671  	curp = snd_nm256_readl(chip, NM_RBUFFER_CURRP) - (unsigned long)s->buf;
672  	curp %= s->dma_size;
673  	return bytes_to_frames(substream->runtime, curp);
674  }
675  
676  /* Remapped I/O space can be accessible as pointer on i386 */
677  /* This might be changed in the future */
678  #ifndef __i386__
679  /*
680   * silence / copy for playback
681   */
682  static int
683  snd_nm256_playback_silence(struct snd_pcm_substream *substream,
684  			   int channel, unsigned long pos, unsigned long count)
685  {
686  	struct snd_pcm_runtime *runtime = substream->runtime;
687  	struct nm256_stream *s = runtime->private_data;
688  
689  	memset_io(s->bufptr + pos, 0, count);
690  	return 0;
691  }
692  
693  static int
694  snd_nm256_playback_copy(struct snd_pcm_substream *substream,
695  			int channel, unsigned long pos,
696  			void __user *src, unsigned long count)
697  {
698  	struct snd_pcm_runtime *runtime = substream->runtime;
699  	struct nm256_stream *s = runtime->private_data;
700  
701  	if (copy_from_user_toio(s->bufptr + pos, src, count))
702  		return -EFAULT;
703  	return 0;
704  }
705  
706  static int
707  snd_nm256_playback_copy_kernel(struct snd_pcm_substream *substream,
708  			       int channel, unsigned long pos,
709  			       void *src, unsigned long count)
710  {
711  	struct snd_pcm_runtime *runtime = substream->runtime;
712  	struct nm256_stream *s = runtime->private_data;
713  
714  	memcpy_toio(s->bufptr + pos, src, count);
715  	return 0;
716  }
717  
718  /*
719   * copy to user
720   */
721  static int
722  snd_nm256_capture_copy(struct snd_pcm_substream *substream,
723  		       int channel, unsigned long pos,
724  		       void __user *dst, unsigned long count)
725  {
726  	struct snd_pcm_runtime *runtime = substream->runtime;
727  	struct nm256_stream *s = runtime->private_data;
728  
729  	if (copy_to_user_fromio(dst, s->bufptr + pos, count))
730  		return -EFAULT;
731  	return 0;
732  }
733  
734  static int
735  snd_nm256_capture_copy_kernel(struct snd_pcm_substream *substream,
736  			      int channel, unsigned long pos,
737  			      void *dst, unsigned long count)
738  {
739  	struct snd_pcm_runtime *runtime = substream->runtime;
740  	struct nm256_stream *s = runtime->private_data;
741  
742  	memcpy_fromio(dst, s->bufptr + pos, count);
743  	return 0;
744  }
745  
746  #endif /* !__i386__ */
747  
748  
749  /*
750   * update playback/capture watermarks
751   */
752  
753  /* spinlock held! */
754  static void
755  snd_nm256_playback_update(struct nm256 *chip)
756  {
757  	struct nm256_stream *s;
758  
759  	s = &chip->streams[SNDRV_PCM_STREAM_PLAYBACK];
760  	if (s->running && s->substream) {
761  		spin_unlock(&chip->reg_lock);
762  		snd_pcm_period_elapsed(s->substream);
763  		spin_lock(&chip->reg_lock);
764  		snd_nm256_playback_mark(chip, s);
765  	}
766  }
767  
768  /* spinlock held! */
769  static void
770  snd_nm256_capture_update(struct nm256 *chip)
771  {
772  	struct nm256_stream *s;
773  
774  	s = &chip->streams[SNDRV_PCM_STREAM_CAPTURE];
775  	if (s->running && s->substream) {
776  		spin_unlock(&chip->reg_lock);
777  		snd_pcm_period_elapsed(s->substream);
778  		spin_lock(&chip->reg_lock);
779  		snd_nm256_capture_mark(chip, s);
780  	}
781  }
782  
783  /*
784   * hardware info
785   */
786  static const struct snd_pcm_hardware snd_nm256_playback =
787  {
788  	.info =			SNDRV_PCM_INFO_MMAP_IOMEM |SNDRV_PCM_INFO_MMAP_VALID |
789  				SNDRV_PCM_INFO_INTERLEAVED |
790  				/*SNDRV_PCM_INFO_PAUSE |*/
791  				SNDRV_PCM_INFO_RESUME,
792  	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
793  	.rates =		SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
794  	.rate_min =		8000,
795  	.rate_max =		48000,
796  	.channels_min =		1,
797  	.channels_max =		2,
798  	.periods_min =		2,
799  	.periods_max =		1024,
800  	.buffer_bytes_max =	128 * 1024,
801  	.period_bytes_min =	256,
802  	.period_bytes_max =	128 * 1024,
803  };
804  
805  static const struct snd_pcm_hardware snd_nm256_capture =
806  {
807  	.info =			SNDRV_PCM_INFO_MMAP_IOMEM | SNDRV_PCM_INFO_MMAP_VALID |
808  				SNDRV_PCM_INFO_INTERLEAVED |
809  				/*SNDRV_PCM_INFO_PAUSE |*/
810  				SNDRV_PCM_INFO_RESUME,
811  	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
812  	.rates =		SNDRV_PCM_RATE_KNOT/*24k*/ | SNDRV_PCM_RATE_8000_48000,
813  	.rate_min =		8000,
814  	.rate_max =		48000,
815  	.channels_min =		1,
816  	.channels_max =		2,
817  	.periods_min =		2,
818  	.periods_max =		1024,
819  	.buffer_bytes_max =	128 * 1024,
820  	.period_bytes_min =	256,
821  	.period_bytes_max =	128 * 1024,
822  };
823  
824  
825  /* set dma transfer size */
826  static int snd_nm256_pcm_hw_params(struct snd_pcm_substream *substream,
827  				   struct snd_pcm_hw_params *hw_params)
828  {
829  	/* area and addr are already set and unchanged */
830  	substream->runtime->dma_bytes = params_buffer_bytes(hw_params);
831  	return 0;
832  }
833  
834  /*
835   * open
836   */
837  static void snd_nm256_setup_stream(struct nm256 *chip, struct nm256_stream *s,
838  				   struct snd_pcm_substream *substream,
839  				   const struct snd_pcm_hardware *hw_ptr)
840  {
841  	struct snd_pcm_runtime *runtime = substream->runtime;
842  
843  	s->running = 0;
844  	runtime->hw = *hw_ptr;
845  	runtime->hw.buffer_bytes_max = s->bufsize;
846  	runtime->hw.period_bytes_max = s->bufsize / 2;
847  	runtime->dma_area = (void __force *) s->bufptr;
848  	runtime->dma_addr = s->bufptr_addr;
849  	runtime->dma_bytes = s->bufsize;
850  	runtime->private_data = s;
851  	s->substream = substream;
852  
853  	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
854  				   &constraints_rates);
855  }
856  
857  static int
858  snd_nm256_playback_open(struct snd_pcm_substream *substream)
859  {
860  	struct nm256 *chip = snd_pcm_substream_chip(substream);
861  
862  	if (snd_nm256_acquire_irq(chip) < 0)
863  		return -EBUSY;
864  	snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_PLAYBACK],
865  			       substream, &snd_nm256_playback);
866  	return 0;
867  }
868  
869  static int
870  snd_nm256_capture_open(struct snd_pcm_substream *substream)
871  {
872  	struct nm256 *chip = snd_pcm_substream_chip(substream);
873  
874  	if (snd_nm256_acquire_irq(chip) < 0)
875  		return -EBUSY;
876  	snd_nm256_setup_stream(chip, &chip->streams[SNDRV_PCM_STREAM_CAPTURE],
877  			       substream, &snd_nm256_capture);
878  	return 0;
879  }
880  
881  /*
882   * close - we don't have to do special..
883   */
884  static int
885  snd_nm256_playback_close(struct snd_pcm_substream *substream)
886  {
887  	struct nm256 *chip = snd_pcm_substream_chip(substream);
888  
889  	snd_nm256_release_irq(chip);
890  	return 0;
891  }
892  
893  
894  static int
895  snd_nm256_capture_close(struct snd_pcm_substream *substream)
896  {
897  	struct nm256 *chip = snd_pcm_substream_chip(substream);
898  
899  	snd_nm256_release_irq(chip);
900  	return 0;
901  }
902  
903  /*
904   * create a pcm instance
905   */
906  static const struct snd_pcm_ops snd_nm256_playback_ops = {
907  	.open =		snd_nm256_playback_open,
908  	.close =	snd_nm256_playback_close,
909  	.hw_params =	snd_nm256_pcm_hw_params,
910  	.prepare =	snd_nm256_pcm_prepare,
911  	.trigger =	snd_nm256_playback_trigger,
912  	.pointer =	snd_nm256_playback_pointer,
913  #ifndef __i386__
914  	.copy_user =	snd_nm256_playback_copy,
915  	.copy_kernel =	snd_nm256_playback_copy_kernel,
916  	.fill_silence =	snd_nm256_playback_silence,
917  #endif
918  	.mmap =		snd_pcm_lib_mmap_iomem,
919  };
920  
921  static const struct snd_pcm_ops snd_nm256_capture_ops = {
922  	.open =		snd_nm256_capture_open,
923  	.close =	snd_nm256_capture_close,
924  	.hw_params =	snd_nm256_pcm_hw_params,
925  	.prepare =	snd_nm256_pcm_prepare,
926  	.trigger =	snd_nm256_capture_trigger,
927  	.pointer =	snd_nm256_capture_pointer,
928  #ifndef __i386__
929  	.copy_user =	snd_nm256_capture_copy,
930  	.copy_kernel =	snd_nm256_capture_copy_kernel,
931  #endif
932  	.mmap =		snd_pcm_lib_mmap_iomem,
933  };
934  
935  static int
936  snd_nm256_pcm(struct nm256 *chip, int device)
937  {
938  	struct snd_pcm *pcm;
939  	int i, err;
940  
941  	for (i = 0; i < 2; i++) {
942  		struct nm256_stream *s = &chip->streams[i];
943  		s->bufptr = chip->buffer + (s->buf - chip->buffer_start);
944  		s->bufptr_addr = chip->buffer_addr + (s->buf - chip->buffer_start);
945  	}
946  
947  	err = snd_pcm_new(chip->card, chip->card->driver, device,
948  			  1, 1, &pcm);
949  	if (err < 0)
950  		return err;
951  
952  	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_nm256_playback_ops);
953  	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_nm256_capture_ops);
954  
955  	pcm->private_data = chip;
956  	pcm->info_flags = 0;
957  	chip->pcm = pcm;
958  
959  	return 0;
960  }
961  
962  
963  /*
964   * Initialize the hardware.
965   */
966  static void
967  snd_nm256_init_chip(struct nm256 *chip)
968  {
969  	/* Reset everything. */
970  	snd_nm256_writeb(chip, 0x0, 0x11);
971  	snd_nm256_writew(chip, 0x214, 0);
972  	/* stop sounds.. */
973  	//snd_nm256_playback_stop(chip);
974  	//snd_nm256_capture_stop(chip);
975  }
976  
977  
978  static irqreturn_t
979  snd_nm256_intr_check(struct nm256 *chip)
980  {
981  	if (chip->badintrcount++ > 1000) {
982  		/*
983  		 * I'm not sure if the best thing is to stop the card from
984  		 * playing or just release the interrupt (after all, we're in
985  		 * a bad situation, so doing fancy stuff may not be such a good
986  		 * idea).
987  		 *
988  		 * I worry about the card engine continuing to play noise
989  		 * over and over, however--that could become a very
990  		 * obnoxious problem.  And we know that when this usually
991  		 * happens things are fairly safe, it just means the user's
992  		 * inserted a PCMCIA card and someone's spamming us with IRQ 9s.
993  		 */
994  		if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
995  			snd_nm256_playback_stop(chip);
996  		if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
997  			snd_nm256_capture_stop(chip);
998  		chip->badintrcount = 0;
999  		return IRQ_HANDLED;
1000  	}
1001  	return IRQ_NONE;
1002  }
1003  
1004  /*
1005   * Handle a potential interrupt for the device referred to by DEV_ID.
1006   *
1007   * I don't like the cut-n-paste job here either between the two routines,
1008   * but there are sufficient differences between the two interrupt handlers
1009   * that parameterizing it isn't all that great either.  (Could use a macro,
1010   * I suppose...yucky bleah.)
1011   */
1012  
1013  static irqreturn_t
1014  snd_nm256_interrupt(int irq, void *dev_id)
1015  {
1016  	struct nm256 *chip = dev_id;
1017  	u16 status;
1018  	u8 cbyte;
1019  
1020  	status = snd_nm256_readw(chip, NM_INT_REG);
1021  
1022  	/* Not ours. */
1023  	if (status == 0)
1024  		return snd_nm256_intr_check(chip);
1025  
1026  	chip->badintrcount = 0;
1027  
1028  	/* Rather boring; check for individual interrupts and process them. */
1029  
1030  	spin_lock(&chip->reg_lock);
1031  	if (status & NM_PLAYBACK_INT) {
1032  		status &= ~NM_PLAYBACK_INT;
1033  		NM_ACK_INT(chip, NM_PLAYBACK_INT);
1034  		snd_nm256_playback_update(chip);
1035  	}
1036  
1037  	if (status & NM_RECORD_INT) {
1038  		status &= ~NM_RECORD_INT;
1039  		NM_ACK_INT(chip, NM_RECORD_INT);
1040  		snd_nm256_capture_update(chip);
1041  	}
1042  
1043  	if (status & NM_MISC_INT_1) {
1044  		status &= ~NM_MISC_INT_1;
1045  		NM_ACK_INT(chip, NM_MISC_INT_1);
1046  		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1047  		snd_nm256_writew(chip, NM_INT_REG, 0x8000);
1048  		cbyte = snd_nm256_readb(chip, 0x400);
1049  		snd_nm256_writeb(chip, 0x400, cbyte | 2);
1050  	}
1051  
1052  	if (status & NM_MISC_INT_2) {
1053  		status &= ~NM_MISC_INT_2;
1054  		NM_ACK_INT(chip, NM_MISC_INT_2);
1055  		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1056  		cbyte = snd_nm256_readb(chip, 0x400);
1057  		snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1058  	}
1059  
1060  	/* Unknown interrupt. */
1061  	if (status) {
1062  		dev_dbg(chip->card->dev,
1063  			"NM256: Fire in the hole! Unknown status 0x%x\n",
1064  			   status);
1065  		/* Pray. */
1066  		NM_ACK_INT(chip, status);
1067  	}
1068  
1069  	spin_unlock(&chip->reg_lock);
1070  	return IRQ_HANDLED;
1071  }
1072  
1073  /*
1074   * Handle a potential interrupt for the device referred to by DEV_ID.
1075   * This handler is for the 256ZX, and is very similar to the non-ZX
1076   * routine.
1077   */
1078  
1079  static irqreturn_t
1080  snd_nm256_interrupt_zx(int irq, void *dev_id)
1081  {
1082  	struct nm256 *chip = dev_id;
1083  	u32 status;
1084  	u8 cbyte;
1085  
1086  	status = snd_nm256_readl(chip, NM_INT_REG);
1087  
1088  	/* Not ours. */
1089  	if (status == 0)
1090  		return snd_nm256_intr_check(chip);
1091  
1092  	chip->badintrcount = 0;
1093  
1094  	/* Rather boring; check for individual interrupts and process them. */
1095  
1096  	spin_lock(&chip->reg_lock);
1097  	if (status & NM2_PLAYBACK_INT) {
1098  		status &= ~NM2_PLAYBACK_INT;
1099  		NM2_ACK_INT(chip, NM2_PLAYBACK_INT);
1100  		snd_nm256_playback_update(chip);
1101  	}
1102  
1103  	if (status & NM2_RECORD_INT) {
1104  		status &= ~NM2_RECORD_INT;
1105  		NM2_ACK_INT(chip, NM2_RECORD_INT);
1106  		snd_nm256_capture_update(chip);
1107  	}
1108  
1109  	if (status & NM2_MISC_INT_1) {
1110  		status &= ~NM2_MISC_INT_1;
1111  		NM2_ACK_INT(chip, NM2_MISC_INT_1);
1112  		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #1\n");
1113  		cbyte = snd_nm256_readb(chip, 0x400);
1114  		snd_nm256_writeb(chip, 0x400, cbyte | 2);
1115  	}
1116  
1117  	if (status & NM2_MISC_INT_2) {
1118  		status &= ~NM2_MISC_INT_2;
1119  		NM2_ACK_INT(chip, NM2_MISC_INT_2);
1120  		dev_dbg(chip->card->dev, "NM256: Got misc interrupt #2\n");
1121  		cbyte = snd_nm256_readb(chip, 0x400);
1122  		snd_nm256_writeb(chip, 0x400, cbyte & ~2);
1123  	}
1124  
1125  	/* Unknown interrupt. */
1126  	if (status) {
1127  		dev_dbg(chip->card->dev,
1128  			"NM256: Fire in the hole! Unknown status 0x%x\n",
1129  			   status);
1130  		/* Pray. */
1131  		NM2_ACK_INT(chip, status);
1132  	}
1133  
1134  	spin_unlock(&chip->reg_lock);
1135  	return IRQ_HANDLED;
1136  }
1137  
1138  /*
1139   * AC97 interface
1140   */
1141  
1142  /*
1143   * Waits for the mixer to become ready to be written; returns a zero value
1144   * if it timed out.
1145   */
1146  static int
1147  snd_nm256_ac97_ready(struct nm256 *chip)
1148  {
1149  	int timeout = 10;
1150  	u32 testaddr;
1151  	u16 testb;
1152  
1153  	testaddr = chip->mixer_status_offset;
1154  	testb = chip->mixer_status_mask;
1155  
1156  	/*
1157  	 * Loop around waiting for the mixer to become ready.
1158  	 */
1159  	while (timeout-- > 0) {
1160  		if ((snd_nm256_readw(chip, testaddr) & testb) == 0)
1161  			return 1;
1162  		udelay(100);
1163  	}
1164  	return 0;
1165  }
1166  
1167  /*
1168   * Initial register values to be written to the AC97 mixer.
1169   * While most of these are identical to the reset values, we do this
1170   * so that we have most of the register contents cached--this avoids
1171   * reading from the mixer directly (which seems to be problematic,
1172   * probably due to ignorance).
1173   */
1174  
1175  struct initialValues {
1176  	unsigned short reg;
1177  	unsigned short value;
1178  };
1179  
1180  static const struct initialValues nm256_ac97_init_val[] =
1181  {
1182  	{ AC97_MASTER, 		0x8000 },
1183  	{ AC97_HEADPHONE,	0x8000 },
1184  	{ AC97_MASTER_MONO,	0x8000 },
1185  	{ AC97_PC_BEEP,		0x8000 },
1186  	{ AC97_PHONE,		0x8008 },
1187  	{ AC97_MIC,		0x8000 },
1188  	{ AC97_LINE,		0x8808 },
1189  	{ AC97_CD,		0x8808 },
1190  	{ AC97_VIDEO,		0x8808 },
1191  	{ AC97_AUX,		0x8808 },
1192  	{ AC97_PCM,		0x8808 },
1193  	{ AC97_REC_SEL,		0x0000 },
1194  	{ AC97_REC_GAIN,	0x0B0B },
1195  	{ AC97_GENERAL_PURPOSE,	0x0000 },
1196  	{ AC97_3D_CONTROL,	0x8000 },
1197  	{ AC97_VENDOR_ID1, 	0x8384 },
1198  	{ AC97_VENDOR_ID2,	0x7609 },
1199  };
1200  
1201  static int nm256_ac97_idx(unsigned short reg)
1202  {
1203  	int i;
1204  	for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++)
1205  		if (nm256_ac97_init_val[i].reg == reg)
1206  			return i;
1207  	return -1;
1208  }
1209  
1210  /*
1211   * some nm256 easily crash when reading from mixer registers
1212   * thus we're treating it as a write-only mixer and cache the
1213   * written values
1214   */
1215  static unsigned short
1216  snd_nm256_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
1217  {
1218  	struct nm256 *chip = ac97->private_data;
1219  	int idx = nm256_ac97_idx(reg);
1220  
1221  	if (idx < 0)
1222  		return 0;
1223  	return chip->ac97_regs[idx];
1224  }
1225  
1226  /*
1227   */
1228  static void
1229  snd_nm256_ac97_write(struct snd_ac97 *ac97,
1230  		     unsigned short reg, unsigned short val)
1231  {
1232  	struct nm256 *chip = ac97->private_data;
1233  	int tries = 2;
1234  	int idx = nm256_ac97_idx(reg);
1235  	u32 base;
1236  
1237  	if (idx < 0)
1238  		return;
1239  
1240  	base = chip->mixer_base;
1241  
1242  	snd_nm256_ac97_ready(chip);
1243  
1244  	/* Wait for the write to take, too. */
1245  	while (tries-- > 0) {
1246  		snd_nm256_writew(chip, base + reg, val);
1247  		msleep(1);  /* a little delay here seems better.. */
1248  		if (snd_nm256_ac97_ready(chip)) {
1249  			/* successful write: set cache */
1250  			chip->ac97_regs[idx] = val;
1251  			return;
1252  		}
1253  	}
1254  	dev_dbg(chip->card->dev, "nm256: ac97 codec not ready..\n");
1255  }
1256  
1257  /* static resolution table */
1258  static const struct snd_ac97_res_table nm256_res_table[] = {
1259  	{ AC97_MASTER, 0x1f1f },
1260  	{ AC97_HEADPHONE, 0x1f1f },
1261  	{ AC97_MASTER_MONO, 0x001f },
1262  	{ AC97_PC_BEEP, 0x001f },
1263  	{ AC97_PHONE, 0x001f },
1264  	{ AC97_MIC, 0x001f },
1265  	{ AC97_LINE, 0x1f1f },
1266  	{ AC97_CD, 0x1f1f },
1267  	{ AC97_VIDEO, 0x1f1f },
1268  	{ AC97_AUX, 0x1f1f },
1269  	{ AC97_PCM, 0x1f1f },
1270  	{ AC97_REC_GAIN, 0x0f0f },
1271  	{ } /* terminator */
1272  };
1273  
1274  /* initialize the ac97 into a known state */
1275  static void
1276  snd_nm256_ac97_reset(struct snd_ac97 *ac97)
1277  {
1278  	struct nm256 *chip = ac97->private_data;
1279  
1280  	/* Reset the mixer.  'Tis magic!  */
1281  	snd_nm256_writeb(chip, 0x6c0, 1);
1282  	if (! chip->reset_workaround) {
1283  		/* Dell latitude LS will lock up by this */
1284  		snd_nm256_writeb(chip, 0x6cc, 0x87);
1285  	}
1286  	if (! chip->reset_workaround_2) {
1287  		/* Dell latitude CSx will lock up by this */
1288  		snd_nm256_writeb(chip, 0x6cc, 0x80);
1289  		snd_nm256_writeb(chip, 0x6cc, 0x0);
1290  	}
1291  	if (! chip->in_resume) {
1292  		int i;
1293  		for (i = 0; i < ARRAY_SIZE(nm256_ac97_init_val); i++) {
1294  			/* preload the cache, so as to avoid even a single
1295  			 * read of the mixer regs
1296  			 */
1297  			snd_nm256_ac97_write(ac97, nm256_ac97_init_val[i].reg,
1298  					     nm256_ac97_init_val[i].value);
1299  		}
1300  	}
1301  }
1302  
1303  /* create an ac97 mixer interface */
1304  static int
1305  snd_nm256_mixer(struct nm256 *chip)
1306  {
1307  	struct snd_ac97_bus *pbus;
1308  	struct snd_ac97_template ac97;
1309  	int err;
1310  	static const struct snd_ac97_bus_ops ops = {
1311  		.reset = snd_nm256_ac97_reset,
1312  		.write = snd_nm256_ac97_write,
1313  		.read = snd_nm256_ac97_read,
1314  	};
1315  
1316  	chip->ac97_regs = kcalloc(ARRAY_SIZE(nm256_ac97_init_val),
1317  				  sizeof(short), GFP_KERNEL);
1318  	if (! chip->ac97_regs)
1319  		return -ENOMEM;
1320  
1321  	if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
1322  		return err;
1323  
1324  	memset(&ac97, 0, sizeof(ac97));
1325  	ac97.scaps = AC97_SCAP_AUDIO; /* we support audio! */
1326  	ac97.private_data = chip;
1327  	ac97.res_table = nm256_res_table;
1328  	pbus->no_vra = 1;
1329  	err = snd_ac97_mixer(pbus, &ac97, &chip->ac97);
1330  	if (err < 0)
1331  		return err;
1332  	if (! (chip->ac97->id & (0xf0000000))) {
1333  		/* looks like an invalid id */
1334  		sprintf(chip->card->mixername, "%s AC97", chip->card->driver);
1335  	}
1336  	return 0;
1337  }
1338  
1339  /*
1340   * See if the signature left by the NM256 BIOS is intact; if so, we use
1341   * the associated address as the end of our audio buffer in the video
1342   * RAM.
1343   */
1344  
1345  static int
1346  snd_nm256_peek_for_sig(struct nm256 *chip)
1347  {
1348  	/* The signature is located 1K below the end of video RAM.  */
1349  	void __iomem *temp;
1350  	/* Default buffer end is 5120 bytes below the top of RAM.  */
1351  	unsigned long pointer_found = chip->buffer_end - 0x1400;
1352  	u32 sig;
1353  
1354  	temp = ioremap(chip->buffer_addr + chip->buffer_end - 0x400, 16);
1355  	if (temp == NULL) {
1356  		dev_err(chip->card->dev,
1357  			"Unable to scan for card signature in video RAM\n");
1358  		return -EBUSY;
1359  	}
1360  
1361  	sig = readl(temp);
1362  	if ((sig & NM_SIG_MASK) == NM_SIGNATURE) {
1363  		u32 pointer = readl(temp + 4);
1364  
1365  		/*
1366  		 * If it's obviously invalid, don't use it
1367  		 */
1368  		if (pointer == 0xffffffff ||
1369  		    pointer < chip->buffer_size ||
1370  		    pointer > chip->buffer_end) {
1371  			dev_err(chip->card->dev,
1372  				"invalid signature found: 0x%x\n", pointer);
1373  			iounmap(temp);
1374  			return -ENODEV;
1375  		} else {
1376  			pointer_found = pointer;
1377  			dev_info(chip->card->dev,
1378  				 "found card signature in video RAM: 0x%x\n",
1379  			       pointer);
1380  		}
1381  	}
1382  
1383  	iounmap(temp);
1384  	chip->buffer_end = pointer_found;
1385  
1386  	return 0;
1387  }
1388  
1389  #ifdef CONFIG_PM_SLEEP
1390  /*
1391   * APM event handler, so the card is properly reinitialized after a power
1392   * event.
1393   */
1394  static int nm256_suspend(struct device *dev)
1395  {
1396  	struct snd_card *card = dev_get_drvdata(dev);
1397  	struct nm256 *chip = card->private_data;
1398  
1399  	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1400  	snd_ac97_suspend(chip->ac97);
1401  	chip->coeffs_current = 0;
1402  	return 0;
1403  }
1404  
1405  static int nm256_resume(struct device *dev)
1406  {
1407  	struct snd_card *card = dev_get_drvdata(dev);
1408  	struct nm256 *chip = card->private_data;
1409  	int i;
1410  
1411  	/* Perform a full reset on the hardware */
1412  	chip->in_resume = 1;
1413  
1414  	snd_nm256_init_chip(chip);
1415  
1416  	/* restore ac97 */
1417  	snd_ac97_resume(chip->ac97);
1418  
1419  	for (i = 0; i < 2; i++) {
1420  		struct nm256_stream *s = &chip->streams[i];
1421  		if (s->substream && s->suspended) {
1422  			spin_lock_irq(&chip->reg_lock);
1423  			snd_nm256_set_format(chip, s, s->substream);
1424  			spin_unlock_irq(&chip->reg_lock);
1425  		}
1426  	}
1427  
1428  	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1429  	chip->in_resume = 0;
1430  	return 0;
1431  }
1432  
1433  static SIMPLE_DEV_PM_OPS(nm256_pm, nm256_suspend, nm256_resume);
1434  #define NM256_PM_OPS	&nm256_pm
1435  #else
1436  #define NM256_PM_OPS	NULL
1437  #endif /* CONFIG_PM_SLEEP */
1438  
1439  static int snd_nm256_free(struct nm256 *chip)
1440  {
1441  	if (chip->streams[SNDRV_PCM_STREAM_PLAYBACK].running)
1442  		snd_nm256_playback_stop(chip);
1443  	if (chip->streams[SNDRV_PCM_STREAM_CAPTURE].running)
1444  		snd_nm256_capture_stop(chip);
1445  
1446  	if (chip->irq >= 0)
1447  		free_irq(chip->irq, chip);
1448  
1449  	iounmap(chip->cport);
1450  	iounmap(chip->buffer);
1451  	release_and_free_resource(chip->res_cport);
1452  	release_and_free_resource(chip->res_buffer);
1453  
1454  	pci_disable_device(chip->pci);
1455  	kfree(chip->ac97_regs);
1456  	kfree(chip);
1457  	return 0;
1458  }
1459  
1460  static int snd_nm256_dev_free(struct snd_device *device)
1461  {
1462  	struct nm256 *chip = device->device_data;
1463  	return snd_nm256_free(chip);
1464  }
1465  
1466  static int
1467  snd_nm256_create(struct snd_card *card, struct pci_dev *pci,
1468  		 struct nm256 **chip_ret)
1469  {
1470  	struct nm256 *chip;
1471  	int err, pval;
1472  	static const struct snd_device_ops ops = {
1473  		.dev_free =	snd_nm256_dev_free,
1474  	};
1475  	u32 addr;
1476  
1477  	*chip_ret = NULL;
1478  
1479  	if ((err = pci_enable_device(pci)) < 0)
1480  		return err;
1481  
1482  	chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1483  	if (chip == NULL) {
1484  		pci_disable_device(pci);
1485  		return -ENOMEM;
1486  	}
1487  
1488  	chip->card = card;
1489  	chip->pci = pci;
1490  	chip->use_cache = use_cache;
1491  	spin_lock_init(&chip->reg_lock);
1492  	chip->irq = -1;
1493  	mutex_init(&chip->irq_mutex);
1494  
1495  	/* store buffer sizes in bytes */
1496  	chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize = playback_bufsize * 1024;
1497  	chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize = capture_bufsize * 1024;
1498  
1499  	/*
1500  	 * The NM256 has two memory ports.  The first port is nothing
1501  	 * more than a chunk of video RAM, which is used as the I/O ring
1502  	 * buffer.  The second port has the actual juicy stuff (like the
1503  	 * mixer and the playback engine control registers).
1504  	 */
1505  
1506  	chip->buffer_addr = pci_resource_start(pci, 0);
1507  	chip->cport_addr = pci_resource_start(pci, 1);
1508  
1509  	/* Init the memory port info.  */
1510  	/* remap control port (#2) */
1511  	chip->res_cport = request_mem_region(chip->cport_addr, NM_PORT2_SIZE,
1512  					     card->driver);
1513  	if (chip->res_cport == NULL) {
1514  		dev_err(card->dev, "memory region 0x%lx (size 0x%x) busy\n",
1515  			   chip->cport_addr, NM_PORT2_SIZE);
1516  		err = -EBUSY;
1517  		goto __error;
1518  	}
1519  	chip->cport = ioremap(chip->cport_addr, NM_PORT2_SIZE);
1520  	if (chip->cport == NULL) {
1521  		dev_err(card->dev, "unable to map control port %lx\n",
1522  			chip->cport_addr);
1523  		err = -ENOMEM;
1524  		goto __error;
1525  	}
1526  
1527  	if (!strcmp(card->driver, "NM256AV")) {
1528  		/* Ok, try to see if this is a non-AC97 version of the hardware. */
1529  		pval = snd_nm256_readw(chip, NM_MIXER_PRESENCE);
1530  		if ((pval & NM_PRESENCE_MASK) != NM_PRESENCE_VALUE) {
1531  			if (! force_ac97) {
1532  				dev_err(card->dev,
1533  					"no ac97 is found!\n");
1534  				dev_err(card->dev,
1535  					"force the driver to load by passing in the module parameter\n");
1536  				dev_err(card->dev,
1537  					" force_ac97=1\n");
1538  				dev_err(card->dev,
1539  					"or try sb16, opl3sa2, or cs423x drivers instead.\n");
1540  				err = -ENXIO;
1541  				goto __error;
1542  			}
1543  		}
1544  		chip->buffer_end = 2560 * 1024;
1545  		chip->interrupt = snd_nm256_interrupt;
1546  		chip->mixer_status_offset = NM_MIXER_STATUS_OFFSET;
1547  		chip->mixer_status_mask = NM_MIXER_READY_MASK;
1548  	} else {
1549  		/* Not sure if there is any relevant detect for the ZX or not.  */
1550  		if (snd_nm256_readb(chip, 0xa0b) != 0)
1551  			chip->buffer_end = 6144 * 1024;
1552  		else
1553  			chip->buffer_end = 4096 * 1024;
1554  
1555  		chip->interrupt = snd_nm256_interrupt_zx;
1556  		chip->mixer_status_offset = NM2_MIXER_STATUS_OFFSET;
1557  		chip->mixer_status_mask = NM2_MIXER_READY_MASK;
1558  	}
1559  
1560  	chip->buffer_size = chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize +
1561  		chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1562  	if (chip->use_cache)
1563  		chip->buffer_size += NM_TOTAL_COEFF_COUNT * 4;
1564  	else
1565  		chip->buffer_size += NM_MAX_PLAYBACK_COEF_SIZE + NM_MAX_RECORD_COEF_SIZE;
1566  
1567  	if (buffer_top >= chip->buffer_size && buffer_top < chip->buffer_end)
1568  		chip->buffer_end = buffer_top;
1569  	else {
1570  		/* get buffer end pointer from signature */
1571  		if ((err = snd_nm256_peek_for_sig(chip)) < 0)
1572  			goto __error;
1573  	}
1574  
1575  	chip->buffer_start = chip->buffer_end - chip->buffer_size;
1576  	chip->buffer_addr += chip->buffer_start;
1577  
1578  	dev_info(card->dev, "Mapping port 1 from 0x%x - 0x%x\n",
1579  	       chip->buffer_start, chip->buffer_end);
1580  
1581  	chip->res_buffer = request_mem_region(chip->buffer_addr,
1582  					      chip->buffer_size,
1583  					      card->driver);
1584  	if (chip->res_buffer == NULL) {
1585  		dev_err(card->dev, "buffer 0x%lx (size 0x%x) busy\n",
1586  			   chip->buffer_addr, chip->buffer_size);
1587  		err = -EBUSY;
1588  		goto __error;
1589  	}
1590  	chip->buffer = ioremap(chip->buffer_addr, chip->buffer_size);
1591  	if (chip->buffer == NULL) {
1592  		err = -ENOMEM;
1593  		dev_err(card->dev, "unable to map ring buffer at %lx\n",
1594  			chip->buffer_addr);
1595  		goto __error;
1596  	}
1597  
1598  	/* set offsets */
1599  	addr = chip->buffer_start;
1600  	chip->streams[SNDRV_PCM_STREAM_PLAYBACK].buf = addr;
1601  	addr += chip->streams[SNDRV_PCM_STREAM_PLAYBACK].bufsize;
1602  	chip->streams[SNDRV_PCM_STREAM_CAPTURE].buf = addr;
1603  	addr += chip->streams[SNDRV_PCM_STREAM_CAPTURE].bufsize;
1604  	if (chip->use_cache) {
1605  		chip->all_coeff_buf = addr;
1606  	} else {
1607  		chip->coeff_buf[SNDRV_PCM_STREAM_PLAYBACK] = addr;
1608  		addr += NM_MAX_PLAYBACK_COEF_SIZE;
1609  		chip->coeff_buf[SNDRV_PCM_STREAM_CAPTURE] = addr;
1610  	}
1611  
1612  	/* Fixed setting. */
1613  	chip->mixer_base = NM_MIXER_OFFSET;
1614  
1615  	chip->coeffs_current = 0;
1616  
1617  	snd_nm256_init_chip(chip);
1618  
1619  	// pci_set_master(pci); /* needed? */
1620  
1621  	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0)
1622  		goto __error;
1623  
1624  	*chip_ret = chip;
1625  	return 0;
1626  
1627  __error:
1628  	snd_nm256_free(chip);
1629  	return err;
1630  }
1631  
1632  
1633  enum { NM_IGNORED, NM_RESET_WORKAROUND, NM_RESET_WORKAROUND_2 };
1634  
1635  static const struct snd_pci_quirk nm256_quirks[] = {
1636  	/* HP omnibook 4150 has cs4232 codec internally */
1637  	SND_PCI_QUIRK(0x103c, 0x0007, "HP omnibook 4150", NM_IGNORED),
1638  	/* Reset workarounds to avoid lock-ups */
1639  	SND_PCI_QUIRK(0x104d, 0x8041, "Sony PCG-F305", NM_RESET_WORKAROUND),
1640  	SND_PCI_QUIRK(0x1028, 0x0080, "Dell Latitude LS", NM_RESET_WORKAROUND),
1641  	SND_PCI_QUIRK(0x1028, 0x0091, "Dell Latitude CSx", NM_RESET_WORKAROUND_2),
1642  	{ } /* terminator */
1643  };
1644  
1645  
1646  static int snd_nm256_probe(struct pci_dev *pci,
1647  			   const struct pci_device_id *pci_id)
1648  {
1649  	struct snd_card *card;
1650  	struct nm256 *chip;
1651  	int err;
1652  	const struct snd_pci_quirk *q;
1653  
1654  	q = snd_pci_quirk_lookup(pci, nm256_quirks);
1655  	if (q) {
1656  		dev_dbg(&pci->dev, "Enabled quirk for %s.\n",
1657  			    snd_pci_quirk_name(q));
1658  		switch (q->value) {
1659  		case NM_IGNORED:
1660  			dev_info(&pci->dev,
1661  				 "The device is on the denylist. Loading stopped\n");
1662  			return -ENODEV;
1663  		case NM_RESET_WORKAROUND_2:
1664  			reset_workaround_2 = 1;
1665  			fallthrough;
1666  		case NM_RESET_WORKAROUND:
1667  			reset_workaround = 1;
1668  			break;
1669  		}
1670  	}
1671  
1672  	err = snd_card_new(&pci->dev, index, id, THIS_MODULE, 0, &card);
1673  	if (err < 0)
1674  		return err;
1675  
1676  	switch (pci->device) {
1677  	case PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO:
1678  		strcpy(card->driver, "NM256AV");
1679  		break;
1680  	case PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO:
1681  		strcpy(card->driver, "NM256ZX");
1682  		break;
1683  	case PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO:
1684  		strcpy(card->driver, "NM256XL+");
1685  		break;
1686  	default:
1687  		dev_err(&pci->dev, "invalid device id 0x%x\n", pci->device);
1688  		snd_card_free(card);
1689  		return -EINVAL;
1690  	}
1691  
1692  	if (vaio_hack)
1693  		buffer_top = 0x25a800;	/* this avoids conflicts with XFree86 server */
1694  
1695  	if (playback_bufsize < 4)
1696  		playback_bufsize = 4;
1697  	if (playback_bufsize > 128)
1698  		playback_bufsize = 128;
1699  	if (capture_bufsize < 4)
1700  		capture_bufsize = 4;
1701  	if (capture_bufsize > 128)
1702  		capture_bufsize = 128;
1703  	if ((err = snd_nm256_create(card, pci, &chip)) < 0) {
1704  		snd_card_free(card);
1705  		return err;
1706  	}
1707  	card->private_data = chip;
1708  
1709  	if (reset_workaround) {
1710  		dev_dbg(&pci->dev, "reset_workaround activated\n");
1711  		chip->reset_workaround = 1;
1712  	}
1713  
1714  	if (reset_workaround_2) {
1715  		dev_dbg(&pci->dev, "reset_workaround_2 activated\n");
1716  		chip->reset_workaround_2 = 1;
1717  	}
1718  
1719  	if ((err = snd_nm256_pcm(chip, 0)) < 0 ||
1720  	    (err = snd_nm256_mixer(chip)) < 0) {
1721  		snd_card_free(card);
1722  		return err;
1723  	}
1724  
1725  	sprintf(card->shortname, "NeoMagic %s", card->driver);
1726  	sprintf(card->longname, "%s at 0x%lx & 0x%lx, irq %d",
1727  		card->shortname,
1728  		chip->buffer_addr, chip->cport_addr, chip->irq);
1729  
1730  	if ((err = snd_card_register(card)) < 0) {
1731  		snd_card_free(card);
1732  		return err;
1733  	}
1734  
1735  	pci_set_drvdata(pci, card);
1736  	return 0;
1737  }
1738  
1739  static void snd_nm256_remove(struct pci_dev *pci)
1740  {
1741  	snd_card_free(pci_get_drvdata(pci));
1742  }
1743  
1744  
1745  static struct pci_driver nm256_driver = {
1746  	.name = KBUILD_MODNAME,
1747  	.id_table = snd_nm256_ids,
1748  	.probe = snd_nm256_probe,
1749  	.remove = snd_nm256_remove,
1750  	.driver = {
1751  		.pm = NM256_PM_OPS,
1752  	},
1753  };
1754  
1755  module_pci_driver(nm256_driver);
1756