1 /* 2 * Driver for Digigram miXart soundcards 3 * 4 * DSP firmware management 5 * 6 * Copyright (c) 2003 by Digigram <alsa@digigram.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 */ 22 23 #include <linux/interrupt.h> 24 #include <linux/pci.h> 25 #include <linux/firmware.h> 26 #include <linux/vmalloc.h> 27 #include <linux/slab.h> 28 #include <linux/module.h> 29 #include <asm/io.h> 30 #include <sound/core.h> 31 #include "mixart.h" 32 #include "mixart_mixer.h" 33 #include "mixart_core.h" 34 #include "mixart_hwdep.h" 35 36 37 /** 38 * wait for a value on a peudo register, exit with a timeout 39 * 40 * @param mgr pointer to miXart manager structure 41 * @param offset unsigned pseudo_register base + offset of value 42 * @param value value 43 * @param timeout timeout in centisenconds 44 */ 45 static int mixart_wait_nice_for_register_value(struct mixart_mgr *mgr, 46 u32 offset, int is_egal, 47 u32 value, unsigned long timeout) 48 { 49 unsigned long end_time = jiffies + (timeout * HZ / 100); 50 u32 read; 51 52 do { /* we may take too long time in this loop. 53 * so give controls back to kernel if needed. 54 */ 55 cond_resched(); 56 57 read = readl_be( MIXART_MEM( mgr, offset )); 58 if(is_egal) { 59 if(read == value) return 0; 60 } 61 else { /* wait for different value */ 62 if(read != value) return 0; 63 } 64 } while ( time_after_eq(end_time, jiffies) ); 65 66 return -EBUSY; 67 } 68 69 70 /* 71 structures needed to upload elf code packets 72 */ 73 struct snd_mixart_elf32_ehdr { 74 u8 e_ident[16]; 75 u16 e_type; 76 u16 e_machine; 77 u32 e_version; 78 u32 e_entry; 79 u32 e_phoff; 80 u32 e_shoff; 81 u32 e_flags; 82 u16 e_ehsize; 83 u16 e_phentsize; 84 u16 e_phnum; 85 u16 e_shentsize; 86 u16 e_shnum; 87 u16 e_shstrndx; 88 }; 89 90 struct snd_mixart_elf32_phdr { 91 u32 p_type; 92 u32 p_offset; 93 u32 p_vaddr; 94 u32 p_paddr; 95 u32 p_filesz; 96 u32 p_memsz; 97 u32 p_flags; 98 u32 p_align; 99 }; 100 101 static int mixart_load_elf(struct mixart_mgr *mgr, const struct firmware *dsp ) 102 { 103 char elf32_magic_number[4] = {0x7f,'E','L','F'}; 104 struct snd_mixart_elf32_ehdr *elf_header; 105 int i; 106 107 elf_header = (struct snd_mixart_elf32_ehdr *)dsp->data; 108 for( i=0; i<4; i++ ) 109 if ( elf32_magic_number[i] != elf_header->e_ident[i] ) 110 return -EINVAL; 111 112 if( elf_header->e_phoff != 0 ) { 113 struct snd_mixart_elf32_phdr elf_programheader; 114 115 for( i=0; i < be16_to_cpu(elf_header->e_phnum); i++ ) { 116 u32 pos = be32_to_cpu(elf_header->e_phoff) + (u32)(i * be16_to_cpu(elf_header->e_phentsize)); 117 118 memcpy( &elf_programheader, dsp->data + pos, sizeof(elf_programheader) ); 119 120 if(elf_programheader.p_type != 0) { 121 if( elf_programheader.p_filesz != 0 ) { 122 memcpy_toio( MIXART_MEM( mgr, be32_to_cpu(elf_programheader.p_vaddr)), 123 dsp->data + be32_to_cpu( elf_programheader.p_offset ), 124 be32_to_cpu( elf_programheader.p_filesz )); 125 } 126 } 127 } 128 } 129 return 0; 130 } 131 132 /* 133 * get basic information and init miXart 134 */ 135 136 /* audio IDs for request to the board */ 137 #define MIXART_FIRST_ANA_AUDIO_ID 0 138 #define MIXART_FIRST_DIG_AUDIO_ID 8 139 140 static int mixart_enum_connectors(struct mixart_mgr *mgr) 141 { 142 u32 k; 143 int err; 144 struct mixart_msg request; 145 struct mixart_enum_connector_resp *connector; 146 struct mixart_audio_info_req *audio_info_req; 147 struct mixart_audio_info_resp *audio_info; 148 149 connector = kmalloc(sizeof(*connector), GFP_KERNEL); 150 audio_info_req = kmalloc(sizeof(*audio_info_req), GFP_KERNEL); 151 audio_info = kmalloc(sizeof(*audio_info), GFP_KERNEL); 152 if (! connector || ! audio_info_req || ! audio_info) { 153 err = -ENOMEM; 154 goto __error; 155 } 156 157 audio_info_req->line_max_level = MIXART_FLOAT_P_22_0_TO_HEX; 158 audio_info_req->micro_max_level = MIXART_FLOAT_M_20_0_TO_HEX; 159 audio_info_req->cd_max_level = MIXART_FLOAT____0_0_TO_HEX; 160 161 request.message_id = MSG_SYSTEM_ENUM_PLAY_CONNECTOR; 162 request.uid = (struct mixart_uid){0,0}; /* board num = 0 */ 163 request.data = NULL; 164 request.size = 0; 165 166 err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector); 167 if((err < 0) || (connector->error_code) || (connector->uid_count > MIXART_MAX_PHYS_CONNECTORS)) { 168 dev_err(&mgr->pci->dev, 169 "error MSG_SYSTEM_ENUM_PLAY_CONNECTOR\n"); 170 err = -EINVAL; 171 goto __error; 172 } 173 174 for(k=0; k < connector->uid_count; k++) { 175 struct mixart_pipe *pipe; 176 177 if(k < MIXART_FIRST_DIG_AUDIO_ID) { 178 pipe = &mgr->chip[k/2]->pipe_out_ana; 179 } else { 180 pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_out_dig; 181 } 182 if(k & 1) { 183 pipe->uid_right_connector = connector->uid[k]; /* odd */ 184 } else { 185 pipe->uid_left_connector = connector->uid[k]; /* even */ 186 } 187 188 /* dev_dbg(&mgr->pci->dev, "playback connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */ 189 190 /* TODO: really need send_msg MSG_CONNECTOR_GET_AUDIO_INFO for each connector ? perhaps for analog level caps ? */ 191 request.message_id = MSG_CONNECTOR_GET_AUDIO_INFO; 192 request.uid = connector->uid[k]; 193 request.data = audio_info_req; 194 request.size = sizeof(*audio_info_req); 195 196 err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info); 197 if( err < 0 ) { 198 dev_err(&mgr->pci->dev, 199 "error MSG_CONNECTOR_GET_AUDIO_INFO\n"); 200 goto __error; 201 } 202 /*dev_dbg(&mgr->pci->dev, "play analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/ 203 } 204 205 request.message_id = MSG_SYSTEM_ENUM_RECORD_CONNECTOR; 206 request.uid = (struct mixart_uid){0,0}; /* board num = 0 */ 207 request.data = NULL; 208 request.size = 0; 209 210 err = snd_mixart_send_msg(mgr, &request, sizeof(*connector), connector); 211 if((err < 0) || (connector->error_code) || (connector->uid_count > MIXART_MAX_PHYS_CONNECTORS)) { 212 dev_err(&mgr->pci->dev, 213 "error MSG_SYSTEM_ENUM_RECORD_CONNECTOR\n"); 214 err = -EINVAL; 215 goto __error; 216 } 217 218 for(k=0; k < connector->uid_count; k++) { 219 struct mixart_pipe *pipe; 220 221 if(k < MIXART_FIRST_DIG_AUDIO_ID) { 222 pipe = &mgr->chip[k/2]->pipe_in_ana; 223 } else { 224 pipe = &mgr->chip[(k-MIXART_FIRST_DIG_AUDIO_ID)/2]->pipe_in_dig; 225 } 226 if(k & 1) { 227 pipe->uid_right_connector = connector->uid[k]; /* odd */ 228 } else { 229 pipe->uid_left_connector = connector->uid[k]; /* even */ 230 } 231 232 /* dev_dbg(&mgr->pci->dev, "capture connector[%d].object_id = %x\n", k, connector->uid[k].object_id); */ 233 234 /* TODO: really need send_msg MSG_CONNECTOR_GET_AUDIO_INFO for each connector ? perhaps for analog level caps ? */ 235 request.message_id = MSG_CONNECTOR_GET_AUDIO_INFO; 236 request.uid = connector->uid[k]; 237 request.data = audio_info_req; 238 request.size = sizeof(*audio_info_req); 239 240 err = snd_mixart_send_msg(mgr, &request, sizeof(*audio_info), audio_info); 241 if( err < 0 ) { 242 dev_err(&mgr->pci->dev, 243 "error MSG_CONNECTOR_GET_AUDIO_INFO\n"); 244 goto __error; 245 } 246 /*dev_dbg(&mgr->pci->dev, "rec analog_info.analog_level_present = %x\n", audio_info->info.analog_info.analog_level_present);*/ 247 } 248 err = 0; 249 250 __error: 251 kfree(connector); 252 kfree(audio_info_req); 253 kfree(audio_info); 254 255 return err; 256 } 257 258 static int mixart_enum_physio(struct mixart_mgr *mgr) 259 { 260 u32 k; 261 int err; 262 struct mixart_msg request; 263 struct mixart_uid get_console_mgr; 264 struct mixart_return_uid console_mgr; 265 struct mixart_uid_enumeration phys_io; 266 267 /* get the uid for the console manager */ 268 get_console_mgr.object_id = 0; 269 get_console_mgr.desc = MSG_CONSOLE_MANAGER | 0; /* cardindex = 0 */ 270 271 request.message_id = MSG_CONSOLE_GET_CLOCK_UID; 272 request.uid = get_console_mgr; 273 request.data = &get_console_mgr; 274 request.size = sizeof(get_console_mgr); 275 276 err = snd_mixart_send_msg(mgr, &request, sizeof(console_mgr), &console_mgr); 277 278 if( (err < 0) || (console_mgr.error_code != 0) ) { 279 dev_dbg(&mgr->pci->dev, 280 "error MSG_CONSOLE_GET_CLOCK_UID : err=%x\n", 281 console_mgr.error_code); 282 return -EINVAL; 283 } 284 285 /* used later for clock issues ! */ 286 mgr->uid_console_manager = console_mgr.uid; 287 288 request.message_id = MSG_SYSTEM_ENUM_PHYSICAL_IO; 289 request.uid = (struct mixart_uid){0,0}; 290 request.data = &console_mgr.uid; 291 request.size = sizeof(console_mgr.uid); 292 293 err = snd_mixart_send_msg(mgr, &request, sizeof(phys_io), &phys_io); 294 if( (err < 0) || ( phys_io.error_code != 0 ) ) { 295 dev_err(&mgr->pci->dev, 296 "error MSG_SYSTEM_ENUM_PHYSICAL_IO err(%x) error_code(%x)\n", 297 err, phys_io.error_code); 298 return -EINVAL; 299 } 300 301 /* min 2 phys io per card (analog in + analog out) */ 302 if (phys_io.nb_uid < MIXART_MAX_CARDS * 2) 303 return -EINVAL; 304 305 for(k=0; k<mgr->num_cards; k++) { 306 mgr->chip[k]->uid_in_analog_physio = phys_io.uid[k]; 307 mgr->chip[k]->uid_out_analog_physio = phys_io.uid[phys_io.nb_uid/2 + k]; 308 } 309 310 return 0; 311 } 312 313 314 static int mixart_first_init(struct mixart_mgr *mgr) 315 { 316 u32 k; 317 int err; 318 struct mixart_msg request; 319 320 if((err = mixart_enum_connectors(mgr)) < 0) return err; 321 322 if((err = mixart_enum_physio(mgr)) < 0) return err; 323 324 /* send a synchro command to card (necessary to do this before first MSG_STREAM_START_STREAM_GRP_PACKET) */ 325 /* though why not here */ 326 request.message_id = MSG_SYSTEM_SEND_SYNCHRO_CMD; 327 request.uid = (struct mixart_uid){0,0}; 328 request.data = NULL; 329 request.size = 0; 330 /* this command has no data. response is a 32 bit status */ 331 err = snd_mixart_send_msg(mgr, &request, sizeof(k), &k); 332 if( (err < 0) || (k != 0) ) { 333 dev_err(&mgr->pci->dev, "error MSG_SYSTEM_SEND_SYNCHRO_CMD\n"); 334 return err == 0 ? -EINVAL : err; 335 } 336 337 return 0; 338 } 339 340 341 /* firmware base addresses (when hard coded) */ 342 #define MIXART_MOTHERBOARD_XLX_BASE_ADDRESS 0x00600000 343 344 static int mixart_dsp_load(struct mixart_mgr* mgr, int index, const struct firmware *dsp) 345 { 346 int err, card_index; 347 u32 status_xilinx, status_elf, status_daught; 348 u32 val; 349 350 /* read motherboard xilinx status */ 351 status_xilinx = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); 352 /* read elf status */ 353 status_elf = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); 354 /* read daughterboard xilinx status */ 355 status_daught = readl_be( MIXART_MEM( mgr,MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); 356 357 /* motherboard xilinx status 5 will say that the board is performing a reset */ 358 if (status_xilinx == 5) { 359 dev_err(&mgr->pci->dev, "miXart is resetting !\n"); 360 return -EAGAIN; /* try again later */ 361 } 362 363 switch (index) { 364 case MIXART_MOTHERBOARD_XLX_INDEX: 365 366 /* xilinx already loaded ? */ 367 if (status_xilinx == 4) { 368 dev_dbg(&mgr->pci->dev, "xilinx is already loaded !\n"); 369 return 0; 370 } 371 /* the status should be 0 == "idle" */ 372 if (status_xilinx != 0) { 373 dev_err(&mgr->pci->dev, 374 "xilinx load error ! status = %d\n", 375 status_xilinx); 376 return -EIO; /* modprob -r may help ? */ 377 } 378 379 /* check xilinx validity */ 380 if (((u32*)(dsp->data))[0] == 0xffffffff) 381 return -EINVAL; 382 if (dsp->size % 4) 383 return -EINVAL; 384 385 /* set xilinx status to copying */ 386 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); 387 388 /* setup xilinx base address */ 389 writel_be( MIXART_MOTHERBOARD_XLX_BASE_ADDRESS, MIXART_MEM( mgr,MIXART_PSEUDOREG_MXLX_BASE_ADDR_OFFSET )); 390 /* setup code size for xilinx file */ 391 writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_SIZE_OFFSET )); 392 393 /* copy xilinx code */ 394 memcpy_toio( MIXART_MEM( mgr, MIXART_MOTHERBOARD_XLX_BASE_ADDRESS), dsp->data, dsp->size); 395 396 /* set xilinx status to copy finished */ 397 writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET )); 398 399 /* return, because no further processing needed */ 400 return 0; 401 402 case MIXART_MOTHERBOARD_ELF_INDEX: 403 404 if (status_elf == 4) { 405 dev_dbg(&mgr->pci->dev, "elf file already loaded !\n"); 406 return 0; 407 } 408 409 /* the status should be 0 == "idle" */ 410 if (status_elf != 0) { 411 dev_err(&mgr->pci->dev, 412 "elf load error ! status = %d\n", 413 status_elf); 414 return -EIO; /* modprob -r may help ? */ 415 } 416 417 /* wait for xilinx status == 4 */ 418 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_MXLX_STATUS_OFFSET, 1, 4, 500); /* 5sec */ 419 if (err < 0) { 420 dev_err(&mgr->pci->dev, "xilinx was not loaded or " 421 "could not be started\n"); 422 return err; 423 } 424 425 /* init some data on the card */ 426 writel_be( 0, MIXART_MEM( mgr, MIXART_PSEUDOREG_BOARDNUMBER ) ); /* set miXart boardnumber to 0 */ 427 writel_be( 0, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* reset pointer to flow table on miXart */ 428 429 /* set elf status to copying */ 430 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); 431 432 /* process the copying of the elf packets */ 433 err = mixart_load_elf( mgr, dsp ); 434 if (err < 0) return err; 435 436 /* set elf status to copy finished */ 437 writel_be( 2, MIXART_MEM( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET )); 438 439 /* wait for elf status == 4 */ 440 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_ELF_STATUS_OFFSET, 1, 4, 300); /* 3sec */ 441 if (err < 0) { 442 dev_err(&mgr->pci->dev, "elf could not be started\n"); 443 return err; 444 } 445 446 /* miXart waits at this point on the pointer to the flow table */ 447 writel_be( (u32)mgr->flowinfo.addr, MIXART_MEM( mgr, MIXART_FLOWTABLE_PTR ) ); /* give pointer of flow table to miXart */ 448 449 return 0; /* return, another xilinx file has to be loaded before */ 450 451 case MIXART_AESEBUBOARD_XLX_INDEX: 452 default: 453 454 /* elf and xilinx should be loaded */ 455 if (status_elf != 4 || status_xilinx != 4) { 456 dev_err(&mgr->pci->dev, "xilinx or elf not " 457 "successfully loaded\n"); 458 return -EIO; /* modprob -r may help ? */ 459 } 460 461 /* wait for daughter detection != 0 */ 462 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DBRD_PRESENCE_OFFSET, 0, 0, 30); /* 300msec */ 463 if (err < 0) { 464 dev_err(&mgr->pci->dev, "error starting elf file\n"); 465 return err; 466 } 467 468 /* the board type can now be retrieved */ 469 mgr->board_type = (DAUGHTER_TYPE_MASK & readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DBRD_TYPE_OFFSET))); 470 471 if (mgr->board_type == MIXART_DAUGHTER_TYPE_NONE) 472 break; /* no daughter board; the file does not have to be loaded, continue after the switch */ 473 474 /* only if aesebu daughter board presence (elf code must run) */ 475 if (mgr->board_type != MIXART_DAUGHTER_TYPE_AES ) 476 return -EINVAL; 477 478 /* daughter should be idle */ 479 if (status_daught != 0) { 480 dev_err(&mgr->pci->dev, 481 "daughter load error ! status = %d\n", 482 status_daught); 483 return -EIO; /* modprob -r may help ? */ 484 } 485 486 /* check daughterboard xilinx validity */ 487 if (((u32*)(dsp->data))[0] == 0xffffffff) 488 return -EINVAL; 489 if (dsp->size % 4) 490 return -EINVAL; 491 492 /* inform mixart about the size of the file */ 493 writel_be( dsp->size, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_SIZE_OFFSET )); 494 495 /* set daughterboard status to 1 */ 496 writel_be( 1, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); 497 498 /* wait for status == 2 */ 499 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 2, 30); /* 300msec */ 500 if (err < 0) { 501 dev_err(&mgr->pci->dev, "daughter board load error\n"); 502 return err; 503 } 504 505 /* get the address where to write the file */ 506 val = readl_be( MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_BASE_ADDR_OFFSET )); 507 if (!val) 508 return -EINVAL; 509 510 /* copy daughterboard xilinx code */ 511 memcpy_toio( MIXART_MEM( mgr, val), dsp->data, dsp->size); 512 513 /* set daughterboard status to 4 */ 514 writel_be( 4, MIXART_MEM( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET )); 515 516 /* continue with init */ 517 break; 518 } /* end of switch file index*/ 519 520 /* wait for daughter status == 3 */ 521 err = mixart_wait_nice_for_register_value( mgr, MIXART_PSEUDOREG_DXLX_STATUS_OFFSET, 1, 3, 300); /* 3sec */ 522 if (err < 0) { 523 dev_err(&mgr->pci->dev, 524 "daughter board could not be initialised\n"); 525 return err; 526 } 527 528 /* init mailbox (communication with embedded) */ 529 snd_mixart_init_mailbox(mgr); 530 531 /* first communication with embedded */ 532 err = mixart_first_init(mgr); 533 if (err < 0) { 534 dev_err(&mgr->pci->dev, "miXart could not be set up\n"); 535 return err; 536 } 537 538 /* create devices and mixer in accordance with HW options*/ 539 for (card_index = 0; card_index < mgr->num_cards; card_index++) { 540 struct snd_mixart *chip = mgr->chip[card_index]; 541 542 if ((err = snd_mixart_create_pcm(chip)) < 0) 543 return err; 544 545 if (card_index == 0) { 546 if ((err = snd_mixart_create_mixer(chip->mgr)) < 0) 547 return err; 548 } 549 550 if ((err = snd_card_register(chip->card)) < 0) 551 return err; 552 } 553 554 dev_dbg(&mgr->pci->dev, 555 "miXart firmware downloaded and successfully set up\n"); 556 557 return 0; 558 } 559 560 561 int snd_mixart_setup_firmware(struct mixart_mgr *mgr) 562 { 563 static char *fw_files[3] = { 564 "miXart8.xlx", "miXart8.elf", "miXart8AES.xlx" 565 }; 566 char path[32]; 567 568 const struct firmware *fw_entry; 569 int i, err; 570 571 for (i = 0; i < 3; i++) { 572 sprintf(path, "mixart/%s", fw_files[i]); 573 if (request_firmware(&fw_entry, path, &mgr->pci->dev)) { 574 dev_err(&mgr->pci->dev, 575 "miXart: can't load firmware %s\n", path); 576 return -ENOENT; 577 } 578 /* fake hwdep dsp record */ 579 err = mixart_dsp_load(mgr, i, fw_entry); 580 release_firmware(fw_entry); 581 if (err < 0) 582 return err; 583 mgr->dsp_loaded |= 1 << i; 584 } 585 return 0; 586 } 587 588 MODULE_FIRMWARE("mixart/miXart8.xlx"); 589 MODULE_FIRMWARE("mixart/miXart8.elf"); 590 MODULE_FIRMWARE("mixart/miXart8AES.xlx"); 591