1 /* -*- linux-c -*- * 2 * 3 * ALSA driver for the digigram lx6464es interface 4 * low-level interface 5 * 6 * Copyright (c) 2009 Tim Blechmann <tim@klingt.org> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License as published by 10 * the Free Software Foundation; either version 2 of the License, or 11 * (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; see the file COPYING. If not, write to 20 * the Free Software Foundation, Inc., 59 Temple Place - Suite 330, 21 * Boston, MA 02111-1307, USA. 22 * 23 */ 24 25 #ifndef LX_CORE_H 26 #define LX_CORE_H 27 28 #include <linux/interrupt.h> 29 30 #include "lx_defs.h" 31 32 #define REG_CRM_NUMBER 12 33 34 struct lx6464es; 35 36 /* low-level register access */ 37 38 /* dsp register access */ 39 enum { 40 eReg_BASE, 41 eReg_CSM, 42 eReg_CRM1, 43 eReg_CRM2, 44 eReg_CRM3, 45 eReg_CRM4, 46 eReg_CRM5, 47 eReg_CRM6, 48 eReg_CRM7, 49 eReg_CRM8, 50 eReg_CRM9, 51 eReg_CRM10, 52 eReg_CRM11, 53 eReg_CRM12, 54 55 eReg_ICR, 56 eReg_CVR, 57 eReg_ISR, 58 eReg_RXHTXH, 59 eReg_RXMTXM, 60 eReg_RHLTXL, 61 eReg_RESETDSP, 62 63 eReg_CSUF, 64 eReg_CSES, 65 eReg_CRESMSB, 66 eReg_CRESLSB, 67 eReg_ADMACESMSB, 68 eReg_ADMACESLSB, 69 eReg_CONFES, 70 71 eMaxPortLx 72 }; 73 74 unsigned long lx_dsp_reg_read(struct lx6464es *chip, int port); 75 void lx_dsp_reg_write(struct lx6464es *chip, int port, unsigned data); 76 77 /* plx register access */ 78 enum { 79 ePLX_PCICR, 80 81 ePLX_MBOX0, 82 ePLX_MBOX1, 83 ePLX_MBOX2, 84 ePLX_MBOX3, 85 ePLX_MBOX4, 86 ePLX_MBOX5, 87 ePLX_MBOX6, 88 ePLX_MBOX7, 89 90 ePLX_L2PCIDB, 91 ePLX_IRQCS, 92 ePLX_CHIPSC, 93 94 eMaxPort 95 }; 96 97 unsigned long lx_plx_reg_read(struct lx6464es *chip, int port); 98 void lx_plx_reg_write(struct lx6464es *chip, int port, u32 data); 99 100 /* rhm */ 101 struct lx_rmh { 102 u16 cmd_len; /* length of the command to send (WORDs) */ 103 u16 stat_len; /* length of the status received (WORDs) */ 104 u16 dsp_stat; /* status type, RMP_SSIZE_XXX */ 105 u16 cmd_idx; /* index of the command */ 106 u32 cmd[REG_CRM_NUMBER]; 107 u32 stat[REG_CRM_NUMBER]; 108 }; 109 110 111 /* low-level dsp access */ 112 int lx_dsp_get_version(struct lx6464es *chip, u32 *rdsp_version); 113 int lx_dsp_get_clock_frequency(struct lx6464es *chip, u32 *rfreq); 114 int lx_dsp_set_granularity(struct lx6464es *chip, u32 gran); 115 int lx_dsp_read_async_events(struct lx6464es *chip, u32 *data); 116 int lx_dsp_get_mac(struct lx6464es *chip); 117 118 119 /* low-level pipe handling */ 120 int lx_pipe_allocate(struct lx6464es *chip, u32 pipe, int is_capture, 121 int channels); 122 int lx_pipe_release(struct lx6464es *chip, u32 pipe, int is_capture); 123 int lx_pipe_sample_count(struct lx6464es *chip, u32 pipe, int is_capture, 124 u64 *rsample_count); 125 int lx_pipe_state(struct lx6464es *chip, u32 pipe, int is_capture, u16 *rstate); 126 int lx_pipe_stop(struct lx6464es *chip, u32 pipe, int is_capture); 127 int lx_pipe_start(struct lx6464es *chip, u32 pipe, int is_capture); 128 int lx_pipe_pause(struct lx6464es *chip, u32 pipe, int is_capture); 129 130 int lx_pipe_wait_for_start(struct lx6464es *chip, u32 pipe, int is_capture); 131 int lx_pipe_wait_for_idle(struct lx6464es *chip, u32 pipe, int is_capture); 132 133 /* low-level stream handling */ 134 int lx_stream_set_format(struct lx6464es *chip, struct snd_pcm_runtime *runtime, 135 u32 pipe, int is_capture); 136 int lx_stream_state(struct lx6464es *chip, u32 pipe, int is_capture, 137 int *rstate); 138 int lx_stream_sample_position(struct lx6464es *chip, u32 pipe, int is_capture, 139 u64 *r_bytepos); 140 141 int lx_stream_set_state(struct lx6464es *chip, u32 pipe, 142 int is_capture, enum stream_state_t state); 143 144 static inline int lx_stream_start(struct lx6464es *chip, u32 pipe, 145 int is_capture) 146 { 147 snd_printdd("->lx_stream_start\n"); 148 return lx_stream_set_state(chip, pipe, is_capture, SSTATE_RUN); 149 } 150 151 static inline int lx_stream_pause(struct lx6464es *chip, u32 pipe, 152 int is_capture) 153 { 154 snd_printdd("->lx_stream_pause\n"); 155 return lx_stream_set_state(chip, pipe, is_capture, SSTATE_PAUSE); 156 } 157 158 static inline int lx_stream_stop(struct lx6464es *chip, u32 pipe, 159 int is_capture) 160 { 161 snd_printdd("->lx_stream_stop\n"); 162 return lx_stream_set_state(chip, pipe, is_capture, SSTATE_STOP); 163 } 164 165 /* low-level buffer handling */ 166 int lx_buffer_ask(struct lx6464es *chip, u32 pipe, int is_capture, 167 u32 *r_needed, u32 *r_freed, u32 *size_array); 168 int lx_buffer_give(struct lx6464es *chip, u32 pipe, int is_capture, 169 u32 buffer_size, u32 buf_address_lo, u32 buf_address_hi, 170 u32 *r_buffer_index); 171 int lx_buffer_free(struct lx6464es *chip, u32 pipe, int is_capture, 172 u32 *r_buffer_size); 173 int lx_buffer_cancel(struct lx6464es *chip, u32 pipe, int is_capture, 174 u32 buffer_index); 175 176 /* low-level gain/peak handling */ 177 int lx_level_unmute(struct lx6464es *chip, int is_capture, int unmute); 178 int lx_level_peaks(struct lx6464es *chip, int is_capture, int channels, 179 u32 *r_levels); 180 181 182 /* interrupt handling */ 183 irqreturn_t lx_interrupt(int irq, void *dev_id); 184 irqreturn_t lx_threaded_irq(int irq, void *dev_id); 185 void lx_irq_enable(struct lx6464es *chip); 186 void lx_irq_disable(struct lx6464es *chip); 187 188 189 /* Stream Format Header Defines (for LIN and IEEE754) */ 190 #define HEADER_FMT_BASE HEADER_FMT_BASE_LIN 191 #define HEADER_FMT_BASE_LIN 0xFED00000 192 #define HEADER_FMT_BASE_FLOAT 0xFAD00000 193 #define HEADER_FMT_MONO 0x00000080 /* bit 23 in header_lo. WARNING: old 194 * bit 22 is ignored in float 195 * format */ 196 #define HEADER_FMT_INTEL 0x00008000 197 #define HEADER_FMT_16BITS 0x00002000 198 #define HEADER_FMT_24BITS 0x00004000 199 #define HEADER_FMT_UPTO11 0x00000200 /* frequency is less or equ. to 11k. 200 * */ 201 #define HEADER_FMT_UPTO32 0x00000100 /* frequency is over 11k and less 202 * then 32k.*/ 203 204 205 #define BIT_FMP_HEADER 23 206 #define BIT_FMP_SD 22 207 #define BIT_FMP_MULTICHANNEL 19 208 209 #define START_STATE 1 210 #define PAUSE_STATE 0 211 212 213 214 215 216 /* from PcxAll_e.h */ 217 /* Start/Pause condition for pipes (PCXStartPipe, PCXPausePipe) */ 218 #define START_PAUSE_IMMEDIATE 0 219 #define START_PAUSE_ON_SYNCHRO 1 220 #define START_PAUSE_ON_TIME_CODE 2 221 222 223 /* Pipe / Stream state */ 224 #define START_STATE 1 225 #define PAUSE_STATE 0 226 227 static inline void unpack_pointer(dma_addr_t ptr, u32 *r_low, u32 *r_high) 228 { 229 *r_low = (u32)(ptr & 0xffffffff); 230 #if BITS_PER_LONG == 32 231 *r_high = 0; 232 #else 233 *r_high = (u32)((u64)ptr>>32); 234 #endif 235 } 236 237 #endif /* LX_CORE_H */ 238