1 /* 2 * ALSA driver for ICEnsemble VT1724 (Envy24HT) 3 * 4 * Lowlevel functions for Audiotrak Prodigy 7.1 Hifi 5 * based on pontis.c 6 * 7 * Copyright (c) 2007 Julian Scheel <julian@jusst.de> 8 * Copyright (c) 2007 allank 9 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or 14 * (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24 * 25 */ 26 27 28 #include <linux/delay.h> 29 #include <linux/interrupt.h> 30 #include <linux/init.h> 31 #include <linux/slab.h> 32 #include <linux/mutex.h> 33 34 #include <sound/core.h> 35 #include <sound/info.h> 36 #include <sound/tlv.h> 37 38 #include "ice1712.h" 39 #include "envy24ht.h" 40 #include "prodigy_hifi.h" 41 42 struct prodigy_hifi_spec { 43 unsigned short master[2]; 44 unsigned short vol[8]; 45 }; 46 47 /* I2C addresses */ 48 #define WM_DEV 0x34 49 50 /* WM8776 registers */ 51 #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */ 52 #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */ 53 #define WM_HP_MASTER 0x02 /* headphone master (both channels), 54 override LLR */ 55 #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */ 56 #define WM_DAC_ATTEN_R 0x04 57 #define WM_DAC_MASTER 0x05 58 #define WM_PHASE_SWAP 0x06 /* DAC phase swap */ 59 #define WM_DAC_CTRL1 0x07 60 #define WM_DAC_MUTE 0x08 61 #define WM_DAC_CTRL2 0x09 62 #define WM_DAC_INT 0x0a 63 #define WM_ADC_INT 0x0b 64 #define WM_MASTER_CTRL 0x0c 65 #define WM_POWERDOWN 0x0d 66 #define WM_ADC_ATTEN_L 0x0e 67 #define WM_ADC_ATTEN_R 0x0f 68 #define WM_ALC_CTRL1 0x10 69 #define WM_ALC_CTRL2 0x11 70 #define WM_ALC_CTRL3 0x12 71 #define WM_NOISE_GATE 0x13 72 #define WM_LIMITER 0x14 73 #define WM_ADC_MUX 0x15 74 #define WM_OUT_MUX 0x16 75 #define WM_RESET 0x17 76 77 /* Analog Recording Source :- Mic, LineIn, CD/Video, */ 78 79 /* implement capture source select control for WM8776 */ 80 81 #define WM_AIN1 "AIN1" 82 #define WM_AIN2 "AIN2" 83 #define WM_AIN3 "AIN3" 84 #define WM_AIN4 "AIN4" 85 #define WM_AIN5 "AIN5" 86 87 /* GPIO pins of envy24ht connected to wm8766 */ 88 #define WM8766_SPI_CLK (1<<17) /* CLK, Pin97 on ICE1724 */ 89 #define WM8766_SPI_MD (1<<16) /* DATA VT1724 -> WM8766, Pin96 */ 90 #define WM8766_SPI_ML (1<<18) /* Latch, Pin98 */ 91 92 /* WM8766 registers */ 93 #define WM8766_DAC_CTRL 0x02 /* DAC Control */ 94 #define WM8766_INT_CTRL 0x03 /* Interface Control */ 95 #define WM8766_DAC_CTRL2 0x09 96 #define WM8766_DAC_CTRL3 0x0a 97 #define WM8766_RESET 0x1f 98 #define WM8766_LDA1 0x00 99 #define WM8766_LDA2 0x04 100 #define WM8766_LDA3 0x06 101 #define WM8766_RDA1 0x01 102 #define WM8766_RDA2 0x05 103 #define WM8766_RDA3 0x07 104 #define WM8766_MUTE1 0x0C 105 #define WM8766_MUTE2 0x0F 106 107 108 /* 109 * Prodigy HD2 110 */ 111 #define AK4396_ADDR 0x00 112 #define AK4396_CSN (1 << 8) /* CSN->GPIO8, pin 75 */ 113 #define AK4396_CCLK (1 << 9) /* CCLK->GPIO9, pin 76 */ 114 #define AK4396_CDTI (1 << 10) /* CDTI->GPIO10, pin 77 */ 115 116 /* ak4396 registers */ 117 #define AK4396_CTRL1 0x00 118 #define AK4396_CTRL2 0x01 119 #define AK4396_CTRL3 0x02 120 #define AK4396_LCH_ATT 0x03 121 #define AK4396_RCH_ATT 0x04 122 123 124 /* 125 * get the current register value of WM codec 126 */ 127 static unsigned short wm_get(struct snd_ice1712 *ice, int reg) 128 { 129 reg <<= 1; 130 return ((unsigned short)ice->akm[0].images[reg] << 8) | 131 ice->akm[0].images[reg + 1]; 132 } 133 134 /* 135 * set the register value of WM codec and remember it 136 */ 137 static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) 138 { 139 unsigned short cval; 140 cval = (reg << 9) | val; 141 snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff); 142 } 143 144 static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) 145 { 146 wm_put_nocache(ice, reg, val); 147 reg <<= 1; 148 ice->akm[0].images[reg] = val >> 8; 149 ice->akm[0].images[reg + 1] = val; 150 } 151 152 /* 153 * write data in the SPI mode 154 */ 155 156 static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val) 157 { 158 unsigned int tmp = snd_ice1712_gpio_read(ice); 159 if (val) 160 tmp |= bit; 161 else 162 tmp &= ~bit; 163 snd_ice1712_gpio_write(ice, tmp); 164 } 165 166 /* 167 * SPI implementation for WM8766 codec - only writing supported, no readback 168 */ 169 170 static void wm8766_spi_send_word(struct snd_ice1712 *ice, unsigned int data) 171 { 172 int i; 173 for (i = 0; i < 16; i++) { 174 set_gpio_bit(ice, WM8766_SPI_CLK, 0); 175 udelay(1); 176 set_gpio_bit(ice, WM8766_SPI_MD, data & 0x8000); 177 udelay(1); 178 set_gpio_bit(ice, WM8766_SPI_CLK, 1); 179 udelay(1); 180 data <<= 1; 181 } 182 } 183 184 static void wm8766_spi_write(struct snd_ice1712 *ice, unsigned int reg, 185 unsigned int data) 186 { 187 unsigned int block; 188 189 snd_ice1712_gpio_set_dir(ice, WM8766_SPI_MD| 190 WM8766_SPI_CLK|WM8766_SPI_ML); 191 snd_ice1712_gpio_set_mask(ice, ~(WM8766_SPI_MD| 192 WM8766_SPI_CLK|WM8766_SPI_ML)); 193 /* latch must be low when writing */ 194 set_gpio_bit(ice, WM8766_SPI_ML, 0); 195 block = (reg << 9) | (data & 0x1ff); 196 wm8766_spi_send_word(ice, block); /* REGISTER ADDRESS */ 197 /* release latch */ 198 set_gpio_bit(ice, WM8766_SPI_ML, 1); 199 udelay(1); 200 /* restore */ 201 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 202 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 203 } 204 205 206 /* 207 * serial interface for ak4396 - only writing supported, no readback 208 */ 209 210 static void ak4396_send_word(struct snd_ice1712 *ice, unsigned int data) 211 { 212 int i; 213 for (i = 0; i < 16; i++) { 214 set_gpio_bit(ice, AK4396_CCLK, 0); 215 udelay(1); 216 set_gpio_bit(ice, AK4396_CDTI, data & 0x8000); 217 udelay(1); 218 set_gpio_bit(ice, AK4396_CCLK, 1); 219 udelay(1); 220 data <<= 1; 221 } 222 } 223 224 static void ak4396_write(struct snd_ice1712 *ice, unsigned int reg, 225 unsigned int data) 226 { 227 unsigned int block; 228 229 snd_ice1712_gpio_set_dir(ice, AK4396_CSN|AK4396_CCLK|AK4396_CDTI); 230 snd_ice1712_gpio_set_mask(ice, ~(AK4396_CSN|AK4396_CCLK|AK4396_CDTI)); 231 /* latch must be low when writing */ 232 set_gpio_bit(ice, AK4396_CSN, 0); 233 block = ((AK4396_ADDR & 0x03) << 14) | (1 << 13) | 234 ((reg & 0x1f) << 8) | (data & 0xff); 235 ak4396_send_word(ice, block); /* REGISTER ADDRESS */ 236 /* release latch */ 237 set_gpio_bit(ice, AK4396_CSN, 1); 238 udelay(1); 239 /* restore */ 240 snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask); 241 snd_ice1712_gpio_set_dir(ice, ice->gpio.direction); 242 } 243 244 245 /* 246 * ak4396 mixers 247 */ 248 249 250 251 /* 252 * DAC volume attenuation mixer control (-64dB to 0dB) 253 */ 254 255 static int ak4396_dac_vol_info(struct snd_kcontrol *kcontrol, 256 struct snd_ctl_elem_info *uinfo) 257 { 258 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 259 uinfo->count = 2; 260 uinfo->value.integer.min = 0; /* mute */ 261 uinfo->value.integer.max = 0xFF; /* linear */ 262 return 0; 263 } 264 265 static int ak4396_dac_vol_get(struct snd_kcontrol *kcontrol, 266 struct snd_ctl_elem_value *ucontrol) 267 { 268 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 269 struct prodigy_hifi_spec *spec = ice->spec; 270 int i; 271 272 for (i = 0; i < 2; i++) 273 ucontrol->value.integer.value[i] = spec->vol[i]; 274 275 return 0; 276 } 277 278 static int ak4396_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 279 { 280 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 281 struct prodigy_hifi_spec *spec = ice->spec; 282 int i; 283 int change = 0; 284 285 mutex_lock(&ice->gpio_mutex); 286 for (i = 0; i < 2; i++) { 287 if (ucontrol->value.integer.value[i] != spec->vol[i]) { 288 spec->vol[i] = ucontrol->value.integer.value[i]; 289 ak4396_write(ice, AK4396_LCH_ATT + i, 290 spec->vol[i] & 0xff); 291 change = 1; 292 } 293 } 294 mutex_unlock(&ice->gpio_mutex); 295 return change; 296 } 297 298 static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1); 299 static const DECLARE_TLV_DB_LINEAR(ak4396_db_scale, TLV_DB_GAIN_MUTE, 0); 300 301 static struct snd_kcontrol_new prodigy_hd2_controls[] = { 302 { 303 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 304 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 305 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 306 .name = "Front Playback Volume", 307 .info = ak4396_dac_vol_info, 308 .get = ak4396_dac_vol_get, 309 .put = ak4396_dac_vol_put, 310 .tlv = { .p = ak4396_db_scale }, 311 }, 312 }; 313 314 315 /* --------------- */ 316 317 #define WM_VOL_MAX 255 318 #define WM_VOL_MUTE 0x8000 319 320 321 #define DAC_0dB 0xff 322 #define DAC_RES 128 323 #define DAC_MIN (DAC_0dB - DAC_RES) 324 325 326 static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, 327 unsigned short vol, unsigned short master) 328 { 329 unsigned char nvol; 330 331 if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) 332 nvol = 0; 333 else { 334 nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128) 335 & WM_VOL_MAX; 336 nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff; 337 } 338 339 wm_put(ice, index, nvol); 340 wm_put_nocache(ice, index, 0x100 | nvol); 341 } 342 343 static void wm8766_set_vol(struct snd_ice1712 *ice, unsigned int index, 344 unsigned short vol, unsigned short master) 345 { 346 unsigned char nvol; 347 348 if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) 349 nvol = 0; 350 else { 351 nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128) 352 & WM_VOL_MAX; 353 nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff; 354 } 355 356 wm8766_spi_write(ice, index, (0x0100 | nvol)); 357 } 358 359 360 /* 361 * DAC volume attenuation mixer control (-64dB to 0dB) 362 */ 363 364 static int wm_dac_vol_info(struct snd_kcontrol *kcontrol, 365 struct snd_ctl_elem_info *uinfo) 366 { 367 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 368 uinfo->count = 2; 369 uinfo->value.integer.min = 0; /* mute */ 370 uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */ 371 return 0; 372 } 373 374 static int wm_dac_vol_get(struct snd_kcontrol *kcontrol, 375 struct snd_ctl_elem_value *ucontrol) 376 { 377 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 378 struct prodigy_hifi_spec *spec = ice->spec; 379 int i; 380 381 for (i = 0; i < 2; i++) 382 ucontrol->value.integer.value[i] = 383 spec->vol[2 + i] & ~WM_VOL_MUTE; 384 return 0; 385 } 386 387 static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 388 { 389 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 390 struct prodigy_hifi_spec *spec = ice->spec; 391 int i, idx, change = 0; 392 393 mutex_lock(&ice->gpio_mutex); 394 for (i = 0; i < 2; i++) { 395 if (ucontrol->value.integer.value[i] != spec->vol[2 + i]) { 396 idx = WM_DAC_ATTEN_L + i; 397 spec->vol[2 + i] &= WM_VOL_MUTE; 398 spec->vol[2 + i] |= ucontrol->value.integer.value[i]; 399 wm_set_vol(ice, idx, spec->vol[2 + i], spec->master[i]); 400 change = 1; 401 } 402 } 403 mutex_unlock(&ice->gpio_mutex); 404 return change; 405 } 406 407 408 /* 409 * WM8766 DAC volume attenuation mixer control 410 */ 411 static int wm8766_vol_info(struct snd_kcontrol *kcontrol, 412 struct snd_ctl_elem_info *uinfo) 413 { 414 int voices = kcontrol->private_value >> 8; 415 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 416 uinfo->count = voices; 417 uinfo->value.integer.min = 0; /* mute */ 418 uinfo->value.integer.max = DAC_RES; /* 0dB */ 419 return 0; 420 } 421 422 static int wm8766_vol_get(struct snd_kcontrol *kcontrol, 423 struct snd_ctl_elem_value *ucontrol) 424 { 425 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 426 struct prodigy_hifi_spec *spec = ice->spec; 427 int i, ofs, voices; 428 429 voices = kcontrol->private_value >> 8; 430 ofs = kcontrol->private_value & 0xff; 431 for (i = 0; i < voices; i++) 432 ucontrol->value.integer.value[i] = spec->vol[ofs + i]; 433 return 0; 434 } 435 436 static int wm8766_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 437 { 438 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 439 struct prodigy_hifi_spec *spec = ice->spec; 440 int i, idx, ofs, voices; 441 int change = 0; 442 443 voices = kcontrol->private_value >> 8; 444 ofs = kcontrol->private_value & 0xff; 445 mutex_lock(&ice->gpio_mutex); 446 for (i = 0; i < voices; i++) { 447 if (ucontrol->value.integer.value[i] != spec->vol[ofs + i]) { 448 idx = WM8766_LDA1 + ofs + i; 449 spec->vol[ofs + i] &= WM_VOL_MUTE; 450 spec->vol[ofs + i] |= ucontrol->value.integer.value[i]; 451 wm8766_set_vol(ice, idx, 452 spec->vol[ofs + i], spec->master[i]); 453 change = 1; 454 } 455 } 456 mutex_unlock(&ice->gpio_mutex); 457 return change; 458 } 459 460 /* 461 * Master volume attenuation mixer control / applied to WM8776+WM8766 462 */ 463 static int wm_master_vol_info(struct snd_kcontrol *kcontrol, 464 struct snd_ctl_elem_info *uinfo) 465 { 466 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 467 uinfo->count = 2; 468 uinfo->value.integer.min = 0; 469 uinfo->value.integer.max = DAC_RES; 470 return 0; 471 } 472 473 static int wm_master_vol_get(struct snd_kcontrol *kcontrol, 474 struct snd_ctl_elem_value *ucontrol) 475 { 476 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 477 struct prodigy_hifi_spec *spec = ice->spec; 478 int i; 479 for (i = 0; i < 2; i++) 480 ucontrol->value.integer.value[i] = spec->master[i]; 481 return 0; 482 } 483 484 static int wm_master_vol_put(struct snd_kcontrol *kcontrol, 485 struct snd_ctl_elem_value *ucontrol) 486 { 487 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 488 struct prodigy_hifi_spec *spec = ice->spec; 489 int ch, change = 0; 490 491 mutex_lock(&ice->gpio_mutex); 492 for (ch = 0; ch < 2; ch++) { 493 if (ucontrol->value.integer.value[ch] != spec->master[ch]) { 494 spec->master[ch] = ucontrol->value.integer.value[ch]; 495 496 /* Apply to front DAC */ 497 wm_set_vol(ice, WM_DAC_ATTEN_L + ch, 498 spec->vol[2 + ch], spec->master[ch]); 499 500 wm8766_set_vol(ice, WM8766_LDA1 + ch, 501 spec->vol[0 + ch], spec->master[ch]); 502 503 wm8766_set_vol(ice, WM8766_LDA2 + ch, 504 spec->vol[4 + ch], spec->master[ch]); 505 506 wm8766_set_vol(ice, WM8766_LDA3 + ch, 507 spec->vol[6 + ch], spec->master[ch]); 508 change = 1; 509 } 510 } 511 mutex_unlock(&ice->gpio_mutex); 512 return change; 513 } 514 515 516 /* KONSTI */ 517 518 static int wm_adc_mux_enum_info(struct snd_kcontrol *kcontrol, 519 struct snd_ctl_elem_info *uinfo) 520 { 521 static const char * const texts[32] = { 522 "NULL", WM_AIN1, WM_AIN2, WM_AIN1 "+" WM_AIN2, 523 WM_AIN3, WM_AIN1 "+" WM_AIN3, WM_AIN2 "+" WM_AIN3, 524 WM_AIN1 "+" WM_AIN2 "+" WM_AIN3, 525 WM_AIN4, WM_AIN1 "+" WM_AIN4, WM_AIN2 "+" WM_AIN4, 526 WM_AIN1 "+" WM_AIN2 "+" WM_AIN4, 527 WM_AIN3 "+" WM_AIN4, WM_AIN1 "+" WM_AIN3 "+" WM_AIN4, 528 WM_AIN2 "+" WM_AIN3 "+" WM_AIN4, 529 WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4, 530 WM_AIN5, WM_AIN1 "+" WM_AIN5, WM_AIN2 "+" WM_AIN5, 531 WM_AIN1 "+" WM_AIN2 "+" WM_AIN5, 532 WM_AIN3 "+" WM_AIN5, WM_AIN1 "+" WM_AIN3 "+" WM_AIN5, 533 WM_AIN2 "+" WM_AIN3 "+" WM_AIN5, 534 WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN5, 535 WM_AIN4 "+" WM_AIN5, WM_AIN1 "+" WM_AIN4 "+" WM_AIN5, 536 WM_AIN2 "+" WM_AIN4 "+" WM_AIN5, 537 WM_AIN1 "+" WM_AIN2 "+" WM_AIN4 "+" WM_AIN5, 538 WM_AIN3 "+" WM_AIN4 "+" WM_AIN5, 539 WM_AIN1 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5, 540 WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5, 541 WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5 542 }; 543 544 return snd_ctl_enum_info(uinfo, 1, 32, texts); 545 } 546 547 static int wm_adc_mux_enum_get(struct snd_kcontrol *kcontrol, 548 struct snd_ctl_elem_value *ucontrol) 549 { 550 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 551 552 mutex_lock(&ice->gpio_mutex); 553 ucontrol->value.integer.value[0] = wm_get(ice, WM_ADC_MUX) & 0x1f; 554 mutex_unlock(&ice->gpio_mutex); 555 return 0; 556 } 557 558 static int wm_adc_mux_enum_put(struct snd_kcontrol *kcontrol, 559 struct snd_ctl_elem_value *ucontrol) 560 { 561 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 562 unsigned short oval, nval; 563 int change = 0; 564 565 mutex_lock(&ice->gpio_mutex); 566 oval = wm_get(ice, WM_ADC_MUX); 567 nval = (oval & 0xe0) | ucontrol->value.integer.value[0]; 568 if (nval != oval) { 569 wm_put(ice, WM_ADC_MUX, nval); 570 change = 1; 571 } 572 mutex_unlock(&ice->gpio_mutex); 573 return change; 574 } 575 576 /* KONSTI */ 577 578 /* 579 * ADC gain mixer control (-64dB to 0dB) 580 */ 581 582 #define ADC_0dB 0xcf 583 #define ADC_RES 128 584 #define ADC_MIN (ADC_0dB - ADC_RES) 585 586 static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, 587 struct snd_ctl_elem_info *uinfo) 588 { 589 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 590 uinfo->count = 2; 591 uinfo->value.integer.min = 0; /* mute (-64dB) */ 592 uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */ 593 return 0; 594 } 595 596 static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, 597 struct snd_ctl_elem_value *ucontrol) 598 { 599 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 600 unsigned short val; 601 int i; 602 603 mutex_lock(&ice->gpio_mutex); 604 for (i = 0; i < 2; i++) { 605 val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff; 606 val = val > ADC_MIN ? (val - ADC_MIN) : 0; 607 ucontrol->value.integer.value[i] = val; 608 } 609 mutex_unlock(&ice->gpio_mutex); 610 return 0; 611 } 612 613 static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, 614 struct snd_ctl_elem_value *ucontrol) 615 { 616 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 617 unsigned short ovol, nvol; 618 int i, idx, change = 0; 619 620 mutex_lock(&ice->gpio_mutex); 621 for (i = 0; i < 2; i++) { 622 nvol = ucontrol->value.integer.value[i]; 623 nvol = nvol ? (nvol + ADC_MIN) : 0; 624 idx = WM_ADC_ATTEN_L + i; 625 ovol = wm_get(ice, idx) & 0xff; 626 if (ovol != nvol) { 627 wm_put(ice, idx, nvol); 628 change = 1; 629 } 630 } 631 mutex_unlock(&ice->gpio_mutex); 632 return change; 633 } 634 635 /* 636 * ADC input mux mixer control 637 */ 638 #define wm_adc_mux_info snd_ctl_boolean_mono_info 639 640 static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, 641 struct snd_ctl_elem_value *ucontrol) 642 { 643 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 644 int bit = kcontrol->private_value; 645 646 mutex_lock(&ice->gpio_mutex); 647 ucontrol->value.integer.value[0] = 648 (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0; 649 mutex_unlock(&ice->gpio_mutex); 650 return 0; 651 } 652 653 static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, 654 struct snd_ctl_elem_value *ucontrol) 655 { 656 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 657 int bit = kcontrol->private_value; 658 unsigned short oval, nval; 659 int change; 660 661 mutex_lock(&ice->gpio_mutex); 662 nval = oval = wm_get(ice, WM_ADC_MUX); 663 if (ucontrol->value.integer.value[0]) 664 nval |= (1 << bit); 665 else 666 nval &= ~(1 << bit); 667 change = nval != oval; 668 if (change) { 669 wm_put(ice, WM_ADC_MUX, nval); 670 } 671 mutex_unlock(&ice->gpio_mutex); 672 return 0; 673 } 674 675 /* 676 * Analog bypass (In -> Out) 677 */ 678 #define wm_bypass_info snd_ctl_boolean_mono_info 679 680 static int wm_bypass_get(struct snd_kcontrol *kcontrol, 681 struct snd_ctl_elem_value *ucontrol) 682 { 683 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 684 685 mutex_lock(&ice->gpio_mutex); 686 ucontrol->value.integer.value[0] = 687 (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0; 688 mutex_unlock(&ice->gpio_mutex); 689 return 0; 690 } 691 692 static int wm_bypass_put(struct snd_kcontrol *kcontrol, 693 struct snd_ctl_elem_value *ucontrol) 694 { 695 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 696 unsigned short val, oval; 697 int change = 0; 698 699 mutex_lock(&ice->gpio_mutex); 700 val = oval = wm_get(ice, WM_OUT_MUX); 701 if (ucontrol->value.integer.value[0]) 702 val |= 0x04; 703 else 704 val &= ~0x04; 705 if (val != oval) { 706 wm_put(ice, WM_OUT_MUX, val); 707 change = 1; 708 } 709 mutex_unlock(&ice->gpio_mutex); 710 return change; 711 } 712 713 /* 714 * Left/Right swap 715 */ 716 #define wm_chswap_info snd_ctl_boolean_mono_info 717 718 static int wm_chswap_get(struct snd_kcontrol *kcontrol, 719 struct snd_ctl_elem_value *ucontrol) 720 { 721 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 722 723 mutex_lock(&ice->gpio_mutex); 724 ucontrol->value.integer.value[0] = 725 (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90; 726 mutex_unlock(&ice->gpio_mutex); 727 return 0; 728 } 729 730 static int wm_chswap_put(struct snd_kcontrol *kcontrol, 731 struct snd_ctl_elem_value *ucontrol) 732 { 733 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 734 unsigned short val, oval; 735 int change = 0; 736 737 mutex_lock(&ice->gpio_mutex); 738 oval = wm_get(ice, WM_DAC_CTRL1); 739 val = oval & 0x0f; 740 if (ucontrol->value.integer.value[0]) 741 val |= 0x60; 742 else 743 val |= 0x90; 744 if (val != oval) { 745 wm_put(ice, WM_DAC_CTRL1, val); 746 wm_put_nocache(ice, WM_DAC_CTRL1, val); 747 change = 1; 748 } 749 mutex_unlock(&ice->gpio_mutex); 750 return change; 751 } 752 753 754 /* 755 * mixers 756 */ 757 758 static struct snd_kcontrol_new prodigy_hifi_controls[] = { 759 { 760 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 761 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 762 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 763 .name = "Master Playback Volume", 764 .info = wm_master_vol_info, 765 .get = wm_master_vol_get, 766 .put = wm_master_vol_put, 767 .tlv = { .p = db_scale_wm_dac } 768 }, 769 { 770 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 771 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 772 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 773 .name = "Front Playback Volume", 774 .info = wm_dac_vol_info, 775 .get = wm_dac_vol_get, 776 .put = wm_dac_vol_put, 777 .tlv = { .p = db_scale_wm_dac }, 778 }, 779 { 780 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 781 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 782 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 783 .name = "Rear Playback Volume", 784 .info = wm8766_vol_info, 785 .get = wm8766_vol_get, 786 .put = wm8766_vol_put, 787 .private_value = (2 << 8) | 0, 788 .tlv = { .p = db_scale_wm_dac }, 789 }, 790 { 791 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 792 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 793 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 794 .name = "Center Playback Volume", 795 .info = wm8766_vol_info, 796 .get = wm8766_vol_get, 797 .put = wm8766_vol_put, 798 .private_value = (1 << 8) | 4, 799 .tlv = { .p = db_scale_wm_dac } 800 }, 801 { 802 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 803 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 804 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 805 .name = "LFE Playback Volume", 806 .info = wm8766_vol_info, 807 .get = wm8766_vol_get, 808 .put = wm8766_vol_put, 809 .private_value = (1 << 8) | 5, 810 .tlv = { .p = db_scale_wm_dac } 811 }, 812 { 813 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 814 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 815 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 816 .name = "Side Playback Volume", 817 .info = wm8766_vol_info, 818 .get = wm8766_vol_get, 819 .put = wm8766_vol_put, 820 .private_value = (2 << 8) | 6, 821 .tlv = { .p = db_scale_wm_dac }, 822 }, 823 { 824 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 825 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 826 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 827 .name = "Capture Volume", 828 .info = wm_adc_vol_info, 829 .get = wm_adc_vol_get, 830 .put = wm_adc_vol_put, 831 .tlv = { .p = db_scale_wm_dac }, 832 }, 833 { 834 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 835 .name = "CD Capture Switch", 836 .info = wm_adc_mux_info, 837 .get = wm_adc_mux_get, 838 .put = wm_adc_mux_put, 839 .private_value = 0, 840 }, 841 { 842 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 843 .name = "Line Capture Switch", 844 .info = wm_adc_mux_info, 845 .get = wm_adc_mux_get, 846 .put = wm_adc_mux_put, 847 .private_value = 1, 848 }, 849 { 850 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 851 .name = "Analog Bypass Switch", 852 .info = wm_bypass_info, 853 .get = wm_bypass_get, 854 .put = wm_bypass_put, 855 }, 856 { 857 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 858 .name = "Swap Output Channels", 859 .info = wm_chswap_info, 860 .get = wm_chswap_get, 861 .put = wm_chswap_put, 862 }, 863 { 864 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 865 .name = "Analog Capture Source", 866 .info = wm_adc_mux_enum_info, 867 .get = wm_adc_mux_enum_get, 868 .put = wm_adc_mux_enum_put, 869 }, 870 }; 871 872 /* 873 * WM codec registers 874 */ 875 static void wm_proc_regs_write(struct snd_info_entry *entry, 876 struct snd_info_buffer *buffer) 877 { 878 struct snd_ice1712 *ice = entry->private_data; 879 char line[64]; 880 unsigned int reg, val; 881 mutex_lock(&ice->gpio_mutex); 882 while (!snd_info_get_line(buffer, line, sizeof(line))) { 883 if (sscanf(line, "%x %x", ®, &val) != 2) 884 continue; 885 if (reg <= 0x17 && val <= 0xffff) 886 wm_put(ice, reg, val); 887 } 888 mutex_unlock(&ice->gpio_mutex); 889 } 890 891 static void wm_proc_regs_read(struct snd_info_entry *entry, 892 struct snd_info_buffer *buffer) 893 { 894 struct snd_ice1712 *ice = entry->private_data; 895 int reg, val; 896 897 mutex_lock(&ice->gpio_mutex); 898 for (reg = 0; reg <= 0x17; reg++) { 899 val = wm_get(ice, reg); 900 snd_iprintf(buffer, "%02x = %04x\n", reg, val); 901 } 902 mutex_unlock(&ice->gpio_mutex); 903 } 904 905 static void wm_proc_init(struct snd_ice1712 *ice) 906 { 907 struct snd_info_entry *entry; 908 if (!snd_card_proc_new(ice->card, "wm_codec", &entry)) { 909 snd_info_set_text_ops(entry, ice, wm_proc_regs_read); 910 entry->mode |= 0200; 911 entry->c.text.write = wm_proc_regs_write; 912 } 913 } 914 915 static int prodigy_hifi_add_controls(struct snd_ice1712 *ice) 916 { 917 unsigned int i; 918 int err; 919 920 for (i = 0; i < ARRAY_SIZE(prodigy_hifi_controls); i++) { 921 err = snd_ctl_add(ice->card, 922 snd_ctl_new1(&prodigy_hifi_controls[i], ice)); 923 if (err < 0) 924 return err; 925 } 926 927 wm_proc_init(ice); 928 929 return 0; 930 } 931 932 static int prodigy_hd2_add_controls(struct snd_ice1712 *ice) 933 { 934 unsigned int i; 935 int err; 936 937 for (i = 0; i < ARRAY_SIZE(prodigy_hd2_controls); i++) { 938 err = snd_ctl_add(ice->card, 939 snd_ctl_new1(&prodigy_hd2_controls[i], ice)); 940 if (err < 0) 941 return err; 942 } 943 944 wm_proc_init(ice); 945 946 return 0; 947 } 948 949 static void wm8766_init(struct snd_ice1712 *ice) 950 { 951 static unsigned short wm8766_inits[] = { 952 WM8766_RESET, 0x0000, 953 WM8766_DAC_CTRL, 0x0120, 954 WM8766_INT_CTRL, 0x0022, /* I2S Normal Mode, 24 bit */ 955 WM8766_DAC_CTRL2, 0x0001, 956 WM8766_DAC_CTRL3, 0x0080, 957 WM8766_LDA1, 0x0100, 958 WM8766_LDA2, 0x0100, 959 WM8766_LDA3, 0x0100, 960 WM8766_RDA1, 0x0100, 961 WM8766_RDA2, 0x0100, 962 WM8766_RDA3, 0x0100, 963 WM8766_MUTE1, 0x0000, 964 WM8766_MUTE2, 0x0000, 965 }; 966 unsigned int i; 967 968 for (i = 0; i < ARRAY_SIZE(wm8766_inits); i += 2) 969 wm8766_spi_write(ice, wm8766_inits[i], wm8766_inits[i + 1]); 970 } 971 972 static void wm8776_init(struct snd_ice1712 *ice) 973 { 974 static unsigned short wm8776_inits[] = { 975 /* These come first to reduce init pop noise */ 976 WM_ADC_MUX, 0x0003, /* ADC mute */ 977 /* 0x00c0 replaced by 0x0003 */ 978 979 WM_DAC_MUTE, 0x0001, /* DAC softmute */ 980 WM_DAC_CTRL1, 0x0000, /* DAC mute */ 981 982 WM_POWERDOWN, 0x0008, /* All power-up except HP */ 983 WM_RESET, 0x0000, /* reset */ 984 }; 985 unsigned int i; 986 987 for (i = 0; i < ARRAY_SIZE(wm8776_inits); i += 2) 988 wm_put(ice, wm8776_inits[i], wm8776_inits[i + 1]); 989 } 990 991 #ifdef CONFIG_PM_SLEEP 992 static int prodigy_hifi_resume(struct snd_ice1712 *ice) 993 { 994 static unsigned short wm8776_reinit_registers[] = { 995 WM_MASTER_CTRL, 996 WM_DAC_INT, 997 WM_ADC_INT, 998 WM_OUT_MUX, 999 WM_HP_ATTEN_L, 1000 WM_HP_ATTEN_R, 1001 WM_PHASE_SWAP, 1002 WM_DAC_CTRL2, 1003 WM_ADC_ATTEN_L, 1004 WM_ADC_ATTEN_R, 1005 WM_ALC_CTRL1, 1006 WM_ALC_CTRL2, 1007 WM_ALC_CTRL3, 1008 WM_NOISE_GATE, 1009 WM_ADC_MUX, 1010 /* no DAC attenuation here */ 1011 }; 1012 struct prodigy_hifi_spec *spec = ice->spec; 1013 int i, ch; 1014 1015 mutex_lock(&ice->gpio_mutex); 1016 1017 /* reinitialize WM8776 and re-apply old register values */ 1018 wm8776_init(ice); 1019 schedule_timeout_uninterruptible(1); 1020 for (i = 0; i < ARRAY_SIZE(wm8776_reinit_registers); i++) 1021 wm_put(ice, wm8776_reinit_registers[i], 1022 wm_get(ice, wm8776_reinit_registers[i])); 1023 1024 /* reinitialize WM8766 and re-apply volumes for all DACs */ 1025 wm8766_init(ice); 1026 for (ch = 0; ch < 2; ch++) { 1027 wm_set_vol(ice, WM_DAC_ATTEN_L + ch, 1028 spec->vol[2 + ch], spec->master[ch]); 1029 1030 wm8766_set_vol(ice, WM8766_LDA1 + ch, 1031 spec->vol[0 + ch], spec->master[ch]); 1032 1033 wm8766_set_vol(ice, WM8766_LDA2 + ch, 1034 spec->vol[4 + ch], spec->master[ch]); 1035 1036 wm8766_set_vol(ice, WM8766_LDA3 + ch, 1037 spec->vol[6 + ch], spec->master[ch]); 1038 } 1039 1040 /* unmute WM8776 DAC */ 1041 wm_put(ice, WM_DAC_MUTE, 0x00); 1042 wm_put(ice, WM_DAC_CTRL1, 0x90); 1043 1044 mutex_unlock(&ice->gpio_mutex); 1045 return 0; 1046 } 1047 #endif 1048 1049 /* 1050 * initialize the chip 1051 */ 1052 static int prodigy_hifi_init(struct snd_ice1712 *ice) 1053 { 1054 static unsigned short wm8776_defaults[] = { 1055 WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */ 1056 WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 1057 WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */ 1058 WM_DAC_CTRL1, 0x0090, /* DAC L/R */ 1059 WM_OUT_MUX, 0x0001, /* OUT DAC */ 1060 WM_HP_ATTEN_L, 0x0179, /* HP 0dB */ 1061 WM_HP_ATTEN_R, 0x0179, /* HP 0dB */ 1062 WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */ 1063 WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */ 1064 WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */ 1065 WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */ 1066 WM_PHASE_SWAP, 0x0000, /* phase normal */ 1067 #if 0 1068 WM_DAC_MASTER, 0x0100, /* DAC master muted */ 1069 #endif 1070 WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */ 1071 WM_ADC_ATTEN_L, 0x0000, /* ADC muted */ 1072 WM_ADC_ATTEN_R, 0x0000, /* ADC muted */ 1073 #if 1 1074 WM_ALC_CTRL1, 0x007b, /* */ 1075 WM_ALC_CTRL2, 0x0000, /* */ 1076 WM_ALC_CTRL3, 0x0000, /* */ 1077 WM_NOISE_GATE, 0x0000, /* */ 1078 #endif 1079 WM_DAC_MUTE, 0x0000, /* DAC unmute */ 1080 WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */ 1081 }; 1082 struct prodigy_hifi_spec *spec; 1083 unsigned int i; 1084 1085 ice->vt1720 = 0; 1086 ice->vt1724 = 1; 1087 1088 ice->num_total_dacs = 8; 1089 ice->num_total_adcs = 1; 1090 1091 /* HACK - use this as the SPDIF source. 1092 * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten 1093 */ 1094 ice->gpio.saved[0] = 0; 1095 /* to remember the register values */ 1096 1097 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 1098 if (! ice->akm) 1099 return -ENOMEM; 1100 ice->akm_codecs = 1; 1101 1102 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1103 if (!spec) 1104 return -ENOMEM; 1105 ice->spec = spec; 1106 1107 /* initialize WM8776 codec */ 1108 wm8776_init(ice); 1109 schedule_timeout_uninterruptible(1); 1110 for (i = 0; i < ARRAY_SIZE(wm8776_defaults); i += 2) 1111 wm_put(ice, wm8776_defaults[i], wm8776_defaults[i + 1]); 1112 1113 wm8766_init(ice); 1114 1115 #ifdef CONFIG_PM_SLEEP 1116 ice->pm_resume = &prodigy_hifi_resume; 1117 ice->pm_suspend_enabled = 1; 1118 #endif 1119 1120 return 0; 1121 } 1122 1123 1124 /* 1125 * initialize the chip 1126 */ 1127 static void ak4396_init(struct snd_ice1712 *ice) 1128 { 1129 static unsigned short ak4396_inits[] = { 1130 AK4396_CTRL1, 0x87, /* I2S Normal Mode, 24 bit */ 1131 AK4396_CTRL2, 0x02, 1132 AK4396_CTRL3, 0x00, 1133 AK4396_LCH_ATT, 0x00, 1134 AK4396_RCH_ATT, 0x00, 1135 }; 1136 1137 unsigned int i; 1138 1139 /* initialize ak4396 codec */ 1140 /* reset codec */ 1141 ak4396_write(ice, AK4396_CTRL1, 0x86); 1142 msleep(100); 1143 ak4396_write(ice, AK4396_CTRL1, 0x87); 1144 1145 for (i = 0; i < ARRAY_SIZE(ak4396_inits); i += 2) 1146 ak4396_write(ice, ak4396_inits[i], ak4396_inits[i+1]); 1147 } 1148 1149 #ifdef CONFIG_PM_SLEEP 1150 static int prodigy_hd2_resume(struct snd_ice1712 *ice) 1151 { 1152 /* initialize ak4396 codec and restore previous mixer volumes */ 1153 struct prodigy_hifi_spec *spec = ice->spec; 1154 int i; 1155 mutex_lock(&ice->gpio_mutex); 1156 ak4396_init(ice); 1157 for (i = 0; i < 2; i++) 1158 ak4396_write(ice, AK4396_LCH_ATT + i, spec->vol[i] & 0xff); 1159 mutex_unlock(&ice->gpio_mutex); 1160 return 0; 1161 } 1162 #endif 1163 1164 static int prodigy_hd2_init(struct snd_ice1712 *ice) 1165 { 1166 struct prodigy_hifi_spec *spec; 1167 1168 ice->vt1720 = 0; 1169 ice->vt1724 = 1; 1170 1171 ice->num_total_dacs = 1; 1172 ice->num_total_adcs = 1; 1173 1174 /* HACK - use this as the SPDIF source. 1175 * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten 1176 */ 1177 ice->gpio.saved[0] = 0; 1178 /* to remember the register values */ 1179 1180 ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 1181 if (! ice->akm) 1182 return -ENOMEM; 1183 ice->akm_codecs = 1; 1184 1185 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1186 if (!spec) 1187 return -ENOMEM; 1188 ice->spec = spec; 1189 1190 #ifdef CONFIG_PM_SLEEP 1191 ice->pm_resume = &prodigy_hd2_resume; 1192 ice->pm_suspend_enabled = 1; 1193 #endif 1194 1195 ak4396_init(ice); 1196 1197 return 0; 1198 } 1199 1200 1201 static unsigned char prodigy71hifi_eeprom[] = { 1202 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */ 1203 0x80, /* ACLINK: I2S */ 1204 0xfc, /* I2S: vol, 96k, 24bit, 192k */ 1205 0xc3, /* SPDIF: out-en, out-int, spdif-in */ 1206 0xff, /* GPIO_DIR */ 1207 0xff, /* GPIO_DIR1 */ 1208 0x5f, /* GPIO_DIR2 */ 1209 0x00, /* GPIO_MASK */ 1210 0x00, /* GPIO_MASK1 */ 1211 0x00, /* GPIO_MASK2 */ 1212 0x00, /* GPIO_STATE */ 1213 0x00, /* GPIO_STATE1 */ 1214 0x00, /* GPIO_STATE2 */ 1215 }; 1216 1217 static unsigned char prodigyhd2_eeprom[] = { 1218 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */ 1219 0x80, /* ACLINK: I2S */ 1220 0xfc, /* I2S: vol, 96k, 24bit, 192k */ 1221 0xc3, /* SPDIF: out-en, out-int, spdif-in */ 1222 0xff, /* GPIO_DIR */ 1223 0xff, /* GPIO_DIR1 */ 1224 0x5f, /* GPIO_DIR2 */ 1225 0x00, /* GPIO_MASK */ 1226 0x00, /* GPIO_MASK1 */ 1227 0x00, /* GPIO_MASK2 */ 1228 0x00, /* GPIO_STATE */ 1229 0x00, /* GPIO_STATE1 */ 1230 0x00, /* GPIO_STATE2 */ 1231 }; 1232 1233 static unsigned char fortissimo4_eeprom[] = { 1234 0x43, /* SYSCONF: clock 512, ADC, 4DACs */ 1235 0x80, /* ACLINK: I2S */ 1236 0xfc, /* I2S: vol, 96k, 24bit, 192k */ 1237 0xc1, /* SPDIF: out-en, out-int */ 1238 0xff, /* GPIO_DIR */ 1239 0xff, /* GPIO_DIR1 */ 1240 0x5f, /* GPIO_DIR2 */ 1241 0x00, /* GPIO_MASK */ 1242 0x00, /* GPIO_MASK1 */ 1243 0x00, /* GPIO_MASK2 */ 1244 0x00, /* GPIO_STATE */ 1245 0x00, /* GPIO_STATE1 */ 1246 0x00, /* GPIO_STATE2 */ 1247 }; 1248 1249 /* entry point */ 1250 struct snd_ice1712_card_info snd_vt1724_prodigy_hifi_cards[] = { 1251 { 1252 .subvendor = VT1724_SUBDEVICE_PRODIGY_HIFI, 1253 .name = "Audiotrak Prodigy 7.1 HiFi", 1254 .model = "prodigy71hifi", 1255 .chip_init = prodigy_hifi_init, 1256 .build_controls = prodigy_hifi_add_controls, 1257 .eeprom_size = sizeof(prodigy71hifi_eeprom), 1258 .eeprom_data = prodigy71hifi_eeprom, 1259 .driver = "Prodigy71HIFI", 1260 }, 1261 { 1262 .subvendor = VT1724_SUBDEVICE_PRODIGY_HD2, 1263 .name = "Audiotrak Prodigy HD2", 1264 .model = "prodigyhd2", 1265 .chip_init = prodigy_hd2_init, 1266 .build_controls = prodigy_hd2_add_controls, 1267 .eeprom_size = sizeof(prodigyhd2_eeprom), 1268 .eeprom_data = prodigyhd2_eeprom, 1269 .driver = "Prodigy71HD2", 1270 }, 1271 { 1272 .subvendor = VT1724_SUBDEVICE_FORTISSIMO4, 1273 .name = "Hercules Fortissimo IV", 1274 .model = "fortissimo4", 1275 .chip_init = prodigy_hifi_init, 1276 .build_controls = prodigy_hifi_add_controls, 1277 .eeprom_size = sizeof(fortissimo4_eeprom), 1278 .eeprom_data = fortissimo4_eeprom, 1279 .driver = "Fortissimo4", 1280 }, 1281 { } /* terminator */ 1282 }; 1283 1284