1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 4 * VIA VT1720 (Envy24PT) 5 * 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 7 * 2002 James Stafford <jstafford@ampltd.com> 8 * 2003 Takashi Iwai <tiwai@suse.de> 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/interrupt.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/slab.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <sound/core.h> 19 #include <sound/info.h> 20 #include <sound/rawmidi.h> 21 #include <sound/initval.h> 22 23 #include <sound/asoundef.h> 24 25 #include "ice1712.h" 26 #include "envy24ht.h" 27 28 /* lowlevel routines */ 29 #include "amp.h" 30 #include "revo.h" 31 #include "aureon.h" 32 #include "vt1720_mobo.h" 33 #include "pontis.h" 34 #include "prodigy192.h" 35 #include "prodigy_hifi.h" 36 #include "juli.h" 37 #include "maya44.h" 38 #include "phase.h" 39 #include "wtm.h" 40 #include "se.h" 41 #include "quartet.h" 42 #include "psc724.h" 43 44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 45 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 46 MODULE_LICENSE("GPL"); 47 48 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 49 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 50 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 51 static char *model[SNDRV_CARDS]; 52 53 module_param_array(index, int, NULL, 0444); 54 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 55 module_param_array(id, charp, NULL, 0444); 56 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 57 module_param_array(enable, bool, NULL, 0444); 58 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 59 module_param_array(model, charp, NULL, 0444); 60 MODULE_PARM_DESC(model, "Use the given board model."); 61 62 63 /* Both VT1720 and VT1724 have the same PCI IDs */ 64 static const struct pci_device_id snd_vt1724_ids[] = { 65 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 66 { 0, } 67 }; 68 69 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 70 71 72 static int PRO_RATE_LOCKED; 73 static int PRO_RATE_RESET = 1; 74 static unsigned int PRO_RATE_DEFAULT = 44100; 75 76 static const char * const ext_clock_names[1] = { "IEC958 In" }; 77 78 /* 79 * Basic I/O 80 */ 81 82 /* 83 * default rates, default clock routines 84 */ 85 86 /* check whether the clock mode is spdif-in */ 87 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 88 { 89 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 90 } 91 92 /* 93 * locking rate makes sense only for internal clock mode 94 */ 95 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 96 { 97 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 98 } 99 100 /* 101 * ac97 section 102 */ 103 104 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 105 { 106 unsigned char old_cmd; 107 int tm; 108 for (tm = 0; tm < 0x10000; tm++) { 109 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 110 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 111 continue; 112 if (!(old_cmd & VT1724_AC97_READY)) 113 continue; 114 return old_cmd; 115 } 116 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n"); 117 return old_cmd; 118 } 119 120 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 121 { 122 int tm; 123 for (tm = 0; tm < 0x10000; tm++) 124 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 125 return 0; 126 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n"); 127 return -EIO; 128 } 129 130 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 131 unsigned short reg, 132 unsigned short val) 133 { 134 struct snd_ice1712 *ice = ac97->private_data; 135 unsigned char old_cmd; 136 137 old_cmd = snd_vt1724_ac97_ready(ice); 138 old_cmd &= ~VT1724_AC97_ID_MASK; 139 old_cmd |= ac97->num; 140 outb(reg, ICEMT1724(ice, AC97_INDEX)); 141 outw(val, ICEMT1724(ice, AC97_DATA)); 142 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 143 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 144 } 145 146 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 147 { 148 struct snd_ice1712 *ice = ac97->private_data; 149 unsigned char old_cmd; 150 151 old_cmd = snd_vt1724_ac97_ready(ice); 152 old_cmd &= ~VT1724_AC97_ID_MASK; 153 old_cmd |= ac97->num; 154 outb(reg, ICEMT1724(ice, AC97_INDEX)); 155 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 156 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 157 return ~0; 158 return inw(ICEMT1724(ice, AC97_DATA)); 159 } 160 161 162 /* 163 * GPIO operations 164 */ 165 166 /* set gpio direction 0 = read, 1 = write */ 167 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 168 { 169 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 170 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 171 } 172 173 /* get gpio direction 0 = read, 1 = write */ 174 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 175 { 176 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 177 } 178 179 /* set the gpio mask (0 = writable) */ 180 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 181 { 182 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 183 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 184 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 185 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 186 } 187 188 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 189 { 190 unsigned int mask; 191 if (!ice->vt1720) 192 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 193 else 194 mask = 0; 195 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 196 return mask; 197 } 198 199 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 200 { 201 outw(data, ICEREG1724(ice, GPIO_DATA)); 202 if (!ice->vt1720) 203 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 204 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 205 } 206 207 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 208 { 209 unsigned int data; 210 if (!ice->vt1720) 211 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 212 else 213 data = 0; 214 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 215 return data; 216 } 217 218 /* 219 * MIDI 220 */ 221 222 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 223 { 224 unsigned int count; 225 226 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 227 inb(ICEREG1724(ice, MPU_DATA)); 228 } 229 230 static inline struct snd_rawmidi_substream * 231 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 232 { 233 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 234 struct snd_rawmidi_substream, list); 235 } 236 237 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 238 239 static void vt1724_midi_write(struct snd_ice1712 *ice) 240 { 241 struct snd_rawmidi_substream *s; 242 int count, i; 243 u8 buffer[32]; 244 245 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 246 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 247 if (count > 0) { 248 count = snd_rawmidi_transmit(s, buffer, count); 249 for (i = 0; i < count; ++i) 250 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 251 } 252 /* mask irq when all bytes have been transmitted. 253 * enabled again in output_trigger when the new data comes in. 254 */ 255 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 256 !snd_rawmidi_transmit_empty(s)); 257 } 258 259 static void vt1724_midi_read(struct snd_ice1712 *ice) 260 { 261 struct snd_rawmidi_substream *s; 262 int count, i; 263 u8 buffer[32]; 264 265 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 266 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 267 if (count > 0) { 268 count = min(count, 32); 269 for (i = 0; i < count; ++i) 270 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 271 snd_rawmidi_receive(s, buffer, count); 272 } 273 } 274 275 /* call with ice->reg_lock */ 276 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 277 { 278 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 279 if (enable) 280 mask &= ~flag; 281 else 282 mask |= flag; 283 outb(mask, ICEREG1724(ice, IRQMASK)); 284 } 285 286 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 287 u8 flag, int enable) 288 { 289 struct snd_ice1712 *ice = substream->rmidi->private_data; 290 291 spin_lock_irq(&ice->reg_lock); 292 enable_midi_irq(ice, flag, enable); 293 spin_unlock_irq(&ice->reg_lock); 294 } 295 296 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 297 { 298 return 0; 299 } 300 301 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 302 { 303 return 0; 304 } 305 306 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 307 { 308 struct snd_ice1712 *ice = s->rmidi->private_data; 309 unsigned long flags; 310 311 spin_lock_irqsave(&ice->reg_lock, flags); 312 if (up) { 313 ice->midi_output = 1; 314 vt1724_midi_write(ice); 315 } else { 316 ice->midi_output = 0; 317 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 318 } 319 spin_unlock_irqrestore(&ice->reg_lock, flags); 320 } 321 322 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 323 { 324 struct snd_ice1712 *ice = s->rmidi->private_data; 325 unsigned long timeout; 326 327 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 328 /* 32 bytes should be transmitted in less than about 12 ms */ 329 timeout = jiffies + msecs_to_jiffies(15); 330 do { 331 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 332 break; 333 schedule_timeout_uninterruptible(1); 334 } while (time_after(timeout, jiffies)); 335 } 336 337 static const struct snd_rawmidi_ops vt1724_midi_output_ops = { 338 .open = vt1724_midi_output_open, 339 .close = vt1724_midi_output_close, 340 .trigger = vt1724_midi_output_trigger, 341 .drain = vt1724_midi_output_drain, 342 }; 343 344 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 345 { 346 vt1724_midi_clear_rx(s->rmidi->private_data); 347 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 348 return 0; 349 } 350 351 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 352 { 353 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 354 return 0; 355 } 356 357 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 358 { 359 struct snd_ice1712 *ice = s->rmidi->private_data; 360 unsigned long flags; 361 362 spin_lock_irqsave(&ice->reg_lock, flags); 363 if (up) { 364 ice->midi_input = 1; 365 vt1724_midi_read(ice); 366 } else { 367 ice->midi_input = 0; 368 } 369 spin_unlock_irqrestore(&ice->reg_lock, flags); 370 } 371 372 static const struct snd_rawmidi_ops vt1724_midi_input_ops = { 373 .open = vt1724_midi_input_open, 374 .close = vt1724_midi_input_close, 375 .trigger = vt1724_midi_input_trigger, 376 }; 377 378 379 /* 380 * Interrupt handler 381 */ 382 383 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 384 { 385 struct snd_ice1712 *ice = dev_id; 386 unsigned char status; 387 unsigned char status_mask = 388 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 389 int handled = 0; 390 int timeout = 0; 391 392 while (1) { 393 status = inb(ICEREG1724(ice, IRQSTAT)); 394 status &= status_mask; 395 if (status == 0) 396 break; 397 spin_lock(&ice->reg_lock); 398 if (++timeout > 10) { 399 status = inb(ICEREG1724(ice, IRQSTAT)); 400 dev_err(ice->card->dev, 401 "Too long irq loop, status = 0x%x\n", status); 402 if (status & VT1724_IRQ_MPU_TX) { 403 dev_err(ice->card->dev, "Disabling MPU_TX\n"); 404 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 405 } 406 spin_unlock(&ice->reg_lock); 407 break; 408 } 409 handled = 1; 410 if (status & VT1724_IRQ_MPU_TX) { 411 if (ice->midi_output) 412 vt1724_midi_write(ice); 413 else 414 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 415 /* Due to mysterical reasons, MPU_TX is always 416 * generated (and can't be cleared) when a PCM 417 * playback is going. So let's ignore at the 418 * next loop. 419 */ 420 status_mask &= ~VT1724_IRQ_MPU_TX; 421 } 422 if (status & VT1724_IRQ_MPU_RX) { 423 if (ice->midi_input) 424 vt1724_midi_read(ice); 425 else 426 vt1724_midi_clear_rx(ice); 427 } 428 /* ack MPU irq */ 429 outb(status, ICEREG1724(ice, IRQSTAT)); 430 spin_unlock(&ice->reg_lock); 431 if (status & VT1724_IRQ_MTPCM) { 432 /* 433 * Multi-track PCM 434 * PCM assignment are: 435 * Playback DMA0 (M/C) = playback_pro_substream 436 * Playback DMA1 = playback_con_substream_ds[0] 437 * Playback DMA2 = playback_con_substream_ds[1] 438 * Playback DMA3 = playback_con_substream_ds[2] 439 * Playback DMA4 (SPDIF) = playback_con_substream 440 * Record DMA0 = capture_pro_substream 441 * Record DMA1 = capture_con_substream 442 */ 443 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 444 if (mtstat & VT1724_MULTI_PDMA0) { 445 if (ice->playback_pro_substream) 446 snd_pcm_period_elapsed(ice->playback_pro_substream); 447 } 448 if (mtstat & VT1724_MULTI_RDMA0) { 449 if (ice->capture_pro_substream) 450 snd_pcm_period_elapsed(ice->capture_pro_substream); 451 } 452 if (mtstat & VT1724_MULTI_PDMA1) { 453 if (ice->playback_con_substream_ds[0]) 454 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 455 } 456 if (mtstat & VT1724_MULTI_PDMA2) { 457 if (ice->playback_con_substream_ds[1]) 458 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 459 } 460 if (mtstat & VT1724_MULTI_PDMA3) { 461 if (ice->playback_con_substream_ds[2]) 462 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 463 } 464 if (mtstat & VT1724_MULTI_PDMA4) { 465 if (ice->playback_con_substream) 466 snd_pcm_period_elapsed(ice->playback_con_substream); 467 } 468 if (mtstat & VT1724_MULTI_RDMA1) { 469 if (ice->capture_con_substream) 470 snd_pcm_period_elapsed(ice->capture_con_substream); 471 } 472 /* ack anyway to avoid freeze */ 473 outb(mtstat, ICEMT1724(ice, IRQ)); 474 /* ought to really handle this properly */ 475 if (mtstat & VT1724_MULTI_FIFO_ERR) { 476 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 477 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 478 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 479 /* If I don't do this, I get machine lockup due to continual interrupts */ 480 } 481 482 } 483 } 484 return IRQ_RETVAL(handled); 485 } 486 487 /* 488 * PCM code - professional part (multitrack) 489 */ 490 491 static const unsigned int rates[] = { 492 8000, 9600, 11025, 12000, 16000, 22050, 24000, 493 32000, 44100, 48000, 64000, 88200, 96000, 494 176400, 192000, 495 }; 496 497 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 498 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 499 .list = rates, 500 .mask = 0, 501 }; 502 503 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 504 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 505 .list = rates, 506 .mask = 0, 507 }; 508 509 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 510 .count = ARRAY_SIZE(rates), 511 .list = rates, 512 .mask = 0, 513 }; 514 515 struct vt1724_pcm_reg { 516 unsigned int addr; /* ADDR register offset */ 517 unsigned int size; /* SIZE register offset */ 518 unsigned int count; /* COUNT register offset */ 519 unsigned int start; /* start & pause bit */ 520 }; 521 522 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 523 { 524 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 525 unsigned char what; 526 unsigned char old; 527 struct snd_pcm_substream *s; 528 529 what = 0; 530 snd_pcm_group_for_each_entry(s, substream) { 531 if (snd_pcm_substream_chip(s) == ice) { 532 const struct vt1724_pcm_reg *reg; 533 reg = s->runtime->private_data; 534 what |= reg->start; 535 snd_pcm_trigger_done(s, substream); 536 } 537 } 538 539 switch (cmd) { 540 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 541 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 542 spin_lock(&ice->reg_lock); 543 old = inb(ICEMT1724(ice, DMA_PAUSE)); 544 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 545 old |= what; 546 else 547 old &= ~what; 548 outb(old, ICEMT1724(ice, DMA_PAUSE)); 549 spin_unlock(&ice->reg_lock); 550 break; 551 552 case SNDRV_PCM_TRIGGER_START: 553 case SNDRV_PCM_TRIGGER_STOP: 554 case SNDRV_PCM_TRIGGER_SUSPEND: 555 spin_lock(&ice->reg_lock); 556 old = inb(ICEMT1724(ice, DMA_CONTROL)); 557 if (cmd == SNDRV_PCM_TRIGGER_START) 558 old |= what; 559 else 560 old &= ~what; 561 outb(old, ICEMT1724(ice, DMA_CONTROL)); 562 spin_unlock(&ice->reg_lock); 563 break; 564 565 case SNDRV_PCM_TRIGGER_RESUME: 566 /* apps will have to restart stream */ 567 break; 568 569 default: 570 return -EINVAL; 571 } 572 return 0; 573 } 574 575 /* 576 */ 577 578 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 579 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 580 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 581 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 582 583 static const unsigned int stdclock_rate_list[16] = { 584 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 585 22050, 11025, 88200, 176400, 0, 192000, 64000 586 }; 587 588 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 589 { 590 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 591 } 592 593 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 594 { 595 int i; 596 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 597 if (stdclock_rate_list[i] == rate) { 598 outb(i, ICEMT1724(ice, RATE)); 599 return; 600 } 601 } 602 } 603 604 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 605 unsigned int rate) 606 { 607 unsigned char val, old; 608 /* check MT02 */ 609 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 610 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 611 if (rate > 96000) 612 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 613 else 614 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 615 if (val != old) { 616 outb(val, ICEMT1724(ice, I2S_FORMAT)); 617 /* master clock changed */ 618 return 1; 619 } 620 } 621 /* no change in master clock */ 622 return 0; 623 } 624 625 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 626 int force) 627 { 628 unsigned long flags; 629 unsigned char mclk_change; 630 unsigned int i, old_rate; 631 bool call_set_rate = false; 632 633 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 634 return -EINVAL; 635 636 spin_lock_irqsave(&ice->reg_lock, flags); 637 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 638 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 639 /* running? we cannot change the rate now... */ 640 spin_unlock_irqrestore(&ice->reg_lock, flags); 641 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 642 } 643 if (!force && is_pro_rate_locked(ice)) { 644 /* comparing required and current rate - makes sense for 645 * internal clock only */ 646 spin_unlock_irqrestore(&ice->reg_lock, flags); 647 return (rate == ice->cur_rate) ? 0 : -EBUSY; 648 } 649 650 if (force || !ice->is_spdif_master(ice)) { 651 /* force means the rate was switched by ucontrol, otherwise 652 * setting clock rate for internal clock mode */ 653 old_rate = ice->get_rate(ice); 654 if (force || (old_rate != rate)) 655 call_set_rate = true; 656 else if (rate == ice->cur_rate) { 657 spin_unlock_irqrestore(&ice->reg_lock, flags); 658 return 0; 659 } 660 } 661 662 ice->cur_rate = rate; 663 spin_unlock_irqrestore(&ice->reg_lock, flags); 664 665 if (call_set_rate) 666 ice->set_rate(ice, rate); 667 668 /* setting master clock */ 669 mclk_change = ice->set_mclk(ice, rate); 670 671 if (mclk_change && ice->gpio.i2s_mclk_changed) 672 ice->gpio.i2s_mclk_changed(ice); 673 if (ice->gpio.set_pro_rate) 674 ice->gpio.set_pro_rate(ice, rate); 675 676 /* set up codecs */ 677 for (i = 0; i < ice->akm_codecs; i++) { 678 if (ice->akm[i].ops.set_rate_val) 679 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 680 } 681 if (ice->spdif.ops.setup_rate) 682 ice->spdif.ops.setup_rate(ice, rate); 683 684 return 0; 685 } 686 687 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 688 struct snd_pcm_hw_params *hw_params) 689 { 690 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 691 int i, chs; 692 693 chs = params_channels(hw_params); 694 mutex_lock(&ice->open_mutex); 695 /* mark surround channels */ 696 if (substream == ice->playback_pro_substream) { 697 /* PDMA0 can be multi-channel up to 8 */ 698 chs = chs / 2 - 1; 699 for (i = 0; i < chs; i++) { 700 if (ice->pcm_reserved[i] && 701 ice->pcm_reserved[i] != substream) { 702 mutex_unlock(&ice->open_mutex); 703 return -EBUSY; 704 } 705 ice->pcm_reserved[i] = substream; 706 } 707 for (; i < 3; i++) { 708 if (ice->pcm_reserved[i] == substream) 709 ice->pcm_reserved[i] = NULL; 710 } 711 } else { 712 for (i = 0; i < 3; i++) { 713 /* check individual playback stream */ 714 if (ice->playback_con_substream_ds[i] == substream) { 715 if (ice->pcm_reserved[i] && 716 ice->pcm_reserved[i] != substream) { 717 mutex_unlock(&ice->open_mutex); 718 return -EBUSY; 719 } 720 ice->pcm_reserved[i] = substream; 721 break; 722 } 723 } 724 } 725 mutex_unlock(&ice->open_mutex); 726 727 return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 728 } 729 730 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 731 { 732 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 733 int i; 734 735 mutex_lock(&ice->open_mutex); 736 /* unmark surround channels */ 737 for (i = 0; i < 3; i++) 738 if (ice->pcm_reserved[i] == substream) 739 ice->pcm_reserved[i] = NULL; 740 mutex_unlock(&ice->open_mutex); 741 return 0; 742 } 743 744 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 745 { 746 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 747 unsigned char val; 748 unsigned int size; 749 750 spin_lock_irq(&ice->reg_lock); 751 val = (8 - substream->runtime->channels) >> 1; 752 outb(val, ICEMT1724(ice, BURST)); 753 754 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 755 756 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 757 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 758 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 759 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 760 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 761 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 762 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 763 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 764 765 spin_unlock_irq(&ice->reg_lock); 766 767 /* 768 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, " 769 "buffer = 0x%x, period = 0x%x\n", 770 substream->runtime->channels, 771 (unsigned int)substream->runtime->dma_addr, 772 snd_pcm_lib_buffer_bytes(substream), 773 snd_pcm_lib_period_bytes(substream)); 774 */ 775 return 0; 776 } 777 778 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 779 { 780 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 781 size_t ptr; 782 783 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 784 return 0; 785 #if 0 /* read PLAYBACK_ADDR */ 786 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 787 if (ptr < substream->runtime->dma_addr) { 788 dev_dbg(ice->card->dev, "invalid negative ptr\n"); 789 return 0; 790 } 791 ptr -= substream->runtime->dma_addr; 792 ptr = bytes_to_frames(substream->runtime, ptr); 793 if (ptr >= substream->runtime->buffer_size) { 794 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 795 (int)ptr, (int)substream->runtime->period_size); 796 return 0; 797 } 798 #else /* read PLAYBACK_SIZE */ 799 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 800 ptr = (ptr + 1) << 2; 801 ptr = bytes_to_frames(substream->runtime, ptr); 802 if (!ptr) 803 ; 804 else if (ptr <= substream->runtime->buffer_size) 805 ptr = substream->runtime->buffer_size - ptr; 806 else { 807 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 808 (int)ptr, (int)substream->runtime->buffer_size); 809 ptr = 0; 810 } 811 #endif 812 return ptr; 813 } 814 815 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 816 { 817 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 818 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 819 820 spin_lock_irq(&ice->reg_lock); 821 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 822 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 823 ice->profi_port + reg->size); 824 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 825 ice->profi_port + reg->count); 826 spin_unlock_irq(&ice->reg_lock); 827 return 0; 828 } 829 830 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 831 { 832 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 833 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 834 size_t ptr; 835 836 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 837 return 0; 838 #if 0 /* use ADDR register */ 839 ptr = inl(ice->profi_port + reg->addr); 840 ptr -= substream->runtime->dma_addr; 841 return bytes_to_frames(substream->runtime, ptr); 842 #else /* use SIZE register */ 843 ptr = inw(ice->profi_port + reg->size); 844 ptr = (ptr + 1) << 2; 845 ptr = bytes_to_frames(substream->runtime, ptr); 846 if (!ptr) 847 ; 848 else if (ptr <= substream->runtime->buffer_size) 849 ptr = substream->runtime->buffer_size - ptr; 850 else { 851 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 852 (int)ptr, (int)substream->runtime->buffer_size); 853 ptr = 0; 854 } 855 return ptr; 856 #endif 857 } 858 859 static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 860 .addr = VT1724_MT_PLAYBACK_ADDR, 861 .size = VT1724_MT_PLAYBACK_SIZE, 862 .count = VT1724_MT_PLAYBACK_COUNT, 863 .start = VT1724_PDMA0_START, 864 }; 865 866 static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 867 .addr = VT1724_MT_PDMA4_ADDR, 868 .size = VT1724_MT_PDMA4_SIZE, 869 .count = VT1724_MT_PDMA4_COUNT, 870 .start = VT1724_PDMA4_START, 871 }; 872 873 static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 874 .addr = VT1724_MT_CAPTURE_ADDR, 875 .size = VT1724_MT_CAPTURE_SIZE, 876 .count = VT1724_MT_CAPTURE_COUNT, 877 .start = VT1724_RDMA0_START, 878 }; 879 880 static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 881 .addr = VT1724_MT_RDMA1_ADDR, 882 .size = VT1724_MT_RDMA1_SIZE, 883 .count = VT1724_MT_RDMA1_COUNT, 884 .start = VT1724_RDMA1_START, 885 }; 886 887 #define vt1724_playback_pro_reg vt1724_pdma0_reg 888 #define vt1724_playback_spdif_reg vt1724_pdma4_reg 889 #define vt1724_capture_pro_reg vt1724_rdma0_reg 890 #define vt1724_capture_spdif_reg vt1724_rdma1_reg 891 892 static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 893 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 894 SNDRV_PCM_INFO_BLOCK_TRANSFER | 895 SNDRV_PCM_INFO_MMAP_VALID | 896 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 897 .formats = SNDRV_PCM_FMTBIT_S32_LE, 898 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 899 .rate_min = 8000, 900 .rate_max = 192000, 901 .channels_min = 2, 902 .channels_max = 8, 903 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 904 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 905 .period_bytes_max = (1UL << 21), 906 .periods_min = 2, 907 .periods_max = 1024, 908 }; 909 910 static const struct snd_pcm_hardware snd_vt1724_spdif = { 911 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 912 SNDRV_PCM_INFO_BLOCK_TRANSFER | 913 SNDRV_PCM_INFO_MMAP_VALID | 914 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 915 .formats = SNDRV_PCM_FMTBIT_S32_LE, 916 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 917 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 918 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 919 SNDRV_PCM_RATE_192000), 920 .rate_min = 32000, 921 .rate_max = 192000, 922 .channels_min = 2, 923 .channels_max = 2, 924 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 925 .period_bytes_min = 2 * 4 * 2, 926 .period_bytes_max = (1UL << 18), 927 .periods_min = 2, 928 .periods_max = 1024, 929 }; 930 931 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 932 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 933 SNDRV_PCM_INFO_BLOCK_TRANSFER | 934 SNDRV_PCM_INFO_MMAP_VALID | 935 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 936 .formats = SNDRV_PCM_FMTBIT_S32_LE, 937 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 938 .rate_min = 8000, 939 .rate_max = 192000, 940 .channels_min = 2, 941 .channels_max = 2, 942 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 943 .period_bytes_min = 2 * 4 * 2, 944 .period_bytes_max = (1UL << 18), 945 .periods_min = 2, 946 .periods_max = 1024, 947 }; 948 949 /* 950 * set rate constraints 951 */ 952 static void set_std_hw_rates(struct snd_ice1712 *ice) 953 { 954 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 955 /* I2S */ 956 /* VT1720 doesn't support more than 96kHz */ 957 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 958 ice->hw_rates = &hw_constraints_rates_192; 959 else 960 ice->hw_rates = &hw_constraints_rates_96; 961 } else { 962 /* ACLINK */ 963 ice->hw_rates = &hw_constraints_rates_48; 964 } 965 } 966 967 static int set_rate_constraints(struct snd_ice1712 *ice, 968 struct snd_pcm_substream *substream) 969 { 970 struct snd_pcm_runtime *runtime = substream->runtime; 971 972 runtime->hw.rate_min = ice->hw_rates->list[0]; 973 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 974 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 975 return snd_pcm_hw_constraint_list(runtime, 0, 976 SNDRV_PCM_HW_PARAM_RATE, 977 ice->hw_rates); 978 } 979 980 /* if the card has the internal rate locked (is_pro_locked), limit runtime 981 hw rates to the current internal rate only. 982 */ 983 static void constrain_rate_if_locked(struct snd_pcm_substream *substream) 984 { 985 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 986 struct snd_pcm_runtime *runtime = substream->runtime; 987 unsigned int rate; 988 if (is_pro_rate_locked(ice)) { 989 rate = ice->get_rate(ice); 990 if (rate >= runtime->hw.rate_min 991 && rate <= runtime->hw.rate_max) { 992 runtime->hw.rate_min = rate; 993 runtime->hw.rate_max = rate; 994 } 995 } 996 } 997 998 999 /* multi-channel playback needs alignment 8x32bit regardless of the channels 1000 * actually used 1001 */ 1002 #define VT1724_BUFFER_ALIGN 0x20 1003 1004 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1005 { 1006 struct snd_pcm_runtime *runtime = substream->runtime; 1007 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1008 int chs, num_indeps; 1009 1010 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1011 ice->playback_pro_substream = substream; 1012 runtime->hw = snd_vt1724_playback_pro; 1013 snd_pcm_set_sync(substream); 1014 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1015 set_rate_constraints(ice, substream); 1016 mutex_lock(&ice->open_mutex); 1017 /* calculate the currently available channels */ 1018 num_indeps = ice->num_total_dacs / 2 - 1; 1019 for (chs = 0; chs < num_indeps; chs++) { 1020 if (ice->pcm_reserved[chs]) 1021 break; 1022 } 1023 chs = (chs + 1) * 2; 1024 runtime->hw.channels_max = chs; 1025 if (chs > 2) /* channels must be even */ 1026 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1027 mutex_unlock(&ice->open_mutex); 1028 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1029 VT1724_BUFFER_ALIGN); 1030 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1031 VT1724_BUFFER_ALIGN); 1032 constrain_rate_if_locked(substream); 1033 if (ice->pro_open) 1034 ice->pro_open(ice, substream); 1035 return 0; 1036 } 1037 1038 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1039 { 1040 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1041 struct snd_pcm_runtime *runtime = substream->runtime; 1042 1043 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1044 ice->capture_pro_substream = substream; 1045 runtime->hw = snd_vt1724_2ch_stereo; 1046 snd_pcm_set_sync(substream); 1047 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1048 set_rate_constraints(ice, substream); 1049 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1050 VT1724_BUFFER_ALIGN); 1051 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1052 VT1724_BUFFER_ALIGN); 1053 constrain_rate_if_locked(substream); 1054 if (ice->pro_open) 1055 ice->pro_open(ice, substream); 1056 return 0; 1057 } 1058 1059 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1060 { 1061 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1062 1063 if (PRO_RATE_RESET) 1064 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1065 ice->playback_pro_substream = NULL; 1066 1067 return 0; 1068 } 1069 1070 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1071 { 1072 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1073 1074 if (PRO_RATE_RESET) 1075 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1076 ice->capture_pro_substream = NULL; 1077 return 0; 1078 } 1079 1080 static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1081 .open = snd_vt1724_playback_pro_open, 1082 .close = snd_vt1724_playback_pro_close, 1083 .hw_params = snd_vt1724_pcm_hw_params, 1084 .hw_free = snd_vt1724_pcm_hw_free, 1085 .prepare = snd_vt1724_playback_pro_prepare, 1086 .trigger = snd_vt1724_pcm_trigger, 1087 .pointer = snd_vt1724_playback_pro_pointer, 1088 }; 1089 1090 static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1091 .open = snd_vt1724_capture_pro_open, 1092 .close = snd_vt1724_capture_pro_close, 1093 .hw_params = snd_vt1724_pcm_hw_params, 1094 .hw_free = snd_vt1724_pcm_hw_free, 1095 .prepare = snd_vt1724_pcm_prepare, 1096 .trigger = snd_vt1724_pcm_trigger, 1097 .pointer = snd_vt1724_pcm_pointer, 1098 }; 1099 1100 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1101 { 1102 struct snd_pcm *pcm; 1103 int capt, err; 1104 1105 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1106 VT1724_CFG_ADC_NONE) 1107 capt = 0; 1108 else 1109 capt = 1; 1110 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1111 if (err < 0) 1112 return err; 1113 1114 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1115 if (capt) 1116 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1117 &snd_vt1724_capture_pro_ops); 1118 1119 pcm->private_data = ice; 1120 pcm->info_flags = 0; 1121 strcpy(pcm->name, "ICE1724"); 1122 1123 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1124 &ice->pci->dev, 256*1024, 256*1024); 1125 1126 ice->pcm_pro = pcm; 1127 1128 return 0; 1129 } 1130 1131 1132 /* 1133 * SPDIF PCM 1134 */ 1135 1136 /* update spdif control bits; call with reg_lock */ 1137 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1138 { 1139 unsigned char cbit, disabled; 1140 1141 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1142 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1143 if (cbit != disabled) 1144 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1145 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1146 if (cbit != disabled) 1147 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1148 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1149 } 1150 1151 /* update SPDIF control bits according to the given rate */ 1152 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1153 { 1154 unsigned int val, nval; 1155 unsigned long flags; 1156 1157 spin_lock_irqsave(&ice->reg_lock, flags); 1158 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1159 nval &= ~(7 << 12); 1160 switch (rate) { 1161 case 44100: break; 1162 case 48000: nval |= 2 << 12; break; 1163 case 32000: nval |= 3 << 12; break; 1164 case 88200: nval |= 4 << 12; break; 1165 case 96000: nval |= 5 << 12; break; 1166 case 192000: nval |= 6 << 12; break; 1167 case 176400: nval |= 7 << 12; break; 1168 } 1169 if (val != nval) 1170 update_spdif_bits(ice, nval); 1171 spin_unlock_irqrestore(&ice->reg_lock, flags); 1172 } 1173 1174 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1175 { 1176 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1177 if (!ice->force_pdma4) 1178 update_spdif_rate(ice, substream->runtime->rate); 1179 return snd_vt1724_pcm_prepare(substream); 1180 } 1181 1182 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1183 { 1184 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1185 struct snd_pcm_runtime *runtime = substream->runtime; 1186 1187 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1188 ice->playback_con_substream = substream; 1189 if (ice->force_pdma4) { 1190 runtime->hw = snd_vt1724_2ch_stereo; 1191 set_rate_constraints(ice, substream); 1192 } else 1193 runtime->hw = snd_vt1724_spdif; 1194 snd_pcm_set_sync(substream); 1195 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1196 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1197 VT1724_BUFFER_ALIGN); 1198 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1199 VT1724_BUFFER_ALIGN); 1200 constrain_rate_if_locked(substream); 1201 if (ice->spdif.ops.open) 1202 ice->spdif.ops.open(ice, substream); 1203 return 0; 1204 } 1205 1206 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1207 { 1208 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1209 1210 if (PRO_RATE_RESET) 1211 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1212 ice->playback_con_substream = NULL; 1213 if (ice->spdif.ops.close) 1214 ice->spdif.ops.close(ice, substream); 1215 1216 return 0; 1217 } 1218 1219 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1220 { 1221 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1222 struct snd_pcm_runtime *runtime = substream->runtime; 1223 1224 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1225 ice->capture_con_substream = substream; 1226 if (ice->force_rdma1) { 1227 runtime->hw = snd_vt1724_2ch_stereo; 1228 set_rate_constraints(ice, substream); 1229 } else 1230 runtime->hw = snd_vt1724_spdif; 1231 snd_pcm_set_sync(substream); 1232 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1233 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1234 VT1724_BUFFER_ALIGN); 1235 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1236 VT1724_BUFFER_ALIGN); 1237 constrain_rate_if_locked(substream); 1238 if (ice->spdif.ops.open) 1239 ice->spdif.ops.open(ice, substream); 1240 return 0; 1241 } 1242 1243 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1244 { 1245 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1246 1247 if (PRO_RATE_RESET) 1248 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1249 ice->capture_con_substream = NULL; 1250 if (ice->spdif.ops.close) 1251 ice->spdif.ops.close(ice, substream); 1252 1253 return 0; 1254 } 1255 1256 static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1257 .open = snd_vt1724_playback_spdif_open, 1258 .close = snd_vt1724_playback_spdif_close, 1259 .hw_params = snd_vt1724_pcm_hw_params, 1260 .hw_free = snd_vt1724_pcm_hw_free, 1261 .prepare = snd_vt1724_playback_spdif_prepare, 1262 .trigger = snd_vt1724_pcm_trigger, 1263 .pointer = snd_vt1724_pcm_pointer, 1264 }; 1265 1266 static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1267 .open = snd_vt1724_capture_spdif_open, 1268 .close = snd_vt1724_capture_spdif_close, 1269 .hw_params = snd_vt1724_pcm_hw_params, 1270 .hw_free = snd_vt1724_pcm_hw_free, 1271 .prepare = snd_vt1724_pcm_prepare, 1272 .trigger = snd_vt1724_pcm_trigger, 1273 .pointer = snd_vt1724_pcm_pointer, 1274 }; 1275 1276 1277 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1278 { 1279 char *name; 1280 struct snd_pcm *pcm; 1281 int play, capt; 1282 int err; 1283 1284 if (ice->force_pdma4 || 1285 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1286 play = 1; 1287 ice->has_spdif = 1; 1288 } else 1289 play = 0; 1290 if (ice->force_rdma1 || 1291 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1292 capt = 1; 1293 ice->has_spdif = 1; 1294 } else 1295 capt = 0; 1296 if (!play && !capt) 1297 return 0; /* no spdif device */ 1298 1299 if (ice->force_pdma4 || ice->force_rdma1) 1300 name = "ICE1724 Secondary"; 1301 else 1302 name = "ICE1724 IEC958"; 1303 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1304 if (err < 0) 1305 return err; 1306 1307 if (play) 1308 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1309 &snd_vt1724_playback_spdif_ops); 1310 if (capt) 1311 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1312 &snd_vt1724_capture_spdif_ops); 1313 1314 pcm->private_data = ice; 1315 pcm->info_flags = 0; 1316 strcpy(pcm->name, name); 1317 1318 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1319 &ice->pci->dev, 256*1024, 256*1024); 1320 1321 ice->pcm = pcm; 1322 1323 return 0; 1324 } 1325 1326 1327 /* 1328 * independent surround PCMs 1329 */ 1330 1331 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1332 { 1333 .addr = VT1724_MT_PDMA1_ADDR, 1334 .size = VT1724_MT_PDMA1_SIZE, 1335 .count = VT1724_MT_PDMA1_COUNT, 1336 .start = VT1724_PDMA1_START, 1337 }, 1338 { 1339 .addr = VT1724_MT_PDMA2_ADDR, 1340 .size = VT1724_MT_PDMA2_SIZE, 1341 .count = VT1724_MT_PDMA2_COUNT, 1342 .start = VT1724_PDMA2_START, 1343 }, 1344 { 1345 .addr = VT1724_MT_PDMA3_ADDR, 1346 .size = VT1724_MT_PDMA3_SIZE, 1347 .count = VT1724_MT_PDMA3_COUNT, 1348 .start = VT1724_PDMA3_START, 1349 }, 1350 }; 1351 1352 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1353 { 1354 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1355 unsigned char val; 1356 1357 spin_lock_irq(&ice->reg_lock); 1358 val = 3 - substream->number; 1359 if (inb(ICEMT1724(ice, BURST)) < val) 1360 outb(val, ICEMT1724(ice, BURST)); 1361 spin_unlock_irq(&ice->reg_lock); 1362 return snd_vt1724_pcm_prepare(substream); 1363 } 1364 1365 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1366 { 1367 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1368 struct snd_pcm_runtime *runtime = substream->runtime; 1369 1370 mutex_lock(&ice->open_mutex); 1371 /* already used by PDMA0? */ 1372 if (ice->pcm_reserved[substream->number]) { 1373 mutex_unlock(&ice->open_mutex); 1374 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1375 } 1376 mutex_unlock(&ice->open_mutex); 1377 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1378 ice->playback_con_substream_ds[substream->number] = substream; 1379 runtime->hw = snd_vt1724_2ch_stereo; 1380 snd_pcm_set_sync(substream); 1381 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1382 set_rate_constraints(ice, substream); 1383 return 0; 1384 } 1385 1386 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1387 { 1388 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1389 1390 if (PRO_RATE_RESET) 1391 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1392 ice->playback_con_substream_ds[substream->number] = NULL; 1393 ice->pcm_reserved[substream->number] = NULL; 1394 1395 return 0; 1396 } 1397 1398 static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1399 .open = snd_vt1724_playback_indep_open, 1400 .close = snd_vt1724_playback_indep_close, 1401 .hw_params = snd_vt1724_pcm_hw_params, 1402 .hw_free = snd_vt1724_pcm_hw_free, 1403 .prepare = snd_vt1724_playback_indep_prepare, 1404 .trigger = snd_vt1724_pcm_trigger, 1405 .pointer = snd_vt1724_pcm_pointer, 1406 }; 1407 1408 1409 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1410 { 1411 struct snd_pcm *pcm; 1412 int play; 1413 int err; 1414 1415 play = ice->num_total_dacs / 2 - 1; 1416 if (play <= 0) 1417 return 0; 1418 1419 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1420 if (err < 0) 1421 return err; 1422 1423 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1424 &snd_vt1724_playback_indep_ops); 1425 1426 pcm->private_data = ice; 1427 pcm->info_flags = 0; 1428 strcpy(pcm->name, "ICE1724 Surround PCM"); 1429 1430 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1431 &ice->pci->dev, 256*1024, 256*1024); 1432 1433 ice->pcm_ds = pcm; 1434 1435 return 0; 1436 } 1437 1438 1439 /* 1440 * Mixer section 1441 */ 1442 1443 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1444 { 1445 int err; 1446 1447 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1448 struct snd_ac97_bus *pbus; 1449 struct snd_ac97_template ac97; 1450 static const struct snd_ac97_bus_ops ops = { 1451 .write = snd_vt1724_ac97_write, 1452 .read = snd_vt1724_ac97_read, 1453 }; 1454 1455 /* cold reset */ 1456 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1457 mdelay(5); /* FIXME */ 1458 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1459 1460 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1461 if (err < 0) 1462 return err; 1463 memset(&ac97, 0, sizeof(ac97)); 1464 ac97.private_data = ice; 1465 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1466 if (err < 0) 1467 dev_warn(ice->card->dev, 1468 "cannot initialize pro ac97, skipped\n"); 1469 else 1470 return 0; 1471 } 1472 /* I2S mixer only */ 1473 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1474 return 0; 1475 } 1476 1477 /* 1478 * 1479 */ 1480 1481 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1482 { 1483 return (unsigned int)ice->eeprom.data[idx] | \ 1484 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1485 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1486 } 1487 1488 static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1489 struct snd_info_buffer *buffer) 1490 { 1491 struct snd_ice1712 *ice = entry->private_data; 1492 unsigned int idx; 1493 1494 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1495 snd_iprintf(buffer, "EEPROM:\n"); 1496 1497 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1498 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1499 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1500 snd_iprintf(buffer, " System Config : 0x%x\n", 1501 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1502 snd_iprintf(buffer, " ACLink : 0x%x\n", 1503 ice->eeprom.data[ICE_EEP2_ACLINK]); 1504 snd_iprintf(buffer, " I2S : 0x%x\n", 1505 ice->eeprom.data[ICE_EEP2_I2S]); 1506 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1507 ice->eeprom.data[ICE_EEP2_SPDIF]); 1508 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1509 ice->eeprom.gpiodir); 1510 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1511 ice->eeprom.gpiomask); 1512 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1513 ice->eeprom.gpiostate); 1514 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1515 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1516 idx, ice->eeprom.data[idx]); 1517 1518 snd_iprintf(buffer, "\nRegisters:\n"); 1519 1520 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1521 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1522 for (idx = 0x0; idx < 0x20 ; idx++) 1523 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1524 idx, inb(ice->port+idx)); 1525 for (idx = 0x0; idx < 0x30 ; idx++) 1526 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1527 idx, inb(ice->profi_port+idx)); 1528 } 1529 1530 static void snd_vt1724_proc_init(struct snd_ice1712 *ice) 1531 { 1532 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read); 1533 } 1534 1535 /* 1536 * 1537 */ 1538 1539 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1540 struct snd_ctl_elem_info *uinfo) 1541 { 1542 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1543 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1544 return 0; 1545 } 1546 1547 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1548 struct snd_ctl_elem_value *ucontrol) 1549 { 1550 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1551 1552 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1553 return 0; 1554 } 1555 1556 static const struct snd_kcontrol_new snd_vt1724_eeprom = { 1557 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1558 .name = "ICE1724 EEPROM", 1559 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1560 .info = snd_vt1724_eeprom_info, 1561 .get = snd_vt1724_eeprom_get 1562 }; 1563 1564 /* 1565 */ 1566 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1567 struct snd_ctl_elem_info *uinfo) 1568 { 1569 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1570 uinfo->count = 1; 1571 return 0; 1572 } 1573 1574 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1575 { 1576 unsigned int val, rbits; 1577 1578 val = diga->status[0] & 0x03; /* professional, non-audio */ 1579 if (val & 0x01) { 1580 /* professional */ 1581 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1582 IEC958_AES0_PRO_EMPHASIS_5015) 1583 val |= 1U << 3; 1584 rbits = (diga->status[4] >> 3) & 0x0f; 1585 if (rbits) { 1586 switch (rbits) { 1587 case 2: val |= 5 << 12; break; /* 96k */ 1588 case 3: val |= 6 << 12; break; /* 192k */ 1589 case 10: val |= 4 << 12; break; /* 88.2k */ 1590 case 11: val |= 7 << 12; break; /* 176.4k */ 1591 } 1592 } else { 1593 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1594 case IEC958_AES0_PRO_FS_44100: 1595 break; 1596 case IEC958_AES0_PRO_FS_32000: 1597 val |= 3U << 12; 1598 break; 1599 default: 1600 val |= 2U << 12; 1601 break; 1602 } 1603 } 1604 } else { 1605 /* consumer */ 1606 val |= diga->status[1] & 0x04; /* copyright */ 1607 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1608 IEC958_AES0_CON_EMPHASIS_5015) 1609 val |= 1U << 3; 1610 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1611 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1612 } 1613 return val; 1614 } 1615 1616 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1617 { 1618 memset(diga->status, 0, sizeof(diga->status)); 1619 diga->status[0] = val & 0x03; /* professional, non-audio */ 1620 if (val & 0x01) { 1621 /* professional */ 1622 if (val & (1U << 3)) 1623 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1624 switch ((val >> 12) & 0x7) { 1625 case 0: 1626 break; 1627 case 2: 1628 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1629 break; 1630 default: 1631 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1632 break; 1633 } 1634 } else { 1635 /* consumer */ 1636 diga->status[0] |= val & (1U << 2); /* copyright */ 1637 if (val & (1U << 3)) 1638 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1639 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1640 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1641 } 1642 } 1643 1644 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1645 struct snd_ctl_elem_value *ucontrol) 1646 { 1647 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1648 unsigned int val; 1649 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1650 decode_spdif_bits(&ucontrol->value.iec958, val); 1651 return 0; 1652 } 1653 1654 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1655 struct snd_ctl_elem_value *ucontrol) 1656 { 1657 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1658 unsigned int val, old; 1659 1660 val = encode_spdif_bits(&ucontrol->value.iec958); 1661 spin_lock_irq(&ice->reg_lock); 1662 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1663 if (val != old) 1664 update_spdif_bits(ice, val); 1665 spin_unlock_irq(&ice->reg_lock); 1666 return val != old; 1667 } 1668 1669 static const struct snd_kcontrol_new snd_vt1724_spdif_default = 1670 { 1671 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1672 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1673 .info = snd_vt1724_spdif_info, 1674 .get = snd_vt1724_spdif_default_get, 1675 .put = snd_vt1724_spdif_default_put 1676 }; 1677 1678 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1679 struct snd_ctl_elem_value *ucontrol) 1680 { 1681 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1682 IEC958_AES0_PROFESSIONAL | 1683 IEC958_AES0_CON_NOT_COPYRIGHT | 1684 IEC958_AES0_CON_EMPHASIS; 1685 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1686 IEC958_AES1_CON_CATEGORY; 1687 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1688 return 0; 1689 } 1690 1691 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1692 struct snd_ctl_elem_value *ucontrol) 1693 { 1694 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1695 IEC958_AES0_PROFESSIONAL | 1696 IEC958_AES0_PRO_FS | 1697 IEC958_AES0_PRO_EMPHASIS; 1698 return 0; 1699 } 1700 1701 static const struct snd_kcontrol_new snd_vt1724_spdif_maskc = 1702 { 1703 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1704 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1705 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1706 .info = snd_vt1724_spdif_info, 1707 .get = snd_vt1724_spdif_maskc_get, 1708 }; 1709 1710 static const struct snd_kcontrol_new snd_vt1724_spdif_maskp = 1711 { 1712 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1713 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1714 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1715 .info = snd_vt1724_spdif_info, 1716 .get = snd_vt1724_spdif_maskp_get, 1717 }; 1718 1719 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1720 1721 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1722 struct snd_ctl_elem_value *ucontrol) 1723 { 1724 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1725 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1726 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1727 return 0; 1728 } 1729 1730 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1731 struct snd_ctl_elem_value *ucontrol) 1732 { 1733 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1734 unsigned char old, val; 1735 1736 spin_lock_irq(&ice->reg_lock); 1737 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1738 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1739 if (ucontrol->value.integer.value[0]) 1740 val |= VT1724_CFG_SPDIF_OUT_EN; 1741 if (old != val) 1742 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1743 spin_unlock_irq(&ice->reg_lock); 1744 return old != val; 1745 } 1746 1747 static const struct snd_kcontrol_new snd_vt1724_spdif_switch = 1748 { 1749 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1750 /* FIXME: the following conflict with IEC958 Playback Route */ 1751 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1752 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1753 .info = snd_vt1724_spdif_sw_info, 1754 .get = snd_vt1724_spdif_sw_get, 1755 .put = snd_vt1724_spdif_sw_put 1756 }; 1757 1758 1759 #if 0 /* NOT USED YET */ 1760 /* 1761 * GPIO access from extern 1762 */ 1763 1764 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1765 1766 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1767 struct snd_ctl_elem_value *ucontrol) 1768 { 1769 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1770 int shift = kcontrol->private_value & 0xff; 1771 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1772 1773 snd_ice1712_save_gpio_status(ice); 1774 ucontrol->value.integer.value[0] = 1775 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1776 snd_ice1712_restore_gpio_status(ice); 1777 return 0; 1778 } 1779 1780 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1781 struct snd_ctl_elem_value *ucontrol) 1782 { 1783 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1784 int shift = kcontrol->private_value & 0xff; 1785 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1786 unsigned int val, nval; 1787 1788 if (kcontrol->private_value & (1 << 31)) 1789 return -EPERM; 1790 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1791 snd_ice1712_save_gpio_status(ice); 1792 val = snd_ice1712_gpio_read(ice); 1793 nval |= val & ~(1 << shift); 1794 if (val != nval) 1795 snd_ice1712_gpio_write(ice, nval); 1796 snd_ice1712_restore_gpio_status(ice); 1797 return val != nval; 1798 } 1799 #endif /* NOT USED YET */ 1800 1801 /* 1802 * rate 1803 */ 1804 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1805 struct snd_ctl_elem_info *uinfo) 1806 { 1807 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1808 int hw_rates_count = ice->hw_rates->count; 1809 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1810 uinfo->count = 1; 1811 1812 /* internal clocks */ 1813 uinfo->value.enumerated.items = hw_rates_count; 1814 /* external clocks */ 1815 if (ice->force_rdma1 || 1816 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1817 uinfo->value.enumerated.items += ice->ext_clock_count; 1818 /* upper limit - keep at top */ 1819 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1820 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1821 if (uinfo->value.enumerated.item >= hw_rates_count) 1822 /* ext_clock items */ 1823 strcpy(uinfo->value.enumerated.name, 1824 ice->ext_clock_names[ 1825 uinfo->value.enumerated.item - hw_rates_count]); 1826 else 1827 /* int clock items */ 1828 sprintf(uinfo->value.enumerated.name, "%d", 1829 ice->hw_rates->list[uinfo->value.enumerated.item]); 1830 return 0; 1831 } 1832 1833 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1834 struct snd_ctl_elem_value *ucontrol) 1835 { 1836 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1837 unsigned int i, rate; 1838 1839 spin_lock_irq(&ice->reg_lock); 1840 if (ice->is_spdif_master(ice)) { 1841 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1842 ice->get_spdif_master_type(ice); 1843 } else { 1844 rate = ice->get_rate(ice); 1845 ucontrol->value.enumerated.item[0] = 0; 1846 for (i = 0; i < ice->hw_rates->count; i++) { 1847 if (ice->hw_rates->list[i] == rate) { 1848 ucontrol->value.enumerated.item[0] = i; 1849 break; 1850 } 1851 } 1852 } 1853 spin_unlock_irq(&ice->reg_lock); 1854 return 0; 1855 } 1856 1857 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1858 { 1859 /* standard external clock - only single type - SPDIF IN */ 1860 return 0; 1861 } 1862 1863 /* setting clock to external - SPDIF */ 1864 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1865 { 1866 unsigned char oval; 1867 unsigned char i2s_oval; 1868 oval = inb(ICEMT1724(ice, RATE)); 1869 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1870 /* setting 256fs */ 1871 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1872 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1873 return 0; 1874 } 1875 1876 1877 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1878 struct snd_ctl_elem_value *ucontrol) 1879 { 1880 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1881 unsigned int old_rate, new_rate; 1882 unsigned int item = ucontrol->value.enumerated.item[0]; 1883 unsigned int first_ext_clock = ice->hw_rates->count; 1884 1885 if (item > first_ext_clock + ice->ext_clock_count - 1) 1886 return -EINVAL; 1887 1888 /* if rate = 0 => external clock */ 1889 spin_lock_irq(&ice->reg_lock); 1890 if (ice->is_spdif_master(ice)) 1891 old_rate = 0; 1892 else 1893 old_rate = ice->get_rate(ice); 1894 if (item >= first_ext_clock) { 1895 /* switching to external clock */ 1896 ice->set_spdif_clock(ice, item - first_ext_clock); 1897 new_rate = 0; 1898 } else { 1899 /* internal on-card clock */ 1900 new_rate = ice->hw_rates->list[item]; 1901 ice->pro_rate_default = new_rate; 1902 spin_unlock_irq(&ice->reg_lock); 1903 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1904 spin_lock_irq(&ice->reg_lock); 1905 } 1906 spin_unlock_irq(&ice->reg_lock); 1907 1908 /* the first switch to the ext. clock mode? */ 1909 if (old_rate != new_rate && !new_rate) { 1910 /* notify akm chips as well */ 1911 unsigned int i; 1912 if (ice->gpio.set_pro_rate) 1913 ice->gpio.set_pro_rate(ice, 0); 1914 for (i = 0; i < ice->akm_codecs; i++) { 1915 if (ice->akm[i].ops.set_rate_val) 1916 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1917 } 1918 } 1919 return old_rate != new_rate; 1920 } 1921 1922 static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = { 1923 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1924 .name = "Multi Track Internal Clock", 1925 .info = snd_vt1724_pro_internal_clock_info, 1926 .get = snd_vt1724_pro_internal_clock_get, 1927 .put = snd_vt1724_pro_internal_clock_put 1928 }; 1929 1930 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1931 1932 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1933 struct snd_ctl_elem_value *ucontrol) 1934 { 1935 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1936 return 0; 1937 } 1938 1939 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1940 struct snd_ctl_elem_value *ucontrol) 1941 { 1942 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1943 int change = 0, nval; 1944 1945 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1946 spin_lock_irq(&ice->reg_lock); 1947 change = PRO_RATE_LOCKED != nval; 1948 PRO_RATE_LOCKED = nval; 1949 spin_unlock_irq(&ice->reg_lock); 1950 return change; 1951 } 1952 1953 static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = { 1954 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1955 .name = "Multi Track Rate Locking", 1956 .info = snd_vt1724_pro_rate_locking_info, 1957 .get = snd_vt1724_pro_rate_locking_get, 1958 .put = snd_vt1724_pro_rate_locking_put 1959 }; 1960 1961 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1962 1963 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1964 struct snd_ctl_elem_value *ucontrol) 1965 { 1966 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1967 return 0; 1968 } 1969 1970 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1971 struct snd_ctl_elem_value *ucontrol) 1972 { 1973 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1974 int change = 0, nval; 1975 1976 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1977 spin_lock_irq(&ice->reg_lock); 1978 change = PRO_RATE_RESET != nval; 1979 PRO_RATE_RESET = nval; 1980 spin_unlock_irq(&ice->reg_lock); 1981 return change; 1982 } 1983 1984 static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = { 1985 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1986 .name = "Multi Track Rate Reset", 1987 .info = snd_vt1724_pro_rate_reset_info, 1988 .get = snd_vt1724_pro_rate_reset_get, 1989 .put = snd_vt1724_pro_rate_reset_put 1990 }; 1991 1992 1993 /* 1994 * routing 1995 */ 1996 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 1997 struct snd_ctl_elem_info *uinfo) 1998 { 1999 static const char * const texts[] = { 2000 "PCM Out", /* 0 */ 2001 "H/W In 0", "H/W In 1", /* 1-2 */ 2002 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2003 }; 2004 2005 return snd_ctl_enum_info(uinfo, 1, 5, texts); 2006 } 2007 2008 static inline int analog_route_shift(int idx) 2009 { 2010 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2011 } 2012 2013 static inline int digital_route_shift(int idx) 2014 { 2015 return idx * 3; 2016 } 2017 2018 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2019 { 2020 unsigned long val; 2021 unsigned char eitem; 2022 static const unsigned char xlate[8] = { 2023 0, 255, 1, 2, 255, 255, 3, 4, 2024 }; 2025 2026 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2027 val >>= shift; 2028 val &= 7; /* we now have 3 bits per output */ 2029 eitem = xlate[val]; 2030 if (eitem == 255) { 2031 snd_BUG(); 2032 return 0; 2033 } 2034 return eitem; 2035 } 2036 2037 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2038 int shift) 2039 { 2040 unsigned int old_val, nval; 2041 int change; 2042 static const unsigned char xroute[8] = { 2043 0, /* PCM */ 2044 2, /* PSDIN0 Left */ 2045 3, /* PSDIN0 Right */ 2046 6, /* SPDIN Left */ 2047 7, /* SPDIN Right */ 2048 }; 2049 2050 nval = xroute[val % 5]; 2051 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2052 val &= ~(0x07 << shift); 2053 val |= nval << shift; 2054 change = val != old_val; 2055 if (change) 2056 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2057 return change; 2058 } 2059 2060 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2061 struct snd_ctl_elem_value *ucontrol) 2062 { 2063 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2064 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2065 ucontrol->value.enumerated.item[0] = 2066 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2067 return 0; 2068 } 2069 2070 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2071 struct snd_ctl_elem_value *ucontrol) 2072 { 2073 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2074 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2075 return snd_ice1724_put_route_val(ice, 2076 ucontrol->value.enumerated.item[0], 2077 analog_route_shift(idx)); 2078 } 2079 2080 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2081 struct snd_ctl_elem_value *ucontrol) 2082 { 2083 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2084 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2085 ucontrol->value.enumerated.item[0] = 2086 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2087 return 0; 2088 } 2089 2090 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2091 struct snd_ctl_elem_value *ucontrol) 2092 { 2093 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2094 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2095 return snd_ice1724_put_route_val(ice, 2096 ucontrol->value.enumerated.item[0], 2097 digital_route_shift(idx)); 2098 } 2099 2100 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route = 2101 { 2102 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2103 .name = "H/W Playback Route", 2104 .info = snd_vt1724_pro_route_info, 2105 .get = snd_vt1724_pro_route_analog_get, 2106 .put = snd_vt1724_pro_route_analog_put, 2107 }; 2108 2109 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = { 2110 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2111 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2112 .info = snd_vt1724_pro_route_info, 2113 .get = snd_vt1724_pro_route_spdif_get, 2114 .put = snd_vt1724_pro_route_spdif_put, 2115 .count = 2, 2116 }; 2117 2118 2119 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2120 struct snd_ctl_elem_info *uinfo) 2121 { 2122 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2123 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2124 uinfo->value.integer.min = 0; 2125 uinfo->value.integer.max = 255; 2126 return 0; 2127 } 2128 2129 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2130 struct snd_ctl_elem_value *ucontrol) 2131 { 2132 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2133 int idx; 2134 2135 spin_lock_irq(&ice->reg_lock); 2136 for (idx = 0; idx < 22; idx++) { 2137 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2138 ucontrol->value.integer.value[idx] = 2139 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2140 } 2141 spin_unlock_irq(&ice->reg_lock); 2142 return 0; 2143 } 2144 2145 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = { 2146 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2147 .name = "Multi Track Peak", 2148 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2149 .info = snd_vt1724_pro_peak_info, 2150 .get = snd_vt1724_pro_peak_get 2151 }; 2152 2153 /* 2154 ooAoo cards with no controls 2155 */ 2156 static const unsigned char ooaoo_sq210_eeprom[] = { 2157 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2158 1xDACs */ 2159 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2160 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2161 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2162 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2163 [ICE_EEP2_GPIO_DIR1] = 0x00, 2164 [ICE_EEP2_GPIO_DIR2] = 0x00, 2165 [ICE_EEP2_GPIO_MASK] = 0xff, 2166 [ICE_EEP2_GPIO_MASK1] = 0xff, 2167 [ICE_EEP2_GPIO_MASK2] = 0xff, 2168 2169 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2170 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2171 and GPIO15 always zero */ 2172 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2173 }; 2174 2175 2176 static const struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = { 2177 { 2178 .name = "ooAoo SQ210a", 2179 .model = "sq210a", 2180 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2181 .eeprom_data = ooaoo_sq210_eeprom, 2182 }, 2183 { } /* terminator */ 2184 }; 2185 2186 static const struct snd_ice1712_card_info *card_tables[] = { 2187 snd_vt1724_revo_cards, 2188 snd_vt1724_amp_cards, 2189 snd_vt1724_aureon_cards, 2190 snd_vt1720_mobo_cards, 2191 snd_vt1720_pontis_cards, 2192 snd_vt1724_prodigy_hifi_cards, 2193 snd_vt1724_prodigy192_cards, 2194 snd_vt1724_juli_cards, 2195 snd_vt1724_maya44_cards, 2196 snd_vt1724_phase_cards, 2197 snd_vt1724_wtm_cards, 2198 snd_vt1724_se_cards, 2199 snd_vt1724_qtet_cards, 2200 snd_vt1724_ooaoo_cards, 2201 snd_vt1724_psc724_cards, 2202 NULL, 2203 }; 2204 2205 2206 /* 2207 */ 2208 2209 static void wait_i2c_busy(struct snd_ice1712 *ice) 2210 { 2211 int t = 0x10000; 2212 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2213 ; 2214 if (t == -1) 2215 dev_err(ice->card->dev, "i2c busy timeout\n"); 2216 } 2217 2218 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2219 unsigned char dev, unsigned char addr) 2220 { 2221 unsigned char val; 2222 2223 mutex_lock(&ice->i2c_mutex); 2224 wait_i2c_busy(ice); 2225 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2226 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2227 wait_i2c_busy(ice); 2228 val = inb(ICEREG1724(ice, I2C_DATA)); 2229 mutex_unlock(&ice->i2c_mutex); 2230 /* 2231 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2232 */ 2233 return val; 2234 } 2235 2236 void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2237 unsigned char dev, unsigned char addr, unsigned char data) 2238 { 2239 mutex_lock(&ice->i2c_mutex); 2240 wait_i2c_busy(ice); 2241 /* 2242 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2243 */ 2244 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2245 outb(data, ICEREG1724(ice, I2C_DATA)); 2246 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2247 wait_i2c_busy(ice); 2248 mutex_unlock(&ice->i2c_mutex); 2249 } 2250 2251 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2252 const char *modelname) 2253 { 2254 const int dev = 0xa0; /* EEPROM device address */ 2255 unsigned int i, size; 2256 const struct snd_ice1712_card_info * const *tbl, *c; 2257 2258 if (!modelname || !*modelname) { 2259 ice->eeprom.subvendor = 0; 2260 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2261 ice->eeprom.subvendor = 2262 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2263 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2264 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2265 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2266 if (ice->eeprom.subvendor == 0 || 2267 ice->eeprom.subvendor == (unsigned int)-1) { 2268 /* invalid subvendor from EEPROM, try the PCI 2269 * subststem ID instead 2270 */ 2271 u16 vendor, device; 2272 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2273 &vendor); 2274 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2275 ice->eeprom.subvendor = 2276 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2277 if (ice->eeprom.subvendor == 0 || 2278 ice->eeprom.subvendor == (unsigned int)-1) { 2279 dev_err(ice->card->dev, 2280 "No valid ID is found\n"); 2281 return -ENXIO; 2282 } 2283 } 2284 } 2285 for (tbl = card_tables; *tbl; tbl++) { 2286 for (c = *tbl; c->name; c++) { 2287 if (modelname && c->model && 2288 !strcmp(modelname, c->model)) { 2289 dev_info(ice->card->dev, 2290 "Using board model %s\n", 2291 c->name); 2292 ice->eeprom.subvendor = c->subvendor; 2293 } else if (c->subvendor != ice->eeprom.subvendor) 2294 continue; 2295 ice->card_info = c; 2296 if (!c->eeprom_size || !c->eeprom_data) 2297 goto found; 2298 /* if the EEPROM is given by the driver, use it */ 2299 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2300 ice->eeprom.version = 2; 2301 ice->eeprom.size = c->eeprom_size + 6; 2302 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2303 goto read_skipped; 2304 } 2305 } 2306 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2307 ice->eeprom.subvendor); 2308 #ifdef CONFIG_PM_SLEEP 2309 /* assume AC97-only card which can suspend without additional code */ 2310 ice->pm_suspend_enabled = 1; 2311 #endif 2312 2313 found: 2314 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2315 if (ice->eeprom.size < 6) 2316 ice->eeprom.size = 32; 2317 else if (ice->eeprom.size > 32) { 2318 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n", 2319 ice->eeprom.size); 2320 return -EIO; 2321 } 2322 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2323 if (ice->eeprom.version != 1 && ice->eeprom.version != 2) 2324 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n", 2325 ice->eeprom.version); 2326 size = ice->eeprom.size - 6; 2327 for (i = 0; i < size; i++) 2328 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2329 2330 read_skipped: 2331 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2332 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2333 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2334 2335 return 0; 2336 } 2337 2338 2339 2340 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2341 { 2342 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2343 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2344 msleep(10); 2345 outb(0, ICEREG1724(ice, CONTROL)); 2346 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2347 msleep(10); 2348 } 2349 2350 static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2351 { 2352 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2353 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2354 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2355 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2356 2357 ice->gpio.write_mask = ice->eeprom.gpiomask; 2358 ice->gpio.direction = ice->eeprom.gpiodir; 2359 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2360 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2361 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2362 2363 outb(0, ICEREG1724(ice, POWERDOWN)); 2364 2365 /* MPU_RX and TX irq masks are cleared later dynamically */ 2366 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2367 2368 /* don't handle FIFO overrun/underruns (just yet), 2369 * since they cause machine lockups 2370 */ 2371 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2372 2373 return 0; 2374 } 2375 2376 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2377 { 2378 int err; 2379 struct snd_kcontrol *kctl; 2380 2381 if (snd_BUG_ON(!ice->pcm)) 2382 return -EIO; 2383 2384 if (!ice->own_routing) { 2385 err = snd_ctl_add(ice->card, 2386 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2387 if (err < 0) 2388 return err; 2389 } 2390 2391 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2392 if (err < 0) 2393 return err; 2394 2395 kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice); 2396 kctl->id.device = ice->pcm->device; 2397 err = snd_ctl_add(ice->card, kctl); 2398 if (err < 0) 2399 return err; 2400 kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice); 2401 kctl->id.device = ice->pcm->device; 2402 err = snd_ctl_add(ice->card, kctl); 2403 if (err < 0) 2404 return err; 2405 kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice); 2406 kctl->id.device = ice->pcm->device; 2407 err = snd_ctl_add(ice->card, kctl); 2408 if (err < 0) 2409 return err; 2410 #if 0 /* use default only */ 2411 kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice); 2412 kctl->id.device = ice->pcm->device; 2413 err = snd_ctl_add(ice->card, kctl); 2414 if (err < 0) 2415 return err; 2416 ice->spdif.stream_ctl = kctl; 2417 #endif 2418 return 0; 2419 } 2420 2421 2422 static int snd_vt1724_build_controls(struct snd_ice1712 *ice) 2423 { 2424 int err; 2425 2426 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2427 if (err < 0) 2428 return err; 2429 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2430 if (err < 0) 2431 return err; 2432 2433 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2434 if (err < 0) 2435 return err; 2436 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2437 if (err < 0) 2438 return err; 2439 2440 if (!ice->own_routing && ice->num_total_dacs > 0) { 2441 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2442 tmp.count = ice->num_total_dacs; 2443 if (ice->vt1720 && tmp.count > 2) 2444 tmp.count = 2; 2445 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2446 if (err < 0) 2447 return err; 2448 } 2449 2450 return snd_ctl_add(ice->card, 2451 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2452 } 2453 2454 static void snd_vt1724_free(struct snd_card *card) 2455 { 2456 struct snd_ice1712 *ice = card->private_data; 2457 2458 /* mask all interrupts */ 2459 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2460 outb(0xff, ICEREG1724(ice, IRQMASK)); 2461 2462 snd_ice1712_akm4xxx_free(ice); 2463 } 2464 2465 static int snd_vt1724_create(struct snd_card *card, 2466 struct pci_dev *pci, 2467 const char *modelname) 2468 { 2469 struct snd_ice1712 *ice = card->private_data; 2470 int err; 2471 2472 /* enable PCI device */ 2473 err = pcim_enable_device(pci); 2474 if (err < 0) 2475 return err; 2476 2477 ice->vt1724 = 1; 2478 spin_lock_init(&ice->reg_lock); 2479 mutex_init(&ice->gpio_mutex); 2480 mutex_init(&ice->open_mutex); 2481 mutex_init(&ice->i2c_mutex); 2482 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2483 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2484 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2485 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2486 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2487 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2488 ice->card = card; 2489 ice->pci = pci; 2490 ice->irq = -1; 2491 pci_set_master(pci); 2492 snd_vt1724_proc_init(ice); 2493 2494 err = pci_request_regions(pci, "ICE1724"); 2495 if (err < 0) 2496 return err; 2497 ice->port = pci_resource_start(pci, 0); 2498 ice->profi_port = pci_resource_start(pci, 1); 2499 2500 if (devm_request_irq(&pci->dev, pci->irq, snd_vt1724_interrupt, 2501 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2502 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2503 return -EIO; 2504 } 2505 2506 ice->irq = pci->irq; 2507 card->sync_irq = ice->irq; 2508 card->private_free = snd_vt1724_free; 2509 2510 snd_vt1724_chip_reset(ice); 2511 if (snd_vt1724_read_eeprom(ice, modelname) < 0) 2512 return -EIO; 2513 if (snd_vt1724_chip_init(ice) < 0) 2514 return -EIO; 2515 2516 return 0; 2517 } 2518 2519 2520 /* 2521 * 2522 * Registration 2523 * 2524 */ 2525 2526 static int __snd_vt1724_probe(struct pci_dev *pci, 2527 const struct pci_device_id *pci_id) 2528 { 2529 static int dev; 2530 struct snd_card *card; 2531 struct snd_ice1712 *ice; 2532 int pcm_dev = 0, err; 2533 const struct snd_ice1712_card_info *c; 2534 2535 if (dev >= SNDRV_CARDS) 2536 return -ENODEV; 2537 if (!enable[dev]) { 2538 dev++; 2539 return -ENOENT; 2540 } 2541 2542 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2543 sizeof(*ice), &card); 2544 if (err < 0) 2545 return err; 2546 ice = card->private_data; 2547 2548 strcpy(card->driver, "ICE1724"); 2549 strcpy(card->shortname, "ICEnsemble ICE1724"); 2550 2551 err = snd_vt1724_create(card, pci, model[dev]); 2552 if (err < 0) 2553 return err; 2554 2555 /* field init before calling chip_init */ 2556 ice->ext_clock_count = 0; 2557 2558 c = ice->card_info; 2559 if (c) { 2560 strcpy(card->shortname, c->name); 2561 if (c->driver) /* specific driver? */ 2562 strcpy(card->driver, c->driver); 2563 if (c->chip_init) { 2564 err = c->chip_init(ice); 2565 if (err < 0) 2566 return err; 2567 } 2568 } 2569 2570 /* 2571 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2572 * ICE1712 has only one for both (mixed up). 2573 * 2574 * Confusingly the analog PCM is named "professional" here because it 2575 * was called so in ice1712 driver, and vt1724 driver is derived from 2576 * ice1712 driver. 2577 */ 2578 ice->pro_rate_default = PRO_RATE_DEFAULT; 2579 if (!ice->is_spdif_master) 2580 ice->is_spdif_master = stdclock_is_spdif_master; 2581 if (!ice->get_rate) 2582 ice->get_rate = stdclock_get_rate; 2583 if (!ice->set_rate) 2584 ice->set_rate = stdclock_set_rate; 2585 if (!ice->set_mclk) 2586 ice->set_mclk = stdclock_set_mclk; 2587 if (!ice->set_spdif_clock) 2588 ice->set_spdif_clock = stdclock_set_spdif_clock; 2589 if (!ice->get_spdif_master_type) 2590 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2591 if (!ice->ext_clock_names) 2592 ice->ext_clock_names = ext_clock_names; 2593 if (!ice->ext_clock_count) 2594 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2595 2596 if (!ice->hw_rates) 2597 set_std_hw_rates(ice); 2598 2599 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2600 if (err < 0) 2601 return err; 2602 2603 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2604 if (err < 0) 2605 return err; 2606 2607 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2608 if (err < 0) 2609 return err; 2610 2611 err = snd_vt1724_ac97_mixer(ice); 2612 if (err < 0) 2613 return err; 2614 2615 err = snd_vt1724_build_controls(ice); 2616 if (err < 0) 2617 return err; 2618 2619 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2620 err = snd_vt1724_spdif_build_controls(ice); 2621 if (err < 0) 2622 return err; 2623 } 2624 2625 if (c && c->build_controls) { 2626 err = c->build_controls(ice); 2627 if (err < 0) 2628 return err; 2629 } 2630 2631 if (!c || !c->no_mpu401) { 2632 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2633 struct snd_rawmidi *rmidi; 2634 2635 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2636 if (err < 0) 2637 return err; 2638 ice->rmidi[0] = rmidi; 2639 rmidi->private_data = ice; 2640 strcpy(rmidi->name, "ICE1724 MIDI"); 2641 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2642 SNDRV_RAWMIDI_INFO_INPUT | 2643 SNDRV_RAWMIDI_INFO_DUPLEX; 2644 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2645 &vt1724_midi_output_ops); 2646 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2647 &vt1724_midi_input_ops); 2648 2649 /* set watermarks */ 2650 outb(VT1724_MPU_RX_FIFO | 0x1, 2651 ICEREG1724(ice, MPU_FIFO_WM)); 2652 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2653 /* set UART mode */ 2654 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2655 } 2656 } 2657 2658 sprintf(card->longname, "%s at 0x%lx, irq %i", 2659 card->shortname, ice->port, ice->irq); 2660 2661 err = snd_card_register(card); 2662 if (err < 0) 2663 return err; 2664 pci_set_drvdata(pci, card); 2665 dev++; 2666 return 0; 2667 } 2668 2669 static int snd_vt1724_probe(struct pci_dev *pci, 2670 const struct pci_device_id *pci_id) 2671 { 2672 return snd_card_free_on_error(&pci->dev, __snd_vt1724_probe(pci, pci_id)); 2673 } 2674 2675 #ifdef CONFIG_PM_SLEEP 2676 static int snd_vt1724_suspend(struct device *dev) 2677 { 2678 struct snd_card *card = dev_get_drvdata(dev); 2679 struct snd_ice1712 *ice = card->private_data; 2680 2681 if (!ice->pm_suspend_enabled) 2682 return 0; 2683 2684 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2685 2686 snd_ac97_suspend(ice->ac97); 2687 2688 spin_lock_irq(&ice->reg_lock); 2689 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2690 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2691 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2692 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2693 spin_unlock_irq(&ice->reg_lock); 2694 2695 if (ice->pm_suspend) 2696 ice->pm_suspend(ice); 2697 return 0; 2698 } 2699 2700 static int snd_vt1724_resume(struct device *dev) 2701 { 2702 struct snd_card *card = dev_get_drvdata(dev); 2703 struct snd_ice1712 *ice = card->private_data; 2704 2705 if (!ice->pm_suspend_enabled) 2706 return 0; 2707 2708 snd_vt1724_chip_reset(ice); 2709 2710 if (snd_vt1724_chip_init(ice) < 0) { 2711 snd_card_disconnect(card); 2712 return -EIO; 2713 } 2714 2715 if (ice->pm_resume) 2716 ice->pm_resume(ice); 2717 2718 if (ice->pm_saved_is_spdif_master) { 2719 /* switching to external clock via SPDIF */ 2720 ice->set_spdif_clock(ice, 0); 2721 } else { 2722 /* internal on-card clock */ 2723 int rate; 2724 if (ice->cur_rate) 2725 rate = ice->cur_rate; 2726 else 2727 rate = ice->pro_rate_default; 2728 snd_vt1724_set_pro_rate(ice, rate, 1); 2729 } 2730 2731 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2732 2733 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2734 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2735 2736 snd_ac97_resume(ice->ac97); 2737 2738 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2739 return 0; 2740 } 2741 2742 static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume); 2743 #define SND_VT1724_PM_OPS &snd_vt1724_pm 2744 #else 2745 #define SND_VT1724_PM_OPS NULL 2746 #endif /* CONFIG_PM_SLEEP */ 2747 2748 static struct pci_driver vt1724_driver = { 2749 .name = KBUILD_MODNAME, 2750 .id_table = snd_vt1724_ids, 2751 .probe = snd_vt1724_probe, 2752 .driver = { 2753 .pm = SND_VT1724_PM_OPS, 2754 }, 2755 }; 2756 2757 module_pci_driver(vt1724_driver); 2758