1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 4 * VIA VT1720 (Envy24PT) 5 * 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 7 * 2002 James Stafford <jstafford@ampltd.com> 8 * 2003 Takashi Iwai <tiwai@suse.de> 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/interrupt.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/slab.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <sound/core.h> 19 #include <sound/info.h> 20 #include <sound/rawmidi.h> 21 #include <sound/initval.h> 22 23 #include <sound/asoundef.h> 24 25 #include "ice1712.h" 26 #include "envy24ht.h" 27 28 /* lowlevel routines */ 29 #include "amp.h" 30 #include "revo.h" 31 #include "aureon.h" 32 #include "vt1720_mobo.h" 33 #include "pontis.h" 34 #include "prodigy192.h" 35 #include "prodigy_hifi.h" 36 #include "juli.h" 37 #include "maya44.h" 38 #include "phase.h" 39 #include "wtm.h" 40 #include "se.h" 41 #include "quartet.h" 42 #include "psc724.h" 43 44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 45 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 46 MODULE_LICENSE("GPL"); 47 MODULE_SUPPORTED_DEVICE("{" 48 REVO_DEVICE_DESC 49 AMP_AUDIO2000_DEVICE_DESC 50 AUREON_DEVICE_DESC 51 VT1720_MOBO_DEVICE_DESC 52 PONTIS_DEVICE_DESC 53 PRODIGY192_DEVICE_DESC 54 PRODIGY_HIFI_DEVICE_DESC 55 JULI_DEVICE_DESC 56 MAYA44_DEVICE_DESC 57 PHASE_DEVICE_DESC 58 WTM_DEVICE_DESC 59 SE_DEVICE_DESC 60 QTET_DEVICE_DESC 61 "{VIA,VT1720}," 62 "{VIA,VT1724}," 63 "{ICEnsemble,Generic ICE1724}," 64 "{ICEnsemble,Generic Envy24HT}" 65 "{ICEnsemble,Generic Envy24PT}}"); 66 67 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 68 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 69 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 70 static char *model[SNDRV_CARDS]; 71 72 module_param_array(index, int, NULL, 0444); 73 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 74 module_param_array(id, charp, NULL, 0444); 75 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 76 module_param_array(enable, bool, NULL, 0444); 77 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 78 module_param_array(model, charp, NULL, 0444); 79 MODULE_PARM_DESC(model, "Use the given board model."); 80 81 82 /* Both VT1720 and VT1724 have the same PCI IDs */ 83 static const struct pci_device_id snd_vt1724_ids[] = { 84 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 85 { 0, } 86 }; 87 88 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 89 90 91 static int PRO_RATE_LOCKED; 92 static int PRO_RATE_RESET = 1; 93 static unsigned int PRO_RATE_DEFAULT = 44100; 94 95 static const char * const ext_clock_names[1] = { "IEC958 In" }; 96 97 /* 98 * Basic I/O 99 */ 100 101 /* 102 * default rates, default clock routines 103 */ 104 105 /* check whether the clock mode is spdif-in */ 106 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 107 { 108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 109 } 110 111 /* 112 * locking rate makes sense only for internal clock mode 113 */ 114 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 115 { 116 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 117 } 118 119 /* 120 * ac97 section 121 */ 122 123 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 124 { 125 unsigned char old_cmd; 126 int tm; 127 for (tm = 0; tm < 0x10000; tm++) { 128 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 129 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 130 continue; 131 if (!(old_cmd & VT1724_AC97_READY)) 132 continue; 133 return old_cmd; 134 } 135 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n"); 136 return old_cmd; 137 } 138 139 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 140 { 141 int tm; 142 for (tm = 0; tm < 0x10000; tm++) 143 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 144 return 0; 145 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n"); 146 return -EIO; 147 } 148 149 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 150 unsigned short reg, 151 unsigned short val) 152 { 153 struct snd_ice1712 *ice = ac97->private_data; 154 unsigned char old_cmd; 155 156 old_cmd = snd_vt1724_ac97_ready(ice); 157 old_cmd &= ~VT1724_AC97_ID_MASK; 158 old_cmd |= ac97->num; 159 outb(reg, ICEMT1724(ice, AC97_INDEX)); 160 outw(val, ICEMT1724(ice, AC97_DATA)); 161 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 162 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 163 } 164 165 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 166 { 167 struct snd_ice1712 *ice = ac97->private_data; 168 unsigned char old_cmd; 169 170 old_cmd = snd_vt1724_ac97_ready(ice); 171 old_cmd &= ~VT1724_AC97_ID_MASK; 172 old_cmd |= ac97->num; 173 outb(reg, ICEMT1724(ice, AC97_INDEX)); 174 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 175 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 176 return ~0; 177 return inw(ICEMT1724(ice, AC97_DATA)); 178 } 179 180 181 /* 182 * GPIO operations 183 */ 184 185 /* set gpio direction 0 = read, 1 = write */ 186 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 187 { 188 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 189 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 190 } 191 192 /* get gpio direction 0 = read, 1 = write */ 193 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 194 { 195 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 196 } 197 198 /* set the gpio mask (0 = writable) */ 199 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 200 { 201 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 202 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 203 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 204 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 205 } 206 207 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 208 { 209 unsigned int mask; 210 if (!ice->vt1720) 211 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 212 else 213 mask = 0; 214 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 215 return mask; 216 } 217 218 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 219 { 220 outw(data, ICEREG1724(ice, GPIO_DATA)); 221 if (!ice->vt1720) 222 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 223 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 224 } 225 226 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 227 { 228 unsigned int data; 229 if (!ice->vt1720) 230 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 231 else 232 data = 0; 233 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 234 return data; 235 } 236 237 /* 238 * MIDI 239 */ 240 241 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 242 { 243 unsigned int count; 244 245 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 246 inb(ICEREG1724(ice, MPU_DATA)); 247 } 248 249 static inline struct snd_rawmidi_substream * 250 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 251 { 252 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 253 struct snd_rawmidi_substream, list); 254 } 255 256 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 257 258 static void vt1724_midi_write(struct snd_ice1712 *ice) 259 { 260 struct snd_rawmidi_substream *s; 261 int count, i; 262 u8 buffer[32]; 263 264 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 265 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 266 if (count > 0) { 267 count = snd_rawmidi_transmit(s, buffer, count); 268 for (i = 0; i < count; ++i) 269 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 270 } 271 /* mask irq when all bytes have been transmitted. 272 * enabled again in output_trigger when the new data comes in. 273 */ 274 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 275 !snd_rawmidi_transmit_empty(s)); 276 } 277 278 static void vt1724_midi_read(struct snd_ice1712 *ice) 279 { 280 struct snd_rawmidi_substream *s; 281 int count, i; 282 u8 buffer[32]; 283 284 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 285 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 286 if (count > 0) { 287 count = min(count, 32); 288 for (i = 0; i < count; ++i) 289 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 290 snd_rawmidi_receive(s, buffer, count); 291 } 292 } 293 294 /* call with ice->reg_lock */ 295 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 296 { 297 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 298 if (enable) 299 mask &= ~flag; 300 else 301 mask |= flag; 302 outb(mask, ICEREG1724(ice, IRQMASK)); 303 } 304 305 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 306 u8 flag, int enable) 307 { 308 struct snd_ice1712 *ice = substream->rmidi->private_data; 309 310 spin_lock_irq(&ice->reg_lock); 311 enable_midi_irq(ice, flag, enable); 312 spin_unlock_irq(&ice->reg_lock); 313 } 314 315 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 316 { 317 return 0; 318 } 319 320 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 321 { 322 return 0; 323 } 324 325 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 326 { 327 struct snd_ice1712 *ice = s->rmidi->private_data; 328 unsigned long flags; 329 330 spin_lock_irqsave(&ice->reg_lock, flags); 331 if (up) { 332 ice->midi_output = 1; 333 vt1724_midi_write(ice); 334 } else { 335 ice->midi_output = 0; 336 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 337 } 338 spin_unlock_irqrestore(&ice->reg_lock, flags); 339 } 340 341 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 342 { 343 struct snd_ice1712 *ice = s->rmidi->private_data; 344 unsigned long timeout; 345 346 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 347 /* 32 bytes should be transmitted in less than about 12 ms */ 348 timeout = jiffies + msecs_to_jiffies(15); 349 do { 350 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 351 break; 352 schedule_timeout_uninterruptible(1); 353 } while (time_after(timeout, jiffies)); 354 } 355 356 static const struct snd_rawmidi_ops vt1724_midi_output_ops = { 357 .open = vt1724_midi_output_open, 358 .close = vt1724_midi_output_close, 359 .trigger = vt1724_midi_output_trigger, 360 .drain = vt1724_midi_output_drain, 361 }; 362 363 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 364 { 365 vt1724_midi_clear_rx(s->rmidi->private_data); 366 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 367 return 0; 368 } 369 370 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 371 { 372 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 373 return 0; 374 } 375 376 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 377 { 378 struct snd_ice1712 *ice = s->rmidi->private_data; 379 unsigned long flags; 380 381 spin_lock_irqsave(&ice->reg_lock, flags); 382 if (up) { 383 ice->midi_input = 1; 384 vt1724_midi_read(ice); 385 } else { 386 ice->midi_input = 0; 387 } 388 spin_unlock_irqrestore(&ice->reg_lock, flags); 389 } 390 391 static const struct snd_rawmidi_ops vt1724_midi_input_ops = { 392 .open = vt1724_midi_input_open, 393 .close = vt1724_midi_input_close, 394 .trigger = vt1724_midi_input_trigger, 395 }; 396 397 398 /* 399 * Interrupt handler 400 */ 401 402 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 403 { 404 struct snd_ice1712 *ice = dev_id; 405 unsigned char status; 406 unsigned char status_mask = 407 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 408 int handled = 0; 409 int timeout = 0; 410 411 while (1) { 412 status = inb(ICEREG1724(ice, IRQSTAT)); 413 status &= status_mask; 414 if (status == 0) 415 break; 416 spin_lock(&ice->reg_lock); 417 if (++timeout > 10) { 418 status = inb(ICEREG1724(ice, IRQSTAT)); 419 dev_err(ice->card->dev, 420 "Too long irq loop, status = 0x%x\n", status); 421 if (status & VT1724_IRQ_MPU_TX) { 422 dev_err(ice->card->dev, "Disabling MPU_TX\n"); 423 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 424 } 425 spin_unlock(&ice->reg_lock); 426 break; 427 } 428 handled = 1; 429 if (status & VT1724_IRQ_MPU_TX) { 430 if (ice->midi_output) 431 vt1724_midi_write(ice); 432 else 433 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 434 /* Due to mysterical reasons, MPU_TX is always 435 * generated (and can't be cleared) when a PCM 436 * playback is going. So let's ignore at the 437 * next loop. 438 */ 439 status_mask &= ~VT1724_IRQ_MPU_TX; 440 } 441 if (status & VT1724_IRQ_MPU_RX) { 442 if (ice->midi_input) 443 vt1724_midi_read(ice); 444 else 445 vt1724_midi_clear_rx(ice); 446 } 447 /* ack MPU irq */ 448 outb(status, ICEREG1724(ice, IRQSTAT)); 449 spin_unlock(&ice->reg_lock); 450 if (status & VT1724_IRQ_MTPCM) { 451 /* 452 * Multi-track PCM 453 * PCM assignment are: 454 * Playback DMA0 (M/C) = playback_pro_substream 455 * Playback DMA1 = playback_con_substream_ds[0] 456 * Playback DMA2 = playback_con_substream_ds[1] 457 * Playback DMA3 = playback_con_substream_ds[2] 458 * Playback DMA4 (SPDIF) = playback_con_substream 459 * Record DMA0 = capture_pro_substream 460 * Record DMA1 = capture_con_substream 461 */ 462 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 463 if (mtstat & VT1724_MULTI_PDMA0) { 464 if (ice->playback_pro_substream) 465 snd_pcm_period_elapsed(ice->playback_pro_substream); 466 } 467 if (mtstat & VT1724_MULTI_RDMA0) { 468 if (ice->capture_pro_substream) 469 snd_pcm_period_elapsed(ice->capture_pro_substream); 470 } 471 if (mtstat & VT1724_MULTI_PDMA1) { 472 if (ice->playback_con_substream_ds[0]) 473 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 474 } 475 if (mtstat & VT1724_MULTI_PDMA2) { 476 if (ice->playback_con_substream_ds[1]) 477 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 478 } 479 if (mtstat & VT1724_MULTI_PDMA3) { 480 if (ice->playback_con_substream_ds[2]) 481 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 482 } 483 if (mtstat & VT1724_MULTI_PDMA4) { 484 if (ice->playback_con_substream) 485 snd_pcm_period_elapsed(ice->playback_con_substream); 486 } 487 if (mtstat & VT1724_MULTI_RDMA1) { 488 if (ice->capture_con_substream) 489 snd_pcm_period_elapsed(ice->capture_con_substream); 490 } 491 /* ack anyway to avoid freeze */ 492 outb(mtstat, ICEMT1724(ice, IRQ)); 493 /* ought to really handle this properly */ 494 if (mtstat & VT1724_MULTI_FIFO_ERR) { 495 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 496 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 497 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 498 /* If I don't do this, I get machine lockup due to continual interrupts */ 499 } 500 501 } 502 } 503 return IRQ_RETVAL(handled); 504 } 505 506 /* 507 * PCM code - professional part (multitrack) 508 */ 509 510 static const unsigned int rates[] = { 511 8000, 9600, 11025, 12000, 16000, 22050, 24000, 512 32000, 44100, 48000, 64000, 88200, 96000, 513 176400, 192000, 514 }; 515 516 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 517 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 518 .list = rates, 519 .mask = 0, 520 }; 521 522 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 523 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 524 .list = rates, 525 .mask = 0, 526 }; 527 528 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 529 .count = ARRAY_SIZE(rates), 530 .list = rates, 531 .mask = 0, 532 }; 533 534 struct vt1724_pcm_reg { 535 unsigned int addr; /* ADDR register offset */ 536 unsigned int size; /* SIZE register offset */ 537 unsigned int count; /* COUNT register offset */ 538 unsigned int start; /* start & pause bit */ 539 }; 540 541 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 542 { 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 544 unsigned char what; 545 unsigned char old; 546 struct snd_pcm_substream *s; 547 548 what = 0; 549 snd_pcm_group_for_each_entry(s, substream) { 550 if (snd_pcm_substream_chip(s) == ice) { 551 const struct vt1724_pcm_reg *reg; 552 reg = s->runtime->private_data; 553 what |= reg->start; 554 snd_pcm_trigger_done(s, substream); 555 } 556 } 557 558 switch (cmd) { 559 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 560 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 561 spin_lock(&ice->reg_lock); 562 old = inb(ICEMT1724(ice, DMA_PAUSE)); 563 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 564 old |= what; 565 else 566 old &= ~what; 567 outb(old, ICEMT1724(ice, DMA_PAUSE)); 568 spin_unlock(&ice->reg_lock); 569 break; 570 571 case SNDRV_PCM_TRIGGER_START: 572 case SNDRV_PCM_TRIGGER_STOP: 573 case SNDRV_PCM_TRIGGER_SUSPEND: 574 spin_lock(&ice->reg_lock); 575 old = inb(ICEMT1724(ice, DMA_CONTROL)); 576 if (cmd == SNDRV_PCM_TRIGGER_START) 577 old |= what; 578 else 579 old &= ~what; 580 outb(old, ICEMT1724(ice, DMA_CONTROL)); 581 spin_unlock(&ice->reg_lock); 582 break; 583 584 case SNDRV_PCM_TRIGGER_RESUME: 585 /* apps will have to restart stream */ 586 break; 587 588 default: 589 return -EINVAL; 590 } 591 return 0; 592 } 593 594 /* 595 */ 596 597 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 598 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 599 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 600 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 601 602 static const unsigned int stdclock_rate_list[16] = { 603 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 604 22050, 11025, 88200, 176400, 0, 192000, 64000 605 }; 606 607 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 608 { 609 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 610 } 611 612 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 613 { 614 int i; 615 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 616 if (stdclock_rate_list[i] == rate) { 617 outb(i, ICEMT1724(ice, RATE)); 618 return; 619 } 620 } 621 } 622 623 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 624 unsigned int rate) 625 { 626 unsigned char val, old; 627 /* check MT02 */ 628 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 629 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 630 if (rate > 96000) 631 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 632 else 633 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 634 if (val != old) { 635 outb(val, ICEMT1724(ice, I2S_FORMAT)); 636 /* master clock changed */ 637 return 1; 638 } 639 } 640 /* no change in master clock */ 641 return 0; 642 } 643 644 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 645 int force) 646 { 647 unsigned long flags; 648 unsigned char mclk_change; 649 unsigned int i, old_rate; 650 651 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 652 return -EINVAL; 653 654 spin_lock_irqsave(&ice->reg_lock, flags); 655 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 656 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 657 /* running? we cannot change the rate now... */ 658 spin_unlock_irqrestore(&ice->reg_lock, flags); 659 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 660 } 661 if (!force && is_pro_rate_locked(ice)) { 662 /* comparing required and current rate - makes sense for 663 * internal clock only */ 664 spin_unlock_irqrestore(&ice->reg_lock, flags); 665 return (rate == ice->cur_rate) ? 0 : -EBUSY; 666 } 667 668 if (force || !ice->is_spdif_master(ice)) { 669 /* force means the rate was switched by ucontrol, otherwise 670 * setting clock rate for internal clock mode */ 671 old_rate = ice->get_rate(ice); 672 if (force || (old_rate != rate)) 673 ice->set_rate(ice, rate); 674 else if (rate == ice->cur_rate) { 675 spin_unlock_irqrestore(&ice->reg_lock, flags); 676 return 0; 677 } 678 } 679 680 ice->cur_rate = rate; 681 682 /* setting master clock */ 683 mclk_change = ice->set_mclk(ice, rate); 684 685 spin_unlock_irqrestore(&ice->reg_lock, flags); 686 687 if (mclk_change && ice->gpio.i2s_mclk_changed) 688 ice->gpio.i2s_mclk_changed(ice); 689 if (ice->gpio.set_pro_rate) 690 ice->gpio.set_pro_rate(ice, rate); 691 692 /* set up codecs */ 693 for (i = 0; i < ice->akm_codecs; i++) { 694 if (ice->akm[i].ops.set_rate_val) 695 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 696 } 697 if (ice->spdif.ops.setup_rate) 698 ice->spdif.ops.setup_rate(ice, rate); 699 700 return 0; 701 } 702 703 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 704 struct snd_pcm_hw_params *hw_params) 705 { 706 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 707 int i, chs, err; 708 709 chs = params_channels(hw_params); 710 mutex_lock(&ice->open_mutex); 711 /* mark surround channels */ 712 if (substream == ice->playback_pro_substream) { 713 /* PDMA0 can be multi-channel up to 8 */ 714 chs = chs / 2 - 1; 715 for (i = 0; i < chs; i++) { 716 if (ice->pcm_reserved[i] && 717 ice->pcm_reserved[i] != substream) { 718 mutex_unlock(&ice->open_mutex); 719 return -EBUSY; 720 } 721 ice->pcm_reserved[i] = substream; 722 } 723 for (; i < 3; i++) { 724 if (ice->pcm_reserved[i] == substream) 725 ice->pcm_reserved[i] = NULL; 726 } 727 } else { 728 for (i = 0; i < 3; i++) { 729 /* check individual playback stream */ 730 if (ice->playback_con_substream_ds[i] == substream) { 731 if (ice->pcm_reserved[i] && 732 ice->pcm_reserved[i] != substream) { 733 mutex_unlock(&ice->open_mutex); 734 return -EBUSY; 735 } 736 ice->pcm_reserved[i] = substream; 737 break; 738 } 739 } 740 } 741 mutex_unlock(&ice->open_mutex); 742 743 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 744 if (err < 0) 745 return err; 746 747 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 748 } 749 750 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 751 { 752 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 753 int i; 754 755 mutex_lock(&ice->open_mutex); 756 /* unmark surround channels */ 757 for (i = 0; i < 3; i++) 758 if (ice->pcm_reserved[i] == substream) 759 ice->pcm_reserved[i] = NULL; 760 mutex_unlock(&ice->open_mutex); 761 return snd_pcm_lib_free_pages(substream); 762 } 763 764 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 765 { 766 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 767 unsigned char val; 768 unsigned int size; 769 770 spin_lock_irq(&ice->reg_lock); 771 val = (8 - substream->runtime->channels) >> 1; 772 outb(val, ICEMT1724(ice, BURST)); 773 774 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 775 776 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 777 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 778 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 779 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 780 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 781 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 782 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 783 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 784 785 spin_unlock_irq(&ice->reg_lock); 786 787 /* 788 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, " 789 "buffer = 0x%x, period = 0x%x\n", 790 substream->runtime->channels, 791 (unsigned int)substream->runtime->dma_addr, 792 snd_pcm_lib_buffer_bytes(substream), 793 snd_pcm_lib_period_bytes(substream)); 794 */ 795 return 0; 796 } 797 798 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 799 { 800 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 801 size_t ptr; 802 803 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 804 return 0; 805 #if 0 /* read PLAYBACK_ADDR */ 806 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 807 if (ptr < substream->runtime->dma_addr) { 808 dev_dbg(ice->card->dev, "invalid negative ptr\n"); 809 return 0; 810 } 811 ptr -= substream->runtime->dma_addr; 812 ptr = bytes_to_frames(substream->runtime, ptr); 813 if (ptr >= substream->runtime->buffer_size) { 814 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 815 (int)ptr, (int)substream->runtime->period_size); 816 return 0; 817 } 818 #else /* read PLAYBACK_SIZE */ 819 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 820 ptr = (ptr + 1) << 2; 821 ptr = bytes_to_frames(substream->runtime, ptr); 822 if (!ptr) 823 ; 824 else if (ptr <= substream->runtime->buffer_size) 825 ptr = substream->runtime->buffer_size - ptr; 826 else { 827 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 828 (int)ptr, (int)substream->runtime->buffer_size); 829 ptr = 0; 830 } 831 #endif 832 return ptr; 833 } 834 835 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 836 { 837 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 838 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 839 840 spin_lock_irq(&ice->reg_lock); 841 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 842 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 843 ice->profi_port + reg->size); 844 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 845 ice->profi_port + reg->count); 846 spin_unlock_irq(&ice->reg_lock); 847 return 0; 848 } 849 850 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 851 { 852 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 853 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 854 size_t ptr; 855 856 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 857 return 0; 858 #if 0 /* use ADDR register */ 859 ptr = inl(ice->profi_port + reg->addr); 860 ptr -= substream->runtime->dma_addr; 861 return bytes_to_frames(substream->runtime, ptr); 862 #else /* use SIZE register */ 863 ptr = inw(ice->profi_port + reg->size); 864 ptr = (ptr + 1) << 2; 865 ptr = bytes_to_frames(substream->runtime, ptr); 866 if (!ptr) 867 ; 868 else if (ptr <= substream->runtime->buffer_size) 869 ptr = substream->runtime->buffer_size - ptr; 870 else { 871 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 872 (int)ptr, (int)substream->runtime->buffer_size); 873 ptr = 0; 874 } 875 return ptr; 876 #endif 877 } 878 879 static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 880 .addr = VT1724_MT_PLAYBACK_ADDR, 881 .size = VT1724_MT_PLAYBACK_SIZE, 882 .count = VT1724_MT_PLAYBACK_COUNT, 883 .start = VT1724_PDMA0_START, 884 }; 885 886 static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 887 .addr = VT1724_MT_PDMA4_ADDR, 888 .size = VT1724_MT_PDMA4_SIZE, 889 .count = VT1724_MT_PDMA4_COUNT, 890 .start = VT1724_PDMA4_START, 891 }; 892 893 static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 894 .addr = VT1724_MT_CAPTURE_ADDR, 895 .size = VT1724_MT_CAPTURE_SIZE, 896 .count = VT1724_MT_CAPTURE_COUNT, 897 .start = VT1724_RDMA0_START, 898 }; 899 900 static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 901 .addr = VT1724_MT_RDMA1_ADDR, 902 .size = VT1724_MT_RDMA1_SIZE, 903 .count = VT1724_MT_RDMA1_COUNT, 904 .start = VT1724_RDMA1_START, 905 }; 906 907 #define vt1724_playback_pro_reg vt1724_pdma0_reg 908 #define vt1724_playback_spdif_reg vt1724_pdma4_reg 909 #define vt1724_capture_pro_reg vt1724_rdma0_reg 910 #define vt1724_capture_spdif_reg vt1724_rdma1_reg 911 912 static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 913 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 914 SNDRV_PCM_INFO_BLOCK_TRANSFER | 915 SNDRV_PCM_INFO_MMAP_VALID | 916 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 917 .formats = SNDRV_PCM_FMTBIT_S32_LE, 918 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 919 .rate_min = 8000, 920 .rate_max = 192000, 921 .channels_min = 2, 922 .channels_max = 8, 923 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 924 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 925 .period_bytes_max = (1UL << 21), 926 .periods_min = 2, 927 .periods_max = 1024, 928 }; 929 930 static const struct snd_pcm_hardware snd_vt1724_spdif = { 931 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 932 SNDRV_PCM_INFO_BLOCK_TRANSFER | 933 SNDRV_PCM_INFO_MMAP_VALID | 934 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 935 .formats = SNDRV_PCM_FMTBIT_S32_LE, 936 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 937 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 938 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 939 SNDRV_PCM_RATE_192000), 940 .rate_min = 32000, 941 .rate_max = 192000, 942 .channels_min = 2, 943 .channels_max = 2, 944 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 945 .period_bytes_min = 2 * 4 * 2, 946 .period_bytes_max = (1UL << 18), 947 .periods_min = 2, 948 .periods_max = 1024, 949 }; 950 951 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 952 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 953 SNDRV_PCM_INFO_BLOCK_TRANSFER | 954 SNDRV_PCM_INFO_MMAP_VALID | 955 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 956 .formats = SNDRV_PCM_FMTBIT_S32_LE, 957 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 958 .rate_min = 8000, 959 .rate_max = 192000, 960 .channels_min = 2, 961 .channels_max = 2, 962 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 963 .period_bytes_min = 2 * 4 * 2, 964 .period_bytes_max = (1UL << 18), 965 .periods_min = 2, 966 .periods_max = 1024, 967 }; 968 969 /* 970 * set rate constraints 971 */ 972 static void set_std_hw_rates(struct snd_ice1712 *ice) 973 { 974 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 975 /* I2S */ 976 /* VT1720 doesn't support more than 96kHz */ 977 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 978 ice->hw_rates = &hw_constraints_rates_192; 979 else 980 ice->hw_rates = &hw_constraints_rates_96; 981 } else { 982 /* ACLINK */ 983 ice->hw_rates = &hw_constraints_rates_48; 984 } 985 } 986 987 static int set_rate_constraints(struct snd_ice1712 *ice, 988 struct snd_pcm_substream *substream) 989 { 990 struct snd_pcm_runtime *runtime = substream->runtime; 991 992 runtime->hw.rate_min = ice->hw_rates->list[0]; 993 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 994 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 995 return snd_pcm_hw_constraint_list(runtime, 0, 996 SNDRV_PCM_HW_PARAM_RATE, 997 ice->hw_rates); 998 } 999 1000 /* if the card has the internal rate locked (is_pro_locked), limit runtime 1001 hw rates to the current internal rate only. 1002 */ 1003 static void constrain_rate_if_locked(struct snd_pcm_substream *substream) 1004 { 1005 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1006 struct snd_pcm_runtime *runtime = substream->runtime; 1007 unsigned int rate; 1008 if (is_pro_rate_locked(ice)) { 1009 rate = ice->get_rate(ice); 1010 if (rate >= runtime->hw.rate_min 1011 && rate <= runtime->hw.rate_max) { 1012 runtime->hw.rate_min = rate; 1013 runtime->hw.rate_max = rate; 1014 } 1015 } 1016 } 1017 1018 1019 /* multi-channel playback needs alignment 8x32bit regardless of the channels 1020 * actually used 1021 */ 1022 #define VT1724_BUFFER_ALIGN 0x20 1023 1024 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1025 { 1026 struct snd_pcm_runtime *runtime = substream->runtime; 1027 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1028 int chs, num_indeps; 1029 1030 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1031 ice->playback_pro_substream = substream; 1032 runtime->hw = snd_vt1724_playback_pro; 1033 snd_pcm_set_sync(substream); 1034 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1035 set_rate_constraints(ice, substream); 1036 mutex_lock(&ice->open_mutex); 1037 /* calculate the currently available channels */ 1038 num_indeps = ice->num_total_dacs / 2 - 1; 1039 for (chs = 0; chs < num_indeps; chs++) { 1040 if (ice->pcm_reserved[chs]) 1041 break; 1042 } 1043 chs = (chs + 1) * 2; 1044 runtime->hw.channels_max = chs; 1045 if (chs > 2) /* channels must be even */ 1046 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1047 mutex_unlock(&ice->open_mutex); 1048 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1049 VT1724_BUFFER_ALIGN); 1050 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1051 VT1724_BUFFER_ALIGN); 1052 constrain_rate_if_locked(substream); 1053 if (ice->pro_open) 1054 ice->pro_open(ice, substream); 1055 return 0; 1056 } 1057 1058 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1059 { 1060 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1061 struct snd_pcm_runtime *runtime = substream->runtime; 1062 1063 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1064 ice->capture_pro_substream = substream; 1065 runtime->hw = snd_vt1724_2ch_stereo; 1066 snd_pcm_set_sync(substream); 1067 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1068 set_rate_constraints(ice, substream); 1069 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1070 VT1724_BUFFER_ALIGN); 1071 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1072 VT1724_BUFFER_ALIGN); 1073 constrain_rate_if_locked(substream); 1074 if (ice->pro_open) 1075 ice->pro_open(ice, substream); 1076 return 0; 1077 } 1078 1079 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1080 { 1081 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1082 1083 if (PRO_RATE_RESET) 1084 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1085 ice->playback_pro_substream = NULL; 1086 1087 return 0; 1088 } 1089 1090 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1091 { 1092 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1093 1094 if (PRO_RATE_RESET) 1095 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1096 ice->capture_pro_substream = NULL; 1097 return 0; 1098 } 1099 1100 static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1101 .open = snd_vt1724_playback_pro_open, 1102 .close = snd_vt1724_playback_pro_close, 1103 .ioctl = snd_pcm_lib_ioctl, 1104 .hw_params = snd_vt1724_pcm_hw_params, 1105 .hw_free = snd_vt1724_pcm_hw_free, 1106 .prepare = snd_vt1724_playback_pro_prepare, 1107 .trigger = snd_vt1724_pcm_trigger, 1108 .pointer = snd_vt1724_playback_pro_pointer, 1109 }; 1110 1111 static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1112 .open = snd_vt1724_capture_pro_open, 1113 .close = snd_vt1724_capture_pro_close, 1114 .ioctl = snd_pcm_lib_ioctl, 1115 .hw_params = snd_vt1724_pcm_hw_params, 1116 .hw_free = snd_vt1724_pcm_hw_free, 1117 .prepare = snd_vt1724_pcm_prepare, 1118 .trigger = snd_vt1724_pcm_trigger, 1119 .pointer = snd_vt1724_pcm_pointer, 1120 }; 1121 1122 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1123 { 1124 struct snd_pcm *pcm; 1125 int capt, err; 1126 1127 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1128 VT1724_CFG_ADC_NONE) 1129 capt = 0; 1130 else 1131 capt = 1; 1132 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1133 if (err < 0) 1134 return err; 1135 1136 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1137 if (capt) 1138 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1139 &snd_vt1724_capture_pro_ops); 1140 1141 pcm->private_data = ice; 1142 pcm->info_flags = 0; 1143 strcpy(pcm->name, "ICE1724"); 1144 1145 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1146 snd_dma_pci_data(ice->pci), 1147 256*1024, 256*1024); 1148 1149 ice->pcm_pro = pcm; 1150 1151 return 0; 1152 } 1153 1154 1155 /* 1156 * SPDIF PCM 1157 */ 1158 1159 /* update spdif control bits; call with reg_lock */ 1160 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1161 { 1162 unsigned char cbit, disabled; 1163 1164 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1165 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1166 if (cbit != disabled) 1167 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1168 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1169 if (cbit != disabled) 1170 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1171 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1172 } 1173 1174 /* update SPDIF control bits according to the given rate */ 1175 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1176 { 1177 unsigned int val, nval; 1178 unsigned long flags; 1179 1180 spin_lock_irqsave(&ice->reg_lock, flags); 1181 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1182 nval &= ~(7 << 12); 1183 switch (rate) { 1184 case 44100: break; 1185 case 48000: nval |= 2 << 12; break; 1186 case 32000: nval |= 3 << 12; break; 1187 case 88200: nval |= 4 << 12; break; 1188 case 96000: nval |= 5 << 12; break; 1189 case 192000: nval |= 6 << 12; break; 1190 case 176400: nval |= 7 << 12; break; 1191 } 1192 if (val != nval) 1193 update_spdif_bits(ice, nval); 1194 spin_unlock_irqrestore(&ice->reg_lock, flags); 1195 } 1196 1197 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1198 { 1199 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1200 if (!ice->force_pdma4) 1201 update_spdif_rate(ice, substream->runtime->rate); 1202 return snd_vt1724_pcm_prepare(substream); 1203 } 1204 1205 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1206 { 1207 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1208 struct snd_pcm_runtime *runtime = substream->runtime; 1209 1210 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1211 ice->playback_con_substream = substream; 1212 if (ice->force_pdma4) { 1213 runtime->hw = snd_vt1724_2ch_stereo; 1214 set_rate_constraints(ice, substream); 1215 } else 1216 runtime->hw = snd_vt1724_spdif; 1217 snd_pcm_set_sync(substream); 1218 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1219 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1220 VT1724_BUFFER_ALIGN); 1221 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1222 VT1724_BUFFER_ALIGN); 1223 constrain_rate_if_locked(substream); 1224 if (ice->spdif.ops.open) 1225 ice->spdif.ops.open(ice, substream); 1226 return 0; 1227 } 1228 1229 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1230 { 1231 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1232 1233 if (PRO_RATE_RESET) 1234 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1235 ice->playback_con_substream = NULL; 1236 if (ice->spdif.ops.close) 1237 ice->spdif.ops.close(ice, substream); 1238 1239 return 0; 1240 } 1241 1242 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1243 { 1244 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1245 struct snd_pcm_runtime *runtime = substream->runtime; 1246 1247 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1248 ice->capture_con_substream = substream; 1249 if (ice->force_rdma1) { 1250 runtime->hw = snd_vt1724_2ch_stereo; 1251 set_rate_constraints(ice, substream); 1252 } else 1253 runtime->hw = snd_vt1724_spdif; 1254 snd_pcm_set_sync(substream); 1255 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1256 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1257 VT1724_BUFFER_ALIGN); 1258 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1259 VT1724_BUFFER_ALIGN); 1260 constrain_rate_if_locked(substream); 1261 if (ice->spdif.ops.open) 1262 ice->spdif.ops.open(ice, substream); 1263 return 0; 1264 } 1265 1266 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1267 { 1268 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1269 1270 if (PRO_RATE_RESET) 1271 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1272 ice->capture_con_substream = NULL; 1273 if (ice->spdif.ops.close) 1274 ice->spdif.ops.close(ice, substream); 1275 1276 return 0; 1277 } 1278 1279 static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1280 .open = snd_vt1724_playback_spdif_open, 1281 .close = snd_vt1724_playback_spdif_close, 1282 .ioctl = snd_pcm_lib_ioctl, 1283 .hw_params = snd_vt1724_pcm_hw_params, 1284 .hw_free = snd_vt1724_pcm_hw_free, 1285 .prepare = snd_vt1724_playback_spdif_prepare, 1286 .trigger = snd_vt1724_pcm_trigger, 1287 .pointer = snd_vt1724_pcm_pointer, 1288 }; 1289 1290 static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1291 .open = snd_vt1724_capture_spdif_open, 1292 .close = snd_vt1724_capture_spdif_close, 1293 .ioctl = snd_pcm_lib_ioctl, 1294 .hw_params = snd_vt1724_pcm_hw_params, 1295 .hw_free = snd_vt1724_pcm_hw_free, 1296 .prepare = snd_vt1724_pcm_prepare, 1297 .trigger = snd_vt1724_pcm_trigger, 1298 .pointer = snd_vt1724_pcm_pointer, 1299 }; 1300 1301 1302 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1303 { 1304 char *name; 1305 struct snd_pcm *pcm; 1306 int play, capt; 1307 int err; 1308 1309 if (ice->force_pdma4 || 1310 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1311 play = 1; 1312 ice->has_spdif = 1; 1313 } else 1314 play = 0; 1315 if (ice->force_rdma1 || 1316 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1317 capt = 1; 1318 ice->has_spdif = 1; 1319 } else 1320 capt = 0; 1321 if (!play && !capt) 1322 return 0; /* no spdif device */ 1323 1324 if (ice->force_pdma4 || ice->force_rdma1) 1325 name = "ICE1724 Secondary"; 1326 else 1327 name = "ICE1724 IEC958"; 1328 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1329 if (err < 0) 1330 return err; 1331 1332 if (play) 1333 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1334 &snd_vt1724_playback_spdif_ops); 1335 if (capt) 1336 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1337 &snd_vt1724_capture_spdif_ops); 1338 1339 pcm->private_data = ice; 1340 pcm->info_flags = 0; 1341 strcpy(pcm->name, name); 1342 1343 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1344 snd_dma_pci_data(ice->pci), 1345 256*1024, 256*1024); 1346 1347 ice->pcm = pcm; 1348 1349 return 0; 1350 } 1351 1352 1353 /* 1354 * independent surround PCMs 1355 */ 1356 1357 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1358 { 1359 .addr = VT1724_MT_PDMA1_ADDR, 1360 .size = VT1724_MT_PDMA1_SIZE, 1361 .count = VT1724_MT_PDMA1_COUNT, 1362 .start = VT1724_PDMA1_START, 1363 }, 1364 { 1365 .addr = VT1724_MT_PDMA2_ADDR, 1366 .size = VT1724_MT_PDMA2_SIZE, 1367 .count = VT1724_MT_PDMA2_COUNT, 1368 .start = VT1724_PDMA2_START, 1369 }, 1370 { 1371 .addr = VT1724_MT_PDMA3_ADDR, 1372 .size = VT1724_MT_PDMA3_SIZE, 1373 .count = VT1724_MT_PDMA3_COUNT, 1374 .start = VT1724_PDMA3_START, 1375 }, 1376 }; 1377 1378 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1379 { 1380 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1381 unsigned char val; 1382 1383 spin_lock_irq(&ice->reg_lock); 1384 val = 3 - substream->number; 1385 if (inb(ICEMT1724(ice, BURST)) < val) 1386 outb(val, ICEMT1724(ice, BURST)); 1387 spin_unlock_irq(&ice->reg_lock); 1388 return snd_vt1724_pcm_prepare(substream); 1389 } 1390 1391 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1392 { 1393 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1394 struct snd_pcm_runtime *runtime = substream->runtime; 1395 1396 mutex_lock(&ice->open_mutex); 1397 /* already used by PDMA0? */ 1398 if (ice->pcm_reserved[substream->number]) { 1399 mutex_unlock(&ice->open_mutex); 1400 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1401 } 1402 mutex_unlock(&ice->open_mutex); 1403 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1404 ice->playback_con_substream_ds[substream->number] = substream; 1405 runtime->hw = snd_vt1724_2ch_stereo; 1406 snd_pcm_set_sync(substream); 1407 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1408 set_rate_constraints(ice, substream); 1409 return 0; 1410 } 1411 1412 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1413 { 1414 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1415 1416 if (PRO_RATE_RESET) 1417 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1418 ice->playback_con_substream_ds[substream->number] = NULL; 1419 ice->pcm_reserved[substream->number] = NULL; 1420 1421 return 0; 1422 } 1423 1424 static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1425 .open = snd_vt1724_playback_indep_open, 1426 .close = snd_vt1724_playback_indep_close, 1427 .ioctl = snd_pcm_lib_ioctl, 1428 .hw_params = snd_vt1724_pcm_hw_params, 1429 .hw_free = snd_vt1724_pcm_hw_free, 1430 .prepare = snd_vt1724_playback_indep_prepare, 1431 .trigger = snd_vt1724_pcm_trigger, 1432 .pointer = snd_vt1724_pcm_pointer, 1433 }; 1434 1435 1436 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1437 { 1438 struct snd_pcm *pcm; 1439 int play; 1440 int err; 1441 1442 play = ice->num_total_dacs / 2 - 1; 1443 if (play <= 0) 1444 return 0; 1445 1446 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1447 if (err < 0) 1448 return err; 1449 1450 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1451 &snd_vt1724_playback_indep_ops); 1452 1453 pcm->private_data = ice; 1454 pcm->info_flags = 0; 1455 strcpy(pcm->name, "ICE1724 Surround PCM"); 1456 1457 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1458 snd_dma_pci_data(ice->pci), 1459 256*1024, 256*1024); 1460 1461 ice->pcm_ds = pcm; 1462 1463 return 0; 1464 } 1465 1466 1467 /* 1468 * Mixer section 1469 */ 1470 1471 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1472 { 1473 int err; 1474 1475 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1476 struct snd_ac97_bus *pbus; 1477 struct snd_ac97_template ac97; 1478 static struct snd_ac97_bus_ops ops = { 1479 .write = snd_vt1724_ac97_write, 1480 .read = snd_vt1724_ac97_read, 1481 }; 1482 1483 /* cold reset */ 1484 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1485 mdelay(5); /* FIXME */ 1486 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1487 1488 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1489 if (err < 0) 1490 return err; 1491 memset(&ac97, 0, sizeof(ac97)); 1492 ac97.private_data = ice; 1493 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1494 if (err < 0) 1495 dev_warn(ice->card->dev, 1496 "cannot initialize pro ac97, skipped\n"); 1497 else 1498 return 0; 1499 } 1500 /* I2S mixer only */ 1501 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1502 return 0; 1503 } 1504 1505 /* 1506 * 1507 */ 1508 1509 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1510 { 1511 return (unsigned int)ice->eeprom.data[idx] | \ 1512 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1513 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1514 } 1515 1516 static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1517 struct snd_info_buffer *buffer) 1518 { 1519 struct snd_ice1712 *ice = entry->private_data; 1520 unsigned int idx; 1521 1522 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1523 snd_iprintf(buffer, "EEPROM:\n"); 1524 1525 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1526 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1527 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1528 snd_iprintf(buffer, " System Config : 0x%x\n", 1529 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1530 snd_iprintf(buffer, " ACLink : 0x%x\n", 1531 ice->eeprom.data[ICE_EEP2_ACLINK]); 1532 snd_iprintf(buffer, " I2S : 0x%x\n", 1533 ice->eeprom.data[ICE_EEP2_I2S]); 1534 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1535 ice->eeprom.data[ICE_EEP2_SPDIF]); 1536 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1537 ice->eeprom.gpiodir); 1538 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1539 ice->eeprom.gpiomask); 1540 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1541 ice->eeprom.gpiostate); 1542 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1543 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1544 idx, ice->eeprom.data[idx]); 1545 1546 snd_iprintf(buffer, "\nRegisters:\n"); 1547 1548 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1549 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1550 for (idx = 0x0; idx < 0x20 ; idx++) 1551 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1552 idx, inb(ice->port+idx)); 1553 for (idx = 0x0; idx < 0x30 ; idx++) 1554 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1555 idx, inb(ice->profi_port+idx)); 1556 } 1557 1558 static void snd_vt1724_proc_init(struct snd_ice1712 *ice) 1559 { 1560 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read); 1561 } 1562 1563 /* 1564 * 1565 */ 1566 1567 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1568 struct snd_ctl_elem_info *uinfo) 1569 { 1570 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1571 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1572 return 0; 1573 } 1574 1575 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1576 struct snd_ctl_elem_value *ucontrol) 1577 { 1578 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1579 1580 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1581 return 0; 1582 } 1583 1584 static const struct snd_kcontrol_new snd_vt1724_eeprom = { 1585 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1586 .name = "ICE1724 EEPROM", 1587 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1588 .info = snd_vt1724_eeprom_info, 1589 .get = snd_vt1724_eeprom_get 1590 }; 1591 1592 /* 1593 */ 1594 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1595 struct snd_ctl_elem_info *uinfo) 1596 { 1597 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1598 uinfo->count = 1; 1599 return 0; 1600 } 1601 1602 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1603 { 1604 unsigned int val, rbits; 1605 1606 val = diga->status[0] & 0x03; /* professional, non-audio */ 1607 if (val & 0x01) { 1608 /* professional */ 1609 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1610 IEC958_AES0_PRO_EMPHASIS_5015) 1611 val |= 1U << 3; 1612 rbits = (diga->status[4] >> 3) & 0x0f; 1613 if (rbits) { 1614 switch (rbits) { 1615 case 2: val |= 5 << 12; break; /* 96k */ 1616 case 3: val |= 6 << 12; break; /* 192k */ 1617 case 10: val |= 4 << 12; break; /* 88.2k */ 1618 case 11: val |= 7 << 12; break; /* 176.4k */ 1619 } 1620 } else { 1621 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1622 case IEC958_AES0_PRO_FS_44100: 1623 break; 1624 case IEC958_AES0_PRO_FS_32000: 1625 val |= 3U << 12; 1626 break; 1627 default: 1628 val |= 2U << 12; 1629 break; 1630 } 1631 } 1632 } else { 1633 /* consumer */ 1634 val |= diga->status[1] & 0x04; /* copyright */ 1635 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1636 IEC958_AES0_CON_EMPHASIS_5015) 1637 val |= 1U << 3; 1638 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1639 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1640 } 1641 return val; 1642 } 1643 1644 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1645 { 1646 memset(diga->status, 0, sizeof(diga->status)); 1647 diga->status[0] = val & 0x03; /* professional, non-audio */ 1648 if (val & 0x01) { 1649 /* professional */ 1650 if (val & (1U << 3)) 1651 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1652 switch ((val >> 12) & 0x7) { 1653 case 0: 1654 break; 1655 case 2: 1656 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1657 break; 1658 default: 1659 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1660 break; 1661 } 1662 } else { 1663 /* consumer */ 1664 diga->status[0] |= val & (1U << 2); /* copyright */ 1665 if (val & (1U << 3)) 1666 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1667 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1668 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1669 } 1670 } 1671 1672 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1673 struct snd_ctl_elem_value *ucontrol) 1674 { 1675 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1676 unsigned int val; 1677 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1678 decode_spdif_bits(&ucontrol->value.iec958, val); 1679 return 0; 1680 } 1681 1682 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1683 struct snd_ctl_elem_value *ucontrol) 1684 { 1685 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1686 unsigned int val, old; 1687 1688 val = encode_spdif_bits(&ucontrol->value.iec958); 1689 spin_lock_irq(&ice->reg_lock); 1690 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1691 if (val != old) 1692 update_spdif_bits(ice, val); 1693 spin_unlock_irq(&ice->reg_lock); 1694 return val != old; 1695 } 1696 1697 static const struct snd_kcontrol_new snd_vt1724_spdif_default = 1698 { 1699 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1700 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1701 .info = snd_vt1724_spdif_info, 1702 .get = snd_vt1724_spdif_default_get, 1703 .put = snd_vt1724_spdif_default_put 1704 }; 1705 1706 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1707 struct snd_ctl_elem_value *ucontrol) 1708 { 1709 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1710 IEC958_AES0_PROFESSIONAL | 1711 IEC958_AES0_CON_NOT_COPYRIGHT | 1712 IEC958_AES0_CON_EMPHASIS; 1713 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1714 IEC958_AES1_CON_CATEGORY; 1715 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1716 return 0; 1717 } 1718 1719 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1720 struct snd_ctl_elem_value *ucontrol) 1721 { 1722 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1723 IEC958_AES0_PROFESSIONAL | 1724 IEC958_AES0_PRO_FS | 1725 IEC958_AES0_PRO_EMPHASIS; 1726 return 0; 1727 } 1728 1729 static const struct snd_kcontrol_new snd_vt1724_spdif_maskc = 1730 { 1731 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1732 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1733 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1734 .info = snd_vt1724_spdif_info, 1735 .get = snd_vt1724_spdif_maskc_get, 1736 }; 1737 1738 static const struct snd_kcontrol_new snd_vt1724_spdif_maskp = 1739 { 1740 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1741 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1742 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1743 .info = snd_vt1724_spdif_info, 1744 .get = snd_vt1724_spdif_maskp_get, 1745 }; 1746 1747 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1748 1749 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1750 struct snd_ctl_elem_value *ucontrol) 1751 { 1752 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1753 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1754 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1755 return 0; 1756 } 1757 1758 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1759 struct snd_ctl_elem_value *ucontrol) 1760 { 1761 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1762 unsigned char old, val; 1763 1764 spin_lock_irq(&ice->reg_lock); 1765 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1766 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1767 if (ucontrol->value.integer.value[0]) 1768 val |= VT1724_CFG_SPDIF_OUT_EN; 1769 if (old != val) 1770 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1771 spin_unlock_irq(&ice->reg_lock); 1772 return old != val; 1773 } 1774 1775 static const struct snd_kcontrol_new snd_vt1724_spdif_switch = 1776 { 1777 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1778 /* FIXME: the following conflict with IEC958 Playback Route */ 1779 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1780 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1781 .info = snd_vt1724_spdif_sw_info, 1782 .get = snd_vt1724_spdif_sw_get, 1783 .put = snd_vt1724_spdif_sw_put 1784 }; 1785 1786 1787 #if 0 /* NOT USED YET */ 1788 /* 1789 * GPIO access from extern 1790 */ 1791 1792 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1793 1794 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1795 struct snd_ctl_elem_value *ucontrol) 1796 { 1797 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1798 int shift = kcontrol->private_value & 0xff; 1799 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1800 1801 snd_ice1712_save_gpio_status(ice); 1802 ucontrol->value.integer.value[0] = 1803 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1804 snd_ice1712_restore_gpio_status(ice); 1805 return 0; 1806 } 1807 1808 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1809 struct snd_ctl_elem_value *ucontrol) 1810 { 1811 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1812 int shift = kcontrol->private_value & 0xff; 1813 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1814 unsigned int val, nval; 1815 1816 if (kcontrol->private_value & (1 << 31)) 1817 return -EPERM; 1818 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1819 snd_ice1712_save_gpio_status(ice); 1820 val = snd_ice1712_gpio_read(ice); 1821 nval |= val & ~(1 << shift); 1822 if (val != nval) 1823 snd_ice1712_gpio_write(ice, nval); 1824 snd_ice1712_restore_gpio_status(ice); 1825 return val != nval; 1826 } 1827 #endif /* NOT USED YET */ 1828 1829 /* 1830 * rate 1831 */ 1832 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1833 struct snd_ctl_elem_info *uinfo) 1834 { 1835 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1836 int hw_rates_count = ice->hw_rates->count; 1837 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1838 uinfo->count = 1; 1839 1840 /* internal clocks */ 1841 uinfo->value.enumerated.items = hw_rates_count; 1842 /* external clocks */ 1843 if (ice->force_rdma1 || 1844 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1845 uinfo->value.enumerated.items += ice->ext_clock_count; 1846 /* upper limit - keep at top */ 1847 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1848 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1849 if (uinfo->value.enumerated.item >= hw_rates_count) 1850 /* ext_clock items */ 1851 strcpy(uinfo->value.enumerated.name, 1852 ice->ext_clock_names[ 1853 uinfo->value.enumerated.item - hw_rates_count]); 1854 else 1855 /* int clock items */ 1856 sprintf(uinfo->value.enumerated.name, "%d", 1857 ice->hw_rates->list[uinfo->value.enumerated.item]); 1858 return 0; 1859 } 1860 1861 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1862 struct snd_ctl_elem_value *ucontrol) 1863 { 1864 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1865 unsigned int i, rate; 1866 1867 spin_lock_irq(&ice->reg_lock); 1868 if (ice->is_spdif_master(ice)) { 1869 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1870 ice->get_spdif_master_type(ice); 1871 } else { 1872 rate = ice->get_rate(ice); 1873 ucontrol->value.enumerated.item[0] = 0; 1874 for (i = 0; i < ice->hw_rates->count; i++) { 1875 if (ice->hw_rates->list[i] == rate) { 1876 ucontrol->value.enumerated.item[0] = i; 1877 break; 1878 } 1879 } 1880 } 1881 spin_unlock_irq(&ice->reg_lock); 1882 return 0; 1883 } 1884 1885 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1886 { 1887 /* standard external clock - only single type - SPDIF IN */ 1888 return 0; 1889 } 1890 1891 /* setting clock to external - SPDIF */ 1892 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1893 { 1894 unsigned char oval; 1895 unsigned char i2s_oval; 1896 oval = inb(ICEMT1724(ice, RATE)); 1897 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1898 /* setting 256fs */ 1899 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1900 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1901 return 0; 1902 } 1903 1904 1905 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1906 struct snd_ctl_elem_value *ucontrol) 1907 { 1908 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1909 unsigned int old_rate, new_rate; 1910 unsigned int item = ucontrol->value.enumerated.item[0]; 1911 unsigned int first_ext_clock = ice->hw_rates->count; 1912 1913 if (item > first_ext_clock + ice->ext_clock_count - 1) 1914 return -EINVAL; 1915 1916 /* if rate = 0 => external clock */ 1917 spin_lock_irq(&ice->reg_lock); 1918 if (ice->is_spdif_master(ice)) 1919 old_rate = 0; 1920 else 1921 old_rate = ice->get_rate(ice); 1922 if (item >= first_ext_clock) { 1923 /* switching to external clock */ 1924 ice->set_spdif_clock(ice, item - first_ext_clock); 1925 new_rate = 0; 1926 } else { 1927 /* internal on-card clock */ 1928 new_rate = ice->hw_rates->list[item]; 1929 ice->pro_rate_default = new_rate; 1930 spin_unlock_irq(&ice->reg_lock); 1931 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1932 spin_lock_irq(&ice->reg_lock); 1933 } 1934 spin_unlock_irq(&ice->reg_lock); 1935 1936 /* the first switch to the ext. clock mode? */ 1937 if (old_rate != new_rate && !new_rate) { 1938 /* notify akm chips as well */ 1939 unsigned int i; 1940 if (ice->gpio.set_pro_rate) 1941 ice->gpio.set_pro_rate(ice, 0); 1942 for (i = 0; i < ice->akm_codecs; i++) { 1943 if (ice->akm[i].ops.set_rate_val) 1944 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1945 } 1946 } 1947 return old_rate != new_rate; 1948 } 1949 1950 static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = { 1951 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1952 .name = "Multi Track Internal Clock", 1953 .info = snd_vt1724_pro_internal_clock_info, 1954 .get = snd_vt1724_pro_internal_clock_get, 1955 .put = snd_vt1724_pro_internal_clock_put 1956 }; 1957 1958 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1959 1960 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1961 struct snd_ctl_elem_value *ucontrol) 1962 { 1963 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1964 return 0; 1965 } 1966 1967 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1968 struct snd_ctl_elem_value *ucontrol) 1969 { 1970 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1971 int change = 0, nval; 1972 1973 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1974 spin_lock_irq(&ice->reg_lock); 1975 change = PRO_RATE_LOCKED != nval; 1976 PRO_RATE_LOCKED = nval; 1977 spin_unlock_irq(&ice->reg_lock); 1978 return change; 1979 } 1980 1981 static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = { 1982 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1983 .name = "Multi Track Rate Locking", 1984 .info = snd_vt1724_pro_rate_locking_info, 1985 .get = snd_vt1724_pro_rate_locking_get, 1986 .put = snd_vt1724_pro_rate_locking_put 1987 }; 1988 1989 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1990 1991 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1992 struct snd_ctl_elem_value *ucontrol) 1993 { 1994 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1995 return 0; 1996 } 1997 1998 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1999 struct snd_ctl_elem_value *ucontrol) 2000 { 2001 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2002 int change = 0, nval; 2003 2004 nval = ucontrol->value.integer.value[0] ? 1 : 0; 2005 spin_lock_irq(&ice->reg_lock); 2006 change = PRO_RATE_RESET != nval; 2007 PRO_RATE_RESET = nval; 2008 spin_unlock_irq(&ice->reg_lock); 2009 return change; 2010 } 2011 2012 static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = { 2013 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2014 .name = "Multi Track Rate Reset", 2015 .info = snd_vt1724_pro_rate_reset_info, 2016 .get = snd_vt1724_pro_rate_reset_get, 2017 .put = snd_vt1724_pro_rate_reset_put 2018 }; 2019 2020 2021 /* 2022 * routing 2023 */ 2024 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 2025 struct snd_ctl_elem_info *uinfo) 2026 { 2027 static const char * const texts[] = { 2028 "PCM Out", /* 0 */ 2029 "H/W In 0", "H/W In 1", /* 1-2 */ 2030 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2031 }; 2032 2033 return snd_ctl_enum_info(uinfo, 1, 5, texts); 2034 } 2035 2036 static inline int analog_route_shift(int idx) 2037 { 2038 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2039 } 2040 2041 static inline int digital_route_shift(int idx) 2042 { 2043 return idx * 3; 2044 } 2045 2046 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2047 { 2048 unsigned long val; 2049 unsigned char eitem; 2050 static const unsigned char xlate[8] = { 2051 0, 255, 1, 2, 255, 255, 3, 4, 2052 }; 2053 2054 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2055 val >>= shift; 2056 val &= 7; /* we now have 3 bits per output */ 2057 eitem = xlate[val]; 2058 if (eitem == 255) { 2059 snd_BUG(); 2060 return 0; 2061 } 2062 return eitem; 2063 } 2064 2065 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2066 int shift) 2067 { 2068 unsigned int old_val, nval; 2069 int change; 2070 static const unsigned char xroute[8] = { 2071 0, /* PCM */ 2072 2, /* PSDIN0 Left */ 2073 3, /* PSDIN0 Right */ 2074 6, /* SPDIN Left */ 2075 7, /* SPDIN Right */ 2076 }; 2077 2078 nval = xroute[val % 5]; 2079 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2080 val &= ~(0x07 << shift); 2081 val |= nval << shift; 2082 change = val != old_val; 2083 if (change) 2084 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2085 return change; 2086 } 2087 2088 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2089 struct snd_ctl_elem_value *ucontrol) 2090 { 2091 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2092 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2093 ucontrol->value.enumerated.item[0] = 2094 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2095 return 0; 2096 } 2097 2098 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2099 struct snd_ctl_elem_value *ucontrol) 2100 { 2101 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2102 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2103 return snd_ice1724_put_route_val(ice, 2104 ucontrol->value.enumerated.item[0], 2105 analog_route_shift(idx)); 2106 } 2107 2108 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2109 struct snd_ctl_elem_value *ucontrol) 2110 { 2111 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2112 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2113 ucontrol->value.enumerated.item[0] = 2114 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2115 return 0; 2116 } 2117 2118 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2119 struct snd_ctl_elem_value *ucontrol) 2120 { 2121 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2122 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2123 return snd_ice1724_put_route_val(ice, 2124 ucontrol->value.enumerated.item[0], 2125 digital_route_shift(idx)); 2126 } 2127 2128 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route = 2129 { 2130 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2131 .name = "H/W Playback Route", 2132 .info = snd_vt1724_pro_route_info, 2133 .get = snd_vt1724_pro_route_analog_get, 2134 .put = snd_vt1724_pro_route_analog_put, 2135 }; 2136 2137 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = { 2138 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2139 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2140 .info = snd_vt1724_pro_route_info, 2141 .get = snd_vt1724_pro_route_spdif_get, 2142 .put = snd_vt1724_pro_route_spdif_put, 2143 .count = 2, 2144 }; 2145 2146 2147 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2148 struct snd_ctl_elem_info *uinfo) 2149 { 2150 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2151 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2152 uinfo->value.integer.min = 0; 2153 uinfo->value.integer.max = 255; 2154 return 0; 2155 } 2156 2157 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2158 struct snd_ctl_elem_value *ucontrol) 2159 { 2160 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2161 int idx; 2162 2163 spin_lock_irq(&ice->reg_lock); 2164 for (idx = 0; idx < 22; idx++) { 2165 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2166 ucontrol->value.integer.value[idx] = 2167 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2168 } 2169 spin_unlock_irq(&ice->reg_lock); 2170 return 0; 2171 } 2172 2173 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = { 2174 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2175 .name = "Multi Track Peak", 2176 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2177 .info = snd_vt1724_pro_peak_info, 2178 .get = snd_vt1724_pro_peak_get 2179 }; 2180 2181 /* 2182 * 2183 */ 2184 2185 static struct snd_ice1712_card_info no_matched; 2186 2187 2188 /* 2189 ooAoo cards with no controls 2190 */ 2191 static unsigned char ooaoo_sq210_eeprom[] = { 2192 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2193 1xDACs */ 2194 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2195 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2196 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2197 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2198 [ICE_EEP2_GPIO_DIR1] = 0x00, 2199 [ICE_EEP2_GPIO_DIR2] = 0x00, 2200 [ICE_EEP2_GPIO_MASK] = 0xff, 2201 [ICE_EEP2_GPIO_MASK1] = 0xff, 2202 [ICE_EEP2_GPIO_MASK2] = 0xff, 2203 2204 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2205 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2206 and GPIO15 always zero */ 2207 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2208 }; 2209 2210 2211 static struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = { 2212 { 2213 .name = "ooAoo SQ210a", 2214 .model = "sq210a", 2215 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2216 .eeprom_data = ooaoo_sq210_eeprom, 2217 }, 2218 { } /* terminator */ 2219 }; 2220 2221 static struct snd_ice1712_card_info *card_tables[] = { 2222 snd_vt1724_revo_cards, 2223 snd_vt1724_amp_cards, 2224 snd_vt1724_aureon_cards, 2225 snd_vt1720_mobo_cards, 2226 snd_vt1720_pontis_cards, 2227 snd_vt1724_prodigy_hifi_cards, 2228 snd_vt1724_prodigy192_cards, 2229 snd_vt1724_juli_cards, 2230 snd_vt1724_maya44_cards, 2231 snd_vt1724_phase_cards, 2232 snd_vt1724_wtm_cards, 2233 snd_vt1724_se_cards, 2234 snd_vt1724_qtet_cards, 2235 snd_vt1724_ooaoo_cards, 2236 snd_vt1724_psc724_cards, 2237 NULL, 2238 }; 2239 2240 2241 /* 2242 */ 2243 2244 static void wait_i2c_busy(struct snd_ice1712 *ice) 2245 { 2246 int t = 0x10000; 2247 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2248 ; 2249 if (t == -1) 2250 dev_err(ice->card->dev, "i2c busy timeout\n"); 2251 } 2252 2253 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2254 unsigned char dev, unsigned char addr) 2255 { 2256 unsigned char val; 2257 2258 mutex_lock(&ice->i2c_mutex); 2259 wait_i2c_busy(ice); 2260 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2261 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2262 wait_i2c_busy(ice); 2263 val = inb(ICEREG1724(ice, I2C_DATA)); 2264 mutex_unlock(&ice->i2c_mutex); 2265 /* 2266 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2267 */ 2268 return val; 2269 } 2270 2271 void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2272 unsigned char dev, unsigned char addr, unsigned char data) 2273 { 2274 mutex_lock(&ice->i2c_mutex); 2275 wait_i2c_busy(ice); 2276 /* 2277 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2278 */ 2279 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2280 outb(data, ICEREG1724(ice, I2C_DATA)); 2281 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2282 wait_i2c_busy(ice); 2283 mutex_unlock(&ice->i2c_mutex); 2284 } 2285 2286 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2287 const char *modelname) 2288 { 2289 const int dev = 0xa0; /* EEPROM device address */ 2290 unsigned int i, size; 2291 struct snd_ice1712_card_info * const *tbl, *c; 2292 2293 if (!modelname || !*modelname) { 2294 ice->eeprom.subvendor = 0; 2295 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2296 ice->eeprom.subvendor = 2297 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2298 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2299 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2300 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2301 if (ice->eeprom.subvendor == 0 || 2302 ice->eeprom.subvendor == (unsigned int)-1) { 2303 /* invalid subvendor from EEPROM, try the PCI 2304 * subststem ID instead 2305 */ 2306 u16 vendor, device; 2307 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2308 &vendor); 2309 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2310 ice->eeprom.subvendor = 2311 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2312 if (ice->eeprom.subvendor == 0 || 2313 ice->eeprom.subvendor == (unsigned int)-1) { 2314 dev_err(ice->card->dev, 2315 "No valid ID is found\n"); 2316 return -ENXIO; 2317 } 2318 } 2319 } 2320 for (tbl = card_tables; *tbl; tbl++) { 2321 for (c = *tbl; c->name; c++) { 2322 if (modelname && c->model && 2323 !strcmp(modelname, c->model)) { 2324 dev_info(ice->card->dev, 2325 "Using board model %s\n", 2326 c->name); 2327 ice->eeprom.subvendor = c->subvendor; 2328 } else if (c->subvendor != ice->eeprom.subvendor) 2329 continue; 2330 ice->card_info = c; 2331 if (!c->eeprom_size || !c->eeprom_data) 2332 goto found; 2333 /* if the EEPROM is given by the driver, use it */ 2334 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2335 ice->eeprom.version = 2; 2336 ice->eeprom.size = c->eeprom_size + 6; 2337 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2338 goto read_skipped; 2339 } 2340 } 2341 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2342 ice->eeprom.subvendor); 2343 #ifdef CONFIG_PM_SLEEP 2344 /* assume AC97-only card which can suspend without additional code */ 2345 ice->pm_suspend_enabled = 1; 2346 #endif 2347 2348 found: 2349 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2350 if (ice->eeprom.size < 6) 2351 ice->eeprom.size = 32; 2352 else if (ice->eeprom.size > 32) { 2353 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n", 2354 ice->eeprom.size); 2355 return -EIO; 2356 } 2357 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2358 if (ice->eeprom.version != 1 && ice->eeprom.version != 2) 2359 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n", 2360 ice->eeprom.version); 2361 size = ice->eeprom.size - 6; 2362 for (i = 0; i < size; i++) 2363 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2364 2365 read_skipped: 2366 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2367 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2368 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2369 2370 return 0; 2371 } 2372 2373 2374 2375 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2376 { 2377 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2378 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2379 msleep(10); 2380 outb(0, ICEREG1724(ice, CONTROL)); 2381 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2382 msleep(10); 2383 } 2384 2385 static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2386 { 2387 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2388 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2389 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2390 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2391 2392 ice->gpio.write_mask = ice->eeprom.gpiomask; 2393 ice->gpio.direction = ice->eeprom.gpiodir; 2394 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2395 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2396 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2397 2398 outb(0, ICEREG1724(ice, POWERDOWN)); 2399 2400 /* MPU_RX and TX irq masks are cleared later dynamically */ 2401 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2402 2403 /* don't handle FIFO overrun/underruns (just yet), 2404 * since they cause machine lockups 2405 */ 2406 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2407 2408 return 0; 2409 } 2410 2411 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2412 { 2413 int err; 2414 struct snd_kcontrol *kctl; 2415 2416 if (snd_BUG_ON(!ice->pcm)) 2417 return -EIO; 2418 2419 if (!ice->own_routing) { 2420 err = snd_ctl_add(ice->card, 2421 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2422 if (err < 0) 2423 return err; 2424 } 2425 2426 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2427 if (err < 0) 2428 return err; 2429 2430 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); 2431 if (err < 0) 2432 return err; 2433 kctl->id.device = ice->pcm->device; 2434 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); 2435 if (err < 0) 2436 return err; 2437 kctl->id.device = ice->pcm->device; 2438 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); 2439 if (err < 0) 2440 return err; 2441 kctl->id.device = ice->pcm->device; 2442 #if 0 /* use default only */ 2443 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); 2444 if (err < 0) 2445 return err; 2446 kctl->id.device = ice->pcm->device; 2447 ice->spdif.stream_ctl = kctl; 2448 #endif 2449 return 0; 2450 } 2451 2452 2453 static int snd_vt1724_build_controls(struct snd_ice1712 *ice) 2454 { 2455 int err; 2456 2457 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2458 if (err < 0) 2459 return err; 2460 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2461 if (err < 0) 2462 return err; 2463 2464 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2465 if (err < 0) 2466 return err; 2467 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2468 if (err < 0) 2469 return err; 2470 2471 if (!ice->own_routing && ice->num_total_dacs > 0) { 2472 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2473 tmp.count = ice->num_total_dacs; 2474 if (ice->vt1720 && tmp.count > 2) 2475 tmp.count = 2; 2476 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2477 if (err < 0) 2478 return err; 2479 } 2480 2481 return snd_ctl_add(ice->card, 2482 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2483 } 2484 2485 static int snd_vt1724_free(struct snd_ice1712 *ice) 2486 { 2487 if (!ice->port) 2488 goto __hw_end; 2489 /* mask all interrupts */ 2490 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2491 outb(0xff, ICEREG1724(ice, IRQMASK)); 2492 /* --- */ 2493 __hw_end: 2494 if (ice->irq >= 0) 2495 free_irq(ice->irq, ice); 2496 pci_release_regions(ice->pci); 2497 snd_ice1712_akm4xxx_free(ice); 2498 pci_disable_device(ice->pci); 2499 kfree(ice->spec); 2500 kfree(ice); 2501 return 0; 2502 } 2503 2504 static int snd_vt1724_dev_free(struct snd_device *device) 2505 { 2506 struct snd_ice1712 *ice = device->device_data; 2507 return snd_vt1724_free(ice); 2508 } 2509 2510 static int snd_vt1724_create(struct snd_card *card, 2511 struct pci_dev *pci, 2512 const char *modelname, 2513 struct snd_ice1712 **r_ice1712) 2514 { 2515 struct snd_ice1712 *ice; 2516 int err; 2517 static struct snd_device_ops ops = { 2518 .dev_free = snd_vt1724_dev_free, 2519 }; 2520 2521 *r_ice1712 = NULL; 2522 2523 /* enable PCI device */ 2524 err = pci_enable_device(pci); 2525 if (err < 0) 2526 return err; 2527 2528 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2529 if (ice == NULL) { 2530 pci_disable_device(pci); 2531 return -ENOMEM; 2532 } 2533 ice->vt1724 = 1; 2534 spin_lock_init(&ice->reg_lock); 2535 mutex_init(&ice->gpio_mutex); 2536 mutex_init(&ice->open_mutex); 2537 mutex_init(&ice->i2c_mutex); 2538 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2539 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2540 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2541 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2542 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2543 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2544 ice->card = card; 2545 ice->pci = pci; 2546 ice->irq = -1; 2547 pci_set_master(pci); 2548 snd_vt1724_proc_init(ice); 2549 synchronize_irq(pci->irq); 2550 2551 card->private_data = ice; 2552 2553 err = pci_request_regions(pci, "ICE1724"); 2554 if (err < 0) { 2555 kfree(ice); 2556 pci_disable_device(pci); 2557 return err; 2558 } 2559 ice->port = pci_resource_start(pci, 0); 2560 ice->profi_port = pci_resource_start(pci, 1); 2561 2562 if (request_irq(pci->irq, snd_vt1724_interrupt, 2563 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2564 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2565 snd_vt1724_free(ice); 2566 return -EIO; 2567 } 2568 2569 ice->irq = pci->irq; 2570 2571 snd_vt1724_chip_reset(ice); 2572 if (snd_vt1724_read_eeprom(ice, modelname) < 0) { 2573 snd_vt1724_free(ice); 2574 return -EIO; 2575 } 2576 if (snd_vt1724_chip_init(ice) < 0) { 2577 snd_vt1724_free(ice); 2578 return -EIO; 2579 } 2580 2581 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2582 if (err < 0) { 2583 snd_vt1724_free(ice); 2584 return err; 2585 } 2586 2587 *r_ice1712 = ice; 2588 return 0; 2589 } 2590 2591 2592 /* 2593 * 2594 * Registration 2595 * 2596 */ 2597 2598 static int snd_vt1724_probe(struct pci_dev *pci, 2599 const struct pci_device_id *pci_id) 2600 { 2601 static int dev; 2602 struct snd_card *card; 2603 struct snd_ice1712 *ice; 2604 int pcm_dev = 0, err; 2605 struct snd_ice1712_card_info * const *tbl, *c; 2606 2607 if (dev >= SNDRV_CARDS) 2608 return -ENODEV; 2609 if (!enable[dev]) { 2610 dev++; 2611 return -ENOENT; 2612 } 2613 2614 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2615 0, &card); 2616 if (err < 0) 2617 return err; 2618 2619 strcpy(card->driver, "ICE1724"); 2620 strcpy(card->shortname, "ICEnsemble ICE1724"); 2621 2622 err = snd_vt1724_create(card, pci, model[dev], &ice); 2623 if (err < 0) { 2624 snd_card_free(card); 2625 return err; 2626 } 2627 2628 /* field init before calling chip_init */ 2629 ice->ext_clock_count = 0; 2630 2631 for (tbl = card_tables; *tbl; tbl++) { 2632 for (c = *tbl; c->name; c++) { 2633 if ((model[dev] && c->model && 2634 !strcmp(model[dev], c->model)) || 2635 (c->subvendor == ice->eeprom.subvendor)) { 2636 strcpy(card->shortname, c->name); 2637 if (c->driver) /* specific driver? */ 2638 strcpy(card->driver, c->driver); 2639 if (c->chip_init) { 2640 err = c->chip_init(ice); 2641 if (err < 0) { 2642 snd_card_free(card); 2643 return err; 2644 } 2645 } 2646 goto __found; 2647 } 2648 } 2649 } 2650 c = &no_matched; 2651 __found: 2652 /* 2653 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2654 * ICE1712 has only one for both (mixed up). 2655 * 2656 * Confusingly the analog PCM is named "professional" here because it 2657 * was called so in ice1712 driver, and vt1724 driver is derived from 2658 * ice1712 driver. 2659 */ 2660 ice->pro_rate_default = PRO_RATE_DEFAULT; 2661 if (!ice->is_spdif_master) 2662 ice->is_spdif_master = stdclock_is_spdif_master; 2663 if (!ice->get_rate) 2664 ice->get_rate = stdclock_get_rate; 2665 if (!ice->set_rate) 2666 ice->set_rate = stdclock_set_rate; 2667 if (!ice->set_mclk) 2668 ice->set_mclk = stdclock_set_mclk; 2669 if (!ice->set_spdif_clock) 2670 ice->set_spdif_clock = stdclock_set_spdif_clock; 2671 if (!ice->get_spdif_master_type) 2672 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2673 if (!ice->ext_clock_names) 2674 ice->ext_clock_names = ext_clock_names; 2675 if (!ice->ext_clock_count) 2676 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2677 2678 if (!ice->hw_rates) 2679 set_std_hw_rates(ice); 2680 2681 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2682 if (err < 0) { 2683 snd_card_free(card); 2684 return err; 2685 } 2686 2687 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2688 if (err < 0) { 2689 snd_card_free(card); 2690 return err; 2691 } 2692 2693 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2694 if (err < 0) { 2695 snd_card_free(card); 2696 return err; 2697 } 2698 2699 err = snd_vt1724_ac97_mixer(ice); 2700 if (err < 0) { 2701 snd_card_free(card); 2702 return err; 2703 } 2704 2705 err = snd_vt1724_build_controls(ice); 2706 if (err < 0) { 2707 snd_card_free(card); 2708 return err; 2709 } 2710 2711 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2712 err = snd_vt1724_spdif_build_controls(ice); 2713 if (err < 0) { 2714 snd_card_free(card); 2715 return err; 2716 } 2717 } 2718 2719 if (c->build_controls) { 2720 err = c->build_controls(ice); 2721 if (err < 0) { 2722 snd_card_free(card); 2723 return err; 2724 } 2725 } 2726 2727 if (!c->no_mpu401) { 2728 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2729 struct snd_rawmidi *rmidi; 2730 2731 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2732 if (err < 0) { 2733 snd_card_free(card); 2734 return err; 2735 } 2736 ice->rmidi[0] = rmidi; 2737 rmidi->private_data = ice; 2738 strcpy(rmidi->name, "ICE1724 MIDI"); 2739 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2740 SNDRV_RAWMIDI_INFO_INPUT | 2741 SNDRV_RAWMIDI_INFO_DUPLEX; 2742 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2743 &vt1724_midi_output_ops); 2744 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2745 &vt1724_midi_input_ops); 2746 2747 /* set watermarks */ 2748 outb(VT1724_MPU_RX_FIFO | 0x1, 2749 ICEREG1724(ice, MPU_FIFO_WM)); 2750 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2751 /* set UART mode */ 2752 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2753 } 2754 } 2755 2756 sprintf(card->longname, "%s at 0x%lx, irq %i", 2757 card->shortname, ice->port, ice->irq); 2758 2759 err = snd_card_register(card); 2760 if (err < 0) { 2761 snd_card_free(card); 2762 return err; 2763 } 2764 pci_set_drvdata(pci, card); 2765 dev++; 2766 return 0; 2767 } 2768 2769 static void snd_vt1724_remove(struct pci_dev *pci) 2770 { 2771 struct snd_card *card = pci_get_drvdata(pci); 2772 struct snd_ice1712 *ice = card->private_data; 2773 2774 if (ice->card_info && ice->card_info->chip_exit) 2775 ice->card_info->chip_exit(ice); 2776 snd_card_free(card); 2777 } 2778 2779 #ifdef CONFIG_PM_SLEEP 2780 static int snd_vt1724_suspend(struct device *dev) 2781 { 2782 struct snd_card *card = dev_get_drvdata(dev); 2783 struct snd_ice1712 *ice = card->private_data; 2784 2785 if (!ice->pm_suspend_enabled) 2786 return 0; 2787 2788 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2789 2790 snd_ac97_suspend(ice->ac97); 2791 2792 spin_lock_irq(&ice->reg_lock); 2793 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2794 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2795 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2796 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2797 spin_unlock_irq(&ice->reg_lock); 2798 2799 if (ice->pm_suspend) 2800 ice->pm_suspend(ice); 2801 return 0; 2802 } 2803 2804 static int snd_vt1724_resume(struct device *dev) 2805 { 2806 struct snd_card *card = dev_get_drvdata(dev); 2807 struct snd_ice1712 *ice = card->private_data; 2808 2809 if (!ice->pm_suspend_enabled) 2810 return 0; 2811 2812 snd_vt1724_chip_reset(ice); 2813 2814 if (snd_vt1724_chip_init(ice) < 0) { 2815 snd_card_disconnect(card); 2816 return -EIO; 2817 } 2818 2819 if (ice->pm_resume) 2820 ice->pm_resume(ice); 2821 2822 if (ice->pm_saved_is_spdif_master) { 2823 /* switching to external clock via SPDIF */ 2824 ice->set_spdif_clock(ice, 0); 2825 } else { 2826 /* internal on-card clock */ 2827 int rate; 2828 if (ice->cur_rate) 2829 rate = ice->cur_rate; 2830 else 2831 rate = ice->pro_rate_default; 2832 snd_vt1724_set_pro_rate(ice, rate, 1); 2833 } 2834 2835 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2836 2837 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2838 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2839 2840 snd_ac97_resume(ice->ac97); 2841 2842 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2843 return 0; 2844 } 2845 2846 static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume); 2847 #define SND_VT1724_PM_OPS &snd_vt1724_pm 2848 #else 2849 #define SND_VT1724_PM_OPS NULL 2850 #endif /* CONFIG_PM_SLEEP */ 2851 2852 static struct pci_driver vt1724_driver = { 2853 .name = KBUILD_MODNAME, 2854 .id_table = snd_vt1724_ids, 2855 .probe = snd_vt1724_probe, 2856 .remove = snd_vt1724_remove, 2857 .driver = { 2858 .pm = SND_VT1724_PM_OPS, 2859 }, 2860 }; 2861 2862 module_pci_driver(vt1724_driver); 2863