1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 4 * VIA VT1720 (Envy24PT) 5 * 6 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 7 * 2002 James Stafford <jstafford@ampltd.com> 8 * 2003 Takashi Iwai <tiwai@suse.de> 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/interrupt.h> 13 #include <linux/init.h> 14 #include <linux/pci.h> 15 #include <linux/slab.h> 16 #include <linux/module.h> 17 #include <linux/mutex.h> 18 #include <sound/core.h> 19 #include <sound/info.h> 20 #include <sound/rawmidi.h> 21 #include <sound/initval.h> 22 23 #include <sound/asoundef.h> 24 25 #include "ice1712.h" 26 #include "envy24ht.h" 27 28 /* lowlevel routines */ 29 #include "amp.h" 30 #include "revo.h" 31 #include "aureon.h" 32 #include "vt1720_mobo.h" 33 #include "pontis.h" 34 #include "prodigy192.h" 35 #include "prodigy_hifi.h" 36 #include "juli.h" 37 #include "maya44.h" 38 #include "phase.h" 39 #include "wtm.h" 40 #include "se.h" 41 #include "quartet.h" 42 #include "psc724.h" 43 44 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 45 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 46 MODULE_LICENSE("GPL"); 47 MODULE_SUPPORTED_DEVICE("{" 48 REVO_DEVICE_DESC 49 AMP_AUDIO2000_DEVICE_DESC 50 AUREON_DEVICE_DESC 51 VT1720_MOBO_DEVICE_DESC 52 PONTIS_DEVICE_DESC 53 PRODIGY192_DEVICE_DESC 54 PRODIGY_HIFI_DEVICE_DESC 55 JULI_DEVICE_DESC 56 MAYA44_DEVICE_DESC 57 PHASE_DEVICE_DESC 58 WTM_DEVICE_DESC 59 SE_DEVICE_DESC 60 QTET_DEVICE_DESC 61 "{VIA,VT1720}," 62 "{VIA,VT1724}," 63 "{ICEnsemble,Generic ICE1724}," 64 "{ICEnsemble,Generic Envy24HT}" 65 "{ICEnsemble,Generic Envy24PT}}"); 66 67 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 68 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 69 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 70 static char *model[SNDRV_CARDS]; 71 72 module_param_array(index, int, NULL, 0444); 73 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 74 module_param_array(id, charp, NULL, 0444); 75 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 76 module_param_array(enable, bool, NULL, 0444); 77 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 78 module_param_array(model, charp, NULL, 0444); 79 MODULE_PARM_DESC(model, "Use the given board model."); 80 81 82 /* Both VT1720 and VT1724 have the same PCI IDs */ 83 static const struct pci_device_id snd_vt1724_ids[] = { 84 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 85 { 0, } 86 }; 87 88 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 89 90 91 static int PRO_RATE_LOCKED; 92 static int PRO_RATE_RESET = 1; 93 static unsigned int PRO_RATE_DEFAULT = 44100; 94 95 static const char * const ext_clock_names[1] = { "IEC958 In" }; 96 97 /* 98 * Basic I/O 99 */ 100 101 /* 102 * default rates, default clock routines 103 */ 104 105 /* check whether the clock mode is spdif-in */ 106 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 107 { 108 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 109 } 110 111 /* 112 * locking rate makes sense only for internal clock mode 113 */ 114 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 115 { 116 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 117 } 118 119 /* 120 * ac97 section 121 */ 122 123 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 124 { 125 unsigned char old_cmd; 126 int tm; 127 for (tm = 0; tm < 0x10000; tm++) { 128 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 129 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 130 continue; 131 if (!(old_cmd & VT1724_AC97_READY)) 132 continue; 133 return old_cmd; 134 } 135 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n"); 136 return old_cmd; 137 } 138 139 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 140 { 141 int tm; 142 for (tm = 0; tm < 0x10000; tm++) 143 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 144 return 0; 145 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n"); 146 return -EIO; 147 } 148 149 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 150 unsigned short reg, 151 unsigned short val) 152 { 153 struct snd_ice1712 *ice = ac97->private_data; 154 unsigned char old_cmd; 155 156 old_cmd = snd_vt1724_ac97_ready(ice); 157 old_cmd &= ~VT1724_AC97_ID_MASK; 158 old_cmd |= ac97->num; 159 outb(reg, ICEMT1724(ice, AC97_INDEX)); 160 outw(val, ICEMT1724(ice, AC97_DATA)); 161 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 162 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 163 } 164 165 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 166 { 167 struct snd_ice1712 *ice = ac97->private_data; 168 unsigned char old_cmd; 169 170 old_cmd = snd_vt1724_ac97_ready(ice); 171 old_cmd &= ~VT1724_AC97_ID_MASK; 172 old_cmd |= ac97->num; 173 outb(reg, ICEMT1724(ice, AC97_INDEX)); 174 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 175 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 176 return ~0; 177 return inw(ICEMT1724(ice, AC97_DATA)); 178 } 179 180 181 /* 182 * GPIO operations 183 */ 184 185 /* set gpio direction 0 = read, 1 = write */ 186 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 187 { 188 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 189 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 190 } 191 192 /* get gpio direction 0 = read, 1 = write */ 193 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 194 { 195 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 196 } 197 198 /* set the gpio mask (0 = writable) */ 199 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 200 { 201 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 202 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 203 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 204 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 205 } 206 207 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 208 { 209 unsigned int mask; 210 if (!ice->vt1720) 211 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 212 else 213 mask = 0; 214 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 215 return mask; 216 } 217 218 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 219 { 220 outw(data, ICEREG1724(ice, GPIO_DATA)); 221 if (!ice->vt1720) 222 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 223 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 224 } 225 226 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 227 { 228 unsigned int data; 229 if (!ice->vt1720) 230 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 231 else 232 data = 0; 233 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 234 return data; 235 } 236 237 /* 238 * MIDI 239 */ 240 241 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 242 { 243 unsigned int count; 244 245 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 246 inb(ICEREG1724(ice, MPU_DATA)); 247 } 248 249 static inline struct snd_rawmidi_substream * 250 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 251 { 252 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 253 struct snd_rawmidi_substream, list); 254 } 255 256 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 257 258 static void vt1724_midi_write(struct snd_ice1712 *ice) 259 { 260 struct snd_rawmidi_substream *s; 261 int count, i; 262 u8 buffer[32]; 263 264 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 265 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 266 if (count > 0) { 267 count = snd_rawmidi_transmit(s, buffer, count); 268 for (i = 0; i < count; ++i) 269 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 270 } 271 /* mask irq when all bytes have been transmitted. 272 * enabled again in output_trigger when the new data comes in. 273 */ 274 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 275 !snd_rawmidi_transmit_empty(s)); 276 } 277 278 static void vt1724_midi_read(struct snd_ice1712 *ice) 279 { 280 struct snd_rawmidi_substream *s; 281 int count, i; 282 u8 buffer[32]; 283 284 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 285 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 286 if (count > 0) { 287 count = min(count, 32); 288 for (i = 0; i < count; ++i) 289 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 290 snd_rawmidi_receive(s, buffer, count); 291 } 292 } 293 294 /* call with ice->reg_lock */ 295 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 296 { 297 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 298 if (enable) 299 mask &= ~flag; 300 else 301 mask |= flag; 302 outb(mask, ICEREG1724(ice, IRQMASK)); 303 } 304 305 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 306 u8 flag, int enable) 307 { 308 struct snd_ice1712 *ice = substream->rmidi->private_data; 309 310 spin_lock_irq(&ice->reg_lock); 311 enable_midi_irq(ice, flag, enable); 312 spin_unlock_irq(&ice->reg_lock); 313 } 314 315 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 316 { 317 return 0; 318 } 319 320 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 321 { 322 return 0; 323 } 324 325 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 326 { 327 struct snd_ice1712 *ice = s->rmidi->private_data; 328 unsigned long flags; 329 330 spin_lock_irqsave(&ice->reg_lock, flags); 331 if (up) { 332 ice->midi_output = 1; 333 vt1724_midi_write(ice); 334 } else { 335 ice->midi_output = 0; 336 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 337 } 338 spin_unlock_irqrestore(&ice->reg_lock, flags); 339 } 340 341 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 342 { 343 struct snd_ice1712 *ice = s->rmidi->private_data; 344 unsigned long timeout; 345 346 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 347 /* 32 bytes should be transmitted in less than about 12 ms */ 348 timeout = jiffies + msecs_to_jiffies(15); 349 do { 350 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 351 break; 352 schedule_timeout_uninterruptible(1); 353 } while (time_after(timeout, jiffies)); 354 } 355 356 static const struct snd_rawmidi_ops vt1724_midi_output_ops = { 357 .open = vt1724_midi_output_open, 358 .close = vt1724_midi_output_close, 359 .trigger = vt1724_midi_output_trigger, 360 .drain = vt1724_midi_output_drain, 361 }; 362 363 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 364 { 365 vt1724_midi_clear_rx(s->rmidi->private_data); 366 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 367 return 0; 368 } 369 370 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 371 { 372 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 373 return 0; 374 } 375 376 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 377 { 378 struct snd_ice1712 *ice = s->rmidi->private_data; 379 unsigned long flags; 380 381 spin_lock_irqsave(&ice->reg_lock, flags); 382 if (up) { 383 ice->midi_input = 1; 384 vt1724_midi_read(ice); 385 } else { 386 ice->midi_input = 0; 387 } 388 spin_unlock_irqrestore(&ice->reg_lock, flags); 389 } 390 391 static const struct snd_rawmidi_ops vt1724_midi_input_ops = { 392 .open = vt1724_midi_input_open, 393 .close = vt1724_midi_input_close, 394 .trigger = vt1724_midi_input_trigger, 395 }; 396 397 398 /* 399 * Interrupt handler 400 */ 401 402 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 403 { 404 struct snd_ice1712 *ice = dev_id; 405 unsigned char status; 406 unsigned char status_mask = 407 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 408 int handled = 0; 409 int timeout = 0; 410 411 while (1) { 412 status = inb(ICEREG1724(ice, IRQSTAT)); 413 status &= status_mask; 414 if (status == 0) 415 break; 416 spin_lock(&ice->reg_lock); 417 if (++timeout > 10) { 418 status = inb(ICEREG1724(ice, IRQSTAT)); 419 dev_err(ice->card->dev, 420 "Too long irq loop, status = 0x%x\n", status); 421 if (status & VT1724_IRQ_MPU_TX) { 422 dev_err(ice->card->dev, "Disabling MPU_TX\n"); 423 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 424 } 425 spin_unlock(&ice->reg_lock); 426 break; 427 } 428 handled = 1; 429 if (status & VT1724_IRQ_MPU_TX) { 430 if (ice->midi_output) 431 vt1724_midi_write(ice); 432 else 433 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 434 /* Due to mysterical reasons, MPU_TX is always 435 * generated (and can't be cleared) when a PCM 436 * playback is going. So let's ignore at the 437 * next loop. 438 */ 439 status_mask &= ~VT1724_IRQ_MPU_TX; 440 } 441 if (status & VT1724_IRQ_MPU_RX) { 442 if (ice->midi_input) 443 vt1724_midi_read(ice); 444 else 445 vt1724_midi_clear_rx(ice); 446 } 447 /* ack MPU irq */ 448 outb(status, ICEREG1724(ice, IRQSTAT)); 449 spin_unlock(&ice->reg_lock); 450 if (status & VT1724_IRQ_MTPCM) { 451 /* 452 * Multi-track PCM 453 * PCM assignment are: 454 * Playback DMA0 (M/C) = playback_pro_substream 455 * Playback DMA1 = playback_con_substream_ds[0] 456 * Playback DMA2 = playback_con_substream_ds[1] 457 * Playback DMA3 = playback_con_substream_ds[2] 458 * Playback DMA4 (SPDIF) = playback_con_substream 459 * Record DMA0 = capture_pro_substream 460 * Record DMA1 = capture_con_substream 461 */ 462 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 463 if (mtstat & VT1724_MULTI_PDMA0) { 464 if (ice->playback_pro_substream) 465 snd_pcm_period_elapsed(ice->playback_pro_substream); 466 } 467 if (mtstat & VT1724_MULTI_RDMA0) { 468 if (ice->capture_pro_substream) 469 snd_pcm_period_elapsed(ice->capture_pro_substream); 470 } 471 if (mtstat & VT1724_MULTI_PDMA1) { 472 if (ice->playback_con_substream_ds[0]) 473 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 474 } 475 if (mtstat & VT1724_MULTI_PDMA2) { 476 if (ice->playback_con_substream_ds[1]) 477 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 478 } 479 if (mtstat & VT1724_MULTI_PDMA3) { 480 if (ice->playback_con_substream_ds[2]) 481 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 482 } 483 if (mtstat & VT1724_MULTI_PDMA4) { 484 if (ice->playback_con_substream) 485 snd_pcm_period_elapsed(ice->playback_con_substream); 486 } 487 if (mtstat & VT1724_MULTI_RDMA1) { 488 if (ice->capture_con_substream) 489 snd_pcm_period_elapsed(ice->capture_con_substream); 490 } 491 /* ack anyway to avoid freeze */ 492 outb(mtstat, ICEMT1724(ice, IRQ)); 493 /* ought to really handle this properly */ 494 if (mtstat & VT1724_MULTI_FIFO_ERR) { 495 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 496 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 497 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 498 /* If I don't do this, I get machine lockup due to continual interrupts */ 499 } 500 501 } 502 } 503 return IRQ_RETVAL(handled); 504 } 505 506 /* 507 * PCM code - professional part (multitrack) 508 */ 509 510 static const unsigned int rates[] = { 511 8000, 9600, 11025, 12000, 16000, 22050, 24000, 512 32000, 44100, 48000, 64000, 88200, 96000, 513 176400, 192000, 514 }; 515 516 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 517 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 518 .list = rates, 519 .mask = 0, 520 }; 521 522 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 523 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 524 .list = rates, 525 .mask = 0, 526 }; 527 528 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 529 .count = ARRAY_SIZE(rates), 530 .list = rates, 531 .mask = 0, 532 }; 533 534 struct vt1724_pcm_reg { 535 unsigned int addr; /* ADDR register offset */ 536 unsigned int size; /* SIZE register offset */ 537 unsigned int count; /* COUNT register offset */ 538 unsigned int start; /* start & pause bit */ 539 }; 540 541 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 542 { 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 544 unsigned char what; 545 unsigned char old; 546 struct snd_pcm_substream *s; 547 548 what = 0; 549 snd_pcm_group_for_each_entry(s, substream) { 550 if (snd_pcm_substream_chip(s) == ice) { 551 const struct vt1724_pcm_reg *reg; 552 reg = s->runtime->private_data; 553 what |= reg->start; 554 snd_pcm_trigger_done(s, substream); 555 } 556 } 557 558 switch (cmd) { 559 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 560 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 561 spin_lock(&ice->reg_lock); 562 old = inb(ICEMT1724(ice, DMA_PAUSE)); 563 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 564 old |= what; 565 else 566 old &= ~what; 567 outb(old, ICEMT1724(ice, DMA_PAUSE)); 568 spin_unlock(&ice->reg_lock); 569 break; 570 571 case SNDRV_PCM_TRIGGER_START: 572 case SNDRV_PCM_TRIGGER_STOP: 573 case SNDRV_PCM_TRIGGER_SUSPEND: 574 spin_lock(&ice->reg_lock); 575 old = inb(ICEMT1724(ice, DMA_CONTROL)); 576 if (cmd == SNDRV_PCM_TRIGGER_START) 577 old |= what; 578 else 579 old &= ~what; 580 outb(old, ICEMT1724(ice, DMA_CONTROL)); 581 spin_unlock(&ice->reg_lock); 582 break; 583 584 case SNDRV_PCM_TRIGGER_RESUME: 585 /* apps will have to restart stream */ 586 break; 587 588 default: 589 return -EINVAL; 590 } 591 return 0; 592 } 593 594 /* 595 */ 596 597 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 598 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 599 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 600 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 601 602 static const unsigned int stdclock_rate_list[16] = { 603 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 604 22050, 11025, 88200, 176400, 0, 192000, 64000 605 }; 606 607 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 608 { 609 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 610 } 611 612 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 613 { 614 int i; 615 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 616 if (stdclock_rate_list[i] == rate) { 617 outb(i, ICEMT1724(ice, RATE)); 618 return; 619 } 620 } 621 } 622 623 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 624 unsigned int rate) 625 { 626 unsigned char val, old; 627 /* check MT02 */ 628 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 629 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 630 if (rate > 96000) 631 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 632 else 633 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 634 if (val != old) { 635 outb(val, ICEMT1724(ice, I2S_FORMAT)); 636 /* master clock changed */ 637 return 1; 638 } 639 } 640 /* no change in master clock */ 641 return 0; 642 } 643 644 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 645 int force) 646 { 647 unsigned long flags; 648 unsigned char mclk_change; 649 unsigned int i, old_rate; 650 651 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 652 return -EINVAL; 653 654 spin_lock_irqsave(&ice->reg_lock, flags); 655 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 656 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 657 /* running? we cannot change the rate now... */ 658 spin_unlock_irqrestore(&ice->reg_lock, flags); 659 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 660 } 661 if (!force && is_pro_rate_locked(ice)) { 662 /* comparing required and current rate - makes sense for 663 * internal clock only */ 664 spin_unlock_irqrestore(&ice->reg_lock, flags); 665 return (rate == ice->cur_rate) ? 0 : -EBUSY; 666 } 667 668 if (force || !ice->is_spdif_master(ice)) { 669 /* force means the rate was switched by ucontrol, otherwise 670 * setting clock rate for internal clock mode */ 671 old_rate = ice->get_rate(ice); 672 if (force || (old_rate != rate)) 673 ice->set_rate(ice, rate); 674 else if (rate == ice->cur_rate) { 675 spin_unlock_irqrestore(&ice->reg_lock, flags); 676 return 0; 677 } 678 } 679 680 ice->cur_rate = rate; 681 682 /* setting master clock */ 683 mclk_change = ice->set_mclk(ice, rate); 684 685 spin_unlock_irqrestore(&ice->reg_lock, flags); 686 687 if (mclk_change && ice->gpio.i2s_mclk_changed) 688 ice->gpio.i2s_mclk_changed(ice); 689 if (ice->gpio.set_pro_rate) 690 ice->gpio.set_pro_rate(ice, rate); 691 692 /* set up codecs */ 693 for (i = 0; i < ice->akm_codecs; i++) { 694 if (ice->akm[i].ops.set_rate_val) 695 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 696 } 697 if (ice->spdif.ops.setup_rate) 698 ice->spdif.ops.setup_rate(ice, rate); 699 700 return 0; 701 } 702 703 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 704 struct snd_pcm_hw_params *hw_params) 705 { 706 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 707 int i, chs; 708 709 chs = params_channels(hw_params); 710 mutex_lock(&ice->open_mutex); 711 /* mark surround channels */ 712 if (substream == ice->playback_pro_substream) { 713 /* PDMA0 can be multi-channel up to 8 */ 714 chs = chs / 2 - 1; 715 for (i = 0; i < chs; i++) { 716 if (ice->pcm_reserved[i] && 717 ice->pcm_reserved[i] != substream) { 718 mutex_unlock(&ice->open_mutex); 719 return -EBUSY; 720 } 721 ice->pcm_reserved[i] = substream; 722 } 723 for (; i < 3; i++) { 724 if (ice->pcm_reserved[i] == substream) 725 ice->pcm_reserved[i] = NULL; 726 } 727 } else { 728 for (i = 0; i < 3; i++) { 729 /* check individual playback stream */ 730 if (ice->playback_con_substream_ds[i] == substream) { 731 if (ice->pcm_reserved[i] && 732 ice->pcm_reserved[i] != substream) { 733 mutex_unlock(&ice->open_mutex); 734 return -EBUSY; 735 } 736 ice->pcm_reserved[i] = substream; 737 break; 738 } 739 } 740 } 741 mutex_unlock(&ice->open_mutex); 742 743 return snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 744 } 745 746 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 747 { 748 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 749 int i; 750 751 mutex_lock(&ice->open_mutex); 752 /* unmark surround channels */ 753 for (i = 0; i < 3; i++) 754 if (ice->pcm_reserved[i] == substream) 755 ice->pcm_reserved[i] = NULL; 756 mutex_unlock(&ice->open_mutex); 757 return 0; 758 } 759 760 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 761 { 762 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 763 unsigned char val; 764 unsigned int size; 765 766 spin_lock_irq(&ice->reg_lock); 767 val = (8 - substream->runtime->channels) >> 1; 768 outb(val, ICEMT1724(ice, BURST)); 769 770 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 771 772 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 773 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 774 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 775 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 776 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 777 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 778 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 779 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 780 781 spin_unlock_irq(&ice->reg_lock); 782 783 /* 784 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, " 785 "buffer = 0x%x, period = 0x%x\n", 786 substream->runtime->channels, 787 (unsigned int)substream->runtime->dma_addr, 788 snd_pcm_lib_buffer_bytes(substream), 789 snd_pcm_lib_period_bytes(substream)); 790 */ 791 return 0; 792 } 793 794 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 795 { 796 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 797 size_t ptr; 798 799 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 800 return 0; 801 #if 0 /* read PLAYBACK_ADDR */ 802 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 803 if (ptr < substream->runtime->dma_addr) { 804 dev_dbg(ice->card->dev, "invalid negative ptr\n"); 805 return 0; 806 } 807 ptr -= substream->runtime->dma_addr; 808 ptr = bytes_to_frames(substream->runtime, ptr); 809 if (ptr >= substream->runtime->buffer_size) { 810 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 811 (int)ptr, (int)substream->runtime->period_size); 812 return 0; 813 } 814 #else /* read PLAYBACK_SIZE */ 815 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 816 ptr = (ptr + 1) << 2; 817 ptr = bytes_to_frames(substream->runtime, ptr); 818 if (!ptr) 819 ; 820 else if (ptr <= substream->runtime->buffer_size) 821 ptr = substream->runtime->buffer_size - ptr; 822 else { 823 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 824 (int)ptr, (int)substream->runtime->buffer_size); 825 ptr = 0; 826 } 827 #endif 828 return ptr; 829 } 830 831 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 832 { 833 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 834 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 835 836 spin_lock_irq(&ice->reg_lock); 837 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 838 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 839 ice->profi_port + reg->size); 840 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 841 ice->profi_port + reg->count); 842 spin_unlock_irq(&ice->reg_lock); 843 return 0; 844 } 845 846 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 847 { 848 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 849 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 850 size_t ptr; 851 852 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 853 return 0; 854 #if 0 /* use ADDR register */ 855 ptr = inl(ice->profi_port + reg->addr); 856 ptr -= substream->runtime->dma_addr; 857 return bytes_to_frames(substream->runtime, ptr); 858 #else /* use SIZE register */ 859 ptr = inw(ice->profi_port + reg->size); 860 ptr = (ptr + 1) << 2; 861 ptr = bytes_to_frames(substream->runtime, ptr); 862 if (!ptr) 863 ; 864 else if (ptr <= substream->runtime->buffer_size) 865 ptr = substream->runtime->buffer_size - ptr; 866 else { 867 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 868 (int)ptr, (int)substream->runtime->buffer_size); 869 ptr = 0; 870 } 871 return ptr; 872 #endif 873 } 874 875 static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 876 .addr = VT1724_MT_PLAYBACK_ADDR, 877 .size = VT1724_MT_PLAYBACK_SIZE, 878 .count = VT1724_MT_PLAYBACK_COUNT, 879 .start = VT1724_PDMA0_START, 880 }; 881 882 static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 883 .addr = VT1724_MT_PDMA4_ADDR, 884 .size = VT1724_MT_PDMA4_SIZE, 885 .count = VT1724_MT_PDMA4_COUNT, 886 .start = VT1724_PDMA4_START, 887 }; 888 889 static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 890 .addr = VT1724_MT_CAPTURE_ADDR, 891 .size = VT1724_MT_CAPTURE_SIZE, 892 .count = VT1724_MT_CAPTURE_COUNT, 893 .start = VT1724_RDMA0_START, 894 }; 895 896 static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 897 .addr = VT1724_MT_RDMA1_ADDR, 898 .size = VT1724_MT_RDMA1_SIZE, 899 .count = VT1724_MT_RDMA1_COUNT, 900 .start = VT1724_RDMA1_START, 901 }; 902 903 #define vt1724_playback_pro_reg vt1724_pdma0_reg 904 #define vt1724_playback_spdif_reg vt1724_pdma4_reg 905 #define vt1724_capture_pro_reg vt1724_rdma0_reg 906 #define vt1724_capture_spdif_reg vt1724_rdma1_reg 907 908 static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 909 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 910 SNDRV_PCM_INFO_BLOCK_TRANSFER | 911 SNDRV_PCM_INFO_MMAP_VALID | 912 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 913 .formats = SNDRV_PCM_FMTBIT_S32_LE, 914 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 915 .rate_min = 8000, 916 .rate_max = 192000, 917 .channels_min = 2, 918 .channels_max = 8, 919 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 920 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 921 .period_bytes_max = (1UL << 21), 922 .periods_min = 2, 923 .periods_max = 1024, 924 }; 925 926 static const struct snd_pcm_hardware snd_vt1724_spdif = { 927 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 928 SNDRV_PCM_INFO_BLOCK_TRANSFER | 929 SNDRV_PCM_INFO_MMAP_VALID | 930 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 931 .formats = SNDRV_PCM_FMTBIT_S32_LE, 932 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 933 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 934 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 935 SNDRV_PCM_RATE_192000), 936 .rate_min = 32000, 937 .rate_max = 192000, 938 .channels_min = 2, 939 .channels_max = 2, 940 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 941 .period_bytes_min = 2 * 4 * 2, 942 .period_bytes_max = (1UL << 18), 943 .periods_min = 2, 944 .periods_max = 1024, 945 }; 946 947 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 948 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 949 SNDRV_PCM_INFO_BLOCK_TRANSFER | 950 SNDRV_PCM_INFO_MMAP_VALID | 951 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 952 .formats = SNDRV_PCM_FMTBIT_S32_LE, 953 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 954 .rate_min = 8000, 955 .rate_max = 192000, 956 .channels_min = 2, 957 .channels_max = 2, 958 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 959 .period_bytes_min = 2 * 4 * 2, 960 .period_bytes_max = (1UL << 18), 961 .periods_min = 2, 962 .periods_max = 1024, 963 }; 964 965 /* 966 * set rate constraints 967 */ 968 static void set_std_hw_rates(struct snd_ice1712 *ice) 969 { 970 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 971 /* I2S */ 972 /* VT1720 doesn't support more than 96kHz */ 973 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 974 ice->hw_rates = &hw_constraints_rates_192; 975 else 976 ice->hw_rates = &hw_constraints_rates_96; 977 } else { 978 /* ACLINK */ 979 ice->hw_rates = &hw_constraints_rates_48; 980 } 981 } 982 983 static int set_rate_constraints(struct snd_ice1712 *ice, 984 struct snd_pcm_substream *substream) 985 { 986 struct snd_pcm_runtime *runtime = substream->runtime; 987 988 runtime->hw.rate_min = ice->hw_rates->list[0]; 989 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 990 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 991 return snd_pcm_hw_constraint_list(runtime, 0, 992 SNDRV_PCM_HW_PARAM_RATE, 993 ice->hw_rates); 994 } 995 996 /* if the card has the internal rate locked (is_pro_locked), limit runtime 997 hw rates to the current internal rate only. 998 */ 999 static void constrain_rate_if_locked(struct snd_pcm_substream *substream) 1000 { 1001 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1002 struct snd_pcm_runtime *runtime = substream->runtime; 1003 unsigned int rate; 1004 if (is_pro_rate_locked(ice)) { 1005 rate = ice->get_rate(ice); 1006 if (rate >= runtime->hw.rate_min 1007 && rate <= runtime->hw.rate_max) { 1008 runtime->hw.rate_min = rate; 1009 runtime->hw.rate_max = rate; 1010 } 1011 } 1012 } 1013 1014 1015 /* multi-channel playback needs alignment 8x32bit regardless of the channels 1016 * actually used 1017 */ 1018 #define VT1724_BUFFER_ALIGN 0x20 1019 1020 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1021 { 1022 struct snd_pcm_runtime *runtime = substream->runtime; 1023 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1024 int chs, num_indeps; 1025 1026 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1027 ice->playback_pro_substream = substream; 1028 runtime->hw = snd_vt1724_playback_pro; 1029 snd_pcm_set_sync(substream); 1030 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1031 set_rate_constraints(ice, substream); 1032 mutex_lock(&ice->open_mutex); 1033 /* calculate the currently available channels */ 1034 num_indeps = ice->num_total_dacs / 2 - 1; 1035 for (chs = 0; chs < num_indeps; chs++) { 1036 if (ice->pcm_reserved[chs]) 1037 break; 1038 } 1039 chs = (chs + 1) * 2; 1040 runtime->hw.channels_max = chs; 1041 if (chs > 2) /* channels must be even */ 1042 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1043 mutex_unlock(&ice->open_mutex); 1044 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1045 VT1724_BUFFER_ALIGN); 1046 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1047 VT1724_BUFFER_ALIGN); 1048 constrain_rate_if_locked(substream); 1049 if (ice->pro_open) 1050 ice->pro_open(ice, substream); 1051 return 0; 1052 } 1053 1054 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1055 { 1056 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1057 struct snd_pcm_runtime *runtime = substream->runtime; 1058 1059 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1060 ice->capture_pro_substream = substream; 1061 runtime->hw = snd_vt1724_2ch_stereo; 1062 snd_pcm_set_sync(substream); 1063 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1064 set_rate_constraints(ice, substream); 1065 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1066 VT1724_BUFFER_ALIGN); 1067 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1068 VT1724_BUFFER_ALIGN); 1069 constrain_rate_if_locked(substream); 1070 if (ice->pro_open) 1071 ice->pro_open(ice, substream); 1072 return 0; 1073 } 1074 1075 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1076 { 1077 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1078 1079 if (PRO_RATE_RESET) 1080 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1081 ice->playback_pro_substream = NULL; 1082 1083 return 0; 1084 } 1085 1086 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1087 { 1088 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1089 1090 if (PRO_RATE_RESET) 1091 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1092 ice->capture_pro_substream = NULL; 1093 return 0; 1094 } 1095 1096 static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1097 .open = snd_vt1724_playback_pro_open, 1098 .close = snd_vt1724_playback_pro_close, 1099 .ioctl = snd_pcm_lib_ioctl, 1100 .hw_params = snd_vt1724_pcm_hw_params, 1101 .hw_free = snd_vt1724_pcm_hw_free, 1102 .prepare = snd_vt1724_playback_pro_prepare, 1103 .trigger = snd_vt1724_pcm_trigger, 1104 .pointer = snd_vt1724_playback_pro_pointer, 1105 }; 1106 1107 static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1108 .open = snd_vt1724_capture_pro_open, 1109 .close = snd_vt1724_capture_pro_close, 1110 .ioctl = snd_pcm_lib_ioctl, 1111 .hw_params = snd_vt1724_pcm_hw_params, 1112 .hw_free = snd_vt1724_pcm_hw_free, 1113 .prepare = snd_vt1724_pcm_prepare, 1114 .trigger = snd_vt1724_pcm_trigger, 1115 .pointer = snd_vt1724_pcm_pointer, 1116 }; 1117 1118 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1119 { 1120 struct snd_pcm *pcm; 1121 int capt, err; 1122 1123 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1124 VT1724_CFG_ADC_NONE) 1125 capt = 0; 1126 else 1127 capt = 1; 1128 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1129 if (err < 0) 1130 return err; 1131 1132 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1133 if (capt) 1134 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1135 &snd_vt1724_capture_pro_ops); 1136 1137 pcm->private_data = ice; 1138 pcm->info_flags = 0; 1139 strcpy(pcm->name, "ICE1724"); 1140 1141 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1142 &ice->pci->dev, 256*1024, 256*1024); 1143 1144 ice->pcm_pro = pcm; 1145 1146 return 0; 1147 } 1148 1149 1150 /* 1151 * SPDIF PCM 1152 */ 1153 1154 /* update spdif control bits; call with reg_lock */ 1155 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1156 { 1157 unsigned char cbit, disabled; 1158 1159 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1160 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1161 if (cbit != disabled) 1162 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1163 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1164 if (cbit != disabled) 1165 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1166 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1167 } 1168 1169 /* update SPDIF control bits according to the given rate */ 1170 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1171 { 1172 unsigned int val, nval; 1173 unsigned long flags; 1174 1175 spin_lock_irqsave(&ice->reg_lock, flags); 1176 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1177 nval &= ~(7 << 12); 1178 switch (rate) { 1179 case 44100: break; 1180 case 48000: nval |= 2 << 12; break; 1181 case 32000: nval |= 3 << 12; break; 1182 case 88200: nval |= 4 << 12; break; 1183 case 96000: nval |= 5 << 12; break; 1184 case 192000: nval |= 6 << 12; break; 1185 case 176400: nval |= 7 << 12; break; 1186 } 1187 if (val != nval) 1188 update_spdif_bits(ice, nval); 1189 spin_unlock_irqrestore(&ice->reg_lock, flags); 1190 } 1191 1192 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1193 { 1194 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1195 if (!ice->force_pdma4) 1196 update_spdif_rate(ice, substream->runtime->rate); 1197 return snd_vt1724_pcm_prepare(substream); 1198 } 1199 1200 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1201 { 1202 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1203 struct snd_pcm_runtime *runtime = substream->runtime; 1204 1205 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1206 ice->playback_con_substream = substream; 1207 if (ice->force_pdma4) { 1208 runtime->hw = snd_vt1724_2ch_stereo; 1209 set_rate_constraints(ice, substream); 1210 } else 1211 runtime->hw = snd_vt1724_spdif; 1212 snd_pcm_set_sync(substream); 1213 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1214 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1215 VT1724_BUFFER_ALIGN); 1216 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1217 VT1724_BUFFER_ALIGN); 1218 constrain_rate_if_locked(substream); 1219 if (ice->spdif.ops.open) 1220 ice->spdif.ops.open(ice, substream); 1221 return 0; 1222 } 1223 1224 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1225 { 1226 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1227 1228 if (PRO_RATE_RESET) 1229 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1230 ice->playback_con_substream = NULL; 1231 if (ice->spdif.ops.close) 1232 ice->spdif.ops.close(ice, substream); 1233 1234 return 0; 1235 } 1236 1237 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1238 { 1239 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1240 struct snd_pcm_runtime *runtime = substream->runtime; 1241 1242 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1243 ice->capture_con_substream = substream; 1244 if (ice->force_rdma1) { 1245 runtime->hw = snd_vt1724_2ch_stereo; 1246 set_rate_constraints(ice, substream); 1247 } else 1248 runtime->hw = snd_vt1724_spdif; 1249 snd_pcm_set_sync(substream); 1250 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1251 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1252 VT1724_BUFFER_ALIGN); 1253 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1254 VT1724_BUFFER_ALIGN); 1255 constrain_rate_if_locked(substream); 1256 if (ice->spdif.ops.open) 1257 ice->spdif.ops.open(ice, substream); 1258 return 0; 1259 } 1260 1261 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1262 { 1263 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1264 1265 if (PRO_RATE_RESET) 1266 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1267 ice->capture_con_substream = NULL; 1268 if (ice->spdif.ops.close) 1269 ice->spdif.ops.close(ice, substream); 1270 1271 return 0; 1272 } 1273 1274 static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1275 .open = snd_vt1724_playback_spdif_open, 1276 .close = snd_vt1724_playback_spdif_close, 1277 .ioctl = snd_pcm_lib_ioctl, 1278 .hw_params = snd_vt1724_pcm_hw_params, 1279 .hw_free = snd_vt1724_pcm_hw_free, 1280 .prepare = snd_vt1724_playback_spdif_prepare, 1281 .trigger = snd_vt1724_pcm_trigger, 1282 .pointer = snd_vt1724_pcm_pointer, 1283 }; 1284 1285 static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1286 .open = snd_vt1724_capture_spdif_open, 1287 .close = snd_vt1724_capture_spdif_close, 1288 .ioctl = snd_pcm_lib_ioctl, 1289 .hw_params = snd_vt1724_pcm_hw_params, 1290 .hw_free = snd_vt1724_pcm_hw_free, 1291 .prepare = snd_vt1724_pcm_prepare, 1292 .trigger = snd_vt1724_pcm_trigger, 1293 .pointer = snd_vt1724_pcm_pointer, 1294 }; 1295 1296 1297 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1298 { 1299 char *name; 1300 struct snd_pcm *pcm; 1301 int play, capt; 1302 int err; 1303 1304 if (ice->force_pdma4 || 1305 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1306 play = 1; 1307 ice->has_spdif = 1; 1308 } else 1309 play = 0; 1310 if (ice->force_rdma1 || 1311 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1312 capt = 1; 1313 ice->has_spdif = 1; 1314 } else 1315 capt = 0; 1316 if (!play && !capt) 1317 return 0; /* no spdif device */ 1318 1319 if (ice->force_pdma4 || ice->force_rdma1) 1320 name = "ICE1724 Secondary"; 1321 else 1322 name = "ICE1724 IEC958"; 1323 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1324 if (err < 0) 1325 return err; 1326 1327 if (play) 1328 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1329 &snd_vt1724_playback_spdif_ops); 1330 if (capt) 1331 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1332 &snd_vt1724_capture_spdif_ops); 1333 1334 pcm->private_data = ice; 1335 pcm->info_flags = 0; 1336 strcpy(pcm->name, name); 1337 1338 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1339 &ice->pci->dev, 256*1024, 256*1024); 1340 1341 ice->pcm = pcm; 1342 1343 return 0; 1344 } 1345 1346 1347 /* 1348 * independent surround PCMs 1349 */ 1350 1351 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1352 { 1353 .addr = VT1724_MT_PDMA1_ADDR, 1354 .size = VT1724_MT_PDMA1_SIZE, 1355 .count = VT1724_MT_PDMA1_COUNT, 1356 .start = VT1724_PDMA1_START, 1357 }, 1358 { 1359 .addr = VT1724_MT_PDMA2_ADDR, 1360 .size = VT1724_MT_PDMA2_SIZE, 1361 .count = VT1724_MT_PDMA2_COUNT, 1362 .start = VT1724_PDMA2_START, 1363 }, 1364 { 1365 .addr = VT1724_MT_PDMA3_ADDR, 1366 .size = VT1724_MT_PDMA3_SIZE, 1367 .count = VT1724_MT_PDMA3_COUNT, 1368 .start = VT1724_PDMA3_START, 1369 }, 1370 }; 1371 1372 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1373 { 1374 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1375 unsigned char val; 1376 1377 spin_lock_irq(&ice->reg_lock); 1378 val = 3 - substream->number; 1379 if (inb(ICEMT1724(ice, BURST)) < val) 1380 outb(val, ICEMT1724(ice, BURST)); 1381 spin_unlock_irq(&ice->reg_lock); 1382 return snd_vt1724_pcm_prepare(substream); 1383 } 1384 1385 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1386 { 1387 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1388 struct snd_pcm_runtime *runtime = substream->runtime; 1389 1390 mutex_lock(&ice->open_mutex); 1391 /* already used by PDMA0? */ 1392 if (ice->pcm_reserved[substream->number]) { 1393 mutex_unlock(&ice->open_mutex); 1394 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1395 } 1396 mutex_unlock(&ice->open_mutex); 1397 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1398 ice->playback_con_substream_ds[substream->number] = substream; 1399 runtime->hw = snd_vt1724_2ch_stereo; 1400 snd_pcm_set_sync(substream); 1401 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1402 set_rate_constraints(ice, substream); 1403 return 0; 1404 } 1405 1406 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1407 { 1408 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1409 1410 if (PRO_RATE_RESET) 1411 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1412 ice->playback_con_substream_ds[substream->number] = NULL; 1413 ice->pcm_reserved[substream->number] = NULL; 1414 1415 return 0; 1416 } 1417 1418 static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1419 .open = snd_vt1724_playback_indep_open, 1420 .close = snd_vt1724_playback_indep_close, 1421 .ioctl = snd_pcm_lib_ioctl, 1422 .hw_params = snd_vt1724_pcm_hw_params, 1423 .hw_free = snd_vt1724_pcm_hw_free, 1424 .prepare = snd_vt1724_playback_indep_prepare, 1425 .trigger = snd_vt1724_pcm_trigger, 1426 .pointer = snd_vt1724_pcm_pointer, 1427 }; 1428 1429 1430 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1431 { 1432 struct snd_pcm *pcm; 1433 int play; 1434 int err; 1435 1436 play = ice->num_total_dacs / 2 - 1; 1437 if (play <= 0) 1438 return 0; 1439 1440 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1441 if (err < 0) 1442 return err; 1443 1444 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1445 &snd_vt1724_playback_indep_ops); 1446 1447 pcm->private_data = ice; 1448 pcm->info_flags = 0; 1449 strcpy(pcm->name, "ICE1724 Surround PCM"); 1450 1451 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1452 &ice->pci->dev, 256*1024, 256*1024); 1453 1454 ice->pcm_ds = pcm; 1455 1456 return 0; 1457 } 1458 1459 1460 /* 1461 * Mixer section 1462 */ 1463 1464 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1465 { 1466 int err; 1467 1468 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1469 struct snd_ac97_bus *pbus; 1470 struct snd_ac97_template ac97; 1471 static struct snd_ac97_bus_ops ops = { 1472 .write = snd_vt1724_ac97_write, 1473 .read = snd_vt1724_ac97_read, 1474 }; 1475 1476 /* cold reset */ 1477 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1478 mdelay(5); /* FIXME */ 1479 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1480 1481 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1482 if (err < 0) 1483 return err; 1484 memset(&ac97, 0, sizeof(ac97)); 1485 ac97.private_data = ice; 1486 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1487 if (err < 0) 1488 dev_warn(ice->card->dev, 1489 "cannot initialize pro ac97, skipped\n"); 1490 else 1491 return 0; 1492 } 1493 /* I2S mixer only */ 1494 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1495 return 0; 1496 } 1497 1498 /* 1499 * 1500 */ 1501 1502 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1503 { 1504 return (unsigned int)ice->eeprom.data[idx] | \ 1505 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1506 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1507 } 1508 1509 static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1510 struct snd_info_buffer *buffer) 1511 { 1512 struct snd_ice1712 *ice = entry->private_data; 1513 unsigned int idx; 1514 1515 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1516 snd_iprintf(buffer, "EEPROM:\n"); 1517 1518 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1519 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1520 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1521 snd_iprintf(buffer, " System Config : 0x%x\n", 1522 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1523 snd_iprintf(buffer, " ACLink : 0x%x\n", 1524 ice->eeprom.data[ICE_EEP2_ACLINK]); 1525 snd_iprintf(buffer, " I2S : 0x%x\n", 1526 ice->eeprom.data[ICE_EEP2_I2S]); 1527 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1528 ice->eeprom.data[ICE_EEP2_SPDIF]); 1529 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1530 ice->eeprom.gpiodir); 1531 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1532 ice->eeprom.gpiomask); 1533 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1534 ice->eeprom.gpiostate); 1535 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1536 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1537 idx, ice->eeprom.data[idx]); 1538 1539 snd_iprintf(buffer, "\nRegisters:\n"); 1540 1541 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1542 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1543 for (idx = 0x0; idx < 0x20 ; idx++) 1544 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1545 idx, inb(ice->port+idx)); 1546 for (idx = 0x0; idx < 0x30 ; idx++) 1547 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1548 idx, inb(ice->profi_port+idx)); 1549 } 1550 1551 static void snd_vt1724_proc_init(struct snd_ice1712 *ice) 1552 { 1553 snd_card_ro_proc_new(ice->card, "ice1724", ice, snd_vt1724_proc_read); 1554 } 1555 1556 /* 1557 * 1558 */ 1559 1560 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1561 struct snd_ctl_elem_info *uinfo) 1562 { 1563 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1564 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1565 return 0; 1566 } 1567 1568 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1569 struct snd_ctl_elem_value *ucontrol) 1570 { 1571 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1572 1573 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1574 return 0; 1575 } 1576 1577 static const struct snd_kcontrol_new snd_vt1724_eeprom = { 1578 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1579 .name = "ICE1724 EEPROM", 1580 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1581 .info = snd_vt1724_eeprom_info, 1582 .get = snd_vt1724_eeprom_get 1583 }; 1584 1585 /* 1586 */ 1587 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1588 struct snd_ctl_elem_info *uinfo) 1589 { 1590 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1591 uinfo->count = 1; 1592 return 0; 1593 } 1594 1595 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1596 { 1597 unsigned int val, rbits; 1598 1599 val = diga->status[0] & 0x03; /* professional, non-audio */ 1600 if (val & 0x01) { 1601 /* professional */ 1602 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1603 IEC958_AES0_PRO_EMPHASIS_5015) 1604 val |= 1U << 3; 1605 rbits = (diga->status[4] >> 3) & 0x0f; 1606 if (rbits) { 1607 switch (rbits) { 1608 case 2: val |= 5 << 12; break; /* 96k */ 1609 case 3: val |= 6 << 12; break; /* 192k */ 1610 case 10: val |= 4 << 12; break; /* 88.2k */ 1611 case 11: val |= 7 << 12; break; /* 176.4k */ 1612 } 1613 } else { 1614 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1615 case IEC958_AES0_PRO_FS_44100: 1616 break; 1617 case IEC958_AES0_PRO_FS_32000: 1618 val |= 3U << 12; 1619 break; 1620 default: 1621 val |= 2U << 12; 1622 break; 1623 } 1624 } 1625 } else { 1626 /* consumer */ 1627 val |= diga->status[1] & 0x04; /* copyright */ 1628 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1629 IEC958_AES0_CON_EMPHASIS_5015) 1630 val |= 1U << 3; 1631 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1632 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1633 } 1634 return val; 1635 } 1636 1637 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1638 { 1639 memset(diga->status, 0, sizeof(diga->status)); 1640 diga->status[0] = val & 0x03; /* professional, non-audio */ 1641 if (val & 0x01) { 1642 /* professional */ 1643 if (val & (1U << 3)) 1644 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1645 switch ((val >> 12) & 0x7) { 1646 case 0: 1647 break; 1648 case 2: 1649 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1650 break; 1651 default: 1652 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1653 break; 1654 } 1655 } else { 1656 /* consumer */ 1657 diga->status[0] |= val & (1U << 2); /* copyright */ 1658 if (val & (1U << 3)) 1659 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1660 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1661 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1662 } 1663 } 1664 1665 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1666 struct snd_ctl_elem_value *ucontrol) 1667 { 1668 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1669 unsigned int val; 1670 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1671 decode_spdif_bits(&ucontrol->value.iec958, val); 1672 return 0; 1673 } 1674 1675 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1676 struct snd_ctl_elem_value *ucontrol) 1677 { 1678 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1679 unsigned int val, old; 1680 1681 val = encode_spdif_bits(&ucontrol->value.iec958); 1682 spin_lock_irq(&ice->reg_lock); 1683 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1684 if (val != old) 1685 update_spdif_bits(ice, val); 1686 spin_unlock_irq(&ice->reg_lock); 1687 return val != old; 1688 } 1689 1690 static const struct snd_kcontrol_new snd_vt1724_spdif_default = 1691 { 1692 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1693 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1694 .info = snd_vt1724_spdif_info, 1695 .get = snd_vt1724_spdif_default_get, 1696 .put = snd_vt1724_spdif_default_put 1697 }; 1698 1699 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1700 struct snd_ctl_elem_value *ucontrol) 1701 { 1702 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1703 IEC958_AES0_PROFESSIONAL | 1704 IEC958_AES0_CON_NOT_COPYRIGHT | 1705 IEC958_AES0_CON_EMPHASIS; 1706 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1707 IEC958_AES1_CON_CATEGORY; 1708 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1709 return 0; 1710 } 1711 1712 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1713 struct snd_ctl_elem_value *ucontrol) 1714 { 1715 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1716 IEC958_AES0_PROFESSIONAL | 1717 IEC958_AES0_PRO_FS | 1718 IEC958_AES0_PRO_EMPHASIS; 1719 return 0; 1720 } 1721 1722 static const struct snd_kcontrol_new snd_vt1724_spdif_maskc = 1723 { 1724 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1725 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1726 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1727 .info = snd_vt1724_spdif_info, 1728 .get = snd_vt1724_spdif_maskc_get, 1729 }; 1730 1731 static const struct snd_kcontrol_new snd_vt1724_spdif_maskp = 1732 { 1733 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1734 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1735 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1736 .info = snd_vt1724_spdif_info, 1737 .get = snd_vt1724_spdif_maskp_get, 1738 }; 1739 1740 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1741 1742 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1743 struct snd_ctl_elem_value *ucontrol) 1744 { 1745 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1746 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1747 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1748 return 0; 1749 } 1750 1751 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1752 struct snd_ctl_elem_value *ucontrol) 1753 { 1754 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1755 unsigned char old, val; 1756 1757 spin_lock_irq(&ice->reg_lock); 1758 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1759 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1760 if (ucontrol->value.integer.value[0]) 1761 val |= VT1724_CFG_SPDIF_OUT_EN; 1762 if (old != val) 1763 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1764 spin_unlock_irq(&ice->reg_lock); 1765 return old != val; 1766 } 1767 1768 static const struct snd_kcontrol_new snd_vt1724_spdif_switch = 1769 { 1770 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1771 /* FIXME: the following conflict with IEC958 Playback Route */ 1772 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1773 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1774 .info = snd_vt1724_spdif_sw_info, 1775 .get = snd_vt1724_spdif_sw_get, 1776 .put = snd_vt1724_spdif_sw_put 1777 }; 1778 1779 1780 #if 0 /* NOT USED YET */ 1781 /* 1782 * GPIO access from extern 1783 */ 1784 1785 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1786 1787 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1788 struct snd_ctl_elem_value *ucontrol) 1789 { 1790 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1791 int shift = kcontrol->private_value & 0xff; 1792 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1793 1794 snd_ice1712_save_gpio_status(ice); 1795 ucontrol->value.integer.value[0] = 1796 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1797 snd_ice1712_restore_gpio_status(ice); 1798 return 0; 1799 } 1800 1801 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1802 struct snd_ctl_elem_value *ucontrol) 1803 { 1804 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1805 int shift = kcontrol->private_value & 0xff; 1806 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1807 unsigned int val, nval; 1808 1809 if (kcontrol->private_value & (1 << 31)) 1810 return -EPERM; 1811 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1812 snd_ice1712_save_gpio_status(ice); 1813 val = snd_ice1712_gpio_read(ice); 1814 nval |= val & ~(1 << shift); 1815 if (val != nval) 1816 snd_ice1712_gpio_write(ice, nval); 1817 snd_ice1712_restore_gpio_status(ice); 1818 return val != nval; 1819 } 1820 #endif /* NOT USED YET */ 1821 1822 /* 1823 * rate 1824 */ 1825 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1826 struct snd_ctl_elem_info *uinfo) 1827 { 1828 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1829 int hw_rates_count = ice->hw_rates->count; 1830 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1831 uinfo->count = 1; 1832 1833 /* internal clocks */ 1834 uinfo->value.enumerated.items = hw_rates_count; 1835 /* external clocks */ 1836 if (ice->force_rdma1 || 1837 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1838 uinfo->value.enumerated.items += ice->ext_clock_count; 1839 /* upper limit - keep at top */ 1840 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1841 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1842 if (uinfo->value.enumerated.item >= hw_rates_count) 1843 /* ext_clock items */ 1844 strcpy(uinfo->value.enumerated.name, 1845 ice->ext_clock_names[ 1846 uinfo->value.enumerated.item - hw_rates_count]); 1847 else 1848 /* int clock items */ 1849 sprintf(uinfo->value.enumerated.name, "%d", 1850 ice->hw_rates->list[uinfo->value.enumerated.item]); 1851 return 0; 1852 } 1853 1854 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1855 struct snd_ctl_elem_value *ucontrol) 1856 { 1857 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1858 unsigned int i, rate; 1859 1860 spin_lock_irq(&ice->reg_lock); 1861 if (ice->is_spdif_master(ice)) { 1862 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1863 ice->get_spdif_master_type(ice); 1864 } else { 1865 rate = ice->get_rate(ice); 1866 ucontrol->value.enumerated.item[0] = 0; 1867 for (i = 0; i < ice->hw_rates->count; i++) { 1868 if (ice->hw_rates->list[i] == rate) { 1869 ucontrol->value.enumerated.item[0] = i; 1870 break; 1871 } 1872 } 1873 } 1874 spin_unlock_irq(&ice->reg_lock); 1875 return 0; 1876 } 1877 1878 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1879 { 1880 /* standard external clock - only single type - SPDIF IN */ 1881 return 0; 1882 } 1883 1884 /* setting clock to external - SPDIF */ 1885 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1886 { 1887 unsigned char oval; 1888 unsigned char i2s_oval; 1889 oval = inb(ICEMT1724(ice, RATE)); 1890 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1891 /* setting 256fs */ 1892 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1893 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1894 return 0; 1895 } 1896 1897 1898 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1899 struct snd_ctl_elem_value *ucontrol) 1900 { 1901 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1902 unsigned int old_rate, new_rate; 1903 unsigned int item = ucontrol->value.enumerated.item[0]; 1904 unsigned int first_ext_clock = ice->hw_rates->count; 1905 1906 if (item > first_ext_clock + ice->ext_clock_count - 1) 1907 return -EINVAL; 1908 1909 /* if rate = 0 => external clock */ 1910 spin_lock_irq(&ice->reg_lock); 1911 if (ice->is_spdif_master(ice)) 1912 old_rate = 0; 1913 else 1914 old_rate = ice->get_rate(ice); 1915 if (item >= first_ext_clock) { 1916 /* switching to external clock */ 1917 ice->set_spdif_clock(ice, item - first_ext_clock); 1918 new_rate = 0; 1919 } else { 1920 /* internal on-card clock */ 1921 new_rate = ice->hw_rates->list[item]; 1922 ice->pro_rate_default = new_rate; 1923 spin_unlock_irq(&ice->reg_lock); 1924 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1925 spin_lock_irq(&ice->reg_lock); 1926 } 1927 spin_unlock_irq(&ice->reg_lock); 1928 1929 /* the first switch to the ext. clock mode? */ 1930 if (old_rate != new_rate && !new_rate) { 1931 /* notify akm chips as well */ 1932 unsigned int i; 1933 if (ice->gpio.set_pro_rate) 1934 ice->gpio.set_pro_rate(ice, 0); 1935 for (i = 0; i < ice->akm_codecs; i++) { 1936 if (ice->akm[i].ops.set_rate_val) 1937 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1938 } 1939 } 1940 return old_rate != new_rate; 1941 } 1942 1943 static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = { 1944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1945 .name = "Multi Track Internal Clock", 1946 .info = snd_vt1724_pro_internal_clock_info, 1947 .get = snd_vt1724_pro_internal_clock_get, 1948 .put = snd_vt1724_pro_internal_clock_put 1949 }; 1950 1951 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1952 1953 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1954 struct snd_ctl_elem_value *ucontrol) 1955 { 1956 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1957 return 0; 1958 } 1959 1960 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1961 struct snd_ctl_elem_value *ucontrol) 1962 { 1963 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1964 int change = 0, nval; 1965 1966 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1967 spin_lock_irq(&ice->reg_lock); 1968 change = PRO_RATE_LOCKED != nval; 1969 PRO_RATE_LOCKED = nval; 1970 spin_unlock_irq(&ice->reg_lock); 1971 return change; 1972 } 1973 1974 static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = { 1975 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1976 .name = "Multi Track Rate Locking", 1977 .info = snd_vt1724_pro_rate_locking_info, 1978 .get = snd_vt1724_pro_rate_locking_get, 1979 .put = snd_vt1724_pro_rate_locking_put 1980 }; 1981 1982 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 1983 1984 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1985 struct snd_ctl_elem_value *ucontrol) 1986 { 1987 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 1988 return 0; 1989 } 1990 1991 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1992 struct snd_ctl_elem_value *ucontrol) 1993 { 1994 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1995 int change = 0, nval; 1996 1997 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1998 spin_lock_irq(&ice->reg_lock); 1999 change = PRO_RATE_RESET != nval; 2000 PRO_RATE_RESET = nval; 2001 spin_unlock_irq(&ice->reg_lock); 2002 return change; 2003 } 2004 2005 static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = { 2006 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2007 .name = "Multi Track Rate Reset", 2008 .info = snd_vt1724_pro_rate_reset_info, 2009 .get = snd_vt1724_pro_rate_reset_get, 2010 .put = snd_vt1724_pro_rate_reset_put 2011 }; 2012 2013 2014 /* 2015 * routing 2016 */ 2017 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 2018 struct snd_ctl_elem_info *uinfo) 2019 { 2020 static const char * const texts[] = { 2021 "PCM Out", /* 0 */ 2022 "H/W In 0", "H/W In 1", /* 1-2 */ 2023 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2024 }; 2025 2026 return snd_ctl_enum_info(uinfo, 1, 5, texts); 2027 } 2028 2029 static inline int analog_route_shift(int idx) 2030 { 2031 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2032 } 2033 2034 static inline int digital_route_shift(int idx) 2035 { 2036 return idx * 3; 2037 } 2038 2039 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2040 { 2041 unsigned long val; 2042 unsigned char eitem; 2043 static const unsigned char xlate[8] = { 2044 0, 255, 1, 2, 255, 255, 3, 4, 2045 }; 2046 2047 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2048 val >>= shift; 2049 val &= 7; /* we now have 3 bits per output */ 2050 eitem = xlate[val]; 2051 if (eitem == 255) { 2052 snd_BUG(); 2053 return 0; 2054 } 2055 return eitem; 2056 } 2057 2058 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2059 int shift) 2060 { 2061 unsigned int old_val, nval; 2062 int change; 2063 static const unsigned char xroute[8] = { 2064 0, /* PCM */ 2065 2, /* PSDIN0 Left */ 2066 3, /* PSDIN0 Right */ 2067 6, /* SPDIN Left */ 2068 7, /* SPDIN Right */ 2069 }; 2070 2071 nval = xroute[val % 5]; 2072 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2073 val &= ~(0x07 << shift); 2074 val |= nval << shift; 2075 change = val != old_val; 2076 if (change) 2077 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2078 return change; 2079 } 2080 2081 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2082 struct snd_ctl_elem_value *ucontrol) 2083 { 2084 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2085 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2086 ucontrol->value.enumerated.item[0] = 2087 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2088 return 0; 2089 } 2090 2091 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2092 struct snd_ctl_elem_value *ucontrol) 2093 { 2094 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2095 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2096 return snd_ice1724_put_route_val(ice, 2097 ucontrol->value.enumerated.item[0], 2098 analog_route_shift(idx)); 2099 } 2100 2101 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2102 struct snd_ctl_elem_value *ucontrol) 2103 { 2104 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2105 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2106 ucontrol->value.enumerated.item[0] = 2107 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2108 return 0; 2109 } 2110 2111 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2112 struct snd_ctl_elem_value *ucontrol) 2113 { 2114 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2115 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2116 return snd_ice1724_put_route_val(ice, 2117 ucontrol->value.enumerated.item[0], 2118 digital_route_shift(idx)); 2119 } 2120 2121 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route = 2122 { 2123 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2124 .name = "H/W Playback Route", 2125 .info = snd_vt1724_pro_route_info, 2126 .get = snd_vt1724_pro_route_analog_get, 2127 .put = snd_vt1724_pro_route_analog_put, 2128 }; 2129 2130 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = { 2131 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2132 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2133 .info = snd_vt1724_pro_route_info, 2134 .get = snd_vt1724_pro_route_spdif_get, 2135 .put = snd_vt1724_pro_route_spdif_put, 2136 .count = 2, 2137 }; 2138 2139 2140 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2141 struct snd_ctl_elem_info *uinfo) 2142 { 2143 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2144 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2145 uinfo->value.integer.min = 0; 2146 uinfo->value.integer.max = 255; 2147 return 0; 2148 } 2149 2150 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2151 struct snd_ctl_elem_value *ucontrol) 2152 { 2153 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2154 int idx; 2155 2156 spin_lock_irq(&ice->reg_lock); 2157 for (idx = 0; idx < 22; idx++) { 2158 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2159 ucontrol->value.integer.value[idx] = 2160 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2161 } 2162 spin_unlock_irq(&ice->reg_lock); 2163 return 0; 2164 } 2165 2166 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = { 2167 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2168 .name = "Multi Track Peak", 2169 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2170 .info = snd_vt1724_pro_peak_info, 2171 .get = snd_vt1724_pro_peak_get 2172 }; 2173 2174 /* 2175 * 2176 */ 2177 2178 static struct snd_ice1712_card_info no_matched; 2179 2180 2181 /* 2182 ooAoo cards with no controls 2183 */ 2184 static unsigned char ooaoo_sq210_eeprom[] = { 2185 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2186 1xDACs */ 2187 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2188 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2189 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2190 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2191 [ICE_EEP2_GPIO_DIR1] = 0x00, 2192 [ICE_EEP2_GPIO_DIR2] = 0x00, 2193 [ICE_EEP2_GPIO_MASK] = 0xff, 2194 [ICE_EEP2_GPIO_MASK1] = 0xff, 2195 [ICE_EEP2_GPIO_MASK2] = 0xff, 2196 2197 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2198 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2199 and GPIO15 always zero */ 2200 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2201 }; 2202 2203 2204 static struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = { 2205 { 2206 .name = "ooAoo SQ210a", 2207 .model = "sq210a", 2208 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2209 .eeprom_data = ooaoo_sq210_eeprom, 2210 }, 2211 { } /* terminator */ 2212 }; 2213 2214 static struct snd_ice1712_card_info *card_tables[] = { 2215 snd_vt1724_revo_cards, 2216 snd_vt1724_amp_cards, 2217 snd_vt1724_aureon_cards, 2218 snd_vt1720_mobo_cards, 2219 snd_vt1720_pontis_cards, 2220 snd_vt1724_prodigy_hifi_cards, 2221 snd_vt1724_prodigy192_cards, 2222 snd_vt1724_juli_cards, 2223 snd_vt1724_maya44_cards, 2224 snd_vt1724_phase_cards, 2225 snd_vt1724_wtm_cards, 2226 snd_vt1724_se_cards, 2227 snd_vt1724_qtet_cards, 2228 snd_vt1724_ooaoo_cards, 2229 snd_vt1724_psc724_cards, 2230 NULL, 2231 }; 2232 2233 2234 /* 2235 */ 2236 2237 static void wait_i2c_busy(struct snd_ice1712 *ice) 2238 { 2239 int t = 0x10000; 2240 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2241 ; 2242 if (t == -1) 2243 dev_err(ice->card->dev, "i2c busy timeout\n"); 2244 } 2245 2246 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2247 unsigned char dev, unsigned char addr) 2248 { 2249 unsigned char val; 2250 2251 mutex_lock(&ice->i2c_mutex); 2252 wait_i2c_busy(ice); 2253 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2254 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2255 wait_i2c_busy(ice); 2256 val = inb(ICEREG1724(ice, I2C_DATA)); 2257 mutex_unlock(&ice->i2c_mutex); 2258 /* 2259 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2260 */ 2261 return val; 2262 } 2263 2264 void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2265 unsigned char dev, unsigned char addr, unsigned char data) 2266 { 2267 mutex_lock(&ice->i2c_mutex); 2268 wait_i2c_busy(ice); 2269 /* 2270 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2271 */ 2272 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2273 outb(data, ICEREG1724(ice, I2C_DATA)); 2274 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2275 wait_i2c_busy(ice); 2276 mutex_unlock(&ice->i2c_mutex); 2277 } 2278 2279 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2280 const char *modelname) 2281 { 2282 const int dev = 0xa0; /* EEPROM device address */ 2283 unsigned int i, size; 2284 struct snd_ice1712_card_info * const *tbl, *c; 2285 2286 if (!modelname || !*modelname) { 2287 ice->eeprom.subvendor = 0; 2288 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2289 ice->eeprom.subvendor = 2290 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2291 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2292 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2293 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2294 if (ice->eeprom.subvendor == 0 || 2295 ice->eeprom.subvendor == (unsigned int)-1) { 2296 /* invalid subvendor from EEPROM, try the PCI 2297 * subststem ID instead 2298 */ 2299 u16 vendor, device; 2300 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2301 &vendor); 2302 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2303 ice->eeprom.subvendor = 2304 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2305 if (ice->eeprom.subvendor == 0 || 2306 ice->eeprom.subvendor == (unsigned int)-1) { 2307 dev_err(ice->card->dev, 2308 "No valid ID is found\n"); 2309 return -ENXIO; 2310 } 2311 } 2312 } 2313 for (tbl = card_tables; *tbl; tbl++) { 2314 for (c = *tbl; c->name; c++) { 2315 if (modelname && c->model && 2316 !strcmp(modelname, c->model)) { 2317 dev_info(ice->card->dev, 2318 "Using board model %s\n", 2319 c->name); 2320 ice->eeprom.subvendor = c->subvendor; 2321 } else if (c->subvendor != ice->eeprom.subvendor) 2322 continue; 2323 ice->card_info = c; 2324 if (!c->eeprom_size || !c->eeprom_data) 2325 goto found; 2326 /* if the EEPROM is given by the driver, use it */ 2327 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2328 ice->eeprom.version = 2; 2329 ice->eeprom.size = c->eeprom_size + 6; 2330 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2331 goto read_skipped; 2332 } 2333 } 2334 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2335 ice->eeprom.subvendor); 2336 #ifdef CONFIG_PM_SLEEP 2337 /* assume AC97-only card which can suspend without additional code */ 2338 ice->pm_suspend_enabled = 1; 2339 #endif 2340 2341 found: 2342 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2343 if (ice->eeprom.size < 6) 2344 ice->eeprom.size = 32; 2345 else if (ice->eeprom.size > 32) { 2346 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n", 2347 ice->eeprom.size); 2348 return -EIO; 2349 } 2350 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2351 if (ice->eeprom.version != 1 && ice->eeprom.version != 2) 2352 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n", 2353 ice->eeprom.version); 2354 size = ice->eeprom.size - 6; 2355 for (i = 0; i < size; i++) 2356 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2357 2358 read_skipped: 2359 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2360 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2361 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2362 2363 return 0; 2364 } 2365 2366 2367 2368 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2369 { 2370 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2371 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2372 msleep(10); 2373 outb(0, ICEREG1724(ice, CONTROL)); 2374 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2375 msleep(10); 2376 } 2377 2378 static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2379 { 2380 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2381 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2382 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2383 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2384 2385 ice->gpio.write_mask = ice->eeprom.gpiomask; 2386 ice->gpio.direction = ice->eeprom.gpiodir; 2387 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2388 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2389 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2390 2391 outb(0, ICEREG1724(ice, POWERDOWN)); 2392 2393 /* MPU_RX and TX irq masks are cleared later dynamically */ 2394 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2395 2396 /* don't handle FIFO overrun/underruns (just yet), 2397 * since they cause machine lockups 2398 */ 2399 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2400 2401 return 0; 2402 } 2403 2404 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2405 { 2406 int err; 2407 struct snd_kcontrol *kctl; 2408 2409 if (snd_BUG_ON(!ice->pcm)) 2410 return -EIO; 2411 2412 if (!ice->own_routing) { 2413 err = snd_ctl_add(ice->card, 2414 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2415 if (err < 0) 2416 return err; 2417 } 2418 2419 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2420 if (err < 0) 2421 return err; 2422 2423 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); 2424 if (err < 0) 2425 return err; 2426 kctl->id.device = ice->pcm->device; 2427 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); 2428 if (err < 0) 2429 return err; 2430 kctl->id.device = ice->pcm->device; 2431 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); 2432 if (err < 0) 2433 return err; 2434 kctl->id.device = ice->pcm->device; 2435 #if 0 /* use default only */ 2436 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); 2437 if (err < 0) 2438 return err; 2439 kctl->id.device = ice->pcm->device; 2440 ice->spdif.stream_ctl = kctl; 2441 #endif 2442 return 0; 2443 } 2444 2445 2446 static int snd_vt1724_build_controls(struct snd_ice1712 *ice) 2447 { 2448 int err; 2449 2450 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2451 if (err < 0) 2452 return err; 2453 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2454 if (err < 0) 2455 return err; 2456 2457 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2458 if (err < 0) 2459 return err; 2460 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2461 if (err < 0) 2462 return err; 2463 2464 if (!ice->own_routing && ice->num_total_dacs > 0) { 2465 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2466 tmp.count = ice->num_total_dacs; 2467 if (ice->vt1720 && tmp.count > 2) 2468 tmp.count = 2; 2469 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2470 if (err < 0) 2471 return err; 2472 } 2473 2474 return snd_ctl_add(ice->card, 2475 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2476 } 2477 2478 static int snd_vt1724_free(struct snd_ice1712 *ice) 2479 { 2480 if (!ice->port) 2481 goto __hw_end; 2482 /* mask all interrupts */ 2483 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2484 outb(0xff, ICEREG1724(ice, IRQMASK)); 2485 /* --- */ 2486 __hw_end: 2487 if (ice->irq >= 0) 2488 free_irq(ice->irq, ice); 2489 pci_release_regions(ice->pci); 2490 snd_ice1712_akm4xxx_free(ice); 2491 pci_disable_device(ice->pci); 2492 kfree(ice->spec); 2493 kfree(ice); 2494 return 0; 2495 } 2496 2497 static int snd_vt1724_dev_free(struct snd_device *device) 2498 { 2499 struct snd_ice1712 *ice = device->device_data; 2500 return snd_vt1724_free(ice); 2501 } 2502 2503 static int snd_vt1724_create(struct snd_card *card, 2504 struct pci_dev *pci, 2505 const char *modelname, 2506 struct snd_ice1712 **r_ice1712) 2507 { 2508 struct snd_ice1712 *ice; 2509 int err; 2510 static struct snd_device_ops ops = { 2511 .dev_free = snd_vt1724_dev_free, 2512 }; 2513 2514 *r_ice1712 = NULL; 2515 2516 /* enable PCI device */ 2517 err = pci_enable_device(pci); 2518 if (err < 0) 2519 return err; 2520 2521 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2522 if (ice == NULL) { 2523 pci_disable_device(pci); 2524 return -ENOMEM; 2525 } 2526 ice->vt1724 = 1; 2527 spin_lock_init(&ice->reg_lock); 2528 mutex_init(&ice->gpio_mutex); 2529 mutex_init(&ice->open_mutex); 2530 mutex_init(&ice->i2c_mutex); 2531 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2532 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2533 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2534 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2535 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2536 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2537 ice->card = card; 2538 ice->pci = pci; 2539 ice->irq = -1; 2540 pci_set_master(pci); 2541 snd_vt1724_proc_init(ice); 2542 synchronize_irq(pci->irq); 2543 2544 card->private_data = ice; 2545 2546 err = pci_request_regions(pci, "ICE1724"); 2547 if (err < 0) { 2548 kfree(ice); 2549 pci_disable_device(pci); 2550 return err; 2551 } 2552 ice->port = pci_resource_start(pci, 0); 2553 ice->profi_port = pci_resource_start(pci, 1); 2554 2555 if (request_irq(pci->irq, snd_vt1724_interrupt, 2556 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2557 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2558 snd_vt1724_free(ice); 2559 return -EIO; 2560 } 2561 2562 ice->irq = pci->irq; 2563 2564 snd_vt1724_chip_reset(ice); 2565 if (snd_vt1724_read_eeprom(ice, modelname) < 0) { 2566 snd_vt1724_free(ice); 2567 return -EIO; 2568 } 2569 if (snd_vt1724_chip_init(ice) < 0) { 2570 snd_vt1724_free(ice); 2571 return -EIO; 2572 } 2573 2574 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2575 if (err < 0) { 2576 snd_vt1724_free(ice); 2577 return err; 2578 } 2579 2580 *r_ice1712 = ice; 2581 return 0; 2582 } 2583 2584 2585 /* 2586 * 2587 * Registration 2588 * 2589 */ 2590 2591 static int snd_vt1724_probe(struct pci_dev *pci, 2592 const struct pci_device_id *pci_id) 2593 { 2594 static int dev; 2595 struct snd_card *card; 2596 struct snd_ice1712 *ice; 2597 int pcm_dev = 0, err; 2598 struct snd_ice1712_card_info * const *tbl, *c; 2599 2600 if (dev >= SNDRV_CARDS) 2601 return -ENODEV; 2602 if (!enable[dev]) { 2603 dev++; 2604 return -ENOENT; 2605 } 2606 2607 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2608 0, &card); 2609 if (err < 0) 2610 return err; 2611 2612 strcpy(card->driver, "ICE1724"); 2613 strcpy(card->shortname, "ICEnsemble ICE1724"); 2614 2615 err = snd_vt1724_create(card, pci, model[dev], &ice); 2616 if (err < 0) { 2617 snd_card_free(card); 2618 return err; 2619 } 2620 2621 /* field init before calling chip_init */ 2622 ice->ext_clock_count = 0; 2623 2624 for (tbl = card_tables; *tbl; tbl++) { 2625 for (c = *tbl; c->name; c++) { 2626 if ((model[dev] && c->model && 2627 !strcmp(model[dev], c->model)) || 2628 (c->subvendor == ice->eeprom.subvendor)) { 2629 strcpy(card->shortname, c->name); 2630 if (c->driver) /* specific driver? */ 2631 strcpy(card->driver, c->driver); 2632 if (c->chip_init) { 2633 err = c->chip_init(ice); 2634 if (err < 0) { 2635 snd_card_free(card); 2636 return err; 2637 } 2638 } 2639 goto __found; 2640 } 2641 } 2642 } 2643 c = &no_matched; 2644 __found: 2645 /* 2646 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2647 * ICE1712 has only one for both (mixed up). 2648 * 2649 * Confusingly the analog PCM is named "professional" here because it 2650 * was called so in ice1712 driver, and vt1724 driver is derived from 2651 * ice1712 driver. 2652 */ 2653 ice->pro_rate_default = PRO_RATE_DEFAULT; 2654 if (!ice->is_spdif_master) 2655 ice->is_spdif_master = stdclock_is_spdif_master; 2656 if (!ice->get_rate) 2657 ice->get_rate = stdclock_get_rate; 2658 if (!ice->set_rate) 2659 ice->set_rate = stdclock_set_rate; 2660 if (!ice->set_mclk) 2661 ice->set_mclk = stdclock_set_mclk; 2662 if (!ice->set_spdif_clock) 2663 ice->set_spdif_clock = stdclock_set_spdif_clock; 2664 if (!ice->get_spdif_master_type) 2665 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2666 if (!ice->ext_clock_names) 2667 ice->ext_clock_names = ext_clock_names; 2668 if (!ice->ext_clock_count) 2669 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2670 2671 if (!ice->hw_rates) 2672 set_std_hw_rates(ice); 2673 2674 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2675 if (err < 0) { 2676 snd_card_free(card); 2677 return err; 2678 } 2679 2680 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2681 if (err < 0) { 2682 snd_card_free(card); 2683 return err; 2684 } 2685 2686 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2687 if (err < 0) { 2688 snd_card_free(card); 2689 return err; 2690 } 2691 2692 err = snd_vt1724_ac97_mixer(ice); 2693 if (err < 0) { 2694 snd_card_free(card); 2695 return err; 2696 } 2697 2698 err = snd_vt1724_build_controls(ice); 2699 if (err < 0) { 2700 snd_card_free(card); 2701 return err; 2702 } 2703 2704 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2705 err = snd_vt1724_spdif_build_controls(ice); 2706 if (err < 0) { 2707 snd_card_free(card); 2708 return err; 2709 } 2710 } 2711 2712 if (c->build_controls) { 2713 err = c->build_controls(ice); 2714 if (err < 0) { 2715 snd_card_free(card); 2716 return err; 2717 } 2718 } 2719 2720 if (!c->no_mpu401) { 2721 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2722 struct snd_rawmidi *rmidi; 2723 2724 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2725 if (err < 0) { 2726 snd_card_free(card); 2727 return err; 2728 } 2729 ice->rmidi[0] = rmidi; 2730 rmidi->private_data = ice; 2731 strcpy(rmidi->name, "ICE1724 MIDI"); 2732 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2733 SNDRV_RAWMIDI_INFO_INPUT | 2734 SNDRV_RAWMIDI_INFO_DUPLEX; 2735 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2736 &vt1724_midi_output_ops); 2737 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2738 &vt1724_midi_input_ops); 2739 2740 /* set watermarks */ 2741 outb(VT1724_MPU_RX_FIFO | 0x1, 2742 ICEREG1724(ice, MPU_FIFO_WM)); 2743 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2744 /* set UART mode */ 2745 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2746 } 2747 } 2748 2749 sprintf(card->longname, "%s at 0x%lx, irq %i", 2750 card->shortname, ice->port, ice->irq); 2751 2752 err = snd_card_register(card); 2753 if (err < 0) { 2754 snd_card_free(card); 2755 return err; 2756 } 2757 pci_set_drvdata(pci, card); 2758 dev++; 2759 return 0; 2760 } 2761 2762 static void snd_vt1724_remove(struct pci_dev *pci) 2763 { 2764 struct snd_card *card = pci_get_drvdata(pci); 2765 struct snd_ice1712 *ice = card->private_data; 2766 2767 if (ice->card_info && ice->card_info->chip_exit) 2768 ice->card_info->chip_exit(ice); 2769 snd_card_free(card); 2770 } 2771 2772 #ifdef CONFIG_PM_SLEEP 2773 static int snd_vt1724_suspend(struct device *dev) 2774 { 2775 struct snd_card *card = dev_get_drvdata(dev); 2776 struct snd_ice1712 *ice = card->private_data; 2777 2778 if (!ice->pm_suspend_enabled) 2779 return 0; 2780 2781 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2782 2783 snd_ac97_suspend(ice->ac97); 2784 2785 spin_lock_irq(&ice->reg_lock); 2786 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2787 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2788 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2789 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2790 spin_unlock_irq(&ice->reg_lock); 2791 2792 if (ice->pm_suspend) 2793 ice->pm_suspend(ice); 2794 return 0; 2795 } 2796 2797 static int snd_vt1724_resume(struct device *dev) 2798 { 2799 struct snd_card *card = dev_get_drvdata(dev); 2800 struct snd_ice1712 *ice = card->private_data; 2801 2802 if (!ice->pm_suspend_enabled) 2803 return 0; 2804 2805 snd_vt1724_chip_reset(ice); 2806 2807 if (snd_vt1724_chip_init(ice) < 0) { 2808 snd_card_disconnect(card); 2809 return -EIO; 2810 } 2811 2812 if (ice->pm_resume) 2813 ice->pm_resume(ice); 2814 2815 if (ice->pm_saved_is_spdif_master) { 2816 /* switching to external clock via SPDIF */ 2817 ice->set_spdif_clock(ice, 0); 2818 } else { 2819 /* internal on-card clock */ 2820 int rate; 2821 if (ice->cur_rate) 2822 rate = ice->cur_rate; 2823 else 2824 rate = ice->pro_rate_default; 2825 snd_vt1724_set_pro_rate(ice, rate, 1); 2826 } 2827 2828 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2829 2830 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2831 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2832 2833 snd_ac97_resume(ice->ac97); 2834 2835 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2836 return 0; 2837 } 2838 2839 static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume); 2840 #define SND_VT1724_PM_OPS &snd_vt1724_pm 2841 #else 2842 #define SND_VT1724_PM_OPS NULL 2843 #endif /* CONFIG_PM_SLEEP */ 2844 2845 static struct pci_driver vt1724_driver = { 2846 .name = KBUILD_MODNAME, 2847 .id_table = snd_vt1724_ids, 2848 .probe = snd_vt1724_probe, 2849 .remove = snd_vt1724_remove, 2850 .driver = { 2851 .pm = SND_VT1724_PM_OPS, 2852 }, 2853 }; 2854 2855 module_pci_driver(vt1724_driver); 2856