1 /* 2 * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT) 3 * VIA VT1720 (Envy24PT) 4 * 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 6 * 2002 James Stafford <jstafford@ampltd.com> 7 * 2003 Takashi Iwai <tiwai@suse.de> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/interrupt.h> 27 #include <linux/init.h> 28 #include <linux/pci.h> 29 #include <linux/slab.h> 30 #include <linux/module.h> 31 #include <linux/mutex.h> 32 #include <sound/core.h> 33 #include <sound/info.h> 34 #include <sound/rawmidi.h> 35 #include <sound/initval.h> 36 37 #include <sound/asoundef.h> 38 39 #include "ice1712.h" 40 #include "envy24ht.h" 41 42 /* lowlevel routines */ 43 #include "amp.h" 44 #include "revo.h" 45 #include "aureon.h" 46 #include "vt1720_mobo.h" 47 #include "pontis.h" 48 #include "prodigy192.h" 49 #include "prodigy_hifi.h" 50 #include "juli.h" 51 #include "maya44.h" 52 #include "phase.h" 53 #include "wtm.h" 54 #include "se.h" 55 #include "quartet.h" 56 #include "psc724.h" 57 58 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 59 MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)"); 60 MODULE_LICENSE("GPL"); 61 MODULE_SUPPORTED_DEVICE("{" 62 REVO_DEVICE_DESC 63 AMP_AUDIO2000_DEVICE_DESC 64 AUREON_DEVICE_DESC 65 VT1720_MOBO_DEVICE_DESC 66 PONTIS_DEVICE_DESC 67 PRODIGY192_DEVICE_DESC 68 PRODIGY_HIFI_DEVICE_DESC 69 JULI_DEVICE_DESC 70 MAYA44_DEVICE_DESC 71 PHASE_DEVICE_DESC 72 WTM_DEVICE_DESC 73 SE_DEVICE_DESC 74 QTET_DEVICE_DESC 75 "{VIA,VT1720}," 76 "{VIA,VT1724}," 77 "{ICEnsemble,Generic ICE1724}," 78 "{ICEnsemble,Generic Envy24HT}" 79 "{ICEnsemble,Generic Envy24PT}}"); 80 81 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 82 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 83 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 84 static char *model[SNDRV_CARDS]; 85 86 module_param_array(index, int, NULL, 0444); 87 MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard."); 88 module_param_array(id, charp, NULL, 0444); 89 MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard."); 90 module_param_array(enable, bool, NULL, 0444); 91 MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard."); 92 module_param_array(model, charp, NULL, 0444); 93 MODULE_PARM_DESC(model, "Use the given board model."); 94 95 96 /* Both VT1720 and VT1724 have the same PCI IDs */ 97 static const struct pci_device_id snd_vt1724_ids[] = { 98 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_VT1724), 0 }, 99 { 0, } 100 }; 101 102 MODULE_DEVICE_TABLE(pci, snd_vt1724_ids); 103 104 105 static int PRO_RATE_LOCKED; 106 static int PRO_RATE_RESET = 1; 107 static unsigned int PRO_RATE_DEFAULT = 44100; 108 109 static const char * const ext_clock_names[1] = { "IEC958 In" }; 110 111 /* 112 * Basic I/O 113 */ 114 115 /* 116 * default rates, default clock routines 117 */ 118 119 /* check whether the clock mode is spdif-in */ 120 static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice) 121 { 122 return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0; 123 } 124 125 /* 126 * locking rate makes sense only for internal clock mode 127 */ 128 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 129 { 130 return (!ice->is_spdif_master(ice)) && PRO_RATE_LOCKED; 131 } 132 133 /* 134 * ac97 section 135 */ 136 137 static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice) 138 { 139 unsigned char old_cmd; 140 int tm; 141 for (tm = 0; tm < 0x10000; tm++) { 142 old_cmd = inb(ICEMT1724(ice, AC97_CMD)); 143 if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ)) 144 continue; 145 if (!(old_cmd & VT1724_AC97_READY)) 146 continue; 147 return old_cmd; 148 } 149 dev_dbg(ice->card->dev, "snd_vt1724_ac97_ready: timeout\n"); 150 return old_cmd; 151 } 152 153 static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit) 154 { 155 int tm; 156 for (tm = 0; tm < 0x10000; tm++) 157 if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0) 158 return 0; 159 dev_dbg(ice->card->dev, "snd_vt1724_ac97_wait_bit: timeout\n"); 160 return -EIO; 161 } 162 163 static void snd_vt1724_ac97_write(struct snd_ac97 *ac97, 164 unsigned short reg, 165 unsigned short val) 166 { 167 struct snd_ice1712 *ice = ac97->private_data; 168 unsigned char old_cmd; 169 170 old_cmd = snd_vt1724_ac97_ready(ice); 171 old_cmd &= ~VT1724_AC97_ID_MASK; 172 old_cmd |= ac97->num; 173 outb(reg, ICEMT1724(ice, AC97_INDEX)); 174 outw(val, ICEMT1724(ice, AC97_DATA)); 175 outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD)); 176 snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE); 177 } 178 179 static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 180 { 181 struct snd_ice1712 *ice = ac97->private_data; 182 unsigned char old_cmd; 183 184 old_cmd = snd_vt1724_ac97_ready(ice); 185 old_cmd &= ~VT1724_AC97_ID_MASK; 186 old_cmd |= ac97->num; 187 outb(reg, ICEMT1724(ice, AC97_INDEX)); 188 outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD)); 189 if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0) 190 return ~0; 191 return inw(ICEMT1724(ice, AC97_DATA)); 192 } 193 194 195 /* 196 * GPIO operations 197 */ 198 199 /* set gpio direction 0 = read, 1 = write */ 200 static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 201 { 202 outl(data, ICEREG1724(ice, GPIO_DIRECTION)); 203 inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */ 204 } 205 206 /* get gpio direction 0 = read, 1 = write */ 207 static unsigned int snd_vt1724_get_gpio_dir(struct snd_ice1712 *ice) 208 { 209 return inl(ICEREG1724(ice, GPIO_DIRECTION)); 210 } 211 212 /* set the gpio mask (0 = writable) */ 213 static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 214 { 215 outw(data, ICEREG1724(ice, GPIO_WRITE_MASK)); 216 if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */ 217 outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22)); 218 inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */ 219 } 220 221 static unsigned int snd_vt1724_get_gpio_mask(struct snd_ice1712 *ice) 222 { 223 unsigned int mask; 224 if (!ice->vt1720) 225 mask = (unsigned int)inb(ICEREG1724(ice, GPIO_WRITE_MASK_22)); 226 else 227 mask = 0; 228 mask = (mask << 16) | inw(ICEREG1724(ice, GPIO_WRITE_MASK)); 229 return mask; 230 } 231 232 static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data) 233 { 234 outw(data, ICEREG1724(ice, GPIO_DATA)); 235 if (!ice->vt1720) 236 outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22)); 237 inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */ 238 } 239 240 static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice) 241 { 242 unsigned int data; 243 if (!ice->vt1720) 244 data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22)); 245 else 246 data = 0; 247 data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA)); 248 return data; 249 } 250 251 /* 252 * MIDI 253 */ 254 255 static void vt1724_midi_clear_rx(struct snd_ice1712 *ice) 256 { 257 unsigned int count; 258 259 for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count) 260 inb(ICEREG1724(ice, MPU_DATA)); 261 } 262 263 static inline struct snd_rawmidi_substream * 264 get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream) 265 { 266 return list_first_entry(&ice->rmidi[0]->streams[stream].substreams, 267 struct snd_rawmidi_substream, list); 268 } 269 270 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable); 271 272 static void vt1724_midi_write(struct snd_ice1712 *ice) 273 { 274 struct snd_rawmidi_substream *s; 275 int count, i; 276 u8 buffer[32]; 277 278 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT); 279 count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO)); 280 if (count > 0) { 281 count = snd_rawmidi_transmit(s, buffer, count); 282 for (i = 0; i < count; ++i) 283 outb(buffer[i], ICEREG1724(ice, MPU_DATA)); 284 } 285 /* mask irq when all bytes have been transmitted. 286 * enabled again in output_trigger when the new data comes in. 287 */ 288 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 289 !snd_rawmidi_transmit_empty(s)); 290 } 291 292 static void vt1724_midi_read(struct snd_ice1712 *ice) 293 { 294 struct snd_rawmidi_substream *s; 295 int count, i; 296 u8 buffer[32]; 297 298 s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT); 299 count = inb(ICEREG1724(ice, MPU_RXFIFO)); 300 if (count > 0) { 301 count = min(count, 32); 302 for (i = 0; i < count; ++i) 303 buffer[i] = inb(ICEREG1724(ice, MPU_DATA)); 304 snd_rawmidi_receive(s, buffer, count); 305 } 306 } 307 308 /* call with ice->reg_lock */ 309 static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable) 310 { 311 u8 mask = inb(ICEREG1724(ice, IRQMASK)); 312 if (enable) 313 mask &= ~flag; 314 else 315 mask |= flag; 316 outb(mask, ICEREG1724(ice, IRQMASK)); 317 } 318 319 static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream, 320 u8 flag, int enable) 321 { 322 struct snd_ice1712 *ice = substream->rmidi->private_data; 323 324 spin_lock_irq(&ice->reg_lock); 325 enable_midi_irq(ice, flag, enable); 326 spin_unlock_irq(&ice->reg_lock); 327 } 328 329 static int vt1724_midi_output_open(struct snd_rawmidi_substream *s) 330 { 331 return 0; 332 } 333 334 static int vt1724_midi_output_close(struct snd_rawmidi_substream *s) 335 { 336 return 0; 337 } 338 339 static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up) 340 { 341 struct snd_ice1712 *ice = s->rmidi->private_data; 342 unsigned long flags; 343 344 spin_lock_irqsave(&ice->reg_lock, flags); 345 if (up) { 346 ice->midi_output = 1; 347 vt1724_midi_write(ice); 348 } else { 349 ice->midi_output = 0; 350 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 351 } 352 spin_unlock_irqrestore(&ice->reg_lock, flags); 353 } 354 355 static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s) 356 { 357 struct snd_ice1712 *ice = s->rmidi->private_data; 358 unsigned long timeout; 359 360 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0); 361 /* 32 bytes should be transmitted in less than about 12 ms */ 362 timeout = jiffies + msecs_to_jiffies(15); 363 do { 364 if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY) 365 break; 366 schedule_timeout_uninterruptible(1); 367 } while (time_after(timeout, jiffies)); 368 } 369 370 static const struct snd_rawmidi_ops vt1724_midi_output_ops = { 371 .open = vt1724_midi_output_open, 372 .close = vt1724_midi_output_close, 373 .trigger = vt1724_midi_output_trigger, 374 .drain = vt1724_midi_output_drain, 375 }; 376 377 static int vt1724_midi_input_open(struct snd_rawmidi_substream *s) 378 { 379 vt1724_midi_clear_rx(s->rmidi->private_data); 380 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1); 381 return 0; 382 } 383 384 static int vt1724_midi_input_close(struct snd_rawmidi_substream *s) 385 { 386 vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0); 387 return 0; 388 } 389 390 static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up) 391 { 392 struct snd_ice1712 *ice = s->rmidi->private_data; 393 unsigned long flags; 394 395 spin_lock_irqsave(&ice->reg_lock, flags); 396 if (up) { 397 ice->midi_input = 1; 398 vt1724_midi_read(ice); 399 } else { 400 ice->midi_input = 0; 401 } 402 spin_unlock_irqrestore(&ice->reg_lock, flags); 403 } 404 405 static const struct snd_rawmidi_ops vt1724_midi_input_ops = { 406 .open = vt1724_midi_input_open, 407 .close = vt1724_midi_input_close, 408 .trigger = vt1724_midi_input_trigger, 409 }; 410 411 412 /* 413 * Interrupt handler 414 */ 415 416 static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id) 417 { 418 struct snd_ice1712 *ice = dev_id; 419 unsigned char status; 420 unsigned char status_mask = 421 VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM; 422 int handled = 0; 423 int timeout = 0; 424 425 while (1) { 426 status = inb(ICEREG1724(ice, IRQSTAT)); 427 status &= status_mask; 428 if (status == 0) 429 break; 430 spin_lock(&ice->reg_lock); 431 if (++timeout > 10) { 432 status = inb(ICEREG1724(ice, IRQSTAT)); 433 dev_err(ice->card->dev, 434 "Too long irq loop, status = 0x%x\n", status); 435 if (status & VT1724_IRQ_MPU_TX) { 436 dev_err(ice->card->dev, "Disabling MPU_TX\n"); 437 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 438 } 439 spin_unlock(&ice->reg_lock); 440 break; 441 } 442 handled = 1; 443 if (status & VT1724_IRQ_MPU_TX) { 444 if (ice->midi_output) 445 vt1724_midi_write(ice); 446 else 447 enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0); 448 /* Due to mysterical reasons, MPU_TX is always 449 * generated (and can't be cleared) when a PCM 450 * playback is going. So let's ignore at the 451 * next loop. 452 */ 453 status_mask &= ~VT1724_IRQ_MPU_TX; 454 } 455 if (status & VT1724_IRQ_MPU_RX) { 456 if (ice->midi_input) 457 vt1724_midi_read(ice); 458 else 459 vt1724_midi_clear_rx(ice); 460 } 461 /* ack MPU irq */ 462 outb(status, ICEREG1724(ice, IRQSTAT)); 463 spin_unlock(&ice->reg_lock); 464 if (status & VT1724_IRQ_MTPCM) { 465 /* 466 * Multi-track PCM 467 * PCM assignment are: 468 * Playback DMA0 (M/C) = playback_pro_substream 469 * Playback DMA1 = playback_con_substream_ds[0] 470 * Playback DMA2 = playback_con_substream_ds[1] 471 * Playback DMA3 = playback_con_substream_ds[2] 472 * Playback DMA4 (SPDIF) = playback_con_substream 473 * Record DMA0 = capture_pro_substream 474 * Record DMA1 = capture_con_substream 475 */ 476 unsigned char mtstat = inb(ICEMT1724(ice, IRQ)); 477 if (mtstat & VT1724_MULTI_PDMA0) { 478 if (ice->playback_pro_substream) 479 snd_pcm_period_elapsed(ice->playback_pro_substream); 480 } 481 if (mtstat & VT1724_MULTI_RDMA0) { 482 if (ice->capture_pro_substream) 483 snd_pcm_period_elapsed(ice->capture_pro_substream); 484 } 485 if (mtstat & VT1724_MULTI_PDMA1) { 486 if (ice->playback_con_substream_ds[0]) 487 snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]); 488 } 489 if (mtstat & VT1724_MULTI_PDMA2) { 490 if (ice->playback_con_substream_ds[1]) 491 snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]); 492 } 493 if (mtstat & VT1724_MULTI_PDMA3) { 494 if (ice->playback_con_substream_ds[2]) 495 snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]); 496 } 497 if (mtstat & VT1724_MULTI_PDMA4) { 498 if (ice->playback_con_substream) 499 snd_pcm_period_elapsed(ice->playback_con_substream); 500 } 501 if (mtstat & VT1724_MULTI_RDMA1) { 502 if (ice->capture_con_substream) 503 snd_pcm_period_elapsed(ice->capture_con_substream); 504 } 505 /* ack anyway to avoid freeze */ 506 outb(mtstat, ICEMT1724(ice, IRQ)); 507 /* ought to really handle this properly */ 508 if (mtstat & VT1724_MULTI_FIFO_ERR) { 509 unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR)); 510 outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR)); 511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK)); 512 /* If I don't do this, I get machine lockup due to continual interrupts */ 513 } 514 515 } 516 } 517 return IRQ_RETVAL(handled); 518 } 519 520 /* 521 * PCM code - professional part (multitrack) 522 */ 523 524 static const unsigned int rates[] = { 525 8000, 9600, 11025, 12000, 16000, 22050, 24000, 526 32000, 44100, 48000, 64000, 88200, 96000, 527 176400, 192000, 528 }; 529 530 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = { 531 .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */ 532 .list = rates, 533 .mask = 0, 534 }; 535 536 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = { 537 .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */ 538 .list = rates, 539 .mask = 0, 540 }; 541 542 static const struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = { 543 .count = ARRAY_SIZE(rates), 544 .list = rates, 545 .mask = 0, 546 }; 547 548 struct vt1724_pcm_reg { 549 unsigned int addr; /* ADDR register offset */ 550 unsigned int size; /* SIZE register offset */ 551 unsigned int count; /* COUNT register offset */ 552 unsigned int start; /* start & pause bit */ 553 }; 554 555 static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd) 556 { 557 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 558 unsigned char what; 559 unsigned char old; 560 struct snd_pcm_substream *s; 561 562 what = 0; 563 snd_pcm_group_for_each_entry(s, substream) { 564 if (snd_pcm_substream_chip(s) == ice) { 565 const struct vt1724_pcm_reg *reg; 566 reg = s->runtime->private_data; 567 what |= reg->start; 568 snd_pcm_trigger_done(s, substream); 569 } 570 } 571 572 switch (cmd) { 573 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 574 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 575 spin_lock(&ice->reg_lock); 576 old = inb(ICEMT1724(ice, DMA_PAUSE)); 577 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 578 old |= what; 579 else 580 old &= ~what; 581 outb(old, ICEMT1724(ice, DMA_PAUSE)); 582 spin_unlock(&ice->reg_lock); 583 break; 584 585 case SNDRV_PCM_TRIGGER_START: 586 case SNDRV_PCM_TRIGGER_STOP: 587 case SNDRV_PCM_TRIGGER_SUSPEND: 588 spin_lock(&ice->reg_lock); 589 old = inb(ICEMT1724(ice, DMA_CONTROL)); 590 if (cmd == SNDRV_PCM_TRIGGER_START) 591 old |= what; 592 else 593 old &= ~what; 594 outb(old, ICEMT1724(ice, DMA_CONTROL)); 595 spin_unlock(&ice->reg_lock); 596 break; 597 598 case SNDRV_PCM_TRIGGER_RESUME: 599 /* apps will have to restart stream */ 600 break; 601 602 default: 603 return -EINVAL; 604 } 605 return 0; 606 } 607 608 /* 609 */ 610 611 #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\ 612 VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START) 613 #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\ 614 VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE) 615 616 static const unsigned int stdclock_rate_list[16] = { 617 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100, 618 22050, 11025, 88200, 176400, 0, 192000, 64000 619 }; 620 621 static unsigned int stdclock_get_rate(struct snd_ice1712 *ice) 622 { 623 return stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15]; 624 } 625 626 static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate) 627 { 628 int i; 629 for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) { 630 if (stdclock_rate_list[i] == rate) { 631 outb(i, ICEMT1724(ice, RATE)); 632 return; 633 } 634 } 635 } 636 637 static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice, 638 unsigned int rate) 639 { 640 unsigned char val, old; 641 /* check MT02 */ 642 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 643 val = old = inb(ICEMT1724(ice, I2S_FORMAT)); 644 if (rate > 96000) 645 val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */ 646 else 647 val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */ 648 if (val != old) { 649 outb(val, ICEMT1724(ice, I2S_FORMAT)); 650 /* master clock changed */ 651 return 1; 652 } 653 } 654 /* no change in master clock */ 655 return 0; 656 } 657 658 static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, 659 int force) 660 { 661 unsigned long flags; 662 unsigned char mclk_change; 663 unsigned int i, old_rate; 664 665 if (rate > ice->hw_rates->list[ice->hw_rates->count - 1]) 666 return -EINVAL; 667 668 spin_lock_irqsave(&ice->reg_lock, flags); 669 if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) || 670 (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) { 671 /* running? we cannot change the rate now... */ 672 spin_unlock_irqrestore(&ice->reg_lock, flags); 673 return ((rate == ice->cur_rate) && !force) ? 0 : -EBUSY; 674 } 675 if (!force && is_pro_rate_locked(ice)) { 676 /* comparing required and current rate - makes sense for 677 * internal clock only */ 678 spin_unlock_irqrestore(&ice->reg_lock, flags); 679 return (rate == ice->cur_rate) ? 0 : -EBUSY; 680 } 681 682 if (force || !ice->is_spdif_master(ice)) { 683 /* force means the rate was switched by ucontrol, otherwise 684 * setting clock rate for internal clock mode */ 685 old_rate = ice->get_rate(ice); 686 if (force || (old_rate != rate)) 687 ice->set_rate(ice, rate); 688 else if (rate == ice->cur_rate) { 689 spin_unlock_irqrestore(&ice->reg_lock, flags); 690 return 0; 691 } 692 } 693 694 ice->cur_rate = rate; 695 696 /* setting master clock */ 697 mclk_change = ice->set_mclk(ice, rate); 698 699 spin_unlock_irqrestore(&ice->reg_lock, flags); 700 701 if (mclk_change && ice->gpio.i2s_mclk_changed) 702 ice->gpio.i2s_mclk_changed(ice); 703 if (ice->gpio.set_pro_rate) 704 ice->gpio.set_pro_rate(ice, rate); 705 706 /* set up codecs */ 707 for (i = 0; i < ice->akm_codecs; i++) { 708 if (ice->akm[i].ops.set_rate_val) 709 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 710 } 711 if (ice->spdif.ops.setup_rate) 712 ice->spdif.ops.setup_rate(ice, rate); 713 714 return 0; 715 } 716 717 static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream, 718 struct snd_pcm_hw_params *hw_params) 719 { 720 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 721 int i, chs, err; 722 723 chs = params_channels(hw_params); 724 mutex_lock(&ice->open_mutex); 725 /* mark surround channels */ 726 if (substream == ice->playback_pro_substream) { 727 /* PDMA0 can be multi-channel up to 8 */ 728 chs = chs / 2 - 1; 729 for (i = 0; i < chs; i++) { 730 if (ice->pcm_reserved[i] && 731 ice->pcm_reserved[i] != substream) { 732 mutex_unlock(&ice->open_mutex); 733 return -EBUSY; 734 } 735 ice->pcm_reserved[i] = substream; 736 } 737 for (; i < 3; i++) { 738 if (ice->pcm_reserved[i] == substream) 739 ice->pcm_reserved[i] = NULL; 740 } 741 } else { 742 for (i = 0; i < 3; i++) { 743 /* check individual playback stream */ 744 if (ice->playback_con_substream_ds[i] == substream) { 745 if (ice->pcm_reserved[i] && 746 ice->pcm_reserved[i] != substream) { 747 mutex_unlock(&ice->open_mutex); 748 return -EBUSY; 749 } 750 ice->pcm_reserved[i] = substream; 751 break; 752 } 753 } 754 } 755 mutex_unlock(&ice->open_mutex); 756 757 err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0); 758 if (err < 0) 759 return err; 760 761 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 762 } 763 764 static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream) 765 { 766 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 767 int i; 768 769 mutex_lock(&ice->open_mutex); 770 /* unmark surround channels */ 771 for (i = 0; i < 3; i++) 772 if (ice->pcm_reserved[i] == substream) 773 ice->pcm_reserved[i] = NULL; 774 mutex_unlock(&ice->open_mutex); 775 return snd_pcm_lib_free_pages(substream); 776 } 777 778 static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream) 779 { 780 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 781 unsigned char val; 782 unsigned int size; 783 784 spin_lock_irq(&ice->reg_lock); 785 val = (8 - substream->runtime->channels) >> 1; 786 outb(val, ICEMT1724(ice, BURST)); 787 788 outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR)); 789 790 size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1; 791 /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */ 792 outw(size, ICEMT1724(ice, PLAYBACK_SIZE)); 793 outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2); 794 size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 795 /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */ 796 outw(size, ICEMT1724(ice, PLAYBACK_COUNT)); 797 outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2); 798 799 spin_unlock_irq(&ice->reg_lock); 800 801 /* 802 dev_dbg(ice->card->dev, "pro prepare: ch = %d, addr = 0x%x, " 803 "buffer = 0x%x, period = 0x%x\n", 804 substream->runtime->channels, 805 (unsigned int)substream->runtime->dma_addr, 806 snd_pcm_lib_buffer_bytes(substream), 807 snd_pcm_lib_period_bytes(substream)); 808 */ 809 return 0; 810 } 811 812 static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream) 813 { 814 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 815 size_t ptr; 816 817 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START)) 818 return 0; 819 #if 0 /* read PLAYBACK_ADDR */ 820 ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR)); 821 if (ptr < substream->runtime->dma_addr) { 822 dev_dbg(ice->card->dev, "invalid negative ptr\n"); 823 return 0; 824 } 825 ptr -= substream->runtime->dma_addr; 826 ptr = bytes_to_frames(substream->runtime, ptr); 827 if (ptr >= substream->runtime->buffer_size) { 828 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 829 (int)ptr, (int)substream->runtime->period_size); 830 return 0; 831 } 832 #else /* read PLAYBACK_SIZE */ 833 ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff; 834 ptr = (ptr + 1) << 2; 835 ptr = bytes_to_frames(substream->runtime, ptr); 836 if (!ptr) 837 ; 838 else if (ptr <= substream->runtime->buffer_size) 839 ptr = substream->runtime->buffer_size - ptr; 840 else { 841 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 842 (int)ptr, (int)substream->runtime->buffer_size); 843 ptr = 0; 844 } 845 #endif 846 return ptr; 847 } 848 849 static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream) 850 { 851 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 852 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 853 854 spin_lock_irq(&ice->reg_lock); 855 outl(substream->runtime->dma_addr, ice->profi_port + reg->addr); 856 outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1, 857 ice->profi_port + reg->size); 858 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, 859 ice->profi_port + reg->count); 860 spin_unlock_irq(&ice->reg_lock); 861 return 0; 862 } 863 864 static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream) 865 { 866 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 867 const struct vt1724_pcm_reg *reg = substream->runtime->private_data; 868 size_t ptr; 869 870 if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start)) 871 return 0; 872 #if 0 /* use ADDR register */ 873 ptr = inl(ice->profi_port + reg->addr); 874 ptr -= substream->runtime->dma_addr; 875 return bytes_to_frames(substream->runtime, ptr); 876 #else /* use SIZE register */ 877 ptr = inw(ice->profi_port + reg->size); 878 ptr = (ptr + 1) << 2; 879 ptr = bytes_to_frames(substream->runtime, ptr); 880 if (!ptr) 881 ; 882 else if (ptr <= substream->runtime->buffer_size) 883 ptr = substream->runtime->buffer_size - ptr; 884 else { 885 dev_dbg(ice->card->dev, "invalid ptr %d (size=%d)\n", 886 (int)ptr, (int)substream->runtime->buffer_size); 887 ptr = 0; 888 } 889 return ptr; 890 #endif 891 } 892 893 static const struct vt1724_pcm_reg vt1724_pdma0_reg = { 894 .addr = VT1724_MT_PLAYBACK_ADDR, 895 .size = VT1724_MT_PLAYBACK_SIZE, 896 .count = VT1724_MT_PLAYBACK_COUNT, 897 .start = VT1724_PDMA0_START, 898 }; 899 900 static const struct vt1724_pcm_reg vt1724_pdma4_reg = { 901 .addr = VT1724_MT_PDMA4_ADDR, 902 .size = VT1724_MT_PDMA4_SIZE, 903 .count = VT1724_MT_PDMA4_COUNT, 904 .start = VT1724_PDMA4_START, 905 }; 906 907 static const struct vt1724_pcm_reg vt1724_rdma0_reg = { 908 .addr = VT1724_MT_CAPTURE_ADDR, 909 .size = VT1724_MT_CAPTURE_SIZE, 910 .count = VT1724_MT_CAPTURE_COUNT, 911 .start = VT1724_RDMA0_START, 912 }; 913 914 static const struct vt1724_pcm_reg vt1724_rdma1_reg = { 915 .addr = VT1724_MT_RDMA1_ADDR, 916 .size = VT1724_MT_RDMA1_SIZE, 917 .count = VT1724_MT_RDMA1_COUNT, 918 .start = VT1724_RDMA1_START, 919 }; 920 921 #define vt1724_playback_pro_reg vt1724_pdma0_reg 922 #define vt1724_playback_spdif_reg vt1724_pdma4_reg 923 #define vt1724_capture_pro_reg vt1724_rdma0_reg 924 #define vt1724_capture_spdif_reg vt1724_rdma1_reg 925 926 static const struct snd_pcm_hardware snd_vt1724_playback_pro = { 927 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 928 SNDRV_PCM_INFO_BLOCK_TRANSFER | 929 SNDRV_PCM_INFO_MMAP_VALID | 930 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 931 .formats = SNDRV_PCM_FMTBIT_S32_LE, 932 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 933 .rate_min = 8000, 934 .rate_max = 192000, 935 .channels_min = 2, 936 .channels_max = 8, 937 .buffer_bytes_max = (1UL << 21), /* 19bits dword */ 938 .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */ 939 .period_bytes_max = (1UL << 21), 940 .periods_min = 2, 941 .periods_max = 1024, 942 }; 943 944 static const struct snd_pcm_hardware snd_vt1724_spdif = { 945 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 946 SNDRV_PCM_INFO_BLOCK_TRANSFER | 947 SNDRV_PCM_INFO_MMAP_VALID | 948 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 949 .formats = SNDRV_PCM_FMTBIT_S32_LE, 950 .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100| 951 SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200| 952 SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400| 953 SNDRV_PCM_RATE_192000), 954 .rate_min = 32000, 955 .rate_max = 192000, 956 .channels_min = 2, 957 .channels_max = 2, 958 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 959 .period_bytes_min = 2 * 4 * 2, 960 .period_bytes_max = (1UL << 18), 961 .periods_min = 2, 962 .periods_max = 1024, 963 }; 964 965 static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = { 966 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 967 SNDRV_PCM_INFO_BLOCK_TRANSFER | 968 SNDRV_PCM_INFO_MMAP_VALID | 969 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 970 .formats = SNDRV_PCM_FMTBIT_S32_LE, 971 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000, 972 .rate_min = 8000, 973 .rate_max = 192000, 974 .channels_min = 2, 975 .channels_max = 2, 976 .buffer_bytes_max = (1UL << 18), /* 16bits dword */ 977 .period_bytes_min = 2 * 4 * 2, 978 .period_bytes_max = (1UL << 18), 979 .periods_min = 2, 980 .periods_max = 1024, 981 }; 982 983 /* 984 * set rate constraints 985 */ 986 static void set_std_hw_rates(struct snd_ice1712 *ice) 987 { 988 if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) { 989 /* I2S */ 990 /* VT1720 doesn't support more than 96kHz */ 991 if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720) 992 ice->hw_rates = &hw_constraints_rates_192; 993 else 994 ice->hw_rates = &hw_constraints_rates_96; 995 } else { 996 /* ACLINK */ 997 ice->hw_rates = &hw_constraints_rates_48; 998 } 999 } 1000 1001 static int set_rate_constraints(struct snd_ice1712 *ice, 1002 struct snd_pcm_substream *substream) 1003 { 1004 struct snd_pcm_runtime *runtime = substream->runtime; 1005 1006 runtime->hw.rate_min = ice->hw_rates->list[0]; 1007 runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1]; 1008 runtime->hw.rates = SNDRV_PCM_RATE_KNOT; 1009 return snd_pcm_hw_constraint_list(runtime, 0, 1010 SNDRV_PCM_HW_PARAM_RATE, 1011 ice->hw_rates); 1012 } 1013 1014 /* if the card has the internal rate locked (is_pro_locked), limit runtime 1015 hw rates to the current internal rate only. 1016 */ 1017 static void constrain_rate_if_locked(struct snd_pcm_substream *substream) 1018 { 1019 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1020 struct snd_pcm_runtime *runtime = substream->runtime; 1021 unsigned int rate; 1022 if (is_pro_rate_locked(ice)) { 1023 rate = ice->get_rate(ice); 1024 if (rate >= runtime->hw.rate_min 1025 && rate <= runtime->hw.rate_max) { 1026 runtime->hw.rate_min = rate; 1027 runtime->hw.rate_max = rate; 1028 } 1029 } 1030 } 1031 1032 1033 /* multi-channel playback needs alignment 8x32bit regardless of the channels 1034 * actually used 1035 */ 1036 #define VT1724_BUFFER_ALIGN 0x20 1037 1038 static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream) 1039 { 1040 struct snd_pcm_runtime *runtime = substream->runtime; 1041 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1042 int chs, num_indeps; 1043 1044 runtime->private_data = (void *)&vt1724_playback_pro_reg; 1045 ice->playback_pro_substream = substream; 1046 runtime->hw = snd_vt1724_playback_pro; 1047 snd_pcm_set_sync(substream); 1048 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1049 set_rate_constraints(ice, substream); 1050 mutex_lock(&ice->open_mutex); 1051 /* calculate the currently available channels */ 1052 num_indeps = ice->num_total_dacs / 2 - 1; 1053 for (chs = 0; chs < num_indeps; chs++) { 1054 if (ice->pcm_reserved[chs]) 1055 break; 1056 } 1057 chs = (chs + 1) * 2; 1058 runtime->hw.channels_max = chs; 1059 if (chs > 2) /* channels must be even */ 1060 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1061 mutex_unlock(&ice->open_mutex); 1062 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1063 VT1724_BUFFER_ALIGN); 1064 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1065 VT1724_BUFFER_ALIGN); 1066 constrain_rate_if_locked(substream); 1067 if (ice->pro_open) 1068 ice->pro_open(ice, substream); 1069 return 0; 1070 } 1071 1072 static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream) 1073 { 1074 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1075 struct snd_pcm_runtime *runtime = substream->runtime; 1076 1077 runtime->private_data = (void *)&vt1724_capture_pro_reg; 1078 ice->capture_pro_substream = substream; 1079 runtime->hw = snd_vt1724_2ch_stereo; 1080 snd_pcm_set_sync(substream); 1081 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1082 set_rate_constraints(ice, substream); 1083 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1084 VT1724_BUFFER_ALIGN); 1085 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1086 VT1724_BUFFER_ALIGN); 1087 constrain_rate_if_locked(substream); 1088 if (ice->pro_open) 1089 ice->pro_open(ice, substream); 1090 return 0; 1091 } 1092 1093 static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream) 1094 { 1095 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1096 1097 if (PRO_RATE_RESET) 1098 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1099 ice->playback_pro_substream = NULL; 1100 1101 return 0; 1102 } 1103 1104 static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream) 1105 { 1106 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1107 1108 if (PRO_RATE_RESET) 1109 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1110 ice->capture_pro_substream = NULL; 1111 return 0; 1112 } 1113 1114 static const struct snd_pcm_ops snd_vt1724_playback_pro_ops = { 1115 .open = snd_vt1724_playback_pro_open, 1116 .close = snd_vt1724_playback_pro_close, 1117 .ioctl = snd_pcm_lib_ioctl, 1118 .hw_params = snd_vt1724_pcm_hw_params, 1119 .hw_free = snd_vt1724_pcm_hw_free, 1120 .prepare = snd_vt1724_playback_pro_prepare, 1121 .trigger = snd_vt1724_pcm_trigger, 1122 .pointer = snd_vt1724_playback_pro_pointer, 1123 }; 1124 1125 static const struct snd_pcm_ops snd_vt1724_capture_pro_ops = { 1126 .open = snd_vt1724_capture_pro_open, 1127 .close = snd_vt1724_capture_pro_close, 1128 .ioctl = snd_pcm_lib_ioctl, 1129 .hw_params = snd_vt1724_pcm_hw_params, 1130 .hw_free = snd_vt1724_pcm_hw_free, 1131 .prepare = snd_vt1724_pcm_prepare, 1132 .trigger = snd_vt1724_pcm_trigger, 1133 .pointer = snd_vt1724_pcm_pointer, 1134 }; 1135 1136 static int snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device) 1137 { 1138 struct snd_pcm *pcm; 1139 int capt, err; 1140 1141 if ((ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_ADC_MASK) == 1142 VT1724_CFG_ADC_NONE) 1143 capt = 0; 1144 else 1145 capt = 1; 1146 err = snd_pcm_new(ice->card, "ICE1724", device, 1, capt, &pcm); 1147 if (err < 0) 1148 return err; 1149 1150 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops); 1151 if (capt) 1152 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1153 &snd_vt1724_capture_pro_ops); 1154 1155 pcm->private_data = ice; 1156 pcm->info_flags = 0; 1157 strcpy(pcm->name, "ICE1724"); 1158 1159 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1160 snd_dma_pci_data(ice->pci), 1161 256*1024, 256*1024); 1162 1163 ice->pcm_pro = pcm; 1164 1165 return 0; 1166 } 1167 1168 1169 /* 1170 * SPDIF PCM 1171 */ 1172 1173 /* update spdif control bits; call with reg_lock */ 1174 static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val) 1175 { 1176 unsigned char cbit, disabled; 1177 1178 cbit = inb(ICEREG1724(ice, SPDIF_CFG)); 1179 disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN; 1180 if (cbit != disabled) 1181 outb(disabled, ICEREG1724(ice, SPDIF_CFG)); 1182 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1183 if (cbit != disabled) 1184 outb(cbit, ICEREG1724(ice, SPDIF_CFG)); 1185 outw(val, ICEMT1724(ice, SPDIF_CTRL)); 1186 } 1187 1188 /* update SPDIF control bits according to the given rate */ 1189 static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate) 1190 { 1191 unsigned int val, nval; 1192 unsigned long flags; 1193 1194 spin_lock_irqsave(&ice->reg_lock, flags); 1195 nval = val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1196 nval &= ~(7 << 12); 1197 switch (rate) { 1198 case 44100: break; 1199 case 48000: nval |= 2 << 12; break; 1200 case 32000: nval |= 3 << 12; break; 1201 case 88200: nval |= 4 << 12; break; 1202 case 96000: nval |= 5 << 12; break; 1203 case 192000: nval |= 6 << 12; break; 1204 case 176400: nval |= 7 << 12; break; 1205 } 1206 if (val != nval) 1207 update_spdif_bits(ice, nval); 1208 spin_unlock_irqrestore(&ice->reg_lock, flags); 1209 } 1210 1211 static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream) 1212 { 1213 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1214 if (!ice->force_pdma4) 1215 update_spdif_rate(ice, substream->runtime->rate); 1216 return snd_vt1724_pcm_prepare(substream); 1217 } 1218 1219 static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream) 1220 { 1221 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1222 struct snd_pcm_runtime *runtime = substream->runtime; 1223 1224 runtime->private_data = (void *)&vt1724_playback_spdif_reg; 1225 ice->playback_con_substream = substream; 1226 if (ice->force_pdma4) { 1227 runtime->hw = snd_vt1724_2ch_stereo; 1228 set_rate_constraints(ice, substream); 1229 } else 1230 runtime->hw = snd_vt1724_spdif; 1231 snd_pcm_set_sync(substream); 1232 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1233 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1234 VT1724_BUFFER_ALIGN); 1235 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1236 VT1724_BUFFER_ALIGN); 1237 constrain_rate_if_locked(substream); 1238 if (ice->spdif.ops.open) 1239 ice->spdif.ops.open(ice, substream); 1240 return 0; 1241 } 1242 1243 static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream) 1244 { 1245 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1246 1247 if (PRO_RATE_RESET) 1248 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1249 ice->playback_con_substream = NULL; 1250 if (ice->spdif.ops.close) 1251 ice->spdif.ops.close(ice, substream); 1252 1253 return 0; 1254 } 1255 1256 static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream) 1257 { 1258 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1259 struct snd_pcm_runtime *runtime = substream->runtime; 1260 1261 runtime->private_data = (void *)&vt1724_capture_spdif_reg; 1262 ice->capture_con_substream = substream; 1263 if (ice->force_rdma1) { 1264 runtime->hw = snd_vt1724_2ch_stereo; 1265 set_rate_constraints(ice, substream); 1266 } else 1267 runtime->hw = snd_vt1724_spdif; 1268 snd_pcm_set_sync(substream); 1269 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1270 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 1271 VT1724_BUFFER_ALIGN); 1272 snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 1273 VT1724_BUFFER_ALIGN); 1274 constrain_rate_if_locked(substream); 1275 if (ice->spdif.ops.open) 1276 ice->spdif.ops.open(ice, substream); 1277 return 0; 1278 } 1279 1280 static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream) 1281 { 1282 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1283 1284 if (PRO_RATE_RESET) 1285 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1286 ice->capture_con_substream = NULL; 1287 if (ice->spdif.ops.close) 1288 ice->spdif.ops.close(ice, substream); 1289 1290 return 0; 1291 } 1292 1293 static const struct snd_pcm_ops snd_vt1724_playback_spdif_ops = { 1294 .open = snd_vt1724_playback_spdif_open, 1295 .close = snd_vt1724_playback_spdif_close, 1296 .ioctl = snd_pcm_lib_ioctl, 1297 .hw_params = snd_vt1724_pcm_hw_params, 1298 .hw_free = snd_vt1724_pcm_hw_free, 1299 .prepare = snd_vt1724_playback_spdif_prepare, 1300 .trigger = snd_vt1724_pcm_trigger, 1301 .pointer = snd_vt1724_pcm_pointer, 1302 }; 1303 1304 static const struct snd_pcm_ops snd_vt1724_capture_spdif_ops = { 1305 .open = snd_vt1724_capture_spdif_open, 1306 .close = snd_vt1724_capture_spdif_close, 1307 .ioctl = snd_pcm_lib_ioctl, 1308 .hw_params = snd_vt1724_pcm_hw_params, 1309 .hw_free = snd_vt1724_pcm_hw_free, 1310 .prepare = snd_vt1724_pcm_prepare, 1311 .trigger = snd_vt1724_pcm_trigger, 1312 .pointer = snd_vt1724_pcm_pointer, 1313 }; 1314 1315 1316 static int snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device) 1317 { 1318 char *name; 1319 struct snd_pcm *pcm; 1320 int play, capt; 1321 int err; 1322 1323 if (ice->force_pdma4 || 1324 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) { 1325 play = 1; 1326 ice->has_spdif = 1; 1327 } else 1328 play = 0; 1329 if (ice->force_rdma1 || 1330 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) { 1331 capt = 1; 1332 ice->has_spdif = 1; 1333 } else 1334 capt = 0; 1335 if (!play && !capt) 1336 return 0; /* no spdif device */ 1337 1338 if (ice->force_pdma4 || ice->force_rdma1) 1339 name = "ICE1724 Secondary"; 1340 else 1341 name = "ICE1724 IEC958"; 1342 err = snd_pcm_new(ice->card, name, device, play, capt, &pcm); 1343 if (err < 0) 1344 return err; 1345 1346 if (play) 1347 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1348 &snd_vt1724_playback_spdif_ops); 1349 if (capt) 1350 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, 1351 &snd_vt1724_capture_spdif_ops); 1352 1353 pcm->private_data = ice; 1354 pcm->info_flags = 0; 1355 strcpy(pcm->name, name); 1356 1357 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1358 snd_dma_pci_data(ice->pci), 1359 256*1024, 256*1024); 1360 1361 ice->pcm = pcm; 1362 1363 return 0; 1364 } 1365 1366 1367 /* 1368 * independent surround PCMs 1369 */ 1370 1371 static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = { 1372 { 1373 .addr = VT1724_MT_PDMA1_ADDR, 1374 .size = VT1724_MT_PDMA1_SIZE, 1375 .count = VT1724_MT_PDMA1_COUNT, 1376 .start = VT1724_PDMA1_START, 1377 }, 1378 { 1379 .addr = VT1724_MT_PDMA2_ADDR, 1380 .size = VT1724_MT_PDMA2_SIZE, 1381 .count = VT1724_MT_PDMA2_COUNT, 1382 .start = VT1724_PDMA2_START, 1383 }, 1384 { 1385 .addr = VT1724_MT_PDMA3_ADDR, 1386 .size = VT1724_MT_PDMA3_SIZE, 1387 .count = VT1724_MT_PDMA3_COUNT, 1388 .start = VT1724_PDMA3_START, 1389 }, 1390 }; 1391 1392 static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream) 1393 { 1394 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1395 unsigned char val; 1396 1397 spin_lock_irq(&ice->reg_lock); 1398 val = 3 - substream->number; 1399 if (inb(ICEMT1724(ice, BURST)) < val) 1400 outb(val, ICEMT1724(ice, BURST)); 1401 spin_unlock_irq(&ice->reg_lock); 1402 return snd_vt1724_pcm_prepare(substream); 1403 } 1404 1405 static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream) 1406 { 1407 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1408 struct snd_pcm_runtime *runtime = substream->runtime; 1409 1410 mutex_lock(&ice->open_mutex); 1411 /* already used by PDMA0? */ 1412 if (ice->pcm_reserved[substream->number]) { 1413 mutex_unlock(&ice->open_mutex); 1414 return -EBUSY; /* FIXME: should handle blocking mode properly */ 1415 } 1416 mutex_unlock(&ice->open_mutex); 1417 runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number]; 1418 ice->playback_con_substream_ds[substream->number] = substream; 1419 runtime->hw = snd_vt1724_2ch_stereo; 1420 snd_pcm_set_sync(substream); 1421 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1422 set_rate_constraints(ice, substream); 1423 return 0; 1424 } 1425 1426 static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream) 1427 { 1428 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1429 1430 if (PRO_RATE_RESET) 1431 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0); 1432 ice->playback_con_substream_ds[substream->number] = NULL; 1433 ice->pcm_reserved[substream->number] = NULL; 1434 1435 return 0; 1436 } 1437 1438 static const struct snd_pcm_ops snd_vt1724_playback_indep_ops = { 1439 .open = snd_vt1724_playback_indep_open, 1440 .close = snd_vt1724_playback_indep_close, 1441 .ioctl = snd_pcm_lib_ioctl, 1442 .hw_params = snd_vt1724_pcm_hw_params, 1443 .hw_free = snd_vt1724_pcm_hw_free, 1444 .prepare = snd_vt1724_playback_indep_prepare, 1445 .trigger = snd_vt1724_pcm_trigger, 1446 .pointer = snd_vt1724_pcm_pointer, 1447 }; 1448 1449 1450 static int snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device) 1451 { 1452 struct snd_pcm *pcm; 1453 int play; 1454 int err; 1455 1456 play = ice->num_total_dacs / 2 - 1; 1457 if (play <= 0) 1458 return 0; 1459 1460 err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm); 1461 if (err < 0) 1462 return err; 1463 1464 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, 1465 &snd_vt1724_playback_indep_ops); 1466 1467 pcm->private_data = ice; 1468 pcm->info_flags = 0; 1469 strcpy(pcm->name, "ICE1724 Surround PCM"); 1470 1471 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1472 snd_dma_pci_data(ice->pci), 1473 256*1024, 256*1024); 1474 1475 ice->pcm_ds = pcm; 1476 1477 return 0; 1478 } 1479 1480 1481 /* 1482 * Mixer section 1483 */ 1484 1485 static int snd_vt1724_ac97_mixer(struct snd_ice1712 *ice) 1486 { 1487 int err; 1488 1489 if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) { 1490 struct snd_ac97_bus *pbus; 1491 struct snd_ac97_template ac97; 1492 static struct snd_ac97_bus_ops ops = { 1493 .write = snd_vt1724_ac97_write, 1494 .read = snd_vt1724_ac97_read, 1495 }; 1496 1497 /* cold reset */ 1498 outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD)); 1499 mdelay(5); /* FIXME */ 1500 outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD)); 1501 1502 err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus); 1503 if (err < 0) 1504 return err; 1505 memset(&ac97, 0, sizeof(ac97)); 1506 ac97.private_data = ice; 1507 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1508 if (err < 0) 1509 dev_warn(ice->card->dev, 1510 "cannot initialize pro ac97, skipped\n"); 1511 else 1512 return 0; 1513 } 1514 /* I2S mixer only */ 1515 strcat(ice->card->mixername, "ICE1724 - multitrack"); 1516 return 0; 1517 } 1518 1519 /* 1520 * 1521 */ 1522 1523 static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx) 1524 { 1525 return (unsigned int)ice->eeprom.data[idx] | \ 1526 ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \ 1527 ((unsigned int)ice->eeprom.data[idx + 2] << 16); 1528 } 1529 1530 static void snd_vt1724_proc_read(struct snd_info_entry *entry, 1531 struct snd_info_buffer *buffer) 1532 { 1533 struct snd_ice1712 *ice = entry->private_data; 1534 unsigned int idx; 1535 1536 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1537 snd_iprintf(buffer, "EEPROM:\n"); 1538 1539 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1540 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1541 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1542 snd_iprintf(buffer, " System Config : 0x%x\n", 1543 ice->eeprom.data[ICE_EEP2_SYSCONF]); 1544 snd_iprintf(buffer, " ACLink : 0x%x\n", 1545 ice->eeprom.data[ICE_EEP2_ACLINK]); 1546 snd_iprintf(buffer, " I2S : 0x%x\n", 1547 ice->eeprom.data[ICE_EEP2_I2S]); 1548 snd_iprintf(buffer, " S/PDIF : 0x%x\n", 1549 ice->eeprom.data[ICE_EEP2_SPDIF]); 1550 snd_iprintf(buffer, " GPIO direction : 0x%x\n", 1551 ice->eeprom.gpiodir); 1552 snd_iprintf(buffer, " GPIO mask : 0x%x\n", 1553 ice->eeprom.gpiomask); 1554 snd_iprintf(buffer, " GPIO state : 0x%x\n", 1555 ice->eeprom.gpiostate); 1556 for (idx = 0x12; idx < ice->eeprom.size; idx++) 1557 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", 1558 idx, ice->eeprom.data[idx]); 1559 1560 snd_iprintf(buffer, "\nRegisters:\n"); 1561 1562 snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n", 1563 (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK))); 1564 for (idx = 0x0; idx < 0x20 ; idx++) 1565 snd_iprintf(buffer, " CCS%02x : 0x%02x\n", 1566 idx, inb(ice->port+idx)); 1567 for (idx = 0x0; idx < 0x30 ; idx++) 1568 snd_iprintf(buffer, " MT%02x : 0x%02x\n", 1569 idx, inb(ice->profi_port+idx)); 1570 } 1571 1572 static void snd_vt1724_proc_init(struct snd_ice1712 *ice) 1573 { 1574 struct snd_info_entry *entry; 1575 1576 if (!snd_card_proc_new(ice->card, "ice1724", &entry)) 1577 snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read); 1578 } 1579 1580 /* 1581 * 1582 */ 1583 1584 static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol, 1585 struct snd_ctl_elem_info *uinfo) 1586 { 1587 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1588 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1589 return 0; 1590 } 1591 1592 static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol, 1593 struct snd_ctl_elem_value *ucontrol) 1594 { 1595 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1596 1597 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1598 return 0; 1599 } 1600 1601 static const struct snd_kcontrol_new snd_vt1724_eeprom = { 1602 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1603 .name = "ICE1724 EEPROM", 1604 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1605 .info = snd_vt1724_eeprom_info, 1606 .get = snd_vt1724_eeprom_get 1607 }; 1608 1609 /* 1610 */ 1611 static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol, 1612 struct snd_ctl_elem_info *uinfo) 1613 { 1614 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1615 uinfo->count = 1; 1616 return 0; 1617 } 1618 1619 static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga) 1620 { 1621 unsigned int val, rbits; 1622 1623 val = diga->status[0] & 0x03; /* professional, non-audio */ 1624 if (val & 0x01) { 1625 /* professional */ 1626 if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) == 1627 IEC958_AES0_PRO_EMPHASIS_5015) 1628 val |= 1U << 3; 1629 rbits = (diga->status[4] >> 3) & 0x0f; 1630 if (rbits) { 1631 switch (rbits) { 1632 case 2: val |= 5 << 12; break; /* 96k */ 1633 case 3: val |= 6 << 12; break; /* 192k */ 1634 case 10: val |= 4 << 12; break; /* 88.2k */ 1635 case 11: val |= 7 << 12; break; /* 176.4k */ 1636 } 1637 } else { 1638 switch (diga->status[0] & IEC958_AES0_PRO_FS) { 1639 case IEC958_AES0_PRO_FS_44100: 1640 break; 1641 case IEC958_AES0_PRO_FS_32000: 1642 val |= 3U << 12; 1643 break; 1644 default: 1645 val |= 2U << 12; 1646 break; 1647 } 1648 } 1649 } else { 1650 /* consumer */ 1651 val |= diga->status[1] & 0x04; /* copyright */ 1652 if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) == 1653 IEC958_AES0_CON_EMPHASIS_5015) 1654 val |= 1U << 3; 1655 val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */ 1656 val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */ 1657 } 1658 return val; 1659 } 1660 1661 static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val) 1662 { 1663 memset(diga->status, 0, sizeof(diga->status)); 1664 diga->status[0] = val & 0x03; /* professional, non-audio */ 1665 if (val & 0x01) { 1666 /* professional */ 1667 if (val & (1U << 3)) 1668 diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015; 1669 switch ((val >> 12) & 0x7) { 1670 case 0: 1671 break; 1672 case 2: 1673 diga->status[0] |= IEC958_AES0_PRO_FS_32000; 1674 break; 1675 default: 1676 diga->status[0] |= IEC958_AES0_PRO_FS_48000; 1677 break; 1678 } 1679 } else { 1680 /* consumer */ 1681 diga->status[0] |= val & (1U << 2); /* copyright */ 1682 if (val & (1U << 3)) 1683 diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015; 1684 diga->status[1] |= (val >> 4) & 0x3f; /* category */ 1685 diga->status[3] |= (val >> 12) & 0x07; /* fs */ 1686 } 1687 } 1688 1689 static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol, 1690 struct snd_ctl_elem_value *ucontrol) 1691 { 1692 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1693 unsigned int val; 1694 val = inw(ICEMT1724(ice, SPDIF_CTRL)); 1695 decode_spdif_bits(&ucontrol->value.iec958, val); 1696 return 0; 1697 } 1698 1699 static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol, 1700 struct snd_ctl_elem_value *ucontrol) 1701 { 1702 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1703 unsigned int val, old; 1704 1705 val = encode_spdif_bits(&ucontrol->value.iec958); 1706 spin_lock_irq(&ice->reg_lock); 1707 old = inw(ICEMT1724(ice, SPDIF_CTRL)); 1708 if (val != old) 1709 update_spdif_bits(ice, val); 1710 spin_unlock_irq(&ice->reg_lock); 1711 return val != old; 1712 } 1713 1714 static const struct snd_kcontrol_new snd_vt1724_spdif_default = 1715 { 1716 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1717 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1718 .info = snd_vt1724_spdif_info, 1719 .get = snd_vt1724_spdif_default_get, 1720 .put = snd_vt1724_spdif_default_put 1721 }; 1722 1723 static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1724 struct snd_ctl_elem_value *ucontrol) 1725 { 1726 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1727 IEC958_AES0_PROFESSIONAL | 1728 IEC958_AES0_CON_NOT_COPYRIGHT | 1729 IEC958_AES0_CON_EMPHASIS; 1730 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1731 IEC958_AES1_CON_CATEGORY; 1732 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1733 return 0; 1734 } 1735 1736 static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1737 struct snd_ctl_elem_value *ucontrol) 1738 { 1739 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1740 IEC958_AES0_PROFESSIONAL | 1741 IEC958_AES0_PRO_FS | 1742 IEC958_AES0_PRO_EMPHASIS; 1743 return 0; 1744 } 1745 1746 static const struct snd_kcontrol_new snd_vt1724_spdif_maskc = 1747 { 1748 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1749 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1750 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1751 .info = snd_vt1724_spdif_info, 1752 .get = snd_vt1724_spdif_maskc_get, 1753 }; 1754 1755 static const struct snd_kcontrol_new snd_vt1724_spdif_maskp = 1756 { 1757 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1758 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1759 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1760 .info = snd_vt1724_spdif_info, 1761 .get = snd_vt1724_spdif_maskp_get, 1762 }; 1763 1764 #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info 1765 1766 static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol, 1767 struct snd_ctl_elem_value *ucontrol) 1768 { 1769 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1770 ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) & 1771 VT1724_CFG_SPDIF_OUT_EN ? 1 : 0; 1772 return 0; 1773 } 1774 1775 static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol, 1776 struct snd_ctl_elem_value *ucontrol) 1777 { 1778 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1779 unsigned char old, val; 1780 1781 spin_lock_irq(&ice->reg_lock); 1782 old = val = inb(ICEREG1724(ice, SPDIF_CFG)); 1783 val &= ~VT1724_CFG_SPDIF_OUT_EN; 1784 if (ucontrol->value.integer.value[0]) 1785 val |= VT1724_CFG_SPDIF_OUT_EN; 1786 if (old != val) 1787 outb(val, ICEREG1724(ice, SPDIF_CFG)); 1788 spin_unlock_irq(&ice->reg_lock); 1789 return old != val; 1790 } 1791 1792 static const struct snd_kcontrol_new snd_vt1724_spdif_switch = 1793 { 1794 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1795 /* FIXME: the following conflict with IEC958 Playback Route */ 1796 /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */ 1797 .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH), 1798 .info = snd_vt1724_spdif_sw_info, 1799 .get = snd_vt1724_spdif_sw_get, 1800 .put = snd_vt1724_spdif_sw_put 1801 }; 1802 1803 1804 #if 0 /* NOT USED YET */ 1805 /* 1806 * GPIO access from extern 1807 */ 1808 1809 #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info 1810 1811 int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol, 1812 struct snd_ctl_elem_value *ucontrol) 1813 { 1814 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1815 int shift = kcontrol->private_value & 0xff; 1816 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1817 1818 snd_ice1712_save_gpio_status(ice); 1819 ucontrol->value.integer.value[0] = 1820 (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert; 1821 snd_ice1712_restore_gpio_status(ice); 1822 return 0; 1823 } 1824 1825 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1826 struct snd_ctl_elem_value *ucontrol) 1827 { 1828 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1829 int shift = kcontrol->private_value & 0xff; 1830 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1831 unsigned int val, nval; 1832 1833 if (kcontrol->private_value & (1 << 31)) 1834 return -EPERM; 1835 nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert; 1836 snd_ice1712_save_gpio_status(ice); 1837 val = snd_ice1712_gpio_read(ice); 1838 nval |= val & ~(1 << shift); 1839 if (val != nval) 1840 snd_ice1712_gpio_write(ice, nval); 1841 snd_ice1712_restore_gpio_status(ice); 1842 return val != nval; 1843 } 1844 #endif /* NOT USED YET */ 1845 1846 /* 1847 * rate 1848 */ 1849 static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1850 struct snd_ctl_elem_info *uinfo) 1851 { 1852 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1853 int hw_rates_count = ice->hw_rates->count; 1854 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1855 uinfo->count = 1; 1856 1857 /* internal clocks */ 1858 uinfo->value.enumerated.items = hw_rates_count; 1859 /* external clocks */ 1860 if (ice->force_rdma1 || 1861 (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) 1862 uinfo->value.enumerated.items += ice->ext_clock_count; 1863 /* upper limit - keep at top */ 1864 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1865 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1866 if (uinfo->value.enumerated.item >= hw_rates_count) 1867 /* ext_clock items */ 1868 strcpy(uinfo->value.enumerated.name, 1869 ice->ext_clock_names[ 1870 uinfo->value.enumerated.item - hw_rates_count]); 1871 else 1872 /* int clock items */ 1873 sprintf(uinfo->value.enumerated.name, "%d", 1874 ice->hw_rates->list[uinfo->value.enumerated.item]); 1875 return 0; 1876 } 1877 1878 static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1879 struct snd_ctl_elem_value *ucontrol) 1880 { 1881 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1882 unsigned int i, rate; 1883 1884 spin_lock_irq(&ice->reg_lock); 1885 if (ice->is_spdif_master(ice)) { 1886 ucontrol->value.enumerated.item[0] = ice->hw_rates->count + 1887 ice->get_spdif_master_type(ice); 1888 } else { 1889 rate = ice->get_rate(ice); 1890 ucontrol->value.enumerated.item[0] = 0; 1891 for (i = 0; i < ice->hw_rates->count; i++) { 1892 if (ice->hw_rates->list[i] == rate) { 1893 ucontrol->value.enumerated.item[0] = i; 1894 break; 1895 } 1896 } 1897 } 1898 spin_unlock_irq(&ice->reg_lock); 1899 return 0; 1900 } 1901 1902 static int stdclock_get_spdif_master_type(struct snd_ice1712 *ice) 1903 { 1904 /* standard external clock - only single type - SPDIF IN */ 1905 return 0; 1906 } 1907 1908 /* setting clock to external - SPDIF */ 1909 static int stdclock_set_spdif_clock(struct snd_ice1712 *ice, int type) 1910 { 1911 unsigned char oval; 1912 unsigned char i2s_oval; 1913 oval = inb(ICEMT1724(ice, RATE)); 1914 outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE)); 1915 /* setting 256fs */ 1916 i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT)); 1917 outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT)); 1918 return 0; 1919 } 1920 1921 1922 static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1923 struct snd_ctl_elem_value *ucontrol) 1924 { 1925 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1926 unsigned int old_rate, new_rate; 1927 unsigned int item = ucontrol->value.enumerated.item[0]; 1928 unsigned int first_ext_clock = ice->hw_rates->count; 1929 1930 if (item > first_ext_clock + ice->ext_clock_count - 1) 1931 return -EINVAL; 1932 1933 /* if rate = 0 => external clock */ 1934 spin_lock_irq(&ice->reg_lock); 1935 if (ice->is_spdif_master(ice)) 1936 old_rate = 0; 1937 else 1938 old_rate = ice->get_rate(ice); 1939 if (item >= first_ext_clock) { 1940 /* switching to external clock */ 1941 ice->set_spdif_clock(ice, item - first_ext_clock); 1942 new_rate = 0; 1943 } else { 1944 /* internal on-card clock */ 1945 new_rate = ice->hw_rates->list[item]; 1946 ice->pro_rate_default = new_rate; 1947 spin_unlock_irq(&ice->reg_lock); 1948 snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1); 1949 spin_lock_irq(&ice->reg_lock); 1950 } 1951 spin_unlock_irq(&ice->reg_lock); 1952 1953 /* the first switch to the ext. clock mode? */ 1954 if (old_rate != new_rate && !new_rate) { 1955 /* notify akm chips as well */ 1956 unsigned int i; 1957 if (ice->gpio.set_pro_rate) 1958 ice->gpio.set_pro_rate(ice, 0); 1959 for (i = 0; i < ice->akm_codecs; i++) { 1960 if (ice->akm[i].ops.set_rate_val) 1961 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 1962 } 1963 } 1964 return old_rate != new_rate; 1965 } 1966 1967 static const struct snd_kcontrol_new snd_vt1724_pro_internal_clock = { 1968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1969 .name = "Multi Track Internal Clock", 1970 .info = snd_vt1724_pro_internal_clock_info, 1971 .get = snd_vt1724_pro_internal_clock_get, 1972 .put = snd_vt1724_pro_internal_clock_put 1973 }; 1974 1975 #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info 1976 1977 static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1978 struct snd_ctl_elem_value *ucontrol) 1979 { 1980 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1981 return 0; 1982 } 1983 1984 static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1985 struct snd_ctl_elem_value *ucontrol) 1986 { 1987 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1988 int change = 0, nval; 1989 1990 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1991 spin_lock_irq(&ice->reg_lock); 1992 change = PRO_RATE_LOCKED != nval; 1993 PRO_RATE_LOCKED = nval; 1994 spin_unlock_irq(&ice->reg_lock); 1995 return change; 1996 } 1997 1998 static const struct snd_kcontrol_new snd_vt1724_pro_rate_locking = { 1999 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2000 .name = "Multi Track Rate Locking", 2001 .info = snd_vt1724_pro_rate_locking_info, 2002 .get = snd_vt1724_pro_rate_locking_get, 2003 .put = snd_vt1724_pro_rate_locking_put 2004 }; 2005 2006 #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info 2007 2008 static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 2009 struct snd_ctl_elem_value *ucontrol) 2010 { 2011 ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0; 2012 return 0; 2013 } 2014 2015 static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 2016 struct snd_ctl_elem_value *ucontrol) 2017 { 2018 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2019 int change = 0, nval; 2020 2021 nval = ucontrol->value.integer.value[0] ? 1 : 0; 2022 spin_lock_irq(&ice->reg_lock); 2023 change = PRO_RATE_RESET != nval; 2024 PRO_RATE_RESET = nval; 2025 spin_unlock_irq(&ice->reg_lock); 2026 return change; 2027 } 2028 2029 static const struct snd_kcontrol_new snd_vt1724_pro_rate_reset = { 2030 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2031 .name = "Multi Track Rate Reset", 2032 .info = snd_vt1724_pro_rate_reset_info, 2033 .get = snd_vt1724_pro_rate_reset_get, 2034 .put = snd_vt1724_pro_rate_reset_put 2035 }; 2036 2037 2038 /* 2039 * routing 2040 */ 2041 static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol, 2042 struct snd_ctl_elem_info *uinfo) 2043 { 2044 static const char * const texts[] = { 2045 "PCM Out", /* 0 */ 2046 "H/W In 0", "H/W In 1", /* 1-2 */ 2047 "IEC958 In L", "IEC958 In R", /* 3-4 */ 2048 }; 2049 2050 return snd_ctl_enum_info(uinfo, 1, 5, texts); 2051 } 2052 2053 static inline int analog_route_shift(int idx) 2054 { 2055 return (idx % 2) * 12 + ((idx / 2) * 3) + 8; 2056 } 2057 2058 static inline int digital_route_shift(int idx) 2059 { 2060 return idx * 3; 2061 } 2062 2063 int snd_ice1724_get_route_val(struct snd_ice1712 *ice, int shift) 2064 { 2065 unsigned long val; 2066 unsigned char eitem; 2067 static const unsigned char xlate[8] = { 2068 0, 255, 1, 2, 255, 255, 3, 4, 2069 }; 2070 2071 val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2072 val >>= shift; 2073 val &= 7; /* we now have 3 bits per output */ 2074 eitem = xlate[val]; 2075 if (eitem == 255) { 2076 snd_BUG(); 2077 return 0; 2078 } 2079 return eitem; 2080 } 2081 2082 int snd_ice1724_put_route_val(struct snd_ice1712 *ice, unsigned int val, 2083 int shift) 2084 { 2085 unsigned int old_val, nval; 2086 int change; 2087 static const unsigned char xroute[8] = { 2088 0, /* PCM */ 2089 2, /* PSDIN0 Left */ 2090 3, /* PSDIN0 Right */ 2091 6, /* SPDIN Left */ 2092 7, /* SPDIN Right */ 2093 }; 2094 2095 nval = xroute[val % 5]; 2096 val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2097 val &= ~(0x07 << shift); 2098 val |= nval << shift; 2099 change = val != old_val; 2100 if (change) 2101 outl(val, ICEMT1724(ice, ROUTE_PLAYBACK)); 2102 return change; 2103 } 2104 2105 static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2106 struct snd_ctl_elem_value *ucontrol) 2107 { 2108 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2109 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2110 ucontrol->value.enumerated.item[0] = 2111 snd_ice1724_get_route_val(ice, analog_route_shift(idx)); 2112 return 0; 2113 } 2114 2115 static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2116 struct snd_ctl_elem_value *ucontrol) 2117 { 2118 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2119 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2120 return snd_ice1724_put_route_val(ice, 2121 ucontrol->value.enumerated.item[0], 2122 analog_route_shift(idx)); 2123 } 2124 2125 static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2126 struct snd_ctl_elem_value *ucontrol) 2127 { 2128 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2129 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2130 ucontrol->value.enumerated.item[0] = 2131 snd_ice1724_get_route_val(ice, digital_route_shift(idx)); 2132 return 0; 2133 } 2134 2135 static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2136 struct snd_ctl_elem_value *ucontrol) 2137 { 2138 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2139 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2140 return snd_ice1724_put_route_val(ice, 2141 ucontrol->value.enumerated.item[0], 2142 digital_route_shift(idx)); 2143 } 2144 2145 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route = 2146 { 2147 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2148 .name = "H/W Playback Route", 2149 .info = snd_vt1724_pro_route_info, 2150 .get = snd_vt1724_pro_route_analog_get, 2151 .put = snd_vt1724_pro_route_analog_put, 2152 }; 2153 2154 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route = { 2155 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2156 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2157 .info = snd_vt1724_pro_route_info, 2158 .get = snd_vt1724_pro_route_spdif_get, 2159 .put = snd_vt1724_pro_route_spdif_put, 2160 .count = 2, 2161 }; 2162 2163 2164 static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol, 2165 struct snd_ctl_elem_info *uinfo) 2166 { 2167 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2168 uinfo->count = 22; /* FIXME: for compatibility with ice1712... */ 2169 uinfo->value.integer.min = 0; 2170 uinfo->value.integer.max = 255; 2171 return 0; 2172 } 2173 2174 static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol, 2175 struct snd_ctl_elem_value *ucontrol) 2176 { 2177 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2178 int idx; 2179 2180 spin_lock_irq(&ice->reg_lock); 2181 for (idx = 0; idx < 22; idx++) { 2182 outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX)); 2183 ucontrol->value.integer.value[idx] = 2184 inb(ICEMT1724(ice, MONITOR_PEAKDATA)); 2185 } 2186 spin_unlock_irq(&ice->reg_lock); 2187 return 0; 2188 } 2189 2190 static const struct snd_kcontrol_new snd_vt1724_mixer_pro_peak = { 2191 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2192 .name = "Multi Track Peak", 2193 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2194 .info = snd_vt1724_pro_peak_info, 2195 .get = snd_vt1724_pro_peak_get 2196 }; 2197 2198 /* 2199 * 2200 */ 2201 2202 static struct snd_ice1712_card_info no_matched; 2203 2204 2205 /* 2206 ooAoo cards with no controls 2207 */ 2208 static unsigned char ooaoo_sq210_eeprom[] = { 2209 [ICE_EEP2_SYSCONF] = 0x4c, /* 49MHz crystal, no mpu401, no ADC, 2210 1xDACs */ 2211 [ICE_EEP2_ACLINK] = 0x80, /* I2S */ 2212 [ICE_EEP2_I2S] = 0x78, /* no volume, 96k, 24bit, 192k */ 2213 [ICE_EEP2_SPDIF] = 0xc1, /* out-en, out-int, out-ext */ 2214 [ICE_EEP2_GPIO_DIR] = 0x00, /* no GPIOs are used */ 2215 [ICE_EEP2_GPIO_DIR1] = 0x00, 2216 [ICE_EEP2_GPIO_DIR2] = 0x00, 2217 [ICE_EEP2_GPIO_MASK] = 0xff, 2218 [ICE_EEP2_GPIO_MASK1] = 0xff, 2219 [ICE_EEP2_GPIO_MASK2] = 0xff, 2220 2221 [ICE_EEP2_GPIO_STATE] = 0x00, /* inputs */ 2222 [ICE_EEP2_GPIO_STATE1] = 0x00, /* all 1, but GPIO_CPLD_RW 2223 and GPIO15 always zero */ 2224 [ICE_EEP2_GPIO_STATE2] = 0x00, /* inputs */ 2225 }; 2226 2227 2228 static struct snd_ice1712_card_info snd_vt1724_ooaoo_cards[] = { 2229 { 2230 .name = "ooAoo SQ210a", 2231 .model = "sq210a", 2232 .eeprom_size = sizeof(ooaoo_sq210_eeprom), 2233 .eeprom_data = ooaoo_sq210_eeprom, 2234 }, 2235 { } /* terminator */ 2236 }; 2237 2238 static struct snd_ice1712_card_info *card_tables[] = { 2239 snd_vt1724_revo_cards, 2240 snd_vt1724_amp_cards, 2241 snd_vt1724_aureon_cards, 2242 snd_vt1720_mobo_cards, 2243 snd_vt1720_pontis_cards, 2244 snd_vt1724_prodigy_hifi_cards, 2245 snd_vt1724_prodigy192_cards, 2246 snd_vt1724_juli_cards, 2247 snd_vt1724_maya44_cards, 2248 snd_vt1724_phase_cards, 2249 snd_vt1724_wtm_cards, 2250 snd_vt1724_se_cards, 2251 snd_vt1724_qtet_cards, 2252 snd_vt1724_ooaoo_cards, 2253 snd_vt1724_psc724_cards, 2254 NULL, 2255 }; 2256 2257 2258 /* 2259 */ 2260 2261 static void wait_i2c_busy(struct snd_ice1712 *ice) 2262 { 2263 int t = 0x10000; 2264 while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--) 2265 ; 2266 if (t == -1) 2267 dev_err(ice->card->dev, "i2c busy timeout\n"); 2268 } 2269 2270 unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice, 2271 unsigned char dev, unsigned char addr) 2272 { 2273 unsigned char val; 2274 2275 mutex_lock(&ice->i2c_mutex); 2276 wait_i2c_busy(ice); 2277 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2278 outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2279 wait_i2c_busy(ice); 2280 val = inb(ICEREG1724(ice, I2C_DATA)); 2281 mutex_unlock(&ice->i2c_mutex); 2282 /* 2283 dev_dbg(ice->card->dev, "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val); 2284 */ 2285 return val; 2286 } 2287 2288 void snd_vt1724_write_i2c(struct snd_ice1712 *ice, 2289 unsigned char dev, unsigned char addr, unsigned char data) 2290 { 2291 mutex_lock(&ice->i2c_mutex); 2292 wait_i2c_busy(ice); 2293 /* 2294 dev_dbg(ice->card->dev, "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data); 2295 */ 2296 outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR)); 2297 outb(data, ICEREG1724(ice, I2C_DATA)); 2298 outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR)); 2299 wait_i2c_busy(ice); 2300 mutex_unlock(&ice->i2c_mutex); 2301 } 2302 2303 static int snd_vt1724_read_eeprom(struct snd_ice1712 *ice, 2304 const char *modelname) 2305 { 2306 const int dev = 0xa0; /* EEPROM device address */ 2307 unsigned int i, size; 2308 struct snd_ice1712_card_info * const *tbl, *c; 2309 2310 if (!modelname || !*modelname) { 2311 ice->eeprom.subvendor = 0; 2312 if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0) 2313 ice->eeprom.subvendor = 2314 (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) | 2315 (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) | 2316 (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) | 2317 (snd_vt1724_read_i2c(ice, dev, 0x03) << 24); 2318 if (ice->eeprom.subvendor == 0 || 2319 ice->eeprom.subvendor == (unsigned int)-1) { 2320 /* invalid subvendor from EEPROM, try the PCI 2321 * subststem ID instead 2322 */ 2323 u16 vendor, device; 2324 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, 2325 &vendor); 2326 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2327 ice->eeprom.subvendor = 2328 ((unsigned int)swab16(vendor) << 16) | swab16(device); 2329 if (ice->eeprom.subvendor == 0 || 2330 ice->eeprom.subvendor == (unsigned int)-1) { 2331 dev_err(ice->card->dev, 2332 "No valid ID is found\n"); 2333 return -ENXIO; 2334 } 2335 } 2336 } 2337 for (tbl = card_tables; *tbl; tbl++) { 2338 for (c = *tbl; c->name; c++) { 2339 if (modelname && c->model && 2340 !strcmp(modelname, c->model)) { 2341 dev_info(ice->card->dev, 2342 "Using board model %s\n", 2343 c->name); 2344 ice->eeprom.subvendor = c->subvendor; 2345 } else if (c->subvendor != ice->eeprom.subvendor) 2346 continue; 2347 ice->card_info = c; 2348 if (!c->eeprom_size || !c->eeprom_data) 2349 goto found; 2350 /* if the EEPROM is given by the driver, use it */ 2351 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2352 ice->eeprom.version = 2; 2353 ice->eeprom.size = c->eeprom_size + 6; 2354 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2355 goto read_skipped; 2356 } 2357 } 2358 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2359 ice->eeprom.subvendor); 2360 #ifdef CONFIG_PM_SLEEP 2361 /* assume AC97-only card which can suspend without additional code */ 2362 ice->pm_suspend_enabled = 1; 2363 #endif 2364 2365 found: 2366 ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04); 2367 if (ice->eeprom.size < 6) 2368 ice->eeprom.size = 32; 2369 else if (ice->eeprom.size > 32) { 2370 dev_err(ice->card->dev, "Invalid EEPROM (size = %i)\n", 2371 ice->eeprom.size); 2372 return -EIO; 2373 } 2374 ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05); 2375 if (ice->eeprom.version != 1 && ice->eeprom.version != 2) 2376 dev_warn(ice->card->dev, "Invalid EEPROM version %i\n", 2377 ice->eeprom.version); 2378 size = ice->eeprom.size - 6; 2379 for (i = 0; i < size; i++) 2380 ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6); 2381 2382 read_skipped: 2383 ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK); 2384 ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE); 2385 ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR); 2386 2387 return 0; 2388 } 2389 2390 2391 2392 static void snd_vt1724_chip_reset(struct snd_ice1712 *ice) 2393 { 2394 outb(VT1724_RESET , ICEREG1724(ice, CONTROL)); 2395 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2396 msleep(10); 2397 outb(0, ICEREG1724(ice, CONTROL)); 2398 inb(ICEREG1724(ice, CONTROL)); /* pci posting flush */ 2399 msleep(10); 2400 } 2401 2402 static int snd_vt1724_chip_init(struct snd_ice1712 *ice) 2403 { 2404 outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG)); 2405 outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG)); 2406 outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES)); 2407 outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG)); 2408 2409 ice->gpio.write_mask = ice->eeprom.gpiomask; 2410 ice->gpio.direction = ice->eeprom.gpiodir; 2411 snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask); 2412 snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir); 2413 snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate); 2414 2415 outb(0, ICEREG1724(ice, POWERDOWN)); 2416 2417 /* MPU_RX and TX irq masks are cleared later dynamically */ 2418 outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK)); 2419 2420 /* don't handle FIFO overrun/underruns (just yet), 2421 * since they cause machine lockups 2422 */ 2423 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK)); 2424 2425 return 0; 2426 } 2427 2428 static int snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice) 2429 { 2430 int err; 2431 struct snd_kcontrol *kctl; 2432 2433 if (snd_BUG_ON(!ice->pcm)) 2434 return -EIO; 2435 2436 if (!ice->own_routing) { 2437 err = snd_ctl_add(ice->card, 2438 snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice)); 2439 if (err < 0) 2440 return err; 2441 } 2442 2443 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice)); 2444 if (err < 0) 2445 return err; 2446 2447 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice)); 2448 if (err < 0) 2449 return err; 2450 kctl->id.device = ice->pcm->device; 2451 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice)); 2452 if (err < 0) 2453 return err; 2454 kctl->id.device = ice->pcm->device; 2455 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice)); 2456 if (err < 0) 2457 return err; 2458 kctl->id.device = ice->pcm->device; 2459 #if 0 /* use default only */ 2460 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice)); 2461 if (err < 0) 2462 return err; 2463 kctl->id.device = ice->pcm->device; 2464 ice->spdif.stream_ctl = kctl; 2465 #endif 2466 return 0; 2467 } 2468 2469 2470 static int snd_vt1724_build_controls(struct snd_ice1712 *ice) 2471 { 2472 int err; 2473 2474 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice)); 2475 if (err < 0) 2476 return err; 2477 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice)); 2478 if (err < 0) 2479 return err; 2480 2481 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice)); 2482 if (err < 0) 2483 return err; 2484 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice)); 2485 if (err < 0) 2486 return err; 2487 2488 if (!ice->own_routing && ice->num_total_dacs > 0) { 2489 struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route; 2490 tmp.count = ice->num_total_dacs; 2491 if (ice->vt1720 && tmp.count > 2) 2492 tmp.count = 2; 2493 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2494 if (err < 0) 2495 return err; 2496 } 2497 2498 return snd_ctl_add(ice->card, 2499 snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice)); 2500 } 2501 2502 static int snd_vt1724_free(struct snd_ice1712 *ice) 2503 { 2504 if (!ice->port) 2505 goto __hw_end; 2506 /* mask all interrupts */ 2507 outb(0xff, ICEMT1724(ice, DMA_INT_MASK)); 2508 outb(0xff, ICEREG1724(ice, IRQMASK)); 2509 /* --- */ 2510 __hw_end: 2511 if (ice->irq >= 0) 2512 free_irq(ice->irq, ice); 2513 pci_release_regions(ice->pci); 2514 snd_ice1712_akm4xxx_free(ice); 2515 pci_disable_device(ice->pci); 2516 kfree(ice->spec); 2517 kfree(ice); 2518 return 0; 2519 } 2520 2521 static int snd_vt1724_dev_free(struct snd_device *device) 2522 { 2523 struct snd_ice1712 *ice = device->device_data; 2524 return snd_vt1724_free(ice); 2525 } 2526 2527 static int snd_vt1724_create(struct snd_card *card, 2528 struct pci_dev *pci, 2529 const char *modelname, 2530 struct snd_ice1712 **r_ice1712) 2531 { 2532 struct snd_ice1712 *ice; 2533 int err; 2534 static struct snd_device_ops ops = { 2535 .dev_free = snd_vt1724_dev_free, 2536 }; 2537 2538 *r_ice1712 = NULL; 2539 2540 /* enable PCI device */ 2541 err = pci_enable_device(pci); 2542 if (err < 0) 2543 return err; 2544 2545 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2546 if (ice == NULL) { 2547 pci_disable_device(pci); 2548 return -ENOMEM; 2549 } 2550 ice->vt1724 = 1; 2551 spin_lock_init(&ice->reg_lock); 2552 mutex_init(&ice->gpio_mutex); 2553 mutex_init(&ice->open_mutex); 2554 mutex_init(&ice->i2c_mutex); 2555 ice->gpio.set_mask = snd_vt1724_set_gpio_mask; 2556 ice->gpio.get_mask = snd_vt1724_get_gpio_mask; 2557 ice->gpio.set_dir = snd_vt1724_set_gpio_dir; 2558 ice->gpio.get_dir = snd_vt1724_get_gpio_dir; 2559 ice->gpio.set_data = snd_vt1724_set_gpio_data; 2560 ice->gpio.get_data = snd_vt1724_get_gpio_data; 2561 ice->card = card; 2562 ice->pci = pci; 2563 ice->irq = -1; 2564 pci_set_master(pci); 2565 snd_vt1724_proc_init(ice); 2566 synchronize_irq(pci->irq); 2567 2568 card->private_data = ice; 2569 2570 err = pci_request_regions(pci, "ICE1724"); 2571 if (err < 0) { 2572 kfree(ice); 2573 pci_disable_device(pci); 2574 return err; 2575 } 2576 ice->port = pci_resource_start(pci, 0); 2577 ice->profi_port = pci_resource_start(pci, 1); 2578 2579 if (request_irq(pci->irq, snd_vt1724_interrupt, 2580 IRQF_SHARED, KBUILD_MODNAME, ice)) { 2581 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2582 snd_vt1724_free(ice); 2583 return -EIO; 2584 } 2585 2586 ice->irq = pci->irq; 2587 2588 snd_vt1724_chip_reset(ice); 2589 if (snd_vt1724_read_eeprom(ice, modelname) < 0) { 2590 snd_vt1724_free(ice); 2591 return -EIO; 2592 } 2593 if (snd_vt1724_chip_init(ice) < 0) { 2594 snd_vt1724_free(ice); 2595 return -EIO; 2596 } 2597 2598 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2599 if (err < 0) { 2600 snd_vt1724_free(ice); 2601 return err; 2602 } 2603 2604 *r_ice1712 = ice; 2605 return 0; 2606 } 2607 2608 2609 /* 2610 * 2611 * Registration 2612 * 2613 */ 2614 2615 static int snd_vt1724_probe(struct pci_dev *pci, 2616 const struct pci_device_id *pci_id) 2617 { 2618 static int dev; 2619 struct snd_card *card; 2620 struct snd_ice1712 *ice; 2621 int pcm_dev = 0, err; 2622 struct snd_ice1712_card_info * const *tbl, *c; 2623 2624 if (dev >= SNDRV_CARDS) 2625 return -ENODEV; 2626 if (!enable[dev]) { 2627 dev++; 2628 return -ENOENT; 2629 } 2630 2631 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2632 0, &card); 2633 if (err < 0) 2634 return err; 2635 2636 strcpy(card->driver, "ICE1724"); 2637 strcpy(card->shortname, "ICEnsemble ICE1724"); 2638 2639 err = snd_vt1724_create(card, pci, model[dev], &ice); 2640 if (err < 0) { 2641 snd_card_free(card); 2642 return err; 2643 } 2644 2645 /* field init before calling chip_init */ 2646 ice->ext_clock_count = 0; 2647 2648 for (tbl = card_tables; *tbl; tbl++) { 2649 for (c = *tbl; c->name; c++) { 2650 if ((model[dev] && c->model && 2651 !strcmp(model[dev], c->model)) || 2652 (c->subvendor == ice->eeprom.subvendor)) { 2653 strcpy(card->shortname, c->name); 2654 if (c->driver) /* specific driver? */ 2655 strcpy(card->driver, c->driver); 2656 if (c->chip_init) { 2657 err = c->chip_init(ice); 2658 if (err < 0) { 2659 snd_card_free(card); 2660 return err; 2661 } 2662 } 2663 goto __found; 2664 } 2665 } 2666 } 2667 c = &no_matched; 2668 __found: 2669 /* 2670 * VT1724 has separate DMAs for the analog and the SPDIF streams while 2671 * ICE1712 has only one for both (mixed up). 2672 * 2673 * Confusingly the analog PCM is named "professional" here because it 2674 * was called so in ice1712 driver, and vt1724 driver is derived from 2675 * ice1712 driver. 2676 */ 2677 ice->pro_rate_default = PRO_RATE_DEFAULT; 2678 if (!ice->is_spdif_master) 2679 ice->is_spdif_master = stdclock_is_spdif_master; 2680 if (!ice->get_rate) 2681 ice->get_rate = stdclock_get_rate; 2682 if (!ice->set_rate) 2683 ice->set_rate = stdclock_set_rate; 2684 if (!ice->set_mclk) 2685 ice->set_mclk = stdclock_set_mclk; 2686 if (!ice->set_spdif_clock) 2687 ice->set_spdif_clock = stdclock_set_spdif_clock; 2688 if (!ice->get_spdif_master_type) 2689 ice->get_spdif_master_type = stdclock_get_spdif_master_type; 2690 if (!ice->ext_clock_names) 2691 ice->ext_clock_names = ext_clock_names; 2692 if (!ice->ext_clock_count) 2693 ice->ext_clock_count = ARRAY_SIZE(ext_clock_names); 2694 2695 if (!ice->hw_rates) 2696 set_std_hw_rates(ice); 2697 2698 err = snd_vt1724_pcm_profi(ice, pcm_dev++); 2699 if (err < 0) { 2700 snd_card_free(card); 2701 return err; 2702 } 2703 2704 err = snd_vt1724_pcm_spdif(ice, pcm_dev++); 2705 if (err < 0) { 2706 snd_card_free(card); 2707 return err; 2708 } 2709 2710 err = snd_vt1724_pcm_indep(ice, pcm_dev++); 2711 if (err < 0) { 2712 snd_card_free(card); 2713 return err; 2714 } 2715 2716 err = snd_vt1724_ac97_mixer(ice); 2717 if (err < 0) { 2718 snd_card_free(card); 2719 return err; 2720 } 2721 2722 err = snd_vt1724_build_controls(ice); 2723 if (err < 0) { 2724 snd_card_free(card); 2725 return err; 2726 } 2727 2728 if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */ 2729 err = snd_vt1724_spdif_build_controls(ice); 2730 if (err < 0) { 2731 snd_card_free(card); 2732 return err; 2733 } 2734 } 2735 2736 if (c->build_controls) { 2737 err = c->build_controls(ice); 2738 if (err < 0) { 2739 snd_card_free(card); 2740 return err; 2741 } 2742 } 2743 2744 if (!c->no_mpu401) { 2745 if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) { 2746 struct snd_rawmidi *rmidi; 2747 2748 err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi); 2749 if (err < 0) { 2750 snd_card_free(card); 2751 return err; 2752 } 2753 ice->rmidi[0] = rmidi; 2754 rmidi->private_data = ice; 2755 strcpy(rmidi->name, "ICE1724 MIDI"); 2756 rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT | 2757 SNDRV_RAWMIDI_INFO_INPUT | 2758 SNDRV_RAWMIDI_INFO_DUPLEX; 2759 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, 2760 &vt1724_midi_output_ops); 2761 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, 2762 &vt1724_midi_input_ops); 2763 2764 /* set watermarks */ 2765 outb(VT1724_MPU_RX_FIFO | 0x1, 2766 ICEREG1724(ice, MPU_FIFO_WM)); 2767 outb(0x1, ICEREG1724(ice, MPU_FIFO_WM)); 2768 /* set UART mode */ 2769 outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL)); 2770 } 2771 } 2772 2773 sprintf(card->longname, "%s at 0x%lx, irq %i", 2774 card->shortname, ice->port, ice->irq); 2775 2776 err = snd_card_register(card); 2777 if (err < 0) { 2778 snd_card_free(card); 2779 return err; 2780 } 2781 pci_set_drvdata(pci, card); 2782 dev++; 2783 return 0; 2784 } 2785 2786 static void snd_vt1724_remove(struct pci_dev *pci) 2787 { 2788 struct snd_card *card = pci_get_drvdata(pci); 2789 struct snd_ice1712 *ice = card->private_data; 2790 2791 if (ice->card_info && ice->card_info->chip_exit) 2792 ice->card_info->chip_exit(ice); 2793 snd_card_free(card); 2794 } 2795 2796 #ifdef CONFIG_PM_SLEEP 2797 static int snd_vt1724_suspend(struct device *dev) 2798 { 2799 struct snd_card *card = dev_get_drvdata(dev); 2800 struct snd_ice1712 *ice = card->private_data; 2801 2802 if (!ice->pm_suspend_enabled) 2803 return 0; 2804 2805 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2806 2807 snd_pcm_suspend_all(ice->pcm); 2808 snd_pcm_suspend_all(ice->pcm_pro); 2809 snd_pcm_suspend_all(ice->pcm_ds); 2810 snd_ac97_suspend(ice->ac97); 2811 2812 spin_lock_irq(&ice->reg_lock); 2813 ice->pm_saved_is_spdif_master = ice->is_spdif_master(ice); 2814 ice->pm_saved_spdif_ctrl = inw(ICEMT1724(ice, SPDIF_CTRL)); 2815 ice->pm_saved_spdif_cfg = inb(ICEREG1724(ice, SPDIF_CFG)); 2816 ice->pm_saved_route = inl(ICEMT1724(ice, ROUTE_PLAYBACK)); 2817 spin_unlock_irq(&ice->reg_lock); 2818 2819 if (ice->pm_suspend) 2820 ice->pm_suspend(ice); 2821 return 0; 2822 } 2823 2824 static int snd_vt1724_resume(struct device *dev) 2825 { 2826 struct snd_card *card = dev_get_drvdata(dev); 2827 struct snd_ice1712 *ice = card->private_data; 2828 2829 if (!ice->pm_suspend_enabled) 2830 return 0; 2831 2832 snd_vt1724_chip_reset(ice); 2833 2834 if (snd_vt1724_chip_init(ice) < 0) { 2835 snd_card_disconnect(card); 2836 return -EIO; 2837 } 2838 2839 if (ice->pm_resume) 2840 ice->pm_resume(ice); 2841 2842 if (ice->pm_saved_is_spdif_master) { 2843 /* switching to external clock via SPDIF */ 2844 ice->set_spdif_clock(ice, 0); 2845 } else { 2846 /* internal on-card clock */ 2847 int rate; 2848 if (ice->cur_rate) 2849 rate = ice->cur_rate; 2850 else 2851 rate = ice->pro_rate_default; 2852 snd_vt1724_set_pro_rate(ice, rate, 1); 2853 } 2854 2855 update_spdif_bits(ice, ice->pm_saved_spdif_ctrl); 2856 2857 outb(ice->pm_saved_spdif_cfg, ICEREG1724(ice, SPDIF_CFG)); 2858 outl(ice->pm_saved_route, ICEMT1724(ice, ROUTE_PLAYBACK)); 2859 2860 snd_ac97_resume(ice->ac97); 2861 2862 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2863 return 0; 2864 } 2865 2866 static SIMPLE_DEV_PM_OPS(snd_vt1724_pm, snd_vt1724_suspend, snd_vt1724_resume); 2867 #define SND_VT1724_PM_OPS &snd_vt1724_pm 2868 #else 2869 #define SND_VT1724_PM_OPS NULL 2870 #endif /* CONFIG_PM_SLEEP */ 2871 2872 static struct pci_driver vt1724_driver = { 2873 .name = KBUILD_MODNAME, 2874 .id_table = snd_vt1724_ids, 2875 .probe = snd_vt1724_probe, 2876 .remove = snd_vt1724_remove, 2877 .driver = { 2878 .pm = SND_VT1724_PM_OPS, 2879 }, 2880 }; 2881 2882 module_pci_driver(vt1724_driver); 2883