1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 /* 23 NOTES: 24 - spdif nonaudio consumer mode does not work (at least with my 25 Sony STR-DB830) 26 */ 27 28 /* 29 * Changes: 30 * 31 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 32 * split the code to several files. each low-level routine 33 * is stored in the local file and called from registration 34 * function from card_info struct. 35 * 36 * 2002.11.26 James Stafford <jstafford@ampltd.com> 37 * Added support for VT1724 (Envy24HT) 38 * I have left out support for 176.4 and 192 KHz for the moment. 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 40 * 41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 42 * Split vt1724 part to an independent driver. 43 * The GPIO is accessed through the callback functions now. 44 * 45 * 2004.03.31 Doug McLain <nostar@comcast.net> 46 * Added support for Event Electronics EZ8 card to hoontech.c. 47 */ 48 49 50 #include <asm/io.h> 51 #include <linux/delay.h> 52 #include <linux/interrupt.h> 53 #include <linux/init.h> 54 #include <linux/pci.h> 55 #include <linux/dma-mapping.h> 56 #include <linux/slab.h> 57 #include <linux/moduleparam.h> 58 #include <linux/mutex.h> 59 60 #include <sound/core.h> 61 #include <sound/cs8427.h> 62 #include <sound/info.h> 63 #include <sound/initval.h> 64 #include <sound/tlv.h> 65 66 #include <sound/asoundef.h> 67 68 #include "ice1712.h" 69 70 /* lowlevel routines */ 71 #include "delta.h" 72 #include "ews.h" 73 #include "hoontech.h" 74 75 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 76 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 77 MODULE_LICENSE("GPL"); 78 MODULE_SUPPORTED_DEVICE("{" 79 HOONTECH_DEVICE_DESC 80 DELTA_DEVICE_DESC 81 EWS_DEVICE_DESC 82 "{ICEnsemble,Generic ICE1712}," 83 "{ICEnsemble,Generic Envy24}}"); 84 85 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 86 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 87 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 88 static char *model[SNDRV_CARDS]; 89 static int omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 90 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transciever reset timeout value in msec */ 91 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 92 93 module_param_array(index, int, NULL, 0444); 94 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 95 module_param_array(id, charp, NULL, 0444); 96 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 97 module_param_array(enable, bool, NULL, 0444); 98 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 99 module_param_array(omni, bool, NULL, 0444); 100 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 101 module_param_array(cs8427_timeout, int, NULL, 0444); 102 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 103 module_param_array(model, charp, NULL, 0444); 104 MODULE_PARM_DESC(model, "Use the given board model."); 105 module_param_array(dxr_enable, int, NULL, 0444); 106 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 107 108 109 static const struct pci_device_id snd_ice1712_ids[] = { 110 { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_ICE_1712, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* ICE1712 */ 111 { 0, } 112 }; 113 114 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 115 116 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 117 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 118 119 static int PRO_RATE_LOCKED; 120 static int PRO_RATE_RESET = 1; 121 static unsigned int PRO_RATE_DEFAULT = 44100; 122 123 /* 124 * Basic I/O 125 */ 126 127 /* check whether the clock mode is spdif-in */ 128 static inline int is_spdif_master(struct snd_ice1712 *ice) 129 { 130 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 131 } 132 133 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 134 { 135 return is_spdif_master(ice) || PRO_RATE_LOCKED; 136 } 137 138 static inline void snd_ice1712_ds_write(struct snd_ice1712 * ice, u8 channel, u8 addr, u32 data) 139 { 140 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 141 outl(data, ICEDS(ice, DATA)); 142 } 143 144 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 * ice, u8 channel, u8 addr) 145 { 146 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 147 return inl(ICEDS(ice, DATA)); 148 } 149 150 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 151 unsigned short reg, 152 unsigned short val) 153 { 154 struct snd_ice1712 *ice = ac97->private_data; 155 int tm; 156 unsigned char old_cmd = 0; 157 158 for (tm = 0; tm < 0x10000; tm++) { 159 old_cmd = inb(ICEREG(ice, AC97_CMD)); 160 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 161 continue; 162 if (!(old_cmd & ICE1712_AC97_READY)) 163 continue; 164 break; 165 } 166 outb(reg, ICEREG(ice, AC97_INDEX)); 167 outw(val, ICEREG(ice, AC97_DATA)); 168 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 169 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 170 for (tm = 0; tm < 0x10000; tm++) 171 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 172 break; 173 } 174 175 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 176 unsigned short reg) 177 { 178 struct snd_ice1712 *ice = ac97->private_data; 179 int tm; 180 unsigned char old_cmd = 0; 181 182 for (tm = 0; tm < 0x10000; tm++) { 183 old_cmd = inb(ICEREG(ice, AC97_CMD)); 184 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 185 continue; 186 if (!(old_cmd & ICE1712_AC97_READY)) 187 continue; 188 break; 189 } 190 outb(reg, ICEREG(ice, AC97_INDEX)); 191 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 192 for (tm = 0; tm < 0x10000; tm++) 193 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 194 break; 195 if (tm >= 0x10000) /* timeout */ 196 return ~0; 197 return inw(ICEREG(ice, AC97_DATA)); 198 } 199 200 /* 201 * pro ac97 section 202 */ 203 204 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 205 unsigned short reg, 206 unsigned short val) 207 { 208 struct snd_ice1712 *ice = ac97->private_data; 209 int tm; 210 unsigned char old_cmd = 0; 211 212 for (tm = 0; tm < 0x10000; tm++) { 213 old_cmd = inb(ICEMT(ice, AC97_CMD)); 214 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 215 continue; 216 if (!(old_cmd & ICE1712_AC97_READY)) 217 continue; 218 break; 219 } 220 outb(reg, ICEMT(ice, AC97_INDEX)); 221 outw(val, ICEMT(ice, AC97_DATA)); 222 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 223 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 224 for (tm = 0; tm < 0x10000; tm++) 225 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 226 break; 227 } 228 229 230 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 231 unsigned short reg) 232 { 233 struct snd_ice1712 *ice = ac97->private_data; 234 int tm; 235 unsigned char old_cmd = 0; 236 237 for (tm = 0; tm < 0x10000; tm++) { 238 old_cmd = inb(ICEMT(ice, AC97_CMD)); 239 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 240 continue; 241 if (!(old_cmd & ICE1712_AC97_READY)) 242 continue; 243 break; 244 } 245 outb(reg, ICEMT(ice, AC97_INDEX)); 246 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 247 for (tm = 0; tm < 0x10000; tm++) 248 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 249 break; 250 if (tm >= 0x10000) /* timeout */ 251 return ~0; 252 return inw(ICEMT(ice, AC97_DATA)); 253 } 254 255 /* 256 * consumer ac97 digital mix 257 */ 258 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info 259 260 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 261 { 262 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 263 264 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 265 return 0; 266 } 267 268 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 269 { 270 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 271 unsigned char val, nval; 272 273 spin_lock_irq(&ice->reg_lock); 274 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 275 nval = val & ~ICE1712_ROUTE_AC97; 276 if (ucontrol->value.integer.value[0]) nval |= ICE1712_ROUTE_AC97; 277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 278 spin_unlock_irq(&ice->reg_lock); 279 return val != nval; 280 } 281 282 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 __devinitdata = { 283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 284 .name = "Digital Mixer To AC97", 285 .info = snd_ice1712_digmix_route_ac97_info, 286 .get = snd_ice1712_digmix_route_ac97_get, 287 .put = snd_ice1712_digmix_route_ac97_put, 288 }; 289 290 291 /* 292 * gpio operations 293 */ 294 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 295 { 296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 298 } 299 300 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 301 { 302 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 303 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 304 } 305 306 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 307 { 308 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 309 } 310 311 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 312 { 313 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 314 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 315 } 316 317 /* 318 * 319 * CS8427 interface 320 * 321 */ 322 323 /* 324 * change the input clock selection 325 * spdif_clock = 1 - IEC958 input, 0 - Envy24 326 */ 327 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 328 { 329 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 330 unsigned char val, nval; 331 int res = 0; 332 333 snd_i2c_lock(ice->i2c); 334 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 335 snd_i2c_unlock(ice->i2c); 336 return -EIO; 337 } 338 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 339 snd_i2c_unlock(ice->i2c); 340 return -EIO; 341 } 342 nval = val & 0xf0; 343 if (spdif_clock) 344 nval |= 0x01; 345 else 346 nval |= 0x04; 347 if (val != nval) { 348 reg[1] = nval; 349 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 350 res = -EIO; 351 } else { 352 res++; 353 } 354 } 355 snd_i2c_unlock(ice->i2c); 356 return res; 357 } 358 359 /* 360 * spdif callbacks 361 */ 362 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 363 { 364 snd_cs8427_iec958_active(ice->cs8427, 1); 365 } 366 367 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 368 { 369 snd_cs8427_iec958_active(ice->cs8427, 0); 370 } 371 372 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 373 { 374 snd_cs8427_iec958_pcm(ice->cs8427, rate); 375 } 376 377 /* 378 * create and initialize callbacks for cs8427 interface 379 */ 380 int __devinit snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 381 { 382 int err; 383 384 if ((err = snd_cs8427_create(ice->i2c, addr, 385 (ice->cs8427_timeout * HZ) / 1000, 386 &ice->cs8427)) < 0) { 387 snd_printk(KERN_ERR "CS8427 initialization failed\n"); 388 return err; 389 } 390 ice->spdif.ops.open = open_cs8427; 391 ice->spdif.ops.close = close_cs8427; 392 ice->spdif.ops.setup_rate = setup_cs8427; 393 return 0; 394 } 395 396 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 397 { 398 /* change CS8427 clock source too */ 399 if (ice->cs8427) 400 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 401 /* notify ak4524 chip as well */ 402 if (spdif_is_master) { 403 unsigned int i; 404 for (i = 0; i < ice->akm_codecs; i++) { 405 if (ice->akm[i].ops.set_rate_val) 406 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 407 } 408 } 409 } 410 411 /* 412 * Interrupt handler 413 */ 414 415 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 416 { 417 struct snd_ice1712 *ice = dev_id; 418 unsigned char status; 419 int handled = 0; 420 421 while (1) { 422 status = inb(ICEREG(ice, IRQSTAT)); 423 if (status == 0) 424 break; 425 handled = 1; 426 if (status & ICE1712_IRQ_MPU1) { 427 if (ice->rmidi[0]) 428 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 429 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 430 status &= ~ICE1712_IRQ_MPU1; 431 } 432 if (status & ICE1712_IRQ_TIMER) 433 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 434 if (status & ICE1712_IRQ_MPU2) { 435 if (ice->rmidi[1]) 436 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 437 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 438 status &= ~ICE1712_IRQ_MPU2; 439 } 440 if (status & ICE1712_IRQ_PROPCM) { 441 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 442 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 443 if (ice->playback_pro_substream) 444 snd_pcm_period_elapsed(ice->playback_pro_substream); 445 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 446 } 447 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 448 if (ice->capture_pro_substream) 449 snd_pcm_period_elapsed(ice->capture_pro_substream); 450 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 451 } 452 } 453 if (status & ICE1712_IRQ_FM) 454 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 455 if (status & ICE1712_IRQ_PBKDS) { 456 u32 idx; 457 u16 pbkstatus; 458 struct snd_pcm_substream *substream; 459 pbkstatus = inw(ICEDS(ice, INTSTAT)); 460 //printk("pbkstatus = 0x%x\n", pbkstatus); 461 for (idx = 0; idx < 6; idx++) { 462 if ((pbkstatus & (3 << (idx * 2))) == 0) 463 continue; 464 if ((substream = ice->playback_con_substream_ds[idx]) != NULL) 465 snd_pcm_period_elapsed(substream); 466 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 467 } 468 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 469 } 470 if (status & ICE1712_IRQ_CONCAP) { 471 if (ice->capture_con_substream) 472 snd_pcm_period_elapsed(ice->capture_con_substream); 473 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 474 } 475 if (status & ICE1712_IRQ_CONPBK) { 476 if (ice->playback_con_substream) 477 snd_pcm_period_elapsed(ice->playback_con_substream); 478 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 479 } 480 } 481 return IRQ_RETVAL(handled); 482 } 483 484 485 /* 486 * PCM part - misc 487 */ 488 489 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream, 490 struct snd_pcm_hw_params *hw_params) 491 { 492 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 493 } 494 495 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream) 496 { 497 return snd_pcm_lib_free_pages(substream); 498 } 499 500 /* 501 * PCM part - consumer I/O 502 */ 503 504 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 505 int cmd) 506 { 507 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 508 int result = 0; 509 u32 tmp; 510 511 spin_lock(&ice->reg_lock); 512 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 513 if (cmd == SNDRV_PCM_TRIGGER_START) { 514 tmp |= 1; 515 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 516 tmp &= ~1; 517 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 518 tmp |= 2; 519 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 520 tmp &= ~2; 521 } else { 522 result = -EINVAL; 523 } 524 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 525 spin_unlock(&ice->reg_lock); 526 return result; 527 } 528 529 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 530 int cmd) 531 { 532 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 533 int result = 0; 534 u32 tmp; 535 536 spin_lock(&ice->reg_lock); 537 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 538 if (cmd == SNDRV_PCM_TRIGGER_START) { 539 tmp |= 1; 540 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 541 tmp &= ~1; 542 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 543 tmp |= 2; 544 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 545 tmp &= ~2; 546 } else { 547 result = -EINVAL; 548 } 549 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 550 spin_unlock(&ice->reg_lock); 551 return result; 552 } 553 554 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 555 int cmd) 556 { 557 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 558 int result = 0; 559 u8 tmp; 560 561 spin_lock(&ice->reg_lock); 562 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 563 if (cmd == SNDRV_PCM_TRIGGER_START) { 564 tmp |= 1; 565 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 566 tmp &= ~1; 567 } else { 568 result = -EINVAL; 569 } 570 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 571 spin_unlock(&ice->reg_lock); 572 return result; 573 } 574 575 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 576 { 577 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 578 struct snd_pcm_runtime *runtime = substream->runtime; 579 u32 period_size, buf_size, rate, tmp; 580 581 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 582 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 583 tmp = 0x0000; 584 if (snd_pcm_format_width(runtime->format) == 16) 585 tmp |= 0x10; 586 if (runtime->channels == 2) 587 tmp |= 0x08; 588 rate = (runtime->rate * 8192) / 375; 589 if (rate > 0x000fffff) 590 rate = 0x000fffff; 591 spin_lock_irq(&ice->reg_lock); 592 outb(0, ice->ddma_port + 15); 593 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 594 outl(runtime->dma_addr, ice->ddma_port + 0); 595 outw(buf_size, ice->ddma_port + 4); 596 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 597 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 598 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 599 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 600 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 601 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 602 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 603 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 604 spin_unlock_irq(&ice->reg_lock); 605 return 0; 606 } 607 608 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 609 { 610 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 611 struct snd_pcm_runtime *runtime = substream->runtime; 612 u32 period_size, buf_size, rate, tmp, chn; 613 614 period_size = snd_pcm_lib_period_bytes(substream) - 1; 615 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 616 tmp = 0x0064; 617 if (snd_pcm_format_width(runtime->format) == 16) 618 tmp &= ~0x04; 619 if (runtime->channels == 2) 620 tmp |= 0x08; 621 rate = (runtime->rate * 8192) / 375; 622 if (rate > 0x000fffff) 623 rate = 0x000fffff; 624 ice->playback_con_active_buf[substream->number] = 0; 625 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 626 chn = substream->number * 2; 627 spin_lock_irq(&ice->reg_lock); 628 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 629 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 630 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 631 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 632 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 633 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 634 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 635 if (runtime->channels == 2) { 636 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 637 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 638 } 639 spin_unlock_irq(&ice->reg_lock); 640 return 0; 641 } 642 643 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 644 { 645 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 646 struct snd_pcm_runtime *runtime = substream->runtime; 647 u32 period_size, buf_size; 648 u8 tmp; 649 650 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 651 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 652 tmp = 0x06; 653 if (snd_pcm_format_width(runtime->format) == 16) 654 tmp &= ~0x04; 655 if (runtime->channels == 2) 656 tmp &= ~0x02; 657 spin_lock_irq(&ice->reg_lock); 658 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 659 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 660 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 661 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 662 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 663 spin_unlock_irq(&ice->reg_lock); 664 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 665 return 0; 666 } 667 668 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 669 { 670 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 671 struct snd_pcm_runtime *runtime = substream->runtime; 672 size_t ptr; 673 674 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 675 return 0; 676 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 677 if (ptr == runtime->buffer_size) 678 ptr = 0; 679 return bytes_to_frames(substream->runtime, ptr); 680 } 681 682 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 683 { 684 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 685 u8 addr; 686 size_t ptr; 687 688 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 689 return 0; 690 if (ice->playback_con_active_buf[substream->number]) 691 addr = ICE1712_DSC_ADDR1; 692 else 693 addr = ICE1712_DSC_ADDR0; 694 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 695 ice->playback_con_virt_addr[substream->number]; 696 if (ptr == substream->runtime->buffer_size) 697 ptr = 0; 698 return bytes_to_frames(substream->runtime, ptr); 699 } 700 701 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 702 { 703 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 704 size_t ptr; 705 706 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 707 return 0; 708 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 709 if (ptr == substream->runtime->buffer_size) 710 ptr = 0; 711 return bytes_to_frames(substream->runtime, ptr); 712 } 713 714 static const struct snd_pcm_hardware snd_ice1712_playback = 715 { 716 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 717 SNDRV_PCM_INFO_BLOCK_TRANSFER | 718 SNDRV_PCM_INFO_MMAP_VALID | 719 SNDRV_PCM_INFO_PAUSE), 720 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 721 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 722 .rate_min = 4000, 723 .rate_max = 48000, 724 .channels_min = 1, 725 .channels_max = 2, 726 .buffer_bytes_max = (64*1024), 727 .period_bytes_min = 64, 728 .period_bytes_max = (64*1024), 729 .periods_min = 1, 730 .periods_max = 1024, 731 .fifo_size = 0, 732 }; 733 734 static const struct snd_pcm_hardware snd_ice1712_playback_ds = 735 { 736 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 737 SNDRV_PCM_INFO_BLOCK_TRANSFER | 738 SNDRV_PCM_INFO_MMAP_VALID | 739 SNDRV_PCM_INFO_PAUSE), 740 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 741 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 742 .rate_min = 4000, 743 .rate_max = 48000, 744 .channels_min = 1, 745 .channels_max = 2, 746 .buffer_bytes_max = (128*1024), 747 .period_bytes_min = 64, 748 .period_bytes_max = (128*1024), 749 .periods_min = 2, 750 .periods_max = 2, 751 .fifo_size = 0, 752 }; 753 754 static const struct snd_pcm_hardware snd_ice1712_capture = 755 { 756 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 757 SNDRV_PCM_INFO_BLOCK_TRANSFER | 758 SNDRV_PCM_INFO_MMAP_VALID), 759 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 760 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 761 .rate_min = 4000, 762 .rate_max = 48000, 763 .channels_min = 1, 764 .channels_max = 2, 765 .buffer_bytes_max = (64*1024), 766 .period_bytes_min = 64, 767 .period_bytes_max = (64*1024), 768 .periods_min = 1, 769 .periods_max = 1024, 770 .fifo_size = 0, 771 }; 772 773 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 774 { 775 struct snd_pcm_runtime *runtime = substream->runtime; 776 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 777 778 ice->playback_con_substream = substream; 779 runtime->hw = snd_ice1712_playback; 780 return 0; 781 } 782 783 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 784 { 785 struct snd_pcm_runtime *runtime = substream->runtime; 786 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 787 u32 tmp; 788 789 ice->playback_con_substream_ds[substream->number] = substream; 790 runtime->hw = snd_ice1712_playback_ds; 791 spin_lock_irq(&ice->reg_lock); 792 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 793 outw(tmp, ICEDS(ice, INTMASK)); 794 spin_unlock_irq(&ice->reg_lock); 795 return 0; 796 } 797 798 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 799 { 800 struct snd_pcm_runtime *runtime = substream->runtime; 801 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 802 803 ice->capture_con_substream = substream; 804 runtime->hw = snd_ice1712_capture; 805 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 806 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 807 runtime->hw.rate_min = 48000; 808 return 0; 809 } 810 811 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 812 { 813 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 814 815 ice->playback_con_substream = NULL; 816 return 0; 817 } 818 819 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 820 { 821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 822 u32 tmp; 823 824 spin_lock_irq(&ice->reg_lock); 825 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 826 outw(tmp, ICEDS(ice, INTMASK)); 827 spin_unlock_irq(&ice->reg_lock); 828 ice->playback_con_substream_ds[substream->number] = NULL; 829 return 0; 830 } 831 832 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 833 { 834 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 835 836 ice->capture_con_substream = NULL; 837 return 0; 838 } 839 840 static struct snd_pcm_ops snd_ice1712_playback_ops = { 841 .open = snd_ice1712_playback_open, 842 .close = snd_ice1712_playback_close, 843 .ioctl = snd_pcm_lib_ioctl, 844 .hw_params = snd_ice1712_hw_params, 845 .hw_free = snd_ice1712_hw_free, 846 .prepare = snd_ice1712_playback_prepare, 847 .trigger = snd_ice1712_playback_trigger, 848 .pointer = snd_ice1712_playback_pointer, 849 }; 850 851 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 852 .open = snd_ice1712_playback_ds_open, 853 .close = snd_ice1712_playback_ds_close, 854 .ioctl = snd_pcm_lib_ioctl, 855 .hw_params = snd_ice1712_hw_params, 856 .hw_free = snd_ice1712_hw_free, 857 .prepare = snd_ice1712_playback_ds_prepare, 858 .trigger = snd_ice1712_playback_ds_trigger, 859 .pointer = snd_ice1712_playback_ds_pointer, 860 }; 861 862 static struct snd_pcm_ops snd_ice1712_capture_ops = { 863 .open = snd_ice1712_capture_open, 864 .close = snd_ice1712_capture_close, 865 .ioctl = snd_pcm_lib_ioctl, 866 .hw_params = snd_ice1712_hw_params, 867 .hw_free = snd_ice1712_hw_free, 868 .prepare = snd_ice1712_capture_prepare, 869 .trigger = snd_ice1712_capture_trigger, 870 .pointer = snd_ice1712_capture_pointer, 871 }; 872 873 static int __devinit snd_ice1712_pcm(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 874 { 875 struct snd_pcm *pcm; 876 int err; 877 878 if (rpcm) 879 *rpcm = NULL; 880 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 881 if (err < 0) 882 return err; 883 884 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 885 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 886 887 pcm->private_data = ice; 888 pcm->info_flags = 0; 889 strcpy(pcm->name, "ICE1712 consumer"); 890 ice->pcm = pcm; 891 892 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 893 snd_dma_pci_data(ice->pci), 64*1024, 64*1024); 894 895 if (rpcm) 896 *rpcm = pcm; 897 898 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n"); 899 900 return 0; 901 } 902 903 static int __devinit snd_ice1712_pcm_ds(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 904 { 905 struct snd_pcm *pcm; 906 int err; 907 908 if (rpcm) 909 *rpcm = NULL; 910 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 911 if (err < 0) 912 return err; 913 914 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 915 916 pcm->private_data = ice; 917 pcm->info_flags = 0; 918 strcpy(pcm->name, "ICE1712 consumer (DS)"); 919 ice->pcm_ds = pcm; 920 921 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 922 snd_dma_pci_data(ice->pci), 64*1024, 128*1024); 923 924 if (rpcm) 925 *rpcm = pcm; 926 927 return 0; 928 } 929 930 /* 931 * PCM code - professional part (multitrack) 932 */ 933 934 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 935 32000, 44100, 48000, 64000, 88200, 96000 }; 936 937 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 938 .count = ARRAY_SIZE(rates), 939 .list = rates, 940 .mask = 0, 941 }; 942 943 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 944 int cmd) 945 { 946 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 947 switch (cmd) { 948 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 949 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 950 { 951 unsigned int what; 952 unsigned int old; 953 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 954 return -EINVAL; 955 what = ICE1712_PLAYBACK_PAUSE; 956 snd_pcm_trigger_done(substream, substream); 957 spin_lock(&ice->reg_lock); 958 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 959 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 960 old |= what; 961 else 962 old &= ~what; 963 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 964 spin_unlock(&ice->reg_lock); 965 break; 966 } 967 case SNDRV_PCM_TRIGGER_START: 968 case SNDRV_PCM_TRIGGER_STOP: 969 { 970 unsigned int what = 0; 971 unsigned int old; 972 struct snd_pcm_substream *s; 973 974 snd_pcm_group_for_each_entry(s, substream) { 975 if (s == ice->playback_pro_substream) { 976 what |= ICE1712_PLAYBACK_START; 977 snd_pcm_trigger_done(s, substream); 978 } else if (s == ice->capture_pro_substream) { 979 what |= ICE1712_CAPTURE_START_SHADOW; 980 snd_pcm_trigger_done(s, substream); 981 } 982 } 983 spin_lock(&ice->reg_lock); 984 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 985 if (cmd == SNDRV_PCM_TRIGGER_START) 986 old |= what; 987 else 988 old &= ~what; 989 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 990 spin_unlock(&ice->reg_lock); 991 break; 992 } 993 default: 994 return -EINVAL; 995 } 996 return 0; 997 } 998 999 /* 1000 */ 1001 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 1002 { 1003 unsigned long flags; 1004 unsigned char val, old; 1005 unsigned int i; 1006 1007 switch (rate) { 1008 case 8000: val = 6; break; 1009 case 9600: val = 3; break; 1010 case 11025: val = 10; break; 1011 case 12000: val = 2; break; 1012 case 16000: val = 5; break; 1013 case 22050: val = 9; break; 1014 case 24000: val = 1; break; 1015 case 32000: val = 4; break; 1016 case 44100: val = 8; break; 1017 case 48000: val = 0; break; 1018 case 64000: val = 15; break; 1019 case 88200: val = 11; break; 1020 case 96000: val = 7; break; 1021 default: 1022 snd_BUG(); 1023 val = 0; 1024 rate = 48000; 1025 break; 1026 } 1027 1028 spin_lock_irqsave(&ice->reg_lock, flags); 1029 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 1030 ICE1712_PLAYBACK_PAUSE| 1031 ICE1712_PLAYBACK_START)) { 1032 __out: 1033 spin_unlock_irqrestore(&ice->reg_lock, flags); 1034 return; 1035 } 1036 if (!force && is_pro_rate_locked(ice)) 1037 goto __out; 1038 1039 old = inb(ICEMT(ice, RATE)); 1040 if (!force && old == val) 1041 goto __out; 1042 outb(val, ICEMT(ice, RATE)); 1043 spin_unlock_irqrestore(&ice->reg_lock, flags); 1044 1045 if (ice->gpio.set_pro_rate) 1046 ice->gpio.set_pro_rate(ice, rate); 1047 for (i = 0; i < ice->akm_codecs; i++) { 1048 if (ice->akm[i].ops.set_rate_val) 1049 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1050 } 1051 if (ice->spdif.ops.setup_rate) 1052 ice->spdif.ops.setup_rate(ice, rate); 1053 } 1054 1055 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1056 { 1057 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1058 1059 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1060 spin_lock_irq(&ice->reg_lock); 1061 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1062 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1063 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1064 spin_unlock_irq(&ice->reg_lock); 1065 1066 return 0; 1067 } 1068 1069 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1070 struct snd_pcm_hw_params *hw_params) 1071 { 1072 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1073 1074 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1075 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1076 } 1077 1078 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1079 { 1080 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1081 1082 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1083 spin_lock_irq(&ice->reg_lock); 1084 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1085 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1086 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1087 spin_unlock_irq(&ice->reg_lock); 1088 return 0; 1089 } 1090 1091 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1092 struct snd_pcm_hw_params *hw_params) 1093 { 1094 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1095 1096 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1097 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1098 } 1099 1100 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1101 { 1102 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1103 size_t ptr; 1104 1105 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1106 return 0; 1107 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1108 if (ptr == substream->runtime->buffer_size) 1109 ptr = 0; 1110 return bytes_to_frames(substream->runtime, ptr); 1111 } 1112 1113 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1114 { 1115 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1116 size_t ptr; 1117 1118 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1119 return 0; 1120 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1121 if (ptr == substream->runtime->buffer_size) 1122 ptr = 0; 1123 return bytes_to_frames(substream->runtime, ptr); 1124 } 1125 1126 static const struct snd_pcm_hardware snd_ice1712_playback_pro = 1127 { 1128 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1129 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1130 SNDRV_PCM_INFO_MMAP_VALID | 1131 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1132 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1133 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1134 .rate_min = 4000, 1135 .rate_max = 96000, 1136 .channels_min = 10, 1137 .channels_max = 10, 1138 .buffer_bytes_max = (256*1024), 1139 .period_bytes_min = 10 * 4 * 2, 1140 .period_bytes_max = 131040, 1141 .periods_min = 1, 1142 .periods_max = 1024, 1143 .fifo_size = 0, 1144 }; 1145 1146 static const struct snd_pcm_hardware snd_ice1712_capture_pro = 1147 { 1148 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1149 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1150 SNDRV_PCM_INFO_MMAP_VALID | 1151 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1152 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1153 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1154 .rate_min = 4000, 1155 .rate_max = 96000, 1156 .channels_min = 12, 1157 .channels_max = 12, 1158 .buffer_bytes_max = (256*1024), 1159 .period_bytes_min = 12 * 4 * 2, 1160 .period_bytes_max = 131040, 1161 .periods_min = 1, 1162 .periods_max = 1024, 1163 .fifo_size = 0, 1164 }; 1165 1166 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1167 { 1168 struct snd_pcm_runtime *runtime = substream->runtime; 1169 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1170 1171 ice->playback_pro_substream = substream; 1172 runtime->hw = snd_ice1712_playback_pro; 1173 snd_pcm_set_sync(substream); 1174 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1175 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1176 1177 if (ice->spdif.ops.open) 1178 ice->spdif.ops.open(ice, substream); 1179 1180 return 0; 1181 } 1182 1183 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1184 { 1185 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1186 struct snd_pcm_runtime *runtime = substream->runtime; 1187 1188 ice->capture_pro_substream = substream; 1189 runtime->hw = snd_ice1712_capture_pro; 1190 snd_pcm_set_sync(substream); 1191 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1192 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1193 return 0; 1194 } 1195 1196 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1197 { 1198 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1199 1200 if (PRO_RATE_RESET) 1201 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1202 ice->playback_pro_substream = NULL; 1203 if (ice->spdif.ops.close) 1204 ice->spdif.ops.close(ice, substream); 1205 1206 return 0; 1207 } 1208 1209 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1210 { 1211 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1212 1213 if (PRO_RATE_RESET) 1214 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1215 ice->capture_pro_substream = NULL; 1216 return 0; 1217 } 1218 1219 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1220 .open = snd_ice1712_playback_pro_open, 1221 .close = snd_ice1712_playback_pro_close, 1222 .ioctl = snd_pcm_lib_ioctl, 1223 .hw_params = snd_ice1712_playback_pro_hw_params, 1224 .hw_free = snd_ice1712_hw_free, 1225 .prepare = snd_ice1712_playback_pro_prepare, 1226 .trigger = snd_ice1712_pro_trigger, 1227 .pointer = snd_ice1712_playback_pro_pointer, 1228 }; 1229 1230 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1231 .open = snd_ice1712_capture_pro_open, 1232 .close = snd_ice1712_capture_pro_close, 1233 .ioctl = snd_pcm_lib_ioctl, 1234 .hw_params = snd_ice1712_capture_pro_hw_params, 1235 .hw_free = snd_ice1712_hw_free, 1236 .prepare = snd_ice1712_capture_pro_prepare, 1237 .trigger = snd_ice1712_pro_trigger, 1238 .pointer = snd_ice1712_capture_pro_pointer, 1239 }; 1240 1241 static int __devinit snd_ice1712_pcm_profi(struct snd_ice1712 * ice, int device, struct snd_pcm ** rpcm) 1242 { 1243 struct snd_pcm *pcm; 1244 int err; 1245 1246 if (rpcm) 1247 *rpcm = NULL; 1248 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1249 if (err < 0) 1250 return err; 1251 1252 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1253 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1254 1255 pcm->private_data = ice; 1256 pcm->info_flags = 0; 1257 strcpy(pcm->name, "ICE1712 multi"); 1258 1259 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1260 snd_dma_pci_data(ice->pci), 256*1024, 256*1024); 1261 1262 ice->pcm_pro = pcm; 1263 if (rpcm) 1264 *rpcm = pcm; 1265 1266 if (ice->cs8427) { 1267 /* assign channels to iec958 */ 1268 err = snd_cs8427_iec958_build(ice->cs8427, 1269 pcm->streams[0].substream, 1270 pcm->streams[1].substream); 1271 if (err < 0) 1272 return err; 1273 } 1274 1275 if ((err = snd_ice1712_build_pro_mixer(ice)) < 0) 1276 return err; 1277 return 0; 1278 } 1279 1280 /* 1281 * Mixer section 1282 */ 1283 1284 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1285 { 1286 unsigned int vol = ice->pro_volumes[index]; 1287 unsigned short val = 0; 1288 1289 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1290 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1291 outb(index, ICEMT(ice, MONITOR_INDEX)); 1292 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1293 } 1294 1295 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info 1296 1297 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1298 { 1299 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1300 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1301 kcontrol->private_value; 1302 1303 spin_lock_irq(&ice->reg_lock); 1304 ucontrol->value.integer.value[0] = 1305 !((ice->pro_volumes[priv_idx] >> 15) & 1); 1306 ucontrol->value.integer.value[1] = 1307 !((ice->pro_volumes[priv_idx] >> 31) & 1); 1308 spin_unlock_irq(&ice->reg_lock); 1309 return 0; 1310 } 1311 1312 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1313 { 1314 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1315 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1316 kcontrol->private_value; 1317 unsigned int nval, change; 1318 1319 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1320 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1321 spin_lock_irq(&ice->reg_lock); 1322 nval |= ice->pro_volumes[priv_idx] & ~0x80008000; 1323 change = nval != ice->pro_volumes[priv_idx]; 1324 ice->pro_volumes[priv_idx] = nval; 1325 snd_ice1712_update_volume(ice, priv_idx); 1326 spin_unlock_irq(&ice->reg_lock); 1327 return change; 1328 } 1329 1330 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1331 { 1332 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1333 uinfo->count = 2; 1334 uinfo->value.integer.min = 0; 1335 uinfo->value.integer.max = 96; 1336 return 0; 1337 } 1338 1339 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1340 { 1341 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1342 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1343 kcontrol->private_value; 1344 1345 spin_lock_irq(&ice->reg_lock); 1346 ucontrol->value.integer.value[0] = 1347 (ice->pro_volumes[priv_idx] >> 0) & 127; 1348 ucontrol->value.integer.value[1] = 1349 (ice->pro_volumes[priv_idx] >> 16) & 127; 1350 spin_unlock_irq(&ice->reg_lock); 1351 return 0; 1352 } 1353 1354 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1355 { 1356 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1357 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1358 kcontrol->private_value; 1359 unsigned int nval, change; 1360 1361 nval = (ucontrol->value.integer.value[0] & 127) | 1362 ((ucontrol->value.integer.value[1] & 127) << 16); 1363 spin_lock_irq(&ice->reg_lock); 1364 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f; 1365 change = nval != ice->pro_volumes[priv_idx]; 1366 ice->pro_volumes[priv_idx] = nval; 1367 snd_ice1712_update_volume(ice, priv_idx); 1368 spin_unlock_irq(&ice->reg_lock); 1369 return change; 1370 } 1371 1372 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1373 1374 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] __devinitdata = { 1375 { 1376 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1377 .name = "Multi Playback Switch", 1378 .info = snd_ice1712_pro_mixer_switch_info, 1379 .get = snd_ice1712_pro_mixer_switch_get, 1380 .put = snd_ice1712_pro_mixer_switch_put, 1381 .private_value = 0, 1382 .count = 10, 1383 }, 1384 { 1385 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1386 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1387 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1388 .name = "Multi Playback Volume", 1389 .info = snd_ice1712_pro_mixer_volume_info, 1390 .get = snd_ice1712_pro_mixer_volume_get, 1391 .put = snd_ice1712_pro_mixer_volume_put, 1392 .private_value = 0, 1393 .count = 10, 1394 .tlv = { .p = db_scale_playback } 1395 }, 1396 }; 1397 1398 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch __devinitdata = { 1399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1400 .name = "H/W Multi Capture Switch", 1401 .info = snd_ice1712_pro_mixer_switch_info, 1402 .get = snd_ice1712_pro_mixer_switch_get, 1403 .put = snd_ice1712_pro_mixer_switch_put, 1404 .private_value = 10, 1405 }; 1406 1407 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch __devinitdata = { 1408 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1409 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,SWITCH), 1410 .info = snd_ice1712_pro_mixer_switch_info, 1411 .get = snd_ice1712_pro_mixer_switch_get, 1412 .put = snd_ice1712_pro_mixer_switch_put, 1413 .private_value = 18, 1414 .count = 2, 1415 }; 1416 1417 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume __devinitdata = { 1418 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1419 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1420 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1421 .name = "H/W Multi Capture Volume", 1422 .info = snd_ice1712_pro_mixer_volume_info, 1423 .get = snd_ice1712_pro_mixer_volume_get, 1424 .put = snd_ice1712_pro_mixer_volume_put, 1425 .private_value = 10, 1426 .tlv = { .p = db_scale_playback } 1427 }; 1428 1429 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume __devinitdata = { 1430 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1431 .name = SNDRV_CTL_NAME_IEC958("Multi ",CAPTURE,VOLUME), 1432 .info = snd_ice1712_pro_mixer_volume_info, 1433 .get = snd_ice1712_pro_mixer_volume_get, 1434 .put = snd_ice1712_pro_mixer_volume_put, 1435 .private_value = 18, 1436 .count = 2, 1437 }; 1438 1439 static int __devinit snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1440 { 1441 struct snd_card *card = ice->card; 1442 unsigned int idx; 1443 int err; 1444 1445 /* multi-channel mixer */ 1446 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1447 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1448 if (err < 0) 1449 return err; 1450 } 1451 1452 if (ice->num_total_adcs > 0) { 1453 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1454 tmp.count = ice->num_total_adcs; 1455 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1456 if (err < 0) 1457 return err; 1458 } 1459 1460 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1461 if (err < 0) 1462 return err; 1463 1464 if (ice->num_total_adcs > 0) { 1465 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1466 tmp.count = ice->num_total_adcs; 1467 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1468 if (err < 0) 1469 return err; 1470 } 1471 1472 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1473 if (err < 0) 1474 return err; 1475 1476 /* initialize volumes */ 1477 for (idx = 0; idx < 10; idx++) { 1478 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1479 snd_ice1712_update_volume(ice, idx); 1480 } 1481 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1482 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1483 snd_ice1712_update_volume(ice, idx); 1484 } 1485 for (idx = 18; idx < 20; idx++) { 1486 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1487 snd_ice1712_update_volume(ice, idx); 1488 } 1489 return 0; 1490 } 1491 1492 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1493 { 1494 struct snd_ice1712 *ice = ac97->private_data; 1495 ice->ac97 = NULL; 1496 } 1497 1498 static int __devinit snd_ice1712_ac97_mixer(struct snd_ice1712 * ice) 1499 { 1500 int err, bus_num = 0; 1501 struct snd_ac97_template ac97; 1502 struct snd_ac97_bus *pbus; 1503 static struct snd_ac97_bus_ops con_ops = { 1504 .write = snd_ice1712_ac97_write, 1505 .read = snd_ice1712_ac97_read, 1506 }; 1507 static struct snd_ac97_bus_ops pro_ops = { 1508 .write = snd_ice1712_pro_ac97_write, 1509 .read = snd_ice1712_pro_ac97_read, 1510 }; 1511 1512 if (ice_has_con_ac97(ice)) { 1513 if ((err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus)) < 0) 1514 return err; 1515 memset(&ac97, 0, sizeof(ac97)); 1516 ac97.private_data = ice; 1517 ac97.private_free = snd_ice1712_mixer_free_ac97; 1518 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) 1519 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n"); 1520 else { 1521 if ((err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice))) < 0) 1522 return err; 1523 return 0; 1524 } 1525 } 1526 1527 if (! (ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1528 if ((err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus)) < 0) 1529 return err; 1530 memset(&ac97, 0, sizeof(ac97)); 1531 ac97.private_data = ice; 1532 ac97.private_free = snd_ice1712_mixer_free_ac97; 1533 if ((err = snd_ac97_mixer(pbus, &ac97, &ice->ac97)) < 0) 1534 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n"); 1535 else 1536 return 0; 1537 } 1538 /* I2S mixer only */ 1539 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1540 return 0; 1541 } 1542 1543 /* 1544 * 1545 */ 1546 1547 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1548 { 1549 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1550 } 1551 1552 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1553 struct snd_info_buffer *buffer) 1554 { 1555 struct snd_ice1712 *ice = entry->private_data; 1556 unsigned int idx; 1557 1558 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1559 snd_iprintf(buffer, "EEPROM:\n"); 1560 1561 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1562 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1563 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1564 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1565 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1566 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1567 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1568 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1569 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1570 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1571 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1572 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1573 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1574 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1575 for (idx = 0; idx < 4; idx++) 1576 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1577 for (idx = 0; idx < 4; idx++) 1578 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1579 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1580 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1581 1582 snd_iprintf(buffer, "\nRegisters:\n"); 1583 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1584 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1585 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1586 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1587 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1588 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1589 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1590 } 1591 1592 static void __devinit snd_ice1712_proc_init(struct snd_ice1712 * ice) 1593 { 1594 struct snd_info_entry *entry; 1595 1596 if (! snd_card_proc_new(ice->card, "ice1712", &entry)) 1597 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read); 1598 } 1599 1600 /* 1601 * 1602 */ 1603 1604 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1605 struct snd_ctl_elem_info *uinfo) 1606 { 1607 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1608 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1609 return 0; 1610 } 1611 1612 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1613 struct snd_ctl_elem_value *ucontrol) 1614 { 1615 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1616 1617 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1618 return 0; 1619 } 1620 1621 static struct snd_kcontrol_new snd_ice1712_eeprom __devinitdata = { 1622 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1623 .name = "ICE1712 EEPROM", 1624 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1625 .info = snd_ice1712_eeprom_info, 1626 .get = snd_ice1712_eeprom_get 1627 }; 1628 1629 /* 1630 */ 1631 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1632 struct snd_ctl_elem_info *uinfo) 1633 { 1634 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1635 uinfo->count = 1; 1636 return 0; 1637 } 1638 1639 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1640 struct snd_ctl_elem_value *ucontrol) 1641 { 1642 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1643 if (ice->spdif.ops.default_get) 1644 ice->spdif.ops.default_get(ice, ucontrol); 1645 return 0; 1646 } 1647 1648 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1649 struct snd_ctl_elem_value *ucontrol) 1650 { 1651 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1652 if (ice->spdif.ops.default_put) 1653 return ice->spdif.ops.default_put(ice, ucontrol); 1654 return 0; 1655 } 1656 1657 static struct snd_kcontrol_new snd_ice1712_spdif_default __devinitdata = 1658 { 1659 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1660 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1661 .info = snd_ice1712_spdif_info, 1662 .get = snd_ice1712_spdif_default_get, 1663 .put = snd_ice1712_spdif_default_put 1664 }; 1665 1666 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1667 struct snd_ctl_elem_value *ucontrol) 1668 { 1669 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1670 if (ice->spdif.ops.default_get) { 1671 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1672 IEC958_AES0_PROFESSIONAL | 1673 IEC958_AES0_CON_NOT_COPYRIGHT | 1674 IEC958_AES0_CON_EMPHASIS; 1675 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1676 IEC958_AES1_CON_CATEGORY; 1677 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1678 } else { 1679 ucontrol->value.iec958.status[0] = 0xff; 1680 ucontrol->value.iec958.status[1] = 0xff; 1681 ucontrol->value.iec958.status[2] = 0xff; 1682 ucontrol->value.iec958.status[3] = 0xff; 1683 ucontrol->value.iec958.status[4] = 0xff; 1684 } 1685 return 0; 1686 } 1687 1688 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1689 struct snd_ctl_elem_value *ucontrol) 1690 { 1691 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1692 if (ice->spdif.ops.default_get) { 1693 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1694 IEC958_AES0_PROFESSIONAL | 1695 IEC958_AES0_PRO_FS | 1696 IEC958_AES0_PRO_EMPHASIS; 1697 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1698 } else { 1699 ucontrol->value.iec958.status[0] = 0xff; 1700 ucontrol->value.iec958.status[1] = 0xff; 1701 ucontrol->value.iec958.status[2] = 0xff; 1702 ucontrol->value.iec958.status[3] = 0xff; 1703 ucontrol->value.iec958.status[4] = 0xff; 1704 } 1705 return 0; 1706 } 1707 1708 static struct snd_kcontrol_new snd_ice1712_spdif_maskc __devinitdata = 1709 { 1710 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1711 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1712 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK), 1713 .info = snd_ice1712_spdif_info, 1714 .get = snd_ice1712_spdif_maskc_get, 1715 }; 1716 1717 static struct snd_kcontrol_new snd_ice1712_spdif_maskp __devinitdata = 1718 { 1719 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1720 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1721 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK), 1722 .info = snd_ice1712_spdif_info, 1723 .get = snd_ice1712_spdif_maskp_get, 1724 }; 1725 1726 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1727 struct snd_ctl_elem_value *ucontrol) 1728 { 1729 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1730 if (ice->spdif.ops.stream_get) 1731 ice->spdif.ops.stream_get(ice, ucontrol); 1732 return 0; 1733 } 1734 1735 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1736 struct snd_ctl_elem_value *ucontrol) 1737 { 1738 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1739 if (ice->spdif.ops.stream_put) 1740 return ice->spdif.ops.stream_put(ice, ucontrol); 1741 return 0; 1742 } 1743 1744 static struct snd_kcontrol_new snd_ice1712_spdif_stream __devinitdata = 1745 { 1746 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1747 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1748 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1749 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM), 1750 .info = snd_ice1712_spdif_info, 1751 .get = snd_ice1712_spdif_stream_get, 1752 .put = snd_ice1712_spdif_stream_put 1753 }; 1754 1755 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1756 struct snd_ctl_elem_value *ucontrol) 1757 { 1758 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1759 unsigned char mask = kcontrol->private_value & 0xff; 1760 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1761 1762 snd_ice1712_save_gpio_status(ice); 1763 ucontrol->value.integer.value[0] = 1764 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1765 snd_ice1712_restore_gpio_status(ice); 1766 return 0; 1767 } 1768 1769 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1770 struct snd_ctl_elem_value *ucontrol) 1771 { 1772 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1773 unsigned char mask = kcontrol->private_value & 0xff; 1774 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1775 unsigned int val, nval; 1776 1777 if (kcontrol->private_value & (1 << 31)) 1778 return -EPERM; 1779 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1780 snd_ice1712_save_gpio_status(ice); 1781 val = snd_ice1712_gpio_read(ice); 1782 nval |= val & ~mask; 1783 if (val != nval) 1784 snd_ice1712_gpio_write(ice, nval); 1785 snd_ice1712_restore_gpio_status(ice); 1786 return val != nval; 1787 } 1788 1789 /* 1790 * rate 1791 */ 1792 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1793 struct snd_ctl_elem_info *uinfo) 1794 { 1795 static const char * const texts[] = { 1796 "8000", /* 0: 6 */ 1797 "9600", /* 1: 3 */ 1798 "11025", /* 2: 10 */ 1799 "12000", /* 3: 2 */ 1800 "16000", /* 4: 5 */ 1801 "22050", /* 5: 9 */ 1802 "24000", /* 6: 1 */ 1803 "32000", /* 7: 4 */ 1804 "44100", /* 8: 8 */ 1805 "48000", /* 9: 0 */ 1806 "64000", /* 10: 15 */ 1807 "88200", /* 11: 11 */ 1808 "96000", /* 12: 7 */ 1809 "IEC958 Input", /* 13: -- */ 1810 }; 1811 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1812 uinfo->count = 1; 1813 uinfo->value.enumerated.items = 14; 1814 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1815 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1816 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1817 return 0; 1818 } 1819 1820 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1821 struct snd_ctl_elem_value *ucontrol) 1822 { 1823 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1824 static const unsigned char xlate[16] = { 1825 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1826 }; 1827 unsigned char val; 1828 1829 spin_lock_irq(&ice->reg_lock); 1830 if (is_spdif_master(ice)) { 1831 ucontrol->value.enumerated.item[0] = 13; 1832 } else { 1833 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1834 if (val == 255) { 1835 snd_BUG(); 1836 val = 0; 1837 } 1838 ucontrol->value.enumerated.item[0] = val; 1839 } 1840 spin_unlock_irq(&ice->reg_lock); 1841 return 0; 1842 } 1843 1844 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1845 struct snd_ctl_elem_value *ucontrol) 1846 { 1847 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1848 static const unsigned int xrate[13] = { 1849 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1850 32000, 44100, 48000, 64000, 88200, 96000 1851 }; 1852 unsigned char oval; 1853 int change = 0; 1854 1855 spin_lock_irq(&ice->reg_lock); 1856 oval = inb(ICEMT(ice, RATE)); 1857 if (ucontrol->value.enumerated.item[0] == 13) { 1858 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1859 } else { 1860 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1861 spin_unlock_irq(&ice->reg_lock); 1862 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1863 spin_lock_irq(&ice->reg_lock); 1864 } 1865 change = inb(ICEMT(ice, RATE)) != oval; 1866 spin_unlock_irq(&ice->reg_lock); 1867 1868 if ((oval & ICE1712_SPDIF_MASTER) != 1869 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1870 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1871 1872 return change; 1873 } 1874 1875 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock __devinitdata = { 1876 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1877 .name = "Multi Track Internal Clock", 1878 .info = snd_ice1712_pro_internal_clock_info, 1879 .get = snd_ice1712_pro_internal_clock_get, 1880 .put = snd_ice1712_pro_internal_clock_put 1881 }; 1882 1883 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1884 struct snd_ctl_elem_info *uinfo) 1885 { 1886 static const char * const texts[] = { 1887 "8000", /* 0: 6 */ 1888 "9600", /* 1: 3 */ 1889 "11025", /* 2: 10 */ 1890 "12000", /* 3: 2 */ 1891 "16000", /* 4: 5 */ 1892 "22050", /* 5: 9 */ 1893 "24000", /* 6: 1 */ 1894 "32000", /* 7: 4 */ 1895 "44100", /* 8: 8 */ 1896 "48000", /* 9: 0 */ 1897 "64000", /* 10: 15 */ 1898 "88200", /* 11: 11 */ 1899 "96000", /* 12: 7 */ 1900 // "IEC958 Input", /* 13: -- */ 1901 }; 1902 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1903 uinfo->count = 1; 1904 uinfo->value.enumerated.items = 13; 1905 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 1906 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 1907 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1908 return 0; 1909 } 1910 1911 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1912 struct snd_ctl_elem_value *ucontrol) 1913 { 1914 int val; 1915 static const unsigned int xrate[13] = { 1916 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1917 32000, 44100, 48000, 64000, 88200, 96000 1918 }; 1919 1920 for (val = 0; val < 13; val++) { 1921 if (xrate[val] == PRO_RATE_DEFAULT) 1922 break; 1923 } 1924 1925 ucontrol->value.enumerated.item[0] = val; 1926 return 0; 1927 } 1928 1929 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1930 struct snd_ctl_elem_value *ucontrol) 1931 { 1932 static const unsigned int xrate[13] = { 1933 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1934 32000, 44100, 48000, 64000, 88200, 96000 1935 }; 1936 unsigned char oval; 1937 int change = 0; 1938 1939 oval = PRO_RATE_DEFAULT; 1940 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1941 change = PRO_RATE_DEFAULT != oval; 1942 1943 return change; 1944 } 1945 1946 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default __devinitdata = { 1947 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1948 .name = "Multi Track Internal Clock Default", 1949 .info = snd_ice1712_pro_internal_clock_default_info, 1950 .get = snd_ice1712_pro_internal_clock_default_get, 1951 .put = snd_ice1712_pro_internal_clock_default_put 1952 }; 1953 1954 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info 1955 1956 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1957 struct snd_ctl_elem_value *ucontrol) 1958 { 1959 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1960 return 0; 1961 } 1962 1963 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1964 struct snd_ctl_elem_value *ucontrol) 1965 { 1966 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1967 int change = 0, nval; 1968 1969 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1970 spin_lock_irq(&ice->reg_lock); 1971 change = PRO_RATE_LOCKED != nval; 1972 PRO_RATE_LOCKED = nval; 1973 spin_unlock_irq(&ice->reg_lock); 1974 return change; 1975 } 1976 1977 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking __devinitdata = { 1978 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1979 .name = "Multi Track Rate Locking", 1980 .info = snd_ice1712_pro_rate_locking_info, 1981 .get = snd_ice1712_pro_rate_locking_get, 1982 .put = snd_ice1712_pro_rate_locking_put 1983 }; 1984 1985 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info 1986 1987 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1988 struct snd_ctl_elem_value *ucontrol) 1989 { 1990 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 1991 return 0; 1992 } 1993 1994 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1995 struct snd_ctl_elem_value *ucontrol) 1996 { 1997 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1998 int change = 0, nval; 1999 2000 nval = ucontrol->value.integer.value[0] ? 1 : 0; 2001 spin_lock_irq(&ice->reg_lock); 2002 change = PRO_RATE_RESET != nval; 2003 PRO_RATE_RESET = nval; 2004 spin_unlock_irq(&ice->reg_lock); 2005 return change; 2006 } 2007 2008 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset __devinitdata = { 2009 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2010 .name = "Multi Track Rate Reset", 2011 .info = snd_ice1712_pro_rate_reset_info, 2012 .get = snd_ice1712_pro_rate_reset_get, 2013 .put = snd_ice1712_pro_rate_reset_put 2014 }; 2015 2016 /* 2017 * routing 2018 */ 2019 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 2020 struct snd_ctl_elem_info *uinfo) 2021 { 2022 static const char * const texts[] = { 2023 "PCM Out", /* 0 */ 2024 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 2025 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 2026 "IEC958 In L", "IEC958 In R", /* 9-10 */ 2027 "Digital Mixer", /* 11 - optional */ 2028 }; 2029 2030 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 2031 uinfo->count = 1; 2032 uinfo->value.enumerated.items = 2033 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 2034 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) 2035 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; 2036 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 2037 return 0; 2038 } 2039 2040 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2041 struct snd_ctl_elem_value *ucontrol) 2042 { 2043 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2044 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2045 unsigned int val, cval; 2046 2047 spin_lock_irq(&ice->reg_lock); 2048 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2049 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 2050 spin_unlock_irq(&ice->reg_lock); 2051 2052 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2053 val &= 3; 2054 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2055 if (val == 1 && idx < 2) 2056 ucontrol->value.enumerated.item[0] = 11; 2057 else if (val == 2) 2058 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2059 else if (val == 3) 2060 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2061 else 2062 ucontrol->value.enumerated.item[0] = 0; 2063 return 0; 2064 } 2065 2066 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2067 struct snd_ctl_elem_value *ucontrol) 2068 { 2069 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2070 int change, shift; 2071 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2072 unsigned int val, old_val, nval; 2073 2074 /* update PSDOUT */ 2075 if (ucontrol->value.enumerated.item[0] >= 11) 2076 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2077 else if (ucontrol->value.enumerated.item[0] >= 9) 2078 nval = 3; /* spdif in */ 2079 else if (ucontrol->value.enumerated.item[0] >= 1) 2080 nval = 2; /* analog in */ 2081 else 2082 nval = 0; /* pcm */ 2083 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2084 spin_lock_irq(&ice->reg_lock); 2085 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2086 val &= ~(0x03 << shift); 2087 val |= nval << shift; 2088 change = val != old_val; 2089 if (change) 2090 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2091 spin_unlock_irq(&ice->reg_lock); 2092 if (nval < 2) /* dig mixer of pcm */ 2093 return change; 2094 2095 /* update CAPTURE */ 2096 spin_lock_irq(&ice->reg_lock); 2097 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2098 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2099 if (nval == 2) { /* analog in */ 2100 nval = ucontrol->value.enumerated.item[0] - 1; 2101 val &= ~(0x07 << shift); 2102 val |= nval << shift; 2103 } else { /* spdif in */ 2104 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2105 val &= ~(0x08 << shift); 2106 val |= nval << shift; 2107 } 2108 if (val != old_val) { 2109 change = 1; 2110 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2111 } 2112 spin_unlock_irq(&ice->reg_lock); 2113 return change; 2114 } 2115 2116 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2117 struct snd_ctl_elem_value *ucontrol) 2118 { 2119 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2120 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2121 unsigned int val, cval; 2122 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2123 cval = (val >> (idx * 4 + 8)) & 0x0f; 2124 val = (val >> (idx * 2)) & 0x03; 2125 if (val == 1) 2126 ucontrol->value.enumerated.item[0] = 11; 2127 else if (val == 2) 2128 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2129 else if (val == 3) 2130 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2131 else 2132 ucontrol->value.enumerated.item[0] = 0; 2133 return 0; 2134 } 2135 2136 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2137 struct snd_ctl_elem_value *ucontrol) 2138 { 2139 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2140 int change, shift; 2141 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2142 unsigned int val, old_val, nval; 2143 2144 /* update SPDOUT */ 2145 spin_lock_irq(&ice->reg_lock); 2146 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2147 if (ucontrol->value.enumerated.item[0] >= 11) 2148 nval = 1; 2149 else if (ucontrol->value.enumerated.item[0] >= 9) 2150 nval = 3; 2151 else if (ucontrol->value.enumerated.item[0] >= 1) 2152 nval = 2; 2153 else 2154 nval = 0; 2155 shift = idx * 2; 2156 val &= ~(0x03 << shift); 2157 val |= nval << shift; 2158 shift = idx * 4 + 8; 2159 if (nval == 2) { 2160 nval = ucontrol->value.enumerated.item[0] - 1; 2161 val &= ~(0x07 << shift); 2162 val |= nval << shift; 2163 } else if (nval == 3) { 2164 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2165 val &= ~(0x08 << shift); 2166 val |= nval << shift; 2167 } 2168 change = val != old_val; 2169 if (change) 2170 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2171 spin_unlock_irq(&ice->reg_lock); 2172 return change; 2173 } 2174 2175 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route __devinitdata = { 2176 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2177 .name = "H/W Playback Route", 2178 .info = snd_ice1712_pro_route_info, 2179 .get = snd_ice1712_pro_route_analog_get, 2180 .put = snd_ice1712_pro_route_analog_put, 2181 }; 2182 2183 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route __devinitdata = { 2184 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2185 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,NONE) "Route", 2186 .info = snd_ice1712_pro_route_info, 2187 .get = snd_ice1712_pro_route_spdif_get, 2188 .put = snd_ice1712_pro_route_spdif_put, 2189 .count = 2, 2190 }; 2191 2192 2193 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2194 struct snd_ctl_elem_info *uinfo) 2195 { 2196 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2197 uinfo->count = 1; 2198 uinfo->value.integer.min = 0; 2199 uinfo->value.integer.max = 255; 2200 return 0; 2201 } 2202 2203 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2204 struct snd_ctl_elem_value *ucontrol) 2205 { 2206 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2207 2208 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2209 return 0; 2210 } 2211 2212 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2213 struct snd_ctl_elem_value *ucontrol) 2214 { 2215 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2216 int change; 2217 2218 spin_lock_irq(&ice->reg_lock); 2219 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2220 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2221 spin_unlock_irq(&ice->reg_lock); 2222 return change; 2223 } 2224 2225 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate __devinitdata = { 2226 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2227 .name = "Multi Track Volume Rate", 2228 .info = snd_ice1712_pro_volume_rate_info, 2229 .get = snd_ice1712_pro_volume_rate_get, 2230 .put = snd_ice1712_pro_volume_rate_put 2231 }; 2232 2233 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2234 struct snd_ctl_elem_info *uinfo) 2235 { 2236 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2237 uinfo->count = 22; 2238 uinfo->value.integer.min = 0; 2239 uinfo->value.integer.max = 255; 2240 return 0; 2241 } 2242 2243 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2244 struct snd_ctl_elem_value *ucontrol) 2245 { 2246 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2247 int idx; 2248 2249 spin_lock_irq(&ice->reg_lock); 2250 for (idx = 0; idx < 22; idx++) { 2251 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2252 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2253 } 2254 spin_unlock_irq(&ice->reg_lock); 2255 return 0; 2256 } 2257 2258 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak __devinitdata = { 2259 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2260 .name = "Multi Track Peak", 2261 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2262 .info = snd_ice1712_pro_peak_info, 2263 .get = snd_ice1712_pro_peak_get 2264 }; 2265 2266 /* 2267 * 2268 */ 2269 2270 /* 2271 * list of available boards 2272 */ 2273 static struct snd_ice1712_card_info *card_tables[] __devinitdata = { 2274 snd_ice1712_hoontech_cards, 2275 snd_ice1712_delta_cards, 2276 snd_ice1712_ews_cards, 2277 NULL, 2278 }; 2279 2280 static unsigned char __devinit snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2281 unsigned char dev, 2282 unsigned char addr) 2283 { 2284 long t = 0x10000; 2285 2286 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2287 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2288 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2289 return inb(ICEREG(ice, I2C_DATA)); 2290 } 2291 2292 static int __devinit snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2293 const char *modelname) 2294 { 2295 int dev = 0xa0; /* EEPROM device address */ 2296 unsigned int i, size; 2297 struct snd_ice1712_card_info * const *tbl, *c; 2298 2299 if (! modelname || ! *modelname) { 2300 ice->eeprom.subvendor = 0; 2301 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2302 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2303 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2304 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2305 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2306 if (ice->eeprom.subvendor == 0 || 2307 ice->eeprom.subvendor == (unsigned int)-1) { 2308 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2309 u16 vendor, device; 2310 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2311 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2312 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2313 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2314 printk(KERN_ERR "ice1712: No valid ID is found\n"); 2315 return -ENXIO; 2316 } 2317 } 2318 } 2319 for (tbl = card_tables; *tbl; tbl++) { 2320 for (c = *tbl; c->subvendor; c++) { 2321 if (modelname && c->model && ! strcmp(modelname, c->model)) { 2322 printk(KERN_INFO "ice1712: Using board model %s\n", c->name); 2323 ice->eeprom.subvendor = c->subvendor; 2324 } else if (c->subvendor != ice->eeprom.subvendor) 2325 continue; 2326 if (! c->eeprom_size || ! c->eeprom_data) 2327 goto found; 2328 /* if the EEPROM is given by the driver, use it */ 2329 snd_printdd("using the defined eeprom..\n"); 2330 ice->eeprom.version = 1; 2331 ice->eeprom.size = c->eeprom_size + 6; 2332 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2333 goto read_skipped; 2334 } 2335 } 2336 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n", 2337 ice->eeprom.subvendor); 2338 2339 found: 2340 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2341 if (ice->eeprom.size < 6) 2342 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2343 else if (ice->eeprom.size > 32) { 2344 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2345 return -EIO; 2346 } 2347 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2348 if (ice->eeprom.version != 1) { 2349 snd_printk(KERN_ERR "invalid EEPROM version %i\n", 2350 ice->eeprom.version); 2351 /* return -EIO; */ 2352 } 2353 size = ice->eeprom.size - 6; 2354 for (i = 0; i < size; i++) 2355 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2356 2357 read_skipped: 2358 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2359 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2360 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2361 2362 return 0; 2363 } 2364 2365 2366 2367 static int __devinit snd_ice1712_chip_init(struct snd_ice1712 *ice) 2368 { 2369 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2370 udelay(200); 2371 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2372 udelay(200); 2373 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2374 !ice->dxr_enable) 2375 /* Set eeprom value to limit active ADCs and DACs to 6; 2376 * Also disable AC97 as no hardware in standard 6fire card/box 2377 * Note: DXR extensions are not currently supported 2378 */ 2379 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2380 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2381 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2382 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2383 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2384 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2385 ice->gpio.write_mask = ice->eeprom.gpiomask; 2386 ice->gpio.direction = ice->eeprom.gpiodir; 2387 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2388 ice->eeprom.gpiomask); 2389 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2390 ice->eeprom.gpiodir); 2391 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2392 ice->eeprom.gpiostate); 2393 } else { 2394 ice->gpio.write_mask = 0xc0; 2395 ice->gpio.direction = 0xff; 2396 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2397 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2398 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2399 ICE1712_STDSP24_CLOCK_BIT); 2400 } 2401 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2402 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2403 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2404 udelay(100); 2405 outb(0, ICEREG(ice, AC97_CMD)); 2406 udelay(200); 2407 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2408 } 2409 snd_ice1712_set_pro_rate(ice, 48000, 1); 2410 2411 return 0; 2412 } 2413 2414 int __devinit snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2415 { 2416 int err; 2417 struct snd_kcontrol *kctl; 2418 2419 snd_assert(ice->pcm_pro != NULL, return -EIO); 2420 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2421 if (err < 0) 2422 return err; 2423 kctl->id.device = ice->pcm_pro->device; 2424 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2425 if (err < 0) 2426 return err; 2427 kctl->id.device = ice->pcm_pro->device; 2428 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2429 if (err < 0) 2430 return err; 2431 kctl->id.device = ice->pcm_pro->device; 2432 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2433 if (err < 0) 2434 return err; 2435 kctl->id.device = ice->pcm_pro->device; 2436 ice->spdif.stream_ctl = kctl; 2437 return 0; 2438 } 2439 2440 2441 static int __devinit snd_ice1712_build_controls(struct snd_ice1712 *ice) 2442 { 2443 int err; 2444 2445 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2446 if (err < 0) 2447 return err; 2448 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2449 if (err < 0) 2450 return err; 2451 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2452 if (err < 0) 2453 return err; 2454 2455 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2456 if (err < 0) 2457 return err; 2458 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2459 if (err < 0) 2460 return err; 2461 2462 if (ice->num_total_dacs > 0) { 2463 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2464 tmp.count = ice->num_total_dacs; 2465 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2466 if (err < 0) 2467 return err; 2468 } 2469 2470 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2471 if (err < 0) 2472 return err; 2473 2474 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2475 if (err < 0) 2476 return err; 2477 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2478 if (err < 0) 2479 return err; 2480 2481 return 0; 2482 } 2483 2484 static int snd_ice1712_free(struct snd_ice1712 *ice) 2485 { 2486 if (! ice->port) 2487 goto __hw_end; 2488 /* mask all interrupts */ 2489 outb(0xc0, ICEMT(ice, IRQ)); 2490 outb(0xff, ICEREG(ice, IRQMASK)); 2491 /* --- */ 2492 __hw_end: 2493 if (ice->irq >= 0) 2494 free_irq(ice->irq, ice); 2495 2496 if (ice->port) 2497 pci_release_regions(ice->pci); 2498 snd_ice1712_akm4xxx_free(ice); 2499 pci_disable_device(ice->pci); 2500 kfree(ice->spec); 2501 kfree(ice); 2502 return 0; 2503 } 2504 2505 static int snd_ice1712_dev_free(struct snd_device *device) 2506 { 2507 struct snd_ice1712 *ice = device->device_data; 2508 return snd_ice1712_free(ice); 2509 } 2510 2511 static int __devinit snd_ice1712_create(struct snd_card *card, 2512 struct pci_dev *pci, 2513 const char *modelname, 2514 int omni, 2515 int cs8427_timeout, 2516 int dxr_enable, 2517 struct snd_ice1712 ** r_ice1712) 2518 { 2519 struct snd_ice1712 *ice; 2520 int err; 2521 static struct snd_device_ops ops = { 2522 .dev_free = snd_ice1712_dev_free, 2523 }; 2524 2525 *r_ice1712 = NULL; 2526 2527 /* enable PCI device */ 2528 if ((err = pci_enable_device(pci)) < 0) 2529 return err; 2530 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2531 if (pci_set_dma_mask(pci, DMA_28BIT_MASK) < 0 || 2532 pci_set_consistent_dma_mask(pci, DMA_28BIT_MASK) < 0) { 2533 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n"); 2534 pci_disable_device(pci); 2535 return -ENXIO; 2536 } 2537 2538 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2539 if (ice == NULL) { 2540 pci_disable_device(pci); 2541 return -ENOMEM; 2542 } 2543 ice->omni = omni ? 1 : 0; 2544 if (cs8427_timeout < 1) 2545 cs8427_timeout = 1; 2546 else if (cs8427_timeout > 1000) 2547 cs8427_timeout = 1000; 2548 ice->cs8427_timeout = cs8427_timeout; 2549 ice->dxr_enable = dxr_enable; 2550 spin_lock_init(&ice->reg_lock); 2551 mutex_init(&ice->gpio_mutex); 2552 mutex_init(&ice->i2c_mutex); 2553 mutex_init(&ice->open_mutex); 2554 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2555 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2556 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2557 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2558 2559 ice->spdif.cs8403_bits = 2560 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2561 0x10 | /* no emphasis */ 2562 0x20); /* PCM encoder/decoder */ 2563 ice->card = card; 2564 ice->pci = pci; 2565 ice->irq = -1; 2566 pci_set_master(pci); 2567 pci_write_config_word(ice->pci, 0x40, 0x807f); 2568 pci_write_config_word(ice->pci, 0x42, 0x0006); 2569 snd_ice1712_proc_init(ice); 2570 synchronize_irq(pci->irq); 2571 2572 if ((err = pci_request_regions(pci, "ICE1712")) < 0) { 2573 kfree(ice); 2574 pci_disable_device(pci); 2575 return err; 2576 } 2577 ice->port = pci_resource_start(pci, 0); 2578 ice->ddma_port = pci_resource_start(pci, 1); 2579 ice->dmapath_port = pci_resource_start(pci, 2); 2580 ice->profi_port = pci_resource_start(pci, 3); 2581 2582 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2583 "ICE1712", ice)) { 2584 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); 2585 snd_ice1712_free(ice); 2586 return -EIO; 2587 } 2588 2589 ice->irq = pci->irq; 2590 2591 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2592 snd_ice1712_free(ice); 2593 return -EIO; 2594 } 2595 if (snd_ice1712_chip_init(ice) < 0) { 2596 snd_ice1712_free(ice); 2597 return -EIO; 2598 } 2599 2600 /* unmask used interrupts */ 2601 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2602 ICE1712_IRQ_MPU2 : 0) | 2603 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2604 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2605 ICEREG(ice, IRQMASK)); 2606 outb(0x00, ICEMT(ice, IRQ)); 2607 2608 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops)) < 0) { 2609 snd_ice1712_free(ice); 2610 return err; 2611 } 2612 2613 snd_card_set_dev(card, &pci->dev); 2614 2615 *r_ice1712 = ice; 2616 return 0; 2617 } 2618 2619 2620 /* 2621 * 2622 * Registration 2623 * 2624 */ 2625 2626 static struct snd_ice1712_card_info no_matched __devinitdata; 2627 2628 static int __devinit snd_ice1712_probe(struct pci_dev *pci, 2629 const struct pci_device_id *pci_id) 2630 { 2631 static int dev; 2632 struct snd_card *card; 2633 struct snd_ice1712 *ice; 2634 int pcm_dev = 0, err; 2635 struct snd_ice1712_card_info * const *tbl, *c; 2636 2637 if (dev >= SNDRV_CARDS) 2638 return -ENODEV; 2639 if (!enable[dev]) { 2640 dev++; 2641 return -ENOENT; 2642 } 2643 2644 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 2645 if (card == NULL) 2646 return -ENOMEM; 2647 2648 strcpy(card->driver, "ICE1712"); 2649 strcpy(card->shortname, "ICEnsemble ICE1712"); 2650 2651 if ((err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2652 cs8427_timeout[dev], dxr_enable[dev], 2653 &ice)) < 0) { 2654 snd_card_free(card); 2655 return err; 2656 } 2657 2658 for (tbl = card_tables; *tbl; tbl++) { 2659 for (c = *tbl; c->subvendor; c++) { 2660 if (c->subvendor == ice->eeprom.subvendor) { 2661 strcpy(card->shortname, c->name); 2662 if (c->driver) /* specific driver? */ 2663 strcpy(card->driver, c->driver); 2664 if (c->chip_init) { 2665 if ((err = c->chip_init(ice)) < 0) { 2666 snd_card_free(card); 2667 return err; 2668 } 2669 } 2670 goto __found; 2671 } 2672 } 2673 } 2674 c = &no_matched; 2675 __found: 2676 2677 if ((err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL)) < 0) { 2678 snd_card_free(card); 2679 return err; 2680 } 2681 2682 if (ice_has_con_ac97(ice)) 2683 if ((err = snd_ice1712_pcm(ice, pcm_dev++, NULL)) < 0) { 2684 snd_card_free(card); 2685 return err; 2686 } 2687 2688 if ((err = snd_ice1712_ac97_mixer(ice)) < 0) { 2689 snd_card_free(card); 2690 return err; 2691 } 2692 2693 if ((err = snd_ice1712_build_controls(ice)) < 0) { 2694 snd_card_free(card); 2695 return err; 2696 } 2697 2698 if (c->build_controls) { 2699 if ((err = c->build_controls(ice)) < 0) { 2700 snd_card_free(card); 2701 return err; 2702 } 2703 } 2704 2705 if (ice_has_con_ac97(ice)) 2706 if ((err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL)) < 0) { 2707 snd_card_free(card); 2708 return err; 2709 } 2710 2711 if (! c->no_mpu401) { 2712 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2713 ICEREG(ice, MPU1_CTRL), 2714 (c->mpu401_1_info_flags | 2715 MPU401_INFO_INTEGRATED), 2716 ice->irq, 0, 2717 &ice->rmidi[0])) < 0) { 2718 snd_card_free(card); 2719 return err; 2720 } 2721 if (c->mpu401_1_name) 2722 /* Prefered name available in card_info */ 2723 snprintf(ice->rmidi[0]->name, 2724 sizeof(ice->rmidi[0]->name), 2725 "%s %d", c->mpu401_1_name, card->number); 2726 2727 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2728 /* 2nd port used */ 2729 if ((err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2730 ICEREG(ice, MPU2_CTRL), 2731 (c->mpu401_2_info_flags | 2732 MPU401_INFO_INTEGRATED), 2733 ice->irq, 0, 2734 &ice->rmidi[1])) < 0) { 2735 snd_card_free(card); 2736 return err; 2737 } 2738 if (c->mpu401_2_name) 2739 /* Prefered name available in card_info */ 2740 snprintf(ice->rmidi[1]->name, 2741 sizeof(ice->rmidi[1]->name), 2742 "%s %d", c->mpu401_2_name, 2743 card->number); 2744 } 2745 } 2746 2747 snd_ice1712_set_input_clock_source(ice, 0); 2748 2749 sprintf(card->longname, "%s at 0x%lx, irq %i", 2750 card->shortname, ice->port, ice->irq); 2751 2752 if ((err = snd_card_register(card)) < 0) { 2753 snd_card_free(card); 2754 return err; 2755 } 2756 pci_set_drvdata(pci, card); 2757 dev++; 2758 return 0; 2759 } 2760 2761 static void __devexit snd_ice1712_remove(struct pci_dev *pci) 2762 { 2763 snd_card_free(pci_get_drvdata(pci)); 2764 pci_set_drvdata(pci, NULL); 2765 } 2766 2767 static struct pci_driver driver = { 2768 .name = "ICE1712", 2769 .id_table = snd_ice1712_ids, 2770 .probe = snd_ice1712_probe, 2771 .remove = __devexit_p(snd_ice1712_remove), 2772 }; 2773 2774 static int __init alsa_card_ice1712_init(void) 2775 { 2776 return pci_register_driver(&driver); 2777 } 2778 2779 static void __exit alsa_card_ice1712_exit(void) 2780 { 2781 pci_unregister_driver(&driver); 2782 } 2783 2784 module_init(alsa_card_ice1712_init) 2785 module_exit(alsa_card_ice1712_exit) 2786