1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for ICEnsemble ICE1712 (Envy24) 4 * 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 6 */ 7 8 /* 9 NOTES: 10 - spdif nonaudio consumer mode does not work (at least with my 11 Sony STR-DB830) 12 */ 13 14 /* 15 * Changes: 16 * 17 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 18 * split the code to several files. each low-level routine 19 * is stored in the local file and called from registration 20 * function from card_info struct. 21 * 22 * 2002.11.26 James Stafford <jstafford@ampltd.com> 23 * Added support for VT1724 (Envy24HT) 24 * I have left out support for 176.4 and 192 KHz for the moment. 25 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 26 * 27 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 28 * Split vt1724 part to an independent driver. 29 * The GPIO is accessed through the callback functions now. 30 * 31 * 2004.03.31 Doug McLain <nostar@comcast.net> 32 * Added support for Event Electronics EZ8 card to hoontech.c. 33 */ 34 35 36 #include <linux/delay.h> 37 #include <linux/interrupt.h> 38 #include <linux/init.h> 39 #include <linux/pci.h> 40 #include <linux/dma-mapping.h> 41 #include <linux/slab.h> 42 #include <linux/module.h> 43 #include <linux/mutex.h> 44 45 #include <sound/core.h> 46 #include <sound/cs8427.h> 47 #include <sound/info.h> 48 #include <sound/initval.h> 49 #include <sound/tlv.h> 50 51 #include <sound/asoundef.h> 52 53 #include "ice1712.h" 54 55 /* lowlevel routines */ 56 #include "delta.h" 57 #include "ews.h" 58 #include "hoontech.h" 59 60 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 61 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 62 MODULE_LICENSE("GPL"); 63 MODULE_SUPPORTED_DEVICE("{" 64 HOONTECH_DEVICE_DESC 65 DELTA_DEVICE_DESC 66 EWS_DEVICE_DESC 67 "{ICEnsemble,Generic ICE1712}," 68 "{ICEnsemble,Generic Envy24}}"); 69 70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 73 static char *model[SNDRV_CARDS]; 74 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 75 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */ 76 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 77 78 module_param_array(index, int, NULL, 0444); 79 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 80 module_param_array(id, charp, NULL, 0444); 81 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 82 module_param_array(enable, bool, NULL, 0444); 83 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 84 module_param_array(omni, bool, NULL, 0444); 85 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 86 module_param_array(cs8427_timeout, int, NULL, 0444); 87 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 88 module_param_array(model, charp, NULL, 0444); 89 MODULE_PARM_DESC(model, "Use the given board model."); 90 module_param_array(dxr_enable, int, NULL, 0444); 91 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 92 93 94 static const struct pci_device_id snd_ice1712_ids[] = { 95 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */ 96 { 0, } 97 }; 98 99 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 100 101 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 102 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 103 104 static int PRO_RATE_LOCKED; 105 static int PRO_RATE_RESET = 1; 106 static unsigned int PRO_RATE_DEFAULT = 44100; 107 108 /* 109 * Basic I/O 110 */ 111 112 /* check whether the clock mode is spdif-in */ 113 static inline int is_spdif_master(struct snd_ice1712 *ice) 114 { 115 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 116 } 117 118 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 119 { 120 return is_spdif_master(ice) || PRO_RATE_LOCKED; 121 } 122 123 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data) 124 { 125 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 126 outl(data, ICEDS(ice, DATA)); 127 } 128 129 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr) 130 { 131 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 132 return inl(ICEDS(ice, DATA)); 133 } 134 135 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 136 unsigned short reg, 137 unsigned short val) 138 { 139 struct snd_ice1712 *ice = ac97->private_data; 140 int tm; 141 unsigned char old_cmd = 0; 142 143 for (tm = 0; tm < 0x10000; tm++) { 144 old_cmd = inb(ICEREG(ice, AC97_CMD)); 145 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 146 continue; 147 if (!(old_cmd & ICE1712_AC97_READY)) 148 continue; 149 break; 150 } 151 outb(reg, ICEREG(ice, AC97_INDEX)); 152 outw(val, ICEREG(ice, AC97_DATA)); 153 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 154 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 155 for (tm = 0; tm < 0x10000; tm++) 156 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 157 break; 158 } 159 160 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 161 unsigned short reg) 162 { 163 struct snd_ice1712 *ice = ac97->private_data; 164 int tm; 165 unsigned char old_cmd = 0; 166 167 for (tm = 0; tm < 0x10000; tm++) { 168 old_cmd = inb(ICEREG(ice, AC97_CMD)); 169 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 170 continue; 171 if (!(old_cmd & ICE1712_AC97_READY)) 172 continue; 173 break; 174 } 175 outb(reg, ICEREG(ice, AC97_INDEX)); 176 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 177 for (tm = 0; tm < 0x10000; tm++) 178 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 179 break; 180 if (tm >= 0x10000) /* timeout */ 181 return ~0; 182 return inw(ICEREG(ice, AC97_DATA)); 183 } 184 185 /* 186 * pro ac97 section 187 */ 188 189 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 190 unsigned short reg, 191 unsigned short val) 192 { 193 struct snd_ice1712 *ice = ac97->private_data; 194 int tm; 195 unsigned char old_cmd = 0; 196 197 for (tm = 0; tm < 0x10000; tm++) { 198 old_cmd = inb(ICEMT(ice, AC97_CMD)); 199 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 200 continue; 201 if (!(old_cmd & ICE1712_AC97_READY)) 202 continue; 203 break; 204 } 205 outb(reg, ICEMT(ice, AC97_INDEX)); 206 outw(val, ICEMT(ice, AC97_DATA)); 207 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 208 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 209 for (tm = 0; tm < 0x10000; tm++) 210 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 211 break; 212 } 213 214 215 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 216 unsigned short reg) 217 { 218 struct snd_ice1712 *ice = ac97->private_data; 219 int tm; 220 unsigned char old_cmd = 0; 221 222 for (tm = 0; tm < 0x10000; tm++) { 223 old_cmd = inb(ICEMT(ice, AC97_CMD)); 224 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 225 continue; 226 if (!(old_cmd & ICE1712_AC97_READY)) 227 continue; 228 break; 229 } 230 outb(reg, ICEMT(ice, AC97_INDEX)); 231 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 232 for (tm = 0; tm < 0x10000; tm++) 233 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 234 break; 235 if (tm >= 0x10000) /* timeout */ 236 return ~0; 237 return inw(ICEMT(ice, AC97_DATA)); 238 } 239 240 /* 241 * consumer ac97 digital mix 242 */ 243 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info 244 245 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 246 { 247 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 248 249 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 250 return 0; 251 } 252 253 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 254 { 255 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 256 unsigned char val, nval; 257 258 spin_lock_irq(&ice->reg_lock); 259 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 260 nval = val & ~ICE1712_ROUTE_AC97; 261 if (ucontrol->value.integer.value[0]) 262 nval |= ICE1712_ROUTE_AC97; 263 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 264 spin_unlock_irq(&ice->reg_lock); 265 return val != nval; 266 } 267 268 static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = { 269 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 270 .name = "Digital Mixer To AC97", 271 .info = snd_ice1712_digmix_route_ac97_info, 272 .get = snd_ice1712_digmix_route_ac97_get, 273 .put = snd_ice1712_digmix_route_ac97_put, 274 }; 275 276 277 /* 278 * gpio operations 279 */ 280 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 281 { 282 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 283 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 284 } 285 286 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice) 287 { 288 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION); 289 } 290 291 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice) 292 { 293 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK); 294 } 295 296 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 297 { 298 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 299 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 300 } 301 302 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 303 { 304 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 305 } 306 307 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 308 { 309 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 310 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 311 } 312 313 /* 314 * 315 * CS8427 interface 316 * 317 */ 318 319 /* 320 * change the input clock selection 321 * spdif_clock = 1 - IEC958 input, 0 - Envy24 322 */ 323 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 324 { 325 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 326 unsigned char val, nval; 327 int res = 0; 328 329 snd_i2c_lock(ice->i2c); 330 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 331 snd_i2c_unlock(ice->i2c); 332 return -EIO; 333 } 334 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 335 snd_i2c_unlock(ice->i2c); 336 return -EIO; 337 } 338 nval = val & 0xf0; 339 if (spdif_clock) 340 nval |= 0x01; 341 else 342 nval |= 0x04; 343 if (val != nval) { 344 reg[1] = nval; 345 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 346 res = -EIO; 347 } else { 348 res++; 349 } 350 } 351 snd_i2c_unlock(ice->i2c); 352 return res; 353 } 354 355 /* 356 * spdif callbacks 357 */ 358 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 359 { 360 snd_cs8427_iec958_active(ice->cs8427, 1); 361 } 362 363 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 364 { 365 snd_cs8427_iec958_active(ice->cs8427, 0); 366 } 367 368 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 369 { 370 snd_cs8427_iec958_pcm(ice->cs8427, rate); 371 } 372 373 /* 374 * create and initialize callbacks for cs8427 interface 375 */ 376 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 377 { 378 int err; 379 380 err = snd_cs8427_create(ice->i2c, addr, 381 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427); 382 if (err < 0) { 383 dev_err(ice->card->dev, "CS8427 initialization failed\n"); 384 return err; 385 } 386 ice->spdif.ops.open = open_cs8427; 387 ice->spdif.ops.close = close_cs8427; 388 ice->spdif.ops.setup_rate = setup_cs8427; 389 return 0; 390 } 391 392 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 393 { 394 /* change CS8427 clock source too */ 395 if (ice->cs8427) 396 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 397 /* notify ak4524 chip as well */ 398 if (spdif_is_master) { 399 unsigned int i; 400 for (i = 0; i < ice->akm_codecs; i++) { 401 if (ice->akm[i].ops.set_rate_val) 402 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 403 } 404 } 405 } 406 407 /* 408 * Interrupt handler 409 */ 410 411 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 412 { 413 struct snd_ice1712 *ice = dev_id; 414 unsigned char status; 415 int handled = 0; 416 417 while (1) { 418 status = inb(ICEREG(ice, IRQSTAT)); 419 if (status == 0) 420 break; 421 handled = 1; 422 if (status & ICE1712_IRQ_MPU1) { 423 if (ice->rmidi[0]) 424 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 425 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 426 status &= ~ICE1712_IRQ_MPU1; 427 } 428 if (status & ICE1712_IRQ_TIMER) 429 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 430 if (status & ICE1712_IRQ_MPU2) { 431 if (ice->rmidi[1]) 432 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 433 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 434 status &= ~ICE1712_IRQ_MPU2; 435 } 436 if (status & ICE1712_IRQ_PROPCM) { 437 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 438 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 439 if (ice->playback_pro_substream) 440 snd_pcm_period_elapsed(ice->playback_pro_substream); 441 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 442 } 443 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 444 if (ice->capture_pro_substream) 445 snd_pcm_period_elapsed(ice->capture_pro_substream); 446 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 447 } 448 } 449 if (status & ICE1712_IRQ_FM) 450 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 451 if (status & ICE1712_IRQ_PBKDS) { 452 u32 idx; 453 u16 pbkstatus; 454 struct snd_pcm_substream *substream; 455 pbkstatus = inw(ICEDS(ice, INTSTAT)); 456 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */ 457 for (idx = 0; idx < 6; idx++) { 458 if ((pbkstatus & (3 << (idx * 2))) == 0) 459 continue; 460 substream = ice->playback_con_substream_ds[idx]; 461 if (substream != NULL) 462 snd_pcm_period_elapsed(substream); 463 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 464 } 465 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 466 } 467 if (status & ICE1712_IRQ_CONCAP) { 468 if (ice->capture_con_substream) 469 snd_pcm_period_elapsed(ice->capture_con_substream); 470 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 471 } 472 if (status & ICE1712_IRQ_CONPBK) { 473 if (ice->playback_con_substream) 474 snd_pcm_period_elapsed(ice->playback_con_substream); 475 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 476 } 477 } 478 return IRQ_RETVAL(handled); 479 } 480 481 482 /* 483 * PCM part - consumer I/O 484 */ 485 486 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 487 int cmd) 488 { 489 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 490 int result = 0; 491 u32 tmp; 492 493 spin_lock(&ice->reg_lock); 494 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 495 if (cmd == SNDRV_PCM_TRIGGER_START) { 496 tmp |= 1; 497 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 498 tmp &= ~1; 499 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 500 tmp |= 2; 501 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 502 tmp &= ~2; 503 } else { 504 result = -EINVAL; 505 } 506 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 507 spin_unlock(&ice->reg_lock); 508 return result; 509 } 510 511 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 512 int cmd) 513 { 514 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 515 int result = 0; 516 u32 tmp; 517 518 spin_lock(&ice->reg_lock); 519 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 520 if (cmd == SNDRV_PCM_TRIGGER_START) { 521 tmp |= 1; 522 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 523 tmp &= ~1; 524 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 525 tmp |= 2; 526 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 527 tmp &= ~2; 528 } else { 529 result = -EINVAL; 530 } 531 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 532 spin_unlock(&ice->reg_lock); 533 return result; 534 } 535 536 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 537 int cmd) 538 { 539 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 540 int result = 0; 541 u8 tmp; 542 543 spin_lock(&ice->reg_lock); 544 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 545 if (cmd == SNDRV_PCM_TRIGGER_START) { 546 tmp |= 1; 547 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 548 tmp &= ~1; 549 } else { 550 result = -EINVAL; 551 } 552 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 553 spin_unlock(&ice->reg_lock); 554 return result; 555 } 556 557 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 558 { 559 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 560 struct snd_pcm_runtime *runtime = substream->runtime; 561 u32 period_size, buf_size, rate, tmp; 562 563 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 564 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 565 tmp = 0x0000; 566 if (snd_pcm_format_width(runtime->format) == 16) 567 tmp |= 0x10; 568 if (runtime->channels == 2) 569 tmp |= 0x08; 570 rate = (runtime->rate * 8192) / 375; 571 if (rate > 0x000fffff) 572 rate = 0x000fffff; 573 spin_lock_irq(&ice->reg_lock); 574 outb(0, ice->ddma_port + 15); 575 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 576 outl(runtime->dma_addr, ice->ddma_port + 0); 577 outw(buf_size, ice->ddma_port + 4); 578 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 579 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 580 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 581 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 582 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 583 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 584 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 585 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 586 spin_unlock_irq(&ice->reg_lock); 587 return 0; 588 } 589 590 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 591 { 592 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 593 struct snd_pcm_runtime *runtime = substream->runtime; 594 u32 period_size, rate, tmp, chn; 595 596 period_size = snd_pcm_lib_period_bytes(substream) - 1; 597 tmp = 0x0064; 598 if (snd_pcm_format_width(runtime->format) == 16) 599 tmp &= ~0x04; 600 if (runtime->channels == 2) 601 tmp |= 0x08; 602 rate = (runtime->rate * 8192) / 375; 603 if (rate > 0x000fffff) 604 rate = 0x000fffff; 605 ice->playback_con_active_buf[substream->number] = 0; 606 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 607 chn = substream->number * 2; 608 spin_lock_irq(&ice->reg_lock); 609 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 610 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 611 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 612 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 613 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 614 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 615 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 616 if (runtime->channels == 2) { 617 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 618 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 619 } 620 spin_unlock_irq(&ice->reg_lock); 621 return 0; 622 } 623 624 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 625 { 626 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 627 struct snd_pcm_runtime *runtime = substream->runtime; 628 u32 period_size, buf_size; 629 u8 tmp; 630 631 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 632 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 633 tmp = 0x06; 634 if (snd_pcm_format_width(runtime->format) == 16) 635 tmp &= ~0x04; 636 if (runtime->channels == 2) 637 tmp &= ~0x02; 638 spin_lock_irq(&ice->reg_lock); 639 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 640 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 641 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 642 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 643 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 644 spin_unlock_irq(&ice->reg_lock); 645 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 646 return 0; 647 } 648 649 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 650 { 651 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 652 struct snd_pcm_runtime *runtime = substream->runtime; 653 size_t ptr; 654 655 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 656 return 0; 657 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 658 ptr = bytes_to_frames(substream->runtime, ptr); 659 if (ptr == runtime->buffer_size) 660 ptr = 0; 661 return ptr; 662 } 663 664 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 665 { 666 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 667 u8 addr; 668 size_t ptr; 669 670 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 671 return 0; 672 if (ice->playback_con_active_buf[substream->number]) 673 addr = ICE1712_DSC_ADDR1; 674 else 675 addr = ICE1712_DSC_ADDR0; 676 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 677 ice->playback_con_virt_addr[substream->number]; 678 ptr = bytes_to_frames(substream->runtime, ptr); 679 if (ptr == substream->runtime->buffer_size) 680 ptr = 0; 681 return ptr; 682 } 683 684 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 685 { 686 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 687 size_t ptr; 688 689 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 690 return 0; 691 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 692 ptr = bytes_to_frames(substream->runtime, ptr); 693 if (ptr == substream->runtime->buffer_size) 694 ptr = 0; 695 return ptr; 696 } 697 698 static const struct snd_pcm_hardware snd_ice1712_playback = { 699 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 700 SNDRV_PCM_INFO_BLOCK_TRANSFER | 701 SNDRV_PCM_INFO_MMAP_VALID | 702 SNDRV_PCM_INFO_PAUSE), 703 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 704 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 705 .rate_min = 4000, 706 .rate_max = 48000, 707 .channels_min = 1, 708 .channels_max = 2, 709 .buffer_bytes_max = (64*1024), 710 .period_bytes_min = 64, 711 .period_bytes_max = (64*1024), 712 .periods_min = 1, 713 .periods_max = 1024, 714 .fifo_size = 0, 715 }; 716 717 static const struct snd_pcm_hardware snd_ice1712_playback_ds = { 718 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 719 SNDRV_PCM_INFO_BLOCK_TRANSFER | 720 SNDRV_PCM_INFO_MMAP_VALID | 721 SNDRV_PCM_INFO_PAUSE), 722 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 723 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 724 .rate_min = 4000, 725 .rate_max = 48000, 726 .channels_min = 1, 727 .channels_max = 2, 728 .buffer_bytes_max = (128*1024), 729 .period_bytes_min = 64, 730 .period_bytes_max = (128*1024), 731 .periods_min = 2, 732 .periods_max = 2, 733 .fifo_size = 0, 734 }; 735 736 static const struct snd_pcm_hardware snd_ice1712_capture = { 737 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 738 SNDRV_PCM_INFO_BLOCK_TRANSFER | 739 SNDRV_PCM_INFO_MMAP_VALID), 740 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 741 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 742 .rate_min = 4000, 743 .rate_max = 48000, 744 .channels_min = 1, 745 .channels_max = 2, 746 .buffer_bytes_max = (64*1024), 747 .period_bytes_min = 64, 748 .period_bytes_max = (64*1024), 749 .periods_min = 1, 750 .periods_max = 1024, 751 .fifo_size = 0, 752 }; 753 754 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 755 { 756 struct snd_pcm_runtime *runtime = substream->runtime; 757 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 758 759 ice->playback_con_substream = substream; 760 runtime->hw = snd_ice1712_playback; 761 return 0; 762 } 763 764 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 765 { 766 struct snd_pcm_runtime *runtime = substream->runtime; 767 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 768 u32 tmp; 769 770 ice->playback_con_substream_ds[substream->number] = substream; 771 runtime->hw = snd_ice1712_playback_ds; 772 spin_lock_irq(&ice->reg_lock); 773 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 774 outw(tmp, ICEDS(ice, INTMASK)); 775 spin_unlock_irq(&ice->reg_lock); 776 return 0; 777 } 778 779 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 780 { 781 struct snd_pcm_runtime *runtime = substream->runtime; 782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 783 784 ice->capture_con_substream = substream; 785 runtime->hw = snd_ice1712_capture; 786 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 787 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 788 runtime->hw.rate_min = 48000; 789 return 0; 790 } 791 792 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 793 { 794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 795 796 ice->playback_con_substream = NULL; 797 return 0; 798 } 799 800 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 801 { 802 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 803 u32 tmp; 804 805 spin_lock_irq(&ice->reg_lock); 806 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 807 outw(tmp, ICEDS(ice, INTMASK)); 808 spin_unlock_irq(&ice->reg_lock); 809 ice->playback_con_substream_ds[substream->number] = NULL; 810 return 0; 811 } 812 813 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 814 { 815 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 816 817 ice->capture_con_substream = NULL; 818 return 0; 819 } 820 821 static const struct snd_pcm_ops snd_ice1712_playback_ops = { 822 .open = snd_ice1712_playback_open, 823 .close = snd_ice1712_playback_close, 824 .prepare = snd_ice1712_playback_prepare, 825 .trigger = snd_ice1712_playback_trigger, 826 .pointer = snd_ice1712_playback_pointer, 827 }; 828 829 static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 830 .open = snd_ice1712_playback_ds_open, 831 .close = snd_ice1712_playback_ds_close, 832 .prepare = snd_ice1712_playback_ds_prepare, 833 .trigger = snd_ice1712_playback_ds_trigger, 834 .pointer = snd_ice1712_playback_ds_pointer, 835 }; 836 837 static const struct snd_pcm_ops snd_ice1712_capture_ops = { 838 .open = snd_ice1712_capture_open, 839 .close = snd_ice1712_capture_close, 840 .prepare = snd_ice1712_capture_prepare, 841 .trigger = snd_ice1712_capture_trigger, 842 .pointer = snd_ice1712_capture_pointer, 843 }; 844 845 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device) 846 { 847 struct snd_pcm *pcm; 848 int err; 849 850 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 851 if (err < 0) 852 return err; 853 854 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 855 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 856 857 pcm->private_data = ice; 858 pcm->info_flags = 0; 859 strcpy(pcm->name, "ICE1712 consumer"); 860 ice->pcm = pcm; 861 862 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 863 &ice->pci->dev, 64*1024, 64*1024); 864 865 dev_warn(ice->card->dev, 866 "Consumer PCM code does not work well at the moment --jk\n"); 867 868 return 0; 869 } 870 871 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device) 872 { 873 struct snd_pcm *pcm; 874 int err; 875 876 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 877 if (err < 0) 878 return err; 879 880 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 881 882 pcm->private_data = ice; 883 pcm->info_flags = 0; 884 strcpy(pcm->name, "ICE1712 consumer (DS)"); 885 ice->pcm_ds = pcm; 886 887 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 888 &ice->pci->dev, 64*1024, 128*1024); 889 890 return 0; 891 } 892 893 /* 894 * PCM code - professional part (multitrack) 895 */ 896 897 static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 898 32000, 44100, 48000, 64000, 88200, 96000 }; 899 900 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { 901 .count = ARRAY_SIZE(rates), 902 .list = rates, 903 .mask = 0, 904 }; 905 906 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 907 int cmd) 908 { 909 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 910 switch (cmd) { 911 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 912 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 913 { 914 unsigned int what; 915 unsigned int old; 916 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 917 return -EINVAL; 918 what = ICE1712_PLAYBACK_PAUSE; 919 snd_pcm_trigger_done(substream, substream); 920 spin_lock(&ice->reg_lock); 921 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 922 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 923 old |= what; 924 else 925 old &= ~what; 926 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 927 spin_unlock(&ice->reg_lock); 928 break; 929 } 930 case SNDRV_PCM_TRIGGER_START: 931 case SNDRV_PCM_TRIGGER_STOP: 932 { 933 unsigned int what = 0; 934 unsigned int old; 935 struct snd_pcm_substream *s; 936 937 snd_pcm_group_for_each_entry(s, substream) { 938 if (s == ice->playback_pro_substream) { 939 what |= ICE1712_PLAYBACK_START; 940 snd_pcm_trigger_done(s, substream); 941 } else if (s == ice->capture_pro_substream) { 942 what |= ICE1712_CAPTURE_START_SHADOW; 943 snd_pcm_trigger_done(s, substream); 944 } 945 } 946 spin_lock(&ice->reg_lock); 947 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 948 if (cmd == SNDRV_PCM_TRIGGER_START) 949 old |= what; 950 else 951 old &= ~what; 952 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 953 spin_unlock(&ice->reg_lock); 954 break; 955 } 956 default: 957 return -EINVAL; 958 } 959 return 0; 960 } 961 962 /* 963 */ 964 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 965 { 966 unsigned long flags; 967 unsigned char val, old; 968 unsigned int i; 969 970 switch (rate) { 971 case 8000: val = 6; break; 972 case 9600: val = 3; break; 973 case 11025: val = 10; break; 974 case 12000: val = 2; break; 975 case 16000: val = 5; break; 976 case 22050: val = 9; break; 977 case 24000: val = 1; break; 978 case 32000: val = 4; break; 979 case 44100: val = 8; break; 980 case 48000: val = 0; break; 981 case 64000: val = 15; break; 982 case 88200: val = 11; break; 983 case 96000: val = 7; break; 984 default: 985 snd_BUG(); 986 val = 0; 987 rate = 48000; 988 break; 989 } 990 991 spin_lock_irqsave(&ice->reg_lock, flags); 992 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 993 ICE1712_PLAYBACK_PAUSE| 994 ICE1712_PLAYBACK_START)) { 995 __out: 996 spin_unlock_irqrestore(&ice->reg_lock, flags); 997 return; 998 } 999 if (!force && is_pro_rate_locked(ice)) 1000 goto __out; 1001 1002 old = inb(ICEMT(ice, RATE)); 1003 if (!force && old == val) 1004 goto __out; 1005 1006 ice->cur_rate = rate; 1007 outb(val, ICEMT(ice, RATE)); 1008 spin_unlock_irqrestore(&ice->reg_lock, flags); 1009 1010 if (ice->gpio.set_pro_rate) 1011 ice->gpio.set_pro_rate(ice, rate); 1012 for (i = 0; i < ice->akm_codecs; i++) { 1013 if (ice->akm[i].ops.set_rate_val) 1014 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1015 } 1016 if (ice->spdif.ops.setup_rate) 1017 ice->spdif.ops.setup_rate(ice, rate); 1018 } 1019 1020 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1021 { 1022 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1023 1024 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1025 spin_lock_irq(&ice->reg_lock); 1026 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1027 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1028 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1029 spin_unlock_irq(&ice->reg_lock); 1030 1031 return 0; 1032 } 1033 1034 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1035 struct snd_pcm_hw_params *hw_params) 1036 { 1037 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1038 1039 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1040 return 0; 1041 } 1042 1043 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1044 { 1045 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1046 1047 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1048 spin_lock_irq(&ice->reg_lock); 1049 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1050 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1051 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1052 spin_unlock_irq(&ice->reg_lock); 1053 return 0; 1054 } 1055 1056 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1057 struct snd_pcm_hw_params *hw_params) 1058 { 1059 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1060 1061 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1062 return 0; 1063 } 1064 1065 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1066 { 1067 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1068 size_t ptr; 1069 1070 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1071 return 0; 1072 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1073 ptr = bytes_to_frames(substream->runtime, ptr); 1074 if (ptr == substream->runtime->buffer_size) 1075 ptr = 0; 1076 return ptr; 1077 } 1078 1079 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1080 { 1081 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1082 size_t ptr; 1083 1084 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1085 return 0; 1086 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1087 ptr = bytes_to_frames(substream->runtime, ptr); 1088 if (ptr == substream->runtime->buffer_size) 1089 ptr = 0; 1090 return ptr; 1091 } 1092 1093 static const struct snd_pcm_hardware snd_ice1712_playback_pro = { 1094 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1095 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1096 SNDRV_PCM_INFO_MMAP_VALID | 1097 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1098 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1099 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1100 .rate_min = 4000, 1101 .rate_max = 96000, 1102 .channels_min = 10, 1103 .channels_max = 10, 1104 .buffer_bytes_max = (256*1024), 1105 .period_bytes_min = 10 * 4 * 2, 1106 .period_bytes_max = 131040, 1107 .periods_min = 1, 1108 .periods_max = 1024, 1109 .fifo_size = 0, 1110 }; 1111 1112 static const struct snd_pcm_hardware snd_ice1712_capture_pro = { 1113 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1114 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1115 SNDRV_PCM_INFO_MMAP_VALID | 1116 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1117 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1118 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1119 .rate_min = 4000, 1120 .rate_max = 96000, 1121 .channels_min = 12, 1122 .channels_max = 12, 1123 .buffer_bytes_max = (256*1024), 1124 .period_bytes_min = 12 * 4 * 2, 1125 .period_bytes_max = 131040, 1126 .periods_min = 1, 1127 .periods_max = 1024, 1128 .fifo_size = 0, 1129 }; 1130 1131 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1132 { 1133 struct snd_pcm_runtime *runtime = substream->runtime; 1134 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1135 1136 ice->playback_pro_substream = substream; 1137 runtime->hw = snd_ice1712_playback_pro; 1138 snd_pcm_set_sync(substream); 1139 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1140 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1141 if (is_pro_rate_locked(ice)) { 1142 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1143 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1144 } 1145 1146 if (ice->spdif.ops.open) 1147 ice->spdif.ops.open(ice, substream); 1148 1149 return 0; 1150 } 1151 1152 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1153 { 1154 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1155 struct snd_pcm_runtime *runtime = substream->runtime; 1156 1157 ice->capture_pro_substream = substream; 1158 runtime->hw = snd_ice1712_capture_pro; 1159 snd_pcm_set_sync(substream); 1160 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1161 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1162 if (is_pro_rate_locked(ice)) { 1163 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1164 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1165 } 1166 1167 return 0; 1168 } 1169 1170 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1171 { 1172 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1173 1174 if (PRO_RATE_RESET) 1175 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1176 ice->playback_pro_substream = NULL; 1177 if (ice->spdif.ops.close) 1178 ice->spdif.ops.close(ice, substream); 1179 1180 return 0; 1181 } 1182 1183 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1184 { 1185 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1186 1187 if (PRO_RATE_RESET) 1188 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1189 ice->capture_pro_substream = NULL; 1190 return 0; 1191 } 1192 1193 static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1194 .open = snd_ice1712_playback_pro_open, 1195 .close = snd_ice1712_playback_pro_close, 1196 .hw_params = snd_ice1712_playback_pro_hw_params, 1197 .prepare = snd_ice1712_playback_pro_prepare, 1198 .trigger = snd_ice1712_pro_trigger, 1199 .pointer = snd_ice1712_playback_pro_pointer, 1200 }; 1201 1202 static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1203 .open = snd_ice1712_capture_pro_open, 1204 .close = snd_ice1712_capture_pro_close, 1205 .hw_params = snd_ice1712_capture_pro_hw_params, 1206 .prepare = snd_ice1712_capture_pro_prepare, 1207 .trigger = snd_ice1712_pro_trigger, 1208 .pointer = snd_ice1712_capture_pro_pointer, 1209 }; 1210 1211 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device) 1212 { 1213 struct snd_pcm *pcm; 1214 int err; 1215 1216 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1217 if (err < 0) 1218 return err; 1219 1220 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1221 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1222 1223 pcm->private_data = ice; 1224 pcm->info_flags = 0; 1225 strcpy(pcm->name, "ICE1712 multi"); 1226 1227 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1228 &ice->pci->dev, 256*1024, 256*1024); 1229 1230 ice->pcm_pro = pcm; 1231 1232 if (ice->cs8427) { 1233 /* assign channels to iec958 */ 1234 err = snd_cs8427_iec958_build(ice->cs8427, 1235 pcm->streams[0].substream, 1236 pcm->streams[1].substream); 1237 if (err < 0) 1238 return err; 1239 } 1240 1241 return snd_ice1712_build_pro_mixer(ice); 1242 } 1243 1244 /* 1245 * Mixer section 1246 */ 1247 1248 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1249 { 1250 unsigned int vol = ice->pro_volumes[index]; 1251 unsigned short val = 0; 1252 1253 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1254 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1255 outb(index, ICEMT(ice, MONITOR_INDEX)); 1256 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1257 } 1258 1259 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info 1260 1261 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1262 { 1263 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1264 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1265 kcontrol->private_value; 1266 1267 spin_lock_irq(&ice->reg_lock); 1268 ucontrol->value.integer.value[0] = 1269 !((ice->pro_volumes[priv_idx] >> 15) & 1); 1270 ucontrol->value.integer.value[1] = 1271 !((ice->pro_volumes[priv_idx] >> 31) & 1); 1272 spin_unlock_irq(&ice->reg_lock); 1273 return 0; 1274 } 1275 1276 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1277 { 1278 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1279 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1280 kcontrol->private_value; 1281 unsigned int nval, change; 1282 1283 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1284 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1285 spin_lock_irq(&ice->reg_lock); 1286 nval |= ice->pro_volumes[priv_idx] & ~0x80008000; 1287 change = nval != ice->pro_volumes[priv_idx]; 1288 ice->pro_volumes[priv_idx] = nval; 1289 snd_ice1712_update_volume(ice, priv_idx); 1290 spin_unlock_irq(&ice->reg_lock); 1291 return change; 1292 } 1293 1294 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1295 { 1296 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1297 uinfo->count = 2; 1298 uinfo->value.integer.min = 0; 1299 uinfo->value.integer.max = 96; 1300 return 0; 1301 } 1302 1303 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1304 { 1305 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1306 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1307 kcontrol->private_value; 1308 1309 spin_lock_irq(&ice->reg_lock); 1310 ucontrol->value.integer.value[0] = 1311 (ice->pro_volumes[priv_idx] >> 0) & 127; 1312 ucontrol->value.integer.value[1] = 1313 (ice->pro_volumes[priv_idx] >> 16) & 127; 1314 spin_unlock_irq(&ice->reg_lock); 1315 return 0; 1316 } 1317 1318 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1319 { 1320 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1321 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1322 kcontrol->private_value; 1323 unsigned int nval, change; 1324 1325 nval = (ucontrol->value.integer.value[0] & 127) | 1326 ((ucontrol->value.integer.value[1] & 127) << 16); 1327 spin_lock_irq(&ice->reg_lock); 1328 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f; 1329 change = nval != ice->pro_volumes[priv_idx]; 1330 ice->pro_volumes[priv_idx] = nval; 1331 snd_ice1712_update_volume(ice, priv_idx); 1332 spin_unlock_irq(&ice->reg_lock); 1333 return change; 1334 } 1335 1336 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1337 1338 static const struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = { 1339 { 1340 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1341 .name = "Multi Playback Switch", 1342 .info = snd_ice1712_pro_mixer_switch_info, 1343 .get = snd_ice1712_pro_mixer_switch_get, 1344 .put = snd_ice1712_pro_mixer_switch_put, 1345 .private_value = 0, 1346 .count = 10, 1347 }, 1348 { 1349 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1350 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1351 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1352 .name = "Multi Playback Volume", 1353 .info = snd_ice1712_pro_mixer_volume_info, 1354 .get = snd_ice1712_pro_mixer_volume_get, 1355 .put = snd_ice1712_pro_mixer_volume_put, 1356 .private_value = 0, 1357 .count = 10, 1358 .tlv = { .p = db_scale_playback } 1359 }, 1360 }; 1361 1362 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = { 1363 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1364 .name = "H/W Multi Capture Switch", 1365 .info = snd_ice1712_pro_mixer_switch_info, 1366 .get = snd_ice1712_pro_mixer_switch_get, 1367 .put = snd_ice1712_pro_mixer_switch_put, 1368 .private_value = 10, 1369 }; 1370 1371 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = { 1372 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1373 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH), 1374 .info = snd_ice1712_pro_mixer_switch_info, 1375 .get = snd_ice1712_pro_mixer_switch_get, 1376 .put = snd_ice1712_pro_mixer_switch_put, 1377 .private_value = 18, 1378 .count = 2, 1379 }; 1380 1381 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = { 1382 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1383 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1384 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1385 .name = "H/W Multi Capture Volume", 1386 .info = snd_ice1712_pro_mixer_volume_info, 1387 .get = snd_ice1712_pro_mixer_volume_get, 1388 .put = snd_ice1712_pro_mixer_volume_put, 1389 .private_value = 10, 1390 .tlv = { .p = db_scale_playback } 1391 }; 1392 1393 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = { 1394 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1395 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME), 1396 .info = snd_ice1712_pro_mixer_volume_info, 1397 .get = snd_ice1712_pro_mixer_volume_get, 1398 .put = snd_ice1712_pro_mixer_volume_put, 1399 .private_value = 18, 1400 .count = 2, 1401 }; 1402 1403 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1404 { 1405 struct snd_card *card = ice->card; 1406 unsigned int idx; 1407 int err; 1408 1409 /* multi-channel mixer */ 1410 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1411 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1412 if (err < 0) 1413 return err; 1414 } 1415 1416 if (ice->num_total_adcs > 0) { 1417 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1418 tmp.count = ice->num_total_adcs; 1419 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1420 if (err < 0) 1421 return err; 1422 } 1423 1424 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1425 if (err < 0) 1426 return err; 1427 1428 if (ice->num_total_adcs > 0) { 1429 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1430 tmp.count = ice->num_total_adcs; 1431 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1432 if (err < 0) 1433 return err; 1434 } 1435 1436 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1437 if (err < 0) 1438 return err; 1439 1440 /* initialize volumes */ 1441 for (idx = 0; idx < 10; idx++) { 1442 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1443 snd_ice1712_update_volume(ice, idx); 1444 } 1445 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1446 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1447 snd_ice1712_update_volume(ice, idx); 1448 } 1449 for (idx = 18; idx < 20; idx++) { 1450 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1451 snd_ice1712_update_volume(ice, idx); 1452 } 1453 return 0; 1454 } 1455 1456 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1457 { 1458 struct snd_ice1712 *ice = ac97->private_data; 1459 ice->ac97 = NULL; 1460 } 1461 1462 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice) 1463 { 1464 int err, bus_num = 0; 1465 struct snd_ac97_template ac97; 1466 struct snd_ac97_bus *pbus; 1467 static const struct snd_ac97_bus_ops con_ops = { 1468 .write = snd_ice1712_ac97_write, 1469 .read = snd_ice1712_ac97_read, 1470 }; 1471 static const struct snd_ac97_bus_ops pro_ops = { 1472 .write = snd_ice1712_pro_ac97_write, 1473 .read = snd_ice1712_pro_ac97_read, 1474 }; 1475 1476 if (ice_has_con_ac97(ice)) { 1477 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus); 1478 if (err < 0) 1479 return err; 1480 memset(&ac97, 0, sizeof(ac97)); 1481 ac97.private_data = ice; 1482 ac97.private_free = snd_ice1712_mixer_free_ac97; 1483 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1484 if (err < 0) 1485 dev_warn(ice->card->dev, 1486 "cannot initialize ac97 for consumer, skipped\n"); 1487 else { 1488 return snd_ctl_add(ice->card, 1489 snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, 1490 ice)); 1491 } 1492 } 1493 1494 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1495 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus); 1496 if (err < 0) 1497 return err; 1498 memset(&ac97, 0, sizeof(ac97)); 1499 ac97.private_data = ice; 1500 ac97.private_free = snd_ice1712_mixer_free_ac97; 1501 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1502 if (err < 0) 1503 dev_warn(ice->card->dev, 1504 "cannot initialize pro ac97, skipped\n"); 1505 else 1506 return 0; 1507 } 1508 /* I2S mixer only */ 1509 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1510 return 0; 1511 } 1512 1513 /* 1514 * 1515 */ 1516 1517 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1518 { 1519 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1520 } 1521 1522 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1523 struct snd_info_buffer *buffer) 1524 { 1525 struct snd_ice1712 *ice = entry->private_data; 1526 unsigned int idx; 1527 1528 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1529 snd_iprintf(buffer, "EEPROM:\n"); 1530 1531 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1532 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1533 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1534 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1535 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1536 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1537 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1538 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1539 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1540 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1541 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1542 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1543 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1544 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1545 for (idx = 0; idx < 4; idx++) 1546 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1547 for (idx = 0; idx < 4; idx++) 1548 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1549 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1550 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1551 1552 snd_iprintf(buffer, "\nRegisters:\n"); 1553 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1554 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1555 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1556 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1557 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1558 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1559 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1560 } 1561 1562 static void snd_ice1712_proc_init(struct snd_ice1712 *ice) 1563 { 1564 snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read); 1565 } 1566 1567 /* 1568 * 1569 */ 1570 1571 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1572 struct snd_ctl_elem_info *uinfo) 1573 { 1574 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1575 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1576 return 0; 1577 } 1578 1579 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1580 struct snd_ctl_elem_value *ucontrol) 1581 { 1582 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1583 1584 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1585 return 0; 1586 } 1587 1588 static const struct snd_kcontrol_new snd_ice1712_eeprom = { 1589 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1590 .name = "ICE1712 EEPROM", 1591 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1592 .info = snd_ice1712_eeprom_info, 1593 .get = snd_ice1712_eeprom_get 1594 }; 1595 1596 /* 1597 */ 1598 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1599 struct snd_ctl_elem_info *uinfo) 1600 { 1601 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1602 uinfo->count = 1; 1603 return 0; 1604 } 1605 1606 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1607 struct snd_ctl_elem_value *ucontrol) 1608 { 1609 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1610 if (ice->spdif.ops.default_get) 1611 ice->spdif.ops.default_get(ice, ucontrol); 1612 return 0; 1613 } 1614 1615 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1616 struct snd_ctl_elem_value *ucontrol) 1617 { 1618 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1619 if (ice->spdif.ops.default_put) 1620 return ice->spdif.ops.default_put(ice, ucontrol); 1621 return 0; 1622 } 1623 1624 static const struct snd_kcontrol_new snd_ice1712_spdif_default = 1625 { 1626 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1627 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1628 .info = snd_ice1712_spdif_info, 1629 .get = snd_ice1712_spdif_default_get, 1630 .put = snd_ice1712_spdif_default_put 1631 }; 1632 1633 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1634 struct snd_ctl_elem_value *ucontrol) 1635 { 1636 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1637 if (ice->spdif.ops.default_get) { 1638 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1639 IEC958_AES0_PROFESSIONAL | 1640 IEC958_AES0_CON_NOT_COPYRIGHT | 1641 IEC958_AES0_CON_EMPHASIS; 1642 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1643 IEC958_AES1_CON_CATEGORY; 1644 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1645 } else { 1646 ucontrol->value.iec958.status[0] = 0xff; 1647 ucontrol->value.iec958.status[1] = 0xff; 1648 ucontrol->value.iec958.status[2] = 0xff; 1649 ucontrol->value.iec958.status[3] = 0xff; 1650 ucontrol->value.iec958.status[4] = 0xff; 1651 } 1652 return 0; 1653 } 1654 1655 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1656 struct snd_ctl_elem_value *ucontrol) 1657 { 1658 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1659 if (ice->spdif.ops.default_get) { 1660 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1661 IEC958_AES0_PROFESSIONAL | 1662 IEC958_AES0_PRO_FS | 1663 IEC958_AES0_PRO_EMPHASIS; 1664 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1665 } else { 1666 ucontrol->value.iec958.status[0] = 0xff; 1667 ucontrol->value.iec958.status[1] = 0xff; 1668 ucontrol->value.iec958.status[2] = 0xff; 1669 ucontrol->value.iec958.status[3] = 0xff; 1670 ucontrol->value.iec958.status[4] = 0xff; 1671 } 1672 return 0; 1673 } 1674 1675 static const struct snd_kcontrol_new snd_ice1712_spdif_maskc = 1676 { 1677 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1678 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1679 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1680 .info = snd_ice1712_spdif_info, 1681 .get = snd_ice1712_spdif_maskc_get, 1682 }; 1683 1684 static const struct snd_kcontrol_new snd_ice1712_spdif_maskp = 1685 { 1686 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1687 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1688 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1689 .info = snd_ice1712_spdif_info, 1690 .get = snd_ice1712_spdif_maskp_get, 1691 }; 1692 1693 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1694 struct snd_ctl_elem_value *ucontrol) 1695 { 1696 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1697 if (ice->spdif.ops.stream_get) 1698 ice->spdif.ops.stream_get(ice, ucontrol); 1699 return 0; 1700 } 1701 1702 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1703 struct snd_ctl_elem_value *ucontrol) 1704 { 1705 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1706 if (ice->spdif.ops.stream_put) 1707 return ice->spdif.ops.stream_put(ice, ucontrol); 1708 return 0; 1709 } 1710 1711 static const struct snd_kcontrol_new snd_ice1712_spdif_stream = 1712 { 1713 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1714 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1715 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1716 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), 1717 .info = snd_ice1712_spdif_info, 1718 .get = snd_ice1712_spdif_stream_get, 1719 .put = snd_ice1712_spdif_stream_put 1720 }; 1721 1722 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1723 struct snd_ctl_elem_value *ucontrol) 1724 { 1725 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1726 unsigned char mask = kcontrol->private_value & 0xff; 1727 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1728 1729 snd_ice1712_save_gpio_status(ice); 1730 ucontrol->value.integer.value[0] = 1731 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1732 snd_ice1712_restore_gpio_status(ice); 1733 return 0; 1734 } 1735 1736 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1737 struct snd_ctl_elem_value *ucontrol) 1738 { 1739 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1740 unsigned char mask = kcontrol->private_value & 0xff; 1741 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1742 unsigned int val, nval; 1743 1744 if (kcontrol->private_value & (1 << 31)) 1745 return -EPERM; 1746 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1747 snd_ice1712_save_gpio_status(ice); 1748 val = snd_ice1712_gpio_read(ice); 1749 nval |= val & ~mask; 1750 if (val != nval) 1751 snd_ice1712_gpio_write(ice, nval); 1752 snd_ice1712_restore_gpio_status(ice); 1753 return val != nval; 1754 } 1755 1756 /* 1757 * rate 1758 */ 1759 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1760 struct snd_ctl_elem_info *uinfo) 1761 { 1762 static const char * const texts[] = { 1763 "8000", /* 0: 6 */ 1764 "9600", /* 1: 3 */ 1765 "11025", /* 2: 10 */ 1766 "12000", /* 3: 2 */ 1767 "16000", /* 4: 5 */ 1768 "22050", /* 5: 9 */ 1769 "24000", /* 6: 1 */ 1770 "32000", /* 7: 4 */ 1771 "44100", /* 8: 8 */ 1772 "48000", /* 9: 0 */ 1773 "64000", /* 10: 15 */ 1774 "88200", /* 11: 11 */ 1775 "96000", /* 12: 7 */ 1776 "IEC958 Input", /* 13: -- */ 1777 }; 1778 return snd_ctl_enum_info(uinfo, 1, 14, texts); 1779 } 1780 1781 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1782 struct snd_ctl_elem_value *ucontrol) 1783 { 1784 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1785 static const unsigned char xlate[16] = { 1786 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1787 }; 1788 unsigned char val; 1789 1790 spin_lock_irq(&ice->reg_lock); 1791 if (is_spdif_master(ice)) { 1792 ucontrol->value.enumerated.item[0] = 13; 1793 } else { 1794 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1795 if (val == 255) { 1796 snd_BUG(); 1797 val = 0; 1798 } 1799 ucontrol->value.enumerated.item[0] = val; 1800 } 1801 spin_unlock_irq(&ice->reg_lock); 1802 return 0; 1803 } 1804 1805 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1806 struct snd_ctl_elem_value *ucontrol) 1807 { 1808 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1809 static const unsigned int xrate[13] = { 1810 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1811 32000, 44100, 48000, 64000, 88200, 96000 1812 }; 1813 unsigned char oval; 1814 int change = 0; 1815 1816 spin_lock_irq(&ice->reg_lock); 1817 oval = inb(ICEMT(ice, RATE)); 1818 if (ucontrol->value.enumerated.item[0] == 13) { 1819 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1820 } else { 1821 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1822 spin_unlock_irq(&ice->reg_lock); 1823 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1824 spin_lock_irq(&ice->reg_lock); 1825 } 1826 change = inb(ICEMT(ice, RATE)) != oval; 1827 spin_unlock_irq(&ice->reg_lock); 1828 1829 if ((oval & ICE1712_SPDIF_MASTER) != 1830 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1831 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1832 1833 return change; 1834 } 1835 1836 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = { 1837 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1838 .name = "Multi Track Internal Clock", 1839 .info = snd_ice1712_pro_internal_clock_info, 1840 .get = snd_ice1712_pro_internal_clock_get, 1841 .put = snd_ice1712_pro_internal_clock_put 1842 }; 1843 1844 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1845 struct snd_ctl_elem_info *uinfo) 1846 { 1847 static const char * const texts[] = { 1848 "8000", /* 0: 6 */ 1849 "9600", /* 1: 3 */ 1850 "11025", /* 2: 10 */ 1851 "12000", /* 3: 2 */ 1852 "16000", /* 4: 5 */ 1853 "22050", /* 5: 9 */ 1854 "24000", /* 6: 1 */ 1855 "32000", /* 7: 4 */ 1856 "44100", /* 8: 8 */ 1857 "48000", /* 9: 0 */ 1858 "64000", /* 10: 15 */ 1859 "88200", /* 11: 11 */ 1860 "96000", /* 12: 7 */ 1861 /* "IEC958 Input", 13: -- */ 1862 }; 1863 return snd_ctl_enum_info(uinfo, 1, 13, texts); 1864 } 1865 1866 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1867 struct snd_ctl_elem_value *ucontrol) 1868 { 1869 int val; 1870 static const unsigned int xrate[13] = { 1871 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1872 32000, 44100, 48000, 64000, 88200, 96000 1873 }; 1874 1875 for (val = 0; val < 13; val++) { 1876 if (xrate[val] == PRO_RATE_DEFAULT) 1877 break; 1878 } 1879 1880 ucontrol->value.enumerated.item[0] = val; 1881 return 0; 1882 } 1883 1884 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1885 struct snd_ctl_elem_value *ucontrol) 1886 { 1887 static const unsigned int xrate[13] = { 1888 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1889 32000, 44100, 48000, 64000, 88200, 96000 1890 }; 1891 unsigned char oval; 1892 int change = 0; 1893 1894 oval = PRO_RATE_DEFAULT; 1895 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1896 change = PRO_RATE_DEFAULT != oval; 1897 1898 return change; 1899 } 1900 1901 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = { 1902 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1903 .name = "Multi Track Internal Clock Default", 1904 .info = snd_ice1712_pro_internal_clock_default_info, 1905 .get = snd_ice1712_pro_internal_clock_default_get, 1906 .put = snd_ice1712_pro_internal_clock_default_put 1907 }; 1908 1909 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info 1910 1911 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1912 struct snd_ctl_elem_value *ucontrol) 1913 { 1914 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1915 return 0; 1916 } 1917 1918 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1919 struct snd_ctl_elem_value *ucontrol) 1920 { 1921 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1922 int change = 0, nval; 1923 1924 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1925 spin_lock_irq(&ice->reg_lock); 1926 change = PRO_RATE_LOCKED != nval; 1927 PRO_RATE_LOCKED = nval; 1928 spin_unlock_irq(&ice->reg_lock); 1929 return change; 1930 } 1931 1932 static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = { 1933 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1934 .name = "Multi Track Rate Locking", 1935 .info = snd_ice1712_pro_rate_locking_info, 1936 .get = snd_ice1712_pro_rate_locking_get, 1937 .put = snd_ice1712_pro_rate_locking_put 1938 }; 1939 1940 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info 1941 1942 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1943 struct snd_ctl_elem_value *ucontrol) 1944 { 1945 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 1946 return 0; 1947 } 1948 1949 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1950 struct snd_ctl_elem_value *ucontrol) 1951 { 1952 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1953 int change = 0, nval; 1954 1955 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1956 spin_lock_irq(&ice->reg_lock); 1957 change = PRO_RATE_RESET != nval; 1958 PRO_RATE_RESET = nval; 1959 spin_unlock_irq(&ice->reg_lock); 1960 return change; 1961 } 1962 1963 static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = { 1964 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1965 .name = "Multi Track Rate Reset", 1966 .info = snd_ice1712_pro_rate_reset_info, 1967 .get = snd_ice1712_pro_rate_reset_get, 1968 .put = snd_ice1712_pro_rate_reset_put 1969 }; 1970 1971 /* 1972 * routing 1973 */ 1974 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 1975 struct snd_ctl_elem_info *uinfo) 1976 { 1977 static const char * const texts[] = { 1978 "PCM Out", /* 0 */ 1979 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 1980 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 1981 "IEC958 In L", "IEC958 In R", /* 9-10 */ 1982 "Digital Mixer", /* 11 - optional */ 1983 }; 1984 int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 1985 return snd_ctl_enum_info(uinfo, 1, num_items, texts); 1986 } 1987 1988 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 1989 struct snd_ctl_elem_value *ucontrol) 1990 { 1991 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1992 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 1993 unsigned int val, cval; 1994 1995 spin_lock_irq(&ice->reg_lock); 1996 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 1997 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 1998 spin_unlock_irq(&ice->reg_lock); 1999 2000 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2001 val &= 3; 2002 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2003 if (val == 1 && idx < 2) 2004 ucontrol->value.enumerated.item[0] = 11; 2005 else if (val == 2) 2006 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2007 else if (val == 3) 2008 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2009 else 2010 ucontrol->value.enumerated.item[0] = 0; 2011 return 0; 2012 } 2013 2014 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2015 struct snd_ctl_elem_value *ucontrol) 2016 { 2017 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2018 int change, shift; 2019 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2020 unsigned int val, old_val, nval; 2021 2022 /* update PSDOUT */ 2023 if (ucontrol->value.enumerated.item[0] >= 11) 2024 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2025 else if (ucontrol->value.enumerated.item[0] >= 9) 2026 nval = 3; /* spdif in */ 2027 else if (ucontrol->value.enumerated.item[0] >= 1) 2028 nval = 2; /* analog in */ 2029 else 2030 nval = 0; /* pcm */ 2031 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2032 spin_lock_irq(&ice->reg_lock); 2033 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2034 val &= ~(0x03 << shift); 2035 val |= nval << shift; 2036 change = val != old_val; 2037 if (change) 2038 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2039 spin_unlock_irq(&ice->reg_lock); 2040 if (nval < 2) /* dig mixer of pcm */ 2041 return change; 2042 2043 /* update CAPTURE */ 2044 spin_lock_irq(&ice->reg_lock); 2045 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2046 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2047 if (nval == 2) { /* analog in */ 2048 nval = ucontrol->value.enumerated.item[0] - 1; 2049 val &= ~(0x07 << shift); 2050 val |= nval << shift; 2051 } else { /* spdif in */ 2052 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2053 val &= ~(0x08 << shift); 2054 val |= nval << shift; 2055 } 2056 if (val != old_val) { 2057 change = 1; 2058 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2059 } 2060 spin_unlock_irq(&ice->reg_lock); 2061 return change; 2062 } 2063 2064 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2065 struct snd_ctl_elem_value *ucontrol) 2066 { 2067 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2068 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2069 unsigned int val, cval; 2070 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2071 cval = (val >> (idx * 4 + 8)) & 0x0f; 2072 val = (val >> (idx * 2)) & 0x03; 2073 if (val == 1) 2074 ucontrol->value.enumerated.item[0] = 11; 2075 else if (val == 2) 2076 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2077 else if (val == 3) 2078 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2079 else 2080 ucontrol->value.enumerated.item[0] = 0; 2081 return 0; 2082 } 2083 2084 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2085 struct snd_ctl_elem_value *ucontrol) 2086 { 2087 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2088 int change, shift; 2089 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2090 unsigned int val, old_val, nval; 2091 2092 /* update SPDOUT */ 2093 spin_lock_irq(&ice->reg_lock); 2094 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2095 if (ucontrol->value.enumerated.item[0] >= 11) 2096 nval = 1; 2097 else if (ucontrol->value.enumerated.item[0] >= 9) 2098 nval = 3; 2099 else if (ucontrol->value.enumerated.item[0] >= 1) 2100 nval = 2; 2101 else 2102 nval = 0; 2103 shift = idx * 2; 2104 val &= ~(0x03 << shift); 2105 val |= nval << shift; 2106 shift = idx * 4 + 8; 2107 if (nval == 2) { 2108 nval = ucontrol->value.enumerated.item[0] - 1; 2109 val &= ~(0x07 << shift); 2110 val |= nval << shift; 2111 } else if (nval == 3) { 2112 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2113 val &= ~(0x08 << shift); 2114 val |= nval << shift; 2115 } 2116 change = val != old_val; 2117 if (change) 2118 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2119 spin_unlock_irq(&ice->reg_lock); 2120 return change; 2121 } 2122 2123 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = { 2124 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2125 .name = "H/W Playback Route", 2126 .info = snd_ice1712_pro_route_info, 2127 .get = snd_ice1712_pro_route_analog_get, 2128 .put = snd_ice1712_pro_route_analog_put, 2129 }; 2130 2131 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = { 2132 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2133 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2134 .info = snd_ice1712_pro_route_info, 2135 .get = snd_ice1712_pro_route_spdif_get, 2136 .put = snd_ice1712_pro_route_spdif_put, 2137 .count = 2, 2138 }; 2139 2140 2141 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2142 struct snd_ctl_elem_info *uinfo) 2143 { 2144 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2145 uinfo->count = 1; 2146 uinfo->value.integer.min = 0; 2147 uinfo->value.integer.max = 255; 2148 return 0; 2149 } 2150 2151 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2152 struct snd_ctl_elem_value *ucontrol) 2153 { 2154 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2155 2156 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2157 return 0; 2158 } 2159 2160 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2161 struct snd_ctl_elem_value *ucontrol) 2162 { 2163 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2164 int change; 2165 2166 spin_lock_irq(&ice->reg_lock); 2167 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2168 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2169 spin_unlock_irq(&ice->reg_lock); 2170 return change; 2171 } 2172 2173 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = { 2174 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2175 .name = "Multi Track Volume Rate", 2176 .info = snd_ice1712_pro_volume_rate_info, 2177 .get = snd_ice1712_pro_volume_rate_get, 2178 .put = snd_ice1712_pro_volume_rate_put 2179 }; 2180 2181 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2182 struct snd_ctl_elem_info *uinfo) 2183 { 2184 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2185 uinfo->count = 22; 2186 uinfo->value.integer.min = 0; 2187 uinfo->value.integer.max = 255; 2188 return 0; 2189 } 2190 2191 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2192 struct snd_ctl_elem_value *ucontrol) 2193 { 2194 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2195 int idx; 2196 2197 spin_lock_irq(&ice->reg_lock); 2198 for (idx = 0; idx < 22; idx++) { 2199 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2200 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2201 } 2202 spin_unlock_irq(&ice->reg_lock); 2203 return 0; 2204 } 2205 2206 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = { 2207 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2208 .name = "Multi Track Peak", 2209 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2210 .info = snd_ice1712_pro_peak_info, 2211 .get = snd_ice1712_pro_peak_get 2212 }; 2213 2214 /* 2215 * 2216 */ 2217 2218 /* 2219 * list of available boards 2220 */ 2221 static const struct snd_ice1712_card_info *card_tables[] = { 2222 snd_ice1712_hoontech_cards, 2223 snd_ice1712_delta_cards, 2224 snd_ice1712_ews_cards, 2225 NULL, 2226 }; 2227 2228 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2229 unsigned char dev, 2230 unsigned char addr) 2231 { 2232 long t = 0x10000; 2233 2234 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2235 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2236 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2237 return inb(ICEREG(ice, I2C_DATA)); 2238 } 2239 2240 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2241 const char *modelname) 2242 { 2243 int dev = ICE_I2C_EEPROM_ADDR; /* I2C EEPROM device address */ 2244 unsigned int i, size; 2245 const struct snd_ice1712_card_info * const *tbl, *c; 2246 2247 if (!modelname || !*modelname) { 2248 ice->eeprom.subvendor = 0; 2249 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2250 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2251 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2252 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2253 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2254 if (ice->eeprom.subvendor == 0 || 2255 ice->eeprom.subvendor == (unsigned int)-1) { 2256 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2257 u16 vendor, device; 2258 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2259 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2260 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2261 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2262 dev_err(ice->card->dev, 2263 "No valid ID is found\n"); 2264 return -ENXIO; 2265 } 2266 } 2267 } 2268 for (tbl = card_tables; *tbl; tbl++) { 2269 for (c = *tbl; c->subvendor; c++) { 2270 if (modelname && c->model && !strcmp(modelname, c->model)) { 2271 dev_info(ice->card->dev, 2272 "Using board model %s\n", c->name); 2273 ice->eeprom.subvendor = c->subvendor; 2274 } else if (c->subvendor != ice->eeprom.subvendor) 2275 continue; 2276 if (!c->eeprom_size || !c->eeprom_data) 2277 goto found; 2278 /* if the EEPROM is given by the driver, use it */ 2279 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2280 ice->eeprom.version = 1; 2281 ice->eeprom.size = c->eeprom_size + 6; 2282 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2283 goto read_skipped; 2284 } 2285 } 2286 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2287 ice->eeprom.subvendor); 2288 2289 found: 2290 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2291 if (ice->eeprom.size < 6) 2292 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2293 else if (ice->eeprom.size > 32) { 2294 dev_err(ice->card->dev, 2295 "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2296 return -EIO; 2297 } 2298 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2299 if (ice->eeprom.version != 1) { 2300 dev_err(ice->card->dev, "invalid EEPROM version %i\n", 2301 ice->eeprom.version); 2302 /* return -EIO; */ 2303 } 2304 size = ice->eeprom.size - 6; 2305 for (i = 0; i < size; i++) 2306 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2307 2308 read_skipped: 2309 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2310 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2311 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2312 2313 return 0; 2314 } 2315 2316 2317 2318 static int snd_ice1712_chip_init(struct snd_ice1712 *ice) 2319 { 2320 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2321 udelay(200); 2322 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2323 udelay(200); 2324 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2325 !ice->dxr_enable) 2326 /* Set eeprom value to limit active ADCs and DACs to 6; 2327 * Also disable AC97 as no hardware in standard 6fire card/box 2328 * Note: DXR extensions are not currently supported 2329 */ 2330 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2331 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2332 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2333 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2334 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2335 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2336 ice->gpio.write_mask = ice->eeprom.gpiomask; 2337 ice->gpio.direction = ice->eeprom.gpiodir; 2338 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2339 ice->eeprom.gpiomask); 2340 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2341 ice->eeprom.gpiodir); 2342 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2343 ice->eeprom.gpiostate); 2344 } else { 2345 ice->gpio.write_mask = 0xc0; 2346 ice->gpio.direction = 0xff; 2347 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2348 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2349 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2350 ICE1712_STDSP24_CLOCK_BIT); 2351 } 2352 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2353 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2354 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2355 udelay(100); 2356 outb(0, ICEREG(ice, AC97_CMD)); 2357 udelay(200); 2358 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2359 } 2360 snd_ice1712_set_pro_rate(ice, 48000, 1); 2361 /* unmask used interrupts */ 2362 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2363 ICE1712_IRQ_MPU2 : 0) | 2364 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2365 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2366 ICEREG(ice, IRQMASK)); 2367 outb(0x00, ICEMT(ice, IRQ)); 2368 2369 return 0; 2370 } 2371 2372 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2373 { 2374 int err; 2375 struct snd_kcontrol *kctl; 2376 2377 if (snd_BUG_ON(!ice->pcm_pro)) 2378 return -EIO; 2379 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2380 if (err < 0) 2381 return err; 2382 kctl->id.device = ice->pcm_pro->device; 2383 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2384 if (err < 0) 2385 return err; 2386 kctl->id.device = ice->pcm_pro->device; 2387 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2388 if (err < 0) 2389 return err; 2390 kctl->id.device = ice->pcm_pro->device; 2391 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2392 if (err < 0) 2393 return err; 2394 kctl->id.device = ice->pcm_pro->device; 2395 ice->spdif.stream_ctl = kctl; 2396 return 0; 2397 } 2398 2399 2400 static int snd_ice1712_build_controls(struct snd_ice1712 *ice) 2401 { 2402 int err; 2403 2404 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2405 if (err < 0) 2406 return err; 2407 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2408 if (err < 0) 2409 return err; 2410 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2411 if (err < 0) 2412 return err; 2413 2414 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2415 if (err < 0) 2416 return err; 2417 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2418 if (err < 0) 2419 return err; 2420 2421 if (ice->num_total_dacs > 0) { 2422 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2423 tmp.count = ice->num_total_dacs; 2424 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2425 if (err < 0) 2426 return err; 2427 } 2428 2429 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2430 if (err < 0) 2431 return err; 2432 2433 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2434 if (err < 0) 2435 return err; 2436 return snd_ctl_add(ice->card, 2437 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2438 } 2439 2440 static int snd_ice1712_free(struct snd_ice1712 *ice) 2441 { 2442 if (!ice->port) 2443 goto __hw_end; 2444 /* mask all interrupts */ 2445 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ)); 2446 outb(0xff, ICEREG(ice, IRQMASK)); 2447 /* --- */ 2448 __hw_end: 2449 if (ice->irq >= 0) 2450 free_irq(ice->irq, ice); 2451 2452 if (ice->port) 2453 pci_release_regions(ice->pci); 2454 snd_ice1712_akm4xxx_free(ice); 2455 pci_disable_device(ice->pci); 2456 kfree(ice->spec); 2457 kfree(ice); 2458 return 0; 2459 } 2460 2461 static int snd_ice1712_dev_free(struct snd_device *device) 2462 { 2463 struct snd_ice1712 *ice = device->device_data; 2464 return snd_ice1712_free(ice); 2465 } 2466 2467 static int snd_ice1712_create(struct snd_card *card, 2468 struct pci_dev *pci, 2469 const char *modelname, 2470 int omni, 2471 int cs8427_timeout, 2472 int dxr_enable, 2473 struct snd_ice1712 **r_ice1712) 2474 { 2475 struct snd_ice1712 *ice; 2476 int err; 2477 static const struct snd_device_ops ops = { 2478 .dev_free = snd_ice1712_dev_free, 2479 }; 2480 2481 *r_ice1712 = NULL; 2482 2483 /* enable PCI device */ 2484 err = pci_enable_device(pci); 2485 if (err < 0) 2486 return err; 2487 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2488 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(28)) < 0 || 2489 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(28)) < 0) { 2490 dev_err(card->dev, 2491 "architecture does not support 28bit PCI busmaster DMA\n"); 2492 pci_disable_device(pci); 2493 return -ENXIO; 2494 } 2495 2496 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2497 if (ice == NULL) { 2498 pci_disable_device(pci); 2499 return -ENOMEM; 2500 } 2501 ice->omni = omni ? 1 : 0; 2502 if (cs8427_timeout < 1) 2503 cs8427_timeout = 1; 2504 else if (cs8427_timeout > 1000) 2505 cs8427_timeout = 1000; 2506 ice->cs8427_timeout = cs8427_timeout; 2507 ice->dxr_enable = dxr_enable; 2508 spin_lock_init(&ice->reg_lock); 2509 mutex_init(&ice->gpio_mutex); 2510 mutex_init(&ice->i2c_mutex); 2511 mutex_init(&ice->open_mutex); 2512 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2513 ice->gpio.get_mask = snd_ice1712_get_gpio_mask; 2514 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2515 ice->gpio.get_dir = snd_ice1712_get_gpio_dir; 2516 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2517 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2518 2519 ice->spdif.cs8403_bits = 2520 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2521 0x10 | /* no emphasis */ 2522 0x20); /* PCM encoder/decoder */ 2523 ice->card = card; 2524 ice->pci = pci; 2525 ice->irq = -1; 2526 pci_set_master(pci); 2527 /* disable legacy emulation */ 2528 pci_write_config_word(ice->pci, 0x40, 0x807f); 2529 pci_write_config_word(ice->pci, 0x42, 0x0006); 2530 snd_ice1712_proc_init(ice); 2531 2532 card->private_data = ice; 2533 2534 err = pci_request_regions(pci, "ICE1712"); 2535 if (err < 0) { 2536 kfree(ice); 2537 pci_disable_device(pci); 2538 return err; 2539 } 2540 ice->port = pci_resource_start(pci, 0); 2541 ice->ddma_port = pci_resource_start(pci, 1); 2542 ice->dmapath_port = pci_resource_start(pci, 2); 2543 ice->profi_port = pci_resource_start(pci, 3); 2544 2545 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2546 KBUILD_MODNAME, ice)) { 2547 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2548 snd_ice1712_free(ice); 2549 return -EIO; 2550 } 2551 2552 ice->irq = pci->irq; 2553 card->sync_irq = ice->irq; 2554 2555 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2556 snd_ice1712_free(ice); 2557 return -EIO; 2558 } 2559 if (snd_ice1712_chip_init(ice) < 0) { 2560 snd_ice1712_free(ice); 2561 return -EIO; 2562 } 2563 2564 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2565 if (err < 0) { 2566 snd_ice1712_free(ice); 2567 return err; 2568 } 2569 2570 *r_ice1712 = ice; 2571 return 0; 2572 } 2573 2574 2575 /* 2576 * 2577 * Registration 2578 * 2579 */ 2580 2581 static struct snd_ice1712_card_info no_matched; 2582 2583 static int snd_ice1712_probe(struct pci_dev *pci, 2584 const struct pci_device_id *pci_id) 2585 { 2586 static int dev; 2587 struct snd_card *card; 2588 struct snd_ice1712 *ice; 2589 int pcm_dev = 0, err; 2590 const struct snd_ice1712_card_info * const *tbl, *c; 2591 2592 if (dev >= SNDRV_CARDS) 2593 return -ENODEV; 2594 if (!enable[dev]) { 2595 dev++; 2596 return -ENOENT; 2597 } 2598 2599 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2600 0, &card); 2601 if (err < 0) 2602 return err; 2603 2604 strcpy(card->driver, "ICE1712"); 2605 strcpy(card->shortname, "ICEnsemble ICE1712"); 2606 2607 err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2608 cs8427_timeout[dev], dxr_enable[dev], &ice); 2609 if (err < 0) { 2610 snd_card_free(card); 2611 return err; 2612 } 2613 2614 for (tbl = card_tables; *tbl; tbl++) { 2615 for (c = *tbl; c->subvendor; c++) { 2616 if (c->subvendor == ice->eeprom.subvendor) { 2617 ice->card_info = c; 2618 strcpy(card->shortname, c->name); 2619 if (c->driver) /* specific driver? */ 2620 strcpy(card->driver, c->driver); 2621 if (c->chip_init) { 2622 err = c->chip_init(ice); 2623 if (err < 0) { 2624 snd_card_free(card); 2625 return err; 2626 } 2627 } 2628 goto __found; 2629 } 2630 } 2631 } 2632 c = &no_matched; 2633 __found: 2634 2635 err = snd_ice1712_pcm_profi(ice, pcm_dev++); 2636 if (err < 0) { 2637 snd_card_free(card); 2638 return err; 2639 } 2640 2641 if (ice_has_con_ac97(ice)) { 2642 err = snd_ice1712_pcm(ice, pcm_dev++); 2643 if (err < 0) { 2644 snd_card_free(card); 2645 return err; 2646 } 2647 } 2648 2649 err = snd_ice1712_ac97_mixer(ice); 2650 if (err < 0) { 2651 snd_card_free(card); 2652 return err; 2653 } 2654 2655 err = snd_ice1712_build_controls(ice); 2656 if (err < 0) { 2657 snd_card_free(card); 2658 return err; 2659 } 2660 2661 if (c->build_controls) { 2662 err = c->build_controls(ice); 2663 if (err < 0) { 2664 snd_card_free(card); 2665 return err; 2666 } 2667 } 2668 2669 if (ice_has_con_ac97(ice)) { 2670 err = snd_ice1712_pcm_ds(ice, pcm_dev++); 2671 if (err < 0) { 2672 snd_card_free(card); 2673 return err; 2674 } 2675 } 2676 2677 if (!c->no_mpu401) { 2678 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2679 ICEREG(ice, MPU1_CTRL), 2680 c->mpu401_1_info_flags | 2681 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2682 -1, &ice->rmidi[0]); 2683 if (err < 0) { 2684 snd_card_free(card); 2685 return err; 2686 } 2687 if (c->mpu401_1_name) 2688 /* Preferred name available in card_info */ 2689 snprintf(ice->rmidi[0]->name, 2690 sizeof(ice->rmidi[0]->name), 2691 "%s %d", c->mpu401_1_name, card->number); 2692 2693 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2694 /* 2nd port used */ 2695 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2696 ICEREG(ice, MPU2_CTRL), 2697 c->mpu401_2_info_flags | 2698 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2699 -1, &ice->rmidi[1]); 2700 2701 if (err < 0) { 2702 snd_card_free(card); 2703 return err; 2704 } 2705 if (c->mpu401_2_name) 2706 /* Preferred name available in card_info */ 2707 snprintf(ice->rmidi[1]->name, 2708 sizeof(ice->rmidi[1]->name), 2709 "%s %d", c->mpu401_2_name, 2710 card->number); 2711 } 2712 } 2713 2714 snd_ice1712_set_input_clock_source(ice, 0); 2715 2716 sprintf(card->longname, "%s at 0x%lx, irq %i", 2717 card->shortname, ice->port, ice->irq); 2718 2719 err = snd_card_register(card); 2720 if (err < 0) { 2721 snd_card_free(card); 2722 return err; 2723 } 2724 pci_set_drvdata(pci, card); 2725 dev++; 2726 return 0; 2727 } 2728 2729 static void snd_ice1712_remove(struct pci_dev *pci) 2730 { 2731 struct snd_card *card = pci_get_drvdata(pci); 2732 struct snd_ice1712 *ice = card->private_data; 2733 2734 if (ice->card_info && ice->card_info->chip_exit) 2735 ice->card_info->chip_exit(ice); 2736 snd_card_free(card); 2737 } 2738 2739 #ifdef CONFIG_PM_SLEEP 2740 static int snd_ice1712_suspend(struct device *dev) 2741 { 2742 struct snd_card *card = dev_get_drvdata(dev); 2743 struct snd_ice1712 *ice = card->private_data; 2744 2745 if (!ice->pm_suspend_enabled) 2746 return 0; 2747 2748 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2749 2750 snd_ac97_suspend(ice->ac97); 2751 2752 spin_lock_irq(&ice->reg_lock); 2753 ice->pm_saved_is_spdif_master = is_spdif_master(ice); 2754 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT)); 2755 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2756 spin_unlock_irq(&ice->reg_lock); 2757 2758 if (ice->pm_suspend) 2759 ice->pm_suspend(ice); 2760 return 0; 2761 } 2762 2763 static int snd_ice1712_resume(struct device *dev) 2764 { 2765 struct snd_card *card = dev_get_drvdata(dev); 2766 struct snd_ice1712 *ice = card->private_data; 2767 int rate; 2768 2769 if (!ice->pm_suspend_enabled) 2770 return 0; 2771 2772 if (ice->cur_rate) 2773 rate = ice->cur_rate; 2774 else 2775 rate = PRO_RATE_DEFAULT; 2776 2777 if (snd_ice1712_chip_init(ice) < 0) { 2778 snd_card_disconnect(card); 2779 return -EIO; 2780 } 2781 2782 ice->cur_rate = rate; 2783 2784 if (ice->pm_resume) 2785 ice->pm_resume(ice); 2786 2787 if (ice->pm_saved_is_spdif_master) { 2788 /* switching to external clock via SPDIF */ 2789 spin_lock_irq(&ice->reg_lock); 2790 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER, 2791 ICEMT(ice, RATE)); 2792 spin_unlock_irq(&ice->reg_lock); 2793 snd_ice1712_set_input_clock_source(ice, 1); 2794 } else { 2795 /* internal on-card clock */ 2796 snd_ice1712_set_pro_rate(ice, rate, 1); 2797 snd_ice1712_set_input_clock_source(ice, 0); 2798 } 2799 2800 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT)); 2801 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03)); 2802 2803 snd_ac97_resume(ice->ac97); 2804 2805 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2806 return 0; 2807 } 2808 2809 static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume); 2810 #define SND_VT1712_PM_OPS &snd_ice1712_pm 2811 #else 2812 #define SND_VT1712_PM_OPS NULL 2813 #endif /* CONFIG_PM_SLEEP */ 2814 2815 static struct pci_driver ice1712_driver = { 2816 .name = KBUILD_MODNAME, 2817 .id_table = snd_ice1712_ids, 2818 .probe = snd_ice1712_probe, 2819 .remove = snd_ice1712_remove, 2820 .driver = { 2821 .pm = SND_VT1712_PM_OPS, 2822 }, 2823 }; 2824 2825 module_pci_driver(ice1712_driver); 2826