1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * ALSA driver for ICEnsemble ICE1712 (Envy24) 4 * 5 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 6 */ 7 8 /* 9 NOTES: 10 - spdif nonaudio consumer mode does not work (at least with my 11 Sony STR-DB830) 12 */ 13 14 /* 15 * Changes: 16 * 17 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 18 * split the code to several files. each low-level routine 19 * is stored in the local file and called from registration 20 * function from card_info struct. 21 * 22 * 2002.11.26 James Stafford <jstafford@ampltd.com> 23 * Added support for VT1724 (Envy24HT) 24 * I have left out support for 176.4 and 192 KHz for the moment. 25 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 26 * 27 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 28 * Split vt1724 part to an independent driver. 29 * The GPIO is accessed through the callback functions now. 30 * 31 * 2004.03.31 Doug McLain <nostar@comcast.net> 32 * Added support for Event Electronics EZ8 card to hoontech.c. 33 */ 34 35 36 #include <linux/delay.h> 37 #include <linux/interrupt.h> 38 #include <linux/init.h> 39 #include <linux/pci.h> 40 #include <linux/dma-mapping.h> 41 #include <linux/slab.h> 42 #include <linux/module.h> 43 #include <linux/mutex.h> 44 45 #include <sound/core.h> 46 #include <sound/cs8427.h> 47 #include <sound/info.h> 48 #include <sound/initval.h> 49 #include <sound/tlv.h> 50 51 #include <sound/asoundef.h> 52 53 #include "ice1712.h" 54 55 /* lowlevel routines */ 56 #include "delta.h" 57 #include "ews.h" 58 #include "hoontech.h" 59 60 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 61 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 62 MODULE_LICENSE("GPL"); 63 MODULE_SUPPORTED_DEVICE("{" 64 HOONTECH_DEVICE_DESC 65 DELTA_DEVICE_DESC 66 EWS_DEVICE_DESC 67 "{ICEnsemble,Generic ICE1712}," 68 "{ICEnsemble,Generic Envy24}}"); 69 70 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 71 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 72 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 73 static char *model[SNDRV_CARDS]; 74 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 75 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */ 76 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 77 78 module_param_array(index, int, NULL, 0444); 79 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 80 module_param_array(id, charp, NULL, 0444); 81 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 82 module_param_array(enable, bool, NULL, 0444); 83 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 84 module_param_array(omni, bool, NULL, 0444); 85 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 86 module_param_array(cs8427_timeout, int, NULL, 0444); 87 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 88 module_param_array(model, charp, NULL, 0444); 89 MODULE_PARM_DESC(model, "Use the given board model."); 90 module_param_array(dxr_enable, int, NULL, 0444); 91 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 92 93 94 static const struct pci_device_id snd_ice1712_ids[] = { 95 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */ 96 { 0, } 97 }; 98 99 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 100 101 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 102 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 103 104 static int PRO_RATE_LOCKED; 105 static int PRO_RATE_RESET = 1; 106 static unsigned int PRO_RATE_DEFAULT = 44100; 107 108 /* 109 * Basic I/O 110 */ 111 112 /* check whether the clock mode is spdif-in */ 113 static inline int is_spdif_master(struct snd_ice1712 *ice) 114 { 115 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 116 } 117 118 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 119 { 120 return is_spdif_master(ice) || PRO_RATE_LOCKED; 121 } 122 123 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data) 124 { 125 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 126 outl(data, ICEDS(ice, DATA)); 127 } 128 129 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr) 130 { 131 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 132 return inl(ICEDS(ice, DATA)); 133 } 134 135 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 136 unsigned short reg, 137 unsigned short val) 138 { 139 struct snd_ice1712 *ice = ac97->private_data; 140 int tm; 141 unsigned char old_cmd = 0; 142 143 for (tm = 0; tm < 0x10000; tm++) { 144 old_cmd = inb(ICEREG(ice, AC97_CMD)); 145 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 146 continue; 147 if (!(old_cmd & ICE1712_AC97_READY)) 148 continue; 149 break; 150 } 151 outb(reg, ICEREG(ice, AC97_INDEX)); 152 outw(val, ICEREG(ice, AC97_DATA)); 153 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 154 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 155 for (tm = 0; tm < 0x10000; tm++) 156 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 157 break; 158 } 159 160 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 161 unsigned short reg) 162 { 163 struct snd_ice1712 *ice = ac97->private_data; 164 int tm; 165 unsigned char old_cmd = 0; 166 167 for (tm = 0; tm < 0x10000; tm++) { 168 old_cmd = inb(ICEREG(ice, AC97_CMD)); 169 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 170 continue; 171 if (!(old_cmd & ICE1712_AC97_READY)) 172 continue; 173 break; 174 } 175 outb(reg, ICEREG(ice, AC97_INDEX)); 176 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 177 for (tm = 0; tm < 0x10000; tm++) 178 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 179 break; 180 if (tm >= 0x10000) /* timeout */ 181 return ~0; 182 return inw(ICEREG(ice, AC97_DATA)); 183 } 184 185 /* 186 * pro ac97 section 187 */ 188 189 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 190 unsigned short reg, 191 unsigned short val) 192 { 193 struct snd_ice1712 *ice = ac97->private_data; 194 int tm; 195 unsigned char old_cmd = 0; 196 197 for (tm = 0; tm < 0x10000; tm++) { 198 old_cmd = inb(ICEMT(ice, AC97_CMD)); 199 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 200 continue; 201 if (!(old_cmd & ICE1712_AC97_READY)) 202 continue; 203 break; 204 } 205 outb(reg, ICEMT(ice, AC97_INDEX)); 206 outw(val, ICEMT(ice, AC97_DATA)); 207 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 208 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 209 for (tm = 0; tm < 0x10000; tm++) 210 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 211 break; 212 } 213 214 215 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 216 unsigned short reg) 217 { 218 struct snd_ice1712 *ice = ac97->private_data; 219 int tm; 220 unsigned char old_cmd = 0; 221 222 for (tm = 0; tm < 0x10000; tm++) { 223 old_cmd = inb(ICEMT(ice, AC97_CMD)); 224 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 225 continue; 226 if (!(old_cmd & ICE1712_AC97_READY)) 227 continue; 228 break; 229 } 230 outb(reg, ICEMT(ice, AC97_INDEX)); 231 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 232 for (tm = 0; tm < 0x10000; tm++) 233 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 234 break; 235 if (tm >= 0x10000) /* timeout */ 236 return ~0; 237 return inw(ICEMT(ice, AC97_DATA)); 238 } 239 240 /* 241 * consumer ac97 digital mix 242 */ 243 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info 244 245 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 246 { 247 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 248 249 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 250 return 0; 251 } 252 253 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 254 { 255 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 256 unsigned char val, nval; 257 258 spin_lock_irq(&ice->reg_lock); 259 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 260 nval = val & ~ICE1712_ROUTE_AC97; 261 if (ucontrol->value.integer.value[0]) 262 nval |= ICE1712_ROUTE_AC97; 263 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 264 spin_unlock_irq(&ice->reg_lock); 265 return val != nval; 266 } 267 268 static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = { 269 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 270 .name = "Digital Mixer To AC97", 271 .info = snd_ice1712_digmix_route_ac97_info, 272 .get = snd_ice1712_digmix_route_ac97_get, 273 .put = snd_ice1712_digmix_route_ac97_put, 274 }; 275 276 277 /* 278 * gpio operations 279 */ 280 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 281 { 282 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 283 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 284 } 285 286 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice) 287 { 288 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION); 289 } 290 291 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice) 292 { 293 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK); 294 } 295 296 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 297 { 298 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 299 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 300 } 301 302 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 303 { 304 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 305 } 306 307 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 308 { 309 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 310 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 311 } 312 313 /* 314 * 315 * CS8427 interface 316 * 317 */ 318 319 /* 320 * change the input clock selection 321 * spdif_clock = 1 - IEC958 input, 0 - Envy24 322 */ 323 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 324 { 325 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 326 unsigned char val, nval; 327 int res = 0; 328 329 snd_i2c_lock(ice->i2c); 330 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 331 snd_i2c_unlock(ice->i2c); 332 return -EIO; 333 } 334 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 335 snd_i2c_unlock(ice->i2c); 336 return -EIO; 337 } 338 nval = val & 0xf0; 339 if (spdif_clock) 340 nval |= 0x01; 341 else 342 nval |= 0x04; 343 if (val != nval) { 344 reg[1] = nval; 345 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 346 res = -EIO; 347 } else { 348 res++; 349 } 350 } 351 snd_i2c_unlock(ice->i2c); 352 return res; 353 } 354 355 /* 356 * spdif callbacks 357 */ 358 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 359 { 360 snd_cs8427_iec958_active(ice->cs8427, 1); 361 } 362 363 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 364 { 365 snd_cs8427_iec958_active(ice->cs8427, 0); 366 } 367 368 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 369 { 370 snd_cs8427_iec958_pcm(ice->cs8427, rate); 371 } 372 373 /* 374 * create and initialize callbacks for cs8427 interface 375 */ 376 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 377 { 378 int err; 379 380 err = snd_cs8427_create(ice->i2c, addr, 381 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427); 382 if (err < 0) { 383 dev_err(ice->card->dev, "CS8427 initialization failed\n"); 384 return err; 385 } 386 ice->spdif.ops.open = open_cs8427; 387 ice->spdif.ops.close = close_cs8427; 388 ice->spdif.ops.setup_rate = setup_cs8427; 389 return 0; 390 } 391 392 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 393 { 394 /* change CS8427 clock source too */ 395 if (ice->cs8427) 396 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 397 /* notify ak4524 chip as well */ 398 if (spdif_is_master) { 399 unsigned int i; 400 for (i = 0; i < ice->akm_codecs; i++) { 401 if (ice->akm[i].ops.set_rate_val) 402 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 403 } 404 } 405 } 406 407 /* 408 * Interrupt handler 409 */ 410 411 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 412 { 413 struct snd_ice1712 *ice = dev_id; 414 unsigned char status; 415 int handled = 0; 416 417 while (1) { 418 status = inb(ICEREG(ice, IRQSTAT)); 419 if (status == 0) 420 break; 421 handled = 1; 422 if (status & ICE1712_IRQ_MPU1) { 423 if (ice->rmidi[0]) 424 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 425 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 426 status &= ~ICE1712_IRQ_MPU1; 427 } 428 if (status & ICE1712_IRQ_TIMER) 429 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 430 if (status & ICE1712_IRQ_MPU2) { 431 if (ice->rmidi[1]) 432 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 433 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 434 status &= ~ICE1712_IRQ_MPU2; 435 } 436 if (status & ICE1712_IRQ_PROPCM) { 437 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 438 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 439 if (ice->playback_pro_substream) 440 snd_pcm_period_elapsed(ice->playback_pro_substream); 441 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 442 } 443 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 444 if (ice->capture_pro_substream) 445 snd_pcm_period_elapsed(ice->capture_pro_substream); 446 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 447 } 448 } 449 if (status & ICE1712_IRQ_FM) 450 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 451 if (status & ICE1712_IRQ_PBKDS) { 452 u32 idx; 453 u16 pbkstatus; 454 struct snd_pcm_substream *substream; 455 pbkstatus = inw(ICEDS(ice, INTSTAT)); 456 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */ 457 for (idx = 0; idx < 6; idx++) { 458 if ((pbkstatus & (3 << (idx * 2))) == 0) 459 continue; 460 substream = ice->playback_con_substream_ds[idx]; 461 if (substream != NULL) 462 snd_pcm_period_elapsed(substream); 463 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 464 } 465 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 466 } 467 if (status & ICE1712_IRQ_CONCAP) { 468 if (ice->capture_con_substream) 469 snd_pcm_period_elapsed(ice->capture_con_substream); 470 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 471 } 472 if (status & ICE1712_IRQ_CONPBK) { 473 if (ice->playback_con_substream) 474 snd_pcm_period_elapsed(ice->playback_con_substream); 475 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 476 } 477 } 478 return IRQ_RETVAL(handled); 479 } 480 481 482 /* 483 * PCM part - consumer I/O 484 */ 485 486 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 487 int cmd) 488 { 489 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 490 int result = 0; 491 u32 tmp; 492 493 spin_lock(&ice->reg_lock); 494 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 495 if (cmd == SNDRV_PCM_TRIGGER_START) { 496 tmp |= 1; 497 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 498 tmp &= ~1; 499 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 500 tmp |= 2; 501 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 502 tmp &= ~2; 503 } else { 504 result = -EINVAL; 505 } 506 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 507 spin_unlock(&ice->reg_lock); 508 return result; 509 } 510 511 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 512 int cmd) 513 { 514 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 515 int result = 0; 516 u32 tmp; 517 518 spin_lock(&ice->reg_lock); 519 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 520 if (cmd == SNDRV_PCM_TRIGGER_START) { 521 tmp |= 1; 522 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 523 tmp &= ~1; 524 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 525 tmp |= 2; 526 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 527 tmp &= ~2; 528 } else { 529 result = -EINVAL; 530 } 531 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 532 spin_unlock(&ice->reg_lock); 533 return result; 534 } 535 536 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 537 int cmd) 538 { 539 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 540 int result = 0; 541 u8 tmp; 542 543 spin_lock(&ice->reg_lock); 544 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 545 if (cmd == SNDRV_PCM_TRIGGER_START) { 546 tmp |= 1; 547 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 548 tmp &= ~1; 549 } else { 550 result = -EINVAL; 551 } 552 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 553 spin_unlock(&ice->reg_lock); 554 return result; 555 } 556 557 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 558 { 559 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 560 struct snd_pcm_runtime *runtime = substream->runtime; 561 u32 period_size, buf_size, rate, tmp; 562 563 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 564 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 565 tmp = 0x0000; 566 if (snd_pcm_format_width(runtime->format) == 16) 567 tmp |= 0x10; 568 if (runtime->channels == 2) 569 tmp |= 0x08; 570 rate = (runtime->rate * 8192) / 375; 571 if (rate > 0x000fffff) 572 rate = 0x000fffff; 573 spin_lock_irq(&ice->reg_lock); 574 outb(0, ice->ddma_port + 15); 575 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 576 outl(runtime->dma_addr, ice->ddma_port + 0); 577 outw(buf_size, ice->ddma_port + 4); 578 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 579 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 580 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 581 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 582 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 583 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 584 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 585 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 586 spin_unlock_irq(&ice->reg_lock); 587 return 0; 588 } 589 590 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 591 { 592 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 593 struct snd_pcm_runtime *runtime = substream->runtime; 594 u32 period_size, rate, tmp, chn; 595 596 period_size = snd_pcm_lib_period_bytes(substream) - 1; 597 tmp = 0x0064; 598 if (snd_pcm_format_width(runtime->format) == 16) 599 tmp &= ~0x04; 600 if (runtime->channels == 2) 601 tmp |= 0x08; 602 rate = (runtime->rate * 8192) / 375; 603 if (rate > 0x000fffff) 604 rate = 0x000fffff; 605 ice->playback_con_active_buf[substream->number] = 0; 606 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 607 chn = substream->number * 2; 608 spin_lock_irq(&ice->reg_lock); 609 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 610 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 611 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 612 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 613 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 614 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 615 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 616 if (runtime->channels == 2) { 617 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 618 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 619 } 620 spin_unlock_irq(&ice->reg_lock); 621 return 0; 622 } 623 624 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 625 { 626 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 627 struct snd_pcm_runtime *runtime = substream->runtime; 628 u32 period_size, buf_size; 629 u8 tmp; 630 631 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 632 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 633 tmp = 0x06; 634 if (snd_pcm_format_width(runtime->format) == 16) 635 tmp &= ~0x04; 636 if (runtime->channels == 2) 637 tmp &= ~0x02; 638 spin_lock_irq(&ice->reg_lock); 639 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 640 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 641 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 642 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 643 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 644 spin_unlock_irq(&ice->reg_lock); 645 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 646 return 0; 647 } 648 649 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 650 { 651 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 652 struct snd_pcm_runtime *runtime = substream->runtime; 653 size_t ptr; 654 655 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 656 return 0; 657 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 658 ptr = bytes_to_frames(substream->runtime, ptr); 659 if (ptr == runtime->buffer_size) 660 ptr = 0; 661 return ptr; 662 } 663 664 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 665 { 666 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 667 u8 addr; 668 size_t ptr; 669 670 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 671 return 0; 672 if (ice->playback_con_active_buf[substream->number]) 673 addr = ICE1712_DSC_ADDR1; 674 else 675 addr = ICE1712_DSC_ADDR0; 676 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 677 ice->playback_con_virt_addr[substream->number]; 678 ptr = bytes_to_frames(substream->runtime, ptr); 679 if (ptr == substream->runtime->buffer_size) 680 ptr = 0; 681 return ptr; 682 } 683 684 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 685 { 686 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 687 size_t ptr; 688 689 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 690 return 0; 691 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 692 ptr = bytes_to_frames(substream->runtime, ptr); 693 if (ptr == substream->runtime->buffer_size) 694 ptr = 0; 695 return ptr; 696 } 697 698 static const struct snd_pcm_hardware snd_ice1712_playback = { 699 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 700 SNDRV_PCM_INFO_BLOCK_TRANSFER | 701 SNDRV_PCM_INFO_MMAP_VALID | 702 SNDRV_PCM_INFO_PAUSE), 703 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 704 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 705 .rate_min = 4000, 706 .rate_max = 48000, 707 .channels_min = 1, 708 .channels_max = 2, 709 .buffer_bytes_max = (64*1024), 710 .period_bytes_min = 64, 711 .period_bytes_max = (64*1024), 712 .periods_min = 1, 713 .periods_max = 1024, 714 .fifo_size = 0, 715 }; 716 717 static const struct snd_pcm_hardware snd_ice1712_playback_ds = { 718 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 719 SNDRV_PCM_INFO_BLOCK_TRANSFER | 720 SNDRV_PCM_INFO_MMAP_VALID | 721 SNDRV_PCM_INFO_PAUSE), 722 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 723 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 724 .rate_min = 4000, 725 .rate_max = 48000, 726 .channels_min = 1, 727 .channels_max = 2, 728 .buffer_bytes_max = (128*1024), 729 .period_bytes_min = 64, 730 .period_bytes_max = (128*1024), 731 .periods_min = 2, 732 .periods_max = 2, 733 .fifo_size = 0, 734 }; 735 736 static const struct snd_pcm_hardware snd_ice1712_capture = { 737 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 738 SNDRV_PCM_INFO_BLOCK_TRANSFER | 739 SNDRV_PCM_INFO_MMAP_VALID), 740 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 741 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 742 .rate_min = 4000, 743 .rate_max = 48000, 744 .channels_min = 1, 745 .channels_max = 2, 746 .buffer_bytes_max = (64*1024), 747 .period_bytes_min = 64, 748 .period_bytes_max = (64*1024), 749 .periods_min = 1, 750 .periods_max = 1024, 751 .fifo_size = 0, 752 }; 753 754 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 755 { 756 struct snd_pcm_runtime *runtime = substream->runtime; 757 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 758 759 ice->playback_con_substream = substream; 760 runtime->hw = snd_ice1712_playback; 761 return 0; 762 } 763 764 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 765 { 766 struct snd_pcm_runtime *runtime = substream->runtime; 767 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 768 u32 tmp; 769 770 ice->playback_con_substream_ds[substream->number] = substream; 771 runtime->hw = snd_ice1712_playback_ds; 772 spin_lock_irq(&ice->reg_lock); 773 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 774 outw(tmp, ICEDS(ice, INTMASK)); 775 spin_unlock_irq(&ice->reg_lock); 776 return 0; 777 } 778 779 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 780 { 781 struct snd_pcm_runtime *runtime = substream->runtime; 782 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 783 784 ice->capture_con_substream = substream; 785 runtime->hw = snd_ice1712_capture; 786 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 787 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 788 runtime->hw.rate_min = 48000; 789 return 0; 790 } 791 792 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 793 { 794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 795 796 ice->playback_con_substream = NULL; 797 return 0; 798 } 799 800 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 801 { 802 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 803 u32 tmp; 804 805 spin_lock_irq(&ice->reg_lock); 806 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 807 outw(tmp, ICEDS(ice, INTMASK)); 808 spin_unlock_irq(&ice->reg_lock); 809 ice->playback_con_substream_ds[substream->number] = NULL; 810 return 0; 811 } 812 813 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 814 { 815 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 816 817 ice->capture_con_substream = NULL; 818 return 0; 819 } 820 821 static const struct snd_pcm_ops snd_ice1712_playback_ops = { 822 .open = snd_ice1712_playback_open, 823 .close = snd_ice1712_playback_close, 824 .ioctl = snd_pcm_lib_ioctl, 825 .prepare = snd_ice1712_playback_prepare, 826 .trigger = snd_ice1712_playback_trigger, 827 .pointer = snd_ice1712_playback_pointer, 828 }; 829 830 static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 831 .open = snd_ice1712_playback_ds_open, 832 .close = snd_ice1712_playback_ds_close, 833 .ioctl = snd_pcm_lib_ioctl, 834 .prepare = snd_ice1712_playback_ds_prepare, 835 .trigger = snd_ice1712_playback_ds_trigger, 836 .pointer = snd_ice1712_playback_ds_pointer, 837 }; 838 839 static const struct snd_pcm_ops snd_ice1712_capture_ops = { 840 .open = snd_ice1712_capture_open, 841 .close = snd_ice1712_capture_close, 842 .ioctl = snd_pcm_lib_ioctl, 843 .prepare = snd_ice1712_capture_prepare, 844 .trigger = snd_ice1712_capture_trigger, 845 .pointer = snd_ice1712_capture_pointer, 846 }; 847 848 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device) 849 { 850 struct snd_pcm *pcm; 851 int err; 852 853 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 854 if (err < 0) 855 return err; 856 857 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 858 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 859 860 pcm->private_data = ice; 861 pcm->info_flags = 0; 862 strcpy(pcm->name, "ICE1712 consumer"); 863 ice->pcm = pcm; 864 865 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 866 &ice->pci->dev, 64*1024, 64*1024); 867 868 dev_warn(ice->card->dev, 869 "Consumer PCM code does not work well at the moment --jk\n"); 870 871 return 0; 872 } 873 874 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device) 875 { 876 struct snd_pcm *pcm; 877 int err; 878 879 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 880 if (err < 0) 881 return err; 882 883 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 884 885 pcm->private_data = ice; 886 pcm->info_flags = 0; 887 strcpy(pcm->name, "ICE1712 consumer (DS)"); 888 ice->pcm_ds = pcm; 889 890 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 891 &ice->pci->dev, 64*1024, 128*1024); 892 893 return 0; 894 } 895 896 /* 897 * PCM code - professional part (multitrack) 898 */ 899 900 static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 901 32000, 44100, 48000, 64000, 88200, 96000 }; 902 903 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { 904 .count = ARRAY_SIZE(rates), 905 .list = rates, 906 .mask = 0, 907 }; 908 909 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 910 int cmd) 911 { 912 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 913 switch (cmd) { 914 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 915 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 916 { 917 unsigned int what; 918 unsigned int old; 919 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 920 return -EINVAL; 921 what = ICE1712_PLAYBACK_PAUSE; 922 snd_pcm_trigger_done(substream, substream); 923 spin_lock(&ice->reg_lock); 924 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 925 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 926 old |= what; 927 else 928 old &= ~what; 929 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 930 spin_unlock(&ice->reg_lock); 931 break; 932 } 933 case SNDRV_PCM_TRIGGER_START: 934 case SNDRV_PCM_TRIGGER_STOP: 935 { 936 unsigned int what = 0; 937 unsigned int old; 938 struct snd_pcm_substream *s; 939 940 snd_pcm_group_for_each_entry(s, substream) { 941 if (s == ice->playback_pro_substream) { 942 what |= ICE1712_PLAYBACK_START; 943 snd_pcm_trigger_done(s, substream); 944 } else if (s == ice->capture_pro_substream) { 945 what |= ICE1712_CAPTURE_START_SHADOW; 946 snd_pcm_trigger_done(s, substream); 947 } 948 } 949 spin_lock(&ice->reg_lock); 950 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 951 if (cmd == SNDRV_PCM_TRIGGER_START) 952 old |= what; 953 else 954 old &= ~what; 955 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 956 spin_unlock(&ice->reg_lock); 957 break; 958 } 959 default: 960 return -EINVAL; 961 } 962 return 0; 963 } 964 965 /* 966 */ 967 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 968 { 969 unsigned long flags; 970 unsigned char val, old; 971 unsigned int i; 972 973 switch (rate) { 974 case 8000: val = 6; break; 975 case 9600: val = 3; break; 976 case 11025: val = 10; break; 977 case 12000: val = 2; break; 978 case 16000: val = 5; break; 979 case 22050: val = 9; break; 980 case 24000: val = 1; break; 981 case 32000: val = 4; break; 982 case 44100: val = 8; break; 983 case 48000: val = 0; break; 984 case 64000: val = 15; break; 985 case 88200: val = 11; break; 986 case 96000: val = 7; break; 987 default: 988 snd_BUG(); 989 val = 0; 990 rate = 48000; 991 break; 992 } 993 994 spin_lock_irqsave(&ice->reg_lock, flags); 995 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 996 ICE1712_PLAYBACK_PAUSE| 997 ICE1712_PLAYBACK_START)) { 998 __out: 999 spin_unlock_irqrestore(&ice->reg_lock, flags); 1000 return; 1001 } 1002 if (!force && is_pro_rate_locked(ice)) 1003 goto __out; 1004 1005 old = inb(ICEMT(ice, RATE)); 1006 if (!force && old == val) 1007 goto __out; 1008 1009 ice->cur_rate = rate; 1010 outb(val, ICEMT(ice, RATE)); 1011 spin_unlock_irqrestore(&ice->reg_lock, flags); 1012 1013 if (ice->gpio.set_pro_rate) 1014 ice->gpio.set_pro_rate(ice, rate); 1015 for (i = 0; i < ice->akm_codecs; i++) { 1016 if (ice->akm[i].ops.set_rate_val) 1017 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1018 } 1019 if (ice->spdif.ops.setup_rate) 1020 ice->spdif.ops.setup_rate(ice, rate); 1021 } 1022 1023 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1024 { 1025 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1026 1027 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1028 spin_lock_irq(&ice->reg_lock); 1029 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1030 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1031 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1032 spin_unlock_irq(&ice->reg_lock); 1033 1034 return 0; 1035 } 1036 1037 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1038 struct snd_pcm_hw_params *hw_params) 1039 { 1040 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1041 1042 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1043 return 0; 1044 } 1045 1046 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1047 { 1048 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1049 1050 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1051 spin_lock_irq(&ice->reg_lock); 1052 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1053 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1054 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1055 spin_unlock_irq(&ice->reg_lock); 1056 return 0; 1057 } 1058 1059 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1060 struct snd_pcm_hw_params *hw_params) 1061 { 1062 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1063 1064 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1065 return 0; 1066 } 1067 1068 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1069 { 1070 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1071 size_t ptr; 1072 1073 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1074 return 0; 1075 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1076 ptr = bytes_to_frames(substream->runtime, ptr); 1077 if (ptr == substream->runtime->buffer_size) 1078 ptr = 0; 1079 return ptr; 1080 } 1081 1082 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1083 { 1084 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1085 size_t ptr; 1086 1087 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1088 return 0; 1089 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1090 ptr = bytes_to_frames(substream->runtime, ptr); 1091 if (ptr == substream->runtime->buffer_size) 1092 ptr = 0; 1093 return ptr; 1094 } 1095 1096 static const struct snd_pcm_hardware snd_ice1712_playback_pro = { 1097 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1098 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1099 SNDRV_PCM_INFO_MMAP_VALID | 1100 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1101 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1102 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1103 .rate_min = 4000, 1104 .rate_max = 96000, 1105 .channels_min = 10, 1106 .channels_max = 10, 1107 .buffer_bytes_max = (256*1024), 1108 .period_bytes_min = 10 * 4 * 2, 1109 .period_bytes_max = 131040, 1110 .periods_min = 1, 1111 .periods_max = 1024, 1112 .fifo_size = 0, 1113 }; 1114 1115 static const struct snd_pcm_hardware snd_ice1712_capture_pro = { 1116 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1117 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1118 SNDRV_PCM_INFO_MMAP_VALID | 1119 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1120 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1121 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1122 .rate_min = 4000, 1123 .rate_max = 96000, 1124 .channels_min = 12, 1125 .channels_max = 12, 1126 .buffer_bytes_max = (256*1024), 1127 .period_bytes_min = 12 * 4 * 2, 1128 .period_bytes_max = 131040, 1129 .periods_min = 1, 1130 .periods_max = 1024, 1131 .fifo_size = 0, 1132 }; 1133 1134 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1135 { 1136 struct snd_pcm_runtime *runtime = substream->runtime; 1137 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1138 1139 ice->playback_pro_substream = substream; 1140 runtime->hw = snd_ice1712_playback_pro; 1141 snd_pcm_set_sync(substream); 1142 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1143 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1144 if (is_pro_rate_locked(ice)) { 1145 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1146 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1147 } 1148 1149 if (ice->spdif.ops.open) 1150 ice->spdif.ops.open(ice, substream); 1151 1152 return 0; 1153 } 1154 1155 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1156 { 1157 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1158 struct snd_pcm_runtime *runtime = substream->runtime; 1159 1160 ice->capture_pro_substream = substream; 1161 runtime->hw = snd_ice1712_capture_pro; 1162 snd_pcm_set_sync(substream); 1163 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1164 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1165 if (is_pro_rate_locked(ice)) { 1166 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1167 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1168 } 1169 1170 return 0; 1171 } 1172 1173 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1174 { 1175 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1176 1177 if (PRO_RATE_RESET) 1178 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1179 ice->playback_pro_substream = NULL; 1180 if (ice->spdif.ops.close) 1181 ice->spdif.ops.close(ice, substream); 1182 1183 return 0; 1184 } 1185 1186 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1187 { 1188 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1189 1190 if (PRO_RATE_RESET) 1191 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1192 ice->capture_pro_substream = NULL; 1193 return 0; 1194 } 1195 1196 static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1197 .open = snd_ice1712_playback_pro_open, 1198 .close = snd_ice1712_playback_pro_close, 1199 .ioctl = snd_pcm_lib_ioctl, 1200 .hw_params = snd_ice1712_playback_pro_hw_params, 1201 .prepare = snd_ice1712_playback_pro_prepare, 1202 .trigger = snd_ice1712_pro_trigger, 1203 .pointer = snd_ice1712_playback_pro_pointer, 1204 }; 1205 1206 static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1207 .open = snd_ice1712_capture_pro_open, 1208 .close = snd_ice1712_capture_pro_close, 1209 .ioctl = snd_pcm_lib_ioctl, 1210 .hw_params = snd_ice1712_capture_pro_hw_params, 1211 .prepare = snd_ice1712_capture_pro_prepare, 1212 .trigger = snd_ice1712_pro_trigger, 1213 .pointer = snd_ice1712_capture_pro_pointer, 1214 }; 1215 1216 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device) 1217 { 1218 struct snd_pcm *pcm; 1219 int err; 1220 1221 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1222 if (err < 0) 1223 return err; 1224 1225 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1226 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1227 1228 pcm->private_data = ice; 1229 pcm->info_flags = 0; 1230 strcpy(pcm->name, "ICE1712 multi"); 1231 1232 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1233 &ice->pci->dev, 256*1024, 256*1024); 1234 1235 ice->pcm_pro = pcm; 1236 1237 if (ice->cs8427) { 1238 /* assign channels to iec958 */ 1239 err = snd_cs8427_iec958_build(ice->cs8427, 1240 pcm->streams[0].substream, 1241 pcm->streams[1].substream); 1242 if (err < 0) 1243 return err; 1244 } 1245 1246 return snd_ice1712_build_pro_mixer(ice); 1247 } 1248 1249 /* 1250 * Mixer section 1251 */ 1252 1253 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1254 { 1255 unsigned int vol = ice->pro_volumes[index]; 1256 unsigned short val = 0; 1257 1258 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1259 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1260 outb(index, ICEMT(ice, MONITOR_INDEX)); 1261 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1262 } 1263 1264 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info 1265 1266 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1267 { 1268 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1269 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1270 kcontrol->private_value; 1271 1272 spin_lock_irq(&ice->reg_lock); 1273 ucontrol->value.integer.value[0] = 1274 !((ice->pro_volumes[priv_idx] >> 15) & 1); 1275 ucontrol->value.integer.value[1] = 1276 !((ice->pro_volumes[priv_idx] >> 31) & 1); 1277 spin_unlock_irq(&ice->reg_lock); 1278 return 0; 1279 } 1280 1281 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1282 { 1283 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1284 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1285 kcontrol->private_value; 1286 unsigned int nval, change; 1287 1288 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1289 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1290 spin_lock_irq(&ice->reg_lock); 1291 nval |= ice->pro_volumes[priv_idx] & ~0x80008000; 1292 change = nval != ice->pro_volumes[priv_idx]; 1293 ice->pro_volumes[priv_idx] = nval; 1294 snd_ice1712_update_volume(ice, priv_idx); 1295 spin_unlock_irq(&ice->reg_lock); 1296 return change; 1297 } 1298 1299 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1300 { 1301 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1302 uinfo->count = 2; 1303 uinfo->value.integer.min = 0; 1304 uinfo->value.integer.max = 96; 1305 return 0; 1306 } 1307 1308 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1309 { 1310 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1311 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1312 kcontrol->private_value; 1313 1314 spin_lock_irq(&ice->reg_lock); 1315 ucontrol->value.integer.value[0] = 1316 (ice->pro_volumes[priv_idx] >> 0) & 127; 1317 ucontrol->value.integer.value[1] = 1318 (ice->pro_volumes[priv_idx] >> 16) & 127; 1319 spin_unlock_irq(&ice->reg_lock); 1320 return 0; 1321 } 1322 1323 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1324 { 1325 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1326 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1327 kcontrol->private_value; 1328 unsigned int nval, change; 1329 1330 nval = (ucontrol->value.integer.value[0] & 127) | 1331 ((ucontrol->value.integer.value[1] & 127) << 16); 1332 spin_lock_irq(&ice->reg_lock); 1333 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f; 1334 change = nval != ice->pro_volumes[priv_idx]; 1335 ice->pro_volumes[priv_idx] = nval; 1336 snd_ice1712_update_volume(ice, priv_idx); 1337 spin_unlock_irq(&ice->reg_lock); 1338 return change; 1339 } 1340 1341 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1342 1343 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = { 1344 { 1345 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1346 .name = "Multi Playback Switch", 1347 .info = snd_ice1712_pro_mixer_switch_info, 1348 .get = snd_ice1712_pro_mixer_switch_get, 1349 .put = snd_ice1712_pro_mixer_switch_put, 1350 .private_value = 0, 1351 .count = 10, 1352 }, 1353 { 1354 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1355 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1356 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1357 .name = "Multi Playback Volume", 1358 .info = snd_ice1712_pro_mixer_volume_info, 1359 .get = snd_ice1712_pro_mixer_volume_get, 1360 .put = snd_ice1712_pro_mixer_volume_put, 1361 .private_value = 0, 1362 .count = 10, 1363 .tlv = { .p = db_scale_playback } 1364 }, 1365 }; 1366 1367 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = { 1368 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1369 .name = "H/W Multi Capture Switch", 1370 .info = snd_ice1712_pro_mixer_switch_info, 1371 .get = snd_ice1712_pro_mixer_switch_get, 1372 .put = snd_ice1712_pro_mixer_switch_put, 1373 .private_value = 10, 1374 }; 1375 1376 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = { 1377 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1378 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH), 1379 .info = snd_ice1712_pro_mixer_switch_info, 1380 .get = snd_ice1712_pro_mixer_switch_get, 1381 .put = snd_ice1712_pro_mixer_switch_put, 1382 .private_value = 18, 1383 .count = 2, 1384 }; 1385 1386 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = { 1387 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1388 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1389 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1390 .name = "H/W Multi Capture Volume", 1391 .info = snd_ice1712_pro_mixer_volume_info, 1392 .get = snd_ice1712_pro_mixer_volume_get, 1393 .put = snd_ice1712_pro_mixer_volume_put, 1394 .private_value = 10, 1395 .tlv = { .p = db_scale_playback } 1396 }; 1397 1398 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = { 1399 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1400 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME), 1401 .info = snd_ice1712_pro_mixer_volume_info, 1402 .get = snd_ice1712_pro_mixer_volume_get, 1403 .put = snd_ice1712_pro_mixer_volume_put, 1404 .private_value = 18, 1405 .count = 2, 1406 }; 1407 1408 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1409 { 1410 struct snd_card *card = ice->card; 1411 unsigned int idx; 1412 int err; 1413 1414 /* multi-channel mixer */ 1415 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1416 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1417 if (err < 0) 1418 return err; 1419 } 1420 1421 if (ice->num_total_adcs > 0) { 1422 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1423 tmp.count = ice->num_total_adcs; 1424 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1425 if (err < 0) 1426 return err; 1427 } 1428 1429 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1430 if (err < 0) 1431 return err; 1432 1433 if (ice->num_total_adcs > 0) { 1434 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1435 tmp.count = ice->num_total_adcs; 1436 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1437 if (err < 0) 1438 return err; 1439 } 1440 1441 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1442 if (err < 0) 1443 return err; 1444 1445 /* initialize volumes */ 1446 for (idx = 0; idx < 10; idx++) { 1447 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1448 snd_ice1712_update_volume(ice, idx); 1449 } 1450 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1451 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1452 snd_ice1712_update_volume(ice, idx); 1453 } 1454 for (idx = 18; idx < 20; idx++) { 1455 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1456 snd_ice1712_update_volume(ice, idx); 1457 } 1458 return 0; 1459 } 1460 1461 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1462 { 1463 struct snd_ice1712 *ice = ac97->private_data; 1464 ice->ac97 = NULL; 1465 } 1466 1467 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice) 1468 { 1469 int err, bus_num = 0; 1470 struct snd_ac97_template ac97; 1471 struct snd_ac97_bus *pbus; 1472 static struct snd_ac97_bus_ops con_ops = { 1473 .write = snd_ice1712_ac97_write, 1474 .read = snd_ice1712_ac97_read, 1475 }; 1476 static struct snd_ac97_bus_ops pro_ops = { 1477 .write = snd_ice1712_pro_ac97_write, 1478 .read = snd_ice1712_pro_ac97_read, 1479 }; 1480 1481 if (ice_has_con_ac97(ice)) { 1482 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus); 1483 if (err < 0) 1484 return err; 1485 memset(&ac97, 0, sizeof(ac97)); 1486 ac97.private_data = ice; 1487 ac97.private_free = snd_ice1712_mixer_free_ac97; 1488 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1489 if (err < 0) 1490 dev_warn(ice->card->dev, 1491 "cannot initialize ac97 for consumer, skipped\n"); 1492 else { 1493 return snd_ctl_add(ice->card, 1494 snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, 1495 ice)); 1496 } 1497 } 1498 1499 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1500 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus); 1501 if (err < 0) 1502 return err; 1503 memset(&ac97, 0, sizeof(ac97)); 1504 ac97.private_data = ice; 1505 ac97.private_free = snd_ice1712_mixer_free_ac97; 1506 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1507 if (err < 0) 1508 dev_warn(ice->card->dev, 1509 "cannot initialize pro ac97, skipped\n"); 1510 else 1511 return 0; 1512 } 1513 /* I2S mixer only */ 1514 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1515 return 0; 1516 } 1517 1518 /* 1519 * 1520 */ 1521 1522 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1523 { 1524 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1525 } 1526 1527 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1528 struct snd_info_buffer *buffer) 1529 { 1530 struct snd_ice1712 *ice = entry->private_data; 1531 unsigned int idx; 1532 1533 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1534 snd_iprintf(buffer, "EEPROM:\n"); 1535 1536 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1537 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1538 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1539 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1540 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1541 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1542 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1543 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1544 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1545 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1546 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1547 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1548 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1549 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1550 for (idx = 0; idx < 4; idx++) 1551 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1552 for (idx = 0; idx < 4; idx++) 1553 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1554 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1555 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1556 1557 snd_iprintf(buffer, "\nRegisters:\n"); 1558 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1559 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1560 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1561 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1562 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1563 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1564 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1565 } 1566 1567 static void snd_ice1712_proc_init(struct snd_ice1712 *ice) 1568 { 1569 snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read); 1570 } 1571 1572 /* 1573 * 1574 */ 1575 1576 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1577 struct snd_ctl_elem_info *uinfo) 1578 { 1579 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1580 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1581 return 0; 1582 } 1583 1584 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1585 struct snd_ctl_elem_value *ucontrol) 1586 { 1587 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1588 1589 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1590 return 0; 1591 } 1592 1593 static const struct snd_kcontrol_new snd_ice1712_eeprom = { 1594 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1595 .name = "ICE1712 EEPROM", 1596 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1597 .info = snd_ice1712_eeprom_info, 1598 .get = snd_ice1712_eeprom_get 1599 }; 1600 1601 /* 1602 */ 1603 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1604 struct snd_ctl_elem_info *uinfo) 1605 { 1606 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1607 uinfo->count = 1; 1608 return 0; 1609 } 1610 1611 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1612 struct snd_ctl_elem_value *ucontrol) 1613 { 1614 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1615 if (ice->spdif.ops.default_get) 1616 ice->spdif.ops.default_get(ice, ucontrol); 1617 return 0; 1618 } 1619 1620 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1621 struct snd_ctl_elem_value *ucontrol) 1622 { 1623 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1624 if (ice->spdif.ops.default_put) 1625 return ice->spdif.ops.default_put(ice, ucontrol); 1626 return 0; 1627 } 1628 1629 static const struct snd_kcontrol_new snd_ice1712_spdif_default = 1630 { 1631 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1632 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1633 .info = snd_ice1712_spdif_info, 1634 .get = snd_ice1712_spdif_default_get, 1635 .put = snd_ice1712_spdif_default_put 1636 }; 1637 1638 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1639 struct snd_ctl_elem_value *ucontrol) 1640 { 1641 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1642 if (ice->spdif.ops.default_get) { 1643 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1644 IEC958_AES0_PROFESSIONAL | 1645 IEC958_AES0_CON_NOT_COPYRIGHT | 1646 IEC958_AES0_CON_EMPHASIS; 1647 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1648 IEC958_AES1_CON_CATEGORY; 1649 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1650 } else { 1651 ucontrol->value.iec958.status[0] = 0xff; 1652 ucontrol->value.iec958.status[1] = 0xff; 1653 ucontrol->value.iec958.status[2] = 0xff; 1654 ucontrol->value.iec958.status[3] = 0xff; 1655 ucontrol->value.iec958.status[4] = 0xff; 1656 } 1657 return 0; 1658 } 1659 1660 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1661 struct snd_ctl_elem_value *ucontrol) 1662 { 1663 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1664 if (ice->spdif.ops.default_get) { 1665 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1666 IEC958_AES0_PROFESSIONAL | 1667 IEC958_AES0_PRO_FS | 1668 IEC958_AES0_PRO_EMPHASIS; 1669 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1670 } else { 1671 ucontrol->value.iec958.status[0] = 0xff; 1672 ucontrol->value.iec958.status[1] = 0xff; 1673 ucontrol->value.iec958.status[2] = 0xff; 1674 ucontrol->value.iec958.status[3] = 0xff; 1675 ucontrol->value.iec958.status[4] = 0xff; 1676 } 1677 return 0; 1678 } 1679 1680 static const struct snd_kcontrol_new snd_ice1712_spdif_maskc = 1681 { 1682 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1683 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1684 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1685 .info = snd_ice1712_spdif_info, 1686 .get = snd_ice1712_spdif_maskc_get, 1687 }; 1688 1689 static const struct snd_kcontrol_new snd_ice1712_spdif_maskp = 1690 { 1691 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1692 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1693 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1694 .info = snd_ice1712_spdif_info, 1695 .get = snd_ice1712_spdif_maskp_get, 1696 }; 1697 1698 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1699 struct snd_ctl_elem_value *ucontrol) 1700 { 1701 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1702 if (ice->spdif.ops.stream_get) 1703 ice->spdif.ops.stream_get(ice, ucontrol); 1704 return 0; 1705 } 1706 1707 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1708 struct snd_ctl_elem_value *ucontrol) 1709 { 1710 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1711 if (ice->spdif.ops.stream_put) 1712 return ice->spdif.ops.stream_put(ice, ucontrol); 1713 return 0; 1714 } 1715 1716 static const struct snd_kcontrol_new snd_ice1712_spdif_stream = 1717 { 1718 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1719 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1720 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1721 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), 1722 .info = snd_ice1712_spdif_info, 1723 .get = snd_ice1712_spdif_stream_get, 1724 .put = snd_ice1712_spdif_stream_put 1725 }; 1726 1727 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1728 struct snd_ctl_elem_value *ucontrol) 1729 { 1730 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1731 unsigned char mask = kcontrol->private_value & 0xff; 1732 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1733 1734 snd_ice1712_save_gpio_status(ice); 1735 ucontrol->value.integer.value[0] = 1736 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1737 snd_ice1712_restore_gpio_status(ice); 1738 return 0; 1739 } 1740 1741 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1742 struct snd_ctl_elem_value *ucontrol) 1743 { 1744 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1745 unsigned char mask = kcontrol->private_value & 0xff; 1746 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1747 unsigned int val, nval; 1748 1749 if (kcontrol->private_value & (1 << 31)) 1750 return -EPERM; 1751 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1752 snd_ice1712_save_gpio_status(ice); 1753 val = snd_ice1712_gpio_read(ice); 1754 nval |= val & ~mask; 1755 if (val != nval) 1756 snd_ice1712_gpio_write(ice, nval); 1757 snd_ice1712_restore_gpio_status(ice); 1758 return val != nval; 1759 } 1760 1761 /* 1762 * rate 1763 */ 1764 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1765 struct snd_ctl_elem_info *uinfo) 1766 { 1767 static const char * const texts[] = { 1768 "8000", /* 0: 6 */ 1769 "9600", /* 1: 3 */ 1770 "11025", /* 2: 10 */ 1771 "12000", /* 3: 2 */ 1772 "16000", /* 4: 5 */ 1773 "22050", /* 5: 9 */ 1774 "24000", /* 6: 1 */ 1775 "32000", /* 7: 4 */ 1776 "44100", /* 8: 8 */ 1777 "48000", /* 9: 0 */ 1778 "64000", /* 10: 15 */ 1779 "88200", /* 11: 11 */ 1780 "96000", /* 12: 7 */ 1781 "IEC958 Input", /* 13: -- */ 1782 }; 1783 return snd_ctl_enum_info(uinfo, 1, 14, texts); 1784 } 1785 1786 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1787 struct snd_ctl_elem_value *ucontrol) 1788 { 1789 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1790 static const unsigned char xlate[16] = { 1791 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1792 }; 1793 unsigned char val; 1794 1795 spin_lock_irq(&ice->reg_lock); 1796 if (is_spdif_master(ice)) { 1797 ucontrol->value.enumerated.item[0] = 13; 1798 } else { 1799 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1800 if (val == 255) { 1801 snd_BUG(); 1802 val = 0; 1803 } 1804 ucontrol->value.enumerated.item[0] = val; 1805 } 1806 spin_unlock_irq(&ice->reg_lock); 1807 return 0; 1808 } 1809 1810 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1811 struct snd_ctl_elem_value *ucontrol) 1812 { 1813 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1814 static const unsigned int xrate[13] = { 1815 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1816 32000, 44100, 48000, 64000, 88200, 96000 1817 }; 1818 unsigned char oval; 1819 int change = 0; 1820 1821 spin_lock_irq(&ice->reg_lock); 1822 oval = inb(ICEMT(ice, RATE)); 1823 if (ucontrol->value.enumerated.item[0] == 13) { 1824 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1825 } else { 1826 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1827 spin_unlock_irq(&ice->reg_lock); 1828 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1829 spin_lock_irq(&ice->reg_lock); 1830 } 1831 change = inb(ICEMT(ice, RATE)) != oval; 1832 spin_unlock_irq(&ice->reg_lock); 1833 1834 if ((oval & ICE1712_SPDIF_MASTER) != 1835 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1836 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1837 1838 return change; 1839 } 1840 1841 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = { 1842 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1843 .name = "Multi Track Internal Clock", 1844 .info = snd_ice1712_pro_internal_clock_info, 1845 .get = snd_ice1712_pro_internal_clock_get, 1846 .put = snd_ice1712_pro_internal_clock_put 1847 }; 1848 1849 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1850 struct snd_ctl_elem_info *uinfo) 1851 { 1852 static const char * const texts[] = { 1853 "8000", /* 0: 6 */ 1854 "9600", /* 1: 3 */ 1855 "11025", /* 2: 10 */ 1856 "12000", /* 3: 2 */ 1857 "16000", /* 4: 5 */ 1858 "22050", /* 5: 9 */ 1859 "24000", /* 6: 1 */ 1860 "32000", /* 7: 4 */ 1861 "44100", /* 8: 8 */ 1862 "48000", /* 9: 0 */ 1863 "64000", /* 10: 15 */ 1864 "88200", /* 11: 11 */ 1865 "96000", /* 12: 7 */ 1866 /* "IEC958 Input", 13: -- */ 1867 }; 1868 return snd_ctl_enum_info(uinfo, 1, 13, texts); 1869 } 1870 1871 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1872 struct snd_ctl_elem_value *ucontrol) 1873 { 1874 int val; 1875 static const unsigned int xrate[13] = { 1876 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1877 32000, 44100, 48000, 64000, 88200, 96000 1878 }; 1879 1880 for (val = 0; val < 13; val++) { 1881 if (xrate[val] == PRO_RATE_DEFAULT) 1882 break; 1883 } 1884 1885 ucontrol->value.enumerated.item[0] = val; 1886 return 0; 1887 } 1888 1889 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1890 struct snd_ctl_elem_value *ucontrol) 1891 { 1892 static const unsigned int xrate[13] = { 1893 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1894 32000, 44100, 48000, 64000, 88200, 96000 1895 }; 1896 unsigned char oval; 1897 int change = 0; 1898 1899 oval = PRO_RATE_DEFAULT; 1900 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1901 change = PRO_RATE_DEFAULT != oval; 1902 1903 return change; 1904 } 1905 1906 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = { 1907 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1908 .name = "Multi Track Internal Clock Default", 1909 .info = snd_ice1712_pro_internal_clock_default_info, 1910 .get = snd_ice1712_pro_internal_clock_default_get, 1911 .put = snd_ice1712_pro_internal_clock_default_put 1912 }; 1913 1914 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info 1915 1916 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1917 struct snd_ctl_elem_value *ucontrol) 1918 { 1919 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1920 return 0; 1921 } 1922 1923 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1924 struct snd_ctl_elem_value *ucontrol) 1925 { 1926 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1927 int change = 0, nval; 1928 1929 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1930 spin_lock_irq(&ice->reg_lock); 1931 change = PRO_RATE_LOCKED != nval; 1932 PRO_RATE_LOCKED = nval; 1933 spin_unlock_irq(&ice->reg_lock); 1934 return change; 1935 } 1936 1937 static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = { 1938 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1939 .name = "Multi Track Rate Locking", 1940 .info = snd_ice1712_pro_rate_locking_info, 1941 .get = snd_ice1712_pro_rate_locking_get, 1942 .put = snd_ice1712_pro_rate_locking_put 1943 }; 1944 1945 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info 1946 1947 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1948 struct snd_ctl_elem_value *ucontrol) 1949 { 1950 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 1951 return 0; 1952 } 1953 1954 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1955 struct snd_ctl_elem_value *ucontrol) 1956 { 1957 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1958 int change = 0, nval; 1959 1960 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1961 spin_lock_irq(&ice->reg_lock); 1962 change = PRO_RATE_RESET != nval; 1963 PRO_RATE_RESET = nval; 1964 spin_unlock_irq(&ice->reg_lock); 1965 return change; 1966 } 1967 1968 static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = { 1969 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1970 .name = "Multi Track Rate Reset", 1971 .info = snd_ice1712_pro_rate_reset_info, 1972 .get = snd_ice1712_pro_rate_reset_get, 1973 .put = snd_ice1712_pro_rate_reset_put 1974 }; 1975 1976 /* 1977 * routing 1978 */ 1979 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 1980 struct snd_ctl_elem_info *uinfo) 1981 { 1982 static const char * const texts[] = { 1983 "PCM Out", /* 0 */ 1984 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 1985 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 1986 "IEC958 In L", "IEC958 In R", /* 9-10 */ 1987 "Digital Mixer", /* 11 - optional */ 1988 }; 1989 int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 1990 return snd_ctl_enum_info(uinfo, 1, num_items, texts); 1991 } 1992 1993 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 1994 struct snd_ctl_elem_value *ucontrol) 1995 { 1996 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1997 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 1998 unsigned int val, cval; 1999 2000 spin_lock_irq(&ice->reg_lock); 2001 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2002 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 2003 spin_unlock_irq(&ice->reg_lock); 2004 2005 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2006 val &= 3; 2007 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2008 if (val == 1 && idx < 2) 2009 ucontrol->value.enumerated.item[0] = 11; 2010 else if (val == 2) 2011 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2012 else if (val == 3) 2013 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2014 else 2015 ucontrol->value.enumerated.item[0] = 0; 2016 return 0; 2017 } 2018 2019 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2020 struct snd_ctl_elem_value *ucontrol) 2021 { 2022 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2023 int change, shift; 2024 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2025 unsigned int val, old_val, nval; 2026 2027 /* update PSDOUT */ 2028 if (ucontrol->value.enumerated.item[0] >= 11) 2029 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2030 else if (ucontrol->value.enumerated.item[0] >= 9) 2031 nval = 3; /* spdif in */ 2032 else if (ucontrol->value.enumerated.item[0] >= 1) 2033 nval = 2; /* analog in */ 2034 else 2035 nval = 0; /* pcm */ 2036 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2037 spin_lock_irq(&ice->reg_lock); 2038 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2039 val &= ~(0x03 << shift); 2040 val |= nval << shift; 2041 change = val != old_val; 2042 if (change) 2043 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2044 spin_unlock_irq(&ice->reg_lock); 2045 if (nval < 2) /* dig mixer of pcm */ 2046 return change; 2047 2048 /* update CAPTURE */ 2049 spin_lock_irq(&ice->reg_lock); 2050 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2051 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2052 if (nval == 2) { /* analog in */ 2053 nval = ucontrol->value.enumerated.item[0] - 1; 2054 val &= ~(0x07 << shift); 2055 val |= nval << shift; 2056 } else { /* spdif in */ 2057 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2058 val &= ~(0x08 << shift); 2059 val |= nval << shift; 2060 } 2061 if (val != old_val) { 2062 change = 1; 2063 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2064 } 2065 spin_unlock_irq(&ice->reg_lock); 2066 return change; 2067 } 2068 2069 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2070 struct snd_ctl_elem_value *ucontrol) 2071 { 2072 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2073 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2074 unsigned int val, cval; 2075 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2076 cval = (val >> (idx * 4 + 8)) & 0x0f; 2077 val = (val >> (idx * 2)) & 0x03; 2078 if (val == 1) 2079 ucontrol->value.enumerated.item[0] = 11; 2080 else if (val == 2) 2081 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2082 else if (val == 3) 2083 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2084 else 2085 ucontrol->value.enumerated.item[0] = 0; 2086 return 0; 2087 } 2088 2089 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2090 struct snd_ctl_elem_value *ucontrol) 2091 { 2092 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2093 int change, shift; 2094 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2095 unsigned int val, old_val, nval; 2096 2097 /* update SPDOUT */ 2098 spin_lock_irq(&ice->reg_lock); 2099 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2100 if (ucontrol->value.enumerated.item[0] >= 11) 2101 nval = 1; 2102 else if (ucontrol->value.enumerated.item[0] >= 9) 2103 nval = 3; 2104 else if (ucontrol->value.enumerated.item[0] >= 1) 2105 nval = 2; 2106 else 2107 nval = 0; 2108 shift = idx * 2; 2109 val &= ~(0x03 << shift); 2110 val |= nval << shift; 2111 shift = idx * 4 + 8; 2112 if (nval == 2) { 2113 nval = ucontrol->value.enumerated.item[0] - 1; 2114 val &= ~(0x07 << shift); 2115 val |= nval << shift; 2116 } else if (nval == 3) { 2117 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2118 val &= ~(0x08 << shift); 2119 val |= nval << shift; 2120 } 2121 change = val != old_val; 2122 if (change) 2123 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2124 spin_unlock_irq(&ice->reg_lock); 2125 return change; 2126 } 2127 2128 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = { 2129 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2130 .name = "H/W Playback Route", 2131 .info = snd_ice1712_pro_route_info, 2132 .get = snd_ice1712_pro_route_analog_get, 2133 .put = snd_ice1712_pro_route_analog_put, 2134 }; 2135 2136 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = { 2137 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2138 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2139 .info = snd_ice1712_pro_route_info, 2140 .get = snd_ice1712_pro_route_spdif_get, 2141 .put = snd_ice1712_pro_route_spdif_put, 2142 .count = 2, 2143 }; 2144 2145 2146 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2147 struct snd_ctl_elem_info *uinfo) 2148 { 2149 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2150 uinfo->count = 1; 2151 uinfo->value.integer.min = 0; 2152 uinfo->value.integer.max = 255; 2153 return 0; 2154 } 2155 2156 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2157 struct snd_ctl_elem_value *ucontrol) 2158 { 2159 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2160 2161 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2162 return 0; 2163 } 2164 2165 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2166 struct snd_ctl_elem_value *ucontrol) 2167 { 2168 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2169 int change; 2170 2171 spin_lock_irq(&ice->reg_lock); 2172 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2173 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2174 spin_unlock_irq(&ice->reg_lock); 2175 return change; 2176 } 2177 2178 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = { 2179 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2180 .name = "Multi Track Volume Rate", 2181 .info = snd_ice1712_pro_volume_rate_info, 2182 .get = snd_ice1712_pro_volume_rate_get, 2183 .put = snd_ice1712_pro_volume_rate_put 2184 }; 2185 2186 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2187 struct snd_ctl_elem_info *uinfo) 2188 { 2189 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2190 uinfo->count = 22; 2191 uinfo->value.integer.min = 0; 2192 uinfo->value.integer.max = 255; 2193 return 0; 2194 } 2195 2196 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2197 struct snd_ctl_elem_value *ucontrol) 2198 { 2199 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2200 int idx; 2201 2202 spin_lock_irq(&ice->reg_lock); 2203 for (idx = 0; idx < 22; idx++) { 2204 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2205 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2206 } 2207 spin_unlock_irq(&ice->reg_lock); 2208 return 0; 2209 } 2210 2211 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = { 2212 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2213 .name = "Multi Track Peak", 2214 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2215 .info = snd_ice1712_pro_peak_info, 2216 .get = snd_ice1712_pro_peak_get 2217 }; 2218 2219 /* 2220 * 2221 */ 2222 2223 /* 2224 * list of available boards 2225 */ 2226 static struct snd_ice1712_card_info *card_tables[] = { 2227 snd_ice1712_hoontech_cards, 2228 snd_ice1712_delta_cards, 2229 snd_ice1712_ews_cards, 2230 NULL, 2231 }; 2232 2233 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2234 unsigned char dev, 2235 unsigned char addr) 2236 { 2237 long t = 0x10000; 2238 2239 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2240 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2241 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2242 return inb(ICEREG(ice, I2C_DATA)); 2243 } 2244 2245 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2246 const char *modelname) 2247 { 2248 int dev = ICE_I2C_EEPROM_ADDR; /* I2C EEPROM device address */ 2249 unsigned int i, size; 2250 struct snd_ice1712_card_info * const *tbl, *c; 2251 2252 if (!modelname || !*modelname) { 2253 ice->eeprom.subvendor = 0; 2254 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2255 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2256 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2257 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2258 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2259 if (ice->eeprom.subvendor == 0 || 2260 ice->eeprom.subvendor == (unsigned int)-1) { 2261 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2262 u16 vendor, device; 2263 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2264 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2265 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2266 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2267 dev_err(ice->card->dev, 2268 "No valid ID is found\n"); 2269 return -ENXIO; 2270 } 2271 } 2272 } 2273 for (tbl = card_tables; *tbl; tbl++) { 2274 for (c = *tbl; c->subvendor; c++) { 2275 if (modelname && c->model && !strcmp(modelname, c->model)) { 2276 dev_info(ice->card->dev, 2277 "Using board model %s\n", c->name); 2278 ice->eeprom.subvendor = c->subvendor; 2279 } else if (c->subvendor != ice->eeprom.subvendor) 2280 continue; 2281 if (!c->eeprom_size || !c->eeprom_data) 2282 goto found; 2283 /* if the EEPROM is given by the driver, use it */ 2284 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2285 ice->eeprom.version = 1; 2286 ice->eeprom.size = c->eeprom_size + 6; 2287 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2288 goto read_skipped; 2289 } 2290 } 2291 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2292 ice->eeprom.subvendor); 2293 2294 found: 2295 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2296 if (ice->eeprom.size < 6) 2297 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2298 else if (ice->eeprom.size > 32) { 2299 dev_err(ice->card->dev, 2300 "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2301 return -EIO; 2302 } 2303 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2304 if (ice->eeprom.version != 1) { 2305 dev_err(ice->card->dev, "invalid EEPROM version %i\n", 2306 ice->eeprom.version); 2307 /* return -EIO; */ 2308 } 2309 size = ice->eeprom.size - 6; 2310 for (i = 0; i < size; i++) 2311 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2312 2313 read_skipped: 2314 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2315 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2316 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2317 2318 return 0; 2319 } 2320 2321 2322 2323 static int snd_ice1712_chip_init(struct snd_ice1712 *ice) 2324 { 2325 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2326 udelay(200); 2327 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2328 udelay(200); 2329 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2330 !ice->dxr_enable) 2331 /* Set eeprom value to limit active ADCs and DACs to 6; 2332 * Also disable AC97 as no hardware in standard 6fire card/box 2333 * Note: DXR extensions are not currently supported 2334 */ 2335 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2336 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2337 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2338 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2339 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2340 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2341 ice->gpio.write_mask = ice->eeprom.gpiomask; 2342 ice->gpio.direction = ice->eeprom.gpiodir; 2343 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2344 ice->eeprom.gpiomask); 2345 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2346 ice->eeprom.gpiodir); 2347 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2348 ice->eeprom.gpiostate); 2349 } else { 2350 ice->gpio.write_mask = 0xc0; 2351 ice->gpio.direction = 0xff; 2352 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2353 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2354 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2355 ICE1712_STDSP24_CLOCK_BIT); 2356 } 2357 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2358 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2359 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2360 udelay(100); 2361 outb(0, ICEREG(ice, AC97_CMD)); 2362 udelay(200); 2363 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2364 } 2365 snd_ice1712_set_pro_rate(ice, 48000, 1); 2366 /* unmask used interrupts */ 2367 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2368 ICE1712_IRQ_MPU2 : 0) | 2369 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2370 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2371 ICEREG(ice, IRQMASK)); 2372 outb(0x00, ICEMT(ice, IRQ)); 2373 2374 return 0; 2375 } 2376 2377 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2378 { 2379 int err; 2380 struct snd_kcontrol *kctl; 2381 2382 if (snd_BUG_ON(!ice->pcm_pro)) 2383 return -EIO; 2384 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2385 if (err < 0) 2386 return err; 2387 kctl->id.device = ice->pcm_pro->device; 2388 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2389 if (err < 0) 2390 return err; 2391 kctl->id.device = ice->pcm_pro->device; 2392 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2393 if (err < 0) 2394 return err; 2395 kctl->id.device = ice->pcm_pro->device; 2396 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2397 if (err < 0) 2398 return err; 2399 kctl->id.device = ice->pcm_pro->device; 2400 ice->spdif.stream_ctl = kctl; 2401 return 0; 2402 } 2403 2404 2405 static int snd_ice1712_build_controls(struct snd_ice1712 *ice) 2406 { 2407 int err; 2408 2409 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2410 if (err < 0) 2411 return err; 2412 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2413 if (err < 0) 2414 return err; 2415 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2416 if (err < 0) 2417 return err; 2418 2419 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2420 if (err < 0) 2421 return err; 2422 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2423 if (err < 0) 2424 return err; 2425 2426 if (ice->num_total_dacs > 0) { 2427 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2428 tmp.count = ice->num_total_dacs; 2429 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2430 if (err < 0) 2431 return err; 2432 } 2433 2434 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2435 if (err < 0) 2436 return err; 2437 2438 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2439 if (err < 0) 2440 return err; 2441 return snd_ctl_add(ice->card, 2442 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2443 } 2444 2445 static int snd_ice1712_free(struct snd_ice1712 *ice) 2446 { 2447 if (!ice->port) 2448 goto __hw_end; 2449 /* mask all interrupts */ 2450 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ)); 2451 outb(0xff, ICEREG(ice, IRQMASK)); 2452 /* --- */ 2453 __hw_end: 2454 if (ice->irq >= 0) 2455 free_irq(ice->irq, ice); 2456 2457 if (ice->port) 2458 pci_release_regions(ice->pci); 2459 snd_ice1712_akm4xxx_free(ice); 2460 pci_disable_device(ice->pci); 2461 kfree(ice->spec); 2462 kfree(ice); 2463 return 0; 2464 } 2465 2466 static int snd_ice1712_dev_free(struct snd_device *device) 2467 { 2468 struct snd_ice1712 *ice = device->device_data; 2469 return snd_ice1712_free(ice); 2470 } 2471 2472 static int snd_ice1712_create(struct snd_card *card, 2473 struct pci_dev *pci, 2474 const char *modelname, 2475 int omni, 2476 int cs8427_timeout, 2477 int dxr_enable, 2478 struct snd_ice1712 **r_ice1712) 2479 { 2480 struct snd_ice1712 *ice; 2481 int err; 2482 static struct snd_device_ops ops = { 2483 .dev_free = snd_ice1712_dev_free, 2484 }; 2485 2486 *r_ice1712 = NULL; 2487 2488 /* enable PCI device */ 2489 err = pci_enable_device(pci); 2490 if (err < 0) 2491 return err; 2492 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2493 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(28)) < 0 || 2494 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(28)) < 0) { 2495 dev_err(card->dev, 2496 "architecture does not support 28bit PCI busmaster DMA\n"); 2497 pci_disable_device(pci); 2498 return -ENXIO; 2499 } 2500 2501 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2502 if (ice == NULL) { 2503 pci_disable_device(pci); 2504 return -ENOMEM; 2505 } 2506 ice->omni = omni ? 1 : 0; 2507 if (cs8427_timeout < 1) 2508 cs8427_timeout = 1; 2509 else if (cs8427_timeout > 1000) 2510 cs8427_timeout = 1000; 2511 ice->cs8427_timeout = cs8427_timeout; 2512 ice->dxr_enable = dxr_enable; 2513 spin_lock_init(&ice->reg_lock); 2514 mutex_init(&ice->gpio_mutex); 2515 mutex_init(&ice->i2c_mutex); 2516 mutex_init(&ice->open_mutex); 2517 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2518 ice->gpio.get_mask = snd_ice1712_get_gpio_mask; 2519 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2520 ice->gpio.get_dir = snd_ice1712_get_gpio_dir; 2521 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2522 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2523 2524 ice->spdif.cs8403_bits = 2525 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2526 0x10 | /* no emphasis */ 2527 0x20); /* PCM encoder/decoder */ 2528 ice->card = card; 2529 ice->pci = pci; 2530 ice->irq = -1; 2531 pci_set_master(pci); 2532 /* disable legacy emulation */ 2533 pci_write_config_word(ice->pci, 0x40, 0x807f); 2534 pci_write_config_word(ice->pci, 0x42, 0x0006); 2535 snd_ice1712_proc_init(ice); 2536 synchronize_irq(pci->irq); 2537 2538 card->private_data = ice; 2539 2540 err = pci_request_regions(pci, "ICE1712"); 2541 if (err < 0) { 2542 kfree(ice); 2543 pci_disable_device(pci); 2544 return err; 2545 } 2546 ice->port = pci_resource_start(pci, 0); 2547 ice->ddma_port = pci_resource_start(pci, 1); 2548 ice->dmapath_port = pci_resource_start(pci, 2); 2549 ice->profi_port = pci_resource_start(pci, 3); 2550 2551 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2552 KBUILD_MODNAME, ice)) { 2553 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2554 snd_ice1712_free(ice); 2555 return -EIO; 2556 } 2557 2558 ice->irq = pci->irq; 2559 2560 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2561 snd_ice1712_free(ice); 2562 return -EIO; 2563 } 2564 if (snd_ice1712_chip_init(ice) < 0) { 2565 snd_ice1712_free(ice); 2566 return -EIO; 2567 } 2568 2569 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2570 if (err < 0) { 2571 snd_ice1712_free(ice); 2572 return err; 2573 } 2574 2575 *r_ice1712 = ice; 2576 return 0; 2577 } 2578 2579 2580 /* 2581 * 2582 * Registration 2583 * 2584 */ 2585 2586 static struct snd_ice1712_card_info no_matched; 2587 2588 static int snd_ice1712_probe(struct pci_dev *pci, 2589 const struct pci_device_id *pci_id) 2590 { 2591 static int dev; 2592 struct snd_card *card; 2593 struct snd_ice1712 *ice; 2594 int pcm_dev = 0, err; 2595 struct snd_ice1712_card_info * const *tbl, *c; 2596 2597 if (dev >= SNDRV_CARDS) 2598 return -ENODEV; 2599 if (!enable[dev]) { 2600 dev++; 2601 return -ENOENT; 2602 } 2603 2604 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2605 0, &card); 2606 if (err < 0) 2607 return err; 2608 2609 strcpy(card->driver, "ICE1712"); 2610 strcpy(card->shortname, "ICEnsemble ICE1712"); 2611 2612 err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2613 cs8427_timeout[dev], dxr_enable[dev], &ice); 2614 if (err < 0) { 2615 snd_card_free(card); 2616 return err; 2617 } 2618 2619 for (tbl = card_tables; *tbl; tbl++) { 2620 for (c = *tbl; c->subvendor; c++) { 2621 if (c->subvendor == ice->eeprom.subvendor) { 2622 ice->card_info = c; 2623 strcpy(card->shortname, c->name); 2624 if (c->driver) /* specific driver? */ 2625 strcpy(card->driver, c->driver); 2626 if (c->chip_init) { 2627 err = c->chip_init(ice); 2628 if (err < 0) { 2629 snd_card_free(card); 2630 return err; 2631 } 2632 } 2633 goto __found; 2634 } 2635 } 2636 } 2637 c = &no_matched; 2638 __found: 2639 2640 err = snd_ice1712_pcm_profi(ice, pcm_dev++); 2641 if (err < 0) { 2642 snd_card_free(card); 2643 return err; 2644 } 2645 2646 if (ice_has_con_ac97(ice)) { 2647 err = snd_ice1712_pcm(ice, pcm_dev++); 2648 if (err < 0) { 2649 snd_card_free(card); 2650 return err; 2651 } 2652 } 2653 2654 err = snd_ice1712_ac97_mixer(ice); 2655 if (err < 0) { 2656 snd_card_free(card); 2657 return err; 2658 } 2659 2660 err = snd_ice1712_build_controls(ice); 2661 if (err < 0) { 2662 snd_card_free(card); 2663 return err; 2664 } 2665 2666 if (c->build_controls) { 2667 err = c->build_controls(ice); 2668 if (err < 0) { 2669 snd_card_free(card); 2670 return err; 2671 } 2672 } 2673 2674 if (ice_has_con_ac97(ice)) { 2675 err = snd_ice1712_pcm_ds(ice, pcm_dev++); 2676 if (err < 0) { 2677 snd_card_free(card); 2678 return err; 2679 } 2680 } 2681 2682 if (!c->no_mpu401) { 2683 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2684 ICEREG(ice, MPU1_CTRL), 2685 c->mpu401_1_info_flags | 2686 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2687 -1, &ice->rmidi[0]); 2688 if (err < 0) { 2689 snd_card_free(card); 2690 return err; 2691 } 2692 if (c->mpu401_1_name) 2693 /* Preferred name available in card_info */ 2694 snprintf(ice->rmidi[0]->name, 2695 sizeof(ice->rmidi[0]->name), 2696 "%s %d", c->mpu401_1_name, card->number); 2697 2698 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2699 /* 2nd port used */ 2700 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2701 ICEREG(ice, MPU2_CTRL), 2702 c->mpu401_2_info_flags | 2703 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2704 -1, &ice->rmidi[1]); 2705 2706 if (err < 0) { 2707 snd_card_free(card); 2708 return err; 2709 } 2710 if (c->mpu401_2_name) 2711 /* Preferred name available in card_info */ 2712 snprintf(ice->rmidi[1]->name, 2713 sizeof(ice->rmidi[1]->name), 2714 "%s %d", c->mpu401_2_name, 2715 card->number); 2716 } 2717 } 2718 2719 snd_ice1712_set_input_clock_source(ice, 0); 2720 2721 sprintf(card->longname, "%s at 0x%lx, irq %i", 2722 card->shortname, ice->port, ice->irq); 2723 2724 err = snd_card_register(card); 2725 if (err < 0) { 2726 snd_card_free(card); 2727 return err; 2728 } 2729 pci_set_drvdata(pci, card); 2730 dev++; 2731 return 0; 2732 } 2733 2734 static void snd_ice1712_remove(struct pci_dev *pci) 2735 { 2736 struct snd_card *card = pci_get_drvdata(pci); 2737 struct snd_ice1712 *ice = card->private_data; 2738 2739 if (ice->card_info && ice->card_info->chip_exit) 2740 ice->card_info->chip_exit(ice); 2741 snd_card_free(card); 2742 } 2743 2744 #ifdef CONFIG_PM_SLEEP 2745 static int snd_ice1712_suspend(struct device *dev) 2746 { 2747 struct snd_card *card = dev_get_drvdata(dev); 2748 struct snd_ice1712 *ice = card->private_data; 2749 2750 if (!ice->pm_suspend_enabled) 2751 return 0; 2752 2753 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2754 2755 snd_ac97_suspend(ice->ac97); 2756 2757 spin_lock_irq(&ice->reg_lock); 2758 ice->pm_saved_is_spdif_master = is_spdif_master(ice); 2759 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT)); 2760 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2761 spin_unlock_irq(&ice->reg_lock); 2762 2763 if (ice->pm_suspend) 2764 ice->pm_suspend(ice); 2765 return 0; 2766 } 2767 2768 static int snd_ice1712_resume(struct device *dev) 2769 { 2770 struct snd_card *card = dev_get_drvdata(dev); 2771 struct snd_ice1712 *ice = card->private_data; 2772 int rate; 2773 2774 if (!ice->pm_suspend_enabled) 2775 return 0; 2776 2777 if (ice->cur_rate) 2778 rate = ice->cur_rate; 2779 else 2780 rate = PRO_RATE_DEFAULT; 2781 2782 if (snd_ice1712_chip_init(ice) < 0) { 2783 snd_card_disconnect(card); 2784 return -EIO; 2785 } 2786 2787 ice->cur_rate = rate; 2788 2789 if (ice->pm_resume) 2790 ice->pm_resume(ice); 2791 2792 if (ice->pm_saved_is_spdif_master) { 2793 /* switching to external clock via SPDIF */ 2794 spin_lock_irq(&ice->reg_lock); 2795 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER, 2796 ICEMT(ice, RATE)); 2797 spin_unlock_irq(&ice->reg_lock); 2798 snd_ice1712_set_input_clock_source(ice, 1); 2799 } else { 2800 /* internal on-card clock */ 2801 snd_ice1712_set_pro_rate(ice, rate, 1); 2802 snd_ice1712_set_input_clock_source(ice, 0); 2803 } 2804 2805 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT)); 2806 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03)); 2807 2808 snd_ac97_resume(ice->ac97); 2809 2810 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2811 return 0; 2812 } 2813 2814 static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume); 2815 #define SND_VT1712_PM_OPS &snd_ice1712_pm 2816 #else 2817 #define SND_VT1712_PM_OPS NULL 2818 #endif /* CONFIG_PM_SLEEP */ 2819 2820 static struct pci_driver ice1712_driver = { 2821 .name = KBUILD_MODNAME, 2822 .id_table = snd_ice1712_ids, 2823 .probe = snd_ice1712_probe, 2824 .remove = snd_ice1712_remove, 2825 .driver = { 2826 .pm = SND_VT1712_PM_OPS, 2827 }, 2828 }; 2829 2830 module_pci_driver(ice1712_driver); 2831