xref: /openbmc/linux/sound/pci/ice1712/ice1712.c (revision 6774def6)
1 /*
2  *   ALSA driver for ICEnsemble ICE1712 (Envy24)
3  *
4  *	Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5  *
6  *   This program is free software; you can redistribute it and/or modify
7  *   it under the terms of the GNU General Public License as published by
8  *   the Free Software Foundation; either version 2 of the License, or
9  *   (at your option) any later version.
10  *
11  *   This program is distributed in the hope that it will be useful,
12  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
13  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  *   GNU General Public License for more details.
15  *
16  *   You should have received a copy of the GNU General Public License
17  *   along with this program; if not, write to the Free Software
18  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
19  *
20  */
21 
22 /*
23   NOTES:
24   - spdif nonaudio consumer mode does not work (at least with my
25     Sony STR-DB830)
26 */
27 
28 /*
29  * Changes:
30  *
31  *  2002.09.09	Takashi Iwai <tiwai@suse.de>
32  *	split the code to several files.  each low-level routine
33  *	is stored in the local file and called from registration
34  *	function from card_info struct.
35  *
36  *  2002.11.26	James Stafford <jstafford@ampltd.com>
37  *	Added support for VT1724 (Envy24HT)
38  *	I have left out support for 176.4 and 192 KHz for the moment.
39  *  I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40  *
41  *  2003.02.20  Taksahi Iwai <tiwai@suse.de>
42  *	Split vt1724 part to an independent driver.
43  *	The GPIO is accessed through the callback functions now.
44  *
45  * 2004.03.31 Doug McLain <nostar@comcast.net>
46  *    Added support for Event Electronics EZ8 card to hoontech.c.
47  */
48 
49 
50 #include <linux/delay.h>
51 #include <linux/interrupt.h>
52 #include <linux/init.h>
53 #include <linux/pci.h>
54 #include <linux/dma-mapping.h>
55 #include <linux/slab.h>
56 #include <linux/module.h>
57 #include <linux/mutex.h>
58 
59 #include <sound/core.h>
60 #include <sound/cs8427.h>
61 #include <sound/info.h>
62 #include <sound/initval.h>
63 #include <sound/tlv.h>
64 
65 #include <sound/asoundef.h>
66 
67 #include "ice1712.h"
68 
69 /* lowlevel routines */
70 #include "delta.h"
71 #include "ews.h"
72 #include "hoontech.h"
73 
74 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
75 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76 MODULE_LICENSE("GPL");
77 MODULE_SUPPORTED_DEVICE("{"
78 	       HOONTECH_DEVICE_DESC
79 	       DELTA_DEVICE_DESC
80 	       EWS_DEVICE_DESC
81 	       "{ICEnsemble,Generic ICE1712},"
82 	       "{ICEnsemble,Generic Envy24}}");
83 
84 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;	/* Index 0-MAX */
85 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;	/* ID for this card */
86 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
87 static char *model[SNDRV_CARDS];
88 static bool omni[SNDRV_CARDS];				/* Delta44 & 66 Omni I/O support */
89 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
90 static int dxr_enable[SNDRV_CARDS];			/* DXR enable for DMX6FIRE */
91 
92 module_param_array(index, int, NULL, 0444);
93 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94 module_param_array(id, charp, NULL, 0444);
95 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96 module_param_array(enable, bool, NULL, 0444);
97 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98 module_param_array(omni, bool, NULL, 0444);
99 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100 module_param_array(cs8427_timeout, int, NULL, 0444);
101 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102 module_param_array(model, charp, NULL, 0444);
103 MODULE_PARM_DESC(model, "Use the given board model.");
104 module_param_array(dxr_enable, int, NULL, 0444);
105 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
106 
107 
108 static const struct pci_device_id snd_ice1712_ids[] = {
109 	{ PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 },   /* ICE1712 */
110 	{ 0, }
111 };
112 
113 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114 
115 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
117 
118 static int PRO_RATE_LOCKED;
119 static int PRO_RATE_RESET = 1;
120 static unsigned int PRO_RATE_DEFAULT = 44100;
121 
122 /*
123  *  Basic I/O
124  */
125 
126 /* check whether the clock mode is spdif-in */
127 static inline int is_spdif_master(struct snd_ice1712 *ice)
128 {
129 	return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130 }
131 
132 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
133 {
134 	return is_spdif_master(ice) || PRO_RATE_LOCKED;
135 }
136 
137 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
138 {
139 	outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 	outl(data, ICEDS(ice, DATA));
141 }
142 
143 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
144 {
145 	outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 	return inl(ICEDS(ice, DATA));
147 }
148 
149 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
150 				   unsigned short reg,
151 				   unsigned short val)
152 {
153 	struct snd_ice1712 *ice = ac97->private_data;
154 	int tm;
155 	unsigned char old_cmd = 0;
156 
157 	for (tm = 0; tm < 0x10000; tm++) {
158 		old_cmd = inb(ICEREG(ice, AC97_CMD));
159 		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 			continue;
161 		if (!(old_cmd & ICE1712_AC97_READY))
162 			continue;
163 		break;
164 	}
165 	outb(reg, ICEREG(ice, AC97_INDEX));
166 	outw(val, ICEREG(ice, AC97_DATA));
167 	old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 	outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 	for (tm = 0; tm < 0x10000; tm++)
170 		if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 			break;
172 }
173 
174 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
175 					    unsigned short reg)
176 {
177 	struct snd_ice1712 *ice = ac97->private_data;
178 	int tm;
179 	unsigned char old_cmd = 0;
180 
181 	for (tm = 0; tm < 0x10000; tm++) {
182 		old_cmd = inb(ICEREG(ice, AC97_CMD));
183 		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 			continue;
185 		if (!(old_cmd & ICE1712_AC97_READY))
186 			continue;
187 		break;
188 	}
189 	outb(reg, ICEREG(ice, AC97_INDEX));
190 	outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 	for (tm = 0; tm < 0x10000; tm++)
192 		if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 			break;
194 	if (tm >= 0x10000)		/* timeout */
195 		return ~0;
196 	return inw(ICEREG(ice, AC97_DATA));
197 }
198 
199 /*
200  * pro ac97 section
201  */
202 
203 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
204 				       unsigned short reg,
205 				       unsigned short val)
206 {
207 	struct snd_ice1712 *ice = ac97->private_data;
208 	int tm;
209 	unsigned char old_cmd = 0;
210 
211 	for (tm = 0; tm < 0x10000; tm++) {
212 		old_cmd = inb(ICEMT(ice, AC97_CMD));
213 		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 			continue;
215 		if (!(old_cmd & ICE1712_AC97_READY))
216 			continue;
217 		break;
218 	}
219 	outb(reg, ICEMT(ice, AC97_INDEX));
220 	outw(val, ICEMT(ice, AC97_DATA));
221 	old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 	outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 	for (tm = 0; tm < 0x10000; tm++)
224 		if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 			break;
226 }
227 
228 
229 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
230 						unsigned short reg)
231 {
232 	struct snd_ice1712 *ice = ac97->private_data;
233 	int tm;
234 	unsigned char old_cmd = 0;
235 
236 	for (tm = 0; tm < 0x10000; tm++) {
237 		old_cmd = inb(ICEMT(ice, AC97_CMD));
238 		if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 			continue;
240 		if (!(old_cmd & ICE1712_AC97_READY))
241 			continue;
242 		break;
243 	}
244 	outb(reg, ICEMT(ice, AC97_INDEX));
245 	outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 	for (tm = 0; tm < 0x10000; tm++)
247 		if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 			break;
249 	if (tm >= 0x10000)		/* timeout */
250 		return ~0;
251 	return inw(ICEMT(ice, AC97_DATA));
252 }
253 
254 /*
255  * consumer ac97 digital mix
256  */
257 #define snd_ice1712_digmix_route_ac97_info	snd_ctl_boolean_mono_info
258 
259 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
260 {
261 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
262 
263 	ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 	return 0;
265 }
266 
267 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
268 {
269 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
270 	unsigned char val, nval;
271 
272 	spin_lock_irq(&ice->reg_lock);
273 	val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 	nval = val & ~ICE1712_ROUTE_AC97;
275 	if (ucontrol->value.integer.value[0])
276 		nval |= ICE1712_ROUTE_AC97;
277 	outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 	spin_unlock_irq(&ice->reg_lock);
279 	return val != nval;
280 }
281 
282 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
283 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 	.name = "Digital Mixer To AC97",
285 	.info = snd_ice1712_digmix_route_ac97_info,
286 	.get = snd_ice1712_digmix_route_ac97_get,
287 	.put = snd_ice1712_digmix_route_ac97_put,
288 };
289 
290 
291 /*
292  * gpio operations
293  */
294 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
295 {
296 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 	inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298 }
299 
300 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301 {
302 	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303 }
304 
305 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306 {
307 	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308 }
309 
310 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
311 {
312 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 	inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314 }
315 
316 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
317 {
318 	return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319 }
320 
321 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
322 {
323 	snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 	inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325 }
326 
327 /*
328  *
329  * CS8427 interface
330  *
331  */
332 
333 /*
334  * change the input clock selection
335  * spdif_clock = 1 - IEC958 input, 0 - Envy24
336  */
337 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
338 {
339 	unsigned char reg[2] = { 0x80 | 4, 0 };   /* CS8427 auto increment | register number 4 + data */
340 	unsigned char val, nval;
341 	int res = 0;
342 
343 	snd_i2c_lock(ice->i2c);
344 	if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 		snd_i2c_unlock(ice->i2c);
346 		return -EIO;
347 	}
348 	if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 		snd_i2c_unlock(ice->i2c);
350 		return -EIO;
351 	}
352 	nval = val & 0xf0;
353 	if (spdif_clock)
354 		nval |= 0x01;
355 	else
356 		nval |= 0x04;
357 	if (val != nval) {
358 		reg[1] = nval;
359 		if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 			res = -EIO;
361 		} else {
362 			res++;
363 		}
364 	}
365 	snd_i2c_unlock(ice->i2c);
366 	return res;
367 }
368 
369 /*
370  * spdif callbacks
371  */
372 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
373 {
374 	snd_cs8427_iec958_active(ice->cs8427, 1);
375 }
376 
377 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
378 {
379 	snd_cs8427_iec958_active(ice->cs8427, 0);
380 }
381 
382 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
383 {
384 	snd_cs8427_iec958_pcm(ice->cs8427, rate);
385 }
386 
387 /*
388  * create and initialize callbacks for cs8427 interface
389  */
390 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
391 {
392 	int err;
393 
394 	err = snd_cs8427_create(ice->i2c, addr,
395 		(ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 	if (err < 0) {
397 		dev_err(ice->card->dev, "CS8427 initialization failed\n");
398 		return err;
399 	}
400 	ice->spdif.ops.open = open_cs8427;
401 	ice->spdif.ops.close = close_cs8427;
402 	ice->spdif.ops.setup_rate = setup_cs8427;
403 	return 0;
404 }
405 
406 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407 {
408 	/* change CS8427 clock source too */
409 	if (ice->cs8427)
410 		snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
411 	/* notify ak4524 chip as well */
412 	if (spdif_is_master) {
413 		unsigned int i;
414 		for (i = 0; i < ice->akm_codecs; i++) {
415 			if (ice->akm[i].ops.set_rate_val)
416 				ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 		}
418 	}
419 }
420 
421 /*
422  *  Interrupt handler
423  */
424 
425 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
426 {
427 	struct snd_ice1712 *ice = dev_id;
428 	unsigned char status;
429 	int handled = 0;
430 
431 	while (1) {
432 		status = inb(ICEREG(ice, IRQSTAT));
433 		if (status == 0)
434 			break;
435 		handled = 1;
436 		if (status & ICE1712_IRQ_MPU1) {
437 			if (ice->rmidi[0])
438 				snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
439 			outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 			status &= ~ICE1712_IRQ_MPU1;
441 		}
442 		if (status & ICE1712_IRQ_TIMER)
443 			outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 		if (status & ICE1712_IRQ_MPU2) {
445 			if (ice->rmidi[1])
446 				snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
447 			outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 			status &= ~ICE1712_IRQ_MPU2;
449 		}
450 		if (status & ICE1712_IRQ_PROPCM) {
451 			unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 			if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 				if (ice->playback_pro_substream)
454 					snd_pcm_period_elapsed(ice->playback_pro_substream);
455 				outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 			}
457 			if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 				if (ice->capture_pro_substream)
459 					snd_pcm_period_elapsed(ice->capture_pro_substream);
460 				outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 			}
462 		}
463 		if (status & ICE1712_IRQ_FM)
464 			outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 		if (status & ICE1712_IRQ_PBKDS) {
466 			u32 idx;
467 			u16 pbkstatus;
468 			struct snd_pcm_substream *substream;
469 			pbkstatus = inw(ICEDS(ice, INTSTAT));
470 			/* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */
471 			for (idx = 0; idx < 6; idx++) {
472 				if ((pbkstatus & (3 << (idx * 2))) == 0)
473 					continue;
474 				substream = ice->playback_con_substream_ds[idx];
475 				if (substream != NULL)
476 					snd_pcm_period_elapsed(substream);
477 				outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 			}
479 			outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 		}
481 		if (status & ICE1712_IRQ_CONCAP) {
482 			if (ice->capture_con_substream)
483 				snd_pcm_period_elapsed(ice->capture_con_substream);
484 			outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 		}
486 		if (status & ICE1712_IRQ_CONPBK) {
487 			if (ice->playback_con_substream)
488 				snd_pcm_period_elapsed(ice->playback_con_substream);
489 			outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 		}
491 	}
492 	return IRQ_RETVAL(handled);
493 }
494 
495 
496 /*
497  *  PCM part - misc
498  */
499 
500 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 				 struct snd_pcm_hw_params *hw_params)
502 {
503 	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504 }
505 
506 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
507 {
508 	return snd_pcm_lib_free_pages(substream);
509 }
510 
511 /*
512  *  PCM part - consumer I/O
513  */
514 
515 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
516 					int cmd)
517 {
518 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
519 	int result = 0;
520 	u32 tmp;
521 
522 	spin_lock(&ice->reg_lock);
523 	tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 	if (cmd == SNDRV_PCM_TRIGGER_START) {
525 		tmp |= 1;
526 	} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 		tmp &= ~1;
528 	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 		tmp |= 2;
530 	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 		tmp &= ~2;
532 	} else {
533 		result = -EINVAL;
534 	}
535 	snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 	spin_unlock(&ice->reg_lock);
537 	return result;
538 }
539 
540 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
541 					   int cmd)
542 {
543 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
544 	int result = 0;
545 	u32 tmp;
546 
547 	spin_lock(&ice->reg_lock);
548 	tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 	if (cmd == SNDRV_PCM_TRIGGER_START) {
550 		tmp |= 1;
551 	} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 		tmp &= ~1;
553 	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 		tmp |= 2;
555 	} else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 		tmp &= ~2;
557 	} else {
558 		result = -EINVAL;
559 	}
560 	snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 	spin_unlock(&ice->reg_lock);
562 	return result;
563 }
564 
565 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
566 				       int cmd)
567 {
568 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
569 	int result = 0;
570 	u8 tmp;
571 
572 	spin_lock(&ice->reg_lock);
573 	tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 	if (cmd == SNDRV_PCM_TRIGGER_START) {
575 		tmp |= 1;
576 	} else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 		tmp &= ~1;
578 	} else {
579 		result = -EINVAL;
580 	}
581 	snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 	spin_unlock(&ice->reg_lock);
583 	return result;
584 }
585 
586 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
587 {
588 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 	struct snd_pcm_runtime *runtime = substream->runtime;
590 	u32 period_size, buf_size, rate, tmp;
591 
592 	period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 	buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 	tmp = 0x0000;
595 	if (snd_pcm_format_width(runtime->format) == 16)
596 		tmp |= 0x10;
597 	if (runtime->channels == 2)
598 		tmp |= 0x08;
599 	rate = (runtime->rate * 8192) / 375;
600 	if (rate > 0x000fffff)
601 		rate = 0x000fffff;
602 	spin_lock_irq(&ice->reg_lock);
603 	outb(0, ice->ddma_port + 15);
604 	outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 	outl(runtime->dma_addr, ice->ddma_port + 0);
606 	outw(buf_size, ice->ddma_port + 4);
607 	snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 	snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 	snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 	snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 	snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 	snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 	snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 	snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 	spin_unlock_irq(&ice->reg_lock);
616 	return 0;
617 }
618 
619 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
620 {
621 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 	struct snd_pcm_runtime *runtime = substream->runtime;
623 	u32 period_size, buf_size, rate, tmp, chn;
624 
625 	period_size = snd_pcm_lib_period_bytes(substream) - 1;
626 	buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
627 	tmp = 0x0064;
628 	if (snd_pcm_format_width(runtime->format) == 16)
629 		tmp &= ~0x04;
630 	if (runtime->channels == 2)
631 		tmp |= 0x08;
632 	rate = (runtime->rate * 8192) / 375;
633 	if (rate > 0x000fffff)
634 		rate = 0x000fffff;
635 	ice->playback_con_active_buf[substream->number] = 0;
636 	ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
637 	chn = substream->number * 2;
638 	spin_lock_irq(&ice->reg_lock);
639 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
640 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
641 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
642 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
643 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
644 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
645 	snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
646 	if (runtime->channels == 2) {
647 		snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
648 		snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
649 	}
650 	spin_unlock_irq(&ice->reg_lock);
651 	return 0;
652 }
653 
654 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
655 {
656 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
657 	struct snd_pcm_runtime *runtime = substream->runtime;
658 	u32 period_size, buf_size;
659 	u8 tmp;
660 
661 	period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
662 	buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
663 	tmp = 0x06;
664 	if (snd_pcm_format_width(runtime->format) == 16)
665 		tmp &= ~0x04;
666 	if (runtime->channels == 2)
667 		tmp &= ~0x02;
668 	spin_lock_irq(&ice->reg_lock);
669 	outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
670 	outw(buf_size, ICEREG(ice, CONCAP_COUNT));
671 	snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
672 	snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
673 	snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
674 	spin_unlock_irq(&ice->reg_lock);
675 	snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
676 	return 0;
677 }
678 
679 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
680 {
681 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
682 	struct snd_pcm_runtime *runtime = substream->runtime;
683 	size_t ptr;
684 
685 	if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
686 		return 0;
687 	ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
688 	ptr = bytes_to_frames(substream->runtime, ptr);
689 	if (ptr == runtime->buffer_size)
690 		ptr = 0;
691 	return ptr;
692 }
693 
694 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
695 {
696 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
697 	u8 addr;
698 	size_t ptr;
699 
700 	if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
701 		return 0;
702 	if (ice->playback_con_active_buf[substream->number])
703 		addr = ICE1712_DSC_ADDR1;
704 	else
705 		addr = ICE1712_DSC_ADDR0;
706 	ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
707 		ice->playback_con_virt_addr[substream->number];
708 	ptr = bytes_to_frames(substream->runtime, ptr);
709 	if (ptr == substream->runtime->buffer_size)
710 		ptr = 0;
711 	return ptr;
712 }
713 
714 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
715 {
716 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
717 	size_t ptr;
718 
719 	if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
720 		return 0;
721 	ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
722 	ptr = bytes_to_frames(substream->runtime, ptr);
723 	if (ptr == substream->runtime->buffer_size)
724 		ptr = 0;
725 	return ptr;
726 }
727 
728 static const struct snd_pcm_hardware snd_ice1712_playback = {
729 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
730 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
731 				 SNDRV_PCM_INFO_MMAP_VALID |
732 				 SNDRV_PCM_INFO_PAUSE),
733 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
734 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
735 	.rate_min =		4000,
736 	.rate_max =		48000,
737 	.channels_min =		1,
738 	.channels_max =		2,
739 	.buffer_bytes_max =	(64*1024),
740 	.period_bytes_min =	64,
741 	.period_bytes_max =	(64*1024),
742 	.periods_min =		1,
743 	.periods_max =		1024,
744 	.fifo_size =		0,
745 };
746 
747 static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
748 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
749 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
750 				 SNDRV_PCM_INFO_MMAP_VALID |
751 				 SNDRV_PCM_INFO_PAUSE),
752 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
753 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
754 	.rate_min =		4000,
755 	.rate_max =		48000,
756 	.channels_min =		1,
757 	.channels_max =		2,
758 	.buffer_bytes_max =	(128*1024),
759 	.period_bytes_min =	64,
760 	.period_bytes_max =	(128*1024),
761 	.periods_min =		2,
762 	.periods_max =		2,
763 	.fifo_size =		0,
764 };
765 
766 static const struct snd_pcm_hardware snd_ice1712_capture = {
767 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
768 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
769 				 SNDRV_PCM_INFO_MMAP_VALID),
770 	.formats =		SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
771 	.rates =		SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
772 	.rate_min =		4000,
773 	.rate_max =		48000,
774 	.channels_min =		1,
775 	.channels_max =		2,
776 	.buffer_bytes_max =	(64*1024),
777 	.period_bytes_min =	64,
778 	.period_bytes_max =	(64*1024),
779 	.periods_min =		1,
780 	.periods_max =		1024,
781 	.fifo_size =		0,
782 };
783 
784 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
785 {
786 	struct snd_pcm_runtime *runtime = substream->runtime;
787 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
788 
789 	ice->playback_con_substream = substream;
790 	runtime->hw = snd_ice1712_playback;
791 	return 0;
792 }
793 
794 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
795 {
796 	struct snd_pcm_runtime *runtime = substream->runtime;
797 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
798 	u32 tmp;
799 
800 	ice->playback_con_substream_ds[substream->number] = substream;
801 	runtime->hw = snd_ice1712_playback_ds;
802 	spin_lock_irq(&ice->reg_lock);
803 	tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
804 	outw(tmp, ICEDS(ice, INTMASK));
805 	spin_unlock_irq(&ice->reg_lock);
806 	return 0;
807 }
808 
809 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
810 {
811 	struct snd_pcm_runtime *runtime = substream->runtime;
812 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
813 
814 	ice->capture_con_substream = substream;
815 	runtime->hw = snd_ice1712_capture;
816 	runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
817 	if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
818 		runtime->hw.rate_min = 48000;
819 	return 0;
820 }
821 
822 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
823 {
824 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
825 
826 	ice->playback_con_substream = NULL;
827 	return 0;
828 }
829 
830 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
831 {
832 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
833 	u32 tmp;
834 
835 	spin_lock_irq(&ice->reg_lock);
836 	tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
837 	outw(tmp, ICEDS(ice, INTMASK));
838 	spin_unlock_irq(&ice->reg_lock);
839 	ice->playback_con_substream_ds[substream->number] = NULL;
840 	return 0;
841 }
842 
843 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
844 {
845 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
846 
847 	ice->capture_con_substream = NULL;
848 	return 0;
849 }
850 
851 static struct snd_pcm_ops snd_ice1712_playback_ops = {
852 	.open =		snd_ice1712_playback_open,
853 	.close =	snd_ice1712_playback_close,
854 	.ioctl =	snd_pcm_lib_ioctl,
855 	.hw_params =	snd_ice1712_hw_params,
856 	.hw_free =	snd_ice1712_hw_free,
857 	.prepare =	snd_ice1712_playback_prepare,
858 	.trigger =	snd_ice1712_playback_trigger,
859 	.pointer =	snd_ice1712_playback_pointer,
860 };
861 
862 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
863 	.open =		snd_ice1712_playback_ds_open,
864 	.close =	snd_ice1712_playback_ds_close,
865 	.ioctl =	snd_pcm_lib_ioctl,
866 	.hw_params =	snd_ice1712_hw_params,
867 	.hw_free =	snd_ice1712_hw_free,
868 	.prepare =	snd_ice1712_playback_ds_prepare,
869 	.trigger =	snd_ice1712_playback_ds_trigger,
870 	.pointer =	snd_ice1712_playback_ds_pointer,
871 };
872 
873 static struct snd_pcm_ops snd_ice1712_capture_ops = {
874 	.open =		snd_ice1712_capture_open,
875 	.close =	snd_ice1712_capture_close,
876 	.ioctl =	snd_pcm_lib_ioctl,
877 	.hw_params =	snd_ice1712_hw_params,
878 	.hw_free =	snd_ice1712_hw_free,
879 	.prepare =	snd_ice1712_capture_prepare,
880 	.trigger =	snd_ice1712_capture_trigger,
881 	.pointer =	snd_ice1712_capture_pointer,
882 };
883 
884 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
885 {
886 	struct snd_pcm *pcm;
887 	int err;
888 
889 	if (rpcm)
890 		*rpcm = NULL;
891 	err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
892 	if (err < 0)
893 		return err;
894 
895 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
896 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
897 
898 	pcm->private_data = ice;
899 	pcm->info_flags = 0;
900 	strcpy(pcm->name, "ICE1712 consumer");
901 	ice->pcm = pcm;
902 
903 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
904 					      snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
905 
906 	if (rpcm)
907 		*rpcm = pcm;
908 
909 	dev_warn(ice->card->dev,
910 		 "Consumer PCM code does not work well at the moment --jk\n");
911 
912 	return 0;
913 }
914 
915 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
916 {
917 	struct snd_pcm *pcm;
918 	int err;
919 
920 	if (rpcm)
921 		*rpcm = NULL;
922 	err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
923 	if (err < 0)
924 		return err;
925 
926 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
927 
928 	pcm->private_data = ice;
929 	pcm->info_flags = 0;
930 	strcpy(pcm->name, "ICE1712 consumer (DS)");
931 	ice->pcm_ds = pcm;
932 
933 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
934 					      snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
935 
936 	if (rpcm)
937 		*rpcm = pcm;
938 
939 	return 0;
940 }
941 
942 /*
943  *  PCM code - professional part (multitrack)
944  */
945 
946 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
947 				32000, 44100, 48000, 64000, 88200, 96000 };
948 
949 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
950 	.count = ARRAY_SIZE(rates),
951 	.list = rates,
952 	.mask = 0,
953 };
954 
955 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
956 				   int cmd)
957 {
958 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
959 	switch (cmd) {
960 	case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
961 	case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
962 	{
963 		unsigned int what;
964 		unsigned int old;
965 		if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
966 			return -EINVAL;
967 		what = ICE1712_PLAYBACK_PAUSE;
968 		snd_pcm_trigger_done(substream, substream);
969 		spin_lock(&ice->reg_lock);
970 		old = inl(ICEMT(ice, PLAYBACK_CONTROL));
971 		if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
972 			old |= what;
973 		else
974 			old &= ~what;
975 		outl(old, ICEMT(ice, PLAYBACK_CONTROL));
976 		spin_unlock(&ice->reg_lock);
977 		break;
978 	}
979 	case SNDRV_PCM_TRIGGER_START:
980 	case SNDRV_PCM_TRIGGER_STOP:
981 	{
982 		unsigned int what = 0;
983 		unsigned int old;
984 		struct snd_pcm_substream *s;
985 
986 		snd_pcm_group_for_each_entry(s, substream) {
987 			if (s == ice->playback_pro_substream) {
988 				what |= ICE1712_PLAYBACK_START;
989 				snd_pcm_trigger_done(s, substream);
990 			} else if (s == ice->capture_pro_substream) {
991 				what |= ICE1712_CAPTURE_START_SHADOW;
992 				snd_pcm_trigger_done(s, substream);
993 			}
994 		}
995 		spin_lock(&ice->reg_lock);
996 		old = inl(ICEMT(ice, PLAYBACK_CONTROL));
997 		if (cmd == SNDRV_PCM_TRIGGER_START)
998 			old |= what;
999 		else
1000 			old &= ~what;
1001 		outl(old, ICEMT(ice, PLAYBACK_CONTROL));
1002 		spin_unlock(&ice->reg_lock);
1003 		break;
1004 	}
1005 	default:
1006 		return -EINVAL;
1007 	}
1008 	return 0;
1009 }
1010 
1011 /*
1012  */
1013 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1014 {
1015 	unsigned long flags;
1016 	unsigned char val, old;
1017 	unsigned int i;
1018 
1019 	switch (rate) {
1020 	case 8000: val = 6; break;
1021 	case 9600: val = 3; break;
1022 	case 11025: val = 10; break;
1023 	case 12000: val = 2; break;
1024 	case 16000: val = 5; break;
1025 	case 22050: val = 9; break;
1026 	case 24000: val = 1; break;
1027 	case 32000: val = 4; break;
1028 	case 44100: val = 8; break;
1029 	case 48000: val = 0; break;
1030 	case 64000: val = 15; break;
1031 	case 88200: val = 11; break;
1032 	case 96000: val = 7; break;
1033 	default:
1034 		snd_BUG();
1035 		val = 0;
1036 		rate = 48000;
1037 		break;
1038 	}
1039 
1040 	spin_lock_irqsave(&ice->reg_lock, flags);
1041 	if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1042 						 ICE1712_PLAYBACK_PAUSE|
1043 						 ICE1712_PLAYBACK_START)) {
1044 __out:
1045 		spin_unlock_irqrestore(&ice->reg_lock, flags);
1046 		return;
1047 	}
1048 	if (!force && is_pro_rate_locked(ice))
1049 		goto __out;
1050 
1051 	old = inb(ICEMT(ice, RATE));
1052 	if (!force && old == val)
1053 		goto __out;
1054 
1055 	ice->cur_rate = rate;
1056 	outb(val, ICEMT(ice, RATE));
1057 	spin_unlock_irqrestore(&ice->reg_lock, flags);
1058 
1059 	if (ice->gpio.set_pro_rate)
1060 		ice->gpio.set_pro_rate(ice, rate);
1061 	for (i = 0; i < ice->akm_codecs; i++) {
1062 		if (ice->akm[i].ops.set_rate_val)
1063 			ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1064 	}
1065 	if (ice->spdif.ops.setup_rate)
1066 		ice->spdif.ops.setup_rate(ice, rate);
1067 }
1068 
1069 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1070 {
1071 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1072 
1073 	ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1074 	spin_lock_irq(&ice->reg_lock);
1075 	outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1076 	outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1077 	outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1078 	spin_unlock_irq(&ice->reg_lock);
1079 
1080 	return 0;
1081 }
1082 
1083 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1084 					      struct snd_pcm_hw_params *hw_params)
1085 {
1086 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1087 
1088 	snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1089 	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1090 }
1091 
1092 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1093 {
1094 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1095 
1096 	ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1097 	spin_lock_irq(&ice->reg_lock);
1098 	outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1099 	outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1100 	outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1101 	spin_unlock_irq(&ice->reg_lock);
1102 	return 0;
1103 }
1104 
1105 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1106 					     struct snd_pcm_hw_params *hw_params)
1107 {
1108 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1109 
1110 	snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1111 	return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1112 }
1113 
1114 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1115 {
1116 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1117 	size_t ptr;
1118 
1119 	if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1120 		return 0;
1121 	ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1122 	ptr = bytes_to_frames(substream->runtime, ptr);
1123 	if (ptr == substream->runtime->buffer_size)
1124 		ptr = 0;
1125 	return ptr;
1126 }
1127 
1128 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1129 {
1130 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1131 	size_t ptr;
1132 
1133 	if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1134 		return 0;
1135 	ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1136 	ptr = bytes_to_frames(substream->runtime, ptr);
1137 	if (ptr == substream->runtime->buffer_size)
1138 		ptr = 0;
1139 	return ptr;
1140 }
1141 
1142 static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1143 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1144 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1145 				 SNDRV_PCM_INFO_MMAP_VALID |
1146 				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1147 	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
1148 	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1149 	.rate_min =		4000,
1150 	.rate_max =		96000,
1151 	.channels_min =		10,
1152 	.channels_max =		10,
1153 	.buffer_bytes_max =	(256*1024),
1154 	.period_bytes_min =	10 * 4 * 2,
1155 	.period_bytes_max =	131040,
1156 	.periods_min =		1,
1157 	.periods_max =		1024,
1158 	.fifo_size =		0,
1159 };
1160 
1161 static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1162 	.info =			(SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1163 				 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1164 				 SNDRV_PCM_INFO_MMAP_VALID |
1165 				 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1166 	.formats =		SNDRV_PCM_FMTBIT_S32_LE,
1167 	.rates =		SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1168 	.rate_min =		4000,
1169 	.rate_max =		96000,
1170 	.channels_min =		12,
1171 	.channels_max =		12,
1172 	.buffer_bytes_max =	(256*1024),
1173 	.period_bytes_min =	12 * 4 * 2,
1174 	.period_bytes_max =	131040,
1175 	.periods_min =		1,
1176 	.periods_max =		1024,
1177 	.fifo_size =		0,
1178 };
1179 
1180 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1181 {
1182 	struct snd_pcm_runtime *runtime = substream->runtime;
1183 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1184 
1185 	ice->playback_pro_substream = substream;
1186 	runtime->hw = snd_ice1712_playback_pro;
1187 	snd_pcm_set_sync(substream);
1188 	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1189 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1190 	if (is_pro_rate_locked(ice)) {
1191 		runtime->hw.rate_min = PRO_RATE_DEFAULT;
1192 		runtime->hw.rate_max = PRO_RATE_DEFAULT;
1193 	}
1194 
1195 	if (ice->spdif.ops.open)
1196 		ice->spdif.ops.open(ice, substream);
1197 
1198 	return 0;
1199 }
1200 
1201 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1202 {
1203 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1204 	struct snd_pcm_runtime *runtime = substream->runtime;
1205 
1206 	ice->capture_pro_substream = substream;
1207 	runtime->hw = snd_ice1712_capture_pro;
1208 	snd_pcm_set_sync(substream);
1209 	snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1210 	snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1211 	if (is_pro_rate_locked(ice)) {
1212 		runtime->hw.rate_min = PRO_RATE_DEFAULT;
1213 		runtime->hw.rate_max = PRO_RATE_DEFAULT;
1214 	}
1215 
1216 	return 0;
1217 }
1218 
1219 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1220 {
1221 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1222 
1223 	if (PRO_RATE_RESET)
1224 		snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1225 	ice->playback_pro_substream = NULL;
1226 	if (ice->spdif.ops.close)
1227 		ice->spdif.ops.close(ice, substream);
1228 
1229 	return 0;
1230 }
1231 
1232 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1233 {
1234 	struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1235 
1236 	if (PRO_RATE_RESET)
1237 		snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1238 	ice->capture_pro_substream = NULL;
1239 	return 0;
1240 }
1241 
1242 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1243 	.open =		snd_ice1712_playback_pro_open,
1244 	.close =	snd_ice1712_playback_pro_close,
1245 	.ioctl =	snd_pcm_lib_ioctl,
1246 	.hw_params =	snd_ice1712_playback_pro_hw_params,
1247 	.hw_free =	snd_ice1712_hw_free,
1248 	.prepare =	snd_ice1712_playback_pro_prepare,
1249 	.trigger =	snd_ice1712_pro_trigger,
1250 	.pointer =	snd_ice1712_playback_pro_pointer,
1251 };
1252 
1253 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1254 	.open =		snd_ice1712_capture_pro_open,
1255 	.close =	snd_ice1712_capture_pro_close,
1256 	.ioctl =	snd_pcm_lib_ioctl,
1257 	.hw_params =	snd_ice1712_capture_pro_hw_params,
1258 	.hw_free =	snd_ice1712_hw_free,
1259 	.prepare =	snd_ice1712_capture_pro_prepare,
1260 	.trigger =	snd_ice1712_pro_trigger,
1261 	.pointer =	snd_ice1712_capture_pro_pointer,
1262 };
1263 
1264 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1265 {
1266 	struct snd_pcm *pcm;
1267 	int err;
1268 
1269 	if (rpcm)
1270 		*rpcm = NULL;
1271 	err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1272 	if (err < 0)
1273 		return err;
1274 
1275 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1276 	snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1277 
1278 	pcm->private_data = ice;
1279 	pcm->info_flags = 0;
1280 	strcpy(pcm->name, "ICE1712 multi");
1281 
1282 	snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1283 					      snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1284 
1285 	ice->pcm_pro = pcm;
1286 	if (rpcm)
1287 		*rpcm = pcm;
1288 
1289 	if (ice->cs8427) {
1290 		/* assign channels to iec958 */
1291 		err = snd_cs8427_iec958_build(ice->cs8427,
1292 					      pcm->streams[0].substream,
1293 					      pcm->streams[1].substream);
1294 		if (err < 0)
1295 			return err;
1296 	}
1297 
1298 	err = snd_ice1712_build_pro_mixer(ice);
1299 	if (err < 0)
1300 		return err;
1301 	return 0;
1302 }
1303 
1304 /*
1305  *  Mixer section
1306  */
1307 
1308 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1309 {
1310 	unsigned int vol = ice->pro_volumes[index];
1311 	unsigned short val = 0;
1312 
1313 	val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1314 	val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1315 	outb(index, ICEMT(ice, MONITOR_INDEX));
1316 	outw(val, ICEMT(ice, MONITOR_VOLUME));
1317 }
1318 
1319 #define snd_ice1712_pro_mixer_switch_info	snd_ctl_boolean_stereo_info
1320 
1321 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1322 {
1323 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1324 	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1325 		kcontrol->private_value;
1326 
1327 	spin_lock_irq(&ice->reg_lock);
1328 	ucontrol->value.integer.value[0] =
1329 		!((ice->pro_volumes[priv_idx] >> 15) & 1);
1330 	ucontrol->value.integer.value[1] =
1331 		!((ice->pro_volumes[priv_idx] >> 31) & 1);
1332 	spin_unlock_irq(&ice->reg_lock);
1333 	return 0;
1334 }
1335 
1336 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1337 {
1338 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1339 	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1340 		kcontrol->private_value;
1341 	unsigned int nval, change;
1342 
1343 	nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1344 	       (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1345 	spin_lock_irq(&ice->reg_lock);
1346 	nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1347 	change = nval != ice->pro_volumes[priv_idx];
1348 	ice->pro_volumes[priv_idx] = nval;
1349 	snd_ice1712_update_volume(ice, priv_idx);
1350 	spin_unlock_irq(&ice->reg_lock);
1351 	return change;
1352 }
1353 
1354 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1355 {
1356 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1357 	uinfo->count = 2;
1358 	uinfo->value.integer.min = 0;
1359 	uinfo->value.integer.max = 96;
1360 	return 0;
1361 }
1362 
1363 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1364 {
1365 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1366 	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1367 		kcontrol->private_value;
1368 
1369 	spin_lock_irq(&ice->reg_lock);
1370 	ucontrol->value.integer.value[0] =
1371 		(ice->pro_volumes[priv_idx] >> 0) & 127;
1372 	ucontrol->value.integer.value[1] =
1373 		(ice->pro_volumes[priv_idx] >> 16) & 127;
1374 	spin_unlock_irq(&ice->reg_lock);
1375 	return 0;
1376 }
1377 
1378 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1379 {
1380 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1381 	int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1382 		kcontrol->private_value;
1383 	unsigned int nval, change;
1384 
1385 	nval = (ucontrol->value.integer.value[0] & 127) |
1386 	       ((ucontrol->value.integer.value[1] & 127) << 16);
1387 	spin_lock_irq(&ice->reg_lock);
1388 	nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1389 	change = nval != ice->pro_volumes[priv_idx];
1390 	ice->pro_volumes[priv_idx] = nval;
1391 	snd_ice1712_update_volume(ice, priv_idx);
1392 	spin_unlock_irq(&ice->reg_lock);
1393 	return change;
1394 }
1395 
1396 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1397 
1398 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1399 	{
1400 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1401 		.name = "Multi Playback Switch",
1402 		.info = snd_ice1712_pro_mixer_switch_info,
1403 		.get = snd_ice1712_pro_mixer_switch_get,
1404 		.put = snd_ice1712_pro_mixer_switch_put,
1405 		.private_value = 0,
1406 		.count = 10,
1407 	},
1408 	{
1409 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1410 		.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1411 			   SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1412 		.name = "Multi Playback Volume",
1413 		.info = snd_ice1712_pro_mixer_volume_info,
1414 		.get = snd_ice1712_pro_mixer_volume_get,
1415 		.put = snd_ice1712_pro_mixer_volume_put,
1416 		.private_value = 0,
1417 		.count = 10,
1418 		.tlv = { .p = db_scale_playback }
1419 	},
1420 };
1421 
1422 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1423 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1424 	.name = "H/W Multi Capture Switch",
1425 	.info = snd_ice1712_pro_mixer_switch_info,
1426 	.get = snd_ice1712_pro_mixer_switch_get,
1427 	.put = snd_ice1712_pro_mixer_switch_put,
1428 	.private_value = 10,
1429 };
1430 
1431 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1432 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1433 	.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1434 	.info = snd_ice1712_pro_mixer_switch_info,
1435 	.get = snd_ice1712_pro_mixer_switch_get,
1436 	.put = snd_ice1712_pro_mixer_switch_put,
1437 	.private_value = 18,
1438 	.count = 2,
1439 };
1440 
1441 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1442 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1443 	.access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1444 		   SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1445 	.name = "H/W Multi Capture Volume",
1446 	.info = snd_ice1712_pro_mixer_volume_info,
1447 	.get = snd_ice1712_pro_mixer_volume_get,
1448 	.put = snd_ice1712_pro_mixer_volume_put,
1449 	.private_value = 10,
1450 	.tlv = { .p = db_scale_playback }
1451 };
1452 
1453 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1454 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1455 	.name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1456 	.info = snd_ice1712_pro_mixer_volume_info,
1457 	.get = snd_ice1712_pro_mixer_volume_get,
1458 	.put = snd_ice1712_pro_mixer_volume_put,
1459 	.private_value = 18,
1460 	.count = 2,
1461 };
1462 
1463 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1464 {
1465 	struct snd_card *card = ice->card;
1466 	unsigned int idx;
1467 	int err;
1468 
1469 	/* multi-channel mixer */
1470 	for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1471 		err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1472 		if (err < 0)
1473 			return err;
1474 	}
1475 
1476 	if (ice->num_total_adcs > 0) {
1477 		struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1478 		tmp.count = ice->num_total_adcs;
1479 		err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1480 		if (err < 0)
1481 			return err;
1482 	}
1483 
1484 	err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1485 	if (err < 0)
1486 		return err;
1487 
1488 	if (ice->num_total_adcs > 0) {
1489 		struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1490 		tmp.count = ice->num_total_adcs;
1491 		err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1492 		if (err < 0)
1493 			return err;
1494 	}
1495 
1496 	err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1497 	if (err < 0)
1498 		return err;
1499 
1500 	/* initialize volumes */
1501 	for (idx = 0; idx < 10; idx++) {
1502 		ice->pro_volumes[idx] = 0x80008000;	/* mute */
1503 		snd_ice1712_update_volume(ice, idx);
1504 	}
1505 	for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1506 		ice->pro_volumes[idx] = 0x80008000;	/* mute */
1507 		snd_ice1712_update_volume(ice, idx);
1508 	}
1509 	for (idx = 18; idx < 20; idx++) {
1510 		ice->pro_volumes[idx] = 0x80008000;	/* mute */
1511 		snd_ice1712_update_volume(ice, idx);
1512 	}
1513 	return 0;
1514 }
1515 
1516 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1517 {
1518 	struct snd_ice1712 *ice = ac97->private_data;
1519 	ice->ac97 = NULL;
1520 }
1521 
1522 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1523 {
1524 	int err, bus_num = 0;
1525 	struct snd_ac97_template ac97;
1526 	struct snd_ac97_bus *pbus;
1527 	static struct snd_ac97_bus_ops con_ops = {
1528 		.write = snd_ice1712_ac97_write,
1529 		.read = snd_ice1712_ac97_read,
1530 	};
1531 	static struct snd_ac97_bus_ops pro_ops = {
1532 		.write = snd_ice1712_pro_ac97_write,
1533 		.read = snd_ice1712_pro_ac97_read,
1534 	};
1535 
1536 	if (ice_has_con_ac97(ice)) {
1537 		err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1538 		if (err < 0)
1539 			return err;
1540 		memset(&ac97, 0, sizeof(ac97));
1541 		ac97.private_data = ice;
1542 		ac97.private_free = snd_ice1712_mixer_free_ac97;
1543 		err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1544 		if (err < 0)
1545 			dev_warn(ice->card->dev,
1546 				 "cannot initialize ac97 for consumer, skipped\n");
1547 		else {
1548 			err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1549 			if (err < 0)
1550 				return err;
1551 			return 0;
1552 		}
1553 	}
1554 
1555 	if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1556 		err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1557 		if (err < 0)
1558 			return err;
1559 		memset(&ac97, 0, sizeof(ac97));
1560 		ac97.private_data = ice;
1561 		ac97.private_free = snd_ice1712_mixer_free_ac97;
1562 		err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1563 		if (err < 0)
1564 			dev_warn(ice->card->dev,
1565 				 "cannot initialize pro ac97, skipped\n");
1566 		else
1567 			return 0;
1568 	}
1569 	/* I2S mixer only */
1570 	strcat(ice->card->mixername, "ICE1712 - multitrack");
1571 	return 0;
1572 }
1573 
1574 /*
1575  *
1576  */
1577 
1578 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1579 {
1580 	return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1581 }
1582 
1583 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1584 				  struct snd_info_buffer *buffer)
1585 {
1586 	struct snd_ice1712 *ice = entry->private_data;
1587 	unsigned int idx;
1588 
1589 	snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1590 	snd_iprintf(buffer, "EEPROM:\n");
1591 
1592 	snd_iprintf(buffer, "  Subvendor        : 0x%x\n", ice->eeprom.subvendor);
1593 	snd_iprintf(buffer, "  Size             : %i bytes\n", ice->eeprom.size);
1594 	snd_iprintf(buffer, "  Version          : %i\n", ice->eeprom.version);
1595 	snd_iprintf(buffer, "  Codec            : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1596 	snd_iprintf(buffer, "  ACLink           : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1597 	snd_iprintf(buffer, "  I2S ID           : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1598 	snd_iprintf(buffer, "  S/PDIF           : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1599 	snd_iprintf(buffer, "  GPIO mask        : 0x%x\n", ice->eeprom.gpiomask);
1600 	snd_iprintf(buffer, "  GPIO state       : 0x%x\n", ice->eeprom.gpiostate);
1601 	snd_iprintf(buffer, "  GPIO direction   : 0x%x\n", ice->eeprom.gpiodir);
1602 	snd_iprintf(buffer, "  AC'97 main       : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1603 	snd_iprintf(buffer, "  AC'97 pcm        : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1604 	snd_iprintf(buffer, "  AC'97 record     : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1605 	snd_iprintf(buffer, "  AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1606 	for (idx = 0; idx < 4; idx++)
1607 		snd_iprintf(buffer, "  DAC ID #%i        : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1608 	for (idx = 0; idx < 4; idx++)
1609 		snd_iprintf(buffer, "  ADC ID #%i        : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1610 	for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1611 		snd_iprintf(buffer, "  Extra #%02i        : 0x%x\n", idx, ice->eeprom.data[idx]);
1612 
1613 	snd_iprintf(buffer, "\nRegisters:\n");
1614 	snd_iprintf(buffer, "  PSDOUT03         : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1615 	snd_iprintf(buffer, "  CAPTURE          : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1616 	snd_iprintf(buffer, "  SPDOUT           : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1617 	snd_iprintf(buffer, "  RATE             : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1618 	snd_iprintf(buffer, "  GPIO_DATA        : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1619 	snd_iprintf(buffer, "  GPIO_WRITE_MASK  : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1620 	snd_iprintf(buffer, "  GPIO_DIRECTION   : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1621 }
1622 
1623 static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1624 {
1625 	struct snd_info_entry *entry;
1626 
1627 	if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1628 		snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1629 }
1630 
1631 /*
1632  *
1633  */
1634 
1635 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1636 				   struct snd_ctl_elem_info *uinfo)
1637 {
1638 	uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1639 	uinfo->count = sizeof(struct snd_ice1712_eeprom);
1640 	return 0;
1641 }
1642 
1643 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1644 				  struct snd_ctl_elem_value *ucontrol)
1645 {
1646 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1647 
1648 	memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1649 	return 0;
1650 }
1651 
1652 static struct snd_kcontrol_new snd_ice1712_eeprom = {
1653 	.iface = SNDRV_CTL_ELEM_IFACE_CARD,
1654 	.name = "ICE1712 EEPROM",
1655 	.access = SNDRV_CTL_ELEM_ACCESS_READ,
1656 	.info = snd_ice1712_eeprom_info,
1657 	.get = snd_ice1712_eeprom_get
1658 };
1659 
1660 /*
1661  */
1662 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1663 				  struct snd_ctl_elem_info *uinfo)
1664 {
1665 	uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1666 	uinfo->count = 1;
1667 	return 0;
1668 }
1669 
1670 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1671 					 struct snd_ctl_elem_value *ucontrol)
1672 {
1673 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1674 	if (ice->spdif.ops.default_get)
1675 		ice->spdif.ops.default_get(ice, ucontrol);
1676 	return 0;
1677 }
1678 
1679 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1680 					 struct snd_ctl_elem_value *ucontrol)
1681 {
1682 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1683 	if (ice->spdif.ops.default_put)
1684 		return ice->spdif.ops.default_put(ice, ucontrol);
1685 	return 0;
1686 }
1687 
1688 static struct snd_kcontrol_new snd_ice1712_spdif_default =
1689 {
1690 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1691 	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1692 	.info =		snd_ice1712_spdif_info,
1693 	.get =		snd_ice1712_spdif_default_get,
1694 	.put =		snd_ice1712_spdif_default_put
1695 };
1696 
1697 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1698 				       struct snd_ctl_elem_value *ucontrol)
1699 {
1700 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1701 	if (ice->spdif.ops.default_get) {
1702 		ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1703 						     IEC958_AES0_PROFESSIONAL |
1704 						     IEC958_AES0_CON_NOT_COPYRIGHT |
1705 						     IEC958_AES0_CON_EMPHASIS;
1706 		ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1707 						     IEC958_AES1_CON_CATEGORY;
1708 		ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1709 	} else {
1710 		ucontrol->value.iec958.status[0] = 0xff;
1711 		ucontrol->value.iec958.status[1] = 0xff;
1712 		ucontrol->value.iec958.status[2] = 0xff;
1713 		ucontrol->value.iec958.status[3] = 0xff;
1714 		ucontrol->value.iec958.status[4] = 0xff;
1715 	}
1716 	return 0;
1717 }
1718 
1719 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1720 				       struct snd_ctl_elem_value *ucontrol)
1721 {
1722 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1723 	if (ice->spdif.ops.default_get) {
1724 		ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1725 						     IEC958_AES0_PROFESSIONAL |
1726 						     IEC958_AES0_PRO_FS |
1727 						     IEC958_AES0_PRO_EMPHASIS;
1728 		ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1729 	} else {
1730 		ucontrol->value.iec958.status[0] = 0xff;
1731 		ucontrol->value.iec958.status[1] = 0xff;
1732 		ucontrol->value.iec958.status[2] = 0xff;
1733 		ucontrol->value.iec958.status[3] = 0xff;
1734 		ucontrol->value.iec958.status[4] = 0xff;
1735 	}
1736 	return 0;
1737 }
1738 
1739 static struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1740 {
1741 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1742 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1743 	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1744 	.info =		snd_ice1712_spdif_info,
1745 	.get =		snd_ice1712_spdif_maskc_get,
1746 };
1747 
1748 static struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1749 {
1750 	.access =	SNDRV_CTL_ELEM_ACCESS_READ,
1751 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1752 	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1753 	.info =		snd_ice1712_spdif_info,
1754 	.get =		snd_ice1712_spdif_maskp_get,
1755 };
1756 
1757 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1758 					struct snd_ctl_elem_value *ucontrol)
1759 {
1760 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1761 	if (ice->spdif.ops.stream_get)
1762 		ice->spdif.ops.stream_get(ice, ucontrol);
1763 	return 0;
1764 }
1765 
1766 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1767 					struct snd_ctl_elem_value *ucontrol)
1768 {
1769 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1770 	if (ice->spdif.ops.stream_put)
1771 		return ice->spdif.ops.stream_put(ice, ucontrol);
1772 	return 0;
1773 }
1774 
1775 static struct snd_kcontrol_new snd_ice1712_spdif_stream =
1776 {
1777 	.access =	(SNDRV_CTL_ELEM_ACCESS_READWRITE |
1778 			 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1779 	.iface =	SNDRV_CTL_ELEM_IFACE_PCM,
1780 	.name =         SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1781 	.info =		snd_ice1712_spdif_info,
1782 	.get =		snd_ice1712_spdif_stream_get,
1783 	.put =		snd_ice1712_spdif_stream_put
1784 };
1785 
1786 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1787 			 struct snd_ctl_elem_value *ucontrol)
1788 {
1789 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1790 	unsigned char mask = kcontrol->private_value & 0xff;
1791 	int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1792 
1793 	snd_ice1712_save_gpio_status(ice);
1794 	ucontrol->value.integer.value[0] =
1795 		(snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1796 	snd_ice1712_restore_gpio_status(ice);
1797 	return 0;
1798 }
1799 
1800 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1801 			 struct snd_ctl_elem_value *ucontrol)
1802 {
1803 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1804 	unsigned char mask = kcontrol->private_value & 0xff;
1805 	int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1806 	unsigned int val, nval;
1807 
1808 	if (kcontrol->private_value & (1 << 31))
1809 		return -EPERM;
1810 	nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1811 	snd_ice1712_save_gpio_status(ice);
1812 	val = snd_ice1712_gpio_read(ice);
1813 	nval |= val & ~mask;
1814 	if (val != nval)
1815 		snd_ice1712_gpio_write(ice, nval);
1816 	snd_ice1712_restore_gpio_status(ice);
1817 	return val != nval;
1818 }
1819 
1820 /*
1821  *  rate
1822  */
1823 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1824 					       struct snd_ctl_elem_info *uinfo)
1825 {
1826 	static const char * const texts[] = {
1827 		"8000",		/* 0: 6 */
1828 		"9600",		/* 1: 3 */
1829 		"11025",	/* 2: 10 */
1830 		"12000",	/* 3: 2 */
1831 		"16000",	/* 4: 5 */
1832 		"22050",	/* 5: 9 */
1833 		"24000",	/* 6: 1 */
1834 		"32000",	/* 7: 4 */
1835 		"44100",	/* 8: 8 */
1836 		"48000",	/* 9: 0 */
1837 		"64000",	/* 10: 15 */
1838 		"88200",	/* 11: 11 */
1839 		"96000",	/* 12: 7 */
1840 		"IEC958 Input",	/* 13: -- */
1841 	};
1842 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1843 	uinfo->count = 1;
1844 	uinfo->value.enumerated.items = 14;
1845 	if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1846 		uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1847 	strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1848 	return 0;
1849 }
1850 
1851 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1852 					      struct snd_ctl_elem_value *ucontrol)
1853 {
1854 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1855 	static const unsigned char xlate[16] = {
1856 		9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1857 	};
1858 	unsigned char val;
1859 
1860 	spin_lock_irq(&ice->reg_lock);
1861 	if (is_spdif_master(ice)) {
1862 		ucontrol->value.enumerated.item[0] = 13;
1863 	} else {
1864 		val = xlate[inb(ICEMT(ice, RATE)) & 15];
1865 		if (val == 255) {
1866 			snd_BUG();
1867 			val = 0;
1868 		}
1869 		ucontrol->value.enumerated.item[0] = val;
1870 	}
1871 	spin_unlock_irq(&ice->reg_lock);
1872 	return 0;
1873 }
1874 
1875 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1876 					      struct snd_ctl_elem_value *ucontrol)
1877 {
1878 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1879 	static const unsigned int xrate[13] = {
1880 		8000, 9600, 11025, 12000, 16000, 22050, 24000,
1881 		32000, 44100, 48000, 64000, 88200, 96000
1882 	};
1883 	unsigned char oval;
1884 	int change = 0;
1885 
1886 	spin_lock_irq(&ice->reg_lock);
1887 	oval = inb(ICEMT(ice, RATE));
1888 	if (ucontrol->value.enumerated.item[0] == 13) {
1889 		outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1890 	} else {
1891 		PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1892 		spin_unlock_irq(&ice->reg_lock);
1893 		snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1894 		spin_lock_irq(&ice->reg_lock);
1895 	}
1896 	change = inb(ICEMT(ice, RATE)) != oval;
1897 	spin_unlock_irq(&ice->reg_lock);
1898 
1899 	if ((oval & ICE1712_SPDIF_MASTER) !=
1900 	    (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1901 		snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1902 
1903 	return change;
1904 }
1905 
1906 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1907 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1908 	.name = "Multi Track Internal Clock",
1909 	.info = snd_ice1712_pro_internal_clock_info,
1910 	.get = snd_ice1712_pro_internal_clock_get,
1911 	.put = snd_ice1712_pro_internal_clock_put
1912 };
1913 
1914 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1915 						       struct snd_ctl_elem_info *uinfo)
1916 {
1917 	static const char * const texts[] = {
1918 		"8000",		/* 0: 6 */
1919 		"9600",		/* 1: 3 */
1920 		"11025",	/* 2: 10 */
1921 		"12000",	/* 3: 2 */
1922 		"16000",	/* 4: 5 */
1923 		"22050",	/* 5: 9 */
1924 		"24000",	/* 6: 1 */
1925 		"32000",	/* 7: 4 */
1926 		"44100",	/* 8: 8 */
1927 		"48000",	/* 9: 0 */
1928 		"64000",	/* 10: 15 */
1929 		"88200",	/* 11: 11 */
1930 		"96000",	/* 12: 7 */
1931 		/* "IEC958 Input",	13: -- */
1932 	};
1933 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1934 	uinfo->count = 1;
1935 	uinfo->value.enumerated.items = 13;
1936 	if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1937 		uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1938 	strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1939 	return 0;
1940 }
1941 
1942 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1943 						      struct snd_ctl_elem_value *ucontrol)
1944 {
1945 	int val;
1946 	static const unsigned int xrate[13] = {
1947 		8000, 9600, 11025, 12000, 16000, 22050, 24000,
1948 		32000, 44100, 48000, 64000, 88200, 96000
1949 	};
1950 
1951 	for (val = 0; val < 13; val++) {
1952 		if (xrate[val] == PRO_RATE_DEFAULT)
1953 			break;
1954 	}
1955 
1956 	ucontrol->value.enumerated.item[0] = val;
1957 	return 0;
1958 }
1959 
1960 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1961 						      struct snd_ctl_elem_value *ucontrol)
1962 {
1963 	static const unsigned int xrate[13] = {
1964 		8000, 9600, 11025, 12000, 16000, 22050, 24000,
1965 		32000, 44100, 48000, 64000, 88200, 96000
1966 	};
1967 	unsigned char oval;
1968 	int change = 0;
1969 
1970 	oval = PRO_RATE_DEFAULT;
1971 	PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1972 	change = PRO_RATE_DEFAULT != oval;
1973 
1974 	return change;
1975 }
1976 
1977 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1978 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1979 	.name = "Multi Track Internal Clock Default",
1980 	.info = snd_ice1712_pro_internal_clock_default_info,
1981 	.get = snd_ice1712_pro_internal_clock_default_get,
1982 	.put = snd_ice1712_pro_internal_clock_default_put
1983 };
1984 
1985 #define snd_ice1712_pro_rate_locking_info	snd_ctl_boolean_mono_info
1986 
1987 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1988 					    struct snd_ctl_elem_value *ucontrol)
1989 {
1990 	ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1991 	return 0;
1992 }
1993 
1994 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1995 					    struct snd_ctl_elem_value *ucontrol)
1996 {
1997 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1998 	int change = 0, nval;
1999 
2000 	nval = ucontrol->value.integer.value[0] ? 1 : 0;
2001 	spin_lock_irq(&ice->reg_lock);
2002 	change = PRO_RATE_LOCKED != nval;
2003 	PRO_RATE_LOCKED = nval;
2004 	spin_unlock_irq(&ice->reg_lock);
2005 	return change;
2006 }
2007 
2008 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
2009 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2010 	.name = "Multi Track Rate Locking",
2011 	.info = snd_ice1712_pro_rate_locking_info,
2012 	.get = snd_ice1712_pro_rate_locking_get,
2013 	.put = snd_ice1712_pro_rate_locking_put
2014 };
2015 
2016 #define snd_ice1712_pro_rate_reset_info		snd_ctl_boolean_mono_info
2017 
2018 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2019 					  struct snd_ctl_elem_value *ucontrol)
2020 {
2021 	ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2022 	return 0;
2023 }
2024 
2025 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2026 					  struct snd_ctl_elem_value *ucontrol)
2027 {
2028 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2029 	int change = 0, nval;
2030 
2031 	nval = ucontrol->value.integer.value[0] ? 1 : 0;
2032 	spin_lock_irq(&ice->reg_lock);
2033 	change = PRO_RATE_RESET != nval;
2034 	PRO_RATE_RESET = nval;
2035 	spin_unlock_irq(&ice->reg_lock);
2036 	return change;
2037 }
2038 
2039 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
2040 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2041 	.name = "Multi Track Rate Reset",
2042 	.info = snd_ice1712_pro_rate_reset_info,
2043 	.get = snd_ice1712_pro_rate_reset_get,
2044 	.put = snd_ice1712_pro_rate_reset_put
2045 };
2046 
2047 /*
2048  * routing
2049  */
2050 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2051 				      struct snd_ctl_elem_info *uinfo)
2052 {
2053 	static const char * const texts[] = {
2054 		"PCM Out", /* 0 */
2055 		"H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2056 		"H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2057 		"IEC958 In L", "IEC958 In R", /* 9-10 */
2058 		"Digital Mixer", /* 11 - optional */
2059 	};
2060 
2061 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2062 	uinfo->count = 1;
2063 	uinfo->value.enumerated.items =
2064 		snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2065 	if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2066 		uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2067 	strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2068 	return 0;
2069 }
2070 
2071 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2072 					    struct snd_ctl_elem_value *ucontrol)
2073 {
2074 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2075 	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2076 	unsigned int val, cval;
2077 
2078 	spin_lock_irq(&ice->reg_lock);
2079 	val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2080 	cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2081 	spin_unlock_irq(&ice->reg_lock);
2082 
2083 	val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2084 	val &= 3;
2085 	cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2086 	if (val == 1 && idx < 2)
2087 		ucontrol->value.enumerated.item[0] = 11;
2088 	else if (val == 2)
2089 		ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2090 	else if (val == 3)
2091 		ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2092 	else
2093 		ucontrol->value.enumerated.item[0] = 0;
2094 	return 0;
2095 }
2096 
2097 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2098 					    struct snd_ctl_elem_value *ucontrol)
2099 {
2100 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2101 	int change, shift;
2102 	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2103 	unsigned int val, old_val, nval;
2104 
2105 	/* update PSDOUT */
2106 	if (ucontrol->value.enumerated.item[0] >= 11)
2107 		nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2108 	else if (ucontrol->value.enumerated.item[0] >= 9)
2109 		nval = 3; /* spdif in */
2110 	else if (ucontrol->value.enumerated.item[0] >= 1)
2111 		nval = 2; /* analog in */
2112 	else
2113 		nval = 0; /* pcm */
2114 	shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2115 	spin_lock_irq(&ice->reg_lock);
2116 	val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2117 	val &= ~(0x03 << shift);
2118 	val |= nval << shift;
2119 	change = val != old_val;
2120 	if (change)
2121 		outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2122 	spin_unlock_irq(&ice->reg_lock);
2123 	if (nval < 2) /* dig mixer of pcm */
2124 		return change;
2125 
2126 	/* update CAPTURE */
2127 	spin_lock_irq(&ice->reg_lock);
2128 	val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2129 	shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2130 	if (nval == 2) { /* analog in */
2131 		nval = ucontrol->value.enumerated.item[0] - 1;
2132 		val &= ~(0x07 << shift);
2133 		val |= nval << shift;
2134 	} else { /* spdif in */
2135 		nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2136 		val &= ~(0x08 << shift);
2137 		val |= nval << shift;
2138 	}
2139 	if (val != old_val) {
2140 		change = 1;
2141 		outl(val, ICEMT(ice, ROUTE_CAPTURE));
2142 	}
2143 	spin_unlock_irq(&ice->reg_lock);
2144 	return change;
2145 }
2146 
2147 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2148 					   struct snd_ctl_elem_value *ucontrol)
2149 {
2150 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2151 	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2152 	unsigned int val, cval;
2153 	val = inw(ICEMT(ice, ROUTE_SPDOUT));
2154 	cval = (val >> (idx * 4 + 8)) & 0x0f;
2155 	val = (val >> (idx * 2)) & 0x03;
2156 	if (val == 1)
2157 		ucontrol->value.enumerated.item[0] = 11;
2158 	else if (val == 2)
2159 		ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2160 	else if (val == 3)
2161 		ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2162 	else
2163 		ucontrol->value.enumerated.item[0] = 0;
2164 	return 0;
2165 }
2166 
2167 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2168 					   struct snd_ctl_elem_value *ucontrol)
2169 {
2170 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2171 	int change, shift;
2172 	int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2173 	unsigned int val, old_val, nval;
2174 
2175 	/* update SPDOUT */
2176 	spin_lock_irq(&ice->reg_lock);
2177 	val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2178 	if (ucontrol->value.enumerated.item[0] >= 11)
2179 		nval = 1;
2180 	else if (ucontrol->value.enumerated.item[0] >= 9)
2181 		nval = 3;
2182 	else if (ucontrol->value.enumerated.item[0] >= 1)
2183 		nval = 2;
2184 	else
2185 		nval = 0;
2186 	shift = idx * 2;
2187 	val &= ~(0x03 << shift);
2188 	val |= nval << shift;
2189 	shift = idx * 4 + 8;
2190 	if (nval == 2) {
2191 		nval = ucontrol->value.enumerated.item[0] - 1;
2192 		val &= ~(0x07 << shift);
2193 		val |= nval << shift;
2194 	} else if (nval == 3) {
2195 		nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2196 		val &= ~(0x08 << shift);
2197 		val |= nval << shift;
2198 	}
2199 	change = val != old_val;
2200 	if (change)
2201 		outw(val, ICEMT(ice, ROUTE_SPDOUT));
2202 	spin_unlock_irq(&ice->reg_lock);
2203 	return change;
2204 }
2205 
2206 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
2207 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2208 	.name = "H/W Playback Route",
2209 	.info = snd_ice1712_pro_route_info,
2210 	.get = snd_ice1712_pro_route_analog_get,
2211 	.put = snd_ice1712_pro_route_analog_put,
2212 };
2213 
2214 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
2215 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2216 	.name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2217 	.info = snd_ice1712_pro_route_info,
2218 	.get = snd_ice1712_pro_route_spdif_get,
2219 	.put = snd_ice1712_pro_route_spdif_put,
2220 	.count = 2,
2221 };
2222 
2223 
2224 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2225 					    struct snd_ctl_elem_info *uinfo)
2226 {
2227 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2228 	uinfo->count = 1;
2229 	uinfo->value.integer.min = 0;
2230 	uinfo->value.integer.max = 255;
2231 	return 0;
2232 }
2233 
2234 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2235 					   struct snd_ctl_elem_value *ucontrol)
2236 {
2237 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2238 
2239 	ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2240 	return 0;
2241 }
2242 
2243 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2244 					   struct snd_ctl_elem_value *ucontrol)
2245 {
2246 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2247 	int change;
2248 
2249 	spin_lock_irq(&ice->reg_lock);
2250 	change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2251 	outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2252 	spin_unlock_irq(&ice->reg_lock);
2253 	return change;
2254 }
2255 
2256 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
2257 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2258 	.name = "Multi Track Volume Rate",
2259 	.info = snd_ice1712_pro_volume_rate_info,
2260 	.get = snd_ice1712_pro_volume_rate_get,
2261 	.put = snd_ice1712_pro_volume_rate_put
2262 };
2263 
2264 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2265 				     struct snd_ctl_elem_info *uinfo)
2266 {
2267 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2268 	uinfo->count = 22;
2269 	uinfo->value.integer.min = 0;
2270 	uinfo->value.integer.max = 255;
2271 	return 0;
2272 }
2273 
2274 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2275 				    struct snd_ctl_elem_value *ucontrol)
2276 {
2277 	struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2278 	int idx;
2279 
2280 	spin_lock_irq(&ice->reg_lock);
2281 	for (idx = 0; idx < 22; idx++) {
2282 		outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2283 		ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2284 	}
2285 	spin_unlock_irq(&ice->reg_lock);
2286 	return 0;
2287 }
2288 
2289 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2290 	.iface = SNDRV_CTL_ELEM_IFACE_PCM,
2291 	.name = "Multi Track Peak",
2292 	.access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2293 	.info = snd_ice1712_pro_peak_info,
2294 	.get = snd_ice1712_pro_peak_get
2295 };
2296 
2297 /*
2298  *
2299  */
2300 
2301 /*
2302  * list of available boards
2303  */
2304 static struct snd_ice1712_card_info *card_tables[] = {
2305 	snd_ice1712_hoontech_cards,
2306 	snd_ice1712_delta_cards,
2307 	snd_ice1712_ews_cards,
2308 	NULL,
2309 };
2310 
2311 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2312 					  unsigned char dev,
2313 					  unsigned char addr)
2314 {
2315 	long t = 0x10000;
2316 
2317 	outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2318 	outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2319 	while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2320 	return inb(ICEREG(ice, I2C_DATA));
2321 }
2322 
2323 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2324 				   const char *modelname)
2325 {
2326 	int dev = 0xa0;		/* EEPROM device address */
2327 	unsigned int i, size;
2328 	struct snd_ice1712_card_info * const *tbl, *c;
2329 
2330 	if (!modelname || !*modelname) {
2331 		ice->eeprom.subvendor = 0;
2332 		if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2333 			ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2334 				(snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2335 				(snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2336 				(snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2337 		if (ice->eeprom.subvendor == 0 ||
2338 		    ice->eeprom.subvendor == (unsigned int)-1) {
2339 			/* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2340 			u16 vendor, device;
2341 			pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2342 			pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2343 			ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2344 			if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2345 				dev_err(ice->card->dev,
2346 					"No valid ID is found\n");
2347 				return -ENXIO;
2348 			}
2349 		}
2350 	}
2351 	for (tbl = card_tables; *tbl; tbl++) {
2352 		for (c = *tbl; c->subvendor; c++) {
2353 			if (modelname && c->model && !strcmp(modelname, c->model)) {
2354 				dev_info(ice->card->dev,
2355 					 "Using board model %s\n", c->name);
2356 				ice->eeprom.subvendor = c->subvendor;
2357 			} else if (c->subvendor != ice->eeprom.subvendor)
2358 				continue;
2359 			if (!c->eeprom_size || !c->eeprom_data)
2360 				goto found;
2361 			/* if the EEPROM is given by the driver, use it */
2362 			dev_dbg(ice->card->dev, "using the defined eeprom..\n");
2363 			ice->eeprom.version = 1;
2364 			ice->eeprom.size = c->eeprom_size + 6;
2365 			memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2366 			goto read_skipped;
2367 		}
2368 	}
2369 	dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n",
2370 	       ice->eeprom.subvendor);
2371 
2372  found:
2373 	ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2374 	if (ice->eeprom.size < 6)
2375 		ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2376 	else if (ice->eeprom.size > 32) {
2377 		dev_err(ice->card->dev,
2378 			"invalid EEPROM (size = %i)\n", ice->eeprom.size);
2379 		return -EIO;
2380 	}
2381 	ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2382 	if (ice->eeprom.version != 1) {
2383 		dev_err(ice->card->dev, "invalid EEPROM version %i\n",
2384 			   ice->eeprom.version);
2385 		/* return -EIO; */
2386 	}
2387 	size = ice->eeprom.size - 6;
2388 	for (i = 0; i < size; i++)
2389 		ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2390 
2391  read_skipped:
2392 	ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2393 	ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2394 	ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2395 
2396 	return 0;
2397 }
2398 
2399 
2400 
2401 static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
2402 {
2403 	outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2404 	udelay(200);
2405 	outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2406 	udelay(200);
2407 	if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2408 	    !ice->dxr_enable)
2409 		/*  Set eeprom value to limit active ADCs and DACs to 6;
2410 		 *  Also disable AC97 as no hardware in standard 6fire card/box
2411 		 *  Note: DXR extensions are not currently supported
2412 		 */
2413 		ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2414 	pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2415 	pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2416 	pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2417 	pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2418 	if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2419 		ice->gpio.write_mask = ice->eeprom.gpiomask;
2420 		ice->gpio.direction = ice->eeprom.gpiodir;
2421 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2422 				  ice->eeprom.gpiomask);
2423 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2424 				  ice->eeprom.gpiodir);
2425 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2426 				  ice->eeprom.gpiostate);
2427 	} else {
2428 		ice->gpio.write_mask = 0xc0;
2429 		ice->gpio.direction = 0xff;
2430 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2431 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2432 		snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2433 				  ICE1712_STDSP24_CLOCK_BIT);
2434 	}
2435 	snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2436 	if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2437 		outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2438 		udelay(100);
2439 		outb(0, ICEREG(ice, AC97_CMD));
2440 		udelay(200);
2441 		snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2442 	}
2443 	snd_ice1712_set_pro_rate(ice, 48000, 1);
2444 	/* unmask used interrupts */
2445 	outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2446 	      ICE1712_IRQ_MPU2 : 0) |
2447 	     ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2448 	      ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2449 	     ICEREG(ice, IRQMASK));
2450 	outb(0x00, ICEMT(ice, IRQ));
2451 
2452 	return 0;
2453 }
2454 
2455 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2456 {
2457 	int err;
2458 	struct snd_kcontrol *kctl;
2459 
2460 	if (snd_BUG_ON(!ice->pcm_pro))
2461 		return -EIO;
2462 	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2463 	if (err < 0)
2464 		return err;
2465 	kctl->id.device = ice->pcm_pro->device;
2466 	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2467 	if (err < 0)
2468 		return err;
2469 	kctl->id.device = ice->pcm_pro->device;
2470 	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2471 	if (err < 0)
2472 		return err;
2473 	kctl->id.device = ice->pcm_pro->device;
2474 	err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2475 	if (err < 0)
2476 		return err;
2477 	kctl->id.device = ice->pcm_pro->device;
2478 	ice->spdif.stream_ctl = kctl;
2479 	return 0;
2480 }
2481 
2482 
2483 static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
2484 {
2485 	int err;
2486 
2487 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2488 	if (err < 0)
2489 		return err;
2490 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2491 	if (err < 0)
2492 		return err;
2493 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2494 	if (err < 0)
2495 		return err;
2496 
2497 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2498 	if (err < 0)
2499 		return err;
2500 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2501 	if (err < 0)
2502 		return err;
2503 
2504 	if (ice->num_total_dacs > 0) {
2505 		struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2506 		tmp.count = ice->num_total_dacs;
2507 		err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2508 		if (err < 0)
2509 			return err;
2510 	}
2511 
2512 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2513 	if (err < 0)
2514 		return err;
2515 
2516 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2517 	if (err < 0)
2518 		return err;
2519 	err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2520 	if (err < 0)
2521 		return err;
2522 
2523 	return 0;
2524 }
2525 
2526 static int snd_ice1712_free(struct snd_ice1712 *ice)
2527 {
2528 	if (!ice->port)
2529 		goto __hw_end;
2530 	/* mask all interrupts */
2531 	outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ));
2532 	outb(0xff, ICEREG(ice, IRQMASK));
2533 	/* --- */
2534 __hw_end:
2535 	if (ice->irq >= 0)
2536 		free_irq(ice->irq, ice);
2537 
2538 	if (ice->port)
2539 		pci_release_regions(ice->pci);
2540 	snd_ice1712_akm4xxx_free(ice);
2541 	pci_disable_device(ice->pci);
2542 	kfree(ice->spec);
2543 	kfree(ice);
2544 	return 0;
2545 }
2546 
2547 static int snd_ice1712_dev_free(struct snd_device *device)
2548 {
2549 	struct snd_ice1712 *ice = device->device_data;
2550 	return snd_ice1712_free(ice);
2551 }
2552 
2553 static int snd_ice1712_create(struct snd_card *card,
2554 			      struct pci_dev *pci,
2555 			      const char *modelname,
2556 			      int omni,
2557 			      int cs8427_timeout,
2558 			      int dxr_enable,
2559 			      struct snd_ice1712 **r_ice1712)
2560 {
2561 	struct snd_ice1712 *ice;
2562 	int err;
2563 	static struct snd_device_ops ops = {
2564 		.dev_free =	snd_ice1712_dev_free,
2565 	};
2566 
2567 	*r_ice1712 = NULL;
2568 
2569 	/* enable PCI device */
2570 	err = pci_enable_device(pci);
2571 	if (err < 0)
2572 		return err;
2573 	/* check, if we can restrict PCI DMA transfers to 28 bits */
2574 	if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2575 	    pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2576 		dev_err(card->dev,
2577 			"architecture does not support 28bit PCI busmaster DMA\n");
2578 		pci_disable_device(pci);
2579 		return -ENXIO;
2580 	}
2581 
2582 	ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2583 	if (ice == NULL) {
2584 		pci_disable_device(pci);
2585 		return -ENOMEM;
2586 	}
2587 	ice->omni = omni ? 1 : 0;
2588 	if (cs8427_timeout < 1)
2589 		cs8427_timeout = 1;
2590 	else if (cs8427_timeout > 1000)
2591 		cs8427_timeout = 1000;
2592 	ice->cs8427_timeout = cs8427_timeout;
2593 	ice->dxr_enable = dxr_enable;
2594 	spin_lock_init(&ice->reg_lock);
2595 	mutex_init(&ice->gpio_mutex);
2596 	mutex_init(&ice->i2c_mutex);
2597 	mutex_init(&ice->open_mutex);
2598 	ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2599 	ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2600 	ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2601 	ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2602 	ice->gpio.set_data = snd_ice1712_set_gpio_data;
2603 	ice->gpio.get_data = snd_ice1712_get_gpio_data;
2604 
2605 	ice->spdif.cs8403_bits =
2606 		ice->spdif.cs8403_stream_bits = (0x01 |	/* consumer format */
2607 						 0x10 |	/* no emphasis */
2608 						 0x20);	/* PCM encoder/decoder */
2609 	ice->card = card;
2610 	ice->pci = pci;
2611 	ice->irq = -1;
2612 	pci_set_master(pci);
2613 	/* disable legacy emulation */
2614 	pci_write_config_word(ice->pci, 0x40, 0x807f);
2615 	pci_write_config_word(ice->pci, 0x42, 0x0006);
2616 	snd_ice1712_proc_init(ice);
2617 	synchronize_irq(pci->irq);
2618 
2619 	card->private_data = ice;
2620 
2621 	err = pci_request_regions(pci, "ICE1712");
2622 	if (err < 0) {
2623 		kfree(ice);
2624 		pci_disable_device(pci);
2625 		return err;
2626 	}
2627 	ice->port = pci_resource_start(pci, 0);
2628 	ice->ddma_port = pci_resource_start(pci, 1);
2629 	ice->dmapath_port = pci_resource_start(pci, 2);
2630 	ice->profi_port = pci_resource_start(pci, 3);
2631 
2632 	if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2633 			KBUILD_MODNAME, ice)) {
2634 		dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2635 		snd_ice1712_free(ice);
2636 		return -EIO;
2637 	}
2638 
2639 	ice->irq = pci->irq;
2640 
2641 	if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2642 		snd_ice1712_free(ice);
2643 		return -EIO;
2644 	}
2645 	if (snd_ice1712_chip_init(ice) < 0) {
2646 		snd_ice1712_free(ice);
2647 		return -EIO;
2648 	}
2649 
2650 	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2651 	if (err < 0) {
2652 		snd_ice1712_free(ice);
2653 		return err;
2654 	}
2655 
2656 	*r_ice1712 = ice;
2657 	return 0;
2658 }
2659 
2660 
2661 /*
2662  *
2663  * Registration
2664  *
2665  */
2666 
2667 static struct snd_ice1712_card_info no_matched;
2668 
2669 static int snd_ice1712_probe(struct pci_dev *pci,
2670 			     const struct pci_device_id *pci_id)
2671 {
2672 	static int dev;
2673 	struct snd_card *card;
2674 	struct snd_ice1712 *ice;
2675 	int pcm_dev = 0, err;
2676 	struct snd_ice1712_card_info * const *tbl, *c;
2677 
2678 	if (dev >= SNDRV_CARDS)
2679 		return -ENODEV;
2680 	if (!enable[dev]) {
2681 		dev++;
2682 		return -ENOENT;
2683 	}
2684 
2685 	err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2686 			   0, &card);
2687 	if (err < 0)
2688 		return err;
2689 
2690 	strcpy(card->driver, "ICE1712");
2691 	strcpy(card->shortname, "ICEnsemble ICE1712");
2692 
2693 	err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2694 		cs8427_timeout[dev], dxr_enable[dev], &ice);
2695 	if (err < 0) {
2696 		snd_card_free(card);
2697 		return err;
2698 	}
2699 
2700 	for (tbl = card_tables; *tbl; tbl++) {
2701 		for (c = *tbl; c->subvendor; c++) {
2702 			if (c->subvendor == ice->eeprom.subvendor) {
2703 				ice->card_info = c;
2704 				strcpy(card->shortname, c->name);
2705 				if (c->driver) /* specific driver? */
2706 					strcpy(card->driver, c->driver);
2707 				if (c->chip_init) {
2708 					err = c->chip_init(ice);
2709 					if (err < 0) {
2710 						snd_card_free(card);
2711 						return err;
2712 					}
2713 				}
2714 				goto __found;
2715 			}
2716 		}
2717 	}
2718 	c = &no_matched;
2719  __found:
2720 
2721 	err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2722 	if (err < 0) {
2723 		snd_card_free(card);
2724 		return err;
2725 	}
2726 
2727 	if (ice_has_con_ac97(ice)) {
2728 		err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2729 		if (err < 0) {
2730 			snd_card_free(card);
2731 			return err;
2732 		}
2733 	}
2734 
2735 	err = snd_ice1712_ac97_mixer(ice);
2736 	if (err < 0) {
2737 		snd_card_free(card);
2738 		return err;
2739 	}
2740 
2741 	err = snd_ice1712_build_controls(ice);
2742 	if (err < 0) {
2743 		snd_card_free(card);
2744 		return err;
2745 	}
2746 
2747 	if (c->build_controls) {
2748 		err = c->build_controls(ice);
2749 		if (err < 0) {
2750 			snd_card_free(card);
2751 			return err;
2752 		}
2753 	}
2754 
2755 	if (ice_has_con_ac97(ice)) {
2756 		err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2757 		if (err < 0) {
2758 			snd_card_free(card);
2759 			return err;
2760 		}
2761 	}
2762 
2763 	if (!c->no_mpu401) {
2764 		err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2765 			ICEREG(ice, MPU1_CTRL),
2766 			c->mpu401_1_info_flags |
2767 			MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2768 			-1, &ice->rmidi[0]);
2769 		if (err < 0) {
2770 			snd_card_free(card);
2771 			return err;
2772 		}
2773 		if (c->mpu401_1_name)
2774 			/*  Preferred name available in card_info */
2775 			snprintf(ice->rmidi[0]->name,
2776 				 sizeof(ice->rmidi[0]->name),
2777 				 "%s %d", c->mpu401_1_name, card->number);
2778 
2779 		if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2780 			/*  2nd port used  */
2781 			err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2782 				ICEREG(ice, MPU2_CTRL),
2783 				c->mpu401_2_info_flags |
2784 				MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2785 				-1, &ice->rmidi[1]);
2786 
2787 			if (err < 0) {
2788 				snd_card_free(card);
2789 				return err;
2790 			}
2791 			if (c->mpu401_2_name)
2792 				/*  Preferred name available in card_info */
2793 				snprintf(ice->rmidi[1]->name,
2794 					 sizeof(ice->rmidi[1]->name),
2795 					 "%s %d", c->mpu401_2_name,
2796 					 card->number);
2797 		}
2798 	}
2799 
2800 	snd_ice1712_set_input_clock_source(ice, 0);
2801 
2802 	sprintf(card->longname, "%s at 0x%lx, irq %i",
2803 		card->shortname, ice->port, ice->irq);
2804 
2805 	err = snd_card_register(card);
2806 	if (err < 0) {
2807 		snd_card_free(card);
2808 		return err;
2809 	}
2810 	pci_set_drvdata(pci, card);
2811 	dev++;
2812 	return 0;
2813 }
2814 
2815 static void snd_ice1712_remove(struct pci_dev *pci)
2816 {
2817 	struct snd_card *card = pci_get_drvdata(pci);
2818 	struct snd_ice1712 *ice = card->private_data;
2819 
2820 	if (ice->card_info && ice->card_info->chip_exit)
2821 		ice->card_info->chip_exit(ice);
2822 	snd_card_free(card);
2823 }
2824 
2825 #ifdef CONFIG_PM_SLEEP
2826 static int snd_ice1712_suspend(struct device *dev)
2827 {
2828 	struct pci_dev *pci = to_pci_dev(dev);
2829 	struct snd_card *card = dev_get_drvdata(dev);
2830 	struct snd_ice1712 *ice = card->private_data;
2831 
2832 	if (!ice->pm_suspend_enabled)
2833 		return 0;
2834 
2835 	snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2836 
2837 	snd_pcm_suspend_all(ice->pcm);
2838 	snd_pcm_suspend_all(ice->pcm_pro);
2839 	snd_pcm_suspend_all(ice->pcm_ds);
2840 	snd_ac97_suspend(ice->ac97);
2841 
2842 	spin_lock_irq(&ice->reg_lock);
2843 	ice->pm_saved_is_spdif_master = is_spdif_master(ice);
2844 	ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT));
2845 	ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03));
2846 	spin_unlock_irq(&ice->reg_lock);
2847 
2848 	if (ice->pm_suspend)
2849 		ice->pm_suspend(ice);
2850 
2851 	pci_disable_device(pci);
2852 	pci_save_state(pci);
2853 	pci_set_power_state(pci, PCI_D3hot);
2854 	return 0;
2855 }
2856 
2857 static int snd_ice1712_resume(struct device *dev)
2858 {
2859 	struct pci_dev *pci = to_pci_dev(dev);
2860 	struct snd_card *card = dev_get_drvdata(dev);
2861 	struct snd_ice1712 *ice = card->private_data;
2862 	int rate;
2863 
2864 	if (!ice->pm_suspend_enabled)
2865 		return 0;
2866 
2867 	pci_set_power_state(pci, PCI_D0);
2868 	pci_restore_state(pci);
2869 
2870 	if (pci_enable_device(pci) < 0) {
2871 		snd_card_disconnect(card);
2872 		return -EIO;
2873 	}
2874 
2875 	pci_set_master(pci);
2876 
2877 	if (ice->cur_rate)
2878 		rate = ice->cur_rate;
2879 	else
2880 		rate = PRO_RATE_DEFAULT;
2881 
2882 	if (snd_ice1712_chip_init(ice) < 0) {
2883 		snd_card_disconnect(card);
2884 		return -EIO;
2885 	}
2886 
2887 	ice->cur_rate = rate;
2888 
2889 	if (ice->pm_resume)
2890 		ice->pm_resume(ice);
2891 
2892 	if (ice->pm_saved_is_spdif_master) {
2893 		/* switching to external clock via SPDIF */
2894 		spin_lock_irq(&ice->reg_lock);
2895 		outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER,
2896 			ICEMT(ice, RATE));
2897 		spin_unlock_irq(&ice->reg_lock);
2898 		snd_ice1712_set_input_clock_source(ice, 1);
2899 	} else {
2900 		/* internal on-card clock */
2901 		snd_ice1712_set_pro_rate(ice, rate, 1);
2902 		snd_ice1712_set_input_clock_source(ice, 0);
2903 	}
2904 
2905 	outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT));
2906 	outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03));
2907 
2908 	if (ice->ac97)
2909 		snd_ac97_resume(ice->ac97);
2910 
2911 	snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2912 	return 0;
2913 }
2914 
2915 static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume);
2916 #define SND_VT1712_PM_OPS	&snd_ice1712_pm
2917 #else
2918 #define SND_VT1712_PM_OPS	NULL
2919 #endif /* CONFIG_PM_SLEEP */
2920 
2921 static struct pci_driver ice1712_driver = {
2922 	.name = KBUILD_MODNAME,
2923 	.id_table = snd_ice1712_ids,
2924 	.probe = snd_ice1712_probe,
2925 	.remove = snd_ice1712_remove,
2926 	.driver = {
2927 		.pm = SND_VT1712_PM_OPS,
2928 	},
2929 };
2930 
2931 module_pci_driver(ice1712_driver);
2932