1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * 20 */ 21 22 /* 23 NOTES: 24 - spdif nonaudio consumer mode does not work (at least with my 25 Sony STR-DB830) 26 */ 27 28 /* 29 * Changes: 30 * 31 * 2002.09.09 Takashi Iwai <tiwai@suse.de> 32 * split the code to several files. each low-level routine 33 * is stored in the local file and called from registration 34 * function from card_info struct. 35 * 36 * 2002.11.26 James Stafford <jstafford@ampltd.com> 37 * Added support for VT1724 (Envy24HT) 38 * I have left out support for 176.4 and 192 KHz for the moment. 39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401 40 * 41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de> 42 * Split vt1724 part to an independent driver. 43 * The GPIO is accessed through the callback functions now. 44 * 45 * 2004.03.31 Doug McLain <nostar@comcast.net> 46 * Added support for Event Electronics EZ8 card to hoontech.c. 47 */ 48 49 50 #include <linux/delay.h> 51 #include <linux/interrupt.h> 52 #include <linux/init.h> 53 #include <linux/pci.h> 54 #include <linux/dma-mapping.h> 55 #include <linux/slab.h> 56 #include <linux/module.h> 57 #include <linux/mutex.h> 58 59 #include <sound/core.h> 60 #include <sound/cs8427.h> 61 #include <sound/info.h> 62 #include <sound/initval.h> 63 #include <sound/tlv.h> 64 65 #include <sound/asoundef.h> 66 67 #include "ice1712.h" 68 69 /* lowlevel routines */ 70 #include "delta.h" 71 #include "ews.h" 72 #include "hoontech.h" 73 74 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>"); 75 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)"); 76 MODULE_LICENSE("GPL"); 77 MODULE_SUPPORTED_DEVICE("{" 78 HOONTECH_DEVICE_DESC 79 DELTA_DEVICE_DESC 80 EWS_DEVICE_DESC 81 "{ICEnsemble,Generic ICE1712}," 82 "{ICEnsemble,Generic Envy24}}"); 83 84 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 85 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 86 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ 87 static char *model[SNDRV_CARDS]; 88 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */ 89 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */ 90 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */ 91 92 module_param_array(index, int, NULL, 0444); 93 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard."); 94 module_param_array(id, charp, NULL, 0444); 95 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard."); 96 module_param_array(enable, bool, NULL, 0444); 97 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard."); 98 module_param_array(omni, bool, NULL, 0444); 99 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support."); 100 module_param_array(cs8427_timeout, int, NULL, 0444); 101 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution."); 102 module_param_array(model, charp, NULL, 0444); 103 MODULE_PARM_DESC(model, "Use the given board model."); 104 module_param_array(dxr_enable, int, NULL, 0444); 105 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE."); 106 107 108 static const struct pci_device_id snd_ice1712_ids[] = { 109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */ 110 { 0, } 111 }; 112 113 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids); 114 115 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice); 116 static int snd_ice1712_build_controls(struct snd_ice1712 *ice); 117 118 static int PRO_RATE_LOCKED; 119 static int PRO_RATE_RESET = 1; 120 static unsigned int PRO_RATE_DEFAULT = 44100; 121 122 /* 123 * Basic I/O 124 */ 125 126 /* check whether the clock mode is spdif-in */ 127 static inline int is_spdif_master(struct snd_ice1712 *ice) 128 { 129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0; 130 } 131 132 static inline int is_pro_rate_locked(struct snd_ice1712 *ice) 133 { 134 return is_spdif_master(ice) || PRO_RATE_LOCKED; 135 } 136 137 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data) 138 { 139 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 140 outl(data, ICEDS(ice, DATA)); 141 } 142 143 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr) 144 { 145 outb((channel << 4) | addr, ICEDS(ice, INDEX)); 146 return inl(ICEDS(ice, DATA)); 147 } 148 149 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97, 150 unsigned short reg, 151 unsigned short val) 152 { 153 struct snd_ice1712 *ice = ac97->private_data; 154 int tm; 155 unsigned char old_cmd = 0; 156 157 for (tm = 0; tm < 0x10000; tm++) { 158 old_cmd = inb(ICEREG(ice, AC97_CMD)); 159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 160 continue; 161 if (!(old_cmd & ICE1712_AC97_READY)) 162 continue; 163 break; 164 } 165 outb(reg, ICEREG(ice, AC97_INDEX)); 166 outw(val, ICEREG(ice, AC97_DATA)); 167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD)); 169 for (tm = 0; tm < 0x10000; tm++) 170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 171 break; 172 } 173 174 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97, 175 unsigned short reg) 176 { 177 struct snd_ice1712 *ice = ac97->private_data; 178 int tm; 179 unsigned char old_cmd = 0; 180 181 for (tm = 0; tm < 0x10000; tm++) { 182 old_cmd = inb(ICEREG(ice, AC97_CMD)); 183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 184 continue; 185 if (!(old_cmd & ICE1712_AC97_READY)) 186 continue; 187 break; 188 } 189 outb(reg, ICEREG(ice, AC97_INDEX)); 190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD)); 191 for (tm = 0; tm < 0x10000; tm++) 192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 193 break; 194 if (tm >= 0x10000) /* timeout */ 195 return ~0; 196 return inw(ICEREG(ice, AC97_DATA)); 197 } 198 199 /* 200 * pro ac97 section 201 */ 202 203 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97, 204 unsigned short reg, 205 unsigned short val) 206 { 207 struct snd_ice1712 *ice = ac97->private_data; 208 int tm; 209 unsigned char old_cmd = 0; 210 211 for (tm = 0; tm < 0x10000; tm++) { 212 old_cmd = inb(ICEMT(ice, AC97_CMD)); 213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 214 continue; 215 if (!(old_cmd & ICE1712_AC97_READY)) 216 continue; 217 break; 218 } 219 outb(reg, ICEMT(ice, AC97_INDEX)); 220 outw(val, ICEMT(ice, AC97_DATA)); 221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR); 222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD)); 223 for (tm = 0; tm < 0x10000; tm++) 224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0) 225 break; 226 } 227 228 229 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97, 230 unsigned short reg) 231 { 232 struct snd_ice1712 *ice = ac97->private_data; 233 int tm; 234 unsigned char old_cmd = 0; 235 236 for (tm = 0; tm < 0x10000; tm++) { 237 old_cmd = inb(ICEMT(ice, AC97_CMD)); 238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ)) 239 continue; 240 if (!(old_cmd & ICE1712_AC97_READY)) 241 continue; 242 break; 243 } 244 outb(reg, ICEMT(ice, AC97_INDEX)); 245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD)); 246 for (tm = 0; tm < 0x10000; tm++) 247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0) 248 break; 249 if (tm >= 0x10000) /* timeout */ 250 return ~0; 251 return inw(ICEMT(ice, AC97_DATA)); 252 } 253 254 /* 255 * consumer ac97 digital mix 256 */ 257 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info 258 259 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 260 { 261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 262 263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0; 264 return 0; 265 } 266 267 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 268 { 269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 270 unsigned char val, nval; 271 272 spin_lock_irq(&ice->reg_lock); 273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL)); 274 nval = val & ~ICE1712_ROUTE_AC97; 275 if (ucontrol->value.integer.value[0]) 276 nval |= ICE1712_ROUTE_AC97; 277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL)); 278 spin_unlock_irq(&ice->reg_lock); 279 return val != nval; 280 } 281 282 static const struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = { 283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 284 .name = "Digital Mixer To AC97", 285 .info = snd_ice1712_digmix_route_ac97_info, 286 .get = snd_ice1712_digmix_route_ac97_get, 287 .put = snd_ice1712_digmix_route_ac97_put, 288 }; 289 290 291 /* 292 * gpio operations 293 */ 294 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data) 295 { 296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data); 297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 298 } 299 300 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice) 301 { 302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION); 303 } 304 305 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice) 306 { 307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK); 308 } 309 310 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data) 311 { 312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data); 313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 314 } 315 316 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice) 317 { 318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 319 } 320 321 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val) 322 { 323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val); 324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */ 325 } 326 327 /* 328 * 329 * CS8427 interface 330 * 331 */ 332 333 /* 334 * change the input clock selection 335 * spdif_clock = 1 - IEC958 input, 0 - Envy24 336 */ 337 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock) 338 { 339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */ 340 unsigned char val, nval; 341 int res = 0; 342 343 snd_i2c_lock(ice->i2c); 344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) { 345 snd_i2c_unlock(ice->i2c); 346 return -EIO; 347 } 348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) { 349 snd_i2c_unlock(ice->i2c); 350 return -EIO; 351 } 352 nval = val & 0xf0; 353 if (spdif_clock) 354 nval |= 0x01; 355 else 356 nval |= 0x04; 357 if (val != nval) { 358 reg[1] = nval; 359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) { 360 res = -EIO; 361 } else { 362 res++; 363 } 364 } 365 snd_i2c_unlock(ice->i2c); 366 return res; 367 } 368 369 /* 370 * spdif callbacks 371 */ 372 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 373 { 374 snd_cs8427_iec958_active(ice->cs8427, 1); 375 } 376 377 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 378 { 379 snd_cs8427_iec958_active(ice->cs8427, 0); 380 } 381 382 static void setup_cs8427(struct snd_ice1712 *ice, int rate) 383 { 384 snd_cs8427_iec958_pcm(ice->cs8427, rate); 385 } 386 387 /* 388 * create and initialize callbacks for cs8427 interface 389 */ 390 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr) 391 { 392 int err; 393 394 err = snd_cs8427_create(ice->i2c, addr, 395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427); 396 if (err < 0) { 397 dev_err(ice->card->dev, "CS8427 initialization failed\n"); 398 return err; 399 } 400 ice->spdif.ops.open = open_cs8427; 401 ice->spdif.ops.close = close_cs8427; 402 ice->spdif.ops.setup_rate = setup_cs8427; 403 return 0; 404 } 405 406 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master) 407 { 408 /* change CS8427 clock source too */ 409 if (ice->cs8427) 410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master); 411 /* notify ak4524 chip as well */ 412 if (spdif_is_master) { 413 unsigned int i; 414 for (i = 0; i < ice->akm_codecs; i++) { 415 if (ice->akm[i].ops.set_rate_val) 416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0); 417 } 418 } 419 } 420 421 /* 422 * Interrupt handler 423 */ 424 425 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id) 426 { 427 struct snd_ice1712 *ice = dev_id; 428 unsigned char status; 429 int handled = 0; 430 431 while (1) { 432 status = inb(ICEREG(ice, IRQSTAT)); 433 if (status == 0) 434 break; 435 handled = 1; 436 if (status & ICE1712_IRQ_MPU1) { 437 if (ice->rmidi[0]) 438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data); 439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT)); 440 status &= ~ICE1712_IRQ_MPU1; 441 } 442 if (status & ICE1712_IRQ_TIMER) 443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT)); 444 if (status & ICE1712_IRQ_MPU2) { 445 if (ice->rmidi[1]) 446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data); 447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT)); 448 status &= ~ICE1712_IRQ_MPU2; 449 } 450 if (status & ICE1712_IRQ_PROPCM) { 451 unsigned char mtstat = inb(ICEMT(ice, IRQ)); 452 if (mtstat & ICE1712_MULTI_PBKSTATUS) { 453 if (ice->playback_pro_substream) 454 snd_pcm_period_elapsed(ice->playback_pro_substream); 455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ)); 456 } 457 if (mtstat & ICE1712_MULTI_CAPSTATUS) { 458 if (ice->capture_pro_substream) 459 snd_pcm_period_elapsed(ice->capture_pro_substream); 460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ)); 461 } 462 } 463 if (status & ICE1712_IRQ_FM) 464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT)); 465 if (status & ICE1712_IRQ_PBKDS) { 466 u32 idx; 467 u16 pbkstatus; 468 struct snd_pcm_substream *substream; 469 pbkstatus = inw(ICEDS(ice, INTSTAT)); 470 /* dev_dbg(ice->card->dev, "pbkstatus = 0x%x\n", pbkstatus); */ 471 for (idx = 0; idx < 6; idx++) { 472 if ((pbkstatus & (3 << (idx * 2))) == 0) 473 continue; 474 substream = ice->playback_con_substream_ds[idx]; 475 if (substream != NULL) 476 snd_pcm_period_elapsed(substream); 477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT)); 478 } 479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT)); 480 } 481 if (status & ICE1712_IRQ_CONCAP) { 482 if (ice->capture_con_substream) 483 snd_pcm_period_elapsed(ice->capture_con_substream); 484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT)); 485 } 486 if (status & ICE1712_IRQ_CONPBK) { 487 if (ice->playback_con_substream) 488 snd_pcm_period_elapsed(ice->playback_con_substream); 489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT)); 490 } 491 } 492 return IRQ_RETVAL(handled); 493 } 494 495 496 /* 497 * PCM part - misc 498 */ 499 500 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream, 501 struct snd_pcm_hw_params *hw_params) 502 { 503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 504 } 505 506 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream) 507 { 508 return snd_pcm_lib_free_pages(substream); 509 } 510 511 /* 512 * PCM part - consumer I/O 513 */ 514 515 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream, 516 int cmd) 517 { 518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 519 int result = 0; 520 u32 tmp; 521 522 spin_lock(&ice->reg_lock); 523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL); 524 if (cmd == SNDRV_PCM_TRIGGER_START) { 525 tmp |= 1; 526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 527 tmp &= ~1; 528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 529 tmp |= 2; 530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 531 tmp &= ~2; 532 } else { 533 result = -EINVAL; 534 } 535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 536 spin_unlock(&ice->reg_lock); 537 return result; 538 } 539 540 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream, 541 int cmd) 542 { 543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 544 int result = 0; 545 u32 tmp; 546 547 spin_lock(&ice->reg_lock); 548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL); 549 if (cmd == SNDRV_PCM_TRIGGER_START) { 550 tmp |= 1; 551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 552 tmp &= ~1; 553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) { 554 tmp |= 2; 555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) { 556 tmp &= ~2; 557 } else { 558 result = -EINVAL; 559 } 560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp); 561 spin_unlock(&ice->reg_lock); 562 return result; 563 } 564 565 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream, 566 int cmd) 567 { 568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 569 int result = 0; 570 u8 tmp; 571 572 spin_lock(&ice->reg_lock); 573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL); 574 if (cmd == SNDRV_PCM_TRIGGER_START) { 575 tmp |= 1; 576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) { 577 tmp &= ~1; 578 } else { 579 result = -EINVAL; 580 } 581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 582 spin_unlock(&ice->reg_lock); 583 return result; 584 } 585 586 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream) 587 { 588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 589 struct snd_pcm_runtime *runtime = substream->runtime; 590 u32 period_size, buf_size, rate, tmp; 591 592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 594 tmp = 0x0000; 595 if (snd_pcm_format_width(runtime->format) == 16) 596 tmp |= 0x10; 597 if (runtime->channels == 2) 598 tmp |= 0x08; 599 rate = (runtime->rate * 8192) / 375; 600 if (rate > 0x000fffff) 601 rate = 0x000fffff; 602 spin_lock_irq(&ice->reg_lock); 603 outb(0, ice->ddma_port + 15); 604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b); 605 outl(runtime->dma_addr, ice->ddma_port + 0); 606 outw(buf_size, ice->ddma_port + 4); 607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff); 608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff); 609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff); 610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp); 611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff); 612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8); 613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0); 614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0); 615 spin_unlock_irq(&ice->reg_lock); 616 return 0; 617 } 618 619 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream) 620 { 621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 622 struct snd_pcm_runtime *runtime = substream->runtime; 623 u32 period_size, rate, tmp, chn; 624 625 period_size = snd_pcm_lib_period_bytes(substream) - 1; 626 tmp = 0x0064; 627 if (snd_pcm_format_width(runtime->format) == 16) 628 tmp &= ~0x04; 629 if (runtime->channels == 2) 630 tmp |= 0x08; 631 rate = (runtime->rate * 8192) / 375; 632 if (rate > 0x000fffff) 633 rate = 0x000fffff; 634 ice->playback_con_active_buf[substream->number] = 0; 635 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr; 636 chn = substream->number * 2; 637 spin_lock_irq(&ice->reg_lock); 638 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr); 639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size); 640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0)); 641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size); 642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate); 643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0); 644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp); 645 if (runtime->channels == 2) { 646 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate); 647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0); 648 } 649 spin_unlock_irq(&ice->reg_lock); 650 return 0; 651 } 652 653 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream) 654 { 655 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 656 struct snd_pcm_runtime *runtime = substream->runtime; 657 u32 period_size, buf_size; 658 u8 tmp; 659 660 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1; 661 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1; 662 tmp = 0x06; 663 if (snd_pcm_format_width(runtime->format) == 16) 664 tmp &= ~0x04; 665 if (runtime->channels == 2) 666 tmp &= ~0x02; 667 spin_lock_irq(&ice->reg_lock); 668 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR)); 669 outw(buf_size, ICEREG(ice, CONCAP_COUNT)); 670 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8); 671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff); 672 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp); 673 spin_unlock_irq(&ice->reg_lock); 674 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate); 675 return 0; 676 } 677 678 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream) 679 { 680 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 681 struct snd_pcm_runtime *runtime = substream->runtime; 682 size_t ptr; 683 684 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1)) 685 return 0; 686 ptr = runtime->buffer_size - inw(ice->ddma_port + 4); 687 ptr = bytes_to_frames(substream->runtime, ptr); 688 if (ptr == runtime->buffer_size) 689 ptr = 0; 690 return ptr; 691 } 692 693 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream) 694 { 695 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 696 u8 addr; 697 size_t ptr; 698 699 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1)) 700 return 0; 701 if (ice->playback_con_active_buf[substream->number]) 702 addr = ICE1712_DSC_ADDR1; 703 else 704 addr = ICE1712_DSC_ADDR0; 705 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) - 706 ice->playback_con_virt_addr[substream->number]; 707 ptr = bytes_to_frames(substream->runtime, ptr); 708 if (ptr == substream->runtime->buffer_size) 709 ptr = 0; 710 return ptr; 711 } 712 713 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream) 714 { 715 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 716 size_t ptr; 717 718 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1)) 719 return 0; 720 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr; 721 ptr = bytes_to_frames(substream->runtime, ptr); 722 if (ptr == substream->runtime->buffer_size) 723 ptr = 0; 724 return ptr; 725 } 726 727 static const struct snd_pcm_hardware snd_ice1712_playback = { 728 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 729 SNDRV_PCM_INFO_BLOCK_TRANSFER | 730 SNDRV_PCM_INFO_MMAP_VALID | 731 SNDRV_PCM_INFO_PAUSE), 732 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 733 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 734 .rate_min = 4000, 735 .rate_max = 48000, 736 .channels_min = 1, 737 .channels_max = 2, 738 .buffer_bytes_max = (64*1024), 739 .period_bytes_min = 64, 740 .period_bytes_max = (64*1024), 741 .periods_min = 1, 742 .periods_max = 1024, 743 .fifo_size = 0, 744 }; 745 746 static const struct snd_pcm_hardware snd_ice1712_playback_ds = { 747 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 748 SNDRV_PCM_INFO_BLOCK_TRANSFER | 749 SNDRV_PCM_INFO_MMAP_VALID | 750 SNDRV_PCM_INFO_PAUSE), 751 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 752 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 753 .rate_min = 4000, 754 .rate_max = 48000, 755 .channels_min = 1, 756 .channels_max = 2, 757 .buffer_bytes_max = (128*1024), 758 .period_bytes_min = 64, 759 .period_bytes_max = (128*1024), 760 .periods_min = 2, 761 .periods_max = 2, 762 .fifo_size = 0, 763 }; 764 765 static const struct snd_pcm_hardware snd_ice1712_capture = { 766 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 767 SNDRV_PCM_INFO_BLOCK_TRANSFER | 768 SNDRV_PCM_INFO_MMAP_VALID), 769 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 770 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 771 .rate_min = 4000, 772 .rate_max = 48000, 773 .channels_min = 1, 774 .channels_max = 2, 775 .buffer_bytes_max = (64*1024), 776 .period_bytes_min = 64, 777 .period_bytes_max = (64*1024), 778 .periods_min = 1, 779 .periods_max = 1024, 780 .fifo_size = 0, 781 }; 782 783 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream) 784 { 785 struct snd_pcm_runtime *runtime = substream->runtime; 786 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 787 788 ice->playback_con_substream = substream; 789 runtime->hw = snd_ice1712_playback; 790 return 0; 791 } 792 793 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream) 794 { 795 struct snd_pcm_runtime *runtime = substream->runtime; 796 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 797 u32 tmp; 798 799 ice->playback_con_substream_ds[substream->number] = substream; 800 runtime->hw = snd_ice1712_playback_ds; 801 spin_lock_irq(&ice->reg_lock); 802 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2)); 803 outw(tmp, ICEDS(ice, INTMASK)); 804 spin_unlock_irq(&ice->reg_lock); 805 return 0; 806 } 807 808 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream) 809 { 810 struct snd_pcm_runtime *runtime = substream->runtime; 811 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 812 813 ice->capture_con_substream = substream; 814 runtime->hw = snd_ice1712_capture; 815 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC]; 816 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000)) 817 runtime->hw.rate_min = 48000; 818 return 0; 819 } 820 821 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream) 822 { 823 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 824 825 ice->playback_con_substream = NULL; 826 return 0; 827 } 828 829 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream) 830 { 831 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 832 u32 tmp; 833 834 spin_lock_irq(&ice->reg_lock); 835 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2)); 836 outw(tmp, ICEDS(ice, INTMASK)); 837 spin_unlock_irq(&ice->reg_lock); 838 ice->playback_con_substream_ds[substream->number] = NULL; 839 return 0; 840 } 841 842 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream) 843 { 844 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 845 846 ice->capture_con_substream = NULL; 847 return 0; 848 } 849 850 static const struct snd_pcm_ops snd_ice1712_playback_ops = { 851 .open = snd_ice1712_playback_open, 852 .close = snd_ice1712_playback_close, 853 .ioctl = snd_pcm_lib_ioctl, 854 .hw_params = snd_ice1712_hw_params, 855 .hw_free = snd_ice1712_hw_free, 856 .prepare = snd_ice1712_playback_prepare, 857 .trigger = snd_ice1712_playback_trigger, 858 .pointer = snd_ice1712_playback_pointer, 859 }; 860 861 static const struct snd_pcm_ops snd_ice1712_playback_ds_ops = { 862 .open = snd_ice1712_playback_ds_open, 863 .close = snd_ice1712_playback_ds_close, 864 .ioctl = snd_pcm_lib_ioctl, 865 .hw_params = snd_ice1712_hw_params, 866 .hw_free = snd_ice1712_hw_free, 867 .prepare = snd_ice1712_playback_ds_prepare, 868 .trigger = snd_ice1712_playback_ds_trigger, 869 .pointer = snd_ice1712_playback_ds_pointer, 870 }; 871 872 static const struct snd_pcm_ops snd_ice1712_capture_ops = { 873 .open = snd_ice1712_capture_open, 874 .close = snd_ice1712_capture_close, 875 .ioctl = snd_pcm_lib_ioctl, 876 .hw_params = snd_ice1712_hw_params, 877 .hw_free = snd_ice1712_hw_free, 878 .prepare = snd_ice1712_capture_prepare, 879 .trigger = snd_ice1712_capture_trigger, 880 .pointer = snd_ice1712_capture_pointer, 881 }; 882 883 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device) 884 { 885 struct snd_pcm *pcm; 886 int err; 887 888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm); 889 if (err < 0) 890 return err; 891 892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops); 893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops); 894 895 pcm->private_data = ice; 896 pcm->info_flags = 0; 897 strcpy(pcm->name, "ICE1712 consumer"); 898 ice->pcm = pcm; 899 900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024); 902 903 dev_warn(ice->card->dev, 904 "Consumer PCM code does not work well at the moment --jk\n"); 905 906 return 0; 907 } 908 909 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device) 910 { 911 struct snd_pcm *pcm; 912 int err; 913 914 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm); 915 if (err < 0) 916 return err; 917 918 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops); 919 920 pcm->private_data = ice; 921 pcm->info_flags = 0; 922 strcpy(pcm->name, "ICE1712 consumer (DS)"); 923 ice->pcm_ds = pcm; 924 925 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 926 snd_dma_pci_data(ice->pci), 64*1024, 128*1024); 927 928 return 0; 929 } 930 931 /* 932 * PCM code - professional part (multitrack) 933 */ 934 935 static const unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000, 936 32000, 44100, 48000, 64000, 88200, 96000 }; 937 938 static const struct snd_pcm_hw_constraint_list hw_constraints_rates = { 939 .count = ARRAY_SIZE(rates), 940 .list = rates, 941 .mask = 0, 942 }; 943 944 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream, 945 int cmd) 946 { 947 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 948 switch (cmd) { 949 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 950 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 951 { 952 unsigned int what; 953 unsigned int old; 954 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK) 955 return -EINVAL; 956 what = ICE1712_PLAYBACK_PAUSE; 957 snd_pcm_trigger_done(substream, substream); 958 spin_lock(&ice->reg_lock); 959 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 960 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) 961 old |= what; 962 else 963 old &= ~what; 964 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 965 spin_unlock(&ice->reg_lock); 966 break; 967 } 968 case SNDRV_PCM_TRIGGER_START: 969 case SNDRV_PCM_TRIGGER_STOP: 970 { 971 unsigned int what = 0; 972 unsigned int old; 973 struct snd_pcm_substream *s; 974 975 snd_pcm_group_for_each_entry(s, substream) { 976 if (s == ice->playback_pro_substream) { 977 what |= ICE1712_PLAYBACK_START; 978 snd_pcm_trigger_done(s, substream); 979 } else if (s == ice->capture_pro_substream) { 980 what |= ICE1712_CAPTURE_START_SHADOW; 981 snd_pcm_trigger_done(s, substream); 982 } 983 } 984 spin_lock(&ice->reg_lock); 985 old = inl(ICEMT(ice, PLAYBACK_CONTROL)); 986 if (cmd == SNDRV_PCM_TRIGGER_START) 987 old |= what; 988 else 989 old &= ~what; 990 outl(old, ICEMT(ice, PLAYBACK_CONTROL)); 991 spin_unlock(&ice->reg_lock); 992 break; 993 } 994 default: 995 return -EINVAL; 996 } 997 return 0; 998 } 999 1000 /* 1001 */ 1002 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force) 1003 { 1004 unsigned long flags; 1005 unsigned char val, old; 1006 unsigned int i; 1007 1008 switch (rate) { 1009 case 8000: val = 6; break; 1010 case 9600: val = 3; break; 1011 case 11025: val = 10; break; 1012 case 12000: val = 2; break; 1013 case 16000: val = 5; break; 1014 case 22050: val = 9; break; 1015 case 24000: val = 1; break; 1016 case 32000: val = 4; break; 1017 case 44100: val = 8; break; 1018 case 48000: val = 0; break; 1019 case 64000: val = 15; break; 1020 case 88200: val = 11; break; 1021 case 96000: val = 7; break; 1022 default: 1023 snd_BUG(); 1024 val = 0; 1025 rate = 48000; 1026 break; 1027 } 1028 1029 spin_lock_irqsave(&ice->reg_lock, flags); 1030 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW| 1031 ICE1712_PLAYBACK_PAUSE| 1032 ICE1712_PLAYBACK_START)) { 1033 __out: 1034 spin_unlock_irqrestore(&ice->reg_lock, flags); 1035 return; 1036 } 1037 if (!force && is_pro_rate_locked(ice)) 1038 goto __out; 1039 1040 old = inb(ICEMT(ice, RATE)); 1041 if (!force && old == val) 1042 goto __out; 1043 1044 ice->cur_rate = rate; 1045 outb(val, ICEMT(ice, RATE)); 1046 spin_unlock_irqrestore(&ice->reg_lock, flags); 1047 1048 if (ice->gpio.set_pro_rate) 1049 ice->gpio.set_pro_rate(ice, rate); 1050 for (i = 0; i < ice->akm_codecs; i++) { 1051 if (ice->akm[i].ops.set_rate_val) 1052 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate); 1053 } 1054 if (ice->spdif.ops.setup_rate) 1055 ice->spdif.ops.setup_rate(ice, rate); 1056 } 1057 1058 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream) 1059 { 1060 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1061 1062 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream); 1063 spin_lock_irq(&ice->reg_lock); 1064 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR)); 1065 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE)); 1066 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT)); 1067 spin_unlock_irq(&ice->reg_lock); 1068 1069 return 0; 1070 } 1071 1072 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream, 1073 struct snd_pcm_hw_params *hw_params) 1074 { 1075 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1076 1077 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1078 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1079 } 1080 1081 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream) 1082 { 1083 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1084 1085 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream); 1086 spin_lock_irq(&ice->reg_lock); 1087 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR)); 1088 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE)); 1089 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT)); 1090 spin_unlock_irq(&ice->reg_lock); 1091 return 0; 1092 } 1093 1094 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream, 1095 struct snd_pcm_hw_params *hw_params) 1096 { 1097 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1098 1099 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0); 1100 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 1101 } 1102 1103 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream) 1104 { 1105 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1106 size_t ptr; 1107 1108 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START)) 1109 return 0; 1110 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2); 1111 ptr = bytes_to_frames(substream->runtime, ptr); 1112 if (ptr == substream->runtime->buffer_size) 1113 ptr = 0; 1114 return ptr; 1115 } 1116 1117 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream) 1118 { 1119 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1120 size_t ptr; 1121 1122 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW)) 1123 return 0; 1124 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2); 1125 ptr = bytes_to_frames(substream->runtime, ptr); 1126 if (ptr == substream->runtime->buffer_size) 1127 ptr = 0; 1128 return ptr; 1129 } 1130 1131 static const struct snd_pcm_hardware snd_ice1712_playback_pro = { 1132 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1133 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1134 SNDRV_PCM_INFO_MMAP_VALID | 1135 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1136 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1137 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1138 .rate_min = 4000, 1139 .rate_max = 96000, 1140 .channels_min = 10, 1141 .channels_max = 10, 1142 .buffer_bytes_max = (256*1024), 1143 .period_bytes_min = 10 * 4 * 2, 1144 .period_bytes_max = 131040, 1145 .periods_min = 1, 1146 .periods_max = 1024, 1147 .fifo_size = 0, 1148 }; 1149 1150 static const struct snd_pcm_hardware snd_ice1712_capture_pro = { 1151 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 1152 SNDRV_PCM_INFO_BLOCK_TRANSFER | 1153 SNDRV_PCM_INFO_MMAP_VALID | 1154 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START), 1155 .formats = SNDRV_PCM_FMTBIT_S32_LE, 1156 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000, 1157 .rate_min = 4000, 1158 .rate_max = 96000, 1159 .channels_min = 12, 1160 .channels_max = 12, 1161 .buffer_bytes_max = (256*1024), 1162 .period_bytes_min = 12 * 4 * 2, 1163 .period_bytes_max = 131040, 1164 .periods_min = 1, 1165 .periods_max = 1024, 1166 .fifo_size = 0, 1167 }; 1168 1169 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream) 1170 { 1171 struct snd_pcm_runtime *runtime = substream->runtime; 1172 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1173 1174 ice->playback_pro_substream = substream; 1175 runtime->hw = snd_ice1712_playback_pro; 1176 snd_pcm_set_sync(substream); 1177 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1178 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1179 if (is_pro_rate_locked(ice)) { 1180 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1181 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1182 } 1183 1184 if (ice->spdif.ops.open) 1185 ice->spdif.ops.open(ice, substream); 1186 1187 return 0; 1188 } 1189 1190 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream) 1191 { 1192 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1193 struct snd_pcm_runtime *runtime = substream->runtime; 1194 1195 ice->capture_pro_substream = substream; 1196 runtime->hw = snd_ice1712_capture_pro; 1197 snd_pcm_set_sync(substream); 1198 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24); 1199 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates); 1200 if (is_pro_rate_locked(ice)) { 1201 runtime->hw.rate_min = PRO_RATE_DEFAULT; 1202 runtime->hw.rate_max = PRO_RATE_DEFAULT; 1203 } 1204 1205 return 0; 1206 } 1207 1208 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream) 1209 { 1210 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1211 1212 if (PRO_RATE_RESET) 1213 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1214 ice->playback_pro_substream = NULL; 1215 if (ice->spdif.ops.close) 1216 ice->spdif.ops.close(ice, substream); 1217 1218 return 0; 1219 } 1220 1221 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream) 1222 { 1223 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream); 1224 1225 if (PRO_RATE_RESET) 1226 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0); 1227 ice->capture_pro_substream = NULL; 1228 return 0; 1229 } 1230 1231 static const struct snd_pcm_ops snd_ice1712_playback_pro_ops = { 1232 .open = snd_ice1712_playback_pro_open, 1233 .close = snd_ice1712_playback_pro_close, 1234 .ioctl = snd_pcm_lib_ioctl, 1235 .hw_params = snd_ice1712_playback_pro_hw_params, 1236 .hw_free = snd_ice1712_hw_free, 1237 .prepare = snd_ice1712_playback_pro_prepare, 1238 .trigger = snd_ice1712_pro_trigger, 1239 .pointer = snd_ice1712_playback_pro_pointer, 1240 }; 1241 1242 static const struct snd_pcm_ops snd_ice1712_capture_pro_ops = { 1243 .open = snd_ice1712_capture_pro_open, 1244 .close = snd_ice1712_capture_pro_close, 1245 .ioctl = snd_pcm_lib_ioctl, 1246 .hw_params = snd_ice1712_capture_pro_hw_params, 1247 .hw_free = snd_ice1712_hw_free, 1248 .prepare = snd_ice1712_capture_pro_prepare, 1249 .trigger = snd_ice1712_pro_trigger, 1250 .pointer = snd_ice1712_capture_pro_pointer, 1251 }; 1252 1253 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device) 1254 { 1255 struct snd_pcm *pcm; 1256 int err; 1257 1258 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm); 1259 if (err < 0) 1260 return err; 1261 1262 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops); 1263 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops); 1264 1265 pcm->private_data = ice; 1266 pcm->info_flags = 0; 1267 strcpy(pcm->name, "ICE1712 multi"); 1268 1269 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 1270 snd_dma_pci_data(ice->pci), 256*1024, 256*1024); 1271 1272 ice->pcm_pro = pcm; 1273 1274 if (ice->cs8427) { 1275 /* assign channels to iec958 */ 1276 err = snd_cs8427_iec958_build(ice->cs8427, 1277 pcm->streams[0].substream, 1278 pcm->streams[1].substream); 1279 if (err < 0) 1280 return err; 1281 } 1282 1283 return snd_ice1712_build_pro_mixer(ice); 1284 } 1285 1286 /* 1287 * Mixer section 1288 */ 1289 1290 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index) 1291 { 1292 unsigned int vol = ice->pro_volumes[index]; 1293 unsigned short val = 0; 1294 1295 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f; 1296 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8; 1297 outb(index, ICEMT(ice, MONITOR_INDEX)); 1298 outw(val, ICEMT(ice, MONITOR_VOLUME)); 1299 } 1300 1301 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info 1302 1303 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1304 { 1305 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1306 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1307 kcontrol->private_value; 1308 1309 spin_lock_irq(&ice->reg_lock); 1310 ucontrol->value.integer.value[0] = 1311 !((ice->pro_volumes[priv_idx] >> 15) & 1); 1312 ucontrol->value.integer.value[1] = 1313 !((ice->pro_volumes[priv_idx] >> 31) & 1); 1314 spin_unlock_irq(&ice->reg_lock); 1315 return 0; 1316 } 1317 1318 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1319 { 1320 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1321 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1322 kcontrol->private_value; 1323 unsigned int nval, change; 1324 1325 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) | 1326 (ucontrol->value.integer.value[1] ? 0 : 0x80000000); 1327 spin_lock_irq(&ice->reg_lock); 1328 nval |= ice->pro_volumes[priv_idx] & ~0x80008000; 1329 change = nval != ice->pro_volumes[priv_idx]; 1330 ice->pro_volumes[priv_idx] = nval; 1331 snd_ice1712_update_volume(ice, priv_idx); 1332 spin_unlock_irq(&ice->reg_lock); 1333 return change; 1334 } 1335 1336 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1337 { 1338 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1339 uinfo->count = 2; 1340 uinfo->value.integer.min = 0; 1341 uinfo->value.integer.max = 96; 1342 return 0; 1343 } 1344 1345 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1346 { 1347 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1348 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1349 kcontrol->private_value; 1350 1351 spin_lock_irq(&ice->reg_lock); 1352 ucontrol->value.integer.value[0] = 1353 (ice->pro_volumes[priv_idx] >> 0) & 127; 1354 ucontrol->value.integer.value[1] = 1355 (ice->pro_volumes[priv_idx] >> 16) & 127; 1356 spin_unlock_irq(&ice->reg_lock); 1357 return 0; 1358 } 1359 1360 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) 1361 { 1362 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1363 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) + 1364 kcontrol->private_value; 1365 unsigned int nval, change; 1366 1367 nval = (ucontrol->value.integer.value[0] & 127) | 1368 ((ucontrol->value.integer.value[1] & 127) << 16); 1369 spin_lock_irq(&ice->reg_lock); 1370 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f; 1371 change = nval != ice->pro_volumes[priv_idx]; 1372 ice->pro_volumes[priv_idx] = nval; 1373 snd_ice1712_update_volume(ice, priv_idx); 1374 spin_unlock_irq(&ice->reg_lock); 1375 return change; 1376 } 1377 1378 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0); 1379 1380 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = { 1381 { 1382 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1383 .name = "Multi Playback Switch", 1384 .info = snd_ice1712_pro_mixer_switch_info, 1385 .get = snd_ice1712_pro_mixer_switch_get, 1386 .put = snd_ice1712_pro_mixer_switch_put, 1387 .private_value = 0, 1388 .count = 10, 1389 }, 1390 { 1391 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1392 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1393 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1394 .name = "Multi Playback Volume", 1395 .info = snd_ice1712_pro_mixer_volume_info, 1396 .get = snd_ice1712_pro_mixer_volume_get, 1397 .put = snd_ice1712_pro_mixer_volume_put, 1398 .private_value = 0, 1399 .count = 10, 1400 .tlv = { .p = db_scale_playback } 1401 }, 1402 }; 1403 1404 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = { 1405 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1406 .name = "H/W Multi Capture Switch", 1407 .info = snd_ice1712_pro_mixer_switch_info, 1408 .get = snd_ice1712_pro_mixer_switch_get, 1409 .put = snd_ice1712_pro_mixer_switch_put, 1410 .private_value = 10, 1411 }; 1412 1413 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = { 1414 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1415 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH), 1416 .info = snd_ice1712_pro_mixer_switch_info, 1417 .get = snd_ice1712_pro_mixer_switch_get, 1418 .put = snd_ice1712_pro_mixer_switch_put, 1419 .private_value = 18, 1420 .count = 2, 1421 }; 1422 1423 static const struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = { 1424 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1425 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1426 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1427 .name = "H/W Multi Capture Volume", 1428 .info = snd_ice1712_pro_mixer_volume_info, 1429 .get = snd_ice1712_pro_mixer_volume_get, 1430 .put = snd_ice1712_pro_mixer_volume_put, 1431 .private_value = 10, 1432 .tlv = { .p = db_scale_playback } 1433 }; 1434 1435 static const struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = { 1436 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1437 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME), 1438 .info = snd_ice1712_pro_mixer_volume_info, 1439 .get = snd_ice1712_pro_mixer_volume_get, 1440 .put = snd_ice1712_pro_mixer_volume_put, 1441 .private_value = 18, 1442 .count = 2, 1443 }; 1444 1445 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice) 1446 { 1447 struct snd_card *card = ice->card; 1448 unsigned int idx; 1449 int err; 1450 1451 /* multi-channel mixer */ 1452 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) { 1453 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice)); 1454 if (err < 0) 1455 return err; 1456 } 1457 1458 if (ice->num_total_adcs > 0) { 1459 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch; 1460 tmp.count = ice->num_total_adcs; 1461 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1462 if (err < 0) 1463 return err; 1464 } 1465 1466 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice)); 1467 if (err < 0) 1468 return err; 1469 1470 if (ice->num_total_adcs > 0) { 1471 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume; 1472 tmp.count = ice->num_total_adcs; 1473 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice)); 1474 if (err < 0) 1475 return err; 1476 } 1477 1478 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice)); 1479 if (err < 0) 1480 return err; 1481 1482 /* initialize volumes */ 1483 for (idx = 0; idx < 10; idx++) { 1484 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1485 snd_ice1712_update_volume(ice, idx); 1486 } 1487 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) { 1488 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1489 snd_ice1712_update_volume(ice, idx); 1490 } 1491 for (idx = 18; idx < 20; idx++) { 1492 ice->pro_volumes[idx] = 0x80008000; /* mute */ 1493 snd_ice1712_update_volume(ice, idx); 1494 } 1495 return 0; 1496 } 1497 1498 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97) 1499 { 1500 struct snd_ice1712 *ice = ac97->private_data; 1501 ice->ac97 = NULL; 1502 } 1503 1504 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice) 1505 { 1506 int err, bus_num = 0; 1507 struct snd_ac97_template ac97; 1508 struct snd_ac97_bus *pbus; 1509 static struct snd_ac97_bus_ops con_ops = { 1510 .write = snd_ice1712_ac97_write, 1511 .read = snd_ice1712_ac97_read, 1512 }; 1513 static struct snd_ac97_bus_ops pro_ops = { 1514 .write = snd_ice1712_pro_ac97_write, 1515 .read = snd_ice1712_pro_ac97_read, 1516 }; 1517 1518 if (ice_has_con_ac97(ice)) { 1519 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus); 1520 if (err < 0) 1521 return err; 1522 memset(&ac97, 0, sizeof(ac97)); 1523 ac97.private_data = ice; 1524 ac97.private_free = snd_ice1712_mixer_free_ac97; 1525 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1526 if (err < 0) 1527 dev_warn(ice->card->dev, 1528 "cannot initialize ac97 for consumer, skipped\n"); 1529 else { 1530 return snd_ctl_add(ice->card, 1531 snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, 1532 ice)); 1533 } 1534 } 1535 1536 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) { 1537 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus); 1538 if (err < 0) 1539 return err; 1540 memset(&ac97, 0, sizeof(ac97)); 1541 ac97.private_data = ice; 1542 ac97.private_free = snd_ice1712_mixer_free_ac97; 1543 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97); 1544 if (err < 0) 1545 dev_warn(ice->card->dev, 1546 "cannot initialize pro ac97, skipped\n"); 1547 else 1548 return 0; 1549 } 1550 /* I2S mixer only */ 1551 strcat(ice->card->mixername, "ICE1712 - multitrack"); 1552 return 0; 1553 } 1554 1555 /* 1556 * 1557 */ 1558 1559 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx) 1560 { 1561 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8); 1562 } 1563 1564 static void snd_ice1712_proc_read(struct snd_info_entry *entry, 1565 struct snd_info_buffer *buffer) 1566 { 1567 struct snd_ice1712 *ice = entry->private_data; 1568 unsigned int idx; 1569 1570 snd_iprintf(buffer, "%s\n\n", ice->card->longname); 1571 snd_iprintf(buffer, "EEPROM:\n"); 1572 1573 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor); 1574 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size); 1575 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version); 1576 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]); 1577 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]); 1578 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]); 1579 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]); 1580 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask); 1581 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate); 1582 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir); 1583 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO)); 1584 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO)); 1585 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO)); 1586 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]); 1587 for (idx = 0; idx < 4; idx++) 1588 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]); 1589 for (idx = 0; idx < 4; idx++) 1590 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]); 1591 for (idx = 0x1c; idx < ice->eeprom.size; idx++) 1592 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]); 1593 1594 snd_iprintf(buffer, "\nRegisters:\n"); 1595 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03))); 1596 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE))); 1597 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT))); 1598 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE))); 1599 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice)); 1600 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK)); 1601 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION)); 1602 } 1603 1604 static void snd_ice1712_proc_init(struct snd_ice1712 *ice) 1605 { 1606 snd_card_ro_proc_new(ice->card, "ice1712", ice, snd_ice1712_proc_read); 1607 } 1608 1609 /* 1610 * 1611 */ 1612 1613 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol, 1614 struct snd_ctl_elem_info *uinfo) 1615 { 1616 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 1617 uinfo->count = sizeof(struct snd_ice1712_eeprom); 1618 return 0; 1619 } 1620 1621 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol, 1622 struct snd_ctl_elem_value *ucontrol) 1623 { 1624 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1625 1626 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom)); 1627 return 0; 1628 } 1629 1630 static const struct snd_kcontrol_new snd_ice1712_eeprom = { 1631 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 1632 .name = "ICE1712 EEPROM", 1633 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1634 .info = snd_ice1712_eeprom_info, 1635 .get = snd_ice1712_eeprom_get 1636 }; 1637 1638 /* 1639 */ 1640 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol, 1641 struct snd_ctl_elem_info *uinfo) 1642 { 1643 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1644 uinfo->count = 1; 1645 return 0; 1646 } 1647 1648 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol, 1649 struct snd_ctl_elem_value *ucontrol) 1650 { 1651 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1652 if (ice->spdif.ops.default_get) 1653 ice->spdif.ops.default_get(ice, ucontrol); 1654 return 0; 1655 } 1656 1657 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol, 1658 struct snd_ctl_elem_value *ucontrol) 1659 { 1660 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1661 if (ice->spdif.ops.default_put) 1662 return ice->spdif.ops.default_put(ice, ucontrol); 1663 return 0; 1664 } 1665 1666 static const struct snd_kcontrol_new snd_ice1712_spdif_default = 1667 { 1668 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1669 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT), 1670 .info = snd_ice1712_spdif_info, 1671 .get = snd_ice1712_spdif_default_get, 1672 .put = snd_ice1712_spdif_default_put 1673 }; 1674 1675 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol, 1676 struct snd_ctl_elem_value *ucontrol) 1677 { 1678 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1679 if (ice->spdif.ops.default_get) { 1680 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1681 IEC958_AES0_PROFESSIONAL | 1682 IEC958_AES0_CON_NOT_COPYRIGHT | 1683 IEC958_AES0_CON_EMPHASIS; 1684 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL | 1685 IEC958_AES1_CON_CATEGORY; 1686 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS; 1687 } else { 1688 ucontrol->value.iec958.status[0] = 0xff; 1689 ucontrol->value.iec958.status[1] = 0xff; 1690 ucontrol->value.iec958.status[2] = 0xff; 1691 ucontrol->value.iec958.status[3] = 0xff; 1692 ucontrol->value.iec958.status[4] = 0xff; 1693 } 1694 return 0; 1695 } 1696 1697 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol, 1698 struct snd_ctl_elem_value *ucontrol) 1699 { 1700 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1701 if (ice->spdif.ops.default_get) { 1702 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO | 1703 IEC958_AES0_PROFESSIONAL | 1704 IEC958_AES0_PRO_FS | 1705 IEC958_AES0_PRO_EMPHASIS; 1706 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE; 1707 } else { 1708 ucontrol->value.iec958.status[0] = 0xff; 1709 ucontrol->value.iec958.status[1] = 0xff; 1710 ucontrol->value.iec958.status[2] = 0xff; 1711 ucontrol->value.iec958.status[3] = 0xff; 1712 ucontrol->value.iec958.status[4] = 0xff; 1713 } 1714 return 0; 1715 } 1716 1717 static const struct snd_kcontrol_new snd_ice1712_spdif_maskc = 1718 { 1719 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1720 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1721 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK), 1722 .info = snd_ice1712_spdif_info, 1723 .get = snd_ice1712_spdif_maskc_get, 1724 }; 1725 1726 static const struct snd_kcontrol_new snd_ice1712_spdif_maskp = 1727 { 1728 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1729 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1730 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK), 1731 .info = snd_ice1712_spdif_info, 1732 .get = snd_ice1712_spdif_maskp_get, 1733 }; 1734 1735 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol, 1736 struct snd_ctl_elem_value *ucontrol) 1737 { 1738 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1739 if (ice->spdif.ops.stream_get) 1740 ice->spdif.ops.stream_get(ice, ucontrol); 1741 return 0; 1742 } 1743 1744 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol, 1745 struct snd_ctl_elem_value *ucontrol) 1746 { 1747 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1748 if (ice->spdif.ops.stream_put) 1749 return ice->spdif.ops.stream_put(ice, ucontrol); 1750 return 0; 1751 } 1752 1753 static const struct snd_kcontrol_new snd_ice1712_spdif_stream = 1754 { 1755 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | 1756 SNDRV_CTL_ELEM_ACCESS_INACTIVE), 1757 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1758 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM), 1759 .info = snd_ice1712_spdif_info, 1760 .get = snd_ice1712_spdif_stream_get, 1761 .put = snd_ice1712_spdif_stream_put 1762 }; 1763 1764 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol, 1765 struct snd_ctl_elem_value *ucontrol) 1766 { 1767 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1768 unsigned char mask = kcontrol->private_value & 0xff; 1769 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0; 1770 1771 snd_ice1712_save_gpio_status(ice); 1772 ucontrol->value.integer.value[0] = 1773 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert; 1774 snd_ice1712_restore_gpio_status(ice); 1775 return 0; 1776 } 1777 1778 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol, 1779 struct snd_ctl_elem_value *ucontrol) 1780 { 1781 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1782 unsigned char mask = kcontrol->private_value & 0xff; 1783 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0; 1784 unsigned int val, nval; 1785 1786 if (kcontrol->private_value & (1 << 31)) 1787 return -EPERM; 1788 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert; 1789 snd_ice1712_save_gpio_status(ice); 1790 val = snd_ice1712_gpio_read(ice); 1791 nval |= val & ~mask; 1792 if (val != nval) 1793 snd_ice1712_gpio_write(ice, nval); 1794 snd_ice1712_restore_gpio_status(ice); 1795 return val != nval; 1796 } 1797 1798 /* 1799 * rate 1800 */ 1801 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol, 1802 struct snd_ctl_elem_info *uinfo) 1803 { 1804 static const char * const texts[] = { 1805 "8000", /* 0: 6 */ 1806 "9600", /* 1: 3 */ 1807 "11025", /* 2: 10 */ 1808 "12000", /* 3: 2 */ 1809 "16000", /* 4: 5 */ 1810 "22050", /* 5: 9 */ 1811 "24000", /* 6: 1 */ 1812 "32000", /* 7: 4 */ 1813 "44100", /* 8: 8 */ 1814 "48000", /* 9: 0 */ 1815 "64000", /* 10: 15 */ 1816 "88200", /* 11: 11 */ 1817 "96000", /* 12: 7 */ 1818 "IEC958 Input", /* 13: -- */ 1819 }; 1820 return snd_ctl_enum_info(uinfo, 1, 14, texts); 1821 } 1822 1823 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol, 1824 struct snd_ctl_elem_value *ucontrol) 1825 { 1826 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1827 static const unsigned char xlate[16] = { 1828 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10 1829 }; 1830 unsigned char val; 1831 1832 spin_lock_irq(&ice->reg_lock); 1833 if (is_spdif_master(ice)) { 1834 ucontrol->value.enumerated.item[0] = 13; 1835 } else { 1836 val = xlate[inb(ICEMT(ice, RATE)) & 15]; 1837 if (val == 255) { 1838 snd_BUG(); 1839 val = 0; 1840 } 1841 ucontrol->value.enumerated.item[0] = val; 1842 } 1843 spin_unlock_irq(&ice->reg_lock); 1844 return 0; 1845 } 1846 1847 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol, 1848 struct snd_ctl_elem_value *ucontrol) 1849 { 1850 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1851 static const unsigned int xrate[13] = { 1852 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1853 32000, 44100, 48000, 64000, 88200, 96000 1854 }; 1855 unsigned char oval; 1856 int change = 0; 1857 1858 spin_lock_irq(&ice->reg_lock); 1859 oval = inb(ICEMT(ice, RATE)); 1860 if (ucontrol->value.enumerated.item[0] == 13) { 1861 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE)); 1862 } else { 1863 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1864 spin_unlock_irq(&ice->reg_lock); 1865 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1); 1866 spin_lock_irq(&ice->reg_lock); 1867 } 1868 change = inb(ICEMT(ice, RATE)) != oval; 1869 spin_unlock_irq(&ice->reg_lock); 1870 1871 if ((oval & ICE1712_SPDIF_MASTER) != 1872 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER)) 1873 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice)); 1874 1875 return change; 1876 } 1877 1878 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock = { 1879 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1880 .name = "Multi Track Internal Clock", 1881 .info = snd_ice1712_pro_internal_clock_info, 1882 .get = snd_ice1712_pro_internal_clock_get, 1883 .put = snd_ice1712_pro_internal_clock_put 1884 }; 1885 1886 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol, 1887 struct snd_ctl_elem_info *uinfo) 1888 { 1889 static const char * const texts[] = { 1890 "8000", /* 0: 6 */ 1891 "9600", /* 1: 3 */ 1892 "11025", /* 2: 10 */ 1893 "12000", /* 3: 2 */ 1894 "16000", /* 4: 5 */ 1895 "22050", /* 5: 9 */ 1896 "24000", /* 6: 1 */ 1897 "32000", /* 7: 4 */ 1898 "44100", /* 8: 8 */ 1899 "48000", /* 9: 0 */ 1900 "64000", /* 10: 15 */ 1901 "88200", /* 11: 11 */ 1902 "96000", /* 12: 7 */ 1903 /* "IEC958 Input", 13: -- */ 1904 }; 1905 return snd_ctl_enum_info(uinfo, 1, 13, texts); 1906 } 1907 1908 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol, 1909 struct snd_ctl_elem_value *ucontrol) 1910 { 1911 int val; 1912 static const unsigned int xrate[13] = { 1913 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1914 32000, 44100, 48000, 64000, 88200, 96000 1915 }; 1916 1917 for (val = 0; val < 13; val++) { 1918 if (xrate[val] == PRO_RATE_DEFAULT) 1919 break; 1920 } 1921 1922 ucontrol->value.enumerated.item[0] = val; 1923 return 0; 1924 } 1925 1926 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol, 1927 struct snd_ctl_elem_value *ucontrol) 1928 { 1929 static const unsigned int xrate[13] = { 1930 8000, 9600, 11025, 12000, 16000, 22050, 24000, 1931 32000, 44100, 48000, 64000, 88200, 96000 1932 }; 1933 unsigned char oval; 1934 int change = 0; 1935 1936 oval = PRO_RATE_DEFAULT; 1937 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13]; 1938 change = PRO_RATE_DEFAULT != oval; 1939 1940 return change; 1941 } 1942 1943 static const struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = { 1944 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1945 .name = "Multi Track Internal Clock Default", 1946 .info = snd_ice1712_pro_internal_clock_default_info, 1947 .get = snd_ice1712_pro_internal_clock_default_get, 1948 .put = snd_ice1712_pro_internal_clock_default_put 1949 }; 1950 1951 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info 1952 1953 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol, 1954 struct snd_ctl_elem_value *ucontrol) 1955 { 1956 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED; 1957 return 0; 1958 } 1959 1960 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol, 1961 struct snd_ctl_elem_value *ucontrol) 1962 { 1963 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1964 int change = 0, nval; 1965 1966 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1967 spin_lock_irq(&ice->reg_lock); 1968 change = PRO_RATE_LOCKED != nval; 1969 PRO_RATE_LOCKED = nval; 1970 spin_unlock_irq(&ice->reg_lock); 1971 return change; 1972 } 1973 1974 static const struct snd_kcontrol_new snd_ice1712_pro_rate_locking = { 1975 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1976 .name = "Multi Track Rate Locking", 1977 .info = snd_ice1712_pro_rate_locking_info, 1978 .get = snd_ice1712_pro_rate_locking_get, 1979 .put = snd_ice1712_pro_rate_locking_put 1980 }; 1981 1982 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info 1983 1984 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol, 1985 struct snd_ctl_elem_value *ucontrol) 1986 { 1987 ucontrol->value.integer.value[0] = PRO_RATE_RESET; 1988 return 0; 1989 } 1990 1991 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol, 1992 struct snd_ctl_elem_value *ucontrol) 1993 { 1994 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 1995 int change = 0, nval; 1996 1997 nval = ucontrol->value.integer.value[0] ? 1 : 0; 1998 spin_lock_irq(&ice->reg_lock); 1999 change = PRO_RATE_RESET != nval; 2000 PRO_RATE_RESET = nval; 2001 spin_unlock_irq(&ice->reg_lock); 2002 return change; 2003 } 2004 2005 static const struct snd_kcontrol_new snd_ice1712_pro_rate_reset = { 2006 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2007 .name = "Multi Track Rate Reset", 2008 .info = snd_ice1712_pro_rate_reset_info, 2009 .get = snd_ice1712_pro_rate_reset_get, 2010 .put = snd_ice1712_pro_rate_reset_put 2011 }; 2012 2013 /* 2014 * routing 2015 */ 2016 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol, 2017 struct snd_ctl_elem_info *uinfo) 2018 { 2019 static const char * const texts[] = { 2020 "PCM Out", /* 0 */ 2021 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */ 2022 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */ 2023 "IEC958 In L", "IEC958 In R", /* 9-10 */ 2024 "Digital Mixer", /* 11 - optional */ 2025 }; 2026 int num_items = snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11; 2027 return snd_ctl_enum_info(uinfo, 1, num_items, texts); 2028 } 2029 2030 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol, 2031 struct snd_ctl_elem_value *ucontrol) 2032 { 2033 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2034 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2035 unsigned int val, cval; 2036 2037 spin_lock_irq(&ice->reg_lock); 2038 val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2039 cval = inl(ICEMT(ice, ROUTE_CAPTURE)); 2040 spin_unlock_irq(&ice->reg_lock); 2041 2042 val >>= ((idx % 2) * 8) + ((idx / 2) * 2); 2043 val &= 3; 2044 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4); 2045 if (val == 1 && idx < 2) 2046 ucontrol->value.enumerated.item[0] = 11; 2047 else if (val == 2) 2048 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2049 else if (val == 3) 2050 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2051 else 2052 ucontrol->value.enumerated.item[0] = 0; 2053 return 0; 2054 } 2055 2056 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol, 2057 struct snd_ctl_elem_value *ucontrol) 2058 { 2059 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2060 int change, shift; 2061 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2062 unsigned int val, old_val, nval; 2063 2064 /* update PSDOUT */ 2065 if (ucontrol->value.enumerated.item[0] >= 11) 2066 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */ 2067 else if (ucontrol->value.enumerated.item[0] >= 9) 2068 nval = 3; /* spdif in */ 2069 else if (ucontrol->value.enumerated.item[0] >= 1) 2070 nval = 2; /* analog in */ 2071 else 2072 nval = 0; /* pcm */ 2073 shift = ((idx % 2) * 8) + ((idx / 2) * 2); 2074 spin_lock_irq(&ice->reg_lock); 2075 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2076 val &= ~(0x03 << shift); 2077 val |= nval << shift; 2078 change = val != old_val; 2079 if (change) 2080 outw(val, ICEMT(ice, ROUTE_PSDOUT03)); 2081 spin_unlock_irq(&ice->reg_lock); 2082 if (nval < 2) /* dig mixer of pcm */ 2083 return change; 2084 2085 /* update CAPTURE */ 2086 spin_lock_irq(&ice->reg_lock); 2087 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE)); 2088 shift = ((idx / 2) * 8) + ((idx % 2) * 4); 2089 if (nval == 2) { /* analog in */ 2090 nval = ucontrol->value.enumerated.item[0] - 1; 2091 val &= ~(0x07 << shift); 2092 val |= nval << shift; 2093 } else { /* spdif in */ 2094 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2095 val &= ~(0x08 << shift); 2096 val |= nval << shift; 2097 } 2098 if (val != old_val) { 2099 change = 1; 2100 outl(val, ICEMT(ice, ROUTE_CAPTURE)); 2101 } 2102 spin_unlock_irq(&ice->reg_lock); 2103 return change; 2104 } 2105 2106 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol, 2107 struct snd_ctl_elem_value *ucontrol) 2108 { 2109 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2110 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2111 unsigned int val, cval; 2112 val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2113 cval = (val >> (idx * 4 + 8)) & 0x0f; 2114 val = (val >> (idx * 2)) & 0x03; 2115 if (val == 1) 2116 ucontrol->value.enumerated.item[0] = 11; 2117 else if (val == 2) 2118 ucontrol->value.enumerated.item[0] = (cval & 7) + 1; 2119 else if (val == 3) 2120 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9; 2121 else 2122 ucontrol->value.enumerated.item[0] = 0; 2123 return 0; 2124 } 2125 2126 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol, 2127 struct snd_ctl_elem_value *ucontrol) 2128 { 2129 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2130 int change, shift; 2131 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 2132 unsigned int val, old_val, nval; 2133 2134 /* update SPDOUT */ 2135 spin_lock_irq(&ice->reg_lock); 2136 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT)); 2137 if (ucontrol->value.enumerated.item[0] >= 11) 2138 nval = 1; 2139 else if (ucontrol->value.enumerated.item[0] >= 9) 2140 nval = 3; 2141 else if (ucontrol->value.enumerated.item[0] >= 1) 2142 nval = 2; 2143 else 2144 nval = 0; 2145 shift = idx * 2; 2146 val &= ~(0x03 << shift); 2147 val |= nval << shift; 2148 shift = idx * 4 + 8; 2149 if (nval == 2) { 2150 nval = ucontrol->value.enumerated.item[0] - 1; 2151 val &= ~(0x07 << shift); 2152 val |= nval << shift; 2153 } else if (nval == 3) { 2154 nval = (ucontrol->value.enumerated.item[0] - 9) << 3; 2155 val &= ~(0x08 << shift); 2156 val |= nval << shift; 2157 } 2158 change = val != old_val; 2159 if (change) 2160 outw(val, ICEMT(ice, ROUTE_SPDOUT)); 2161 spin_unlock_irq(&ice->reg_lock); 2162 return change; 2163 } 2164 2165 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = { 2166 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2167 .name = "H/W Playback Route", 2168 .info = snd_ice1712_pro_route_info, 2169 .get = snd_ice1712_pro_route_analog_get, 2170 .put = snd_ice1712_pro_route_analog_put, 2171 }; 2172 2173 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = { 2174 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2175 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route", 2176 .info = snd_ice1712_pro_route_info, 2177 .get = snd_ice1712_pro_route_spdif_get, 2178 .put = snd_ice1712_pro_route_spdif_put, 2179 .count = 2, 2180 }; 2181 2182 2183 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol, 2184 struct snd_ctl_elem_info *uinfo) 2185 { 2186 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2187 uinfo->count = 1; 2188 uinfo->value.integer.min = 0; 2189 uinfo->value.integer.max = 255; 2190 return 0; 2191 } 2192 2193 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol, 2194 struct snd_ctl_elem_value *ucontrol) 2195 { 2196 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2197 2198 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE)); 2199 return 0; 2200 } 2201 2202 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol, 2203 struct snd_ctl_elem_value *ucontrol) 2204 { 2205 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2206 int change; 2207 2208 spin_lock_irq(&ice->reg_lock); 2209 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0]; 2210 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE)); 2211 spin_unlock_irq(&ice->reg_lock); 2212 return change; 2213 } 2214 2215 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = { 2216 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2217 .name = "Multi Track Volume Rate", 2218 .info = snd_ice1712_pro_volume_rate_info, 2219 .get = snd_ice1712_pro_volume_rate_get, 2220 .put = snd_ice1712_pro_volume_rate_put 2221 }; 2222 2223 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol, 2224 struct snd_ctl_elem_info *uinfo) 2225 { 2226 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 2227 uinfo->count = 22; 2228 uinfo->value.integer.min = 0; 2229 uinfo->value.integer.max = 255; 2230 return 0; 2231 } 2232 2233 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol, 2234 struct snd_ctl_elem_value *ucontrol) 2235 { 2236 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 2237 int idx; 2238 2239 spin_lock_irq(&ice->reg_lock); 2240 for (idx = 0; idx < 22; idx++) { 2241 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX)); 2242 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA)); 2243 } 2244 spin_unlock_irq(&ice->reg_lock); 2245 return 0; 2246 } 2247 2248 static const struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = { 2249 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 2250 .name = "Multi Track Peak", 2251 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 2252 .info = snd_ice1712_pro_peak_info, 2253 .get = snd_ice1712_pro_peak_get 2254 }; 2255 2256 /* 2257 * 2258 */ 2259 2260 /* 2261 * list of available boards 2262 */ 2263 static struct snd_ice1712_card_info *card_tables[] = { 2264 snd_ice1712_hoontech_cards, 2265 snd_ice1712_delta_cards, 2266 snd_ice1712_ews_cards, 2267 NULL, 2268 }; 2269 2270 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice, 2271 unsigned char dev, 2272 unsigned char addr) 2273 { 2274 long t = 0x10000; 2275 2276 outb(addr, ICEREG(ice, I2C_BYTE_ADDR)); 2277 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR)); 2278 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ; 2279 return inb(ICEREG(ice, I2C_DATA)); 2280 } 2281 2282 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice, 2283 const char *modelname) 2284 { 2285 int dev = ICE_I2C_EEPROM_ADDR; /* I2C EEPROM device address */ 2286 unsigned int i, size; 2287 struct snd_ice1712_card_info * const *tbl, *c; 2288 2289 if (!modelname || !*modelname) { 2290 ice->eeprom.subvendor = 0; 2291 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0) 2292 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) | 2293 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) | 2294 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) | 2295 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24); 2296 if (ice->eeprom.subvendor == 0 || 2297 ice->eeprom.subvendor == (unsigned int)-1) { 2298 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */ 2299 u16 vendor, device; 2300 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor); 2301 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device); 2302 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device); 2303 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) { 2304 dev_err(ice->card->dev, 2305 "No valid ID is found\n"); 2306 return -ENXIO; 2307 } 2308 } 2309 } 2310 for (tbl = card_tables; *tbl; tbl++) { 2311 for (c = *tbl; c->subvendor; c++) { 2312 if (modelname && c->model && !strcmp(modelname, c->model)) { 2313 dev_info(ice->card->dev, 2314 "Using board model %s\n", c->name); 2315 ice->eeprom.subvendor = c->subvendor; 2316 } else if (c->subvendor != ice->eeprom.subvendor) 2317 continue; 2318 if (!c->eeprom_size || !c->eeprom_data) 2319 goto found; 2320 /* if the EEPROM is given by the driver, use it */ 2321 dev_dbg(ice->card->dev, "using the defined eeprom..\n"); 2322 ice->eeprom.version = 1; 2323 ice->eeprom.size = c->eeprom_size + 6; 2324 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size); 2325 goto read_skipped; 2326 } 2327 } 2328 dev_warn(ice->card->dev, "No matching model found for ID 0x%x\n", 2329 ice->eeprom.subvendor); 2330 2331 found: 2332 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04); 2333 if (ice->eeprom.size < 6) 2334 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */ 2335 else if (ice->eeprom.size > 32) { 2336 dev_err(ice->card->dev, 2337 "invalid EEPROM (size = %i)\n", ice->eeprom.size); 2338 return -EIO; 2339 } 2340 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05); 2341 if (ice->eeprom.version != 1) { 2342 dev_err(ice->card->dev, "invalid EEPROM version %i\n", 2343 ice->eeprom.version); 2344 /* return -EIO; */ 2345 } 2346 size = ice->eeprom.size - 6; 2347 for (i = 0; i < size; i++) 2348 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6); 2349 2350 read_skipped: 2351 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK]; 2352 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE]; 2353 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR]; 2354 2355 return 0; 2356 } 2357 2358 2359 2360 static int snd_ice1712_chip_init(struct snd_ice1712 *ice) 2361 { 2362 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2363 udelay(200); 2364 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL)); 2365 udelay(200); 2366 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE && 2367 !ice->dxr_enable) 2368 /* Set eeprom value to limit active ADCs and DACs to 6; 2369 * Also disable AC97 as no hardware in standard 6fire card/box 2370 * Note: DXR extensions are not currently supported 2371 */ 2372 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a; 2373 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]); 2374 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]); 2375 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]); 2376 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]); 2377 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) { 2378 ice->gpio.write_mask = ice->eeprom.gpiomask; 2379 ice->gpio.direction = ice->eeprom.gpiodir; 2380 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 2381 ice->eeprom.gpiomask); 2382 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 2383 ice->eeprom.gpiodir); 2384 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2385 ice->eeprom.gpiostate); 2386 } else { 2387 ice->gpio.write_mask = 0xc0; 2388 ice->gpio.direction = 0xff; 2389 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0); 2390 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff); 2391 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, 2392 ICE1712_STDSP24_CLOCK_BIT); 2393 } 2394 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0); 2395 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) { 2396 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD)); 2397 udelay(100); 2398 outb(0, ICEREG(ice, AC97_CMD)); 2399 udelay(200); 2400 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0); 2401 } 2402 snd_ice1712_set_pro_rate(ice, 48000, 1); 2403 /* unmask used interrupts */ 2404 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ? 2405 ICE1712_IRQ_MPU2 : 0) | 2406 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ? 2407 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0), 2408 ICEREG(ice, IRQMASK)); 2409 outb(0x00, ICEMT(ice, IRQ)); 2410 2411 return 0; 2412 } 2413 2414 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice) 2415 { 2416 int err; 2417 struct snd_kcontrol *kctl; 2418 2419 if (snd_BUG_ON(!ice->pcm_pro)) 2420 return -EIO; 2421 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice)); 2422 if (err < 0) 2423 return err; 2424 kctl->id.device = ice->pcm_pro->device; 2425 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice)); 2426 if (err < 0) 2427 return err; 2428 kctl->id.device = ice->pcm_pro->device; 2429 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice)); 2430 if (err < 0) 2431 return err; 2432 kctl->id.device = ice->pcm_pro->device; 2433 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice)); 2434 if (err < 0) 2435 return err; 2436 kctl->id.device = ice->pcm_pro->device; 2437 ice->spdif.stream_ctl = kctl; 2438 return 0; 2439 } 2440 2441 2442 static int snd_ice1712_build_controls(struct snd_ice1712 *ice) 2443 { 2444 int err; 2445 2446 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice)); 2447 if (err < 0) 2448 return err; 2449 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice)); 2450 if (err < 0) 2451 return err; 2452 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice)); 2453 if (err < 0) 2454 return err; 2455 2456 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice)); 2457 if (err < 0) 2458 return err; 2459 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice)); 2460 if (err < 0) 2461 return err; 2462 2463 if (ice->num_total_dacs > 0) { 2464 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route; 2465 tmp.count = ice->num_total_dacs; 2466 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice)); 2467 if (err < 0) 2468 return err; 2469 } 2470 2471 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice)); 2472 if (err < 0) 2473 return err; 2474 2475 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice)); 2476 if (err < 0) 2477 return err; 2478 return snd_ctl_add(ice->card, 2479 snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice)); 2480 } 2481 2482 static int snd_ice1712_free(struct snd_ice1712 *ice) 2483 { 2484 if (!ice->port) 2485 goto __hw_end; 2486 /* mask all interrupts */ 2487 outb(ICE1712_MULTI_CAPTURE | ICE1712_MULTI_PLAYBACK, ICEMT(ice, IRQ)); 2488 outb(0xff, ICEREG(ice, IRQMASK)); 2489 /* --- */ 2490 __hw_end: 2491 if (ice->irq >= 0) 2492 free_irq(ice->irq, ice); 2493 2494 if (ice->port) 2495 pci_release_regions(ice->pci); 2496 snd_ice1712_akm4xxx_free(ice); 2497 pci_disable_device(ice->pci); 2498 kfree(ice->spec); 2499 kfree(ice); 2500 return 0; 2501 } 2502 2503 static int snd_ice1712_dev_free(struct snd_device *device) 2504 { 2505 struct snd_ice1712 *ice = device->device_data; 2506 return snd_ice1712_free(ice); 2507 } 2508 2509 static int snd_ice1712_create(struct snd_card *card, 2510 struct pci_dev *pci, 2511 const char *modelname, 2512 int omni, 2513 int cs8427_timeout, 2514 int dxr_enable, 2515 struct snd_ice1712 **r_ice1712) 2516 { 2517 struct snd_ice1712 *ice; 2518 int err; 2519 static struct snd_device_ops ops = { 2520 .dev_free = snd_ice1712_dev_free, 2521 }; 2522 2523 *r_ice1712 = NULL; 2524 2525 /* enable PCI device */ 2526 err = pci_enable_device(pci); 2527 if (err < 0) 2528 return err; 2529 /* check, if we can restrict PCI DMA transfers to 28 bits */ 2530 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(28)) < 0 || 2531 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(28)) < 0) { 2532 dev_err(card->dev, 2533 "architecture does not support 28bit PCI busmaster DMA\n"); 2534 pci_disable_device(pci); 2535 return -ENXIO; 2536 } 2537 2538 ice = kzalloc(sizeof(*ice), GFP_KERNEL); 2539 if (ice == NULL) { 2540 pci_disable_device(pci); 2541 return -ENOMEM; 2542 } 2543 ice->omni = omni ? 1 : 0; 2544 if (cs8427_timeout < 1) 2545 cs8427_timeout = 1; 2546 else if (cs8427_timeout > 1000) 2547 cs8427_timeout = 1000; 2548 ice->cs8427_timeout = cs8427_timeout; 2549 ice->dxr_enable = dxr_enable; 2550 spin_lock_init(&ice->reg_lock); 2551 mutex_init(&ice->gpio_mutex); 2552 mutex_init(&ice->i2c_mutex); 2553 mutex_init(&ice->open_mutex); 2554 ice->gpio.set_mask = snd_ice1712_set_gpio_mask; 2555 ice->gpio.get_mask = snd_ice1712_get_gpio_mask; 2556 ice->gpio.set_dir = snd_ice1712_set_gpio_dir; 2557 ice->gpio.get_dir = snd_ice1712_get_gpio_dir; 2558 ice->gpio.set_data = snd_ice1712_set_gpio_data; 2559 ice->gpio.get_data = snd_ice1712_get_gpio_data; 2560 2561 ice->spdif.cs8403_bits = 2562 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */ 2563 0x10 | /* no emphasis */ 2564 0x20); /* PCM encoder/decoder */ 2565 ice->card = card; 2566 ice->pci = pci; 2567 ice->irq = -1; 2568 pci_set_master(pci); 2569 /* disable legacy emulation */ 2570 pci_write_config_word(ice->pci, 0x40, 0x807f); 2571 pci_write_config_word(ice->pci, 0x42, 0x0006); 2572 snd_ice1712_proc_init(ice); 2573 synchronize_irq(pci->irq); 2574 2575 card->private_data = ice; 2576 2577 err = pci_request_regions(pci, "ICE1712"); 2578 if (err < 0) { 2579 kfree(ice); 2580 pci_disable_device(pci); 2581 return err; 2582 } 2583 ice->port = pci_resource_start(pci, 0); 2584 ice->ddma_port = pci_resource_start(pci, 1); 2585 ice->dmapath_port = pci_resource_start(pci, 2); 2586 ice->profi_port = pci_resource_start(pci, 3); 2587 2588 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED, 2589 KBUILD_MODNAME, ice)) { 2590 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 2591 snd_ice1712_free(ice); 2592 return -EIO; 2593 } 2594 2595 ice->irq = pci->irq; 2596 2597 if (snd_ice1712_read_eeprom(ice, modelname) < 0) { 2598 snd_ice1712_free(ice); 2599 return -EIO; 2600 } 2601 if (snd_ice1712_chip_init(ice) < 0) { 2602 snd_ice1712_free(ice); 2603 return -EIO; 2604 } 2605 2606 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops); 2607 if (err < 0) { 2608 snd_ice1712_free(ice); 2609 return err; 2610 } 2611 2612 *r_ice1712 = ice; 2613 return 0; 2614 } 2615 2616 2617 /* 2618 * 2619 * Registration 2620 * 2621 */ 2622 2623 static struct snd_ice1712_card_info no_matched; 2624 2625 static int snd_ice1712_probe(struct pci_dev *pci, 2626 const struct pci_device_id *pci_id) 2627 { 2628 static int dev; 2629 struct snd_card *card; 2630 struct snd_ice1712 *ice; 2631 int pcm_dev = 0, err; 2632 struct snd_ice1712_card_info * const *tbl, *c; 2633 2634 if (dev >= SNDRV_CARDS) 2635 return -ENODEV; 2636 if (!enable[dev]) { 2637 dev++; 2638 return -ENOENT; 2639 } 2640 2641 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 2642 0, &card); 2643 if (err < 0) 2644 return err; 2645 2646 strcpy(card->driver, "ICE1712"); 2647 strcpy(card->shortname, "ICEnsemble ICE1712"); 2648 2649 err = snd_ice1712_create(card, pci, model[dev], omni[dev], 2650 cs8427_timeout[dev], dxr_enable[dev], &ice); 2651 if (err < 0) { 2652 snd_card_free(card); 2653 return err; 2654 } 2655 2656 for (tbl = card_tables; *tbl; tbl++) { 2657 for (c = *tbl; c->subvendor; c++) { 2658 if (c->subvendor == ice->eeprom.subvendor) { 2659 ice->card_info = c; 2660 strcpy(card->shortname, c->name); 2661 if (c->driver) /* specific driver? */ 2662 strcpy(card->driver, c->driver); 2663 if (c->chip_init) { 2664 err = c->chip_init(ice); 2665 if (err < 0) { 2666 snd_card_free(card); 2667 return err; 2668 } 2669 } 2670 goto __found; 2671 } 2672 } 2673 } 2674 c = &no_matched; 2675 __found: 2676 2677 err = snd_ice1712_pcm_profi(ice, pcm_dev++); 2678 if (err < 0) { 2679 snd_card_free(card); 2680 return err; 2681 } 2682 2683 if (ice_has_con_ac97(ice)) { 2684 err = snd_ice1712_pcm(ice, pcm_dev++); 2685 if (err < 0) { 2686 snd_card_free(card); 2687 return err; 2688 } 2689 } 2690 2691 err = snd_ice1712_ac97_mixer(ice); 2692 if (err < 0) { 2693 snd_card_free(card); 2694 return err; 2695 } 2696 2697 err = snd_ice1712_build_controls(ice); 2698 if (err < 0) { 2699 snd_card_free(card); 2700 return err; 2701 } 2702 2703 if (c->build_controls) { 2704 err = c->build_controls(ice); 2705 if (err < 0) { 2706 snd_card_free(card); 2707 return err; 2708 } 2709 } 2710 2711 if (ice_has_con_ac97(ice)) { 2712 err = snd_ice1712_pcm_ds(ice, pcm_dev++); 2713 if (err < 0) { 2714 snd_card_free(card); 2715 return err; 2716 } 2717 } 2718 2719 if (!c->no_mpu401) { 2720 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712, 2721 ICEREG(ice, MPU1_CTRL), 2722 c->mpu401_1_info_flags | 2723 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2724 -1, &ice->rmidi[0]); 2725 if (err < 0) { 2726 snd_card_free(card); 2727 return err; 2728 } 2729 if (c->mpu401_1_name) 2730 /* Preferred name available in card_info */ 2731 snprintf(ice->rmidi[0]->name, 2732 sizeof(ice->rmidi[0]->name), 2733 "%s %d", c->mpu401_1_name, card->number); 2734 2735 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) { 2736 /* 2nd port used */ 2737 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712, 2738 ICEREG(ice, MPU2_CTRL), 2739 c->mpu401_2_info_flags | 2740 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 2741 -1, &ice->rmidi[1]); 2742 2743 if (err < 0) { 2744 snd_card_free(card); 2745 return err; 2746 } 2747 if (c->mpu401_2_name) 2748 /* Preferred name available in card_info */ 2749 snprintf(ice->rmidi[1]->name, 2750 sizeof(ice->rmidi[1]->name), 2751 "%s %d", c->mpu401_2_name, 2752 card->number); 2753 } 2754 } 2755 2756 snd_ice1712_set_input_clock_source(ice, 0); 2757 2758 sprintf(card->longname, "%s at 0x%lx, irq %i", 2759 card->shortname, ice->port, ice->irq); 2760 2761 err = snd_card_register(card); 2762 if (err < 0) { 2763 snd_card_free(card); 2764 return err; 2765 } 2766 pci_set_drvdata(pci, card); 2767 dev++; 2768 return 0; 2769 } 2770 2771 static void snd_ice1712_remove(struct pci_dev *pci) 2772 { 2773 struct snd_card *card = pci_get_drvdata(pci); 2774 struct snd_ice1712 *ice = card->private_data; 2775 2776 if (ice->card_info && ice->card_info->chip_exit) 2777 ice->card_info->chip_exit(ice); 2778 snd_card_free(card); 2779 } 2780 2781 #ifdef CONFIG_PM_SLEEP 2782 static int snd_ice1712_suspend(struct device *dev) 2783 { 2784 struct snd_card *card = dev_get_drvdata(dev); 2785 struct snd_ice1712 *ice = card->private_data; 2786 2787 if (!ice->pm_suspend_enabled) 2788 return 0; 2789 2790 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 2791 2792 snd_ac97_suspend(ice->ac97); 2793 2794 spin_lock_irq(&ice->reg_lock); 2795 ice->pm_saved_is_spdif_master = is_spdif_master(ice); 2796 ice->pm_saved_spdif_ctrl = inw(ICEMT(ice, ROUTE_SPDOUT)); 2797 ice->pm_saved_route = inw(ICEMT(ice, ROUTE_PSDOUT03)); 2798 spin_unlock_irq(&ice->reg_lock); 2799 2800 if (ice->pm_suspend) 2801 ice->pm_suspend(ice); 2802 return 0; 2803 } 2804 2805 static int snd_ice1712_resume(struct device *dev) 2806 { 2807 struct snd_card *card = dev_get_drvdata(dev); 2808 struct snd_ice1712 *ice = card->private_data; 2809 int rate; 2810 2811 if (!ice->pm_suspend_enabled) 2812 return 0; 2813 2814 if (ice->cur_rate) 2815 rate = ice->cur_rate; 2816 else 2817 rate = PRO_RATE_DEFAULT; 2818 2819 if (snd_ice1712_chip_init(ice) < 0) { 2820 snd_card_disconnect(card); 2821 return -EIO; 2822 } 2823 2824 ice->cur_rate = rate; 2825 2826 if (ice->pm_resume) 2827 ice->pm_resume(ice); 2828 2829 if (ice->pm_saved_is_spdif_master) { 2830 /* switching to external clock via SPDIF */ 2831 spin_lock_irq(&ice->reg_lock); 2832 outb(inb(ICEMT(ice, RATE)) | ICE1712_SPDIF_MASTER, 2833 ICEMT(ice, RATE)); 2834 spin_unlock_irq(&ice->reg_lock); 2835 snd_ice1712_set_input_clock_source(ice, 1); 2836 } else { 2837 /* internal on-card clock */ 2838 snd_ice1712_set_pro_rate(ice, rate, 1); 2839 snd_ice1712_set_input_clock_source(ice, 0); 2840 } 2841 2842 outw(ice->pm_saved_spdif_ctrl, ICEMT(ice, ROUTE_SPDOUT)); 2843 outw(ice->pm_saved_route, ICEMT(ice, ROUTE_PSDOUT03)); 2844 2845 snd_ac97_resume(ice->ac97); 2846 2847 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 2848 return 0; 2849 } 2850 2851 static SIMPLE_DEV_PM_OPS(snd_ice1712_pm, snd_ice1712_suspend, snd_ice1712_resume); 2852 #define SND_VT1712_PM_OPS &snd_ice1712_pm 2853 #else 2854 #define SND_VT1712_PM_OPS NULL 2855 #endif /* CONFIG_PM_SLEEP */ 2856 2857 static struct pci_driver ice1712_driver = { 2858 .name = KBUILD_MODNAME, 2859 .id_table = snd_ice1712_ids, 2860 .probe = snd_ice1712_probe, 2861 .remove = snd_ice1712_remove, 2862 .driver = { 2863 .pm = SND_VT1712_PM_OPS, 2864 }, 2865 }; 2866 2867 module_pci_driver(ice1712_driver); 2868