1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496, 5 * Audiophile, Digigram VX442 6 * 7 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <linux/delay.h> 26 #include <linux/interrupt.h> 27 #include <linux/init.h> 28 #include <linux/slab.h> 29 #include <linux/mutex.h> 30 31 #include <sound/core.h> 32 #include <sound/cs8427.h> 33 #include <sound/asoundef.h> 34 35 #include "ice1712.h" 36 #include "delta.h" 37 38 #define SND_CS8403 39 #include <sound/cs8403.h> 40 41 42 /* 43 * CS8427 via SPI mode (for Audiophile), emulated I2C 44 */ 45 46 /* send 8 bits */ 47 static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp) 48 { 49 int idx; 50 51 for (idx = 7; idx >= 0; idx--) { 52 tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK); 53 if (data & (1 << idx)) 54 tmp |= ICE1712_DELTA_AP_DOUT; 55 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 56 udelay(5); 57 tmp |= ICE1712_DELTA_AP_CCLK; 58 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 59 udelay(5); 60 } 61 } 62 63 /* read 8 bits */ 64 static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp) 65 { 66 unsigned char data = 0; 67 int idx; 68 69 for (idx = 7; idx >= 0; idx--) { 70 tmp &= ~ICE1712_DELTA_AP_CCLK; 71 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 72 udelay(5); 73 if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN) 74 data |= 1 << idx; 75 tmp |= ICE1712_DELTA_AP_CCLK; 76 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 77 udelay(5); 78 } 79 return data; 80 } 81 82 /* assert chip select */ 83 static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice) 84 { 85 unsigned char tmp; 86 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 87 switch (ice->eeprom.subvendor) { 88 case ICE1712_SUBDEVICE_DELTA1010E: 89 case ICE1712_SUBDEVICE_DELTA1010LT: 90 tmp &= ~ICE1712_DELTA_1010LT_CS; 91 tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427; 92 break; 93 case ICE1712_SUBDEVICE_AUDIOPHILE: 94 case ICE1712_SUBDEVICE_DELTA410: 95 tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC; 96 tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL; 97 break; 98 case ICE1712_SUBDEVICE_DELTA66E: 99 tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A | 100 ICE1712_DELTA_66E_CS_CHIP_B; 101 tmp &= ~ICE1712_DELTA_66E_CS_CS8427; 102 break; 103 case ICE1712_SUBDEVICE_VX442: 104 tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B; 105 tmp &= ~ICE1712_VX442_CS_DIGITAL; 106 break; 107 } 108 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 109 udelay(5); 110 return tmp; 111 } 112 113 /* deassert chip select */ 114 static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp) 115 { 116 switch (ice->eeprom.subvendor) { 117 case ICE1712_SUBDEVICE_DELTA1010E: 118 case ICE1712_SUBDEVICE_DELTA1010LT: 119 tmp &= ~ICE1712_DELTA_1010LT_CS; 120 tmp |= ICE1712_DELTA_1010LT_CS_NONE; 121 break; 122 case ICE1712_SUBDEVICE_AUDIOPHILE: 123 case ICE1712_SUBDEVICE_DELTA410: 124 tmp |= ICE1712_DELTA_AP_CS_DIGITAL; 125 break; 126 case ICE1712_SUBDEVICE_DELTA66E: 127 tmp |= ICE1712_DELTA_66E_CS_CS8427; 128 break; 129 case ICE1712_SUBDEVICE_VX442: 130 tmp |= ICE1712_VX442_CS_DIGITAL; 131 break; 132 } 133 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 134 } 135 136 /* sequential write */ 137 static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 138 { 139 struct snd_ice1712 *ice = device->bus->private_data; 140 int res = count; 141 unsigned char tmp; 142 143 mutex_lock(&ice->gpio_mutex); 144 tmp = ap_cs8427_codec_select(ice); 145 ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */ 146 while (count-- > 0) 147 ap_cs8427_write_byte(ice, *bytes++, tmp); 148 ap_cs8427_codec_deassert(ice, tmp); 149 mutex_unlock(&ice->gpio_mutex); 150 return res; 151 } 152 153 /* sequential read */ 154 static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 155 { 156 struct snd_ice1712 *ice = device->bus->private_data; 157 int res = count; 158 unsigned char tmp; 159 160 mutex_lock(&ice->gpio_mutex); 161 tmp = ap_cs8427_codec_select(ice); 162 ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */ 163 while (count-- > 0) 164 *bytes++ = ap_cs8427_read_byte(ice, tmp); 165 ap_cs8427_codec_deassert(ice, tmp); 166 mutex_unlock(&ice->gpio_mutex); 167 return res; 168 } 169 170 static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr) 171 { 172 if (addr == 0x10) 173 return 1; 174 return -ENOENT; 175 } 176 177 static struct snd_i2c_ops ap_cs8427_i2c_ops = { 178 .sendbytes = ap_cs8427_sendbytes, 179 .readbytes = ap_cs8427_readbytes, 180 .probeaddr = ap_cs8427_probeaddr, 181 }; 182 183 /* 184 */ 185 186 static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits) 187 { 188 unsigned char tmp, mask1, mask2; 189 int idx; 190 /* send byte to transmitter */ 191 mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK; 192 mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA; 193 mutex_lock(&ice->gpio_mutex); 194 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 195 for (idx = 7; idx >= 0; idx--) { 196 tmp &= ~(mask1 | mask2); 197 if (bits & (1 << idx)) 198 tmp |= mask2; 199 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 200 udelay(100); 201 tmp |= mask1; 202 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 203 udelay(100); 204 } 205 tmp &= ~mask1; 206 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 207 mutex_unlock(&ice->gpio_mutex); 208 } 209 210 211 static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 212 { 213 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits); 214 } 215 216 static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 217 { 218 unsigned int val; 219 int change; 220 221 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 222 spin_lock_irq(&ice->reg_lock); 223 change = ice->spdif.cs8403_bits != val; 224 ice->spdif.cs8403_bits = val; 225 if (change && ice->playback_pro_substream == NULL) { 226 spin_unlock_irq(&ice->reg_lock); 227 snd_ice1712_delta_cs8403_spdif_write(ice, val); 228 } else { 229 spin_unlock_irq(&ice->reg_lock); 230 } 231 return change; 232 } 233 234 static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 235 { 236 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits); 237 } 238 239 static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 240 { 241 unsigned int val; 242 int change; 243 244 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 245 spin_lock_irq(&ice->reg_lock); 246 change = ice->spdif.cs8403_stream_bits != val; 247 ice->spdif.cs8403_stream_bits = val; 248 if (change && ice->playback_pro_substream != NULL) { 249 spin_unlock_irq(&ice->reg_lock); 250 snd_ice1712_delta_cs8403_spdif_write(ice, val); 251 } else { 252 spin_unlock_irq(&ice->reg_lock); 253 } 254 return change; 255 } 256 257 258 /* 259 * AK4524 on Delta 44 and 66 to choose the chip mask 260 */ 261 static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip) 262 { 263 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 264 struct snd_ice1712 *ice = ak->private_data[0]; 265 266 snd_ice1712_save_gpio_status(ice); 267 priv->cs_mask = 268 priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A : 269 ICE1712_DELTA_CODEC_CHIP_B; 270 } 271 272 /* 273 * AK4524 on Delta1010LT to choose the chip address 274 */ 275 static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip) 276 { 277 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 278 struct snd_ice1712 *ice = ak->private_data[0]; 279 280 snd_ice1712_save_gpio_status(ice); 281 priv->cs_mask = ICE1712_DELTA_1010LT_CS; 282 priv->cs_addr = chip << 4; 283 } 284 285 /* 286 * AK4524 on Delta66 rev E to choose the chip address 287 */ 288 static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip) 289 { 290 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 291 struct snd_ice1712 *ice = ak->private_data[0]; 292 293 snd_ice1712_save_gpio_status(ice); 294 priv->cs_mask = 295 priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A : 296 ICE1712_DELTA_66E_CS_CHIP_B; 297 } 298 299 /* 300 * AK4528 on VX442 to choose the chip mask 301 */ 302 static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip) 303 { 304 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 305 struct snd_ice1712 *ice = ak->private_data[0]; 306 307 snd_ice1712_save_gpio_status(ice); 308 priv->cs_mask = 309 priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A : 310 ICE1712_VX442_CODEC_CHIP_B; 311 } 312 313 /* 314 * change the DFS bit according rate for Delta1010 315 */ 316 static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate) 317 { 318 unsigned char tmp, tmp2; 319 320 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 321 return; 322 323 mutex_lock(&ice->gpio_mutex); 324 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 325 tmp2 = tmp & ~ICE1712_DELTA_DFS; 326 if (rate > 48000) 327 tmp2 |= ICE1712_DELTA_DFS; 328 if (tmp != tmp2) 329 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2); 330 mutex_unlock(&ice->gpio_mutex); 331 } 332 333 /* 334 * change the rate of AK4524 on Delta 44/66, AP, 1010LT 335 */ 336 static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 337 { 338 unsigned char tmp, tmp2; 339 struct snd_ice1712 *ice = ak->private_data[0]; 340 341 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 342 return; 343 344 /* check before reset ak4524 to avoid unnecessary clicks */ 345 mutex_lock(&ice->gpio_mutex); 346 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 347 mutex_unlock(&ice->gpio_mutex); 348 tmp2 = tmp & ~ICE1712_DELTA_DFS; 349 if (rate > 48000) 350 tmp2 |= ICE1712_DELTA_DFS; 351 if (tmp == tmp2) 352 return; 353 354 /* do it again */ 355 snd_akm4xxx_reset(ak, 1); 356 mutex_lock(&ice->gpio_mutex); 357 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS; 358 if (rate > 48000) 359 tmp |= ICE1712_DELTA_DFS; 360 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 361 mutex_unlock(&ice->gpio_mutex); 362 snd_akm4xxx_reset(ak, 0); 363 } 364 365 /* 366 * change the rate of AK4524 on VX442 367 */ 368 static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 369 { 370 unsigned char val; 371 372 val = (rate > 48000) ? 0x65 : 0x60; 373 if (snd_akm4xxx_get(ak, 0, 0x02) != val || 374 snd_akm4xxx_get(ak, 1, 0x02) != val) { 375 snd_akm4xxx_reset(ak, 1); 376 snd_akm4xxx_write(ak, 0, 0x02, val); 377 snd_akm4xxx_write(ak, 1, 0x02, val); 378 snd_akm4xxx_reset(ak, 0); 379 } 380 } 381 382 383 /* 384 * SPDIF ops for Delta 1010, Dio, 66 385 */ 386 387 /* open callback */ 388 static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 389 { 390 ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits; 391 } 392 393 /* set up */ 394 static void delta_setup_spdif(struct snd_ice1712 *ice, int rate) 395 { 396 unsigned long flags; 397 unsigned int tmp; 398 int change; 399 400 spin_lock_irqsave(&ice->reg_lock, flags); 401 tmp = ice->spdif.cs8403_stream_bits; 402 if (tmp & 0x01) /* consumer */ 403 tmp &= (tmp & 0x01) ? ~0x06 : ~0x18; 404 switch (rate) { 405 case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break; 406 case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break; 407 case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break; 408 default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break; 409 } 410 change = ice->spdif.cs8403_stream_bits != tmp; 411 ice->spdif.cs8403_stream_bits = tmp; 412 spin_unlock_irqrestore(&ice->reg_lock, flags); 413 if (change) 414 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id); 415 snd_ice1712_delta_cs8403_spdif_write(ice, tmp); 416 } 417 418 #define snd_ice1712_delta1010lt_wordclock_status_info \ 419 snd_ctl_boolean_mono_info 420 421 static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol, 422 struct snd_ctl_elem_value *ucontrol) 423 { 424 char reg = 0x10; /* CS8427 receiver error register */ 425 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 426 427 if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1) 428 snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg); 429 snd_i2c_readbytes(ice->cs8427, ®, 1); 430 ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0; 431 return 0; 432 } 433 434 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status = 435 { 436 .access = (SNDRV_CTL_ELEM_ACCESS_READ), 437 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 438 .name = "Word Clock Status", 439 .info = snd_ice1712_delta1010lt_wordclock_status_info, 440 .get = snd_ice1712_delta1010lt_wordclock_status_get, 441 }; 442 443 /* 444 * initialize the chips on M-Audio cards 445 */ 446 447 static struct snd_akm4xxx akm_audiophile = { 448 .type = SND_AK4528, 449 .num_adcs = 2, 450 .num_dacs = 2, 451 .ops = { 452 .set_rate_val = delta_ak4524_set_rate_val 453 } 454 }; 455 456 static struct snd_ak4xxx_private akm_audiophile_priv = { 457 .caddr = 2, 458 .cif = 0, 459 .data_mask = ICE1712_DELTA_AP_DOUT, 460 .clk_mask = ICE1712_DELTA_AP_CCLK, 461 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 462 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 463 .cs_none = 0, 464 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 465 .mask_flags = 0, 466 }; 467 468 static struct snd_akm4xxx akm_delta410 = { 469 .type = SND_AK4529, 470 .num_adcs = 2, 471 .num_dacs = 8, 472 .ops = { 473 .set_rate_val = delta_ak4524_set_rate_val 474 } 475 }; 476 477 static struct snd_ak4xxx_private akm_delta410_priv = { 478 .caddr = 0, 479 .cif = 0, 480 .data_mask = ICE1712_DELTA_AP_DOUT, 481 .clk_mask = ICE1712_DELTA_AP_CCLK, 482 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 483 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 484 .cs_none = 0, 485 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 486 .mask_flags = 0, 487 }; 488 489 static struct snd_akm4xxx akm_delta1010lt = { 490 .type = SND_AK4524, 491 .num_adcs = 8, 492 .num_dacs = 8, 493 .ops = { 494 .lock = delta1010lt_ak4524_lock, 495 .set_rate_val = delta_ak4524_set_rate_val 496 } 497 }; 498 499 static struct snd_ak4xxx_private akm_delta1010lt_priv = { 500 .caddr = 2, 501 .cif = 0, /* the default level of the CIF pin from AK4524 */ 502 .data_mask = ICE1712_DELTA_1010LT_DOUT, 503 .clk_mask = ICE1712_DELTA_1010LT_CCLK, 504 .cs_mask = 0, 505 .cs_addr = 0, /* set later */ 506 .cs_none = ICE1712_DELTA_1010LT_CS_NONE, 507 .add_flags = 0, 508 .mask_flags = 0, 509 }; 510 511 static struct snd_akm4xxx akm_delta66e = { 512 .type = SND_AK4524, 513 .num_adcs = 4, 514 .num_dacs = 4, 515 .ops = { 516 .lock = delta66e_ak4524_lock, 517 .set_rate_val = delta_ak4524_set_rate_val 518 } 519 }; 520 521 static struct snd_ak4xxx_private akm_delta66e_priv = { 522 .caddr = 2, 523 .cif = 0, /* the default level of the CIF pin from AK4524 */ 524 .data_mask = ICE1712_DELTA_66E_DOUT, 525 .clk_mask = ICE1712_DELTA_66E_CCLK, 526 .cs_mask = 0, 527 .cs_addr = 0, /* set later */ 528 .cs_none = 0, 529 .add_flags = 0, 530 .mask_flags = 0, 531 }; 532 533 534 static struct snd_akm4xxx akm_delta44 = { 535 .type = SND_AK4524, 536 .num_adcs = 4, 537 .num_dacs = 4, 538 .ops = { 539 .lock = delta_ak4524_lock, 540 .set_rate_val = delta_ak4524_set_rate_val 541 } 542 }; 543 544 static struct snd_ak4xxx_private akm_delta44_priv = { 545 .caddr = 2, 546 .cif = 0, /* the default level of the CIF pin from AK4524 */ 547 .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA, 548 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK, 549 .cs_mask = 0, 550 .cs_addr = 0, /* set later */ 551 .cs_none = 0, 552 .add_flags = 0, 553 .mask_flags = 0, 554 }; 555 556 static struct snd_akm4xxx akm_vx442 = { 557 .type = SND_AK4524, 558 .num_adcs = 4, 559 .num_dacs = 4, 560 .ops = { 561 .lock = vx442_ak4524_lock, 562 .set_rate_val = vx442_ak4524_set_rate_val 563 } 564 }; 565 566 static struct snd_ak4xxx_private akm_vx442_priv = { 567 .caddr = 2, 568 .cif = 0, 569 .data_mask = ICE1712_VX442_DOUT, 570 .clk_mask = ICE1712_VX442_CCLK, 571 .cs_mask = 0, 572 .cs_addr = 0, /* set later */ 573 .cs_none = 0, 574 .add_flags = 0, 575 .mask_flags = 0, 576 }; 577 578 static int snd_ice1712_delta_init(struct snd_ice1712 *ice) 579 { 580 int err; 581 struct snd_akm4xxx *ak; 582 unsigned char tmp; 583 584 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 && 585 ice->eeprom.gpiodir == 0x7b) 586 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E; 587 588 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 && 589 ice->eeprom.gpiodir == 0xfb) 590 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E; 591 592 /* determine I2C, DACs and ADCs */ 593 switch (ice->eeprom.subvendor) { 594 case ICE1712_SUBDEVICE_AUDIOPHILE: 595 ice->num_total_dacs = 2; 596 ice->num_total_adcs = 2; 597 break; 598 case ICE1712_SUBDEVICE_DELTA410: 599 ice->num_total_dacs = 8; 600 ice->num_total_adcs = 2; 601 break; 602 case ICE1712_SUBDEVICE_DELTA44: 603 case ICE1712_SUBDEVICE_DELTA66: 604 ice->num_total_dacs = ice->omni ? 8 : 4; 605 ice->num_total_adcs = ice->omni ? 8 : 4; 606 break; 607 case ICE1712_SUBDEVICE_DELTA1010: 608 case ICE1712_SUBDEVICE_DELTA1010E: 609 case ICE1712_SUBDEVICE_DELTA1010LT: 610 case ICE1712_SUBDEVICE_MEDIASTATION: 611 case ICE1712_SUBDEVICE_EDIROLDA2496: 612 ice->num_total_dacs = 8; 613 ice->num_total_adcs = 8; 614 break; 615 case ICE1712_SUBDEVICE_DELTADIO2496: 616 ice->num_total_dacs = 4; /* two AK4324 codecs */ 617 break; 618 case ICE1712_SUBDEVICE_VX442: 619 case ICE1712_SUBDEVICE_DELTA66E: /* omni not supported yet */ 620 ice->num_total_dacs = 4; 621 ice->num_total_adcs = 4; 622 break; 623 } 624 625 /* initialize the SPI clock to high */ 626 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 627 tmp |= ICE1712_DELTA_AP_CCLK; 628 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 629 udelay(5); 630 631 /* initialize spdif */ 632 switch (ice->eeprom.subvendor) { 633 case ICE1712_SUBDEVICE_AUDIOPHILE: 634 case ICE1712_SUBDEVICE_DELTA410: 635 case ICE1712_SUBDEVICE_DELTA1010E: 636 case ICE1712_SUBDEVICE_DELTA1010LT: 637 case ICE1712_SUBDEVICE_VX442: 638 case ICE1712_SUBDEVICE_DELTA66E: 639 if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) { 640 snd_printk(KERN_ERR "unable to create I2C bus\n"); 641 return err; 642 } 643 ice->i2c->private_data = ice; 644 ice->i2c->ops = &ap_cs8427_i2c_ops; 645 if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0) 646 return err; 647 break; 648 case ICE1712_SUBDEVICE_DELTA1010: 649 case ICE1712_SUBDEVICE_MEDIASTATION: 650 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 651 break; 652 case ICE1712_SUBDEVICE_DELTADIO2496: 653 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 654 /* fall thru */ 655 case ICE1712_SUBDEVICE_DELTA66: 656 ice->spdif.ops.open = delta_open_spdif; 657 ice->spdif.ops.setup_rate = delta_setup_spdif; 658 ice->spdif.ops.default_get = delta_spdif_default_get; 659 ice->spdif.ops.default_put = delta_spdif_default_put; 660 ice->spdif.ops.stream_get = delta_spdif_stream_get; 661 ice->spdif.ops.stream_put = delta_spdif_stream_put; 662 /* Set spdif defaults */ 663 snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits); 664 break; 665 } 666 667 /* no analog? */ 668 switch (ice->eeprom.subvendor) { 669 case ICE1712_SUBDEVICE_DELTA1010: 670 case ICE1712_SUBDEVICE_DELTA1010E: 671 case ICE1712_SUBDEVICE_DELTADIO2496: 672 case ICE1712_SUBDEVICE_MEDIASTATION: 673 return 0; 674 } 675 676 /* second stage of initialization, analog parts and others */ 677 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 678 if (! ak) 679 return -ENOMEM; 680 ice->akm_codecs = 1; 681 682 switch (ice->eeprom.subvendor) { 683 case ICE1712_SUBDEVICE_AUDIOPHILE: 684 err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice); 685 break; 686 case ICE1712_SUBDEVICE_DELTA410: 687 err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice); 688 break; 689 case ICE1712_SUBDEVICE_DELTA1010LT: 690 case ICE1712_SUBDEVICE_EDIROLDA2496: 691 err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice); 692 break; 693 case ICE1712_SUBDEVICE_DELTA66: 694 case ICE1712_SUBDEVICE_DELTA44: 695 err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice); 696 break; 697 case ICE1712_SUBDEVICE_VX442: 698 err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice); 699 break; 700 case ICE1712_SUBDEVICE_DELTA66E: 701 err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice); 702 break; 703 default: 704 snd_BUG(); 705 return -EINVAL; 706 } 707 708 return err; 709 } 710 711 712 /* 713 * additional controls for M-Audio cards 714 */ 715 716 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select = 717 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0); 718 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select = 719 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0); 720 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status = 721 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 722 static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select = 723 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0); 724 static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status = 725 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 726 727 728 static int snd_ice1712_delta_add_controls(struct snd_ice1712 *ice) 729 { 730 int err; 731 732 /* 1010 and dio specific controls */ 733 switch (ice->eeprom.subvendor) { 734 case ICE1712_SUBDEVICE_DELTA1010: 735 case ICE1712_SUBDEVICE_MEDIASTATION: 736 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice)); 737 if (err < 0) 738 return err; 739 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice)); 740 if (err < 0) 741 return err; 742 break; 743 case ICE1712_SUBDEVICE_DELTADIO2496: 744 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice)); 745 if (err < 0) 746 return err; 747 break; 748 case ICE1712_SUBDEVICE_DELTA1010E: 749 case ICE1712_SUBDEVICE_DELTA1010LT: 750 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice)); 751 if (err < 0) 752 return err; 753 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice)); 754 if (err < 0) 755 return err; 756 break; 757 } 758 759 /* normal spdif controls */ 760 switch (ice->eeprom.subvendor) { 761 case ICE1712_SUBDEVICE_DELTA1010: 762 case ICE1712_SUBDEVICE_DELTADIO2496: 763 case ICE1712_SUBDEVICE_DELTA66: 764 case ICE1712_SUBDEVICE_MEDIASTATION: 765 err = snd_ice1712_spdif_build_controls(ice); 766 if (err < 0) 767 return err; 768 break; 769 } 770 771 /* spdif status in */ 772 switch (ice->eeprom.subvendor) { 773 case ICE1712_SUBDEVICE_DELTA1010: 774 case ICE1712_SUBDEVICE_DELTADIO2496: 775 case ICE1712_SUBDEVICE_DELTA66: 776 case ICE1712_SUBDEVICE_MEDIASTATION: 777 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice)); 778 if (err < 0) 779 return err; 780 break; 781 } 782 783 /* ak4524 controls */ 784 switch (ice->eeprom.subvendor) { 785 case ICE1712_SUBDEVICE_DELTA1010LT: 786 case ICE1712_SUBDEVICE_AUDIOPHILE: 787 case ICE1712_SUBDEVICE_DELTA410: 788 case ICE1712_SUBDEVICE_DELTA44: 789 case ICE1712_SUBDEVICE_DELTA66: 790 case ICE1712_SUBDEVICE_VX442: 791 case ICE1712_SUBDEVICE_DELTA66E: 792 case ICE1712_SUBDEVICE_EDIROLDA2496: 793 err = snd_ice1712_akm4xxx_build_controls(ice); 794 if (err < 0) 795 return err; 796 break; 797 } 798 799 return 0; 800 } 801 802 803 /* entry point */ 804 struct snd_ice1712_card_info snd_ice1712_delta_cards[] = { 805 { 806 .subvendor = ICE1712_SUBDEVICE_DELTA1010, 807 .name = "M Audio Delta 1010", 808 .model = "delta1010", 809 .chip_init = snd_ice1712_delta_init, 810 .build_controls = snd_ice1712_delta_add_controls, 811 }, 812 { 813 .subvendor = ICE1712_SUBDEVICE_DELTADIO2496, 814 .name = "M Audio Delta DiO 2496", 815 .model = "dio2496", 816 .chip_init = snd_ice1712_delta_init, 817 .build_controls = snd_ice1712_delta_add_controls, 818 .no_mpu401 = 1, 819 }, 820 { 821 .subvendor = ICE1712_SUBDEVICE_DELTA66, 822 .name = "M Audio Delta 66", 823 .model = "delta66", 824 .chip_init = snd_ice1712_delta_init, 825 .build_controls = snd_ice1712_delta_add_controls, 826 .no_mpu401 = 1, 827 }, 828 { 829 .subvendor = ICE1712_SUBDEVICE_DELTA44, 830 .name = "M Audio Delta 44", 831 .model = "delta44", 832 .chip_init = snd_ice1712_delta_init, 833 .build_controls = snd_ice1712_delta_add_controls, 834 .no_mpu401 = 1, 835 }, 836 { 837 .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE, 838 .name = "M Audio Audiophile 24/96", 839 .model = "audiophile", 840 .chip_init = snd_ice1712_delta_init, 841 .build_controls = snd_ice1712_delta_add_controls, 842 }, 843 { 844 .subvendor = ICE1712_SUBDEVICE_DELTA410, 845 .name = "M Audio Delta 410", 846 .model = "delta410", 847 .chip_init = snd_ice1712_delta_init, 848 .build_controls = snd_ice1712_delta_add_controls, 849 }, 850 { 851 .subvendor = ICE1712_SUBDEVICE_DELTA1010LT, 852 .name = "M Audio Delta 1010LT", 853 .model = "delta1010lt", 854 .chip_init = snd_ice1712_delta_init, 855 .build_controls = snd_ice1712_delta_add_controls, 856 }, 857 { 858 .subvendor = ICE1712_SUBDEVICE_VX442, 859 .name = "Digigram VX442", 860 .model = "vx442", 861 .chip_init = snd_ice1712_delta_init, 862 .build_controls = snd_ice1712_delta_add_controls, 863 .no_mpu401 = 1, 864 }, 865 { 866 .subvendor = ICE1712_SUBDEVICE_MEDIASTATION, 867 .name = "Lionstracs Mediastation", 868 .model = "mediastation", 869 .chip_init = snd_ice1712_delta_init, 870 .build_controls = snd_ice1712_delta_add_controls, 871 }, 872 { 873 .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496, 874 .name = "Edirol DA2496", 875 .model = "da2496", 876 .chip_init = snd_ice1712_delta_init, 877 .build_controls = snd_ice1712_delta_add_controls, 878 }, 879 { } /* terminator */ 880 }; 881