1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496, 5 * Audiophile, Digigram VX442 6 * 7 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <asm/io.h> 26 #include <linux/delay.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <linux/mutex.h> 31 32 #include <sound/core.h> 33 #include <sound/cs8427.h> 34 #include <sound/asoundef.h> 35 36 #include "ice1712.h" 37 #include "delta.h" 38 39 #define SND_CS8403 40 #include <sound/cs8403.h> 41 42 43 /* 44 * CS8427 via SPI mode (for Audiophile), emulated I2C 45 */ 46 47 /* send 8 bits */ 48 static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp) 49 { 50 int idx; 51 52 for (idx = 7; idx >= 0; idx--) { 53 tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK); 54 if (data & (1 << idx)) 55 tmp |= ICE1712_DELTA_AP_DOUT; 56 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 57 udelay(5); 58 tmp |= ICE1712_DELTA_AP_CCLK; 59 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 60 udelay(5); 61 } 62 } 63 64 /* read 8 bits */ 65 static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp) 66 { 67 unsigned char data = 0; 68 int idx; 69 70 for (idx = 7; idx >= 0; idx--) { 71 tmp &= ~ICE1712_DELTA_AP_CCLK; 72 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 73 udelay(5); 74 if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN) 75 data |= 1 << idx; 76 tmp |= ICE1712_DELTA_AP_CCLK; 77 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 78 udelay(5); 79 } 80 return data; 81 } 82 83 /* assert chip select */ 84 static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice) 85 { 86 unsigned char tmp; 87 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 88 switch (ice->eeprom.subvendor) { 89 case ICE1712_SUBDEVICE_DELTA1010E: 90 case ICE1712_SUBDEVICE_DELTA1010LT: 91 tmp &= ~ICE1712_DELTA_1010LT_CS; 92 tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427; 93 break; 94 case ICE1712_SUBDEVICE_AUDIOPHILE: 95 case ICE1712_SUBDEVICE_DELTA410: 96 tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC; 97 tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL; 98 break; 99 case ICE1712_SUBDEVICE_VX442: 100 tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B; 101 tmp &= ~ICE1712_VX442_CS_DIGITAL; 102 break; 103 } 104 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 105 udelay(5); 106 return tmp; 107 } 108 109 /* deassert chip select */ 110 static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp) 111 { 112 switch (ice->eeprom.subvendor) { 113 case ICE1712_SUBDEVICE_DELTA1010E: 114 case ICE1712_SUBDEVICE_DELTA1010LT: 115 tmp &= ~ICE1712_DELTA_1010LT_CS; 116 tmp |= ICE1712_DELTA_1010LT_CS_NONE; 117 break; 118 case ICE1712_SUBDEVICE_AUDIOPHILE: 119 case ICE1712_SUBDEVICE_DELTA410: 120 tmp |= ICE1712_DELTA_AP_CS_DIGITAL; 121 break; 122 case ICE1712_SUBDEVICE_VX442: 123 tmp |= ICE1712_VX442_CS_DIGITAL; 124 break; 125 } 126 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 127 } 128 129 /* sequential write */ 130 static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 131 { 132 struct snd_ice1712 *ice = device->bus->private_data; 133 int res = count; 134 unsigned char tmp; 135 136 mutex_lock(&ice->gpio_mutex); 137 tmp = ap_cs8427_codec_select(ice); 138 ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */ 139 while (count-- > 0) 140 ap_cs8427_write_byte(ice, *bytes++, tmp); 141 ap_cs8427_codec_deassert(ice, tmp); 142 mutex_unlock(&ice->gpio_mutex); 143 return res; 144 } 145 146 /* sequential read */ 147 static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 148 { 149 struct snd_ice1712 *ice = device->bus->private_data; 150 int res = count; 151 unsigned char tmp; 152 153 mutex_lock(&ice->gpio_mutex); 154 tmp = ap_cs8427_codec_select(ice); 155 ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */ 156 while (count-- > 0) 157 *bytes++ = ap_cs8427_read_byte(ice, tmp); 158 ap_cs8427_codec_deassert(ice, tmp); 159 mutex_unlock(&ice->gpio_mutex); 160 return res; 161 } 162 163 static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr) 164 { 165 if (addr == 0x10) 166 return 1; 167 return -ENOENT; 168 } 169 170 static struct snd_i2c_ops ap_cs8427_i2c_ops = { 171 .sendbytes = ap_cs8427_sendbytes, 172 .readbytes = ap_cs8427_readbytes, 173 .probeaddr = ap_cs8427_probeaddr, 174 }; 175 176 /* 177 */ 178 179 static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits) 180 { 181 unsigned char tmp, mask1, mask2; 182 int idx; 183 /* send byte to transmitter */ 184 mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK; 185 mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA; 186 mutex_lock(&ice->gpio_mutex); 187 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 188 for (idx = 7; idx >= 0; idx--) { 189 tmp &= ~(mask1 | mask2); 190 if (bits & (1 << idx)) 191 tmp |= mask2; 192 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 193 udelay(100); 194 tmp |= mask1; 195 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 196 udelay(100); 197 } 198 tmp &= ~mask1; 199 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 200 mutex_unlock(&ice->gpio_mutex); 201 } 202 203 204 static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 205 { 206 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits); 207 } 208 209 static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 210 { 211 unsigned int val; 212 int change; 213 214 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 215 spin_lock_irq(&ice->reg_lock); 216 change = ice->spdif.cs8403_bits != val; 217 ice->spdif.cs8403_bits = val; 218 if (change && ice->playback_pro_substream == NULL) { 219 spin_unlock_irq(&ice->reg_lock); 220 snd_ice1712_delta_cs8403_spdif_write(ice, val); 221 } else { 222 spin_unlock_irq(&ice->reg_lock); 223 } 224 return change; 225 } 226 227 static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 228 { 229 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits); 230 } 231 232 static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 233 { 234 unsigned int val; 235 int change; 236 237 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 238 spin_lock_irq(&ice->reg_lock); 239 change = ice->spdif.cs8403_stream_bits != val; 240 ice->spdif.cs8403_stream_bits = val; 241 if (change && ice->playback_pro_substream != NULL) { 242 spin_unlock_irq(&ice->reg_lock); 243 snd_ice1712_delta_cs8403_spdif_write(ice, val); 244 } else { 245 spin_unlock_irq(&ice->reg_lock); 246 } 247 return change; 248 } 249 250 251 /* 252 * AK4524 on Delta 44 and 66 to choose the chip mask 253 */ 254 static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip) 255 { 256 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 257 struct snd_ice1712 *ice = ak->private_data[0]; 258 259 snd_ice1712_save_gpio_status(ice); 260 priv->cs_mask = 261 priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A : 262 ICE1712_DELTA_CODEC_CHIP_B; 263 } 264 265 /* 266 * AK4524 on Delta1010LT to choose the chip address 267 */ 268 static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip) 269 { 270 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 271 struct snd_ice1712 *ice = ak->private_data[0]; 272 273 snd_ice1712_save_gpio_status(ice); 274 priv->cs_mask = ICE1712_DELTA_1010LT_CS; 275 priv->cs_addr = chip << 4; 276 } 277 278 /* 279 * AK4528 on VX442 to choose the chip mask 280 */ 281 static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip) 282 { 283 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 284 struct snd_ice1712 *ice = ak->private_data[0]; 285 286 snd_ice1712_save_gpio_status(ice); 287 priv->cs_mask = 288 priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A : 289 ICE1712_VX442_CODEC_CHIP_B; 290 } 291 292 /* 293 * change the DFS bit according rate for Delta1010 294 */ 295 static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate) 296 { 297 unsigned char tmp, tmp2; 298 299 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 300 return; 301 302 mutex_lock(&ice->gpio_mutex); 303 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 304 tmp2 = tmp & ~ICE1712_DELTA_DFS; 305 if (rate > 48000) 306 tmp2 |= ICE1712_DELTA_DFS; 307 if (tmp != tmp2) 308 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2); 309 mutex_unlock(&ice->gpio_mutex); 310 } 311 312 /* 313 * change the rate of AK4524 on Delta 44/66, AP, 1010LT 314 */ 315 static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 316 { 317 unsigned char tmp, tmp2; 318 struct snd_ice1712 *ice = ak->private_data[0]; 319 320 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 321 return; 322 323 /* check before reset ak4524 to avoid unnecessary clicks */ 324 mutex_lock(&ice->gpio_mutex); 325 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 326 mutex_unlock(&ice->gpio_mutex); 327 tmp2 = tmp & ~ICE1712_DELTA_DFS; 328 if (rate > 48000) 329 tmp2 |= ICE1712_DELTA_DFS; 330 if (tmp == tmp2) 331 return; 332 333 /* do it again */ 334 snd_akm4xxx_reset(ak, 1); 335 mutex_lock(&ice->gpio_mutex); 336 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS; 337 if (rate > 48000) 338 tmp |= ICE1712_DELTA_DFS; 339 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 340 mutex_unlock(&ice->gpio_mutex); 341 snd_akm4xxx_reset(ak, 0); 342 } 343 344 /* 345 * change the rate of AK4524 on VX442 346 */ 347 static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 348 { 349 unsigned char val; 350 351 val = (rate > 48000) ? 0x65 : 0x60; 352 if (snd_akm4xxx_get(ak, 0, 0x02) != val || 353 snd_akm4xxx_get(ak, 1, 0x02) != val) { 354 snd_akm4xxx_reset(ak, 1); 355 snd_akm4xxx_write(ak, 0, 0x02, val); 356 snd_akm4xxx_write(ak, 1, 0x02, val); 357 snd_akm4xxx_reset(ak, 0); 358 } 359 } 360 361 362 /* 363 * SPDIF ops for Delta 1010, Dio, 66 364 */ 365 366 /* open callback */ 367 static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 368 { 369 ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits; 370 } 371 372 /* set up */ 373 static void delta_setup_spdif(struct snd_ice1712 *ice, int rate) 374 { 375 unsigned long flags; 376 unsigned int tmp; 377 int change; 378 379 spin_lock_irqsave(&ice->reg_lock, flags); 380 tmp = ice->spdif.cs8403_stream_bits; 381 if (tmp & 0x01) /* consumer */ 382 tmp &= (tmp & 0x01) ? ~0x06 : ~0x18; 383 switch (rate) { 384 case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break; 385 case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break; 386 case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break; 387 default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break; 388 } 389 change = ice->spdif.cs8403_stream_bits != tmp; 390 ice->spdif.cs8403_stream_bits = tmp; 391 spin_unlock_irqrestore(&ice->reg_lock, flags); 392 if (change) 393 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id); 394 snd_ice1712_delta_cs8403_spdif_write(ice, tmp); 395 } 396 397 #define snd_ice1712_delta1010lt_wordclock_status_info \ 398 snd_ctl_boolean_mono_info 399 400 static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol, 401 struct snd_ctl_elem_value *ucontrol) 402 { 403 char reg = 0x10; /* CS8427 receiver error register */ 404 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 405 406 if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1) 407 snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg); 408 snd_i2c_readbytes(ice->cs8427, ®, 1); 409 ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0; 410 return 0; 411 } 412 413 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata = 414 { 415 .access = (SNDRV_CTL_ELEM_ACCESS_READ), 416 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 417 .name = "Word Clock Status", 418 .info = snd_ice1712_delta1010lt_wordclock_status_info, 419 .get = snd_ice1712_delta1010lt_wordclock_status_get, 420 }; 421 422 /* 423 * initialize the chips on M-Audio cards 424 */ 425 426 static struct snd_akm4xxx akm_audiophile __devinitdata = { 427 .type = SND_AK4528, 428 .num_adcs = 2, 429 .num_dacs = 2, 430 .ops = { 431 .set_rate_val = delta_ak4524_set_rate_val 432 } 433 }; 434 435 static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = { 436 .caddr = 2, 437 .cif = 0, 438 .data_mask = ICE1712_DELTA_AP_DOUT, 439 .clk_mask = ICE1712_DELTA_AP_CCLK, 440 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 441 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 442 .cs_none = 0, 443 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 444 .mask_flags = 0, 445 }; 446 447 static struct snd_akm4xxx akm_delta410 __devinitdata = { 448 .type = SND_AK4529, 449 .num_adcs = 2, 450 .num_dacs = 8, 451 .ops = { 452 .set_rate_val = delta_ak4524_set_rate_val 453 } 454 }; 455 456 static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = { 457 .caddr = 0, 458 .cif = 0, 459 .data_mask = ICE1712_DELTA_AP_DOUT, 460 .clk_mask = ICE1712_DELTA_AP_CCLK, 461 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 462 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 463 .cs_none = 0, 464 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 465 .mask_flags = 0, 466 }; 467 468 static struct snd_akm4xxx akm_delta1010lt __devinitdata = { 469 .type = SND_AK4524, 470 .num_adcs = 8, 471 .num_dacs = 8, 472 .ops = { 473 .lock = delta1010lt_ak4524_lock, 474 .set_rate_val = delta_ak4524_set_rate_val 475 } 476 }; 477 478 static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = { 479 .caddr = 2, 480 .cif = 0, /* the default level of the CIF pin from AK4524 */ 481 .data_mask = ICE1712_DELTA_1010LT_DOUT, 482 .clk_mask = ICE1712_DELTA_1010LT_CCLK, 483 .cs_mask = 0, 484 .cs_addr = 0, /* set later */ 485 .cs_none = ICE1712_DELTA_1010LT_CS_NONE, 486 .add_flags = 0, 487 .mask_flags = 0, 488 }; 489 490 static struct snd_akm4xxx akm_delta44 __devinitdata = { 491 .type = SND_AK4524, 492 .num_adcs = 4, 493 .num_dacs = 4, 494 .ops = { 495 .lock = delta_ak4524_lock, 496 .set_rate_val = delta_ak4524_set_rate_val 497 } 498 }; 499 500 static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = { 501 .caddr = 2, 502 .cif = 0, /* the default level of the CIF pin from AK4524 */ 503 .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA, 504 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK, 505 .cs_mask = 0, 506 .cs_addr = 0, /* set later */ 507 .cs_none = 0, 508 .add_flags = 0, 509 .mask_flags = 0, 510 }; 511 512 static struct snd_akm4xxx akm_vx442 __devinitdata = { 513 .type = SND_AK4524, 514 .num_adcs = 4, 515 .num_dacs = 4, 516 .ops = { 517 .lock = vx442_ak4524_lock, 518 .set_rate_val = vx442_ak4524_set_rate_val 519 } 520 }; 521 522 static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = { 523 .caddr = 2, 524 .cif = 0, 525 .data_mask = ICE1712_VX442_DOUT, 526 .clk_mask = ICE1712_VX442_CCLK, 527 .cs_mask = 0, 528 .cs_addr = 0, /* set later */ 529 .cs_none = 0, 530 .add_flags = 0, 531 .mask_flags = 0, 532 }; 533 534 static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice) 535 { 536 int err; 537 struct snd_akm4xxx *ak; 538 539 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 && 540 ice->eeprom.gpiodir == 0x7b) 541 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E; 542 543 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 && 544 ice->eeprom.gpiodir == 0xfb) 545 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E; 546 547 /* determine I2C, DACs and ADCs */ 548 switch (ice->eeprom.subvendor) { 549 case ICE1712_SUBDEVICE_AUDIOPHILE: 550 ice->num_total_dacs = 2; 551 ice->num_total_adcs = 2; 552 break; 553 case ICE1712_SUBDEVICE_DELTA410: 554 ice->num_total_dacs = 8; 555 ice->num_total_adcs = 2; 556 break; 557 case ICE1712_SUBDEVICE_DELTA44: 558 case ICE1712_SUBDEVICE_DELTA66: 559 ice->num_total_dacs = ice->omni ? 8 : 4; 560 ice->num_total_adcs = ice->omni ? 8 : 4; 561 break; 562 case ICE1712_SUBDEVICE_DELTA1010: 563 case ICE1712_SUBDEVICE_DELTA1010E: 564 case ICE1712_SUBDEVICE_DELTA1010LT: 565 case ICE1712_SUBDEVICE_MEDIASTATION: 566 case ICE1712_SUBDEVICE_EDIROLDA2496: 567 ice->num_total_dacs = 8; 568 ice->num_total_adcs = 8; 569 break; 570 case ICE1712_SUBDEVICE_DELTADIO2496: 571 ice->num_total_dacs = 4; /* two AK4324 codecs */ 572 break; 573 case ICE1712_SUBDEVICE_VX442: 574 case ICE1712_SUBDEVICE_DELTA66E: /* omni not suported yet */ 575 ice->num_total_dacs = 4; 576 ice->num_total_adcs = 4; 577 break; 578 } 579 580 /* initialize spdif */ 581 switch (ice->eeprom.subvendor) { 582 case ICE1712_SUBDEVICE_AUDIOPHILE: 583 case ICE1712_SUBDEVICE_DELTA410: 584 case ICE1712_SUBDEVICE_DELTA1010E: 585 case ICE1712_SUBDEVICE_DELTA1010LT: 586 case ICE1712_SUBDEVICE_VX442: 587 case ICE1712_SUBDEVICE_DELTA66E: 588 if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) { 589 snd_printk(KERN_ERR "unable to create I2C bus\n"); 590 return err; 591 } 592 ice->i2c->private_data = ice; 593 ice->i2c->ops = &ap_cs8427_i2c_ops; 594 if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0) 595 return err; 596 break; 597 case ICE1712_SUBDEVICE_DELTA1010: 598 case ICE1712_SUBDEVICE_MEDIASTATION: 599 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 600 break; 601 case ICE1712_SUBDEVICE_DELTADIO2496: 602 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 603 /* fall thru */ 604 case ICE1712_SUBDEVICE_DELTA66: 605 ice->spdif.ops.open = delta_open_spdif; 606 ice->spdif.ops.setup_rate = delta_setup_spdif; 607 ice->spdif.ops.default_get = delta_spdif_default_get; 608 ice->spdif.ops.default_put = delta_spdif_default_put; 609 ice->spdif.ops.stream_get = delta_spdif_stream_get; 610 ice->spdif.ops.stream_put = delta_spdif_stream_put; 611 /* Set spdif defaults */ 612 snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits); 613 break; 614 } 615 616 /* no analog? */ 617 switch (ice->eeprom.subvendor) { 618 case ICE1712_SUBDEVICE_DELTA1010: 619 case ICE1712_SUBDEVICE_DELTA1010E: 620 case ICE1712_SUBDEVICE_DELTADIO2496: 621 case ICE1712_SUBDEVICE_MEDIASTATION: 622 return 0; 623 } 624 625 /* second stage of initialization, analog parts and others */ 626 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 627 if (! ak) 628 return -ENOMEM; 629 ice->akm_codecs = 1; 630 631 switch (ice->eeprom.subvendor) { 632 case ICE1712_SUBDEVICE_AUDIOPHILE: 633 err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice); 634 break; 635 case ICE1712_SUBDEVICE_DELTA410: 636 err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice); 637 break; 638 case ICE1712_SUBDEVICE_DELTA1010LT: 639 case ICE1712_SUBDEVICE_EDIROLDA2496: 640 err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice); 641 break; 642 case ICE1712_SUBDEVICE_DELTA66: 643 case ICE1712_SUBDEVICE_DELTA44: 644 err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice); 645 break; 646 case ICE1712_SUBDEVICE_VX442: 647 case ICE1712_SUBDEVICE_DELTA66E: 648 err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice); 649 break; 650 default: 651 snd_BUG(); 652 return -EINVAL; 653 } 654 655 return err; 656 } 657 658 659 /* 660 * additional controls for M-Audio cards 661 */ 662 663 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata = 664 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0); 665 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata = 666 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0); 667 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata = 668 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 669 static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata = 670 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0); 671 static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata = 672 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 673 674 675 static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice) 676 { 677 int err; 678 679 /* 1010 and dio specific controls */ 680 switch (ice->eeprom.subvendor) { 681 case ICE1712_SUBDEVICE_DELTA1010: 682 case ICE1712_SUBDEVICE_MEDIASTATION: 683 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice)); 684 if (err < 0) 685 return err; 686 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice)); 687 if (err < 0) 688 return err; 689 break; 690 case ICE1712_SUBDEVICE_DELTADIO2496: 691 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice)); 692 if (err < 0) 693 return err; 694 break; 695 case ICE1712_SUBDEVICE_DELTA1010E: 696 case ICE1712_SUBDEVICE_DELTA1010LT: 697 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice)); 698 if (err < 0) 699 return err; 700 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice)); 701 if (err < 0) 702 return err; 703 break; 704 } 705 706 /* normal spdif controls */ 707 switch (ice->eeprom.subvendor) { 708 case ICE1712_SUBDEVICE_DELTA1010: 709 case ICE1712_SUBDEVICE_DELTADIO2496: 710 case ICE1712_SUBDEVICE_DELTA66: 711 case ICE1712_SUBDEVICE_MEDIASTATION: 712 err = snd_ice1712_spdif_build_controls(ice); 713 if (err < 0) 714 return err; 715 break; 716 } 717 718 /* spdif status in */ 719 switch (ice->eeprom.subvendor) { 720 case ICE1712_SUBDEVICE_DELTA1010: 721 case ICE1712_SUBDEVICE_DELTADIO2496: 722 case ICE1712_SUBDEVICE_DELTA66: 723 case ICE1712_SUBDEVICE_MEDIASTATION: 724 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice)); 725 if (err < 0) 726 return err; 727 break; 728 } 729 730 /* ak4524 controls */ 731 switch (ice->eeprom.subvendor) { 732 case ICE1712_SUBDEVICE_DELTA1010LT: 733 case ICE1712_SUBDEVICE_AUDIOPHILE: 734 case ICE1712_SUBDEVICE_DELTA410: 735 case ICE1712_SUBDEVICE_DELTA44: 736 case ICE1712_SUBDEVICE_DELTA66: 737 case ICE1712_SUBDEVICE_VX442: 738 case ICE1712_SUBDEVICE_DELTA66E: 739 case ICE1712_SUBDEVICE_EDIROLDA2496: 740 err = snd_ice1712_akm4xxx_build_controls(ice); 741 if (err < 0) 742 return err; 743 break; 744 } 745 746 return 0; 747 } 748 749 750 /* entry point */ 751 struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = { 752 { 753 .subvendor = ICE1712_SUBDEVICE_DELTA1010, 754 .name = "M Audio Delta 1010", 755 .model = "delta1010", 756 .chip_init = snd_ice1712_delta_init, 757 .build_controls = snd_ice1712_delta_add_controls, 758 }, 759 { 760 .subvendor = ICE1712_SUBDEVICE_DELTADIO2496, 761 .name = "M Audio Delta DiO 2496", 762 .model = "dio2496", 763 .chip_init = snd_ice1712_delta_init, 764 .build_controls = snd_ice1712_delta_add_controls, 765 .no_mpu401 = 1, 766 }, 767 { 768 .subvendor = ICE1712_SUBDEVICE_DELTA66, 769 .name = "M Audio Delta 66", 770 .model = "delta66", 771 .chip_init = snd_ice1712_delta_init, 772 .build_controls = snd_ice1712_delta_add_controls, 773 .no_mpu401 = 1, 774 }, 775 { 776 .subvendor = ICE1712_SUBDEVICE_DELTA44, 777 .name = "M Audio Delta 44", 778 .model = "delta44", 779 .chip_init = snd_ice1712_delta_init, 780 .build_controls = snd_ice1712_delta_add_controls, 781 .no_mpu401 = 1, 782 }, 783 { 784 .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE, 785 .name = "M Audio Audiophile 24/96", 786 .model = "audiophile", 787 .chip_init = snd_ice1712_delta_init, 788 .build_controls = snd_ice1712_delta_add_controls, 789 }, 790 { 791 .subvendor = ICE1712_SUBDEVICE_DELTA410, 792 .name = "M Audio Delta 410", 793 .model = "delta410", 794 .chip_init = snd_ice1712_delta_init, 795 .build_controls = snd_ice1712_delta_add_controls, 796 }, 797 { 798 .subvendor = ICE1712_SUBDEVICE_DELTA1010LT, 799 .name = "M Audio Delta 1010LT", 800 .model = "delta1010lt", 801 .chip_init = snd_ice1712_delta_init, 802 .build_controls = snd_ice1712_delta_add_controls, 803 }, 804 { 805 .subvendor = ICE1712_SUBDEVICE_VX442, 806 .name = "Digigram VX442", 807 .model = "vx442", 808 .chip_init = snd_ice1712_delta_init, 809 .build_controls = snd_ice1712_delta_add_controls, 810 .no_mpu401 = 1, 811 }, 812 { 813 .subvendor = ICE1712_SUBDEVICE_MEDIASTATION, 814 .name = "Lionstracs Mediastation", 815 .model = "mediastation", 816 .chip_init = snd_ice1712_delta_init, 817 .build_controls = snd_ice1712_delta_add_controls, 818 }, 819 { 820 .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496, 821 .name = "Edirol DA2496", 822 .model = "da2496", 823 .chip_init = snd_ice1712_delta_init, 824 .build_controls = snd_ice1712_delta_add_controls, 825 }, 826 { } /* terminator */ 827 }; 828