1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Lowlevel functions for M-Audio Delta 1010, 44, 66, Dio2496, Audiophile 5 * Digigram VX442 6 * 7 * Copyright (c) 2000 Jaroslav Kysela <perex@suse.cz> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <sound/driver.h> 26 #include <asm/io.h> 27 #include <linux/delay.h> 28 #include <linux/interrupt.h> 29 #include <linux/init.h> 30 #include <linux/slab.h> 31 #include <linux/mutex.h> 32 33 #include <sound/core.h> 34 #include <sound/cs8427.h> 35 #include <sound/asoundef.h> 36 37 #include "ice1712.h" 38 #include "delta.h" 39 40 #define SND_CS8403 41 #include <sound/cs8403.h> 42 43 44 /* 45 * CS8427 via SPI mode (for Audiophile), emulated I2C 46 */ 47 48 /* send 8 bits */ 49 static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp) 50 { 51 int idx; 52 53 for (idx = 7; idx >= 0; idx--) { 54 tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK); 55 if (data & (1 << idx)) 56 tmp |= ICE1712_DELTA_AP_DOUT; 57 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 58 udelay(5); 59 tmp |= ICE1712_DELTA_AP_CCLK; 60 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 61 udelay(5); 62 } 63 } 64 65 /* read 8 bits */ 66 static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp) 67 { 68 unsigned char data = 0; 69 int idx; 70 71 for (idx = 7; idx >= 0; idx--) { 72 tmp &= ~ICE1712_DELTA_AP_CCLK; 73 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 74 udelay(5); 75 if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN) 76 data |= 1 << idx; 77 tmp |= ICE1712_DELTA_AP_CCLK; 78 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 79 udelay(5); 80 } 81 return data; 82 } 83 84 /* assert chip select */ 85 static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice) 86 { 87 unsigned char tmp; 88 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 89 switch (ice->eeprom.subvendor) { 90 case ICE1712_SUBDEVICE_DELTA1010LT: 91 tmp &= ~ICE1712_DELTA_1010LT_CS; 92 tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427; 93 break; 94 case ICE1712_SUBDEVICE_AUDIOPHILE: 95 case ICE1712_SUBDEVICE_DELTA410: 96 tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC; 97 tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL; 98 break; 99 case ICE1712_SUBDEVICE_VX442: 100 tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B; 101 tmp &= ~ICE1712_VX442_CS_DIGITAL; 102 break; 103 } 104 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 105 udelay(5); 106 return tmp; 107 } 108 109 /* deassert chip select */ 110 static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp) 111 { 112 switch (ice->eeprom.subvendor) { 113 case ICE1712_SUBDEVICE_DELTA1010LT: 114 tmp &= ~ICE1712_DELTA_1010LT_CS; 115 tmp |= ICE1712_DELTA_1010LT_CS_NONE; 116 break; 117 case ICE1712_SUBDEVICE_AUDIOPHILE: 118 case ICE1712_SUBDEVICE_DELTA410: 119 tmp |= ICE1712_DELTA_AP_CS_DIGITAL; 120 break; 121 case ICE1712_SUBDEVICE_VX442: 122 tmp |= ICE1712_VX442_CS_DIGITAL; 123 break; 124 } 125 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 126 } 127 128 /* sequential write */ 129 static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 130 { 131 struct snd_ice1712 *ice = device->bus->private_data; 132 int res = count; 133 unsigned char tmp; 134 135 mutex_lock(&ice->gpio_mutex); 136 tmp = ap_cs8427_codec_select(ice); 137 ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */ 138 while (count-- > 0) 139 ap_cs8427_write_byte(ice, *bytes++, tmp); 140 ap_cs8427_codec_deassert(ice, tmp); 141 mutex_unlock(&ice->gpio_mutex); 142 return res; 143 } 144 145 /* sequential read */ 146 static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 147 { 148 struct snd_ice1712 *ice = device->bus->private_data; 149 int res = count; 150 unsigned char tmp; 151 152 mutex_lock(&ice->gpio_mutex); 153 tmp = ap_cs8427_codec_select(ice); 154 ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */ 155 while (count-- > 0) 156 *bytes++ = ap_cs8427_read_byte(ice, tmp); 157 ap_cs8427_codec_deassert(ice, tmp); 158 mutex_unlock(&ice->gpio_mutex); 159 return res; 160 } 161 162 static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr) 163 { 164 if (addr == 0x10) 165 return 1; 166 return -ENOENT; 167 } 168 169 static struct snd_i2c_ops ap_cs8427_i2c_ops = { 170 .sendbytes = ap_cs8427_sendbytes, 171 .readbytes = ap_cs8427_readbytes, 172 .probeaddr = ap_cs8427_probeaddr, 173 }; 174 175 /* 176 */ 177 178 static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits) 179 { 180 unsigned char tmp, mask1, mask2; 181 int idx; 182 /* send byte to transmitter */ 183 mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK; 184 mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA; 185 mutex_lock(&ice->gpio_mutex); 186 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 187 for (idx = 7; idx >= 0; idx--) { 188 tmp &= ~(mask1 | mask2); 189 if (bits & (1 << idx)) 190 tmp |= mask2; 191 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 192 udelay(100); 193 tmp |= mask1; 194 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 195 udelay(100); 196 } 197 tmp &= ~mask1; 198 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 199 mutex_unlock(&ice->gpio_mutex); 200 } 201 202 203 static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 204 { 205 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits); 206 } 207 208 static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 209 { 210 unsigned int val; 211 int change; 212 213 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 214 spin_lock_irq(&ice->reg_lock); 215 change = ice->spdif.cs8403_bits != val; 216 ice->spdif.cs8403_bits = val; 217 if (change && ice->playback_pro_substream == NULL) { 218 spin_unlock_irq(&ice->reg_lock); 219 snd_ice1712_delta_cs8403_spdif_write(ice, val); 220 } else { 221 spin_unlock_irq(&ice->reg_lock); 222 } 223 return change; 224 } 225 226 static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 227 { 228 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits); 229 } 230 231 static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 232 { 233 unsigned int val; 234 int change; 235 236 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 237 spin_lock_irq(&ice->reg_lock); 238 change = ice->spdif.cs8403_stream_bits != val; 239 ice->spdif.cs8403_stream_bits = val; 240 if (change && ice->playback_pro_substream != NULL) { 241 spin_unlock_irq(&ice->reg_lock); 242 snd_ice1712_delta_cs8403_spdif_write(ice, val); 243 } else { 244 spin_unlock_irq(&ice->reg_lock); 245 } 246 return change; 247 } 248 249 250 /* 251 * AK4524 on Delta 44 and 66 to choose the chip mask 252 */ 253 static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip) 254 { 255 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 256 struct snd_ice1712 *ice = ak->private_data[0]; 257 258 snd_ice1712_save_gpio_status(ice); 259 priv->cs_mask = 260 priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A : 261 ICE1712_DELTA_CODEC_CHIP_B; 262 } 263 264 /* 265 * AK4524 on Delta1010LT to choose the chip address 266 */ 267 static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip) 268 { 269 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 270 struct snd_ice1712 *ice = ak->private_data[0]; 271 272 snd_ice1712_save_gpio_status(ice); 273 priv->cs_mask = ICE1712_DELTA_1010LT_CS; 274 priv->cs_addr = chip << 4; 275 } 276 277 /* 278 * AK4528 on VX442 to choose the chip mask 279 */ 280 static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip) 281 { 282 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 283 struct snd_ice1712 *ice = ak->private_data[0]; 284 285 snd_ice1712_save_gpio_status(ice); 286 priv->cs_mask = 287 priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A : 288 ICE1712_VX442_CODEC_CHIP_B; 289 } 290 291 /* 292 * change the DFS bit according rate for Delta1010 293 */ 294 static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate) 295 { 296 unsigned char tmp, tmp2; 297 298 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 299 return; 300 301 mutex_lock(&ice->gpio_mutex); 302 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 303 tmp2 = tmp & ~ICE1712_DELTA_DFS; 304 if (rate > 48000) 305 tmp2 |= ICE1712_DELTA_DFS; 306 if (tmp != tmp2) 307 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2); 308 mutex_unlock(&ice->gpio_mutex); 309 } 310 311 /* 312 * change the rate of AK4524 on Delta 44/66, AP, 1010LT 313 */ 314 static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 315 { 316 unsigned char tmp, tmp2; 317 struct snd_ice1712 *ice = ak->private_data[0]; 318 319 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 320 return; 321 322 /* check before reset ak4524 to avoid unnecessary clicks */ 323 mutex_lock(&ice->gpio_mutex); 324 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 325 mutex_unlock(&ice->gpio_mutex); 326 tmp2 = tmp & ~ICE1712_DELTA_DFS; 327 if (rate > 48000) 328 tmp2 |= ICE1712_DELTA_DFS; 329 if (tmp == tmp2) 330 return; 331 332 /* do it again */ 333 snd_akm4xxx_reset(ak, 1); 334 mutex_lock(&ice->gpio_mutex); 335 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS; 336 if (rate > 48000) 337 tmp |= ICE1712_DELTA_DFS; 338 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 339 mutex_unlock(&ice->gpio_mutex); 340 snd_akm4xxx_reset(ak, 0); 341 } 342 343 /* 344 * change the rate of AK4524 on VX442 345 */ 346 static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 347 { 348 unsigned char val; 349 350 val = (rate > 48000) ? 0x65 : 0x60; 351 if (snd_akm4xxx_get(ak, 0, 0x02) != val || 352 snd_akm4xxx_get(ak, 1, 0x02) != val) { 353 snd_akm4xxx_reset(ak, 1); 354 snd_akm4xxx_write(ak, 0, 0x02, val); 355 snd_akm4xxx_write(ak, 1, 0x02, val); 356 snd_akm4xxx_reset(ak, 0); 357 } 358 } 359 360 361 /* 362 * SPDIF ops for Delta 1010, Dio, 66 363 */ 364 365 /* open callback */ 366 static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 367 { 368 ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits; 369 } 370 371 /* set up */ 372 static void delta_setup_spdif(struct snd_ice1712 *ice, int rate) 373 { 374 unsigned long flags; 375 unsigned int tmp; 376 int change; 377 378 spin_lock_irqsave(&ice->reg_lock, flags); 379 tmp = ice->spdif.cs8403_stream_bits; 380 if (tmp & 0x01) /* consumer */ 381 tmp &= (tmp & 0x01) ? ~0x06 : ~0x18; 382 switch (rate) { 383 case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break; 384 case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break; 385 case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break; 386 default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break; 387 } 388 change = ice->spdif.cs8403_stream_bits != tmp; 389 ice->spdif.cs8403_stream_bits = tmp; 390 spin_unlock_irqrestore(&ice->reg_lock, flags); 391 if (change) 392 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id); 393 snd_ice1712_delta_cs8403_spdif_write(ice, tmp); 394 } 395 396 static int snd_ice1712_delta1010lt_wordclock_status_info(struct snd_kcontrol *kcontrol, 397 struct snd_ctl_elem_info *uinfo) 398 { 399 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; 400 uinfo->count = 1; 401 uinfo->value.integer.min = 0; 402 uinfo->value.integer.max = 1; 403 return 0; 404 } 405 406 static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol, 407 struct snd_ctl_elem_value *ucontrol) 408 { 409 char reg = 0x10; // cs8427 receiver error register 410 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 411 412 if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1) 413 snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg); 414 snd_i2c_readbytes(ice->cs8427, ®, 1); 415 ucontrol->value.integer.value[0] = (reg ? 1 : 0); 416 return 0; 417 } 418 419 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata = 420 { 421 .access = (SNDRV_CTL_ELEM_ACCESS_READ), 422 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 423 .name = "Word Clock Status", 424 .info = snd_ice1712_delta1010lt_wordclock_status_info, 425 .get = snd_ice1712_delta1010lt_wordclock_status_get, 426 }; 427 428 /* 429 * initialize the chips on M-Audio cards 430 */ 431 432 static struct snd_akm4xxx akm_audiophile __devinitdata = { 433 .type = SND_AK4528, 434 .num_adcs = 2, 435 .num_dacs = 2, 436 .ops = { 437 .set_rate_val = delta_ak4524_set_rate_val 438 } 439 }; 440 441 static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = { 442 .caddr = 2, 443 .cif = 0, 444 .data_mask = ICE1712_DELTA_AP_DOUT, 445 .clk_mask = ICE1712_DELTA_AP_CCLK, 446 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 447 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 448 .cs_none = 0, 449 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 450 .mask_flags = 0, 451 }; 452 453 static struct snd_akm4xxx akm_delta410 __devinitdata = { 454 .type = SND_AK4529, 455 .num_adcs = 2, 456 .num_dacs = 8, 457 .ops = { 458 .set_rate_val = delta_ak4524_set_rate_val 459 } 460 }; 461 462 static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = { 463 .caddr = 0, 464 .cif = 0, 465 .data_mask = ICE1712_DELTA_AP_DOUT, 466 .clk_mask = ICE1712_DELTA_AP_CCLK, 467 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 468 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 469 .cs_none = 0, 470 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 471 .mask_flags = 0, 472 }; 473 474 static struct snd_akm4xxx akm_delta1010lt __devinitdata = { 475 .type = SND_AK4524, 476 .num_adcs = 8, 477 .num_dacs = 8, 478 .ops = { 479 .lock = delta1010lt_ak4524_lock, 480 .set_rate_val = delta_ak4524_set_rate_val 481 } 482 }; 483 484 static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = { 485 .caddr = 2, 486 .cif = 0, /* the default level of the CIF pin from AK4524 */ 487 .data_mask = ICE1712_DELTA_1010LT_DOUT, 488 .clk_mask = ICE1712_DELTA_1010LT_CCLK, 489 .cs_mask = 0, 490 .cs_addr = 0, /* set later */ 491 .cs_none = ICE1712_DELTA_1010LT_CS_NONE, 492 .add_flags = 0, 493 .mask_flags = 0, 494 }; 495 496 static struct snd_akm4xxx akm_delta44 __devinitdata = { 497 .type = SND_AK4524, 498 .num_adcs = 4, 499 .num_dacs = 4, 500 .ops = { 501 .lock = delta_ak4524_lock, 502 .set_rate_val = delta_ak4524_set_rate_val 503 } 504 }; 505 506 static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = { 507 .caddr = 2, 508 .cif = 0, /* the default level of the CIF pin from AK4524 */ 509 .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA, 510 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK, 511 .cs_mask = 0, 512 .cs_addr = 0, /* set later */ 513 .cs_none = 0, 514 .add_flags = 0, 515 .mask_flags = 0, 516 }; 517 518 static struct snd_akm4xxx akm_vx442 __devinitdata = { 519 .type = SND_AK4524, 520 .num_adcs = 4, 521 .num_dacs = 4, 522 .ops = { 523 .lock = vx442_ak4524_lock, 524 .set_rate_val = vx442_ak4524_set_rate_val 525 } 526 }; 527 528 static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = { 529 .caddr = 2, 530 .cif = 0, 531 .data_mask = ICE1712_VX442_DOUT, 532 .clk_mask = ICE1712_VX442_CCLK, 533 .cs_mask = 0, 534 .cs_addr = 0, /* set later */ 535 .cs_none = 0, 536 .add_flags = 0, 537 .mask_flags = 0, 538 }; 539 540 static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice) 541 { 542 int err; 543 struct snd_akm4xxx *ak; 544 545 /* determine I2C, DACs and ADCs */ 546 switch (ice->eeprom.subvendor) { 547 case ICE1712_SUBDEVICE_AUDIOPHILE: 548 ice->num_total_dacs = 2; 549 ice->num_total_adcs = 2; 550 break; 551 case ICE1712_SUBDEVICE_DELTA410: 552 ice->num_total_dacs = 8; 553 ice->num_total_adcs = 2; 554 break; 555 case ICE1712_SUBDEVICE_DELTA44: 556 case ICE1712_SUBDEVICE_DELTA66: 557 ice->num_total_dacs = ice->omni ? 8 : 4; 558 ice->num_total_adcs = ice->omni ? 8 : 4; 559 break; 560 case ICE1712_SUBDEVICE_DELTA1010: 561 case ICE1712_SUBDEVICE_DELTA1010LT: 562 case ICE1712_SUBDEVICE_MEDIASTATION: 563 ice->num_total_dacs = 8; 564 ice->num_total_adcs = 8; 565 break; 566 case ICE1712_SUBDEVICE_DELTADIO2496: 567 ice->num_total_dacs = 4; /* two AK4324 codecs */ 568 break; 569 case ICE1712_SUBDEVICE_VX442: 570 ice->num_total_dacs = 4; 571 ice->num_total_adcs = 4; 572 break; 573 } 574 575 /* initialize spdif */ 576 switch (ice->eeprom.subvendor) { 577 case ICE1712_SUBDEVICE_AUDIOPHILE: 578 case ICE1712_SUBDEVICE_DELTA410: 579 case ICE1712_SUBDEVICE_DELTA1010LT: 580 case ICE1712_SUBDEVICE_VX442: 581 if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) { 582 snd_printk(KERN_ERR "unable to create I2C bus\n"); 583 return err; 584 } 585 ice->i2c->private_data = ice; 586 ice->i2c->ops = &ap_cs8427_i2c_ops; 587 if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0) 588 return err; 589 break; 590 case ICE1712_SUBDEVICE_DELTA1010: 591 case ICE1712_SUBDEVICE_MEDIASTATION: 592 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 593 break; 594 case ICE1712_SUBDEVICE_DELTADIO2496: 595 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 596 /* fall thru */ 597 case ICE1712_SUBDEVICE_DELTA66: 598 ice->spdif.ops.open = delta_open_spdif; 599 ice->spdif.ops.setup_rate = delta_setup_spdif; 600 ice->spdif.ops.default_get = delta_spdif_default_get; 601 ice->spdif.ops.default_put = delta_spdif_default_put; 602 ice->spdif.ops.stream_get = delta_spdif_stream_get; 603 ice->spdif.ops.stream_put = delta_spdif_stream_put; 604 /* Set spdif defaults */ 605 snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits); 606 break; 607 } 608 609 /* no analog? */ 610 switch (ice->eeprom.subvendor) { 611 case ICE1712_SUBDEVICE_DELTA1010: 612 case ICE1712_SUBDEVICE_DELTADIO2496: 613 case ICE1712_SUBDEVICE_MEDIASTATION: 614 return 0; 615 } 616 617 /* second stage of initialization, analog parts and others */ 618 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 619 if (! ak) 620 return -ENOMEM; 621 ice->akm_codecs = 1; 622 623 switch (ice->eeprom.subvendor) { 624 case ICE1712_SUBDEVICE_AUDIOPHILE: 625 err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice); 626 break; 627 case ICE1712_SUBDEVICE_DELTA410: 628 err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice); 629 break; 630 case ICE1712_SUBDEVICE_DELTA1010LT: 631 err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice); 632 break; 633 case ICE1712_SUBDEVICE_DELTA66: 634 case ICE1712_SUBDEVICE_DELTA44: 635 err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice); 636 break; 637 case ICE1712_SUBDEVICE_VX442: 638 err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice); 639 break; 640 default: 641 snd_BUG(); 642 return -EINVAL; 643 } 644 645 return err; 646 } 647 648 649 /* 650 * additional controls for M-Audio cards 651 */ 652 653 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata = 654 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0); 655 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata = 656 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0); 657 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata = 658 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 659 static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata = 660 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0); 661 static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata = 662 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 663 664 665 static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice) 666 { 667 int err; 668 669 /* 1010 and dio specific controls */ 670 switch (ice->eeprom.subvendor) { 671 case ICE1712_SUBDEVICE_DELTA1010: 672 case ICE1712_SUBDEVICE_MEDIASTATION: 673 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice)); 674 if (err < 0) 675 return err; 676 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice)); 677 if (err < 0) 678 return err; 679 break; 680 case ICE1712_SUBDEVICE_DELTADIO2496: 681 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice)); 682 if (err < 0) 683 return err; 684 break; 685 case ICE1712_SUBDEVICE_DELTA1010LT: 686 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice)); 687 if (err < 0) 688 return err; 689 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice)); 690 if (err < 0) 691 return err; 692 break; 693 } 694 695 /* normal spdif controls */ 696 switch (ice->eeprom.subvendor) { 697 case ICE1712_SUBDEVICE_DELTA1010: 698 case ICE1712_SUBDEVICE_DELTADIO2496: 699 case ICE1712_SUBDEVICE_DELTA66: 700 case ICE1712_SUBDEVICE_MEDIASTATION: 701 err = snd_ice1712_spdif_build_controls(ice); 702 if (err < 0) 703 return err; 704 break; 705 } 706 707 /* spdif status in */ 708 switch (ice->eeprom.subvendor) { 709 case ICE1712_SUBDEVICE_DELTA1010: 710 case ICE1712_SUBDEVICE_DELTADIO2496: 711 case ICE1712_SUBDEVICE_DELTA66: 712 case ICE1712_SUBDEVICE_MEDIASTATION: 713 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice)); 714 if (err < 0) 715 return err; 716 break; 717 } 718 719 /* ak4524 controls */ 720 switch (ice->eeprom.subvendor) { 721 case ICE1712_SUBDEVICE_DELTA1010LT: 722 case ICE1712_SUBDEVICE_AUDIOPHILE: 723 case ICE1712_SUBDEVICE_DELTA410: 724 case ICE1712_SUBDEVICE_DELTA44: 725 case ICE1712_SUBDEVICE_DELTA66: 726 case ICE1712_SUBDEVICE_VX442: 727 err = snd_ice1712_akm4xxx_build_controls(ice); 728 if (err < 0) 729 return err; 730 break; 731 } 732 733 return 0; 734 } 735 736 737 /* entry point */ 738 struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = { 739 { 740 .subvendor = ICE1712_SUBDEVICE_DELTA1010, 741 .name = "M Audio Delta 1010", 742 .model = "delta1010", 743 .chip_init = snd_ice1712_delta_init, 744 .build_controls = snd_ice1712_delta_add_controls, 745 }, 746 { 747 .subvendor = ICE1712_SUBDEVICE_DELTADIO2496, 748 .name = "M Audio Delta DiO 2496", 749 .model = "dio2496", 750 .chip_init = snd_ice1712_delta_init, 751 .build_controls = snd_ice1712_delta_add_controls, 752 .no_mpu401 = 1, 753 }, 754 { 755 .subvendor = ICE1712_SUBDEVICE_DELTA66, 756 .name = "M Audio Delta 66", 757 .model = "delta66", 758 .chip_init = snd_ice1712_delta_init, 759 .build_controls = snd_ice1712_delta_add_controls, 760 .no_mpu401 = 1, 761 }, 762 { 763 .subvendor = ICE1712_SUBDEVICE_DELTA44, 764 .name = "M Audio Delta 44", 765 .model = "delta44", 766 .chip_init = snd_ice1712_delta_init, 767 .build_controls = snd_ice1712_delta_add_controls, 768 .no_mpu401 = 1, 769 }, 770 { 771 .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE, 772 .name = "M Audio Audiophile 24/96", 773 .model = "audiophile", 774 .chip_init = snd_ice1712_delta_init, 775 .build_controls = snd_ice1712_delta_add_controls, 776 }, 777 { 778 .subvendor = ICE1712_SUBDEVICE_DELTA410, 779 .name = "M Audio Delta 410", 780 .model = "delta410", 781 .chip_init = snd_ice1712_delta_init, 782 .build_controls = snd_ice1712_delta_add_controls, 783 }, 784 { 785 .subvendor = ICE1712_SUBDEVICE_DELTA1010LT, 786 .name = "M Audio Delta 1010LT", 787 .model = "delta1010lt", 788 .chip_init = snd_ice1712_delta_init, 789 .build_controls = snd_ice1712_delta_add_controls, 790 }, 791 { 792 .subvendor = ICE1712_SUBDEVICE_VX442, 793 .name = "Digigram VX442", 794 .model = "vx442", 795 .chip_init = snd_ice1712_delta_init, 796 .build_controls = snd_ice1712_delta_add_controls, 797 .no_mpu401 = 1, 798 }, 799 { 800 .subvendor = ICE1712_SUBDEVICE_MEDIASTATION, 801 .name = "Lionstracs Mediastation", 802 .model = "mediastation", 803 .chip_init = snd_ice1712_delta_init, 804 .build_controls = snd_ice1712_delta_add_controls, 805 }, 806 { } /* terminator */ 807 }; 808