1 /* 2 * ALSA driver for ICEnsemble ICE1712 (Envy24) 3 * 4 * Lowlevel functions for M-Audio Delta 1010, 1010E, 44, 66, 66E, Dio2496, 5 * Audiophile, Digigram VX442 6 * 7 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as published by 11 * the Free Software Foundation; either version 2 of the License, or 12 * (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * You should have received a copy of the GNU General Public License 20 * along with this program; if not, write to the Free Software 21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 22 * 23 */ 24 25 #include <asm/io.h> 26 #include <linux/delay.h> 27 #include <linux/interrupt.h> 28 #include <linux/init.h> 29 #include <linux/slab.h> 30 #include <linux/mutex.h> 31 32 #include <sound/core.h> 33 #include <sound/cs8427.h> 34 #include <sound/asoundef.h> 35 36 #include "ice1712.h" 37 #include "delta.h" 38 39 #define SND_CS8403 40 #include <sound/cs8403.h> 41 42 43 /* 44 * CS8427 via SPI mode (for Audiophile), emulated I2C 45 */ 46 47 /* send 8 bits */ 48 static void ap_cs8427_write_byte(struct snd_ice1712 *ice, unsigned char data, unsigned char tmp) 49 { 50 int idx; 51 52 for (idx = 7; idx >= 0; idx--) { 53 tmp &= ~(ICE1712_DELTA_AP_DOUT|ICE1712_DELTA_AP_CCLK); 54 if (data & (1 << idx)) 55 tmp |= ICE1712_DELTA_AP_DOUT; 56 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 57 udelay(5); 58 tmp |= ICE1712_DELTA_AP_CCLK; 59 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 60 udelay(5); 61 } 62 } 63 64 /* read 8 bits */ 65 static unsigned char ap_cs8427_read_byte(struct snd_ice1712 *ice, unsigned char tmp) 66 { 67 unsigned char data = 0; 68 int idx; 69 70 for (idx = 7; idx >= 0; idx--) { 71 tmp &= ~ICE1712_DELTA_AP_CCLK; 72 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 73 udelay(5); 74 if (snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ICE1712_DELTA_AP_DIN) 75 data |= 1 << idx; 76 tmp |= ICE1712_DELTA_AP_CCLK; 77 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 78 udelay(5); 79 } 80 return data; 81 } 82 83 /* assert chip select */ 84 static unsigned char ap_cs8427_codec_select(struct snd_ice1712 *ice) 85 { 86 unsigned char tmp; 87 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 88 switch (ice->eeprom.subvendor) { 89 case ICE1712_SUBDEVICE_DELTA1010E: 90 case ICE1712_SUBDEVICE_DELTA1010LT: 91 tmp &= ~ICE1712_DELTA_1010LT_CS; 92 tmp |= ICE1712_DELTA_1010LT_CCLK | ICE1712_DELTA_1010LT_CS_CS8427; 93 break; 94 case ICE1712_SUBDEVICE_AUDIOPHILE: 95 case ICE1712_SUBDEVICE_DELTA410: 96 tmp |= ICE1712_DELTA_AP_CCLK | ICE1712_DELTA_AP_CS_CODEC; 97 tmp &= ~ICE1712_DELTA_AP_CS_DIGITAL; 98 break; 99 case ICE1712_SUBDEVICE_DELTA66E: 100 tmp |= ICE1712_DELTA_66E_CCLK | ICE1712_DELTA_66E_CS_CHIP_A | 101 ICE1712_DELTA_66E_CS_CHIP_B; 102 tmp &= ~ICE1712_DELTA_66E_CS_CS8427; 103 break; 104 case ICE1712_SUBDEVICE_VX442: 105 tmp |= ICE1712_VX442_CCLK | ICE1712_VX442_CODEC_CHIP_A | ICE1712_VX442_CODEC_CHIP_B; 106 tmp &= ~ICE1712_VX442_CS_DIGITAL; 107 break; 108 } 109 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 110 udelay(5); 111 return tmp; 112 } 113 114 /* deassert chip select */ 115 static void ap_cs8427_codec_deassert(struct snd_ice1712 *ice, unsigned char tmp) 116 { 117 switch (ice->eeprom.subvendor) { 118 case ICE1712_SUBDEVICE_DELTA1010E: 119 case ICE1712_SUBDEVICE_DELTA1010LT: 120 tmp &= ~ICE1712_DELTA_1010LT_CS; 121 tmp |= ICE1712_DELTA_1010LT_CS_NONE; 122 break; 123 case ICE1712_SUBDEVICE_AUDIOPHILE: 124 case ICE1712_SUBDEVICE_DELTA410: 125 tmp |= ICE1712_DELTA_AP_CS_DIGITAL; 126 break; 127 case ICE1712_SUBDEVICE_DELTA66E: 128 tmp |= ICE1712_DELTA_66E_CS_CS8427; 129 break; 130 case ICE1712_SUBDEVICE_VX442: 131 tmp |= ICE1712_VX442_CS_DIGITAL; 132 break; 133 } 134 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 135 } 136 137 /* sequential write */ 138 static int ap_cs8427_sendbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 139 { 140 struct snd_ice1712 *ice = device->bus->private_data; 141 int res = count; 142 unsigned char tmp; 143 144 mutex_lock(&ice->gpio_mutex); 145 tmp = ap_cs8427_codec_select(ice); 146 ap_cs8427_write_byte(ice, (device->addr << 1) | 0, tmp); /* address + write mode */ 147 while (count-- > 0) 148 ap_cs8427_write_byte(ice, *bytes++, tmp); 149 ap_cs8427_codec_deassert(ice, tmp); 150 mutex_unlock(&ice->gpio_mutex); 151 return res; 152 } 153 154 /* sequential read */ 155 static int ap_cs8427_readbytes(struct snd_i2c_device *device, unsigned char *bytes, int count) 156 { 157 struct snd_ice1712 *ice = device->bus->private_data; 158 int res = count; 159 unsigned char tmp; 160 161 mutex_lock(&ice->gpio_mutex); 162 tmp = ap_cs8427_codec_select(ice); 163 ap_cs8427_write_byte(ice, (device->addr << 1) | 1, tmp); /* address + read mode */ 164 while (count-- > 0) 165 *bytes++ = ap_cs8427_read_byte(ice, tmp); 166 ap_cs8427_codec_deassert(ice, tmp); 167 mutex_unlock(&ice->gpio_mutex); 168 return res; 169 } 170 171 static int ap_cs8427_probeaddr(struct snd_i2c_bus *bus, unsigned short addr) 172 { 173 if (addr == 0x10) 174 return 1; 175 return -ENOENT; 176 } 177 178 static struct snd_i2c_ops ap_cs8427_i2c_ops = { 179 .sendbytes = ap_cs8427_sendbytes, 180 .readbytes = ap_cs8427_readbytes, 181 .probeaddr = ap_cs8427_probeaddr, 182 }; 183 184 /* 185 */ 186 187 static void snd_ice1712_delta_cs8403_spdif_write(struct snd_ice1712 *ice, unsigned char bits) 188 { 189 unsigned char tmp, mask1, mask2; 190 int idx; 191 /* send byte to transmitter */ 192 mask1 = ICE1712_DELTA_SPDIF_OUT_STAT_CLOCK; 193 mask2 = ICE1712_DELTA_SPDIF_OUT_STAT_DATA; 194 mutex_lock(&ice->gpio_mutex); 195 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 196 for (idx = 7; idx >= 0; idx--) { 197 tmp &= ~(mask1 | mask2); 198 if (bits & (1 << idx)) 199 tmp |= mask2; 200 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 201 udelay(100); 202 tmp |= mask1; 203 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 204 udelay(100); 205 } 206 tmp &= ~mask1; 207 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 208 mutex_unlock(&ice->gpio_mutex); 209 } 210 211 212 static void delta_spdif_default_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 213 { 214 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_bits); 215 } 216 217 static int delta_spdif_default_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 218 { 219 unsigned int val; 220 int change; 221 222 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 223 spin_lock_irq(&ice->reg_lock); 224 change = ice->spdif.cs8403_bits != val; 225 ice->spdif.cs8403_bits = val; 226 if (change && ice->playback_pro_substream == NULL) { 227 spin_unlock_irq(&ice->reg_lock); 228 snd_ice1712_delta_cs8403_spdif_write(ice, val); 229 } else { 230 spin_unlock_irq(&ice->reg_lock); 231 } 232 return change; 233 } 234 235 static void delta_spdif_stream_get(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 236 { 237 snd_cs8403_decode_spdif_bits(&ucontrol->value.iec958, ice->spdif.cs8403_stream_bits); 238 } 239 240 static int delta_spdif_stream_put(struct snd_ice1712 *ice, struct snd_ctl_elem_value *ucontrol) 241 { 242 unsigned int val; 243 int change; 244 245 val = snd_cs8403_encode_spdif_bits(&ucontrol->value.iec958); 246 spin_lock_irq(&ice->reg_lock); 247 change = ice->spdif.cs8403_stream_bits != val; 248 ice->spdif.cs8403_stream_bits = val; 249 if (change && ice->playback_pro_substream != NULL) { 250 spin_unlock_irq(&ice->reg_lock); 251 snd_ice1712_delta_cs8403_spdif_write(ice, val); 252 } else { 253 spin_unlock_irq(&ice->reg_lock); 254 } 255 return change; 256 } 257 258 259 /* 260 * AK4524 on Delta 44 and 66 to choose the chip mask 261 */ 262 static void delta_ak4524_lock(struct snd_akm4xxx *ak, int chip) 263 { 264 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 265 struct snd_ice1712 *ice = ak->private_data[0]; 266 267 snd_ice1712_save_gpio_status(ice); 268 priv->cs_mask = 269 priv->cs_addr = chip == 0 ? ICE1712_DELTA_CODEC_CHIP_A : 270 ICE1712_DELTA_CODEC_CHIP_B; 271 } 272 273 /* 274 * AK4524 on Delta1010LT to choose the chip address 275 */ 276 static void delta1010lt_ak4524_lock(struct snd_akm4xxx *ak, int chip) 277 { 278 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 279 struct snd_ice1712 *ice = ak->private_data[0]; 280 281 snd_ice1712_save_gpio_status(ice); 282 priv->cs_mask = ICE1712_DELTA_1010LT_CS; 283 priv->cs_addr = chip << 4; 284 } 285 286 /* 287 * AK4524 on Delta66 rev E to choose the chip address 288 */ 289 static void delta66e_ak4524_lock(struct snd_akm4xxx *ak, int chip) 290 { 291 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 292 struct snd_ice1712 *ice = ak->private_data[0]; 293 294 snd_ice1712_save_gpio_status(ice); 295 priv->cs_mask = 296 priv->cs_addr = chip == 0 ? ICE1712_DELTA_66E_CS_CHIP_A : 297 ICE1712_DELTA_66E_CS_CHIP_B; 298 } 299 300 /* 301 * AK4528 on VX442 to choose the chip mask 302 */ 303 static void vx442_ak4524_lock(struct snd_akm4xxx *ak, int chip) 304 { 305 struct snd_ak4xxx_private *priv = (void *)ak->private_value[0]; 306 struct snd_ice1712 *ice = ak->private_data[0]; 307 308 snd_ice1712_save_gpio_status(ice); 309 priv->cs_mask = 310 priv->cs_addr = chip == 0 ? ICE1712_VX442_CODEC_CHIP_A : 311 ICE1712_VX442_CODEC_CHIP_B; 312 } 313 314 /* 315 * change the DFS bit according rate for Delta1010 316 */ 317 static void delta_1010_set_rate_val(struct snd_ice1712 *ice, unsigned int rate) 318 { 319 unsigned char tmp, tmp2; 320 321 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 322 return; 323 324 mutex_lock(&ice->gpio_mutex); 325 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 326 tmp2 = tmp & ~ICE1712_DELTA_DFS; 327 if (rate > 48000) 328 tmp2 |= ICE1712_DELTA_DFS; 329 if (tmp != tmp2) 330 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp2); 331 mutex_unlock(&ice->gpio_mutex); 332 } 333 334 /* 335 * change the rate of AK4524 on Delta 44/66, AP, 1010LT 336 */ 337 static void delta_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 338 { 339 unsigned char tmp, tmp2; 340 struct snd_ice1712 *ice = ak->private_data[0]; 341 342 if (rate == 0) /* no hint - S/PDIF input is master, simply return */ 343 return; 344 345 /* check before reset ak4524 to avoid unnecessary clicks */ 346 mutex_lock(&ice->gpio_mutex); 347 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 348 mutex_unlock(&ice->gpio_mutex); 349 tmp2 = tmp & ~ICE1712_DELTA_DFS; 350 if (rate > 48000) 351 tmp2 |= ICE1712_DELTA_DFS; 352 if (tmp == tmp2) 353 return; 354 355 /* do it again */ 356 snd_akm4xxx_reset(ak, 1); 357 mutex_lock(&ice->gpio_mutex); 358 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA) & ~ICE1712_DELTA_DFS; 359 if (rate > 48000) 360 tmp |= ICE1712_DELTA_DFS; 361 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 362 mutex_unlock(&ice->gpio_mutex); 363 snd_akm4xxx_reset(ak, 0); 364 } 365 366 /* 367 * change the rate of AK4524 on VX442 368 */ 369 static void vx442_ak4524_set_rate_val(struct snd_akm4xxx *ak, unsigned int rate) 370 { 371 unsigned char val; 372 373 val = (rate > 48000) ? 0x65 : 0x60; 374 if (snd_akm4xxx_get(ak, 0, 0x02) != val || 375 snd_akm4xxx_get(ak, 1, 0x02) != val) { 376 snd_akm4xxx_reset(ak, 1); 377 snd_akm4xxx_write(ak, 0, 0x02, val); 378 snd_akm4xxx_write(ak, 1, 0x02, val); 379 snd_akm4xxx_reset(ak, 0); 380 } 381 } 382 383 384 /* 385 * SPDIF ops for Delta 1010, Dio, 66 386 */ 387 388 /* open callback */ 389 static void delta_open_spdif(struct snd_ice1712 *ice, struct snd_pcm_substream *substream) 390 { 391 ice->spdif.cs8403_stream_bits = ice->spdif.cs8403_bits; 392 } 393 394 /* set up */ 395 static void delta_setup_spdif(struct snd_ice1712 *ice, int rate) 396 { 397 unsigned long flags; 398 unsigned int tmp; 399 int change; 400 401 spin_lock_irqsave(&ice->reg_lock, flags); 402 tmp = ice->spdif.cs8403_stream_bits; 403 if (tmp & 0x01) /* consumer */ 404 tmp &= (tmp & 0x01) ? ~0x06 : ~0x18; 405 switch (rate) { 406 case 32000: tmp |= (tmp & 0x01) ? 0x04 : 0x00; break; 407 case 44100: tmp |= (tmp & 0x01) ? 0x00 : 0x10; break; 408 case 48000: tmp |= (tmp & 0x01) ? 0x02 : 0x08; break; 409 default: tmp |= (tmp & 0x01) ? 0x00 : 0x18; break; 410 } 411 change = ice->spdif.cs8403_stream_bits != tmp; 412 ice->spdif.cs8403_stream_bits = tmp; 413 spin_unlock_irqrestore(&ice->reg_lock, flags); 414 if (change) 415 snd_ctl_notify(ice->card, SNDRV_CTL_EVENT_MASK_VALUE, &ice->spdif.stream_ctl->id); 416 snd_ice1712_delta_cs8403_spdif_write(ice, tmp); 417 } 418 419 #define snd_ice1712_delta1010lt_wordclock_status_info \ 420 snd_ctl_boolean_mono_info 421 422 static int snd_ice1712_delta1010lt_wordclock_status_get(struct snd_kcontrol *kcontrol, 423 struct snd_ctl_elem_value *ucontrol) 424 { 425 char reg = 0x10; /* CS8427 receiver error register */ 426 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); 427 428 if (snd_i2c_sendbytes(ice->cs8427, ®, 1) != 1) 429 snd_printk(KERN_ERR "unable to send register 0x%x byte to CS8427\n", reg); 430 snd_i2c_readbytes(ice->cs8427, ®, 1); 431 ucontrol->value.integer.value[0] = (reg & CS8427_UNLOCK) ? 1 : 0; 432 return 0; 433 } 434 435 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_status __devinitdata = 436 { 437 .access = (SNDRV_CTL_ELEM_ACCESS_READ), 438 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 439 .name = "Word Clock Status", 440 .info = snd_ice1712_delta1010lt_wordclock_status_info, 441 .get = snd_ice1712_delta1010lt_wordclock_status_get, 442 }; 443 444 /* 445 * initialize the chips on M-Audio cards 446 */ 447 448 static struct snd_akm4xxx akm_audiophile __devinitdata = { 449 .type = SND_AK4528, 450 .num_adcs = 2, 451 .num_dacs = 2, 452 .ops = { 453 .set_rate_val = delta_ak4524_set_rate_val 454 } 455 }; 456 457 static struct snd_ak4xxx_private akm_audiophile_priv __devinitdata = { 458 .caddr = 2, 459 .cif = 0, 460 .data_mask = ICE1712_DELTA_AP_DOUT, 461 .clk_mask = ICE1712_DELTA_AP_CCLK, 462 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 463 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 464 .cs_none = 0, 465 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 466 .mask_flags = 0, 467 }; 468 469 static struct snd_akm4xxx akm_delta410 __devinitdata = { 470 .type = SND_AK4529, 471 .num_adcs = 2, 472 .num_dacs = 8, 473 .ops = { 474 .set_rate_val = delta_ak4524_set_rate_val 475 } 476 }; 477 478 static struct snd_ak4xxx_private akm_delta410_priv __devinitdata = { 479 .caddr = 0, 480 .cif = 0, 481 .data_mask = ICE1712_DELTA_AP_DOUT, 482 .clk_mask = ICE1712_DELTA_AP_CCLK, 483 .cs_mask = ICE1712_DELTA_AP_CS_CODEC, 484 .cs_addr = ICE1712_DELTA_AP_CS_CODEC, 485 .cs_none = 0, 486 .add_flags = ICE1712_DELTA_AP_CS_DIGITAL, 487 .mask_flags = 0, 488 }; 489 490 static struct snd_akm4xxx akm_delta1010lt __devinitdata = { 491 .type = SND_AK4524, 492 .num_adcs = 8, 493 .num_dacs = 8, 494 .ops = { 495 .lock = delta1010lt_ak4524_lock, 496 .set_rate_val = delta_ak4524_set_rate_val 497 } 498 }; 499 500 static struct snd_ak4xxx_private akm_delta1010lt_priv __devinitdata = { 501 .caddr = 2, 502 .cif = 0, /* the default level of the CIF pin from AK4524 */ 503 .data_mask = ICE1712_DELTA_1010LT_DOUT, 504 .clk_mask = ICE1712_DELTA_1010LT_CCLK, 505 .cs_mask = 0, 506 .cs_addr = 0, /* set later */ 507 .cs_none = ICE1712_DELTA_1010LT_CS_NONE, 508 .add_flags = 0, 509 .mask_flags = 0, 510 }; 511 512 static struct snd_akm4xxx akm_delta66e __devinitdata = { 513 .type = SND_AK4524, 514 .num_adcs = 4, 515 .num_dacs = 4, 516 .ops = { 517 .lock = delta66e_ak4524_lock, 518 .set_rate_val = delta_ak4524_set_rate_val 519 } 520 }; 521 522 static struct snd_ak4xxx_private akm_delta66e_priv __devinitdata = { 523 .caddr = 2, 524 .cif = 0, /* the default level of the CIF pin from AK4524 */ 525 .data_mask = ICE1712_DELTA_66E_DOUT, 526 .clk_mask = ICE1712_DELTA_66E_CCLK, 527 .cs_mask = 0, 528 .cs_addr = 0, /* set later */ 529 .cs_none = 0, 530 .add_flags = 0, 531 .mask_flags = 0, 532 }; 533 534 535 static struct snd_akm4xxx akm_delta44 __devinitdata = { 536 .type = SND_AK4524, 537 .num_adcs = 4, 538 .num_dacs = 4, 539 .ops = { 540 .lock = delta_ak4524_lock, 541 .set_rate_val = delta_ak4524_set_rate_val 542 } 543 }; 544 545 static struct snd_ak4xxx_private akm_delta44_priv __devinitdata = { 546 .caddr = 2, 547 .cif = 0, /* the default level of the CIF pin from AK4524 */ 548 .data_mask = ICE1712_DELTA_CODEC_SERIAL_DATA, 549 .clk_mask = ICE1712_DELTA_CODEC_SERIAL_CLOCK, 550 .cs_mask = 0, 551 .cs_addr = 0, /* set later */ 552 .cs_none = 0, 553 .add_flags = 0, 554 .mask_flags = 0, 555 }; 556 557 static struct snd_akm4xxx akm_vx442 __devinitdata = { 558 .type = SND_AK4524, 559 .num_adcs = 4, 560 .num_dacs = 4, 561 .ops = { 562 .lock = vx442_ak4524_lock, 563 .set_rate_val = vx442_ak4524_set_rate_val 564 } 565 }; 566 567 static struct snd_ak4xxx_private akm_vx442_priv __devinitdata = { 568 .caddr = 2, 569 .cif = 0, 570 .data_mask = ICE1712_VX442_DOUT, 571 .clk_mask = ICE1712_VX442_CCLK, 572 .cs_mask = 0, 573 .cs_addr = 0, /* set later */ 574 .cs_none = 0, 575 .add_flags = 0, 576 .mask_flags = 0, 577 }; 578 579 static int __devinit snd_ice1712_delta_init(struct snd_ice1712 *ice) 580 { 581 int err; 582 struct snd_akm4xxx *ak; 583 unsigned char tmp; 584 585 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA1010 && 586 ice->eeprom.gpiodir == 0x7b) 587 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA1010E; 588 589 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DELTA66 && 590 ice->eeprom.gpiodir == 0xfb) 591 ice->eeprom.subvendor = ICE1712_SUBDEVICE_DELTA66E; 592 593 /* determine I2C, DACs and ADCs */ 594 switch (ice->eeprom.subvendor) { 595 case ICE1712_SUBDEVICE_AUDIOPHILE: 596 ice->num_total_dacs = 2; 597 ice->num_total_adcs = 2; 598 break; 599 case ICE1712_SUBDEVICE_DELTA410: 600 ice->num_total_dacs = 8; 601 ice->num_total_adcs = 2; 602 break; 603 case ICE1712_SUBDEVICE_DELTA44: 604 case ICE1712_SUBDEVICE_DELTA66: 605 ice->num_total_dacs = ice->omni ? 8 : 4; 606 ice->num_total_adcs = ice->omni ? 8 : 4; 607 break; 608 case ICE1712_SUBDEVICE_DELTA1010: 609 case ICE1712_SUBDEVICE_DELTA1010E: 610 case ICE1712_SUBDEVICE_DELTA1010LT: 611 case ICE1712_SUBDEVICE_MEDIASTATION: 612 case ICE1712_SUBDEVICE_EDIROLDA2496: 613 ice->num_total_dacs = 8; 614 ice->num_total_adcs = 8; 615 break; 616 case ICE1712_SUBDEVICE_DELTADIO2496: 617 ice->num_total_dacs = 4; /* two AK4324 codecs */ 618 break; 619 case ICE1712_SUBDEVICE_VX442: 620 case ICE1712_SUBDEVICE_DELTA66E: /* omni not suported yet */ 621 ice->num_total_dacs = 4; 622 ice->num_total_adcs = 4; 623 break; 624 } 625 626 /* initialize the SPI clock to high */ 627 tmp = snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA); 628 tmp |= ICE1712_DELTA_AP_CCLK; 629 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, tmp); 630 udelay(5); 631 632 /* initialize spdif */ 633 switch (ice->eeprom.subvendor) { 634 case ICE1712_SUBDEVICE_AUDIOPHILE: 635 case ICE1712_SUBDEVICE_DELTA410: 636 case ICE1712_SUBDEVICE_DELTA1010E: 637 case ICE1712_SUBDEVICE_DELTA1010LT: 638 case ICE1712_SUBDEVICE_VX442: 639 case ICE1712_SUBDEVICE_DELTA66E: 640 if ((err = snd_i2c_bus_create(ice->card, "ICE1712 GPIO 1", NULL, &ice->i2c)) < 0) { 641 snd_printk(KERN_ERR "unable to create I2C bus\n"); 642 return err; 643 } 644 ice->i2c->private_data = ice; 645 ice->i2c->ops = &ap_cs8427_i2c_ops; 646 if ((err = snd_ice1712_init_cs8427(ice, CS8427_BASE_ADDR)) < 0) 647 return err; 648 break; 649 case ICE1712_SUBDEVICE_DELTA1010: 650 case ICE1712_SUBDEVICE_MEDIASTATION: 651 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 652 break; 653 case ICE1712_SUBDEVICE_DELTADIO2496: 654 ice->gpio.set_pro_rate = delta_1010_set_rate_val; 655 /* fall thru */ 656 case ICE1712_SUBDEVICE_DELTA66: 657 ice->spdif.ops.open = delta_open_spdif; 658 ice->spdif.ops.setup_rate = delta_setup_spdif; 659 ice->spdif.ops.default_get = delta_spdif_default_get; 660 ice->spdif.ops.default_put = delta_spdif_default_put; 661 ice->spdif.ops.stream_get = delta_spdif_stream_get; 662 ice->spdif.ops.stream_put = delta_spdif_stream_put; 663 /* Set spdif defaults */ 664 snd_ice1712_delta_cs8403_spdif_write(ice, ice->spdif.cs8403_bits); 665 break; 666 } 667 668 /* no analog? */ 669 switch (ice->eeprom.subvendor) { 670 case ICE1712_SUBDEVICE_DELTA1010: 671 case ICE1712_SUBDEVICE_DELTA1010E: 672 case ICE1712_SUBDEVICE_DELTADIO2496: 673 case ICE1712_SUBDEVICE_MEDIASTATION: 674 return 0; 675 } 676 677 /* second stage of initialization, analog parts and others */ 678 ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); 679 if (! ak) 680 return -ENOMEM; 681 ice->akm_codecs = 1; 682 683 switch (ice->eeprom.subvendor) { 684 case ICE1712_SUBDEVICE_AUDIOPHILE: 685 err = snd_ice1712_akm4xxx_init(ak, &akm_audiophile, &akm_audiophile_priv, ice); 686 break; 687 case ICE1712_SUBDEVICE_DELTA410: 688 err = snd_ice1712_akm4xxx_init(ak, &akm_delta410, &akm_delta410_priv, ice); 689 break; 690 case ICE1712_SUBDEVICE_DELTA1010LT: 691 case ICE1712_SUBDEVICE_EDIROLDA2496: 692 err = snd_ice1712_akm4xxx_init(ak, &akm_delta1010lt, &akm_delta1010lt_priv, ice); 693 break; 694 case ICE1712_SUBDEVICE_DELTA66: 695 case ICE1712_SUBDEVICE_DELTA44: 696 err = snd_ice1712_akm4xxx_init(ak, &akm_delta44, &akm_delta44_priv, ice); 697 break; 698 case ICE1712_SUBDEVICE_VX442: 699 err = snd_ice1712_akm4xxx_init(ak, &akm_vx442, &akm_vx442_priv, ice); 700 break; 701 case ICE1712_SUBDEVICE_DELTA66E: 702 err = snd_ice1712_akm4xxx_init(ak, &akm_delta66e, &akm_delta66e_priv, ice); 703 break; 704 default: 705 snd_BUG(); 706 return -EINVAL; 707 } 708 709 return err; 710 } 711 712 713 /* 714 * additional controls for M-Audio cards 715 */ 716 717 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_select __devinitdata = 718 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_WORD_CLOCK_SELECT, 1, 0); 719 static struct snd_kcontrol_new snd_ice1712_delta1010lt_wordclock_select __devinitdata = 720 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Sync", 0, ICE1712_DELTA_1010LT_WORDCLOCK, 0, 0); 721 static struct snd_kcontrol_new snd_ice1712_delta1010_wordclock_status __devinitdata = 722 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Word Clock Status", 0, ICE1712_DELTA_WORD_CLOCK_STATUS, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 723 static struct snd_kcontrol_new snd_ice1712_deltadio2496_spdif_in_select __devinitdata = 724 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "IEC958 Input Optical", 0, ICE1712_DELTA_SPDIF_INPUT_SELECT, 0, 0); 725 static struct snd_kcontrol_new snd_ice1712_delta_spdif_in_status __devinitdata = 726 ICE1712_GPIO(SNDRV_CTL_ELEM_IFACE_MIXER, "Delta IEC958 Input Status", 0, ICE1712_DELTA_SPDIF_IN_STAT, 1, SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE); 727 728 729 static int __devinit snd_ice1712_delta_add_controls(struct snd_ice1712 *ice) 730 { 731 int err; 732 733 /* 1010 and dio specific controls */ 734 switch (ice->eeprom.subvendor) { 735 case ICE1712_SUBDEVICE_DELTA1010: 736 case ICE1712_SUBDEVICE_MEDIASTATION: 737 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_select, ice)); 738 if (err < 0) 739 return err; 740 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010_wordclock_status, ice)); 741 if (err < 0) 742 return err; 743 break; 744 case ICE1712_SUBDEVICE_DELTADIO2496: 745 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_deltadio2496_spdif_in_select, ice)); 746 if (err < 0) 747 return err; 748 break; 749 case ICE1712_SUBDEVICE_DELTA1010E: 750 case ICE1712_SUBDEVICE_DELTA1010LT: 751 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_select, ice)); 752 if (err < 0) 753 return err; 754 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta1010lt_wordclock_status, ice)); 755 if (err < 0) 756 return err; 757 break; 758 } 759 760 /* normal spdif controls */ 761 switch (ice->eeprom.subvendor) { 762 case ICE1712_SUBDEVICE_DELTA1010: 763 case ICE1712_SUBDEVICE_DELTADIO2496: 764 case ICE1712_SUBDEVICE_DELTA66: 765 case ICE1712_SUBDEVICE_MEDIASTATION: 766 err = snd_ice1712_spdif_build_controls(ice); 767 if (err < 0) 768 return err; 769 break; 770 } 771 772 /* spdif status in */ 773 switch (ice->eeprom.subvendor) { 774 case ICE1712_SUBDEVICE_DELTA1010: 775 case ICE1712_SUBDEVICE_DELTADIO2496: 776 case ICE1712_SUBDEVICE_DELTA66: 777 case ICE1712_SUBDEVICE_MEDIASTATION: 778 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_delta_spdif_in_status, ice)); 779 if (err < 0) 780 return err; 781 break; 782 } 783 784 /* ak4524 controls */ 785 switch (ice->eeprom.subvendor) { 786 case ICE1712_SUBDEVICE_DELTA1010LT: 787 case ICE1712_SUBDEVICE_AUDIOPHILE: 788 case ICE1712_SUBDEVICE_DELTA410: 789 case ICE1712_SUBDEVICE_DELTA44: 790 case ICE1712_SUBDEVICE_DELTA66: 791 case ICE1712_SUBDEVICE_VX442: 792 case ICE1712_SUBDEVICE_DELTA66E: 793 case ICE1712_SUBDEVICE_EDIROLDA2496: 794 err = snd_ice1712_akm4xxx_build_controls(ice); 795 if (err < 0) 796 return err; 797 break; 798 } 799 800 return 0; 801 } 802 803 804 /* entry point */ 805 struct snd_ice1712_card_info snd_ice1712_delta_cards[] __devinitdata = { 806 { 807 .subvendor = ICE1712_SUBDEVICE_DELTA1010, 808 .name = "M Audio Delta 1010", 809 .model = "delta1010", 810 .chip_init = snd_ice1712_delta_init, 811 .build_controls = snd_ice1712_delta_add_controls, 812 }, 813 { 814 .subvendor = ICE1712_SUBDEVICE_DELTADIO2496, 815 .name = "M Audio Delta DiO 2496", 816 .model = "dio2496", 817 .chip_init = snd_ice1712_delta_init, 818 .build_controls = snd_ice1712_delta_add_controls, 819 .no_mpu401 = 1, 820 }, 821 { 822 .subvendor = ICE1712_SUBDEVICE_DELTA66, 823 .name = "M Audio Delta 66", 824 .model = "delta66", 825 .chip_init = snd_ice1712_delta_init, 826 .build_controls = snd_ice1712_delta_add_controls, 827 .no_mpu401 = 1, 828 }, 829 { 830 .subvendor = ICE1712_SUBDEVICE_DELTA44, 831 .name = "M Audio Delta 44", 832 .model = "delta44", 833 .chip_init = snd_ice1712_delta_init, 834 .build_controls = snd_ice1712_delta_add_controls, 835 .no_mpu401 = 1, 836 }, 837 { 838 .subvendor = ICE1712_SUBDEVICE_AUDIOPHILE, 839 .name = "M Audio Audiophile 24/96", 840 .model = "audiophile", 841 .chip_init = snd_ice1712_delta_init, 842 .build_controls = snd_ice1712_delta_add_controls, 843 }, 844 { 845 .subvendor = ICE1712_SUBDEVICE_DELTA410, 846 .name = "M Audio Delta 410", 847 .model = "delta410", 848 .chip_init = snd_ice1712_delta_init, 849 .build_controls = snd_ice1712_delta_add_controls, 850 }, 851 { 852 .subvendor = ICE1712_SUBDEVICE_DELTA1010LT, 853 .name = "M Audio Delta 1010LT", 854 .model = "delta1010lt", 855 .chip_init = snd_ice1712_delta_init, 856 .build_controls = snd_ice1712_delta_add_controls, 857 }, 858 { 859 .subvendor = ICE1712_SUBDEVICE_VX442, 860 .name = "Digigram VX442", 861 .model = "vx442", 862 .chip_init = snd_ice1712_delta_init, 863 .build_controls = snd_ice1712_delta_add_controls, 864 .no_mpu401 = 1, 865 }, 866 { 867 .subvendor = ICE1712_SUBDEVICE_MEDIASTATION, 868 .name = "Lionstracs Mediastation", 869 .model = "mediastation", 870 .chip_init = snd_ice1712_delta_init, 871 .build_controls = snd_ice1712_delta_add_controls, 872 }, 873 { 874 .subvendor = ICE1712_SUBDEVICE_EDIROLDA2496, 875 .name = "Edirol DA2496", 876 .model = "da2496", 877 .chip_init = snd_ice1712_delta_init, 878 .build_controls = snd_ice1712_delta_add_controls, 879 }, 880 { } /* terminator */ 881 }; 882