1 /* 2 * Universal Interface for Intel High Definition Audio Codec 3 * 4 * HD audio interface patch for SigmaTel STAC92xx 5 * 6 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 7 * Matt Porter <mporter@embeddedalley.com> 8 * 9 * Based on patch_cmedia.c and patch_realtek.c 10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 11 * 12 * This driver is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This driver is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/init.h> 28 #include <linux/delay.h> 29 #include <linux/slab.h> 30 #include <linux/pci.h> 31 #include <linux/dmi.h> 32 #include <linux/module.h> 33 #include <sound/core.h> 34 #include <sound/jack.h> 35 #include "hda_codec.h" 36 #include "hda_local.h" 37 #include "hda_auto_parser.h" 38 #include "hda_beep.h" 39 #include "hda_jack.h" 40 #include "hda_generic.h" 41 42 enum { 43 STAC_REF, 44 STAC_9200_OQO, 45 STAC_9200_DELL_D21, 46 STAC_9200_DELL_D22, 47 STAC_9200_DELL_D23, 48 STAC_9200_DELL_M21, 49 STAC_9200_DELL_M22, 50 STAC_9200_DELL_M23, 51 STAC_9200_DELL_M24, 52 STAC_9200_DELL_M25, 53 STAC_9200_DELL_M26, 54 STAC_9200_DELL_M27, 55 STAC_9200_M4, 56 STAC_9200_M4_2, 57 STAC_9200_PANASONIC, 58 STAC_9200_EAPD_INIT, 59 STAC_9200_MODELS 60 }; 61 62 enum { 63 STAC_9205_REF, 64 STAC_9205_DELL_M42, 65 STAC_9205_DELL_M43, 66 STAC_9205_DELL_M44, 67 STAC_9205_EAPD, 68 STAC_9205_MODELS 69 }; 70 71 enum { 72 STAC_92HD73XX_NO_JD, /* no jack-detection */ 73 STAC_92HD73XX_REF, 74 STAC_92HD73XX_INTEL, 75 STAC_DELL_M6_AMIC, 76 STAC_DELL_M6_DMIC, 77 STAC_DELL_M6_BOTH, 78 STAC_DELL_EQ, 79 STAC_ALIENWARE_M17X, 80 STAC_92HD89XX_HP_FRONT_JACK, 81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK, 82 STAC_92HD73XX_MODELS 83 }; 84 85 enum { 86 STAC_92HD83XXX_REF, 87 STAC_92HD83XXX_PWR_REF, 88 STAC_DELL_S14, 89 STAC_DELL_VOSTRO_3500, 90 STAC_92HD83XXX_HP_cNB11_INTQUAD, 91 STAC_HP_DV7_4000, 92 STAC_HP_ZEPHYR, 93 STAC_92HD83XXX_HP_LED, 94 STAC_92HD83XXX_HP_INV_LED, 95 STAC_92HD83XXX_HP_MIC_LED, 96 STAC_HP_LED_GPIO10, 97 STAC_92HD83XXX_HEADSET_JACK, 98 STAC_92HD83XXX_HP, 99 STAC_HP_ENVY_BASS, 100 STAC_HP_BNB13_EQ, 101 STAC_HP_ENVY_TS_BASS, 102 STAC_92HD83XXX_MODELS 103 }; 104 105 enum { 106 STAC_92HD71BXX_REF, 107 STAC_DELL_M4_1, 108 STAC_DELL_M4_2, 109 STAC_DELL_M4_3, 110 STAC_HP_M4, 111 STAC_HP_DV4, 112 STAC_HP_DV5, 113 STAC_HP_HDX, 114 STAC_92HD71BXX_HP, 115 STAC_92HD71BXX_NO_DMIC, 116 STAC_92HD71BXX_NO_SMUX, 117 STAC_92HD71BXX_MODELS 118 }; 119 120 enum { 121 STAC_92HD95_HP_LED, 122 STAC_92HD95_HP_BASS, 123 STAC_92HD95_MODELS 124 }; 125 126 enum { 127 STAC_925x_REF, 128 STAC_M1, 129 STAC_M1_2, 130 STAC_M2, 131 STAC_M2_2, 132 STAC_M3, 133 STAC_M5, 134 STAC_M6, 135 STAC_925x_MODELS 136 }; 137 138 enum { 139 STAC_D945_REF, 140 STAC_D945GTP3, 141 STAC_D945GTP5, 142 STAC_INTEL_MAC_V1, 143 STAC_INTEL_MAC_V2, 144 STAC_INTEL_MAC_V3, 145 STAC_INTEL_MAC_V4, 146 STAC_INTEL_MAC_V5, 147 STAC_INTEL_MAC_AUTO, 148 STAC_ECS_202, 149 STAC_922X_DELL_D81, 150 STAC_922X_DELL_D82, 151 STAC_922X_DELL_M81, 152 STAC_922X_DELL_M82, 153 STAC_922X_INTEL_MAC_GPIO, 154 STAC_922X_MODELS 155 }; 156 157 enum { 158 STAC_D965_REF_NO_JD, /* no jack-detection */ 159 STAC_D965_REF, 160 STAC_D965_3ST, 161 STAC_D965_5ST, 162 STAC_D965_5ST_NO_FP, 163 STAC_D965_VERBS, 164 STAC_DELL_3ST, 165 STAC_DELL_BIOS, 166 STAC_DELL_BIOS_AMIC, 167 STAC_DELL_BIOS_SPDIF, 168 STAC_927X_DELL_DMIC, 169 STAC_927X_VOLKNOB, 170 STAC_927X_MODELS 171 }; 172 173 enum { 174 STAC_9872_VAIO, 175 STAC_9872_MODELS 176 }; 177 178 struct sigmatel_spec { 179 struct hda_gen_spec gen; 180 181 unsigned int eapd_switch: 1; 182 unsigned int linear_tone_beep:1; 183 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 184 unsigned int volknob_init:1; /* special volume-knob initialization */ 185 unsigned int powerdown_adcs:1; 186 unsigned int have_spdif_mux:1; 187 188 /* gpio lines */ 189 unsigned int eapd_mask; 190 unsigned int gpio_mask; 191 unsigned int gpio_dir; 192 unsigned int gpio_data; 193 unsigned int gpio_mute; 194 unsigned int gpio_led; 195 unsigned int gpio_led_polarity; 196 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 197 unsigned int vref_led; 198 int default_polarity; 199 200 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 201 unsigned int mic_enabled; /* current mic mute state (bitmask) */ 202 203 /* stream */ 204 unsigned int stream_delay; 205 206 /* analog loopback */ 207 const struct snd_kcontrol_new *aloopback_ctl; 208 unsigned int aloopback; 209 unsigned char aloopback_mask; 210 unsigned char aloopback_shift; 211 212 /* power management */ 213 unsigned int power_map_bits; 214 unsigned int num_pwrs; 215 const hda_nid_t *pwr_nids; 216 unsigned int active_adcs; 217 218 /* beep widgets */ 219 hda_nid_t anabeep_nid; 220 221 /* SPDIF-out mux */ 222 const char * const *spdif_labels; 223 struct hda_input_mux spdif_mux; 224 unsigned int cur_smux[2]; 225 }; 226 227 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec 228 #define AC_VERB_IDT_GET_POWER_MAP 0xfec 229 230 static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 231 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 232 0x0f, 0x10, 0x11 233 }; 234 235 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 236 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 237 0x0f, 0x10 238 }; 239 240 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 241 0x0a, 0x0d, 0x0f 242 }; 243 244 245 /* 246 * PCM hooks 247 */ 248 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 249 struct hda_codec *codec, 250 struct snd_pcm_substream *substream, 251 int action) 252 { 253 struct sigmatel_spec *spec = codec->spec; 254 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 255 msleep(spec->stream_delay); 256 } 257 258 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 259 struct hda_codec *codec, 260 struct snd_pcm_substream *substream, 261 int action) 262 { 263 struct sigmatel_spec *spec = codec->spec; 264 int i, idx = 0; 265 266 if (!spec->powerdown_adcs) 267 return; 268 269 for (i = 0; i < spec->gen.num_all_adcs; i++) { 270 if (spec->gen.all_adcs[i] == hinfo->nid) { 271 idx = i; 272 break; 273 } 274 } 275 276 switch (action) { 277 case HDA_GEN_PCM_ACT_OPEN: 278 msleep(40); 279 snd_hda_codec_write(codec, hinfo->nid, 0, 280 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 281 spec->active_adcs |= (1 << idx); 282 break; 283 case HDA_GEN_PCM_ACT_CLOSE: 284 snd_hda_codec_write(codec, hinfo->nid, 0, 285 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 286 spec->active_adcs &= ~(1 << idx); 287 break; 288 } 289 } 290 291 /* 292 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 293 * funky external mute control using GPIO pins. 294 */ 295 296 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 297 unsigned int dir_mask, unsigned int data) 298 { 299 unsigned int gpiostate, gpiomask, gpiodir; 300 301 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 302 303 gpiostate = snd_hda_codec_read(codec, codec->afg, 0, 304 AC_VERB_GET_GPIO_DATA, 0); 305 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 306 307 gpiomask = snd_hda_codec_read(codec, codec->afg, 0, 308 AC_VERB_GET_GPIO_MASK, 0); 309 gpiomask |= mask; 310 311 gpiodir = snd_hda_codec_read(codec, codec->afg, 0, 312 AC_VERB_GET_GPIO_DIRECTION, 0); 313 gpiodir |= dir_mask; 314 315 /* Configure GPIOx as CMOS */ 316 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); 317 318 snd_hda_codec_write(codec, codec->afg, 0, 319 AC_VERB_SET_GPIO_MASK, gpiomask); 320 snd_hda_codec_read(codec, codec->afg, 0, 321 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 322 323 msleep(1); 324 325 snd_hda_codec_read(codec, codec->afg, 0, 326 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 327 } 328 329 /* hook for controlling mic-mute LED GPIO */ 330 static void stac_capture_led_hook(struct hda_codec *codec, 331 struct snd_kcontrol *kcontrol, 332 struct snd_ctl_elem_value *ucontrol) 333 { 334 struct sigmatel_spec *spec = codec->spec; 335 unsigned int mask; 336 bool cur_mute, prev_mute; 337 338 if (!kcontrol || !ucontrol) 339 return; 340 341 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 342 prev_mute = !spec->mic_enabled; 343 if (ucontrol->value.integer.value[0] || 344 ucontrol->value.integer.value[1]) 345 spec->mic_enabled |= mask; 346 else 347 spec->mic_enabled &= ~mask; 348 cur_mute = !spec->mic_enabled; 349 if (cur_mute != prev_mute) { 350 if (cur_mute) 351 spec->gpio_data |= spec->mic_mute_led_gpio; 352 else 353 spec->gpio_data &= ~spec->mic_mute_led_gpio; 354 stac_gpio_set(codec, spec->gpio_mask, 355 spec->gpio_dir, spec->gpio_data); 356 } 357 } 358 359 static int stac_vrefout_set(struct hda_codec *codec, 360 hda_nid_t nid, unsigned int new_vref) 361 { 362 int error, pinctl; 363 364 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref); 365 pinctl = snd_hda_codec_read(codec, nid, 0, 366 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 367 368 if (pinctl < 0) 369 return pinctl; 370 371 pinctl &= 0xff; 372 pinctl &= ~AC_PINCTL_VREFEN; 373 pinctl |= (new_vref & AC_PINCTL_VREFEN); 374 375 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 376 if (error < 0) 377 return error; 378 379 return 1; 380 } 381 382 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ 383 /* this hook is set in stac_setup_gpio() */ 384 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, 385 hda_nid_t nid, 386 unsigned int power_state) 387 { 388 if (nid == codec->afg && power_state == AC_PWRST_D3) 389 return AC_PWRST_D1; 390 return snd_hda_gen_path_power_filter(codec, nid, power_state); 391 } 392 393 /* update mute-LED accoring to the master switch */ 394 static void stac_update_led_status(struct hda_codec *codec, int enabled) 395 { 396 struct sigmatel_spec *spec = codec->spec; 397 int muted = !enabled; 398 399 if (!spec->gpio_led) 400 return; 401 402 /* LED state is inverted on these systems */ 403 if (spec->gpio_led_polarity) 404 muted = !muted; 405 406 if (!spec->vref_mute_led_nid) { 407 if (muted) 408 spec->gpio_data |= spec->gpio_led; 409 else 410 spec->gpio_data &= ~spec->gpio_led; 411 stac_gpio_set(codec, spec->gpio_mask, 412 spec->gpio_dir, spec->gpio_data); 413 } else { 414 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 415 stac_vrefout_set(codec, spec->vref_mute_led_nid, 416 spec->vref_led); 417 } 418 } 419 420 /* vmaster hook to update mute LED */ 421 static void stac_vmaster_hook(void *private_data, int val) 422 { 423 stac_update_led_status(private_data, val); 424 } 425 426 /* automute hook to handle GPIO mute and EAPD updates */ 427 static void stac_update_outputs(struct hda_codec *codec) 428 { 429 struct sigmatel_spec *spec = codec->spec; 430 431 if (spec->gpio_mute) 432 spec->gen.master_mute = 433 !(snd_hda_codec_read(codec, codec->afg, 0, 434 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 435 436 snd_hda_gen_update_outputs(codec); 437 438 if (spec->eapd_mask && spec->eapd_switch) { 439 unsigned int val = spec->gpio_data; 440 if (spec->gen.speaker_muted) 441 val &= ~spec->eapd_mask; 442 else 443 val |= spec->eapd_mask; 444 if (spec->gpio_data != val) { 445 spec->gpio_data = val; 446 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 447 val); 448 } 449 } 450 } 451 452 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 453 bool enable, bool do_write) 454 { 455 struct sigmatel_spec *spec = codec->spec; 456 unsigned int idx, val; 457 458 for (idx = 0; idx < spec->num_pwrs; idx++) { 459 if (spec->pwr_nids[idx] == nid) 460 break; 461 } 462 if (idx >= spec->num_pwrs) 463 return; 464 465 idx = 1 << idx; 466 467 val = spec->power_map_bits; 468 if (enable) 469 val &= ~idx; 470 else 471 val |= idx; 472 473 /* power down unused output ports */ 474 if (val != spec->power_map_bits) { 475 spec->power_map_bits = val; 476 if (do_write) 477 snd_hda_codec_write(codec, codec->afg, 0, 478 AC_VERB_IDT_SET_POWER_MAP, val); 479 } 480 } 481 482 /* update power bit per jack plug/unplug */ 483 static void jack_update_power(struct hda_codec *codec, 484 struct hda_jack_callback *jack) 485 { 486 struct sigmatel_spec *spec = codec->spec; 487 int i; 488 489 if (!spec->num_pwrs) 490 return; 491 492 if (jack && jack->tbl->nid) { 493 stac_toggle_power_map(codec, jack->tbl->nid, 494 snd_hda_jack_detect(codec, jack->tbl->nid), 495 true); 496 return; 497 } 498 499 /* update all jacks */ 500 for (i = 0; i < spec->num_pwrs; i++) { 501 hda_nid_t nid = spec->pwr_nids[i]; 502 if (!snd_hda_jack_tbl_get(codec, nid)) 503 continue; 504 stac_toggle_power_map(codec, nid, 505 snd_hda_jack_detect(codec, nid), 506 false); 507 } 508 509 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP, 510 spec->power_map_bits); 511 } 512 513 static void stac_vref_event(struct hda_codec *codec, 514 struct hda_jack_callback *event) 515 { 516 unsigned int data; 517 518 data = snd_hda_codec_read(codec, codec->afg, 0, 519 AC_VERB_GET_GPIO_DATA, 0); 520 /* toggle VREF state based on GPIOx status */ 521 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0, 522 !!(data & (1 << event->private_data))); 523 } 524 525 /* initialize the power map and enable the power event to jacks that 526 * haven't been assigned to automute 527 */ 528 static void stac_init_power_map(struct hda_codec *codec) 529 { 530 struct sigmatel_spec *spec = codec->spec; 531 int i; 532 533 for (i = 0; i < spec->num_pwrs; i++) { 534 hda_nid_t nid = spec->pwr_nids[i]; 535 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 536 def_conf = get_defcfg_connect(def_conf); 537 if (def_conf == AC_JACK_PORT_COMPLEX && 538 spec->vref_mute_led_nid != nid && 539 is_jack_detectable(codec, nid)) { 540 snd_hda_jack_detect_enable_callback(codec, nid, 541 jack_update_power); 542 } else { 543 if (def_conf == AC_JACK_PORT_NONE) 544 stac_toggle_power_map(codec, nid, false, false); 545 else 546 stac_toggle_power_map(codec, nid, true, false); 547 } 548 } 549 } 550 551 /* 552 */ 553 554 static inline bool get_int_hint(struct hda_codec *codec, const char *key, 555 int *valp) 556 { 557 return !snd_hda_get_int_hint(codec, key, valp); 558 } 559 560 /* override some hints from the hwdep entry */ 561 static void stac_store_hints(struct hda_codec *codec) 562 { 563 struct sigmatel_spec *spec = codec->spec; 564 int val; 565 566 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 567 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 568 spec->gpio_mask; 569 } 570 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 571 spec->gpio_dir &= spec->gpio_mask; 572 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 573 spec->gpio_data &= spec->gpio_mask; 574 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 575 spec->eapd_mask &= spec->gpio_mask; 576 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 577 spec->gpio_mute &= spec->gpio_mask; 578 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 579 if (val >= 0) 580 spec->eapd_switch = val; 581 } 582 583 /* 584 * loopback controls 585 */ 586 587 #define stac_aloopback_info snd_ctl_boolean_mono_info 588 589 static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 590 struct snd_ctl_elem_value *ucontrol) 591 { 592 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 593 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 594 struct sigmatel_spec *spec = codec->spec; 595 596 ucontrol->value.integer.value[0] = !!(spec->aloopback & 597 (spec->aloopback_mask << idx)); 598 return 0; 599 } 600 601 static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 602 struct snd_ctl_elem_value *ucontrol) 603 { 604 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 605 struct sigmatel_spec *spec = codec->spec; 606 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 607 unsigned int dac_mode; 608 unsigned int val, idx_val; 609 610 idx_val = spec->aloopback_mask << idx; 611 if (ucontrol->value.integer.value[0]) 612 val = spec->aloopback | idx_val; 613 else 614 val = spec->aloopback & ~idx_val; 615 if (spec->aloopback == val) 616 return 0; 617 618 spec->aloopback = val; 619 620 /* Only return the bits defined by the shift value of the 621 * first two bytes of the mask 622 */ 623 dac_mode = snd_hda_codec_read(codec, codec->afg, 0, 624 kcontrol->private_value & 0xFFFF, 0x0); 625 dac_mode >>= spec->aloopback_shift; 626 627 if (spec->aloopback & idx_val) { 628 snd_hda_power_up(codec); 629 dac_mode |= idx_val; 630 } else { 631 snd_hda_power_down(codec); 632 dac_mode &= ~idx_val; 633 } 634 635 snd_hda_codec_write_cache(codec, codec->afg, 0, 636 kcontrol->private_value >> 16, dac_mode); 637 638 return 1; 639 } 640 641 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 642 { \ 643 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 644 .name = "Analog Loopback", \ 645 .count = cnt, \ 646 .info = stac_aloopback_info, \ 647 .get = stac_aloopback_get, \ 648 .put = stac_aloopback_put, \ 649 .private_value = verb_read | (verb_write << 16), \ 650 } 651 652 /* 653 * Mute LED handling on HP laptops 654 */ 655 656 /* check whether it's a HP laptop with a docking port */ 657 static bool hp_bnb2011_with_dock(struct hda_codec *codec) 658 { 659 if (codec->vendor_id != 0x111d7605 && 660 codec->vendor_id != 0x111d76d1) 661 return false; 662 663 switch (codec->subsystem_id) { 664 case 0x103c1618: 665 case 0x103c1619: 666 case 0x103c161a: 667 case 0x103c161b: 668 case 0x103c161c: 669 case 0x103c161d: 670 case 0x103c161e: 671 case 0x103c161f: 672 673 case 0x103c162a: 674 case 0x103c162b: 675 676 case 0x103c1630: 677 case 0x103c1631: 678 679 case 0x103c1633: 680 case 0x103c1634: 681 case 0x103c1635: 682 683 case 0x103c3587: 684 case 0x103c3588: 685 case 0x103c3589: 686 case 0x103c358a: 687 688 case 0x103c3667: 689 case 0x103c3668: 690 case 0x103c3669: 691 692 return true; 693 } 694 return false; 695 } 696 697 static bool hp_blike_system(u32 subsystem_id) 698 { 699 switch (subsystem_id) { 700 case 0x103c1520: 701 case 0x103c1521: 702 case 0x103c1523: 703 case 0x103c1524: 704 case 0x103c1525: 705 case 0x103c1722: 706 case 0x103c1723: 707 case 0x103c1724: 708 case 0x103c1725: 709 case 0x103c1726: 710 case 0x103c1727: 711 case 0x103c1728: 712 case 0x103c1729: 713 case 0x103c172a: 714 case 0x103c172b: 715 case 0x103c307e: 716 case 0x103c307f: 717 case 0x103c3080: 718 case 0x103c3081: 719 case 0x103c7007: 720 case 0x103c7008: 721 return true; 722 } 723 return false; 724 } 725 726 static void set_hp_led_gpio(struct hda_codec *codec) 727 { 728 struct sigmatel_spec *spec = codec->spec; 729 unsigned int gpio; 730 731 if (spec->gpio_led) 732 return; 733 734 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP); 735 gpio &= AC_GPIO_IO_COUNT; 736 if (gpio > 3) 737 spec->gpio_led = 0x08; /* GPIO 3 */ 738 else 739 spec->gpio_led = 0x01; /* GPIO 0 */ 740 } 741 742 /* 743 * This method searches for the mute LED GPIO configuration 744 * provided as OEM string in SMBIOS. The format of that string 745 * is HP_Mute_LED_P_G or HP_Mute_LED_P 746 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 747 * that corresponds to the NOT muted state of the master volume 748 * and G is the index of the GPIO to use as the mute LED control (0..9) 749 * If _G portion is missing it is assigned based on the codec ID 750 * 751 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 752 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 753 * 754 * 755 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 756 * SMBIOS - at least the ones I have seen do not have them - which include 757 * my own system (HP Pavilion dv6-1110ax) and my cousin's 758 * HP Pavilion dv9500t CTO. 759 * Need more information on whether it is true across the entire series. 760 * -- kunal 761 */ 762 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 763 { 764 struct sigmatel_spec *spec = codec->spec; 765 const struct dmi_device *dev = NULL; 766 767 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 768 get_int_hint(codec, "gpio_led_polarity", 769 &spec->gpio_led_polarity); 770 return 1; 771 } 772 773 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 774 if (sscanf(dev->name, "HP_Mute_LED_%u_%x", 775 &spec->gpio_led_polarity, 776 &spec->gpio_led) == 2) { 777 unsigned int max_gpio; 778 max_gpio = snd_hda_param_read(codec, codec->afg, 779 AC_PAR_GPIO_CAP); 780 max_gpio &= AC_GPIO_IO_COUNT; 781 if (spec->gpio_led < max_gpio) 782 spec->gpio_led = 1 << spec->gpio_led; 783 else 784 spec->vref_mute_led_nid = spec->gpio_led; 785 return 1; 786 } 787 if (sscanf(dev->name, "HP_Mute_LED_%u", 788 &spec->gpio_led_polarity) == 1) { 789 set_hp_led_gpio(codec); 790 return 1; 791 } 792 /* BIOS bug: unfilled OEM string */ 793 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 794 set_hp_led_gpio(codec); 795 if (default_polarity >= 0) 796 spec->gpio_led_polarity = default_polarity; 797 else 798 spec->gpio_led_polarity = 1; 799 return 1; 800 } 801 } 802 803 /* 804 * Fallback case - if we don't find the DMI strings, 805 * we statically set the GPIO - if not a B-series system 806 * and default polarity is provided 807 */ 808 if (!hp_blike_system(codec->subsystem_id) && 809 (default_polarity == 0 || default_polarity == 1)) { 810 set_hp_led_gpio(codec); 811 spec->gpio_led_polarity = default_polarity; 812 return 1; 813 } 814 return 0; 815 } 816 817 /* check whether a built-in speaker is included in parsed pins */ 818 static bool has_builtin_speaker(struct hda_codec *codec) 819 { 820 struct sigmatel_spec *spec = codec->spec; 821 hda_nid_t *nid_pin; 822 int nids, i; 823 824 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 825 nid_pin = spec->gen.autocfg.line_out_pins; 826 nids = spec->gen.autocfg.line_outs; 827 } else { 828 nid_pin = spec->gen.autocfg.speaker_pins; 829 nids = spec->gen.autocfg.speaker_outs; 830 } 831 832 for (i = 0; i < nids; i++) { 833 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 834 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 835 return true; 836 } 837 return false; 838 } 839 840 /* 841 * PC beep controls 842 */ 843 844 /* create PC beep volume controls */ 845 static int stac_auto_create_beep_ctls(struct hda_codec *codec, 846 hda_nid_t nid) 847 { 848 struct sigmatel_spec *spec = codec->spec; 849 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 850 struct snd_kcontrol_new *knew; 851 static struct snd_kcontrol_new abeep_mute_ctl = 852 HDA_CODEC_MUTE(NULL, 0, 0, 0); 853 static struct snd_kcontrol_new dbeep_mute_ctl = 854 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 855 static struct snd_kcontrol_new beep_vol_ctl = 856 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 857 858 /* check for mute support for the the amp */ 859 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 860 const struct snd_kcontrol_new *temp; 861 if (spec->anabeep_nid == nid) 862 temp = &abeep_mute_ctl; 863 else 864 temp = &dbeep_mute_ctl; 865 knew = snd_hda_gen_add_kctl(&spec->gen, 866 "Beep Playback Switch", temp); 867 if (!knew) 868 return -ENOMEM; 869 knew->private_value = 870 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 871 } 872 873 /* check to see if there is volume support for the amp */ 874 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 875 knew = snd_hda_gen_add_kctl(&spec->gen, 876 "Beep Playback Volume", 877 &beep_vol_ctl); 878 if (!knew) 879 return -ENOMEM; 880 knew->private_value = 881 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 882 } 883 return 0; 884 } 885 886 #ifdef CONFIG_SND_HDA_INPUT_BEEP 887 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 888 889 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 890 struct snd_ctl_elem_value *ucontrol) 891 { 892 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 893 ucontrol->value.integer.value[0] = codec->beep->enabled; 894 return 0; 895 } 896 897 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 898 struct snd_ctl_elem_value *ucontrol) 899 { 900 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 901 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 902 } 903 904 static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 905 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 906 .name = "Beep Playback Switch", 907 .info = stac_dig_beep_switch_info, 908 .get = stac_dig_beep_switch_get, 909 .put = stac_dig_beep_switch_put, 910 }; 911 912 static int stac_beep_switch_ctl(struct hda_codec *codec) 913 { 914 struct sigmatel_spec *spec = codec->spec; 915 916 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 917 return -ENOMEM; 918 return 0; 919 } 920 #endif 921 922 /* 923 * SPDIF-out mux controls 924 */ 925 926 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 927 struct snd_ctl_elem_info *uinfo) 928 { 929 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 930 struct sigmatel_spec *spec = codec->spec; 931 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 932 } 933 934 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 935 struct snd_ctl_elem_value *ucontrol) 936 { 937 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 938 struct sigmatel_spec *spec = codec->spec; 939 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 940 941 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 942 return 0; 943 } 944 945 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 946 struct snd_ctl_elem_value *ucontrol) 947 { 948 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 949 struct sigmatel_spec *spec = codec->spec; 950 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 951 952 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 953 spec->gen.autocfg.dig_out_pins[smux_idx], 954 &spec->cur_smux[smux_idx]); 955 } 956 957 static struct snd_kcontrol_new stac_smux_mixer = { 958 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 959 .name = "IEC958 Playback Source", 960 /* count set later */ 961 .info = stac_smux_enum_info, 962 .get = stac_smux_enum_get, 963 .put = stac_smux_enum_put, 964 }; 965 966 static const char * const stac_spdif_labels[] = { 967 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 968 }; 969 970 static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 971 { 972 struct sigmatel_spec *spec = codec->spec; 973 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 974 const char * const *labels = spec->spdif_labels; 975 struct snd_kcontrol_new *kctl; 976 int i, num_cons; 977 978 if (cfg->dig_outs < 1) 979 return 0; 980 981 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 982 if (num_cons <= 1) 983 return 0; 984 985 if (!labels) 986 labels = stac_spdif_labels; 987 for (i = 0; i < num_cons; i++) { 988 if (snd_BUG_ON(!labels[i])) 989 return -EINVAL; 990 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL); 991 } 992 993 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 994 if (!kctl) 995 return -ENOMEM; 996 kctl->count = cfg->dig_outs; 997 998 return 0; 999 } 1000 1001 /* 1002 */ 1003 1004 static const struct hda_verb stac9200_core_init[] = { 1005 /* set dac0mux for dac converter */ 1006 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1007 {} 1008 }; 1009 1010 static const struct hda_verb stac9200_eapd_init[] = { 1011 /* set dac0mux for dac converter */ 1012 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1013 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1014 {} 1015 }; 1016 1017 static const struct hda_verb dell_eq_core_init[] = { 1018 /* set master volume to max value without distortion 1019 * and direct control */ 1020 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 1021 {} 1022 }; 1023 1024 static const struct hda_verb stac92hd73xx_core_init[] = { 1025 /* set master volume and direct control */ 1026 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1027 {} 1028 }; 1029 1030 static const struct hda_verb stac92hd83xxx_core_init[] = { 1031 /* power state controls amps */ 1032 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1033 {} 1034 }; 1035 1036 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1037 { 0x22, 0x785, 0x43 }, 1038 { 0x22, 0x782, 0xe0 }, 1039 { 0x22, 0x795, 0x00 }, 1040 {} 1041 }; 1042 1043 static const struct hda_verb stac92hd71bxx_core_init[] = { 1044 /* set master volume and direct control */ 1045 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1046 {} 1047 }; 1048 1049 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = { 1050 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1051 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1052 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1053 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1054 {} 1055 }; 1056 1057 static const struct hda_verb stac925x_core_init[] = { 1058 /* set dac0mux for dac converter */ 1059 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1060 /* mute the master volume */ 1061 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1062 {} 1063 }; 1064 1065 static const struct hda_verb stac922x_core_init[] = { 1066 /* set master volume and direct control */ 1067 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1068 {} 1069 }; 1070 1071 static const struct hda_verb d965_core_init[] = { 1072 /* unmute node 0x1b */ 1073 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1074 /* select node 0x03 as DAC */ 1075 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1076 {} 1077 }; 1078 1079 static const struct hda_verb dell_3st_core_init[] = { 1080 /* don't set delta bit */ 1081 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1082 /* unmute node 0x1b */ 1083 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1084 /* select node 0x03 as DAC */ 1085 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1086 {} 1087 }; 1088 1089 static const struct hda_verb stac927x_core_init[] = { 1090 /* set master volume and direct control */ 1091 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1092 /* enable analog pc beep path */ 1093 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1094 {} 1095 }; 1096 1097 static const struct hda_verb stac927x_volknob_core_init[] = { 1098 /* don't set delta bit */ 1099 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1100 /* enable analog pc beep path */ 1101 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1102 {} 1103 }; 1104 1105 static const struct hda_verb stac9205_core_init[] = { 1106 /* set master volume and direct control */ 1107 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1108 /* enable analog pc beep path */ 1109 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1110 {} 1111 }; 1112 1113 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1114 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1115 1116 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1117 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1118 1119 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1120 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1121 1122 static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1123 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1124 1125 static const struct snd_kcontrol_new stac9205_loopback = 1126 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1127 1128 static const struct snd_kcontrol_new stac927x_loopback = 1129 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1130 1131 static const struct hda_pintbl ref9200_pin_configs[] = { 1132 { 0x08, 0x01c47010 }, 1133 { 0x09, 0x01447010 }, 1134 { 0x0d, 0x0221401f }, 1135 { 0x0e, 0x01114010 }, 1136 { 0x0f, 0x02a19020 }, 1137 { 0x10, 0x01a19021 }, 1138 { 0x11, 0x90100140 }, 1139 { 0x12, 0x01813122 }, 1140 {} 1141 }; 1142 1143 static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1144 { 0x08, 0x400000fe }, 1145 { 0x09, 0x404500f4 }, 1146 { 0x0d, 0x400100f0 }, 1147 { 0x0e, 0x90110010 }, 1148 { 0x0f, 0x400100f1 }, 1149 { 0x10, 0x02a1902e }, 1150 { 0x11, 0x500000f2 }, 1151 { 0x12, 0x500000f3 }, 1152 {} 1153 }; 1154 1155 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1156 { 0x08, 0x400000fe }, 1157 { 0x09, 0x404500f4 }, 1158 { 0x0d, 0x400100f0 }, 1159 { 0x0e, 0x90110010 }, 1160 { 0x0f, 0x400100f1 }, 1161 { 0x10, 0x02a1902e }, 1162 { 0x11, 0x500000f2 }, 1163 { 0x12, 0x500000f3 }, 1164 {} 1165 }; 1166 1167 /* 1168 STAC 9200 pin configs for 1169 102801A8 1170 102801DE 1171 102801E8 1172 */ 1173 static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1174 { 0x08, 0x400001f0 }, 1175 { 0x09, 0x400001f1 }, 1176 { 0x0d, 0x02214030 }, 1177 { 0x0e, 0x01014010 }, 1178 { 0x0f, 0x02a19020 }, 1179 { 0x10, 0x01a19021 }, 1180 { 0x11, 0x90100140 }, 1181 { 0x12, 0x01813122 }, 1182 {} 1183 }; 1184 1185 /* 1186 STAC 9200 pin configs for 1187 102801C0 1188 102801C1 1189 */ 1190 static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1191 { 0x08, 0x400001f0 }, 1192 { 0x09, 0x400001f1 }, 1193 { 0x0d, 0x0221401f }, 1194 { 0x0e, 0x01014010 }, 1195 { 0x0f, 0x01813020 }, 1196 { 0x10, 0x02a19021 }, 1197 { 0x11, 0x90100140 }, 1198 { 0x12, 0x400001f2 }, 1199 {} 1200 }; 1201 1202 /* 1203 STAC 9200 pin configs for 1204 102801C4 (Dell Dimension E310) 1205 102801C5 1206 102801C7 1207 102801D9 1208 102801DA 1209 102801E3 1210 */ 1211 static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1212 { 0x08, 0x400001f0 }, 1213 { 0x09, 0x400001f1 }, 1214 { 0x0d, 0x0221401f }, 1215 { 0x0e, 0x01014010 }, 1216 { 0x0f, 0x01813020 }, 1217 { 0x10, 0x01a19021 }, 1218 { 0x11, 0x90100140 }, 1219 { 0x12, 0x400001f2 }, 1220 {} 1221 }; 1222 1223 1224 /* 1225 STAC 9200-32 pin configs for 1226 102801B5 (Dell Inspiron 630m) 1227 102801D8 (Dell Inspiron 640m) 1228 */ 1229 static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1230 { 0x08, 0x40c003fa }, 1231 { 0x09, 0x03441340 }, 1232 { 0x0d, 0x0321121f }, 1233 { 0x0e, 0x90170310 }, 1234 { 0x0f, 0x408003fb }, 1235 { 0x10, 0x03a11020 }, 1236 { 0x11, 0x401003fc }, 1237 { 0x12, 0x403003fd }, 1238 {} 1239 }; 1240 1241 /* 1242 STAC 9200-32 pin configs for 1243 102801C2 (Dell Latitude D620) 1244 102801C8 1245 102801CC (Dell Latitude D820) 1246 102801D4 1247 102801D6 1248 */ 1249 static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1250 { 0x08, 0x40c003fa }, 1251 { 0x09, 0x0144131f }, 1252 { 0x0d, 0x0321121f }, 1253 { 0x0e, 0x90170310 }, 1254 { 0x0f, 0x90a70321 }, 1255 { 0x10, 0x03a11020 }, 1256 { 0x11, 0x401003fb }, 1257 { 0x12, 0x40f000fc }, 1258 {} 1259 }; 1260 1261 /* 1262 STAC 9200-32 pin configs for 1263 102801CE (Dell XPS M1710) 1264 102801CF (Dell Precision M90) 1265 */ 1266 static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1267 { 0x08, 0x40c003fa }, 1268 { 0x09, 0x01441340 }, 1269 { 0x0d, 0x0421421f }, 1270 { 0x0e, 0x90170310 }, 1271 { 0x0f, 0x408003fb }, 1272 { 0x10, 0x04a1102e }, 1273 { 0x11, 0x90170311 }, 1274 { 0x12, 0x403003fc }, 1275 {} 1276 }; 1277 1278 /* 1279 STAC 9200-32 pin configs for 1280 102801C9 1281 102801CA 1282 102801CB (Dell Latitude 120L) 1283 102801D3 1284 */ 1285 static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1286 { 0x08, 0x40c003fa }, 1287 { 0x09, 0x404003fb }, 1288 { 0x0d, 0x0321121f }, 1289 { 0x0e, 0x90170310 }, 1290 { 0x0f, 0x408003fc }, 1291 { 0x10, 0x03a11020 }, 1292 { 0x11, 0x401003fd }, 1293 { 0x12, 0x403003fe }, 1294 {} 1295 }; 1296 1297 /* 1298 STAC 9200-32 pin configs for 1299 102801BD (Dell Inspiron E1505n) 1300 102801EE 1301 102801EF 1302 */ 1303 static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1304 { 0x08, 0x40c003fa }, 1305 { 0x09, 0x01441340 }, 1306 { 0x0d, 0x0421121f }, 1307 { 0x0e, 0x90170310 }, 1308 { 0x0f, 0x408003fb }, 1309 { 0x10, 0x04a11020 }, 1310 { 0x11, 0x401003fc }, 1311 { 0x12, 0x403003fd }, 1312 {} 1313 }; 1314 1315 /* 1316 STAC 9200-32 pin configs for 1317 102801F5 (Dell Inspiron 1501) 1318 102801F6 1319 */ 1320 static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1321 { 0x08, 0x40c003fa }, 1322 { 0x09, 0x404003fb }, 1323 { 0x0d, 0x0421121f }, 1324 { 0x0e, 0x90170310 }, 1325 { 0x0f, 0x408003fc }, 1326 { 0x10, 0x04a11020 }, 1327 { 0x11, 0x401003fd }, 1328 { 0x12, 0x403003fe }, 1329 {} 1330 }; 1331 1332 /* 1333 STAC 9200-32 1334 102801CD (Dell Inspiron E1705/9400) 1335 */ 1336 static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1337 { 0x08, 0x40c003fa }, 1338 { 0x09, 0x01441340 }, 1339 { 0x0d, 0x0421121f }, 1340 { 0x0e, 0x90170310 }, 1341 { 0x0f, 0x90170310 }, 1342 { 0x10, 0x04a11020 }, 1343 { 0x11, 0x90170310 }, 1344 { 0x12, 0x40f003fc }, 1345 {} 1346 }; 1347 1348 static const struct hda_pintbl oqo9200_pin_configs[] = { 1349 { 0x08, 0x40c000f0 }, 1350 { 0x09, 0x404000f1 }, 1351 { 0x0d, 0x0221121f }, 1352 { 0x0e, 0x02211210 }, 1353 { 0x0f, 0x90170111 }, 1354 { 0x10, 0x90a70120 }, 1355 { 0x11, 0x400000f2 }, 1356 { 0x12, 0x400000f3 }, 1357 {} 1358 }; 1359 1360 1361 static void stac9200_fixup_panasonic(struct hda_codec *codec, 1362 const struct hda_fixup *fix, int action) 1363 { 1364 struct sigmatel_spec *spec = codec->spec; 1365 1366 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1367 spec->gpio_mask = spec->gpio_dir = 0x09; 1368 spec->gpio_data = 0x00; 1369 /* CF-74 has no headphone detection, and the driver should *NOT* 1370 * do detection and HP/speaker toggle because the hardware does it. 1371 */ 1372 spec->gen.suppress_auto_mute = 1; 1373 } 1374 } 1375 1376 1377 static const struct hda_fixup stac9200_fixups[] = { 1378 [STAC_REF] = { 1379 .type = HDA_FIXUP_PINS, 1380 .v.pins = ref9200_pin_configs, 1381 }, 1382 [STAC_9200_OQO] = { 1383 .type = HDA_FIXUP_PINS, 1384 .v.pins = oqo9200_pin_configs, 1385 .chained = true, 1386 .chain_id = STAC_9200_EAPD_INIT, 1387 }, 1388 [STAC_9200_DELL_D21] = { 1389 .type = HDA_FIXUP_PINS, 1390 .v.pins = dell9200_d21_pin_configs, 1391 }, 1392 [STAC_9200_DELL_D22] = { 1393 .type = HDA_FIXUP_PINS, 1394 .v.pins = dell9200_d22_pin_configs, 1395 }, 1396 [STAC_9200_DELL_D23] = { 1397 .type = HDA_FIXUP_PINS, 1398 .v.pins = dell9200_d23_pin_configs, 1399 }, 1400 [STAC_9200_DELL_M21] = { 1401 .type = HDA_FIXUP_PINS, 1402 .v.pins = dell9200_m21_pin_configs, 1403 }, 1404 [STAC_9200_DELL_M22] = { 1405 .type = HDA_FIXUP_PINS, 1406 .v.pins = dell9200_m22_pin_configs, 1407 }, 1408 [STAC_9200_DELL_M23] = { 1409 .type = HDA_FIXUP_PINS, 1410 .v.pins = dell9200_m23_pin_configs, 1411 }, 1412 [STAC_9200_DELL_M24] = { 1413 .type = HDA_FIXUP_PINS, 1414 .v.pins = dell9200_m24_pin_configs, 1415 }, 1416 [STAC_9200_DELL_M25] = { 1417 .type = HDA_FIXUP_PINS, 1418 .v.pins = dell9200_m25_pin_configs, 1419 }, 1420 [STAC_9200_DELL_M26] = { 1421 .type = HDA_FIXUP_PINS, 1422 .v.pins = dell9200_m26_pin_configs, 1423 }, 1424 [STAC_9200_DELL_M27] = { 1425 .type = HDA_FIXUP_PINS, 1426 .v.pins = dell9200_m27_pin_configs, 1427 }, 1428 [STAC_9200_M4] = { 1429 .type = HDA_FIXUP_PINS, 1430 .v.pins = gateway9200_m4_pin_configs, 1431 .chained = true, 1432 .chain_id = STAC_9200_EAPD_INIT, 1433 }, 1434 [STAC_9200_M4_2] = { 1435 .type = HDA_FIXUP_PINS, 1436 .v.pins = gateway9200_m4_2_pin_configs, 1437 .chained = true, 1438 .chain_id = STAC_9200_EAPD_INIT, 1439 }, 1440 [STAC_9200_PANASONIC] = { 1441 .type = HDA_FIXUP_FUNC, 1442 .v.func = stac9200_fixup_panasonic, 1443 }, 1444 [STAC_9200_EAPD_INIT] = { 1445 .type = HDA_FIXUP_VERBS, 1446 .v.verbs = (const struct hda_verb[]) { 1447 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1448 {} 1449 }, 1450 }, 1451 }; 1452 1453 static const struct hda_model_fixup stac9200_models[] = { 1454 { .id = STAC_REF, .name = "ref" }, 1455 { .id = STAC_9200_OQO, .name = "oqo" }, 1456 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1457 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1458 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1459 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1460 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1461 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1462 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1463 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1464 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1465 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1466 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1467 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1468 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1469 {} 1470 }; 1471 1472 static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1473 /* SigmaTel reference board */ 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1475 "DFI LanParty", STAC_REF), 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1477 "DFI LanParty", STAC_REF), 1478 /* Dell laptops have BIOS problem */ 1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1480 "unknown Dell", STAC_9200_DELL_D21), 1481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1482 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1484 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1486 "unknown Dell", STAC_9200_DELL_D22), 1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1488 "unknown Dell", STAC_9200_DELL_D22), 1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1490 "Dell Latitude D620", STAC_9200_DELL_M22), 1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1492 "unknown Dell", STAC_9200_DELL_D23), 1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1494 "unknown Dell", STAC_9200_DELL_D23), 1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1496 "unknown Dell", STAC_9200_DELL_M22), 1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1498 "unknown Dell", STAC_9200_DELL_M24), 1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1500 "unknown Dell", STAC_9200_DELL_M24), 1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1502 "Dell Latitude 120L", STAC_9200_DELL_M24), 1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1504 "Dell Latitude D820", STAC_9200_DELL_M22), 1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1506 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1508 "Dell XPS M1710", STAC_9200_DELL_M23), 1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1510 "Dell Precision M90", STAC_9200_DELL_M23), 1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1512 "unknown Dell", STAC_9200_DELL_M22), 1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1514 "unknown Dell", STAC_9200_DELL_M22), 1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1516 "unknown Dell", STAC_9200_DELL_M22), 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1518 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1520 "unknown Dell", STAC_9200_DELL_D23), 1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1522 "unknown Dell", STAC_9200_DELL_D23), 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1524 "unknown Dell", STAC_9200_DELL_D21), 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1526 "unknown Dell", STAC_9200_DELL_D23), 1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1528 "unknown Dell", STAC_9200_DELL_D21), 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1530 "unknown Dell", STAC_9200_DELL_M25), 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1532 "unknown Dell", STAC_9200_DELL_M25), 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1534 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1536 "unknown Dell", STAC_9200_DELL_M26), 1537 /* Panasonic */ 1538 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1539 /* Gateway machines needs EAPD to be set on resume */ 1540 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1541 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1542 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1543 /* OQO Mobile */ 1544 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1545 {} /* terminator */ 1546 }; 1547 1548 static const struct hda_pintbl ref925x_pin_configs[] = { 1549 { 0x07, 0x40c003f0 }, 1550 { 0x08, 0x424503f2 }, 1551 { 0x0a, 0x01813022 }, 1552 { 0x0b, 0x02a19021 }, 1553 { 0x0c, 0x90a70320 }, 1554 { 0x0d, 0x02214210 }, 1555 { 0x10, 0x01019020 }, 1556 { 0x11, 0x9033032e }, 1557 {} 1558 }; 1559 1560 static const struct hda_pintbl stac925xM1_pin_configs[] = { 1561 { 0x07, 0x40c003f4 }, 1562 { 0x08, 0x424503f2 }, 1563 { 0x0a, 0x400000f3 }, 1564 { 0x0b, 0x02a19020 }, 1565 { 0x0c, 0x40a000f0 }, 1566 { 0x0d, 0x90100210 }, 1567 { 0x10, 0x400003f1 }, 1568 { 0x11, 0x9033032e }, 1569 {} 1570 }; 1571 1572 static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1573 { 0x07, 0x40c003f4 }, 1574 { 0x08, 0x424503f2 }, 1575 { 0x0a, 0x400000f3 }, 1576 { 0x0b, 0x02a19020 }, 1577 { 0x0c, 0x40a000f0 }, 1578 { 0x0d, 0x90100210 }, 1579 { 0x10, 0x400003f1 }, 1580 { 0x11, 0x9033032e }, 1581 {} 1582 }; 1583 1584 static const struct hda_pintbl stac925xM2_pin_configs[] = { 1585 { 0x07, 0x40c003f4 }, 1586 { 0x08, 0x424503f2 }, 1587 { 0x0a, 0x400000f3 }, 1588 { 0x0b, 0x02a19020 }, 1589 { 0x0c, 0x40a000f0 }, 1590 { 0x0d, 0x90100210 }, 1591 { 0x10, 0x400003f1 }, 1592 { 0x11, 0x9033032e }, 1593 {} 1594 }; 1595 1596 static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1597 { 0x07, 0x40c003f4 }, 1598 { 0x08, 0x424503f2 }, 1599 { 0x0a, 0x400000f3 }, 1600 { 0x0b, 0x02a19020 }, 1601 { 0x0c, 0x40a000f0 }, 1602 { 0x0d, 0x90100210 }, 1603 { 0x10, 0x400003f1 }, 1604 { 0x11, 0x9033032e }, 1605 {} 1606 }; 1607 1608 static const struct hda_pintbl stac925xM3_pin_configs[] = { 1609 { 0x07, 0x40c003f4 }, 1610 { 0x08, 0x424503f2 }, 1611 { 0x0a, 0x400000f3 }, 1612 { 0x0b, 0x02a19020 }, 1613 { 0x0c, 0x40a000f0 }, 1614 { 0x0d, 0x90100210 }, 1615 { 0x10, 0x400003f1 }, 1616 { 0x11, 0x503303f3 }, 1617 {} 1618 }; 1619 1620 static const struct hda_pintbl stac925xM5_pin_configs[] = { 1621 { 0x07, 0x40c003f4 }, 1622 { 0x08, 0x424503f2 }, 1623 { 0x0a, 0x400000f3 }, 1624 { 0x0b, 0x02a19020 }, 1625 { 0x0c, 0x40a000f0 }, 1626 { 0x0d, 0x90100210 }, 1627 { 0x10, 0x400003f1 }, 1628 { 0x11, 0x9033032e }, 1629 {} 1630 }; 1631 1632 static const struct hda_pintbl stac925xM6_pin_configs[] = { 1633 { 0x07, 0x40c003f4 }, 1634 { 0x08, 0x424503f2 }, 1635 { 0x0a, 0x400000f3 }, 1636 { 0x0b, 0x02a19020 }, 1637 { 0x0c, 0x40a000f0 }, 1638 { 0x0d, 0x90100210 }, 1639 { 0x10, 0x400003f1 }, 1640 { 0x11, 0x90330320 }, 1641 {} 1642 }; 1643 1644 static const struct hda_fixup stac925x_fixups[] = { 1645 [STAC_REF] = { 1646 .type = HDA_FIXUP_PINS, 1647 .v.pins = ref925x_pin_configs, 1648 }, 1649 [STAC_M1] = { 1650 .type = HDA_FIXUP_PINS, 1651 .v.pins = stac925xM1_pin_configs, 1652 }, 1653 [STAC_M1_2] = { 1654 .type = HDA_FIXUP_PINS, 1655 .v.pins = stac925xM1_2_pin_configs, 1656 }, 1657 [STAC_M2] = { 1658 .type = HDA_FIXUP_PINS, 1659 .v.pins = stac925xM2_pin_configs, 1660 }, 1661 [STAC_M2_2] = { 1662 .type = HDA_FIXUP_PINS, 1663 .v.pins = stac925xM2_2_pin_configs, 1664 }, 1665 [STAC_M3] = { 1666 .type = HDA_FIXUP_PINS, 1667 .v.pins = stac925xM3_pin_configs, 1668 }, 1669 [STAC_M5] = { 1670 .type = HDA_FIXUP_PINS, 1671 .v.pins = stac925xM5_pin_configs, 1672 }, 1673 [STAC_M6] = { 1674 .type = HDA_FIXUP_PINS, 1675 .v.pins = stac925xM6_pin_configs, 1676 }, 1677 }; 1678 1679 static const struct hda_model_fixup stac925x_models[] = { 1680 { .id = STAC_REF, .name = "ref" }, 1681 { .id = STAC_M1, .name = "m1" }, 1682 { .id = STAC_M1_2, .name = "m1-2" }, 1683 { .id = STAC_M2, .name = "m2" }, 1684 { .id = STAC_M2_2, .name = "m2-2" }, 1685 { .id = STAC_M3, .name = "m3" }, 1686 { .id = STAC_M5, .name = "m5" }, 1687 { .id = STAC_M6, .name = "m6" }, 1688 {} 1689 }; 1690 1691 static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1692 /* SigmaTel reference board */ 1693 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1694 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1695 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1696 1697 /* Default table for unknown ID */ 1698 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1699 1700 /* gateway machines are checked via codec ssid */ 1701 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1702 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1703 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1704 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1705 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1706 /* Not sure about the brand name for those */ 1707 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1708 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1709 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1710 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1711 {} /* terminator */ 1712 }; 1713 1714 static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1715 { 0x0a, 0x02214030 }, 1716 { 0x0b, 0x02a19040 }, 1717 { 0x0c, 0x01a19020 }, 1718 { 0x0d, 0x02214030 }, 1719 { 0x0e, 0x0181302e }, 1720 { 0x0f, 0x01014010 }, 1721 { 0x10, 0x01014020 }, 1722 { 0x11, 0x01014030 }, 1723 { 0x12, 0x02319040 }, 1724 { 0x13, 0x90a000f0 }, 1725 { 0x14, 0x90a000f0 }, 1726 { 0x22, 0x01452050 }, 1727 { 0x23, 0x01452050 }, 1728 {} 1729 }; 1730 1731 static const struct hda_pintbl dell_m6_pin_configs[] = { 1732 { 0x0a, 0x0321101f }, 1733 { 0x0b, 0x4f00000f }, 1734 { 0x0c, 0x4f0000f0 }, 1735 { 0x0d, 0x90170110 }, 1736 { 0x0e, 0x03a11020 }, 1737 { 0x0f, 0x0321101f }, 1738 { 0x10, 0x4f0000f0 }, 1739 { 0x11, 0x4f0000f0 }, 1740 { 0x12, 0x4f0000f0 }, 1741 { 0x13, 0x90a60160 }, 1742 { 0x14, 0x4f0000f0 }, 1743 { 0x22, 0x4f0000f0 }, 1744 { 0x23, 0x4f0000f0 }, 1745 {} 1746 }; 1747 1748 static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1749 { 0x0a, 0x0321101f }, 1750 { 0x0b, 0x0321101f }, 1751 { 0x0c, 0x03a11020 }, 1752 { 0x0d, 0x03014020 }, 1753 { 0x0e, 0x90170110 }, 1754 { 0x0f, 0x4f0000f0 }, 1755 { 0x10, 0x4f0000f0 }, 1756 { 0x11, 0x4f0000f0 }, 1757 { 0x12, 0x4f0000f0 }, 1758 { 0x13, 0x90a60160 }, 1759 { 0x14, 0x4f0000f0 }, 1760 { 0x22, 0x4f0000f0 }, 1761 { 0x23, 0x904601b0 }, 1762 {} 1763 }; 1764 1765 static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1766 { 0x0a, 0x02214230 }, 1767 { 0x0b, 0x02A19240 }, 1768 { 0x0c, 0x01013214 }, 1769 { 0x0d, 0x01014210 }, 1770 { 0x0e, 0x01A19250 }, 1771 { 0x0f, 0x01011212 }, 1772 { 0x10, 0x01016211 }, 1773 {} 1774 }; 1775 1776 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = { 1777 { 0x0a, 0x02214030 }, 1778 { 0x0b, 0x02A19010 }, 1779 {} 1780 }; 1781 1782 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = { 1783 { 0x0e, 0x400000f0 }, 1784 {} 1785 }; 1786 1787 static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1788 const struct hda_fixup *fix, int action) 1789 { 1790 struct sigmatel_spec *spec = codec->spec; 1791 1792 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1793 return; 1794 1795 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1796 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1797 } 1798 1799 static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1800 { 1801 struct sigmatel_spec *spec = codec->spec; 1802 1803 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1804 spec->eapd_switch = 0; 1805 } 1806 1807 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1808 const struct hda_fixup *fix, int action) 1809 { 1810 struct sigmatel_spec *spec = codec->spec; 1811 1812 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1813 return; 1814 1815 stac92hd73xx_fixup_dell(codec); 1816 snd_hda_add_verbs(codec, dell_eq_core_init); 1817 spec->volknob_init = 1; 1818 } 1819 1820 /* Analog Mics */ 1821 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1822 const struct hda_fixup *fix, int action) 1823 { 1824 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1825 return; 1826 1827 stac92hd73xx_fixup_dell(codec); 1828 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1829 } 1830 1831 /* Digital Mics */ 1832 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1833 const struct hda_fixup *fix, int action) 1834 { 1835 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1836 return; 1837 1838 stac92hd73xx_fixup_dell(codec); 1839 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1840 } 1841 1842 /* Both */ 1843 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1844 const struct hda_fixup *fix, int action) 1845 { 1846 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1847 return; 1848 1849 stac92hd73xx_fixup_dell(codec); 1850 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1851 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1852 } 1853 1854 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1855 const struct hda_fixup *fix, int action) 1856 { 1857 struct sigmatel_spec *spec = codec->spec; 1858 1859 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1860 return; 1861 1862 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1863 spec->eapd_switch = 0; 1864 } 1865 1866 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1867 const struct hda_fixup *fix, int action) 1868 { 1869 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1870 codec->no_jack_detect = 1; 1871 } 1872 1873 static const struct hda_fixup stac92hd73xx_fixups[] = { 1874 [STAC_92HD73XX_REF] = { 1875 .type = HDA_FIXUP_FUNC, 1876 .v.func = stac92hd73xx_fixup_ref, 1877 }, 1878 [STAC_DELL_M6_AMIC] = { 1879 .type = HDA_FIXUP_FUNC, 1880 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1881 }, 1882 [STAC_DELL_M6_DMIC] = { 1883 .type = HDA_FIXUP_FUNC, 1884 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1885 }, 1886 [STAC_DELL_M6_BOTH] = { 1887 .type = HDA_FIXUP_FUNC, 1888 .v.func = stac92hd73xx_fixup_dell_m6_both, 1889 }, 1890 [STAC_DELL_EQ] = { 1891 .type = HDA_FIXUP_FUNC, 1892 .v.func = stac92hd73xx_fixup_dell_eq, 1893 }, 1894 [STAC_ALIENWARE_M17X] = { 1895 .type = HDA_FIXUP_FUNC, 1896 .v.func = stac92hd73xx_fixup_alienware_m17x, 1897 }, 1898 [STAC_92HD73XX_INTEL] = { 1899 .type = HDA_FIXUP_PINS, 1900 .v.pins = intel_dg45id_pin_configs, 1901 }, 1902 [STAC_92HD73XX_NO_JD] = { 1903 .type = HDA_FIXUP_FUNC, 1904 .v.func = stac92hd73xx_fixup_no_jd, 1905 }, 1906 [STAC_92HD89XX_HP_FRONT_JACK] = { 1907 .type = HDA_FIXUP_PINS, 1908 .v.pins = stac92hd89xx_hp_front_jack_pin_configs, 1909 }, 1910 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = { 1911 .type = HDA_FIXUP_PINS, 1912 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, 1913 } 1914 }; 1915 1916 static const struct hda_model_fixup stac92hd73xx_models[] = { 1917 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1918 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1919 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1920 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1921 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1922 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1923 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1924 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1925 {} 1926 }; 1927 1928 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1929 /* SigmaTel reference board */ 1930 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1931 "DFI LanParty", STAC_92HD73XX_REF), 1932 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1933 "DFI LanParty", STAC_92HD73XX_REF), 1934 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1935 "Intel DG45ID", STAC_92HD73XX_INTEL), 1936 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1937 "Intel DG45FC", STAC_92HD73XX_INTEL), 1938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1939 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1941 "unknown Dell", STAC_DELL_M6_DMIC), 1942 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1943 "unknown Dell", STAC_DELL_M6_BOTH), 1944 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1945 "unknown Dell", STAC_DELL_M6_BOTH), 1946 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1947 "unknown Dell", STAC_DELL_M6_AMIC), 1948 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1949 "unknown Dell", STAC_DELL_M6_AMIC), 1950 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1951 "unknown Dell", STAC_DELL_M6_DMIC), 1952 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1953 "unknown Dell", STAC_DELL_M6_DMIC), 1954 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1955 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1956 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1957 "Dell Studio 17", STAC_DELL_M6_DMIC), 1958 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1959 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1960 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1961 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1962 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1963 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1965 "Dell Studio 1558", STAC_DELL_M6_DMIC), 1966 /* codec SSID matching */ 1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 1968 "Alienware M17x", STAC_ALIENWARE_M17X), 1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1970 "Alienware M17x", STAC_ALIENWARE_M17X), 1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 1972 "Alienware M17x R3", STAC_DELL_EQ), 1973 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927, 1974 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK), 1975 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 1976 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 1977 {} /* terminator */ 1978 }; 1979 1980 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 1981 { 0x0a, 0x02214030 }, 1982 { 0x0b, 0x02211010 }, 1983 { 0x0c, 0x02a19020 }, 1984 { 0x0d, 0x02170130 }, 1985 { 0x0e, 0x01014050 }, 1986 { 0x0f, 0x01819040 }, 1987 { 0x10, 0x01014020 }, 1988 { 0x11, 0x90a3014e }, 1989 { 0x1f, 0x01451160 }, 1990 { 0x20, 0x98560170 }, 1991 {} 1992 }; 1993 1994 static const struct hda_pintbl dell_s14_pin_configs[] = { 1995 { 0x0a, 0x0221403f }, 1996 { 0x0b, 0x0221101f }, 1997 { 0x0c, 0x02a19020 }, 1998 { 0x0d, 0x90170110 }, 1999 { 0x0e, 0x40f000f0 }, 2000 { 0x0f, 0x40f000f0 }, 2001 { 0x10, 0x40f000f0 }, 2002 { 0x11, 0x90a60160 }, 2003 { 0x1f, 0x40f000f0 }, 2004 { 0x20, 0x40f000f0 }, 2005 {} 2006 }; 2007 2008 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 2009 { 0x0a, 0x02a11020 }, 2010 { 0x0b, 0x0221101f }, 2011 { 0x0c, 0x400000f0 }, 2012 { 0x0d, 0x90170110 }, 2013 { 0x0e, 0x400000f1 }, 2014 { 0x0f, 0x400000f2 }, 2015 { 0x10, 0x400000f3 }, 2016 { 0x11, 0x90a60160 }, 2017 { 0x1f, 0x400000f4 }, 2018 { 0x20, 0x400000f5 }, 2019 {} 2020 }; 2021 2022 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2023 { 0x0a, 0x03a12050 }, 2024 { 0x0b, 0x0321201f }, 2025 { 0x0c, 0x40f000f0 }, 2026 { 0x0d, 0x90170110 }, 2027 { 0x0e, 0x40f000f0 }, 2028 { 0x0f, 0x40f000f0 }, 2029 { 0x10, 0x90170110 }, 2030 { 0x11, 0xd5a30140 }, 2031 { 0x1f, 0x40f000f0 }, 2032 { 0x20, 0x40f000f0 }, 2033 {} 2034 }; 2035 2036 static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2037 { 0x0a, 0x01813050 }, 2038 { 0x0b, 0x0421201f }, 2039 { 0x0c, 0x04a1205e }, 2040 { 0x0d, 0x96130310 }, 2041 { 0x0e, 0x96130310 }, 2042 { 0x0f, 0x0101401f }, 2043 { 0x10, 0x1111611f }, 2044 { 0x11, 0xd5a30130 }, 2045 {} 2046 }; 2047 2048 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2049 { 0x0a, 0x40f000f0 }, 2050 { 0x0b, 0x0221101f }, 2051 { 0x0c, 0x02a11020 }, 2052 { 0x0d, 0x92170110 }, 2053 { 0x0e, 0x40f000f0 }, 2054 { 0x0f, 0x92170110 }, 2055 { 0x10, 0x40f000f0 }, 2056 { 0x11, 0xd5a30130 }, 2057 { 0x1f, 0x40f000f0 }, 2058 { 0x20, 0x40f000f0 }, 2059 {} 2060 }; 2061 2062 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2063 const struct hda_fixup *fix, int action) 2064 { 2065 struct sigmatel_spec *spec = codec->spec; 2066 2067 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2068 return; 2069 2070 if (hp_bnb2011_with_dock(codec)) { 2071 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2072 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2073 } 2074 2075 if (find_mute_led_cfg(codec, spec->default_polarity)) 2076 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 2077 spec->gpio_led, 2078 spec->gpio_led_polarity); 2079 2080 /* allow auto-switching of dock line-in */ 2081 spec->gen.line_in_auto_switch = true; 2082 } 2083 2084 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2085 const struct hda_fixup *fix, int action) 2086 { 2087 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2088 return; 2089 2090 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2091 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2092 } 2093 2094 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2095 const struct hda_fixup *fix, int action) 2096 { 2097 struct sigmatel_spec *spec = codec->spec; 2098 2099 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2100 spec->default_polarity = 0; 2101 } 2102 2103 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2104 const struct hda_fixup *fix, int action) 2105 { 2106 struct sigmatel_spec *spec = codec->spec; 2107 2108 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2109 spec->default_polarity = 1; 2110 } 2111 2112 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2113 const struct hda_fixup *fix, int action) 2114 { 2115 struct sigmatel_spec *spec = codec->spec; 2116 2117 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2118 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2119 /* resetting controller clears GPIO, so we need to keep on */ 2120 codec->bus->power_keep_link_on = 1; 2121 } 2122 } 2123 2124 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec, 2125 const struct hda_fixup *fix, int action) 2126 { 2127 struct sigmatel_spec *spec = codec->spec; 2128 2129 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2130 spec->gpio_led = 0x10; /* GPIO4 */ 2131 spec->default_polarity = 0; 2132 } 2133 } 2134 2135 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2136 const struct hda_fixup *fix, int action) 2137 { 2138 struct sigmatel_spec *spec = codec->spec; 2139 2140 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2141 spec->headset_jack = 1; 2142 } 2143 2144 static const struct hda_verb hp_bnb13_eq_verbs[] = { 2145 /* 44.1KHz base */ 2146 { 0x22, 0x7A6, 0x3E }, 2147 { 0x22, 0x7A7, 0x68 }, 2148 { 0x22, 0x7A8, 0x17 }, 2149 { 0x22, 0x7A9, 0x3E }, 2150 { 0x22, 0x7AA, 0x68 }, 2151 { 0x22, 0x7AB, 0x17 }, 2152 { 0x22, 0x7AC, 0x00 }, 2153 { 0x22, 0x7AD, 0x80 }, 2154 { 0x22, 0x7A6, 0x83 }, 2155 { 0x22, 0x7A7, 0x2F }, 2156 { 0x22, 0x7A8, 0xD1 }, 2157 { 0x22, 0x7A9, 0x83 }, 2158 { 0x22, 0x7AA, 0x2F }, 2159 { 0x22, 0x7AB, 0xD1 }, 2160 { 0x22, 0x7AC, 0x01 }, 2161 { 0x22, 0x7AD, 0x80 }, 2162 { 0x22, 0x7A6, 0x3E }, 2163 { 0x22, 0x7A7, 0x68 }, 2164 { 0x22, 0x7A8, 0x17 }, 2165 { 0x22, 0x7A9, 0x3E }, 2166 { 0x22, 0x7AA, 0x68 }, 2167 { 0x22, 0x7AB, 0x17 }, 2168 { 0x22, 0x7AC, 0x02 }, 2169 { 0x22, 0x7AD, 0x80 }, 2170 { 0x22, 0x7A6, 0x7C }, 2171 { 0x22, 0x7A7, 0xC6 }, 2172 { 0x22, 0x7A8, 0x0C }, 2173 { 0x22, 0x7A9, 0x7C }, 2174 { 0x22, 0x7AA, 0xC6 }, 2175 { 0x22, 0x7AB, 0x0C }, 2176 { 0x22, 0x7AC, 0x03 }, 2177 { 0x22, 0x7AD, 0x80 }, 2178 { 0x22, 0x7A6, 0xC3 }, 2179 { 0x22, 0x7A7, 0x25 }, 2180 { 0x22, 0x7A8, 0xAF }, 2181 { 0x22, 0x7A9, 0xC3 }, 2182 { 0x22, 0x7AA, 0x25 }, 2183 { 0x22, 0x7AB, 0xAF }, 2184 { 0x22, 0x7AC, 0x04 }, 2185 { 0x22, 0x7AD, 0x80 }, 2186 { 0x22, 0x7A6, 0x3E }, 2187 { 0x22, 0x7A7, 0x85 }, 2188 { 0x22, 0x7A8, 0x73 }, 2189 { 0x22, 0x7A9, 0x3E }, 2190 { 0x22, 0x7AA, 0x85 }, 2191 { 0x22, 0x7AB, 0x73 }, 2192 { 0x22, 0x7AC, 0x05 }, 2193 { 0x22, 0x7AD, 0x80 }, 2194 { 0x22, 0x7A6, 0x85 }, 2195 { 0x22, 0x7A7, 0x39 }, 2196 { 0x22, 0x7A8, 0xC7 }, 2197 { 0x22, 0x7A9, 0x85 }, 2198 { 0x22, 0x7AA, 0x39 }, 2199 { 0x22, 0x7AB, 0xC7 }, 2200 { 0x22, 0x7AC, 0x06 }, 2201 { 0x22, 0x7AD, 0x80 }, 2202 { 0x22, 0x7A6, 0x3C }, 2203 { 0x22, 0x7A7, 0x90 }, 2204 { 0x22, 0x7A8, 0xB0 }, 2205 { 0x22, 0x7A9, 0x3C }, 2206 { 0x22, 0x7AA, 0x90 }, 2207 { 0x22, 0x7AB, 0xB0 }, 2208 { 0x22, 0x7AC, 0x07 }, 2209 { 0x22, 0x7AD, 0x80 }, 2210 { 0x22, 0x7A6, 0x7A }, 2211 { 0x22, 0x7A7, 0xC6 }, 2212 { 0x22, 0x7A8, 0x39 }, 2213 { 0x22, 0x7A9, 0x7A }, 2214 { 0x22, 0x7AA, 0xC6 }, 2215 { 0x22, 0x7AB, 0x39 }, 2216 { 0x22, 0x7AC, 0x08 }, 2217 { 0x22, 0x7AD, 0x80 }, 2218 { 0x22, 0x7A6, 0xC4 }, 2219 { 0x22, 0x7A7, 0xE9 }, 2220 { 0x22, 0x7A8, 0xDC }, 2221 { 0x22, 0x7A9, 0xC4 }, 2222 { 0x22, 0x7AA, 0xE9 }, 2223 { 0x22, 0x7AB, 0xDC }, 2224 { 0x22, 0x7AC, 0x09 }, 2225 { 0x22, 0x7AD, 0x80 }, 2226 { 0x22, 0x7A6, 0x3D }, 2227 { 0x22, 0x7A7, 0xE1 }, 2228 { 0x22, 0x7A8, 0x0D }, 2229 { 0x22, 0x7A9, 0x3D }, 2230 { 0x22, 0x7AA, 0xE1 }, 2231 { 0x22, 0x7AB, 0x0D }, 2232 { 0x22, 0x7AC, 0x0A }, 2233 { 0x22, 0x7AD, 0x80 }, 2234 { 0x22, 0x7A6, 0x89 }, 2235 { 0x22, 0x7A7, 0xB6 }, 2236 { 0x22, 0x7A8, 0xEB }, 2237 { 0x22, 0x7A9, 0x89 }, 2238 { 0x22, 0x7AA, 0xB6 }, 2239 { 0x22, 0x7AB, 0xEB }, 2240 { 0x22, 0x7AC, 0x0B }, 2241 { 0x22, 0x7AD, 0x80 }, 2242 { 0x22, 0x7A6, 0x39 }, 2243 { 0x22, 0x7A7, 0x9D }, 2244 { 0x22, 0x7A8, 0xFE }, 2245 { 0x22, 0x7A9, 0x39 }, 2246 { 0x22, 0x7AA, 0x9D }, 2247 { 0x22, 0x7AB, 0xFE }, 2248 { 0x22, 0x7AC, 0x0C }, 2249 { 0x22, 0x7AD, 0x80 }, 2250 { 0x22, 0x7A6, 0x76 }, 2251 { 0x22, 0x7A7, 0x49 }, 2252 { 0x22, 0x7A8, 0x15 }, 2253 { 0x22, 0x7A9, 0x76 }, 2254 { 0x22, 0x7AA, 0x49 }, 2255 { 0x22, 0x7AB, 0x15 }, 2256 { 0x22, 0x7AC, 0x0D }, 2257 { 0x22, 0x7AD, 0x80 }, 2258 { 0x22, 0x7A6, 0xC8 }, 2259 { 0x22, 0x7A7, 0x80 }, 2260 { 0x22, 0x7A8, 0xF5 }, 2261 { 0x22, 0x7A9, 0xC8 }, 2262 { 0x22, 0x7AA, 0x80 }, 2263 { 0x22, 0x7AB, 0xF5 }, 2264 { 0x22, 0x7AC, 0x0E }, 2265 { 0x22, 0x7AD, 0x80 }, 2266 { 0x22, 0x7A6, 0x40 }, 2267 { 0x22, 0x7A7, 0x00 }, 2268 { 0x22, 0x7A8, 0x00 }, 2269 { 0x22, 0x7A9, 0x40 }, 2270 { 0x22, 0x7AA, 0x00 }, 2271 { 0x22, 0x7AB, 0x00 }, 2272 { 0x22, 0x7AC, 0x0F }, 2273 { 0x22, 0x7AD, 0x80 }, 2274 { 0x22, 0x7A6, 0x90 }, 2275 { 0x22, 0x7A7, 0x68 }, 2276 { 0x22, 0x7A8, 0xF1 }, 2277 { 0x22, 0x7A9, 0x90 }, 2278 { 0x22, 0x7AA, 0x68 }, 2279 { 0x22, 0x7AB, 0xF1 }, 2280 { 0x22, 0x7AC, 0x10 }, 2281 { 0x22, 0x7AD, 0x80 }, 2282 { 0x22, 0x7A6, 0x34 }, 2283 { 0x22, 0x7A7, 0x47 }, 2284 { 0x22, 0x7A8, 0x6C }, 2285 { 0x22, 0x7A9, 0x34 }, 2286 { 0x22, 0x7AA, 0x47 }, 2287 { 0x22, 0x7AB, 0x6C }, 2288 { 0x22, 0x7AC, 0x11 }, 2289 { 0x22, 0x7AD, 0x80 }, 2290 { 0x22, 0x7A6, 0x6F }, 2291 { 0x22, 0x7A7, 0x97 }, 2292 { 0x22, 0x7A8, 0x0F }, 2293 { 0x22, 0x7A9, 0x6F }, 2294 { 0x22, 0x7AA, 0x97 }, 2295 { 0x22, 0x7AB, 0x0F }, 2296 { 0x22, 0x7AC, 0x12 }, 2297 { 0x22, 0x7AD, 0x80 }, 2298 { 0x22, 0x7A6, 0xCB }, 2299 { 0x22, 0x7A7, 0xB8 }, 2300 { 0x22, 0x7A8, 0x94 }, 2301 { 0x22, 0x7A9, 0xCB }, 2302 { 0x22, 0x7AA, 0xB8 }, 2303 { 0x22, 0x7AB, 0x94 }, 2304 { 0x22, 0x7AC, 0x13 }, 2305 { 0x22, 0x7AD, 0x80 }, 2306 { 0x22, 0x7A6, 0x40 }, 2307 { 0x22, 0x7A7, 0x00 }, 2308 { 0x22, 0x7A8, 0x00 }, 2309 { 0x22, 0x7A9, 0x40 }, 2310 { 0x22, 0x7AA, 0x00 }, 2311 { 0x22, 0x7AB, 0x00 }, 2312 { 0x22, 0x7AC, 0x14 }, 2313 { 0x22, 0x7AD, 0x80 }, 2314 { 0x22, 0x7A6, 0x95 }, 2315 { 0x22, 0x7A7, 0x76 }, 2316 { 0x22, 0x7A8, 0x5B }, 2317 { 0x22, 0x7A9, 0x95 }, 2318 { 0x22, 0x7AA, 0x76 }, 2319 { 0x22, 0x7AB, 0x5B }, 2320 { 0x22, 0x7AC, 0x15 }, 2321 { 0x22, 0x7AD, 0x80 }, 2322 { 0x22, 0x7A6, 0x31 }, 2323 { 0x22, 0x7A7, 0xAC }, 2324 { 0x22, 0x7A8, 0x31 }, 2325 { 0x22, 0x7A9, 0x31 }, 2326 { 0x22, 0x7AA, 0xAC }, 2327 { 0x22, 0x7AB, 0x31 }, 2328 { 0x22, 0x7AC, 0x16 }, 2329 { 0x22, 0x7AD, 0x80 }, 2330 { 0x22, 0x7A6, 0x6A }, 2331 { 0x22, 0x7A7, 0x89 }, 2332 { 0x22, 0x7A8, 0xA5 }, 2333 { 0x22, 0x7A9, 0x6A }, 2334 { 0x22, 0x7AA, 0x89 }, 2335 { 0x22, 0x7AB, 0xA5 }, 2336 { 0x22, 0x7AC, 0x17 }, 2337 { 0x22, 0x7AD, 0x80 }, 2338 { 0x22, 0x7A6, 0xCE }, 2339 { 0x22, 0x7A7, 0x53 }, 2340 { 0x22, 0x7A8, 0xCF }, 2341 { 0x22, 0x7A9, 0xCE }, 2342 { 0x22, 0x7AA, 0x53 }, 2343 { 0x22, 0x7AB, 0xCF }, 2344 { 0x22, 0x7AC, 0x18 }, 2345 { 0x22, 0x7AD, 0x80 }, 2346 { 0x22, 0x7A6, 0x40 }, 2347 { 0x22, 0x7A7, 0x00 }, 2348 { 0x22, 0x7A8, 0x00 }, 2349 { 0x22, 0x7A9, 0x40 }, 2350 { 0x22, 0x7AA, 0x00 }, 2351 { 0x22, 0x7AB, 0x00 }, 2352 { 0x22, 0x7AC, 0x19 }, 2353 { 0x22, 0x7AD, 0x80 }, 2354 /* 48KHz base */ 2355 { 0x22, 0x7A6, 0x3E }, 2356 { 0x22, 0x7A7, 0x88 }, 2357 { 0x22, 0x7A8, 0xDC }, 2358 { 0x22, 0x7A9, 0x3E }, 2359 { 0x22, 0x7AA, 0x88 }, 2360 { 0x22, 0x7AB, 0xDC }, 2361 { 0x22, 0x7AC, 0x1A }, 2362 { 0x22, 0x7AD, 0x80 }, 2363 { 0x22, 0x7A6, 0x82 }, 2364 { 0x22, 0x7A7, 0xEE }, 2365 { 0x22, 0x7A8, 0x46 }, 2366 { 0x22, 0x7A9, 0x82 }, 2367 { 0x22, 0x7AA, 0xEE }, 2368 { 0x22, 0x7AB, 0x46 }, 2369 { 0x22, 0x7AC, 0x1B }, 2370 { 0x22, 0x7AD, 0x80 }, 2371 { 0x22, 0x7A6, 0x3E }, 2372 { 0x22, 0x7A7, 0x88 }, 2373 { 0x22, 0x7A8, 0xDC }, 2374 { 0x22, 0x7A9, 0x3E }, 2375 { 0x22, 0x7AA, 0x88 }, 2376 { 0x22, 0x7AB, 0xDC }, 2377 { 0x22, 0x7AC, 0x1C }, 2378 { 0x22, 0x7AD, 0x80 }, 2379 { 0x22, 0x7A6, 0x7D }, 2380 { 0x22, 0x7A7, 0x09 }, 2381 { 0x22, 0x7A8, 0x28 }, 2382 { 0x22, 0x7A9, 0x7D }, 2383 { 0x22, 0x7AA, 0x09 }, 2384 { 0x22, 0x7AB, 0x28 }, 2385 { 0x22, 0x7AC, 0x1D }, 2386 { 0x22, 0x7AD, 0x80 }, 2387 { 0x22, 0x7A6, 0xC2 }, 2388 { 0x22, 0x7A7, 0xE5 }, 2389 { 0x22, 0x7A8, 0xB4 }, 2390 { 0x22, 0x7A9, 0xC2 }, 2391 { 0x22, 0x7AA, 0xE5 }, 2392 { 0x22, 0x7AB, 0xB4 }, 2393 { 0x22, 0x7AC, 0x1E }, 2394 { 0x22, 0x7AD, 0x80 }, 2395 { 0x22, 0x7A6, 0x3E }, 2396 { 0x22, 0x7A7, 0xA3 }, 2397 { 0x22, 0x7A8, 0x1F }, 2398 { 0x22, 0x7A9, 0x3E }, 2399 { 0x22, 0x7AA, 0xA3 }, 2400 { 0x22, 0x7AB, 0x1F }, 2401 { 0x22, 0x7AC, 0x1F }, 2402 { 0x22, 0x7AD, 0x80 }, 2403 { 0x22, 0x7A6, 0x84 }, 2404 { 0x22, 0x7A7, 0xCA }, 2405 { 0x22, 0x7A8, 0xF1 }, 2406 { 0x22, 0x7A9, 0x84 }, 2407 { 0x22, 0x7AA, 0xCA }, 2408 { 0x22, 0x7AB, 0xF1 }, 2409 { 0x22, 0x7AC, 0x20 }, 2410 { 0x22, 0x7AD, 0x80 }, 2411 { 0x22, 0x7A6, 0x3C }, 2412 { 0x22, 0x7A7, 0xD5 }, 2413 { 0x22, 0x7A8, 0x9C }, 2414 { 0x22, 0x7A9, 0x3C }, 2415 { 0x22, 0x7AA, 0xD5 }, 2416 { 0x22, 0x7AB, 0x9C }, 2417 { 0x22, 0x7AC, 0x21 }, 2418 { 0x22, 0x7AD, 0x80 }, 2419 { 0x22, 0x7A6, 0x7B }, 2420 { 0x22, 0x7A7, 0x35 }, 2421 { 0x22, 0x7A8, 0x0F }, 2422 { 0x22, 0x7A9, 0x7B }, 2423 { 0x22, 0x7AA, 0x35 }, 2424 { 0x22, 0x7AB, 0x0F }, 2425 { 0x22, 0x7AC, 0x22 }, 2426 { 0x22, 0x7AD, 0x80 }, 2427 { 0x22, 0x7A6, 0xC4 }, 2428 { 0x22, 0x7A7, 0x87 }, 2429 { 0x22, 0x7A8, 0x45 }, 2430 { 0x22, 0x7A9, 0xC4 }, 2431 { 0x22, 0x7AA, 0x87 }, 2432 { 0x22, 0x7AB, 0x45 }, 2433 { 0x22, 0x7AC, 0x23 }, 2434 { 0x22, 0x7AD, 0x80 }, 2435 { 0x22, 0x7A6, 0x3E }, 2436 { 0x22, 0x7A7, 0x0A }, 2437 { 0x22, 0x7A8, 0x78 }, 2438 { 0x22, 0x7A9, 0x3E }, 2439 { 0x22, 0x7AA, 0x0A }, 2440 { 0x22, 0x7AB, 0x78 }, 2441 { 0x22, 0x7AC, 0x24 }, 2442 { 0x22, 0x7AD, 0x80 }, 2443 { 0x22, 0x7A6, 0x88 }, 2444 { 0x22, 0x7A7, 0xE2 }, 2445 { 0x22, 0x7A8, 0x05 }, 2446 { 0x22, 0x7A9, 0x88 }, 2447 { 0x22, 0x7AA, 0xE2 }, 2448 { 0x22, 0x7AB, 0x05 }, 2449 { 0x22, 0x7AC, 0x25 }, 2450 { 0x22, 0x7AD, 0x80 }, 2451 { 0x22, 0x7A6, 0x3A }, 2452 { 0x22, 0x7A7, 0x1A }, 2453 { 0x22, 0x7A8, 0xA3 }, 2454 { 0x22, 0x7A9, 0x3A }, 2455 { 0x22, 0x7AA, 0x1A }, 2456 { 0x22, 0x7AB, 0xA3 }, 2457 { 0x22, 0x7AC, 0x26 }, 2458 { 0x22, 0x7AD, 0x80 }, 2459 { 0x22, 0x7A6, 0x77 }, 2460 { 0x22, 0x7A7, 0x1D }, 2461 { 0x22, 0x7A8, 0xFB }, 2462 { 0x22, 0x7A9, 0x77 }, 2463 { 0x22, 0x7AA, 0x1D }, 2464 { 0x22, 0x7AB, 0xFB }, 2465 { 0x22, 0x7AC, 0x27 }, 2466 { 0x22, 0x7AD, 0x80 }, 2467 { 0x22, 0x7A6, 0xC7 }, 2468 { 0x22, 0x7A7, 0xDA }, 2469 { 0x22, 0x7A8, 0xE5 }, 2470 { 0x22, 0x7A9, 0xC7 }, 2471 { 0x22, 0x7AA, 0xDA }, 2472 { 0x22, 0x7AB, 0xE5 }, 2473 { 0x22, 0x7AC, 0x28 }, 2474 { 0x22, 0x7AD, 0x80 }, 2475 { 0x22, 0x7A6, 0x40 }, 2476 { 0x22, 0x7A7, 0x00 }, 2477 { 0x22, 0x7A8, 0x00 }, 2478 { 0x22, 0x7A9, 0x40 }, 2479 { 0x22, 0x7AA, 0x00 }, 2480 { 0x22, 0x7AB, 0x00 }, 2481 { 0x22, 0x7AC, 0x29 }, 2482 { 0x22, 0x7AD, 0x80 }, 2483 { 0x22, 0x7A6, 0x8E }, 2484 { 0x22, 0x7A7, 0xD7 }, 2485 { 0x22, 0x7A8, 0x22 }, 2486 { 0x22, 0x7A9, 0x8E }, 2487 { 0x22, 0x7AA, 0xD7 }, 2488 { 0x22, 0x7AB, 0x22 }, 2489 { 0x22, 0x7AC, 0x2A }, 2490 { 0x22, 0x7AD, 0x80 }, 2491 { 0x22, 0x7A6, 0x35 }, 2492 { 0x22, 0x7A7, 0x26 }, 2493 { 0x22, 0x7A8, 0xC6 }, 2494 { 0x22, 0x7A9, 0x35 }, 2495 { 0x22, 0x7AA, 0x26 }, 2496 { 0x22, 0x7AB, 0xC6 }, 2497 { 0x22, 0x7AC, 0x2B }, 2498 { 0x22, 0x7AD, 0x80 }, 2499 { 0x22, 0x7A6, 0x71 }, 2500 { 0x22, 0x7A7, 0x28 }, 2501 { 0x22, 0x7A8, 0xDE }, 2502 { 0x22, 0x7A9, 0x71 }, 2503 { 0x22, 0x7AA, 0x28 }, 2504 { 0x22, 0x7AB, 0xDE }, 2505 { 0x22, 0x7AC, 0x2C }, 2506 { 0x22, 0x7AD, 0x80 }, 2507 { 0x22, 0x7A6, 0xCA }, 2508 { 0x22, 0x7A7, 0xD9 }, 2509 { 0x22, 0x7A8, 0x3A }, 2510 { 0x22, 0x7A9, 0xCA }, 2511 { 0x22, 0x7AA, 0xD9 }, 2512 { 0x22, 0x7AB, 0x3A }, 2513 { 0x22, 0x7AC, 0x2D }, 2514 { 0x22, 0x7AD, 0x80 }, 2515 { 0x22, 0x7A6, 0x40 }, 2516 { 0x22, 0x7A7, 0x00 }, 2517 { 0x22, 0x7A8, 0x00 }, 2518 { 0x22, 0x7A9, 0x40 }, 2519 { 0x22, 0x7AA, 0x00 }, 2520 { 0x22, 0x7AB, 0x00 }, 2521 { 0x22, 0x7AC, 0x2E }, 2522 { 0x22, 0x7AD, 0x80 }, 2523 { 0x22, 0x7A6, 0x93 }, 2524 { 0x22, 0x7A7, 0x5E }, 2525 { 0x22, 0x7A8, 0xD8 }, 2526 { 0x22, 0x7A9, 0x93 }, 2527 { 0x22, 0x7AA, 0x5E }, 2528 { 0x22, 0x7AB, 0xD8 }, 2529 { 0x22, 0x7AC, 0x2F }, 2530 { 0x22, 0x7AD, 0x80 }, 2531 { 0x22, 0x7A6, 0x32 }, 2532 { 0x22, 0x7A7, 0xB7 }, 2533 { 0x22, 0x7A8, 0xB1 }, 2534 { 0x22, 0x7A9, 0x32 }, 2535 { 0x22, 0x7AA, 0xB7 }, 2536 { 0x22, 0x7AB, 0xB1 }, 2537 { 0x22, 0x7AC, 0x30 }, 2538 { 0x22, 0x7AD, 0x80 }, 2539 { 0x22, 0x7A6, 0x6C }, 2540 { 0x22, 0x7A7, 0xA1 }, 2541 { 0x22, 0x7A8, 0x28 }, 2542 { 0x22, 0x7A9, 0x6C }, 2543 { 0x22, 0x7AA, 0xA1 }, 2544 { 0x22, 0x7AB, 0x28 }, 2545 { 0x22, 0x7AC, 0x31 }, 2546 { 0x22, 0x7AD, 0x80 }, 2547 { 0x22, 0x7A6, 0xCD }, 2548 { 0x22, 0x7A7, 0x48 }, 2549 { 0x22, 0x7A8, 0x4F }, 2550 { 0x22, 0x7A9, 0xCD }, 2551 { 0x22, 0x7AA, 0x48 }, 2552 { 0x22, 0x7AB, 0x4F }, 2553 { 0x22, 0x7AC, 0x32 }, 2554 { 0x22, 0x7AD, 0x80 }, 2555 { 0x22, 0x7A6, 0x40 }, 2556 { 0x22, 0x7A7, 0x00 }, 2557 { 0x22, 0x7A8, 0x00 }, 2558 { 0x22, 0x7A9, 0x40 }, 2559 { 0x22, 0x7AA, 0x00 }, 2560 { 0x22, 0x7AB, 0x00 }, 2561 { 0x22, 0x7AC, 0x33 }, 2562 { 0x22, 0x7AD, 0x80 }, 2563 /* common */ 2564 { 0x22, 0x782, 0xC1 }, 2565 { 0x22, 0x771, 0x2C }, 2566 { 0x22, 0x772, 0x2C }, 2567 { 0x22, 0x788, 0x04 }, 2568 { 0x01, 0x7B0, 0x08 }, 2569 {} 2570 }; 2571 2572 static const struct hda_fixup stac92hd83xxx_fixups[] = { 2573 [STAC_92HD83XXX_REF] = { 2574 .type = HDA_FIXUP_PINS, 2575 .v.pins = ref92hd83xxx_pin_configs, 2576 }, 2577 [STAC_92HD83XXX_PWR_REF] = { 2578 .type = HDA_FIXUP_PINS, 2579 .v.pins = ref92hd83xxx_pin_configs, 2580 }, 2581 [STAC_DELL_S14] = { 2582 .type = HDA_FIXUP_PINS, 2583 .v.pins = dell_s14_pin_configs, 2584 }, 2585 [STAC_DELL_VOSTRO_3500] = { 2586 .type = HDA_FIXUP_PINS, 2587 .v.pins = dell_vostro_3500_pin_configs, 2588 }, 2589 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2590 .type = HDA_FIXUP_PINS, 2591 .v.pins = hp_cNB11_intquad_pin_configs, 2592 .chained = true, 2593 .chain_id = STAC_92HD83XXX_HP, 2594 }, 2595 [STAC_92HD83XXX_HP] = { 2596 .type = HDA_FIXUP_FUNC, 2597 .v.func = stac92hd83xxx_fixup_hp, 2598 }, 2599 [STAC_HP_DV7_4000] = { 2600 .type = HDA_FIXUP_PINS, 2601 .v.pins = hp_dv7_4000_pin_configs, 2602 .chained = true, 2603 .chain_id = STAC_92HD83XXX_HP, 2604 }, 2605 [STAC_HP_ZEPHYR] = { 2606 .type = HDA_FIXUP_FUNC, 2607 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2608 .chained = true, 2609 .chain_id = STAC_92HD83XXX_HP, 2610 }, 2611 [STAC_92HD83XXX_HP_LED] = { 2612 .type = HDA_FIXUP_FUNC, 2613 .v.func = stac92hd83xxx_fixup_hp_led, 2614 .chained = true, 2615 .chain_id = STAC_92HD83XXX_HP, 2616 }, 2617 [STAC_92HD83XXX_HP_INV_LED] = { 2618 .type = HDA_FIXUP_FUNC, 2619 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2620 .chained = true, 2621 .chain_id = STAC_92HD83XXX_HP, 2622 }, 2623 [STAC_92HD83XXX_HP_MIC_LED] = { 2624 .type = HDA_FIXUP_FUNC, 2625 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2626 .chained = true, 2627 .chain_id = STAC_92HD83XXX_HP, 2628 }, 2629 [STAC_HP_LED_GPIO10] = { 2630 .type = HDA_FIXUP_FUNC, 2631 .v.func = stac92hd83xxx_fixup_hp_led_gpio10, 2632 .chained = true, 2633 .chain_id = STAC_92HD83XXX_HP, 2634 }, 2635 [STAC_92HD83XXX_HEADSET_JACK] = { 2636 .type = HDA_FIXUP_FUNC, 2637 .v.func = stac92hd83xxx_fixup_headset_jack, 2638 }, 2639 [STAC_HP_ENVY_BASS] = { 2640 .type = HDA_FIXUP_PINS, 2641 .v.pins = (const struct hda_pintbl[]) { 2642 { 0x0f, 0x90170111 }, 2643 {} 2644 }, 2645 }, 2646 [STAC_HP_BNB13_EQ] = { 2647 .type = HDA_FIXUP_VERBS, 2648 .v.verbs = hp_bnb13_eq_verbs, 2649 .chained = true, 2650 .chain_id = STAC_92HD83XXX_HP_MIC_LED, 2651 }, 2652 [STAC_HP_ENVY_TS_BASS] = { 2653 .type = HDA_FIXUP_PINS, 2654 .v.pins = (const struct hda_pintbl[]) { 2655 { 0x10, 0x92170111 }, 2656 {} 2657 }, 2658 }, 2659 }; 2660 2661 static const struct hda_model_fixup stac92hd83xxx_models[] = { 2662 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2663 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2664 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2665 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2666 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2667 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2668 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2669 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2670 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2671 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2672 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2673 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2674 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, 2675 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" }, 2676 {} 2677 }; 2678 2679 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2680 /* SigmaTel reference board */ 2681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2682 "DFI LanParty", STAC_92HD83XXX_REF), 2683 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2684 "DFI LanParty", STAC_92HD83XXX_REF), 2685 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2686 "unknown Dell", STAC_DELL_S14), 2687 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2688 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2689 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2690 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2691 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2692 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2693 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2694 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2695 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2696 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2697 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2698 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2699 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2700 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2701 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2702 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2704 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2706 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2707 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2708 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2709 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2710 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2711 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2712 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2713 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2714 "HP Pavilion dv7", STAC_HP_DV7_4000), 2715 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2716 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2717 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2718 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2719 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2720 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2721 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899, 2722 "HP Folio 13", STAC_HP_LED_GPIO10), 2723 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2724 "HP Folio", STAC_HP_BNB13_EQ), 2725 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, 2726 "HP bNB13", STAC_HP_BNB13_EQ), 2727 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, 2728 "HP bNB13", STAC_HP_BNB13_EQ), 2729 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, 2730 "HP bNB13", STAC_HP_BNB13_EQ), 2731 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e, 2732 "HP ENVY TS", STAC_HP_ENVY_TS_BASS), 2733 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, 2734 "HP bNB13", STAC_HP_BNB13_EQ), 2735 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, 2736 "HP bNB13", STAC_HP_BNB13_EQ), 2737 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, 2738 "HP bNB13", STAC_HP_BNB13_EQ), 2739 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, 2740 "HP bNB13", STAC_HP_BNB13_EQ), 2741 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, 2742 "HP bNB13", STAC_HP_BNB13_EQ), 2743 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, 2744 "HP bNB13", STAC_HP_BNB13_EQ), 2745 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, 2746 "HP bNB13", STAC_HP_BNB13_EQ), 2747 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, 2748 "HP bNB13", STAC_HP_BNB13_EQ), 2749 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, 2750 "HP bNB13", STAC_HP_BNB13_EQ), 2751 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, 2752 "HP bNB13", STAC_HP_BNB13_EQ), 2753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, 2754 "HP bNB13", STAC_HP_BNB13_EQ), 2755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, 2756 "HP bNB13", STAC_HP_BNB13_EQ), 2757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, 2758 "HP bNB13", STAC_HP_BNB13_EQ), 2759 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, 2760 "HP bNB13", STAC_HP_BNB13_EQ), 2761 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, 2762 "HP bNB13", STAC_HP_BNB13_EQ), 2763 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, 2764 "HP bNB13", STAC_HP_BNB13_EQ), 2765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, 2766 "HP bNB13", STAC_HP_BNB13_EQ), 2767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, 2768 "HP bNB13", STAC_HP_BNB13_EQ), 2769 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, 2770 "HP bNB13", STAC_HP_BNB13_EQ), 2771 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, 2772 "HP bNB13", STAC_HP_BNB13_EQ), 2773 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, 2774 "HP bNB13", STAC_HP_BNB13_EQ), 2775 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, 2776 "HP bNB13", STAC_HP_BNB13_EQ), 2777 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, 2778 "HP bNB13", STAC_HP_BNB13_EQ), 2779 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, 2780 "HP bNB13", STAC_HP_BNB13_EQ), 2781 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, 2782 "HP bNB13", STAC_HP_BNB13_EQ), 2783 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, 2784 "HP bNB13", STAC_HP_BNB13_EQ), 2785 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, 2786 "HP bNB13", STAC_HP_BNB13_EQ), 2787 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, 2788 "HP bNB13", STAC_HP_BNB13_EQ), 2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, 2790 "HP bNB13", STAC_HP_BNB13_EQ), 2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, 2792 "HP bNB13", STAC_HP_BNB13_EQ), 2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, 2794 "HP bNB13", STAC_HP_BNB13_EQ), 2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, 2796 "HP bNB13", STAC_HP_BNB13_EQ), 2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, 2798 "HP bNB13", STAC_HP_BNB13_EQ), 2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, 2800 "HP bNB13", STAC_HP_BNB13_EQ), 2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, 2802 "HP bNB13", STAC_HP_BNB13_EQ), 2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, 2804 "HP bNB13", STAC_HP_BNB13_EQ), 2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, 2806 "HP bNB13", STAC_HP_BNB13_EQ), 2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, 2808 "HP bNB13", STAC_HP_BNB13_EQ), 2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, 2810 "HP bNB13", STAC_HP_BNB13_EQ), 2811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, 2812 "HP bNB13", STAC_HP_BNB13_EQ), 2813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, 2814 "HP bNB13", STAC_HP_BNB13_EQ), 2815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, 2816 "HP bNB13", STAC_HP_BNB13_EQ), 2817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, 2818 "HP bNB13", STAC_HP_BNB13_EQ), 2819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, 2820 "HP bNB13", STAC_HP_BNB13_EQ), 2821 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2822 "HP", STAC_92HD83XXX_HP_MIC_LED), 2823 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2824 "HP", STAC_92HD83XXX_HP_MIC_LED), 2825 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2826 "HP", STAC_92HD83XXX_HP_MIC_LED), 2827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2828 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2830 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2832 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2833 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2834 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2835 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2836 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2838 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2839 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2840 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2841 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2842 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2843 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2844 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2845 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2846 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2848 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2850 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2852 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2854 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2856 "HP", STAC_HP_ZEPHYR), 2857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2858 "HP Mini", STAC_92HD83XXX_HP_LED), 2859 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2860 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2861 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2862 "HP Mini", STAC_92HD83XXX_HP_LED), 2863 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2864 {} /* terminator */ 2865 }; 2866 2867 /* HP dv7 bass switch - GPIO5 */ 2868 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2869 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2870 struct snd_ctl_elem_value *ucontrol) 2871 { 2872 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2873 struct sigmatel_spec *spec = codec->spec; 2874 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2875 return 0; 2876 } 2877 2878 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2879 struct snd_ctl_elem_value *ucontrol) 2880 { 2881 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2882 struct sigmatel_spec *spec = codec->spec; 2883 unsigned int gpio_data; 2884 2885 gpio_data = (spec->gpio_data & ~0x20) | 2886 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2887 if (gpio_data == spec->gpio_data) 2888 return 0; 2889 spec->gpio_data = gpio_data; 2890 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2891 return 1; 2892 } 2893 2894 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2895 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2896 .info = stac_hp_bass_gpio_info, 2897 .get = stac_hp_bass_gpio_get, 2898 .put = stac_hp_bass_gpio_put, 2899 }; 2900 2901 static int stac_add_hp_bass_switch(struct hda_codec *codec) 2902 { 2903 struct sigmatel_spec *spec = codec->spec; 2904 2905 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2906 &stac_hp_bass_sw_ctrl)) 2907 return -ENOMEM; 2908 2909 spec->gpio_mask |= 0x20; 2910 spec->gpio_dir |= 0x20; 2911 spec->gpio_data |= 0x20; 2912 return 0; 2913 } 2914 2915 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 2916 { 0x0a, 0x02214030 }, 2917 { 0x0b, 0x02a19040 }, 2918 { 0x0c, 0x01a19020 }, 2919 { 0x0d, 0x01014010 }, 2920 { 0x0e, 0x0181302e }, 2921 { 0x0f, 0x01014010 }, 2922 { 0x14, 0x01019020 }, 2923 { 0x18, 0x90a000f0 }, 2924 { 0x19, 0x90a000f0 }, 2925 { 0x1e, 0x01452050 }, 2926 { 0x1f, 0x01452050 }, 2927 {} 2928 }; 2929 2930 static const struct hda_pintbl dell_m4_1_pin_configs[] = { 2931 { 0x0a, 0x0421101f }, 2932 { 0x0b, 0x04a11221 }, 2933 { 0x0c, 0x40f000f0 }, 2934 { 0x0d, 0x90170110 }, 2935 { 0x0e, 0x23a1902e }, 2936 { 0x0f, 0x23014250 }, 2937 { 0x14, 0x40f000f0 }, 2938 { 0x18, 0x90a000f0 }, 2939 { 0x19, 0x40f000f0 }, 2940 { 0x1e, 0x4f0000f0 }, 2941 { 0x1f, 0x4f0000f0 }, 2942 {} 2943 }; 2944 2945 static const struct hda_pintbl dell_m4_2_pin_configs[] = { 2946 { 0x0a, 0x0421101f }, 2947 { 0x0b, 0x04a11221 }, 2948 { 0x0c, 0x90a70330 }, 2949 { 0x0d, 0x90170110 }, 2950 { 0x0e, 0x23a1902e }, 2951 { 0x0f, 0x23014250 }, 2952 { 0x14, 0x40f000f0 }, 2953 { 0x18, 0x40f000f0 }, 2954 { 0x19, 0x40f000f0 }, 2955 { 0x1e, 0x044413b0 }, 2956 { 0x1f, 0x044413b0 }, 2957 {} 2958 }; 2959 2960 static const struct hda_pintbl dell_m4_3_pin_configs[] = { 2961 { 0x0a, 0x0421101f }, 2962 { 0x0b, 0x04a11221 }, 2963 { 0x0c, 0x90a70330 }, 2964 { 0x0d, 0x90170110 }, 2965 { 0x0e, 0x40f000f0 }, 2966 { 0x0f, 0x40f000f0 }, 2967 { 0x14, 0x40f000f0 }, 2968 { 0x18, 0x90a000f0 }, 2969 { 0x19, 0x40f000f0 }, 2970 { 0x1e, 0x044413b0 }, 2971 { 0x1f, 0x044413b0 }, 2972 {} 2973 }; 2974 2975 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 2976 const struct hda_fixup *fix, int action) 2977 { 2978 struct sigmatel_spec *spec = codec->spec; 2979 2980 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2981 return; 2982 2983 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 2984 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 2985 } 2986 2987 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 2988 const struct hda_fixup *fix, int action) 2989 { 2990 struct sigmatel_spec *spec = codec->spec; 2991 struct hda_jack_callback *jack; 2992 2993 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2994 return; 2995 2996 /* Enable VREF power saving on GPIO1 detect */ 2997 snd_hda_codec_write_cache(codec, codec->afg, 0, 2998 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 2999 jack = snd_hda_jack_detect_enable_callback(codec, codec->afg, 3000 stac_vref_event); 3001 if (!IS_ERR(jack)) 3002 jack->private_data = 0x02; 3003 3004 spec->gpio_mask |= 0x02; 3005 3006 /* enable internal microphone */ 3007 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 3008 } 3009 3010 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 3011 const struct hda_fixup *fix, int action) 3012 { 3013 struct sigmatel_spec *spec = codec->spec; 3014 3015 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3016 return; 3017 spec->gpio_led = 0x01; 3018 } 3019 3020 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 3021 const struct hda_fixup *fix, int action) 3022 { 3023 unsigned int cap; 3024 3025 switch (action) { 3026 case HDA_FIXUP_ACT_PRE_PROBE: 3027 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 3028 break; 3029 3030 case HDA_FIXUP_ACT_PROBE: 3031 /* enable bass on HP dv7 */ 3032 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 3033 cap &= AC_GPIO_IO_COUNT; 3034 if (cap >= 6) 3035 stac_add_hp_bass_switch(codec); 3036 break; 3037 } 3038 } 3039 3040 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 3041 const struct hda_fixup *fix, int action) 3042 { 3043 struct sigmatel_spec *spec = codec->spec; 3044 3045 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3046 return; 3047 spec->gpio_led = 0x08; 3048 } 3049 3050 3051 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 3052 const struct hda_fixup *fix, int action) 3053 { 3054 struct sigmatel_spec *spec = codec->spec; 3055 3056 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3057 return; 3058 3059 if (hp_blike_system(codec->subsystem_id)) { 3060 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f); 3061 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 3062 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER || 3063 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) { 3064 /* It was changed in the BIOS to just satisfy MS DTM. 3065 * Lets turn it back into slaved HP 3066 */ 3067 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) 3068 | (AC_JACK_HP_OUT << 3069 AC_DEFCFG_DEVICE_SHIFT); 3070 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC 3071 | AC_DEFCFG_SEQUENCE))) 3072 | 0x1f; 3073 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg); 3074 } 3075 } 3076 3077 if (find_mute_led_cfg(codec, 1)) 3078 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 3079 spec->gpio_led, 3080 spec->gpio_led_polarity); 3081 3082 } 3083 3084 static const struct hda_fixup stac92hd71bxx_fixups[] = { 3085 [STAC_92HD71BXX_REF] = { 3086 .type = HDA_FIXUP_FUNC, 3087 .v.func = stac92hd71bxx_fixup_ref, 3088 }, 3089 [STAC_DELL_M4_1] = { 3090 .type = HDA_FIXUP_PINS, 3091 .v.pins = dell_m4_1_pin_configs, 3092 }, 3093 [STAC_DELL_M4_2] = { 3094 .type = HDA_FIXUP_PINS, 3095 .v.pins = dell_m4_2_pin_configs, 3096 }, 3097 [STAC_DELL_M4_3] = { 3098 .type = HDA_FIXUP_PINS, 3099 .v.pins = dell_m4_3_pin_configs, 3100 }, 3101 [STAC_HP_M4] = { 3102 .type = HDA_FIXUP_FUNC, 3103 .v.func = stac92hd71bxx_fixup_hp_m4, 3104 .chained = true, 3105 .chain_id = STAC_92HD71BXX_HP, 3106 }, 3107 [STAC_HP_DV4] = { 3108 .type = HDA_FIXUP_FUNC, 3109 .v.func = stac92hd71bxx_fixup_hp_dv4, 3110 .chained = true, 3111 .chain_id = STAC_HP_DV5, 3112 }, 3113 [STAC_HP_DV5] = { 3114 .type = HDA_FIXUP_FUNC, 3115 .v.func = stac92hd71bxx_fixup_hp_dv5, 3116 .chained = true, 3117 .chain_id = STAC_92HD71BXX_HP, 3118 }, 3119 [STAC_HP_HDX] = { 3120 .type = HDA_FIXUP_FUNC, 3121 .v.func = stac92hd71bxx_fixup_hp_hdx, 3122 .chained = true, 3123 .chain_id = STAC_92HD71BXX_HP, 3124 }, 3125 [STAC_92HD71BXX_HP] = { 3126 .type = HDA_FIXUP_FUNC, 3127 .v.func = stac92hd71bxx_fixup_hp, 3128 }, 3129 }; 3130 3131 static const struct hda_model_fixup stac92hd71bxx_models[] = { 3132 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 3133 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 3134 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 3135 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 3136 { .id = STAC_HP_M4, .name = "hp-m4" }, 3137 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 3138 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 3139 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 3140 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 3141 {} 3142 }; 3143 3144 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 3145 /* SigmaTel reference board */ 3146 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3147 "DFI LanParty", STAC_92HD71BXX_REF), 3148 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3149 "DFI LanParty", STAC_92HD71BXX_REF), 3150 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 3151 "HP", STAC_HP_DV5), 3152 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 3153 "HP", STAC_HP_DV5), 3154 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 3155 "HP dv4-7", STAC_HP_DV4), 3156 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 3157 "HP dv4-7", STAC_HP_DV5), 3158 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 3159 "HP HDX", STAC_HP_HDX), /* HDX18 */ 3160 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 3161 "HP mini 1000", STAC_HP_M4), 3162 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 3163 "HP HDX", STAC_HP_HDX), /* HDX16 */ 3164 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 3165 "HP dv6", STAC_HP_DV5), 3166 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 3167 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 3168 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 3169 "HP DV6", STAC_HP_DV5), 3170 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 3171 "HP", STAC_HP_DV5), 3172 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 3173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 3174 "unknown Dell", STAC_DELL_M4_1), 3175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 3176 "unknown Dell", STAC_DELL_M4_1), 3177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 3178 "unknown Dell", STAC_DELL_M4_1), 3179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 3180 "unknown Dell", STAC_DELL_M4_1), 3181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 3182 "unknown Dell", STAC_DELL_M4_1), 3183 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 3184 "unknown Dell", STAC_DELL_M4_1), 3185 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 3186 "unknown Dell", STAC_DELL_M4_1), 3187 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 3188 "unknown Dell", STAC_DELL_M4_2), 3189 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 3190 "unknown Dell", STAC_DELL_M4_2), 3191 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 3192 "unknown Dell", STAC_DELL_M4_2), 3193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 3194 "unknown Dell", STAC_DELL_M4_2), 3195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 3196 "unknown Dell", STAC_DELL_M4_3), 3197 {} /* terminator */ 3198 }; 3199 3200 static const struct hda_pintbl ref922x_pin_configs[] = { 3201 { 0x0a, 0x01014010 }, 3202 { 0x0b, 0x01016011 }, 3203 { 0x0c, 0x01012012 }, 3204 { 0x0d, 0x0221401f }, 3205 { 0x0e, 0x01813122 }, 3206 { 0x0f, 0x01011014 }, 3207 { 0x10, 0x01441030 }, 3208 { 0x11, 0x01c41030 }, 3209 { 0x15, 0x40000100 }, 3210 { 0x1b, 0x40000100 }, 3211 {} 3212 }; 3213 3214 /* 3215 STAC 922X pin configs for 3216 102801A7 3217 102801AB 3218 102801A9 3219 102801D1 3220 102801D2 3221 */ 3222 static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 3223 { 0x0a, 0x02214030 }, 3224 { 0x0b, 0x01a19021 }, 3225 { 0x0c, 0x01111012 }, 3226 { 0x0d, 0x01114010 }, 3227 { 0x0e, 0x02a19020 }, 3228 { 0x0f, 0x01117011 }, 3229 { 0x10, 0x400001f0 }, 3230 { 0x11, 0x400001f1 }, 3231 { 0x15, 0x01813122 }, 3232 { 0x1b, 0x400001f2 }, 3233 {} 3234 }; 3235 3236 /* 3237 STAC 922X pin configs for 3238 102801AC 3239 102801D0 3240 */ 3241 static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 3242 { 0x0a, 0x02214030 }, 3243 { 0x0b, 0x01a19021 }, 3244 { 0x0c, 0x01111012 }, 3245 { 0x0d, 0x01114010 }, 3246 { 0x0e, 0x02a19020 }, 3247 { 0x0f, 0x01117011 }, 3248 { 0x10, 0x01451140 }, 3249 { 0x11, 0x400001f0 }, 3250 { 0x15, 0x01813122 }, 3251 { 0x1b, 0x400001f1 }, 3252 {} 3253 }; 3254 3255 /* 3256 STAC 922X pin configs for 3257 102801BF 3258 */ 3259 static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 3260 { 0x0a, 0x0321101f }, 3261 { 0x0b, 0x01112024 }, 3262 { 0x0c, 0x01111222 }, 3263 { 0x0d, 0x91174220 }, 3264 { 0x0e, 0x03a11050 }, 3265 { 0x0f, 0x01116221 }, 3266 { 0x10, 0x90a70330 }, 3267 { 0x11, 0x01452340 }, 3268 { 0x15, 0x40C003f1 }, 3269 { 0x1b, 0x405003f0 }, 3270 {} 3271 }; 3272 3273 /* 3274 STAC 9221 A1 pin configs for 3275 102801D7 (Dell XPS M1210) 3276 */ 3277 static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 3278 { 0x0a, 0x02211211 }, 3279 { 0x0b, 0x408103ff }, 3280 { 0x0c, 0x02a1123e }, 3281 { 0x0d, 0x90100310 }, 3282 { 0x0e, 0x408003f1 }, 3283 { 0x0f, 0x0221121f }, 3284 { 0x10, 0x03451340 }, 3285 { 0x11, 0x40c003f2 }, 3286 { 0x15, 0x508003f3 }, 3287 { 0x1b, 0x405003f4 }, 3288 {} 3289 }; 3290 3291 static const struct hda_pintbl d945gtp3_pin_configs[] = { 3292 { 0x0a, 0x0221401f }, 3293 { 0x0b, 0x01a19022 }, 3294 { 0x0c, 0x01813021 }, 3295 { 0x0d, 0x01014010 }, 3296 { 0x0e, 0x40000100 }, 3297 { 0x0f, 0x40000100 }, 3298 { 0x10, 0x40000100 }, 3299 { 0x11, 0x40000100 }, 3300 { 0x15, 0x02a19120 }, 3301 { 0x1b, 0x40000100 }, 3302 {} 3303 }; 3304 3305 static const struct hda_pintbl d945gtp5_pin_configs[] = { 3306 { 0x0a, 0x0221401f }, 3307 { 0x0b, 0x01011012 }, 3308 { 0x0c, 0x01813024 }, 3309 { 0x0d, 0x01014010 }, 3310 { 0x0e, 0x01a19021 }, 3311 { 0x0f, 0x01016011 }, 3312 { 0x10, 0x01452130 }, 3313 { 0x11, 0x40000100 }, 3314 { 0x15, 0x02a19320 }, 3315 { 0x1b, 0x40000100 }, 3316 {} 3317 }; 3318 3319 static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 3320 { 0x0a, 0x0121e21f }, 3321 { 0x0b, 0x400000ff }, 3322 { 0x0c, 0x9017e110 }, 3323 { 0x0d, 0x400000fd }, 3324 { 0x0e, 0x400000fe }, 3325 { 0x0f, 0x0181e020 }, 3326 { 0x10, 0x1145e030 }, 3327 { 0x11, 0x11c5e240 }, 3328 { 0x15, 0x400000fc }, 3329 { 0x1b, 0x400000fb }, 3330 {} 3331 }; 3332 3333 static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 3334 { 0x0a, 0x0121e21f }, 3335 { 0x0b, 0x90a7012e }, 3336 { 0x0c, 0x9017e110 }, 3337 { 0x0d, 0x400000fd }, 3338 { 0x0e, 0x400000fe }, 3339 { 0x0f, 0x0181e020 }, 3340 { 0x10, 0x1145e230 }, 3341 { 0x11, 0x500000fa }, 3342 { 0x15, 0x400000fc }, 3343 { 0x1b, 0x400000fb }, 3344 {} 3345 }; 3346 3347 static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 3348 { 0x0a, 0x0121e21f }, 3349 { 0x0b, 0x90a7012e }, 3350 { 0x0c, 0x9017e110 }, 3351 { 0x0d, 0x400000fd }, 3352 { 0x0e, 0x400000fe }, 3353 { 0x0f, 0x0181e020 }, 3354 { 0x10, 0x1145e230 }, 3355 { 0x11, 0x11c5e240 }, 3356 { 0x15, 0x400000fc }, 3357 { 0x1b, 0x400000fb }, 3358 {} 3359 }; 3360 3361 static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 3362 { 0x0a, 0x0321e21f }, 3363 { 0x0b, 0x03a1e02e }, 3364 { 0x0c, 0x9017e110 }, 3365 { 0x0d, 0x9017e11f }, 3366 { 0x0e, 0x400000fe }, 3367 { 0x0f, 0x0381e020 }, 3368 { 0x10, 0x1345e230 }, 3369 { 0x11, 0x13c5e240 }, 3370 { 0x15, 0x400000fc }, 3371 { 0x1b, 0x400000fb }, 3372 {} 3373 }; 3374 3375 static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 3376 { 0x0a, 0x0321e21f }, 3377 { 0x0b, 0x03a1e02e }, 3378 { 0x0c, 0x9017e110 }, 3379 { 0x0d, 0x9017e11f }, 3380 { 0x0e, 0x400000fe }, 3381 { 0x0f, 0x0381e020 }, 3382 { 0x10, 0x1345e230 }, 3383 { 0x11, 0x13c5e240 }, 3384 { 0x15, 0x400000fc }, 3385 { 0x1b, 0x400000fb }, 3386 {} 3387 }; 3388 3389 static const struct hda_pintbl ecs202_pin_configs[] = { 3390 { 0x0a, 0x0221401f }, 3391 { 0x0b, 0x02a19020 }, 3392 { 0x0c, 0x01a19020 }, 3393 { 0x0d, 0x01114010 }, 3394 { 0x0e, 0x408000f0 }, 3395 { 0x0f, 0x01813022 }, 3396 { 0x10, 0x074510a0 }, 3397 { 0x11, 0x40c400f1 }, 3398 { 0x15, 0x9037012e }, 3399 { 0x1b, 0x40e000f2 }, 3400 {} 3401 }; 3402 3403 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 3404 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 3405 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 3406 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 3407 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 3408 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 3409 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 3410 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 3411 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 3412 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 3413 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 3414 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 3415 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 3416 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 3417 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 3418 {} 3419 }; 3420 3421 static const struct hda_fixup stac922x_fixups[]; 3422 3423 /* remap the fixup from codec SSID and apply it */ 3424 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 3425 const struct hda_fixup *fix, 3426 int action) 3427 { 3428 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3429 return; 3430 3431 codec->fixup_id = HDA_FIXUP_ID_NOT_SET; 3432 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 3433 stac922x_fixups); 3434 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET) 3435 snd_hda_apply_fixup(codec, action); 3436 } 3437 3438 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 3439 const struct hda_fixup *fix, 3440 int action) 3441 { 3442 struct sigmatel_spec *spec = codec->spec; 3443 3444 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3445 spec->gpio_mask = spec->gpio_dir = 0x03; 3446 spec->gpio_data = 0x03; 3447 } 3448 } 3449 3450 static const struct hda_fixup stac922x_fixups[] = { 3451 [STAC_D945_REF] = { 3452 .type = HDA_FIXUP_PINS, 3453 .v.pins = ref922x_pin_configs, 3454 }, 3455 [STAC_D945GTP3] = { 3456 .type = HDA_FIXUP_PINS, 3457 .v.pins = d945gtp3_pin_configs, 3458 }, 3459 [STAC_D945GTP5] = { 3460 .type = HDA_FIXUP_PINS, 3461 .v.pins = d945gtp5_pin_configs, 3462 }, 3463 [STAC_INTEL_MAC_AUTO] = { 3464 .type = HDA_FIXUP_FUNC, 3465 .v.func = stac922x_fixup_intel_mac_auto, 3466 }, 3467 [STAC_INTEL_MAC_V1] = { 3468 .type = HDA_FIXUP_PINS, 3469 .v.pins = intel_mac_v1_pin_configs, 3470 .chained = true, 3471 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3472 }, 3473 [STAC_INTEL_MAC_V2] = { 3474 .type = HDA_FIXUP_PINS, 3475 .v.pins = intel_mac_v2_pin_configs, 3476 .chained = true, 3477 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3478 }, 3479 [STAC_INTEL_MAC_V3] = { 3480 .type = HDA_FIXUP_PINS, 3481 .v.pins = intel_mac_v3_pin_configs, 3482 .chained = true, 3483 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3484 }, 3485 [STAC_INTEL_MAC_V4] = { 3486 .type = HDA_FIXUP_PINS, 3487 .v.pins = intel_mac_v4_pin_configs, 3488 .chained = true, 3489 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3490 }, 3491 [STAC_INTEL_MAC_V5] = { 3492 .type = HDA_FIXUP_PINS, 3493 .v.pins = intel_mac_v5_pin_configs, 3494 .chained = true, 3495 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3496 }, 3497 [STAC_922X_INTEL_MAC_GPIO] = { 3498 .type = HDA_FIXUP_FUNC, 3499 .v.func = stac922x_fixup_intel_mac_gpio, 3500 }, 3501 [STAC_ECS_202] = { 3502 .type = HDA_FIXUP_PINS, 3503 .v.pins = ecs202_pin_configs, 3504 }, 3505 [STAC_922X_DELL_D81] = { 3506 .type = HDA_FIXUP_PINS, 3507 .v.pins = dell_922x_d81_pin_configs, 3508 }, 3509 [STAC_922X_DELL_D82] = { 3510 .type = HDA_FIXUP_PINS, 3511 .v.pins = dell_922x_d82_pin_configs, 3512 }, 3513 [STAC_922X_DELL_M81] = { 3514 .type = HDA_FIXUP_PINS, 3515 .v.pins = dell_922x_m81_pin_configs, 3516 }, 3517 [STAC_922X_DELL_M82] = { 3518 .type = HDA_FIXUP_PINS, 3519 .v.pins = dell_922x_m82_pin_configs, 3520 }, 3521 }; 3522 3523 static const struct hda_model_fixup stac922x_models[] = { 3524 { .id = STAC_D945_REF, .name = "ref" }, 3525 { .id = STAC_D945GTP5, .name = "5stack" }, 3526 { .id = STAC_D945GTP3, .name = "3stack" }, 3527 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 3528 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 3529 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 3530 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 3531 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 3532 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 3533 { .id = STAC_ECS_202, .name = "ecs202" }, 3534 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 3535 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 3536 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 3537 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 3538 /* for backward compatibility */ 3539 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 3540 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 3541 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 3542 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 3543 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 3544 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 3545 {} 3546 }; 3547 3548 static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 3549 /* SigmaTel reference board */ 3550 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3551 "DFI LanParty", STAC_D945_REF), 3552 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3553 "DFI LanParty", STAC_D945_REF), 3554 /* Intel 945G based systems */ 3555 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 3556 "Intel D945G", STAC_D945GTP3), 3557 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 3558 "Intel D945G", STAC_D945GTP3), 3559 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 3560 "Intel D945G", STAC_D945GTP3), 3561 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 3562 "Intel D945G", STAC_D945GTP3), 3563 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 3564 "Intel D945G", STAC_D945GTP3), 3565 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 3566 "Intel D945G", STAC_D945GTP3), 3567 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 3568 "Intel D945G", STAC_D945GTP3), 3569 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 3570 "Intel D945G", STAC_D945GTP3), 3571 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 3572 "Intel D945G", STAC_D945GTP3), 3573 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 3574 "Intel D945G", STAC_D945GTP3), 3575 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 3576 "Intel D945G", STAC_D945GTP3), 3577 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 3578 "Intel D945G", STAC_D945GTP3), 3579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 3580 "Intel D945G", STAC_D945GTP3), 3581 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 3582 "Intel D945G", STAC_D945GTP3), 3583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3584 "Intel D945G", STAC_D945GTP3), 3585 /* Intel D945G 5-stack systems */ 3586 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3587 "Intel D945G", STAC_D945GTP5), 3588 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3589 "Intel D945G", STAC_D945GTP5), 3590 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3591 "Intel D945G", STAC_D945GTP5), 3592 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3593 "Intel D945G", STAC_D945GTP5), 3594 /* Intel 945P based systems */ 3595 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3596 "Intel D945P", STAC_D945GTP3), 3597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3598 "Intel D945P", STAC_D945GTP3), 3599 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3600 "Intel D945P", STAC_D945GTP3), 3601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3602 "Intel D945P", STAC_D945GTP3), 3603 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3604 "Intel D945P", STAC_D945GTP3), 3605 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3606 "Intel D945P", STAC_D945GTP5), 3607 /* other intel */ 3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3609 "Intel D945", STAC_D945_REF), 3610 /* other systems */ 3611 3612 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3613 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3614 3615 /* Dell systems */ 3616 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3617 "unknown Dell", STAC_922X_DELL_D81), 3618 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3619 "unknown Dell", STAC_922X_DELL_D81), 3620 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3621 "unknown Dell", STAC_922X_DELL_D81), 3622 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3623 "unknown Dell", STAC_922X_DELL_D82), 3624 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3625 "unknown Dell", STAC_922X_DELL_M81), 3626 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3627 "unknown Dell", STAC_922X_DELL_D82), 3628 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3629 "unknown Dell", STAC_922X_DELL_D81), 3630 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3631 "unknown Dell", STAC_922X_DELL_D81), 3632 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3633 "Dell XPS M1210", STAC_922X_DELL_M82), 3634 /* ECS/PC Chips boards */ 3635 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3636 "ECS/PC chips", STAC_ECS_202), 3637 {} /* terminator */ 3638 }; 3639 3640 static const struct hda_pintbl ref927x_pin_configs[] = { 3641 { 0x0a, 0x02214020 }, 3642 { 0x0b, 0x02a19080 }, 3643 { 0x0c, 0x0181304e }, 3644 { 0x0d, 0x01014010 }, 3645 { 0x0e, 0x01a19040 }, 3646 { 0x0f, 0x01011012 }, 3647 { 0x10, 0x01016011 }, 3648 { 0x11, 0x0101201f }, 3649 { 0x12, 0x183301f0 }, 3650 { 0x13, 0x18a001f0 }, 3651 { 0x14, 0x18a001f0 }, 3652 { 0x21, 0x01442070 }, 3653 { 0x22, 0x01c42190 }, 3654 { 0x23, 0x40000100 }, 3655 {} 3656 }; 3657 3658 static const struct hda_pintbl d965_3st_pin_configs[] = { 3659 { 0x0a, 0x0221401f }, 3660 { 0x0b, 0x02a19120 }, 3661 { 0x0c, 0x40000100 }, 3662 { 0x0d, 0x01014011 }, 3663 { 0x0e, 0x01a19021 }, 3664 { 0x0f, 0x01813024 }, 3665 { 0x10, 0x40000100 }, 3666 { 0x11, 0x40000100 }, 3667 { 0x12, 0x40000100 }, 3668 { 0x13, 0x40000100 }, 3669 { 0x14, 0x40000100 }, 3670 { 0x21, 0x40000100 }, 3671 { 0x22, 0x40000100 }, 3672 { 0x23, 0x40000100 }, 3673 {} 3674 }; 3675 3676 static const struct hda_pintbl d965_5st_pin_configs[] = { 3677 { 0x0a, 0x02214020 }, 3678 { 0x0b, 0x02a19080 }, 3679 { 0x0c, 0x0181304e }, 3680 { 0x0d, 0x01014010 }, 3681 { 0x0e, 0x01a19040 }, 3682 { 0x0f, 0x01011012 }, 3683 { 0x10, 0x01016011 }, 3684 { 0x11, 0x40000100 }, 3685 { 0x12, 0x40000100 }, 3686 { 0x13, 0x40000100 }, 3687 { 0x14, 0x40000100 }, 3688 { 0x21, 0x01442070 }, 3689 { 0x22, 0x40000100 }, 3690 { 0x23, 0x40000100 }, 3691 {} 3692 }; 3693 3694 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3695 { 0x0a, 0x40000100 }, 3696 { 0x0b, 0x40000100 }, 3697 { 0x0c, 0x0181304e }, 3698 { 0x0d, 0x01014010 }, 3699 { 0x0e, 0x01a19040 }, 3700 { 0x0f, 0x01011012 }, 3701 { 0x10, 0x01016011 }, 3702 { 0x11, 0x40000100 }, 3703 { 0x12, 0x40000100 }, 3704 { 0x13, 0x40000100 }, 3705 { 0x14, 0x40000100 }, 3706 { 0x21, 0x01442070 }, 3707 { 0x22, 0x40000100 }, 3708 { 0x23, 0x40000100 }, 3709 {} 3710 }; 3711 3712 static const struct hda_pintbl dell_3st_pin_configs[] = { 3713 { 0x0a, 0x02211230 }, 3714 { 0x0b, 0x02a11220 }, 3715 { 0x0c, 0x01a19040 }, 3716 { 0x0d, 0x01114210 }, 3717 { 0x0e, 0x01111212 }, 3718 { 0x0f, 0x01116211 }, 3719 { 0x10, 0x01813050 }, 3720 { 0x11, 0x01112214 }, 3721 { 0x12, 0x403003fa }, 3722 { 0x13, 0x90a60040 }, 3723 { 0x14, 0x90a60040 }, 3724 { 0x21, 0x404003fb }, 3725 { 0x22, 0x40c003fc }, 3726 { 0x23, 0x40000100 }, 3727 {} 3728 }; 3729 3730 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3731 const struct hda_fixup *fix, int action) 3732 { 3733 /* no jack detecion for ref-no-jd model */ 3734 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3735 codec->no_jack_detect = 1; 3736 } 3737 3738 static void stac927x_fixup_ref(struct hda_codec *codec, 3739 const struct hda_fixup *fix, int action) 3740 { 3741 struct sigmatel_spec *spec = codec->spec; 3742 3743 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3744 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3745 spec->eapd_mask = spec->gpio_mask = 0; 3746 spec->gpio_dir = spec->gpio_data = 0; 3747 } 3748 } 3749 3750 static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3751 const struct hda_fixup *fix, int action) 3752 { 3753 struct sigmatel_spec *spec = codec->spec; 3754 3755 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3756 return; 3757 3758 if (codec->subsystem_id != 0x1028022f) { 3759 /* GPIO2 High = Enable EAPD */ 3760 spec->eapd_mask = spec->gpio_mask = 0x04; 3761 spec->gpio_dir = spec->gpio_data = 0x04; 3762 } 3763 3764 snd_hda_add_verbs(codec, dell_3st_core_init); 3765 spec->volknob_init = 1; 3766 } 3767 3768 static void stac927x_fixup_volknob(struct hda_codec *codec, 3769 const struct hda_fixup *fix, int action) 3770 { 3771 struct sigmatel_spec *spec = codec->spec; 3772 3773 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3774 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3775 spec->volknob_init = 1; 3776 } 3777 } 3778 3779 static const struct hda_fixup stac927x_fixups[] = { 3780 [STAC_D965_REF_NO_JD] = { 3781 .type = HDA_FIXUP_FUNC, 3782 .v.func = stac927x_fixup_ref_no_jd, 3783 .chained = true, 3784 .chain_id = STAC_D965_REF, 3785 }, 3786 [STAC_D965_REF] = { 3787 .type = HDA_FIXUP_FUNC, 3788 .v.func = stac927x_fixup_ref, 3789 }, 3790 [STAC_D965_3ST] = { 3791 .type = HDA_FIXUP_PINS, 3792 .v.pins = d965_3st_pin_configs, 3793 .chained = true, 3794 .chain_id = STAC_D965_VERBS, 3795 }, 3796 [STAC_D965_5ST] = { 3797 .type = HDA_FIXUP_PINS, 3798 .v.pins = d965_5st_pin_configs, 3799 .chained = true, 3800 .chain_id = STAC_D965_VERBS, 3801 }, 3802 [STAC_D965_VERBS] = { 3803 .type = HDA_FIXUP_VERBS, 3804 .v.verbs = d965_core_init, 3805 }, 3806 [STAC_D965_5ST_NO_FP] = { 3807 .type = HDA_FIXUP_PINS, 3808 .v.pins = d965_5st_no_fp_pin_configs, 3809 }, 3810 [STAC_DELL_3ST] = { 3811 .type = HDA_FIXUP_PINS, 3812 .v.pins = dell_3st_pin_configs, 3813 .chained = true, 3814 .chain_id = STAC_927X_DELL_DMIC, 3815 }, 3816 [STAC_DELL_BIOS] = { 3817 .type = HDA_FIXUP_PINS, 3818 .v.pins = (const struct hda_pintbl[]) { 3819 /* correct the front output jack as a hp out */ 3820 { 0x0f, 0x0221101f }, 3821 /* correct the front input jack as a mic */ 3822 { 0x0e, 0x02a79130 }, 3823 {} 3824 }, 3825 .chained = true, 3826 .chain_id = STAC_927X_DELL_DMIC, 3827 }, 3828 [STAC_DELL_BIOS_AMIC] = { 3829 .type = HDA_FIXUP_PINS, 3830 .v.pins = (const struct hda_pintbl[]) { 3831 /* configure the analog microphone on some laptops */ 3832 { 0x0c, 0x90a79130 }, 3833 {} 3834 }, 3835 .chained = true, 3836 .chain_id = STAC_DELL_BIOS, 3837 }, 3838 [STAC_DELL_BIOS_SPDIF] = { 3839 .type = HDA_FIXUP_PINS, 3840 .v.pins = (const struct hda_pintbl[]) { 3841 /* correct the device field to SPDIF out */ 3842 { 0x21, 0x01442070 }, 3843 {} 3844 }, 3845 .chained = true, 3846 .chain_id = STAC_DELL_BIOS, 3847 }, 3848 [STAC_927X_DELL_DMIC] = { 3849 .type = HDA_FIXUP_FUNC, 3850 .v.func = stac927x_fixup_dell_dmic, 3851 }, 3852 [STAC_927X_VOLKNOB] = { 3853 .type = HDA_FIXUP_FUNC, 3854 .v.func = stac927x_fixup_volknob, 3855 }, 3856 }; 3857 3858 static const struct hda_model_fixup stac927x_models[] = { 3859 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3860 { .id = STAC_D965_REF, .name = "ref" }, 3861 { .id = STAC_D965_3ST, .name = "3stack" }, 3862 { .id = STAC_D965_5ST, .name = "5stack" }, 3863 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3864 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3865 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3866 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3867 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3868 {} 3869 }; 3870 3871 static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3872 /* SigmaTel reference board */ 3873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3874 "DFI LanParty", STAC_D965_REF), 3875 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3876 "DFI LanParty", STAC_D965_REF), 3877 /* Intel 946 based systems */ 3878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3880 /* 965 based 3 stack systems */ 3881 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3882 "Intel D965", STAC_D965_3ST), 3883 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3884 "Intel D965", STAC_D965_3ST), 3885 /* Dell 3 stack systems */ 3886 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3887 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3888 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3889 /* Dell 3 stack systems with verb table in BIOS */ 3890 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3891 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3892 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3893 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3894 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 3898 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 3899 /* 965 based 5 stack systems */ 3900 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 3901 "Intel D965", STAC_D965_5ST), 3902 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 3903 "Intel D965", STAC_D965_5ST), 3904 /* volume-knob fixes */ 3905 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 3906 {} /* terminator */ 3907 }; 3908 3909 static const struct hda_pintbl ref9205_pin_configs[] = { 3910 { 0x0a, 0x40000100 }, 3911 { 0x0b, 0x40000100 }, 3912 { 0x0c, 0x01016011 }, 3913 { 0x0d, 0x01014010 }, 3914 { 0x0e, 0x01813122 }, 3915 { 0x0f, 0x01a19021 }, 3916 { 0x14, 0x01019020 }, 3917 { 0x16, 0x40000100 }, 3918 { 0x17, 0x90a000f0 }, 3919 { 0x18, 0x90a000f0 }, 3920 { 0x21, 0x01441030 }, 3921 { 0x22, 0x01c41030 }, 3922 {} 3923 }; 3924 3925 /* 3926 STAC 9205 pin configs for 3927 102801F1 3928 102801F2 3929 102801FC 3930 102801FD 3931 10280204 3932 1028021F 3933 10280228 (Dell Vostro 1500) 3934 10280229 (Dell Vostro 1700) 3935 */ 3936 static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 3937 { 0x0a, 0x0321101F }, 3938 { 0x0b, 0x03A11020 }, 3939 { 0x0c, 0x400003FA }, 3940 { 0x0d, 0x90170310 }, 3941 { 0x0e, 0x400003FB }, 3942 { 0x0f, 0x400003FC }, 3943 { 0x14, 0x400003FD }, 3944 { 0x16, 0x40F000F9 }, 3945 { 0x17, 0x90A60330 }, 3946 { 0x18, 0x400003FF }, 3947 { 0x21, 0x0144131F }, 3948 { 0x22, 0x40C003FE }, 3949 {} 3950 }; 3951 3952 /* 3953 STAC 9205 pin configs for 3954 102801F9 3955 102801FA 3956 102801FE 3957 102801FF (Dell Precision M4300) 3958 10280206 3959 10280200 3960 10280201 3961 */ 3962 static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 3963 { 0x0a, 0x0321101f }, 3964 { 0x0b, 0x03a11020 }, 3965 { 0x0c, 0x90a70330 }, 3966 { 0x0d, 0x90170310 }, 3967 { 0x0e, 0x400000fe }, 3968 { 0x0f, 0x400000ff }, 3969 { 0x14, 0x400000fd }, 3970 { 0x16, 0x40f000f9 }, 3971 { 0x17, 0x400000fa }, 3972 { 0x18, 0x400000fc }, 3973 { 0x21, 0x0144131f }, 3974 { 0x22, 0x40c003f8 }, 3975 /* Enable SPDIF in/out */ 3976 { 0x1f, 0x01441030 }, 3977 { 0x20, 0x1c410030 }, 3978 {} 3979 }; 3980 3981 static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 3982 { 0x0a, 0x0421101f }, 3983 { 0x0b, 0x04a11020 }, 3984 { 0x0c, 0x400003fa }, 3985 { 0x0d, 0x90170310 }, 3986 { 0x0e, 0x400003fb }, 3987 { 0x0f, 0x400003fc }, 3988 { 0x14, 0x400003fd }, 3989 { 0x16, 0x400003f9 }, 3990 { 0x17, 0x90a60330 }, 3991 { 0x18, 0x400003ff }, 3992 { 0x21, 0x01441340 }, 3993 { 0x22, 0x40c003fe }, 3994 {} 3995 }; 3996 3997 static void stac9205_fixup_ref(struct hda_codec *codec, 3998 const struct hda_fixup *fix, int action) 3999 { 4000 struct sigmatel_spec *spec = codec->spec; 4001 4002 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4003 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 4004 /* SPDIF-In enabled */ 4005 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 4006 } 4007 } 4008 4009 static void stac9205_fixup_dell_m43(struct hda_codec *codec, 4010 const struct hda_fixup *fix, int action) 4011 { 4012 struct sigmatel_spec *spec = codec->spec; 4013 struct hda_jack_callback *jack; 4014 4015 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4016 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 4017 4018 /* Enable unsol response for GPIO4/Dock HP connection */ 4019 snd_hda_codec_write_cache(codec, codec->afg, 0, 4020 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 4021 jack = snd_hda_jack_detect_enable_callback(codec, codec->afg, 4022 stac_vref_event); 4023 if (!IS_ERR(jack)) 4024 jack->private_data = 0x01; 4025 4026 spec->gpio_dir = 0x0b; 4027 spec->eapd_mask = 0x01; 4028 spec->gpio_mask = 0x1b; 4029 spec->gpio_mute = 0x10; 4030 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 4031 * GPIO3 Low = DRM 4032 */ 4033 spec->gpio_data = 0x01; 4034 } 4035 } 4036 4037 static void stac9205_fixup_eapd(struct hda_codec *codec, 4038 const struct hda_fixup *fix, int action) 4039 { 4040 struct sigmatel_spec *spec = codec->spec; 4041 4042 if (action == HDA_FIXUP_ACT_PRE_PROBE) 4043 spec->eapd_switch = 0; 4044 } 4045 4046 static const struct hda_fixup stac9205_fixups[] = { 4047 [STAC_9205_REF] = { 4048 .type = HDA_FIXUP_FUNC, 4049 .v.func = stac9205_fixup_ref, 4050 }, 4051 [STAC_9205_DELL_M42] = { 4052 .type = HDA_FIXUP_PINS, 4053 .v.pins = dell_9205_m42_pin_configs, 4054 }, 4055 [STAC_9205_DELL_M43] = { 4056 .type = HDA_FIXUP_FUNC, 4057 .v.func = stac9205_fixup_dell_m43, 4058 }, 4059 [STAC_9205_DELL_M44] = { 4060 .type = HDA_FIXUP_PINS, 4061 .v.pins = dell_9205_m44_pin_configs, 4062 }, 4063 [STAC_9205_EAPD] = { 4064 .type = HDA_FIXUP_FUNC, 4065 .v.func = stac9205_fixup_eapd, 4066 }, 4067 {} 4068 }; 4069 4070 static const struct hda_model_fixup stac9205_models[] = { 4071 { .id = STAC_9205_REF, .name = "ref" }, 4072 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 4073 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 4074 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 4075 { .id = STAC_9205_EAPD, .name = "eapd" }, 4076 {} 4077 }; 4078 4079 static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 4080 /* SigmaTel reference board */ 4081 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 4082 "DFI LanParty", STAC_9205_REF), 4083 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 4084 "SigmaTel", STAC_9205_REF), 4085 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 4086 "DFI LanParty", STAC_9205_REF), 4087 /* Dell */ 4088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 4089 "unknown Dell", STAC_9205_DELL_M42), 4090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 4091 "unknown Dell", STAC_9205_DELL_M42), 4092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 4093 "Dell Precision", STAC_9205_DELL_M43), 4094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 4095 "Dell Precision", STAC_9205_DELL_M43), 4096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 4097 "Dell Precision", STAC_9205_DELL_M43), 4098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 4099 "unknown Dell", STAC_9205_DELL_M42), 4100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 4101 "unknown Dell", STAC_9205_DELL_M42), 4102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 4103 "Dell Precision", STAC_9205_DELL_M43), 4104 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 4105 "Dell Precision M4300", STAC_9205_DELL_M43), 4106 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 4107 "unknown Dell", STAC_9205_DELL_M42), 4108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 4109 "Dell Precision", STAC_9205_DELL_M43), 4110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 4111 "Dell Precision", STAC_9205_DELL_M43), 4112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 4113 "Dell Precision", STAC_9205_DELL_M43), 4114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 4115 "Dell Inspiron", STAC_9205_DELL_M44), 4116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 4117 "Dell Vostro 1500", STAC_9205_DELL_M42), 4118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 4119 "Dell Vostro 1700", STAC_9205_DELL_M42), 4120 /* Gateway */ 4121 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 4122 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 4123 {} /* terminator */ 4124 }; 4125 4126 static void stac92hd95_fixup_hp_led(struct hda_codec *codec, 4127 const struct hda_fixup *fix, int action) 4128 { 4129 struct sigmatel_spec *spec = codec->spec; 4130 4131 if (action != HDA_FIXUP_ACT_PRE_PROBE) 4132 return; 4133 4134 if (find_mute_led_cfg(codec, spec->default_polarity)) 4135 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 4136 spec->gpio_led, 4137 spec->gpio_led_polarity); 4138 } 4139 4140 static const struct hda_fixup stac92hd95_fixups[] = { 4141 [STAC_92HD95_HP_LED] = { 4142 .type = HDA_FIXUP_FUNC, 4143 .v.func = stac92hd95_fixup_hp_led, 4144 }, 4145 [STAC_92HD95_HP_BASS] = { 4146 .type = HDA_FIXUP_VERBS, 4147 .v.verbs = (const struct hda_verb[]) { 4148 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */ 4149 {} 4150 }, 4151 .chained = true, 4152 .chain_id = STAC_92HD95_HP_LED, 4153 }, 4154 }; 4155 4156 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { 4157 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), 4158 {} /* terminator */ 4159 }; 4160 4161 static const struct hda_model_fixup stac92hd95_models[] = { 4162 { .id = STAC_92HD95_HP_LED, .name = "hp-led" }, 4163 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" }, 4164 {} 4165 }; 4166 4167 4168 static int stac_parse_auto_config(struct hda_codec *codec) 4169 { 4170 struct sigmatel_spec *spec = codec->spec; 4171 int err; 4172 int flags = 0; 4173 4174 if (spec->headset_jack) 4175 flags |= HDA_PINCFG_HEADSET_MIC; 4176 4177 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 4178 if (err < 0) 4179 return err; 4180 4181 /* add hooks */ 4182 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 4183 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 4184 4185 spec->gen.automute_hook = stac_update_outputs; 4186 4187 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 4188 if (err < 0) 4189 return err; 4190 4191 /* setup analog beep controls */ 4192 if (spec->anabeep_nid > 0) { 4193 err = stac_auto_create_beep_ctls(codec, 4194 spec->anabeep_nid); 4195 if (err < 0) 4196 return err; 4197 } 4198 4199 /* setup digital beep controls and input device */ 4200 #ifdef CONFIG_SND_HDA_INPUT_BEEP 4201 if (spec->gen.beep_nid) { 4202 hda_nid_t nid = spec->gen.beep_nid; 4203 unsigned int caps; 4204 4205 err = stac_auto_create_beep_ctls(codec, nid); 4206 if (err < 0) 4207 return err; 4208 if (codec->beep) { 4209 /* IDT/STAC codecs have linear beep tone parameter */ 4210 codec->beep->linear_tone = spec->linear_tone_beep; 4211 /* if no beep switch is available, make its own one */ 4212 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 4213 if (!(caps & AC_AMPCAP_MUTE)) { 4214 err = stac_beep_switch_ctl(codec); 4215 if (err < 0) 4216 return err; 4217 } 4218 } 4219 } 4220 #endif 4221 4222 if (spec->gpio_led) 4223 spec->gen.vmaster_mute.hook = stac_vmaster_hook; 4224 4225 if (spec->aloopback_ctl && 4226 snd_hda_get_bool_hint(codec, "loopback") == 1) { 4227 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 4228 return -ENOMEM; 4229 } 4230 4231 if (spec->have_spdif_mux) { 4232 err = stac_create_spdif_mux_ctls(codec); 4233 if (err < 0) 4234 return err; 4235 } 4236 4237 stac_init_power_map(codec); 4238 4239 return 0; 4240 } 4241 4242 static int stac_init(struct hda_codec *codec) 4243 { 4244 struct sigmatel_spec *spec = codec->spec; 4245 int i; 4246 4247 /* override some hints */ 4248 stac_store_hints(codec); 4249 4250 /* set up GPIO */ 4251 /* turn on EAPD statically when spec->eapd_switch isn't set. 4252 * otherwise, unsol event will turn it on/off dynamically 4253 */ 4254 if (!spec->eapd_switch) 4255 spec->gpio_data |= spec->eapd_mask; 4256 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 4257 4258 snd_hda_gen_init(codec); 4259 4260 /* sync the power-map */ 4261 if (spec->num_pwrs) 4262 snd_hda_codec_write(codec, codec->afg, 0, 4263 AC_VERB_IDT_SET_POWER_MAP, 4264 spec->power_map_bits); 4265 4266 /* power down inactive ADCs */ 4267 if (spec->powerdown_adcs) { 4268 for (i = 0; i < spec->gen.num_all_adcs; i++) { 4269 if (spec->active_adcs & (1 << i)) 4270 continue; 4271 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 4272 AC_VERB_SET_POWER_STATE, 4273 AC_PWRST_D3); 4274 } 4275 } 4276 4277 return 0; 4278 } 4279 4280 static void stac_shutup(struct hda_codec *codec) 4281 { 4282 struct sigmatel_spec *spec = codec->spec; 4283 4284 snd_hda_shutup_pins(codec); 4285 4286 if (spec->eapd_mask) 4287 stac_gpio_set(codec, spec->gpio_mask, 4288 spec->gpio_dir, spec->gpio_data & 4289 ~spec->eapd_mask); 4290 } 4291 4292 #define stac_free snd_hda_gen_free 4293 4294 #ifdef CONFIG_PROC_FS 4295 static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 4296 struct hda_codec *codec, hda_nid_t nid) 4297 { 4298 if (nid == codec->afg) 4299 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 4300 snd_hda_codec_read(codec, nid, 0, 4301 AC_VERB_IDT_GET_POWER_MAP, 0)); 4302 } 4303 4304 static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 4305 struct hda_codec *codec, 4306 unsigned int verb) 4307 { 4308 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 4309 snd_hda_codec_read(codec, codec->afg, 0, verb, 0)); 4310 } 4311 4312 /* stac92hd71bxx, stac92hd73xx */ 4313 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 4314 struct hda_codec *codec, hda_nid_t nid) 4315 { 4316 stac92hd_proc_hook(buffer, codec, nid); 4317 if (nid == codec->afg) 4318 analog_loop_proc_hook(buffer, codec, 0xfa0); 4319 } 4320 4321 static void stac9205_proc_hook(struct snd_info_buffer *buffer, 4322 struct hda_codec *codec, hda_nid_t nid) 4323 { 4324 if (nid == codec->afg) 4325 analog_loop_proc_hook(buffer, codec, 0xfe0); 4326 } 4327 4328 static void stac927x_proc_hook(struct snd_info_buffer *buffer, 4329 struct hda_codec *codec, hda_nid_t nid) 4330 { 4331 if (nid == codec->afg) 4332 analog_loop_proc_hook(buffer, codec, 0xfeb); 4333 } 4334 #else 4335 #define stac92hd_proc_hook NULL 4336 #define stac92hd7x_proc_hook NULL 4337 #define stac9205_proc_hook NULL 4338 #define stac927x_proc_hook NULL 4339 #endif 4340 4341 #ifdef CONFIG_PM 4342 static int stac_suspend(struct hda_codec *codec) 4343 { 4344 stac_shutup(codec); 4345 return 0; 4346 } 4347 #else 4348 #define stac_suspend NULL 4349 #endif /* CONFIG_PM */ 4350 4351 static const struct hda_codec_ops stac_patch_ops = { 4352 .build_controls = snd_hda_gen_build_controls, 4353 .build_pcms = snd_hda_gen_build_pcms, 4354 .init = stac_init, 4355 .free = stac_free, 4356 .unsol_event = snd_hda_jack_unsol_event, 4357 #ifdef CONFIG_PM 4358 .suspend = stac_suspend, 4359 #endif 4360 .reboot_notify = stac_shutup, 4361 }; 4362 4363 static int alloc_stac_spec(struct hda_codec *codec) 4364 { 4365 struct sigmatel_spec *spec; 4366 4367 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 4368 if (!spec) 4369 return -ENOMEM; 4370 snd_hda_gen_spec_init(&spec->gen); 4371 codec->spec = spec; 4372 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 4373 spec->gen.dac_min_mute = true; 4374 return 0; 4375 } 4376 4377 static int patch_stac9200(struct hda_codec *codec) 4378 { 4379 struct sigmatel_spec *spec; 4380 int err; 4381 4382 err = alloc_stac_spec(codec); 4383 if (err < 0) 4384 return err; 4385 4386 spec = codec->spec; 4387 spec->linear_tone_beep = 1; 4388 spec->gen.own_eapd_ctl = 1; 4389 4390 codec->patch_ops = stac_patch_ops; 4391 codec->power_filter = snd_hda_codec_eapd_power_filter; 4392 4393 snd_hda_add_verbs(codec, stac9200_eapd_init); 4394 4395 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 4396 stac9200_fixups); 4397 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4398 4399 err = stac_parse_auto_config(codec); 4400 if (err < 0) { 4401 stac_free(codec); 4402 return err; 4403 } 4404 4405 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4406 4407 return 0; 4408 } 4409 4410 static int patch_stac925x(struct hda_codec *codec) 4411 { 4412 struct sigmatel_spec *spec; 4413 int err; 4414 4415 err = alloc_stac_spec(codec); 4416 if (err < 0) 4417 return err; 4418 4419 spec = codec->spec; 4420 spec->linear_tone_beep = 1; 4421 spec->gen.own_eapd_ctl = 1; 4422 4423 codec->patch_ops = stac_patch_ops; 4424 4425 snd_hda_add_verbs(codec, stac925x_core_init); 4426 4427 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 4428 stac925x_fixups); 4429 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4430 4431 err = stac_parse_auto_config(codec); 4432 if (err < 0) { 4433 stac_free(codec); 4434 return err; 4435 } 4436 4437 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4438 4439 return 0; 4440 } 4441 4442 static int patch_stac92hd73xx(struct hda_codec *codec) 4443 { 4444 struct sigmatel_spec *spec; 4445 int err; 4446 int num_dacs; 4447 4448 err = alloc_stac_spec(codec); 4449 if (err < 0) 4450 return err; 4451 4452 spec = codec->spec; 4453 spec->linear_tone_beep = 0; 4454 spec->gen.mixer_nid = 0x1d; 4455 spec->have_spdif_mux = 1; 4456 4457 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 4458 if (num_dacs < 3 || num_dacs > 5) { 4459 codec_warn(codec, 4460 "Could not determine number of channels defaulting to DAC count\n"); 4461 num_dacs = 5; 4462 } 4463 4464 switch (num_dacs) { 4465 case 0x3: /* 6 Channel */ 4466 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 4467 break; 4468 case 0x4: /* 8 Channel */ 4469 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 4470 break; 4471 case 0x5: /* 10 Channel */ 4472 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 4473 break; 4474 } 4475 4476 spec->aloopback_mask = 0x01; 4477 spec->aloopback_shift = 8; 4478 4479 spec->gen.beep_nid = 0x1c; /* digital beep */ 4480 4481 /* GPIO0 High = Enable EAPD */ 4482 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4483 spec->gpio_data = 0x01; 4484 4485 spec->eapd_switch = 1; 4486 4487 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 4488 spec->pwr_nids = stac92hd73xx_pwr_nids; 4489 4490 spec->gen.own_eapd_ctl = 1; 4491 spec->gen.power_down_unused = 1; 4492 4493 codec->patch_ops = stac_patch_ops; 4494 4495 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 4496 stac92hd73xx_fixups); 4497 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4498 4499 if (!spec->volknob_init) 4500 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 4501 4502 err = stac_parse_auto_config(codec); 4503 if (err < 0) { 4504 stac_free(codec); 4505 return err; 4506 } 4507 4508 /* Don't GPIO-mute speakers if there are no internal speakers, because 4509 * the GPIO might be necessary for Headphone 4510 */ 4511 if (spec->eapd_switch && !has_builtin_speaker(codec)) 4512 spec->eapd_switch = 0; 4513 4514 codec->proc_widget_hook = stac92hd7x_proc_hook; 4515 4516 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4517 4518 return 0; 4519 } 4520 4521 static void stac_setup_gpio(struct hda_codec *codec) 4522 { 4523 struct sigmatel_spec *spec = codec->spec; 4524 4525 spec->gpio_mask |= spec->eapd_mask; 4526 if (spec->gpio_led) { 4527 if (!spec->vref_mute_led_nid) { 4528 spec->gpio_mask |= spec->gpio_led; 4529 spec->gpio_dir |= spec->gpio_led; 4530 spec->gpio_data |= spec->gpio_led; 4531 } else { 4532 codec->power_filter = stac_vref_led_power_filter; 4533 } 4534 } 4535 4536 if (spec->mic_mute_led_gpio) { 4537 spec->gpio_mask |= spec->mic_mute_led_gpio; 4538 spec->gpio_dir |= spec->mic_mute_led_gpio; 4539 spec->mic_enabled = 0; 4540 spec->gpio_data |= spec->mic_mute_led_gpio; 4541 4542 spec->gen.cap_sync_hook = stac_capture_led_hook; 4543 } 4544 } 4545 4546 static int patch_stac92hd83xxx(struct hda_codec *codec) 4547 { 4548 struct sigmatel_spec *spec; 4549 int err; 4550 4551 err = alloc_stac_spec(codec); 4552 if (err < 0) 4553 return err; 4554 4555 codec->epss = 0; /* longer delay needed for D3 */ 4556 4557 spec = codec->spec; 4558 spec->linear_tone_beep = 0; 4559 spec->gen.own_eapd_ctl = 1; 4560 spec->gen.power_down_unused = 1; 4561 spec->gen.mixer_nid = 0x1b; 4562 4563 spec->gen.beep_nid = 0x21; /* digital beep */ 4564 spec->pwr_nids = stac92hd83xxx_pwr_nids; 4565 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 4566 spec->default_polarity = -1; /* no default cfg */ 4567 4568 codec->patch_ops = stac_patch_ops; 4569 4570 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 4571 4572 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 4573 stac92hd83xxx_fixups); 4574 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4575 4576 stac_setup_gpio(codec); 4577 4578 err = stac_parse_auto_config(codec); 4579 if (err < 0) { 4580 stac_free(codec); 4581 return err; 4582 } 4583 4584 codec->proc_widget_hook = stac92hd_proc_hook; 4585 4586 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4587 4588 return 0; 4589 } 4590 4591 static const hda_nid_t stac92hd95_pwr_nids[] = { 4592 0x0a, 0x0b, 0x0c, 0x0d 4593 }; 4594 4595 static int patch_stac92hd95(struct hda_codec *codec) 4596 { 4597 struct sigmatel_spec *spec; 4598 int err; 4599 4600 err = alloc_stac_spec(codec); 4601 if (err < 0) 4602 return err; 4603 4604 codec->epss = 0; /* longer delay needed for D3 */ 4605 4606 spec = codec->spec; 4607 spec->linear_tone_beep = 0; 4608 spec->gen.own_eapd_ctl = 1; 4609 spec->gen.power_down_unused = 1; 4610 4611 spec->gen.beep_nid = 0x19; /* digital beep */ 4612 spec->pwr_nids = stac92hd95_pwr_nids; 4613 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4614 spec->default_polarity = 0; 4615 4616 codec->patch_ops = stac_patch_ops; 4617 4618 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl, 4619 stac92hd95_fixups); 4620 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4621 4622 stac_setup_gpio(codec); 4623 4624 err = stac_parse_auto_config(codec); 4625 if (err < 0) { 4626 stac_free(codec); 4627 return err; 4628 } 4629 4630 codec->proc_widget_hook = stac92hd_proc_hook; 4631 4632 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4633 4634 return 0; 4635 } 4636 4637 static int patch_stac92hd71bxx(struct hda_codec *codec) 4638 { 4639 struct sigmatel_spec *spec; 4640 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; 4641 int err; 4642 4643 err = alloc_stac_spec(codec); 4644 if (err < 0) 4645 return err; 4646 4647 spec = codec->spec; 4648 spec->linear_tone_beep = 0; 4649 spec->gen.own_eapd_ctl = 1; 4650 spec->gen.power_down_unused = 1; 4651 spec->gen.mixer_nid = 0x17; 4652 spec->have_spdif_mux = 1; 4653 4654 codec->patch_ops = stac_patch_ops; 4655 4656 /* GPIO0 = EAPD */ 4657 spec->gpio_mask = 0x01; 4658 spec->gpio_dir = 0x01; 4659 spec->gpio_data = 0x01; 4660 4661 switch (codec->vendor_id) { 4662 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4663 case 0x111d76b7: 4664 unmute_init++; 4665 break; 4666 case 0x111d7608: /* 5 Port with Analog Mixer */ 4667 if ((codec->revision_id & 0xf) == 0 || 4668 (codec->revision_id & 0xf) == 1) 4669 spec->stream_delay = 40; /* 40 milliseconds */ 4670 4671 /* disable VSW */ 4672 unmute_init++; 4673 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4674 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4675 break; 4676 case 0x111d7603: /* 6 Port with Analog Mixer */ 4677 if ((codec->revision_id & 0xf) == 1) 4678 spec->stream_delay = 40; /* 40 milliseconds */ 4679 4680 break; 4681 } 4682 4683 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4684 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4685 4686 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) 4687 snd_hda_sequence_write_cache(codec, unmute_init); 4688 4689 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4690 spec->aloopback_mask = 0x50; 4691 spec->aloopback_shift = 0; 4692 4693 spec->powerdown_adcs = 1; 4694 spec->gen.beep_nid = 0x26; /* digital beep */ 4695 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4696 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4697 4698 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4699 stac92hd71bxx_fixups); 4700 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4701 4702 stac_setup_gpio(codec); 4703 4704 err = stac_parse_auto_config(codec); 4705 if (err < 0) { 4706 stac_free(codec); 4707 return err; 4708 } 4709 4710 codec->proc_widget_hook = stac92hd7x_proc_hook; 4711 4712 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4713 4714 return 0; 4715 } 4716 4717 static int patch_stac922x(struct hda_codec *codec) 4718 { 4719 struct sigmatel_spec *spec; 4720 int err; 4721 4722 err = alloc_stac_spec(codec); 4723 if (err < 0) 4724 return err; 4725 4726 spec = codec->spec; 4727 spec->linear_tone_beep = 1; 4728 spec->gen.own_eapd_ctl = 1; 4729 4730 codec->patch_ops = stac_patch_ops; 4731 4732 snd_hda_add_verbs(codec, stac922x_core_init); 4733 4734 /* Fix Mux capture level; max to 2 */ 4735 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4736 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4737 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4738 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4739 (0 << AC_AMPCAP_MUTE_SHIFT)); 4740 4741 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4742 stac922x_fixups); 4743 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4744 4745 err = stac_parse_auto_config(codec); 4746 if (err < 0) { 4747 stac_free(codec); 4748 return err; 4749 } 4750 4751 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4752 4753 return 0; 4754 } 4755 4756 static const char * const stac927x_spdif_labels[] = { 4757 "Digital Playback", "ADAT", "Analog Mux 1", 4758 "Analog Mux 2", "Analog Mux 3", NULL 4759 }; 4760 4761 static int patch_stac927x(struct hda_codec *codec) 4762 { 4763 struct sigmatel_spec *spec; 4764 int err; 4765 4766 err = alloc_stac_spec(codec); 4767 if (err < 0) 4768 return err; 4769 4770 spec = codec->spec; 4771 spec->linear_tone_beep = 1; 4772 spec->gen.own_eapd_ctl = 1; 4773 spec->have_spdif_mux = 1; 4774 spec->spdif_labels = stac927x_spdif_labels; 4775 4776 spec->gen.beep_nid = 0x23; /* digital beep */ 4777 4778 /* GPIO0 High = Enable EAPD */ 4779 spec->eapd_mask = spec->gpio_mask = 0x01; 4780 spec->gpio_dir = spec->gpio_data = 0x01; 4781 4782 spec->aloopback_ctl = &stac927x_loopback; 4783 spec->aloopback_mask = 0x40; 4784 spec->aloopback_shift = 0; 4785 spec->eapd_switch = 1; 4786 4787 codec->patch_ops = stac_patch_ops; 4788 4789 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4790 stac927x_fixups); 4791 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4792 4793 if (!spec->volknob_init) 4794 snd_hda_add_verbs(codec, stac927x_core_init); 4795 4796 err = stac_parse_auto_config(codec); 4797 if (err < 0) { 4798 stac_free(codec); 4799 return err; 4800 } 4801 4802 codec->proc_widget_hook = stac927x_proc_hook; 4803 4804 /* 4805 * !!FIXME!! 4806 * The STAC927x seem to require fairly long delays for certain 4807 * command sequences. With too short delays (even if the answer 4808 * is set to RIRB properly), it results in the silence output 4809 * on some hardwares like Dell. 4810 * 4811 * The below flag enables the longer delay (see get_response 4812 * in hda_intel.c). 4813 */ 4814 codec->bus->needs_damn_long_delay = 1; 4815 4816 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4817 4818 return 0; 4819 } 4820 4821 static int patch_stac9205(struct hda_codec *codec) 4822 { 4823 struct sigmatel_spec *spec; 4824 int err; 4825 4826 err = alloc_stac_spec(codec); 4827 if (err < 0) 4828 return err; 4829 4830 spec = codec->spec; 4831 spec->linear_tone_beep = 1; 4832 spec->gen.own_eapd_ctl = 1; 4833 spec->have_spdif_mux = 1; 4834 4835 spec->gen.beep_nid = 0x23; /* digital beep */ 4836 4837 snd_hda_add_verbs(codec, stac9205_core_init); 4838 spec->aloopback_ctl = &stac9205_loopback; 4839 4840 spec->aloopback_mask = 0x40; 4841 spec->aloopback_shift = 0; 4842 4843 /* GPIO0 High = EAPD */ 4844 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4845 spec->gpio_data = 0x01; 4846 4847 /* Turn on/off EAPD per HP plugging */ 4848 spec->eapd_switch = 1; 4849 4850 codec->patch_ops = stac_patch_ops; 4851 4852 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4853 stac9205_fixups); 4854 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4855 4856 err = stac_parse_auto_config(codec); 4857 if (err < 0) { 4858 stac_free(codec); 4859 return err; 4860 } 4861 4862 codec->proc_widget_hook = stac9205_proc_hook; 4863 4864 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4865 4866 return 0; 4867 } 4868 4869 /* 4870 * STAC9872 hack 4871 */ 4872 4873 static const struct hda_verb stac9872_core_init[] = { 4874 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4875 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4876 {} 4877 }; 4878 4879 static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4880 { 0x0a, 0x03211020 }, 4881 { 0x0b, 0x411111f0 }, 4882 { 0x0c, 0x411111f0 }, 4883 { 0x0d, 0x03a15030 }, 4884 { 0x0e, 0x411111f0 }, 4885 { 0x0f, 0x90170110 }, 4886 { 0x11, 0x411111f0 }, 4887 { 0x13, 0x411111f0 }, 4888 { 0x14, 0x90a7013e }, 4889 {} 4890 }; 4891 4892 static const struct hda_model_fixup stac9872_models[] = { 4893 { .id = STAC_9872_VAIO, .name = "vaio" }, 4894 {} 4895 }; 4896 4897 static const struct hda_fixup stac9872_fixups[] = { 4898 [STAC_9872_VAIO] = { 4899 .type = HDA_FIXUP_PINS, 4900 .v.pins = stac9872_vaio_pin_configs, 4901 }, 4902 }; 4903 4904 static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 4905 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 4906 "Sony VAIO F/S", STAC_9872_VAIO), 4907 {} /* terminator */ 4908 }; 4909 4910 static int patch_stac9872(struct hda_codec *codec) 4911 { 4912 struct sigmatel_spec *spec; 4913 int err; 4914 4915 err = alloc_stac_spec(codec); 4916 if (err < 0) 4917 return err; 4918 4919 spec = codec->spec; 4920 spec->linear_tone_beep = 1; 4921 spec->gen.own_eapd_ctl = 1; 4922 4923 codec->patch_ops = stac_patch_ops; 4924 4925 snd_hda_add_verbs(codec, stac9872_core_init); 4926 4927 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 4928 stac9872_fixups); 4929 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4930 4931 err = stac_parse_auto_config(codec); 4932 if (err < 0) { 4933 stac_free(codec); 4934 return -EINVAL; 4935 } 4936 4937 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4938 4939 return 0; 4940 } 4941 4942 4943 /* 4944 * patch entries 4945 */ 4946 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = { 4947 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, 4948 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, 4949 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, 4950 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, 4951 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, 4952 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, 4953 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, 4954 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, 4955 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, 4956 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, 4957 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, 4958 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, 4959 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, 4960 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, 4961 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, 4962 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, 4963 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, 4964 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, 4965 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, 4966 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, 4967 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, 4968 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, 4969 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, 4970 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, 4971 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, 4972 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, 4973 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, 4974 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, 4975 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, 4976 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x }, 4977 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x }, 4978 /* The following does not take into account .id=0x83847661 when subsys = 4979 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 4980 * currently not fully supported. 4981 */ 4982 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, 4983 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, 4984 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, 4985 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 }, 4986 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, 4987 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, 4988 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, 4989 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, 4990 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, 4991 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, 4992 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, 4993 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, 4994 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx}, 4995 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx}, 4996 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx}, 4997 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx}, 4998 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx}, 4999 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx}, 5000 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx}, 5001 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx}, 5002 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx}, 5003 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx}, 5004 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx}, 5005 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx}, 5006 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, 5007 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, 5008 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, 5009 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 }, 5010 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5011 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5012 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5013 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5014 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5015 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5016 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5017 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5018 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx }, 5019 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx }, 5020 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx }, 5021 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx }, 5022 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx }, 5023 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx }, 5024 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx }, 5025 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx }, 5026 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx }, 5027 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx }, 5028 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx }, 5029 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx }, 5030 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx }, 5031 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, 5032 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, 5033 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx}, 5034 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, 5035 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx}, 5036 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx}, 5037 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, 5038 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx}, 5039 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx}, 5040 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx}, 5041 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx}, 5042 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx}, 5043 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx}, 5044 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx}, 5045 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx}, 5046 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx}, 5047 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx}, 5048 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx}, 5049 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx}, 5050 {} /* terminator */ 5051 }; 5052 5053 MODULE_ALIAS("snd-hda-codec-id:8384*"); 5054 MODULE_ALIAS("snd-hda-codec-id:111d*"); 5055 5056 MODULE_LICENSE("GPL"); 5057 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 5058 5059 static struct hda_codec_preset_list sigmatel_list = { 5060 .preset = snd_hda_preset_sigmatel, 5061 .owner = THIS_MODULE, 5062 }; 5063 5064 static int __init patch_sigmatel_init(void) 5065 { 5066 return snd_hda_add_codec_preset(&sigmatel_list); 5067 } 5068 5069 static void __exit patch_sigmatel_exit(void) 5070 { 5071 snd_hda_delete_codec_preset(&sigmatel_list); 5072 } 5073 5074 module_init(patch_sigmatel_init) 5075 module_exit(patch_sigmatel_exit) 5076