1 /* 2 * Universal Interface for Intel High Definition Audio Codec 3 * 4 * HD audio interface patch for SigmaTel STAC92xx 5 * 6 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 7 * Matt Porter <mporter@embeddedalley.com> 8 * 9 * Based on patch_cmedia.c and patch_realtek.c 10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 11 * 12 * This driver is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This driver is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/init.h> 28 #include <linux/delay.h> 29 #include <linux/slab.h> 30 #include <linux/pci.h> 31 #include <linux/dmi.h> 32 #include <linux/module.h> 33 #include <sound/core.h> 34 #include <sound/jack.h> 35 #include <sound/tlv.h> 36 #include "hda_codec.h" 37 #include "hda_local.h" 38 #include "hda_auto_parser.h" 39 #include "hda_beep.h" 40 #include "hda_jack.h" 41 #include "hda_generic.h" 42 43 enum { 44 STAC_VREF_EVENT = 8, 45 STAC_PWR_EVENT, 46 }; 47 48 enum { 49 STAC_REF, 50 STAC_9200_OQO, 51 STAC_9200_DELL_D21, 52 STAC_9200_DELL_D22, 53 STAC_9200_DELL_D23, 54 STAC_9200_DELL_M21, 55 STAC_9200_DELL_M22, 56 STAC_9200_DELL_M23, 57 STAC_9200_DELL_M24, 58 STAC_9200_DELL_M25, 59 STAC_9200_DELL_M26, 60 STAC_9200_DELL_M27, 61 STAC_9200_M4, 62 STAC_9200_M4_2, 63 STAC_9200_PANASONIC, 64 STAC_9200_EAPD_INIT, 65 STAC_9200_MODELS 66 }; 67 68 enum { 69 STAC_9205_REF, 70 STAC_9205_DELL_M42, 71 STAC_9205_DELL_M43, 72 STAC_9205_DELL_M44, 73 STAC_9205_EAPD, 74 STAC_9205_MODELS 75 }; 76 77 enum { 78 STAC_92HD73XX_NO_JD, /* no jack-detection */ 79 STAC_92HD73XX_REF, 80 STAC_92HD73XX_INTEL, 81 STAC_DELL_M6_AMIC, 82 STAC_DELL_M6_DMIC, 83 STAC_DELL_M6_BOTH, 84 STAC_DELL_EQ, 85 STAC_ALIENWARE_M17X, 86 STAC_92HD73XX_MODELS 87 }; 88 89 enum { 90 STAC_92HD83XXX_REF, 91 STAC_92HD83XXX_PWR_REF, 92 STAC_DELL_S14, 93 STAC_DELL_VOSTRO_3500, 94 STAC_92HD83XXX_HP_cNB11_INTQUAD, 95 STAC_HP_DV7_4000, 96 STAC_HP_ZEPHYR, 97 STAC_92HD83XXX_HP_LED, 98 STAC_92HD83XXX_HP_INV_LED, 99 STAC_92HD83XXX_HP_MIC_LED, 100 STAC_92HD83XXX_HEADSET_JACK, 101 STAC_92HD83XXX_HP, 102 STAC_HP_ENVY_BASS, 103 STAC_92HD83XXX_MODELS 104 }; 105 106 enum { 107 STAC_92HD71BXX_REF, 108 STAC_DELL_M4_1, 109 STAC_DELL_M4_2, 110 STAC_DELL_M4_3, 111 STAC_HP_M4, 112 STAC_HP_DV4, 113 STAC_HP_DV5, 114 STAC_HP_HDX, 115 STAC_92HD71BXX_HP, 116 STAC_92HD71BXX_NO_DMIC, 117 STAC_92HD71BXX_NO_SMUX, 118 STAC_92HD71BXX_MODELS 119 }; 120 121 enum { 122 STAC_925x_REF, 123 STAC_M1, 124 STAC_M1_2, 125 STAC_M2, 126 STAC_M2_2, 127 STAC_M3, 128 STAC_M5, 129 STAC_M6, 130 STAC_925x_MODELS 131 }; 132 133 enum { 134 STAC_D945_REF, 135 STAC_D945GTP3, 136 STAC_D945GTP5, 137 STAC_INTEL_MAC_V1, 138 STAC_INTEL_MAC_V2, 139 STAC_INTEL_MAC_V3, 140 STAC_INTEL_MAC_V4, 141 STAC_INTEL_MAC_V5, 142 STAC_INTEL_MAC_AUTO, 143 STAC_ECS_202, 144 STAC_922X_DELL_D81, 145 STAC_922X_DELL_D82, 146 STAC_922X_DELL_M81, 147 STAC_922X_DELL_M82, 148 STAC_922X_INTEL_MAC_GPIO, 149 STAC_922X_MODELS 150 }; 151 152 enum { 153 STAC_D965_REF_NO_JD, /* no jack-detection */ 154 STAC_D965_REF, 155 STAC_D965_3ST, 156 STAC_D965_5ST, 157 STAC_D965_5ST_NO_FP, 158 STAC_D965_VERBS, 159 STAC_DELL_3ST, 160 STAC_DELL_BIOS, 161 STAC_DELL_BIOS_AMIC, 162 STAC_DELL_BIOS_SPDIF, 163 STAC_927X_DELL_DMIC, 164 STAC_927X_VOLKNOB, 165 STAC_927X_MODELS 166 }; 167 168 enum { 169 STAC_9872_VAIO, 170 STAC_9872_MODELS 171 }; 172 173 struct sigmatel_spec { 174 struct hda_gen_spec gen; 175 176 unsigned int eapd_switch: 1; 177 unsigned int linear_tone_beep:1; 178 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 179 unsigned int volknob_init:1; /* special volume-knob initialization */ 180 unsigned int powerdown_adcs:1; 181 unsigned int have_spdif_mux:1; 182 183 /* gpio lines */ 184 unsigned int eapd_mask; 185 unsigned int gpio_mask; 186 unsigned int gpio_dir; 187 unsigned int gpio_data; 188 unsigned int gpio_mute; 189 unsigned int gpio_led; 190 unsigned int gpio_led_polarity; 191 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 192 unsigned int vref_led; 193 int default_polarity; 194 195 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 196 bool mic_mute_led_on; /* current mic mute state */ 197 198 /* stream */ 199 unsigned int stream_delay; 200 201 /* analog loopback */ 202 const struct snd_kcontrol_new *aloopback_ctl; 203 unsigned int aloopback; 204 unsigned char aloopback_mask; 205 unsigned char aloopback_shift; 206 207 /* power management */ 208 unsigned int power_map_bits; 209 unsigned int num_pwrs; 210 const hda_nid_t *pwr_nids; 211 unsigned int active_adcs; 212 213 /* beep widgets */ 214 hda_nid_t anabeep_nid; 215 216 /* SPDIF-out mux */ 217 const char * const *spdif_labels; 218 struct hda_input_mux spdif_mux; 219 unsigned int cur_smux[2]; 220 }; 221 222 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec 223 #define AC_VERB_IDT_GET_POWER_MAP 0xfec 224 225 static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 226 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 227 0x0f, 0x10, 0x11 228 }; 229 230 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 231 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 232 0x0f, 0x10 233 }; 234 235 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 236 0x0a, 0x0d, 0x0f 237 }; 238 239 240 /* 241 * PCM hooks 242 */ 243 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 244 struct hda_codec *codec, 245 struct snd_pcm_substream *substream, 246 int action) 247 { 248 struct sigmatel_spec *spec = codec->spec; 249 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 250 msleep(spec->stream_delay); 251 } 252 253 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 254 struct hda_codec *codec, 255 struct snd_pcm_substream *substream, 256 int action) 257 { 258 struct sigmatel_spec *spec = codec->spec; 259 int i, idx = 0; 260 261 if (!spec->powerdown_adcs) 262 return; 263 264 for (i = 0; i < spec->gen.num_all_adcs; i++) { 265 if (spec->gen.all_adcs[i] == hinfo->nid) { 266 idx = i; 267 break; 268 } 269 } 270 271 switch (action) { 272 case HDA_GEN_PCM_ACT_OPEN: 273 msleep(40); 274 snd_hda_codec_write(codec, hinfo->nid, 0, 275 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 276 spec->active_adcs |= (1 << idx); 277 break; 278 case HDA_GEN_PCM_ACT_CLOSE: 279 snd_hda_codec_write(codec, hinfo->nid, 0, 280 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 281 spec->active_adcs &= ~(1 << idx); 282 break; 283 } 284 } 285 286 /* 287 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 288 * funky external mute control using GPIO pins. 289 */ 290 291 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 292 unsigned int dir_mask, unsigned int data) 293 { 294 unsigned int gpiostate, gpiomask, gpiodir; 295 296 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 297 298 gpiostate = snd_hda_codec_read(codec, codec->afg, 0, 299 AC_VERB_GET_GPIO_DATA, 0); 300 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 301 302 gpiomask = snd_hda_codec_read(codec, codec->afg, 0, 303 AC_VERB_GET_GPIO_MASK, 0); 304 gpiomask |= mask; 305 306 gpiodir = snd_hda_codec_read(codec, codec->afg, 0, 307 AC_VERB_GET_GPIO_DIRECTION, 0); 308 gpiodir |= dir_mask; 309 310 /* Configure GPIOx as CMOS */ 311 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); 312 313 snd_hda_codec_write(codec, codec->afg, 0, 314 AC_VERB_SET_GPIO_MASK, gpiomask); 315 snd_hda_codec_read(codec, codec->afg, 0, 316 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 317 318 msleep(1); 319 320 snd_hda_codec_read(codec, codec->afg, 0, 321 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 322 } 323 324 /* hook for controlling mic-mute LED GPIO */ 325 static void stac_capture_led_hook(struct hda_codec *codec, 326 struct snd_ctl_elem_value *ucontrol) 327 { 328 struct sigmatel_spec *spec = codec->spec; 329 bool mute; 330 331 if (!ucontrol) 332 return; 333 334 mute = !(ucontrol->value.integer.value[0] || 335 ucontrol->value.integer.value[1]); 336 if (spec->mic_mute_led_on != mute) { 337 spec->mic_mute_led_on = mute; 338 if (mute) 339 spec->gpio_data |= spec->mic_mute_led_gpio; 340 else 341 spec->gpio_data &= ~spec->mic_mute_led_gpio; 342 stac_gpio_set(codec, spec->gpio_mask, 343 spec->gpio_dir, spec->gpio_data); 344 } 345 } 346 347 static int stac_vrefout_set(struct hda_codec *codec, 348 hda_nid_t nid, unsigned int new_vref) 349 { 350 int error, pinctl; 351 352 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref); 353 pinctl = snd_hda_codec_read(codec, nid, 0, 354 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 355 356 if (pinctl < 0) 357 return pinctl; 358 359 pinctl &= 0xff; 360 pinctl &= ~AC_PINCTL_VREFEN; 361 pinctl |= (new_vref & AC_PINCTL_VREFEN); 362 363 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 364 if (error < 0) 365 return error; 366 367 return 1; 368 } 369 370 /* update mute-LED accoring to the master switch */ 371 static void stac_update_led_status(struct hda_codec *codec, int enabled) 372 { 373 struct sigmatel_spec *spec = codec->spec; 374 int muted = !enabled; 375 376 if (!spec->gpio_led) 377 return; 378 379 /* LED state is inverted on these systems */ 380 if (spec->gpio_led_polarity) 381 muted = !muted; 382 383 if (!spec->vref_mute_led_nid) { 384 if (muted) 385 spec->gpio_data |= spec->gpio_led; 386 else 387 spec->gpio_data &= ~spec->gpio_led; 388 stac_gpio_set(codec, spec->gpio_mask, 389 spec->gpio_dir, spec->gpio_data); 390 } else { 391 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 392 stac_vrefout_set(codec, spec->vref_mute_led_nid, 393 spec->vref_led); 394 } 395 } 396 397 /* vmaster hook to update mute LED */ 398 static void stac_vmaster_hook(void *private_data, int val) 399 { 400 stac_update_led_status(private_data, val); 401 } 402 403 /* automute hook to handle GPIO mute and EAPD updates */ 404 static void stac_update_outputs(struct hda_codec *codec) 405 { 406 struct sigmatel_spec *spec = codec->spec; 407 408 if (spec->gpio_mute) 409 spec->gen.master_mute = 410 !(snd_hda_codec_read(codec, codec->afg, 0, 411 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 412 413 snd_hda_gen_update_outputs(codec); 414 415 if (spec->eapd_mask && spec->eapd_switch) { 416 unsigned int val = spec->gpio_data; 417 if (spec->gen.speaker_muted) 418 val &= ~spec->eapd_mask; 419 else 420 val |= spec->eapd_mask; 421 if (spec->gpio_data != val) { 422 spec->gpio_data = val; 423 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 424 val); 425 } 426 } 427 } 428 429 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 430 bool enable, bool do_write) 431 { 432 struct sigmatel_spec *spec = codec->spec; 433 unsigned int idx, val; 434 435 for (idx = 0; idx < spec->num_pwrs; idx++) { 436 if (spec->pwr_nids[idx] == nid) 437 break; 438 } 439 if (idx >= spec->num_pwrs) 440 return; 441 442 idx = 1 << idx; 443 444 val = spec->power_map_bits; 445 if (enable) 446 val &= ~idx; 447 else 448 val |= idx; 449 450 /* power down unused output ports */ 451 if (val != spec->power_map_bits) { 452 spec->power_map_bits = val; 453 if (do_write) 454 snd_hda_codec_write(codec, codec->afg, 0, 455 AC_VERB_IDT_SET_POWER_MAP, val); 456 } 457 } 458 459 /* update power bit per jack plug/unplug */ 460 static void jack_update_power(struct hda_codec *codec, 461 struct hda_jack_tbl *jack) 462 { 463 struct sigmatel_spec *spec = codec->spec; 464 int i; 465 466 if (!spec->num_pwrs) 467 return; 468 469 if (jack && jack->nid) { 470 stac_toggle_power_map(codec, jack->nid, 471 snd_hda_jack_detect(codec, jack->nid), 472 true); 473 return; 474 } 475 476 /* update all jacks */ 477 for (i = 0; i < spec->num_pwrs; i++) { 478 hda_nid_t nid = spec->pwr_nids[i]; 479 jack = snd_hda_jack_tbl_get(codec, nid); 480 if (!jack || !jack->action) 481 continue; 482 if (jack->action == STAC_PWR_EVENT || 483 jack->action <= HDA_GEN_LAST_EVENT) 484 stac_toggle_power_map(codec, nid, 485 snd_hda_jack_detect(codec, nid), 486 false); 487 } 488 489 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP, 490 spec->power_map_bits); 491 } 492 493 static void stac_hp_automute(struct hda_codec *codec, 494 struct hda_jack_tbl *jack) 495 { 496 snd_hda_gen_hp_automute(codec, jack); 497 jack_update_power(codec, jack); 498 } 499 500 static void stac_line_automute(struct hda_codec *codec, 501 struct hda_jack_tbl *jack) 502 { 503 snd_hda_gen_line_automute(codec, jack); 504 jack_update_power(codec, jack); 505 } 506 507 static void stac_mic_autoswitch(struct hda_codec *codec, 508 struct hda_jack_tbl *jack) 509 { 510 snd_hda_gen_mic_autoswitch(codec, jack); 511 jack_update_power(codec, jack); 512 } 513 514 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event) 515 { 516 unsigned int data; 517 518 data = snd_hda_codec_read(codec, codec->afg, 0, 519 AC_VERB_GET_GPIO_DATA, 0); 520 /* toggle VREF state based on GPIOx status */ 521 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0, 522 !!(data & (1 << event->private_data))); 523 } 524 525 /* initialize the power map and enable the power event to jacks that 526 * haven't been assigned to automute 527 */ 528 static void stac_init_power_map(struct hda_codec *codec) 529 { 530 struct sigmatel_spec *spec = codec->spec; 531 int i; 532 533 for (i = 0; i < spec->num_pwrs; i++) { 534 hda_nid_t nid = spec->pwr_nids[i]; 535 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 536 def_conf = get_defcfg_connect(def_conf); 537 if (snd_hda_jack_tbl_get(codec, nid)) 538 continue; 539 if (def_conf == AC_JACK_PORT_COMPLEX && 540 !(spec->vref_mute_led_nid == nid || 541 is_jack_detectable(codec, nid))) { 542 snd_hda_jack_detect_enable_callback(codec, nid, 543 STAC_PWR_EVENT, 544 jack_update_power); 545 } else { 546 if (def_conf == AC_JACK_PORT_NONE) 547 stac_toggle_power_map(codec, nid, false, false); 548 else 549 stac_toggle_power_map(codec, nid, true, false); 550 } 551 } 552 } 553 554 /* 555 */ 556 557 static inline bool get_int_hint(struct hda_codec *codec, const char *key, 558 int *valp) 559 { 560 return !snd_hda_get_int_hint(codec, key, valp); 561 } 562 563 /* override some hints from the hwdep entry */ 564 static void stac_store_hints(struct hda_codec *codec) 565 { 566 struct sigmatel_spec *spec = codec->spec; 567 int val; 568 569 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 570 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 571 spec->gpio_mask; 572 } 573 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 574 spec->gpio_mask &= spec->gpio_mask; 575 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 576 spec->gpio_dir &= spec->gpio_mask; 577 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 578 spec->eapd_mask &= spec->gpio_mask; 579 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 580 spec->gpio_mute &= spec->gpio_mask; 581 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 582 if (val >= 0) 583 spec->eapd_switch = val; 584 } 585 586 /* 587 * loopback controls 588 */ 589 590 #define stac_aloopback_info snd_ctl_boolean_mono_info 591 592 static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 593 struct snd_ctl_elem_value *ucontrol) 594 { 595 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 596 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 597 struct sigmatel_spec *spec = codec->spec; 598 599 ucontrol->value.integer.value[0] = !!(spec->aloopback & 600 (spec->aloopback_mask << idx)); 601 return 0; 602 } 603 604 static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 605 struct snd_ctl_elem_value *ucontrol) 606 { 607 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 608 struct sigmatel_spec *spec = codec->spec; 609 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 610 unsigned int dac_mode; 611 unsigned int val, idx_val; 612 613 idx_val = spec->aloopback_mask << idx; 614 if (ucontrol->value.integer.value[0]) 615 val = spec->aloopback | idx_val; 616 else 617 val = spec->aloopback & ~idx_val; 618 if (spec->aloopback == val) 619 return 0; 620 621 spec->aloopback = val; 622 623 /* Only return the bits defined by the shift value of the 624 * first two bytes of the mask 625 */ 626 dac_mode = snd_hda_codec_read(codec, codec->afg, 0, 627 kcontrol->private_value & 0xFFFF, 0x0); 628 dac_mode >>= spec->aloopback_shift; 629 630 if (spec->aloopback & idx_val) { 631 snd_hda_power_up(codec); 632 dac_mode |= idx_val; 633 } else { 634 snd_hda_power_down(codec); 635 dac_mode &= ~idx_val; 636 } 637 638 snd_hda_codec_write_cache(codec, codec->afg, 0, 639 kcontrol->private_value >> 16, dac_mode); 640 641 return 1; 642 } 643 644 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 645 { \ 646 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 647 .name = "Analog Loopback", \ 648 .count = cnt, \ 649 .info = stac_aloopback_info, \ 650 .get = stac_aloopback_get, \ 651 .put = stac_aloopback_put, \ 652 .private_value = verb_read | (verb_write << 16), \ 653 } 654 655 /* 656 * Mute LED handling on HP laptops 657 */ 658 659 /* check whether it's a HP laptop with a docking port */ 660 static bool hp_bnb2011_with_dock(struct hda_codec *codec) 661 { 662 if (codec->vendor_id != 0x111d7605 && 663 codec->vendor_id != 0x111d76d1) 664 return false; 665 666 switch (codec->subsystem_id) { 667 case 0x103c1618: 668 case 0x103c1619: 669 case 0x103c161a: 670 case 0x103c161b: 671 case 0x103c161c: 672 case 0x103c161d: 673 case 0x103c161e: 674 case 0x103c161f: 675 676 case 0x103c162a: 677 case 0x103c162b: 678 679 case 0x103c1630: 680 case 0x103c1631: 681 682 case 0x103c1633: 683 case 0x103c1634: 684 case 0x103c1635: 685 686 case 0x103c3587: 687 case 0x103c3588: 688 case 0x103c3589: 689 case 0x103c358a: 690 691 case 0x103c3667: 692 case 0x103c3668: 693 case 0x103c3669: 694 695 return true; 696 } 697 return false; 698 } 699 700 static bool hp_blike_system(u32 subsystem_id) 701 { 702 switch (subsystem_id) { 703 case 0x103c1520: 704 case 0x103c1521: 705 case 0x103c1523: 706 case 0x103c1524: 707 case 0x103c1525: 708 case 0x103c1722: 709 case 0x103c1723: 710 case 0x103c1724: 711 case 0x103c1725: 712 case 0x103c1726: 713 case 0x103c1727: 714 case 0x103c1728: 715 case 0x103c1729: 716 case 0x103c172a: 717 case 0x103c172b: 718 case 0x103c307e: 719 case 0x103c307f: 720 case 0x103c3080: 721 case 0x103c3081: 722 case 0x103c7007: 723 case 0x103c7008: 724 return true; 725 } 726 return false; 727 } 728 729 static void set_hp_led_gpio(struct hda_codec *codec) 730 { 731 struct sigmatel_spec *spec = codec->spec; 732 unsigned int gpio; 733 734 if (spec->gpio_led) 735 return; 736 737 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP); 738 gpio &= AC_GPIO_IO_COUNT; 739 if (gpio > 3) 740 spec->gpio_led = 0x08; /* GPIO 3 */ 741 else 742 spec->gpio_led = 0x01; /* GPIO 0 */ 743 } 744 745 /* 746 * This method searches for the mute LED GPIO configuration 747 * provided as OEM string in SMBIOS. The format of that string 748 * is HP_Mute_LED_P_G or HP_Mute_LED_P 749 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 750 * that corresponds to the NOT muted state of the master volume 751 * and G is the index of the GPIO to use as the mute LED control (0..9) 752 * If _G portion is missing it is assigned based on the codec ID 753 * 754 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 755 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 756 * 757 * 758 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 759 * SMBIOS - at least the ones I have seen do not have them - which include 760 * my own system (HP Pavilion dv6-1110ax) and my cousin's 761 * HP Pavilion dv9500t CTO. 762 * Need more information on whether it is true across the entire series. 763 * -- kunal 764 */ 765 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 766 { 767 struct sigmatel_spec *spec = codec->spec; 768 const struct dmi_device *dev = NULL; 769 770 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 771 get_int_hint(codec, "gpio_led_polarity", 772 &spec->gpio_led_polarity); 773 return 1; 774 } 775 776 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 777 if (sscanf(dev->name, "HP_Mute_LED_%d_%x", 778 &spec->gpio_led_polarity, 779 &spec->gpio_led) == 2) { 780 unsigned int max_gpio; 781 max_gpio = snd_hda_param_read(codec, codec->afg, 782 AC_PAR_GPIO_CAP); 783 max_gpio &= AC_GPIO_IO_COUNT; 784 if (spec->gpio_led < max_gpio) 785 spec->gpio_led = 1 << spec->gpio_led; 786 else 787 spec->vref_mute_led_nid = spec->gpio_led; 788 return 1; 789 } 790 if (sscanf(dev->name, "HP_Mute_LED_%d", 791 &spec->gpio_led_polarity) == 1) { 792 set_hp_led_gpio(codec); 793 return 1; 794 } 795 /* BIOS bug: unfilled OEM string */ 796 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 797 set_hp_led_gpio(codec); 798 if (default_polarity >= 0) 799 spec->gpio_led_polarity = default_polarity; 800 else 801 spec->gpio_led_polarity = 1; 802 return 1; 803 } 804 } 805 806 /* 807 * Fallback case - if we don't find the DMI strings, 808 * we statically set the GPIO - if not a B-series system 809 * and default polarity is provided 810 */ 811 if (!hp_blike_system(codec->subsystem_id) && 812 (default_polarity == 0 || default_polarity == 1)) { 813 set_hp_led_gpio(codec); 814 spec->gpio_led_polarity = default_polarity; 815 return 1; 816 } 817 return 0; 818 } 819 820 /* check whether a built-in speaker is included in parsed pins */ 821 static bool has_builtin_speaker(struct hda_codec *codec) 822 { 823 struct sigmatel_spec *spec = codec->spec; 824 hda_nid_t *nid_pin; 825 int nids, i; 826 827 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 828 nid_pin = spec->gen.autocfg.line_out_pins; 829 nids = spec->gen.autocfg.line_outs; 830 } else { 831 nid_pin = spec->gen.autocfg.speaker_pins; 832 nids = spec->gen.autocfg.speaker_outs; 833 } 834 835 for (i = 0; i < nids; i++) { 836 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 837 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 838 return true; 839 } 840 return false; 841 } 842 843 /* 844 * PC beep controls 845 */ 846 847 /* create PC beep volume controls */ 848 static int stac_auto_create_beep_ctls(struct hda_codec *codec, 849 hda_nid_t nid) 850 { 851 struct sigmatel_spec *spec = codec->spec; 852 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 853 struct snd_kcontrol_new *knew; 854 static struct snd_kcontrol_new abeep_mute_ctl = 855 HDA_CODEC_MUTE(NULL, 0, 0, 0); 856 static struct snd_kcontrol_new dbeep_mute_ctl = 857 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 858 static struct snd_kcontrol_new beep_vol_ctl = 859 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 860 861 /* check for mute support for the the amp */ 862 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 863 const struct snd_kcontrol_new *temp; 864 if (spec->anabeep_nid == nid) 865 temp = &abeep_mute_ctl; 866 else 867 temp = &dbeep_mute_ctl; 868 knew = snd_hda_gen_add_kctl(&spec->gen, 869 "Beep Playback Switch", temp); 870 if (!knew) 871 return -ENOMEM; 872 knew->private_value = 873 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 874 } 875 876 /* check to see if there is volume support for the amp */ 877 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 878 knew = snd_hda_gen_add_kctl(&spec->gen, 879 "Beep Playback Volume", 880 &beep_vol_ctl); 881 if (!knew) 882 return -ENOMEM; 883 knew->private_value = 884 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 885 } 886 return 0; 887 } 888 889 #ifdef CONFIG_SND_HDA_INPUT_BEEP 890 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 891 892 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 893 struct snd_ctl_elem_value *ucontrol) 894 { 895 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 896 ucontrol->value.integer.value[0] = codec->beep->enabled; 897 return 0; 898 } 899 900 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 901 struct snd_ctl_elem_value *ucontrol) 902 { 903 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 904 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 905 } 906 907 static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 908 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 909 .name = "Beep Playback Switch", 910 .info = stac_dig_beep_switch_info, 911 .get = stac_dig_beep_switch_get, 912 .put = stac_dig_beep_switch_put, 913 }; 914 915 static int stac_beep_switch_ctl(struct hda_codec *codec) 916 { 917 struct sigmatel_spec *spec = codec->spec; 918 919 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 920 return -ENOMEM; 921 return 0; 922 } 923 #endif 924 925 /* 926 * SPDIF-out mux controls 927 */ 928 929 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 930 struct snd_ctl_elem_info *uinfo) 931 { 932 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 933 struct sigmatel_spec *spec = codec->spec; 934 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 935 } 936 937 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 938 struct snd_ctl_elem_value *ucontrol) 939 { 940 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 941 struct sigmatel_spec *spec = codec->spec; 942 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 943 944 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 945 return 0; 946 } 947 948 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 949 struct snd_ctl_elem_value *ucontrol) 950 { 951 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 952 struct sigmatel_spec *spec = codec->spec; 953 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 954 955 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 956 spec->gen.autocfg.dig_out_pins[smux_idx], 957 &spec->cur_smux[smux_idx]); 958 } 959 960 static struct snd_kcontrol_new stac_smux_mixer = { 961 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 962 .name = "IEC958 Playback Source", 963 /* count set later */ 964 .info = stac_smux_enum_info, 965 .get = stac_smux_enum_get, 966 .put = stac_smux_enum_put, 967 }; 968 969 static const char * const stac_spdif_labels[] = { 970 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 971 }; 972 973 static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 974 { 975 struct sigmatel_spec *spec = codec->spec; 976 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 977 const char * const *labels = spec->spdif_labels; 978 struct snd_kcontrol_new *kctl; 979 int i, num_cons; 980 981 if (cfg->dig_outs < 1) 982 return 0; 983 984 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 985 if (num_cons <= 1) 986 return 0; 987 988 if (!labels) 989 labels = stac_spdif_labels; 990 for (i = 0; i < num_cons; i++) { 991 if (snd_BUG_ON(!labels[i])) 992 return -EINVAL; 993 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL); 994 } 995 996 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 997 if (!kctl) 998 return -ENOMEM; 999 kctl->count = cfg->dig_outs; 1000 1001 return 0; 1002 } 1003 1004 /* 1005 */ 1006 1007 static const struct hda_verb stac9200_core_init[] = { 1008 /* set dac0mux for dac converter */ 1009 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1010 {} 1011 }; 1012 1013 static const struct hda_verb stac9200_eapd_init[] = { 1014 /* set dac0mux for dac converter */ 1015 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1016 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1017 {} 1018 }; 1019 1020 static const struct hda_verb dell_eq_core_init[] = { 1021 /* set master volume to max value without distortion 1022 * and direct control */ 1023 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 1024 {} 1025 }; 1026 1027 static const struct hda_verb stac92hd73xx_core_init[] = { 1028 /* set master volume and direct control */ 1029 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1030 {} 1031 }; 1032 1033 static const struct hda_verb stac92hd83xxx_core_init[] = { 1034 /* power state controls amps */ 1035 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1036 {} 1037 }; 1038 1039 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1040 { 0x22, 0x785, 0x43 }, 1041 { 0x22, 0x782, 0xe0 }, 1042 { 0x22, 0x795, 0x00 }, 1043 {} 1044 }; 1045 1046 static const struct hda_verb stac92hd71bxx_core_init[] = { 1047 /* set master volume and direct control */ 1048 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1049 {} 1050 }; 1051 1052 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = { 1053 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1054 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1055 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1056 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1057 {} 1058 }; 1059 1060 static const struct hda_verb stac925x_core_init[] = { 1061 /* set dac0mux for dac converter */ 1062 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1063 /* mute the master volume */ 1064 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1065 {} 1066 }; 1067 1068 static const struct hda_verb stac922x_core_init[] = { 1069 /* set master volume and direct control */ 1070 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1071 {} 1072 }; 1073 1074 static const struct hda_verb d965_core_init[] = { 1075 /* unmute node 0x1b */ 1076 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1077 /* select node 0x03 as DAC */ 1078 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1079 {} 1080 }; 1081 1082 static const struct hda_verb dell_3st_core_init[] = { 1083 /* don't set delta bit */ 1084 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1085 /* unmute node 0x1b */ 1086 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1087 /* select node 0x03 as DAC */ 1088 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1089 {} 1090 }; 1091 1092 static const struct hda_verb stac927x_core_init[] = { 1093 /* set master volume and direct control */ 1094 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1095 /* enable analog pc beep path */ 1096 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1097 {} 1098 }; 1099 1100 static const struct hda_verb stac927x_volknob_core_init[] = { 1101 /* don't set delta bit */ 1102 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1103 /* enable analog pc beep path */ 1104 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1105 {} 1106 }; 1107 1108 static const struct hda_verb stac9205_core_init[] = { 1109 /* set master volume and direct control */ 1110 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1111 /* enable analog pc beep path */ 1112 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1113 {} 1114 }; 1115 1116 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1117 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1118 1119 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1120 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1121 1122 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1123 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1124 1125 static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1126 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1127 1128 static const struct snd_kcontrol_new stac9205_loopback = 1129 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1130 1131 static const struct snd_kcontrol_new stac927x_loopback = 1132 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1133 1134 static const struct hda_pintbl ref9200_pin_configs[] = { 1135 { 0x08, 0x01c47010 }, 1136 { 0x09, 0x01447010 }, 1137 { 0x0d, 0x0221401f }, 1138 { 0x0e, 0x01114010 }, 1139 { 0x0f, 0x02a19020 }, 1140 { 0x10, 0x01a19021 }, 1141 { 0x11, 0x90100140 }, 1142 { 0x12, 0x01813122 }, 1143 {} 1144 }; 1145 1146 static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1147 { 0x08, 0x400000fe }, 1148 { 0x09, 0x404500f4 }, 1149 { 0x0d, 0x400100f0 }, 1150 { 0x0e, 0x90110010 }, 1151 { 0x0f, 0x400100f1 }, 1152 { 0x10, 0x02a1902e }, 1153 { 0x11, 0x500000f2 }, 1154 { 0x12, 0x500000f3 }, 1155 {} 1156 }; 1157 1158 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1159 { 0x08, 0x400000fe }, 1160 { 0x09, 0x404500f4 }, 1161 { 0x0d, 0x400100f0 }, 1162 { 0x0e, 0x90110010 }, 1163 { 0x0f, 0x400100f1 }, 1164 { 0x10, 0x02a1902e }, 1165 { 0x11, 0x500000f2 }, 1166 { 0x12, 0x500000f3 }, 1167 {} 1168 }; 1169 1170 /* 1171 STAC 9200 pin configs for 1172 102801A8 1173 102801DE 1174 102801E8 1175 */ 1176 static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1177 { 0x08, 0x400001f0 }, 1178 { 0x09, 0x400001f1 }, 1179 { 0x0d, 0x02214030 }, 1180 { 0x0e, 0x01014010 }, 1181 { 0x0f, 0x02a19020 }, 1182 { 0x10, 0x01a19021 }, 1183 { 0x11, 0x90100140 }, 1184 { 0x12, 0x01813122 }, 1185 {} 1186 }; 1187 1188 /* 1189 STAC 9200 pin configs for 1190 102801C0 1191 102801C1 1192 */ 1193 static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1194 { 0x08, 0x400001f0 }, 1195 { 0x09, 0x400001f1 }, 1196 { 0x0d, 0x0221401f }, 1197 { 0x0e, 0x01014010 }, 1198 { 0x0f, 0x01813020 }, 1199 { 0x10, 0x02a19021 }, 1200 { 0x11, 0x90100140 }, 1201 { 0x12, 0x400001f2 }, 1202 {} 1203 }; 1204 1205 /* 1206 STAC 9200 pin configs for 1207 102801C4 (Dell Dimension E310) 1208 102801C5 1209 102801C7 1210 102801D9 1211 102801DA 1212 102801E3 1213 */ 1214 static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1215 { 0x08, 0x400001f0 }, 1216 { 0x09, 0x400001f1 }, 1217 { 0x0d, 0x0221401f }, 1218 { 0x0e, 0x01014010 }, 1219 { 0x0f, 0x01813020 }, 1220 { 0x10, 0x01a19021 }, 1221 { 0x11, 0x90100140 }, 1222 { 0x12, 0x400001f2 }, 1223 {} 1224 }; 1225 1226 1227 /* 1228 STAC 9200-32 pin configs for 1229 102801B5 (Dell Inspiron 630m) 1230 102801D8 (Dell Inspiron 640m) 1231 */ 1232 static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1233 { 0x08, 0x40c003fa }, 1234 { 0x09, 0x03441340 }, 1235 { 0x0d, 0x0321121f }, 1236 { 0x0e, 0x90170310 }, 1237 { 0x0f, 0x408003fb }, 1238 { 0x10, 0x03a11020 }, 1239 { 0x11, 0x401003fc }, 1240 { 0x12, 0x403003fd }, 1241 {} 1242 }; 1243 1244 /* 1245 STAC 9200-32 pin configs for 1246 102801C2 (Dell Latitude D620) 1247 102801C8 1248 102801CC (Dell Latitude D820) 1249 102801D4 1250 102801D6 1251 */ 1252 static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1253 { 0x08, 0x40c003fa }, 1254 { 0x09, 0x0144131f }, 1255 { 0x0d, 0x0321121f }, 1256 { 0x0e, 0x90170310 }, 1257 { 0x0f, 0x90a70321 }, 1258 { 0x10, 0x03a11020 }, 1259 { 0x11, 0x401003fb }, 1260 { 0x12, 0x40f000fc }, 1261 {} 1262 }; 1263 1264 /* 1265 STAC 9200-32 pin configs for 1266 102801CE (Dell XPS M1710) 1267 102801CF (Dell Precision M90) 1268 */ 1269 static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1270 { 0x08, 0x40c003fa }, 1271 { 0x09, 0x01441340 }, 1272 { 0x0d, 0x0421421f }, 1273 { 0x0e, 0x90170310 }, 1274 { 0x0f, 0x408003fb }, 1275 { 0x10, 0x04a1102e }, 1276 { 0x11, 0x90170311 }, 1277 { 0x12, 0x403003fc }, 1278 {} 1279 }; 1280 1281 /* 1282 STAC 9200-32 pin configs for 1283 102801C9 1284 102801CA 1285 102801CB (Dell Latitude 120L) 1286 102801D3 1287 */ 1288 static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1289 { 0x08, 0x40c003fa }, 1290 { 0x09, 0x404003fb }, 1291 { 0x0d, 0x0321121f }, 1292 { 0x0e, 0x90170310 }, 1293 { 0x0f, 0x408003fc }, 1294 { 0x10, 0x03a11020 }, 1295 { 0x11, 0x401003fd }, 1296 { 0x12, 0x403003fe }, 1297 {} 1298 }; 1299 1300 /* 1301 STAC 9200-32 pin configs for 1302 102801BD (Dell Inspiron E1505n) 1303 102801EE 1304 102801EF 1305 */ 1306 static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1307 { 0x08, 0x40c003fa }, 1308 { 0x09, 0x01441340 }, 1309 { 0x0d, 0x0421121f }, 1310 { 0x0e, 0x90170310 }, 1311 { 0x0f, 0x408003fb }, 1312 { 0x10, 0x04a11020 }, 1313 { 0x11, 0x401003fc }, 1314 { 0x12, 0x403003fd }, 1315 {} 1316 }; 1317 1318 /* 1319 STAC 9200-32 pin configs for 1320 102801F5 (Dell Inspiron 1501) 1321 102801F6 1322 */ 1323 static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1324 { 0x08, 0x40c003fa }, 1325 { 0x09, 0x404003fb }, 1326 { 0x0d, 0x0421121f }, 1327 { 0x0e, 0x90170310 }, 1328 { 0x0f, 0x408003fc }, 1329 { 0x10, 0x04a11020 }, 1330 { 0x11, 0x401003fd }, 1331 { 0x12, 0x403003fe }, 1332 {} 1333 }; 1334 1335 /* 1336 STAC 9200-32 1337 102801CD (Dell Inspiron E1705/9400) 1338 */ 1339 static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1340 { 0x08, 0x40c003fa }, 1341 { 0x09, 0x01441340 }, 1342 { 0x0d, 0x0421121f }, 1343 { 0x0e, 0x90170310 }, 1344 { 0x0f, 0x90170310 }, 1345 { 0x10, 0x04a11020 }, 1346 { 0x11, 0x90170310 }, 1347 { 0x12, 0x40f003fc }, 1348 {} 1349 }; 1350 1351 static const struct hda_pintbl oqo9200_pin_configs[] = { 1352 { 0x08, 0x40c000f0 }, 1353 { 0x09, 0x404000f1 }, 1354 { 0x0d, 0x0221121f }, 1355 { 0x0e, 0x02211210 }, 1356 { 0x0f, 0x90170111 }, 1357 { 0x10, 0x90a70120 }, 1358 { 0x11, 0x400000f2 }, 1359 { 0x12, 0x400000f3 }, 1360 {} 1361 }; 1362 1363 1364 static void stac9200_fixup_panasonic(struct hda_codec *codec, 1365 const struct hda_fixup *fix, int action) 1366 { 1367 struct sigmatel_spec *spec = codec->spec; 1368 1369 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1370 spec->gpio_mask = spec->gpio_dir = 0x09; 1371 spec->gpio_data = 0x00; 1372 /* CF-74 has no headphone detection, and the driver should *NOT* 1373 * do detection and HP/speaker toggle because the hardware does it. 1374 */ 1375 spec->gen.suppress_auto_mute = 1; 1376 } 1377 } 1378 1379 1380 static const struct hda_fixup stac9200_fixups[] = { 1381 [STAC_REF] = { 1382 .type = HDA_FIXUP_PINS, 1383 .v.pins = ref9200_pin_configs, 1384 }, 1385 [STAC_9200_OQO] = { 1386 .type = HDA_FIXUP_PINS, 1387 .v.pins = oqo9200_pin_configs, 1388 .chained = true, 1389 .chain_id = STAC_9200_EAPD_INIT, 1390 }, 1391 [STAC_9200_DELL_D21] = { 1392 .type = HDA_FIXUP_PINS, 1393 .v.pins = dell9200_d21_pin_configs, 1394 }, 1395 [STAC_9200_DELL_D22] = { 1396 .type = HDA_FIXUP_PINS, 1397 .v.pins = dell9200_d22_pin_configs, 1398 }, 1399 [STAC_9200_DELL_D23] = { 1400 .type = HDA_FIXUP_PINS, 1401 .v.pins = dell9200_d23_pin_configs, 1402 }, 1403 [STAC_9200_DELL_M21] = { 1404 .type = HDA_FIXUP_PINS, 1405 .v.pins = dell9200_m21_pin_configs, 1406 }, 1407 [STAC_9200_DELL_M22] = { 1408 .type = HDA_FIXUP_PINS, 1409 .v.pins = dell9200_m22_pin_configs, 1410 }, 1411 [STAC_9200_DELL_M23] = { 1412 .type = HDA_FIXUP_PINS, 1413 .v.pins = dell9200_m23_pin_configs, 1414 }, 1415 [STAC_9200_DELL_M24] = { 1416 .type = HDA_FIXUP_PINS, 1417 .v.pins = dell9200_m24_pin_configs, 1418 }, 1419 [STAC_9200_DELL_M25] = { 1420 .type = HDA_FIXUP_PINS, 1421 .v.pins = dell9200_m25_pin_configs, 1422 }, 1423 [STAC_9200_DELL_M26] = { 1424 .type = HDA_FIXUP_PINS, 1425 .v.pins = dell9200_m26_pin_configs, 1426 }, 1427 [STAC_9200_DELL_M27] = { 1428 .type = HDA_FIXUP_PINS, 1429 .v.pins = dell9200_m27_pin_configs, 1430 }, 1431 [STAC_9200_M4] = { 1432 .type = HDA_FIXUP_PINS, 1433 .v.pins = gateway9200_m4_pin_configs, 1434 .chained = true, 1435 .chain_id = STAC_9200_EAPD_INIT, 1436 }, 1437 [STAC_9200_M4_2] = { 1438 .type = HDA_FIXUP_PINS, 1439 .v.pins = gateway9200_m4_2_pin_configs, 1440 .chained = true, 1441 .chain_id = STAC_9200_EAPD_INIT, 1442 }, 1443 [STAC_9200_PANASONIC] = { 1444 .type = HDA_FIXUP_FUNC, 1445 .v.func = stac9200_fixup_panasonic, 1446 }, 1447 [STAC_9200_EAPD_INIT] = { 1448 .type = HDA_FIXUP_VERBS, 1449 .v.verbs = (const struct hda_verb[]) { 1450 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1451 {} 1452 }, 1453 }, 1454 }; 1455 1456 static const struct hda_model_fixup stac9200_models[] = { 1457 { .id = STAC_REF, .name = "ref" }, 1458 { .id = STAC_9200_OQO, .name = "oqo" }, 1459 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1460 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1461 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1462 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1463 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1464 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1465 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1466 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1467 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1468 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1469 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1470 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1471 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1472 {} 1473 }; 1474 1475 static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1476 /* SigmaTel reference board */ 1477 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1478 "DFI LanParty", STAC_REF), 1479 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1480 "DFI LanParty", STAC_REF), 1481 /* Dell laptops have BIOS problem */ 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1483 "unknown Dell", STAC_9200_DELL_D21), 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1485 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1487 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1489 "unknown Dell", STAC_9200_DELL_D22), 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1491 "unknown Dell", STAC_9200_DELL_D22), 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1493 "Dell Latitude D620", STAC_9200_DELL_M22), 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1495 "unknown Dell", STAC_9200_DELL_D23), 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1497 "unknown Dell", STAC_9200_DELL_D23), 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1499 "unknown Dell", STAC_9200_DELL_M22), 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1501 "unknown Dell", STAC_9200_DELL_M24), 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1503 "unknown Dell", STAC_9200_DELL_M24), 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1505 "Dell Latitude 120L", STAC_9200_DELL_M24), 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1507 "Dell Latitude D820", STAC_9200_DELL_M22), 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1509 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1511 "Dell XPS M1710", STAC_9200_DELL_M23), 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1513 "Dell Precision M90", STAC_9200_DELL_M23), 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1515 "unknown Dell", STAC_9200_DELL_M22), 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1517 "unknown Dell", STAC_9200_DELL_M22), 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1519 "unknown Dell", STAC_9200_DELL_M22), 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1521 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1523 "unknown Dell", STAC_9200_DELL_D23), 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1525 "unknown Dell", STAC_9200_DELL_D23), 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1527 "unknown Dell", STAC_9200_DELL_D21), 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1529 "unknown Dell", STAC_9200_DELL_D23), 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1531 "unknown Dell", STAC_9200_DELL_D21), 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1533 "unknown Dell", STAC_9200_DELL_M25), 1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1535 "unknown Dell", STAC_9200_DELL_M25), 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1537 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1538 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1539 "unknown Dell", STAC_9200_DELL_M26), 1540 /* Panasonic */ 1541 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1542 /* Gateway machines needs EAPD to be set on resume */ 1543 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1544 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1545 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1546 /* OQO Mobile */ 1547 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1548 {} /* terminator */ 1549 }; 1550 1551 static const struct hda_pintbl ref925x_pin_configs[] = { 1552 { 0x07, 0x40c003f0 }, 1553 { 0x08, 0x424503f2 }, 1554 { 0x0a, 0x01813022 }, 1555 { 0x0b, 0x02a19021 }, 1556 { 0x0c, 0x90a70320 }, 1557 { 0x0d, 0x02214210 }, 1558 { 0x10, 0x01019020 }, 1559 { 0x11, 0x9033032e }, 1560 {} 1561 }; 1562 1563 static const struct hda_pintbl stac925xM1_pin_configs[] = { 1564 { 0x07, 0x40c003f4 }, 1565 { 0x08, 0x424503f2 }, 1566 { 0x0a, 0x400000f3 }, 1567 { 0x0b, 0x02a19020 }, 1568 { 0x0c, 0x40a000f0 }, 1569 { 0x0d, 0x90100210 }, 1570 { 0x10, 0x400003f1 }, 1571 { 0x11, 0x9033032e }, 1572 {} 1573 }; 1574 1575 static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1576 { 0x07, 0x40c003f4 }, 1577 { 0x08, 0x424503f2 }, 1578 { 0x0a, 0x400000f3 }, 1579 { 0x0b, 0x02a19020 }, 1580 { 0x0c, 0x40a000f0 }, 1581 { 0x0d, 0x90100210 }, 1582 { 0x10, 0x400003f1 }, 1583 { 0x11, 0x9033032e }, 1584 {} 1585 }; 1586 1587 static const struct hda_pintbl stac925xM2_pin_configs[] = { 1588 { 0x07, 0x40c003f4 }, 1589 { 0x08, 0x424503f2 }, 1590 { 0x0a, 0x400000f3 }, 1591 { 0x0b, 0x02a19020 }, 1592 { 0x0c, 0x40a000f0 }, 1593 { 0x0d, 0x90100210 }, 1594 { 0x10, 0x400003f1 }, 1595 { 0x11, 0x9033032e }, 1596 {} 1597 }; 1598 1599 static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1600 { 0x07, 0x40c003f4 }, 1601 { 0x08, 0x424503f2 }, 1602 { 0x0a, 0x400000f3 }, 1603 { 0x0b, 0x02a19020 }, 1604 { 0x0c, 0x40a000f0 }, 1605 { 0x0d, 0x90100210 }, 1606 { 0x10, 0x400003f1 }, 1607 { 0x11, 0x9033032e }, 1608 {} 1609 }; 1610 1611 static const struct hda_pintbl stac925xM3_pin_configs[] = { 1612 { 0x07, 0x40c003f4 }, 1613 { 0x08, 0x424503f2 }, 1614 { 0x0a, 0x400000f3 }, 1615 { 0x0b, 0x02a19020 }, 1616 { 0x0c, 0x40a000f0 }, 1617 { 0x0d, 0x90100210 }, 1618 { 0x10, 0x400003f1 }, 1619 { 0x11, 0x503303f3 }, 1620 {} 1621 }; 1622 1623 static const struct hda_pintbl stac925xM5_pin_configs[] = { 1624 { 0x07, 0x40c003f4 }, 1625 { 0x08, 0x424503f2 }, 1626 { 0x0a, 0x400000f3 }, 1627 { 0x0b, 0x02a19020 }, 1628 { 0x0c, 0x40a000f0 }, 1629 { 0x0d, 0x90100210 }, 1630 { 0x10, 0x400003f1 }, 1631 { 0x11, 0x9033032e }, 1632 {} 1633 }; 1634 1635 static const struct hda_pintbl stac925xM6_pin_configs[] = { 1636 { 0x07, 0x40c003f4 }, 1637 { 0x08, 0x424503f2 }, 1638 { 0x0a, 0x400000f3 }, 1639 { 0x0b, 0x02a19020 }, 1640 { 0x0c, 0x40a000f0 }, 1641 { 0x0d, 0x90100210 }, 1642 { 0x10, 0x400003f1 }, 1643 { 0x11, 0x90330320 }, 1644 {} 1645 }; 1646 1647 static const struct hda_fixup stac925x_fixups[] = { 1648 [STAC_REF] = { 1649 .type = HDA_FIXUP_PINS, 1650 .v.pins = ref925x_pin_configs, 1651 }, 1652 [STAC_M1] = { 1653 .type = HDA_FIXUP_PINS, 1654 .v.pins = stac925xM1_pin_configs, 1655 }, 1656 [STAC_M1_2] = { 1657 .type = HDA_FIXUP_PINS, 1658 .v.pins = stac925xM1_2_pin_configs, 1659 }, 1660 [STAC_M2] = { 1661 .type = HDA_FIXUP_PINS, 1662 .v.pins = stac925xM2_pin_configs, 1663 }, 1664 [STAC_M2_2] = { 1665 .type = HDA_FIXUP_PINS, 1666 .v.pins = stac925xM2_2_pin_configs, 1667 }, 1668 [STAC_M3] = { 1669 .type = HDA_FIXUP_PINS, 1670 .v.pins = stac925xM3_pin_configs, 1671 }, 1672 [STAC_M5] = { 1673 .type = HDA_FIXUP_PINS, 1674 .v.pins = stac925xM5_pin_configs, 1675 }, 1676 [STAC_M6] = { 1677 .type = HDA_FIXUP_PINS, 1678 .v.pins = stac925xM6_pin_configs, 1679 }, 1680 }; 1681 1682 static const struct hda_model_fixup stac925x_models[] = { 1683 { .id = STAC_REF, .name = "ref" }, 1684 { .id = STAC_M1, .name = "m1" }, 1685 { .id = STAC_M1_2, .name = "m1-2" }, 1686 { .id = STAC_M2, .name = "m2" }, 1687 { .id = STAC_M2_2, .name = "m2-2" }, 1688 { .id = STAC_M3, .name = "m3" }, 1689 { .id = STAC_M5, .name = "m5" }, 1690 { .id = STAC_M6, .name = "m6" }, 1691 {} 1692 }; 1693 1694 static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1695 /* SigmaTel reference board */ 1696 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1697 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1698 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1699 1700 /* Default table for unknown ID */ 1701 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1702 1703 /* gateway machines are checked via codec ssid */ 1704 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1705 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1706 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1707 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1708 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1709 /* Not sure about the brand name for those */ 1710 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1711 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1712 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1713 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1714 {} /* terminator */ 1715 }; 1716 1717 static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1718 { 0x0a, 0x02214030 }, 1719 { 0x0b, 0x02a19040 }, 1720 { 0x0c, 0x01a19020 }, 1721 { 0x0d, 0x02214030 }, 1722 { 0x0e, 0x0181302e }, 1723 { 0x0f, 0x01014010 }, 1724 { 0x10, 0x01014020 }, 1725 { 0x11, 0x01014030 }, 1726 { 0x12, 0x02319040 }, 1727 { 0x13, 0x90a000f0 }, 1728 { 0x14, 0x90a000f0 }, 1729 { 0x22, 0x01452050 }, 1730 { 0x23, 0x01452050 }, 1731 {} 1732 }; 1733 1734 static const struct hda_pintbl dell_m6_pin_configs[] = { 1735 { 0x0a, 0x0321101f }, 1736 { 0x0b, 0x4f00000f }, 1737 { 0x0c, 0x4f0000f0 }, 1738 { 0x0d, 0x90170110 }, 1739 { 0x0e, 0x03a11020 }, 1740 { 0x0f, 0x0321101f }, 1741 { 0x10, 0x4f0000f0 }, 1742 { 0x11, 0x4f0000f0 }, 1743 { 0x12, 0x4f0000f0 }, 1744 { 0x13, 0x90a60160 }, 1745 { 0x14, 0x4f0000f0 }, 1746 { 0x22, 0x4f0000f0 }, 1747 { 0x23, 0x4f0000f0 }, 1748 {} 1749 }; 1750 1751 static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1752 { 0x0a, 0x0321101f }, 1753 { 0x0b, 0x0321101f }, 1754 { 0x0c, 0x03a11020 }, 1755 { 0x0d, 0x03014020 }, 1756 { 0x0e, 0x90170110 }, 1757 { 0x0f, 0x4f0000f0 }, 1758 { 0x10, 0x4f0000f0 }, 1759 { 0x11, 0x4f0000f0 }, 1760 { 0x12, 0x4f0000f0 }, 1761 { 0x13, 0x90a60160 }, 1762 { 0x14, 0x4f0000f0 }, 1763 { 0x22, 0x4f0000f0 }, 1764 { 0x23, 0x904601b0 }, 1765 {} 1766 }; 1767 1768 static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1769 { 0x0a, 0x02214230 }, 1770 { 0x0b, 0x02A19240 }, 1771 { 0x0c, 0x01013214 }, 1772 { 0x0d, 0x01014210 }, 1773 { 0x0e, 0x01A19250 }, 1774 { 0x0f, 0x01011212 }, 1775 { 0x10, 0x01016211 }, 1776 {} 1777 }; 1778 1779 static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1780 const struct hda_fixup *fix, int action) 1781 { 1782 struct sigmatel_spec *spec = codec->spec; 1783 1784 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1785 return; 1786 1787 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1788 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1789 } 1790 1791 static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1792 { 1793 struct sigmatel_spec *spec = codec->spec; 1794 1795 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1796 spec->eapd_switch = 0; 1797 } 1798 1799 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1800 const struct hda_fixup *fix, int action) 1801 { 1802 struct sigmatel_spec *spec = codec->spec; 1803 1804 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1805 return; 1806 1807 stac92hd73xx_fixup_dell(codec); 1808 snd_hda_add_verbs(codec, dell_eq_core_init); 1809 spec->volknob_init = 1; 1810 } 1811 1812 /* Analog Mics */ 1813 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1814 const struct hda_fixup *fix, int action) 1815 { 1816 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1817 return; 1818 1819 stac92hd73xx_fixup_dell(codec); 1820 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1821 } 1822 1823 /* Digital Mics */ 1824 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1825 const struct hda_fixup *fix, int action) 1826 { 1827 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1828 return; 1829 1830 stac92hd73xx_fixup_dell(codec); 1831 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1832 } 1833 1834 /* Both */ 1835 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1836 const struct hda_fixup *fix, int action) 1837 { 1838 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1839 return; 1840 1841 stac92hd73xx_fixup_dell(codec); 1842 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1843 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1844 } 1845 1846 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1847 const struct hda_fixup *fix, int action) 1848 { 1849 struct sigmatel_spec *spec = codec->spec; 1850 1851 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1852 return; 1853 1854 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1855 spec->eapd_switch = 0; 1856 } 1857 1858 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1859 const struct hda_fixup *fix, int action) 1860 { 1861 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1862 codec->no_jack_detect = 1; 1863 } 1864 1865 static const struct hda_fixup stac92hd73xx_fixups[] = { 1866 [STAC_92HD73XX_REF] = { 1867 .type = HDA_FIXUP_FUNC, 1868 .v.func = stac92hd73xx_fixup_ref, 1869 }, 1870 [STAC_DELL_M6_AMIC] = { 1871 .type = HDA_FIXUP_FUNC, 1872 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1873 }, 1874 [STAC_DELL_M6_DMIC] = { 1875 .type = HDA_FIXUP_FUNC, 1876 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1877 }, 1878 [STAC_DELL_M6_BOTH] = { 1879 .type = HDA_FIXUP_FUNC, 1880 .v.func = stac92hd73xx_fixup_dell_m6_both, 1881 }, 1882 [STAC_DELL_EQ] = { 1883 .type = HDA_FIXUP_FUNC, 1884 .v.func = stac92hd73xx_fixup_dell_eq, 1885 }, 1886 [STAC_ALIENWARE_M17X] = { 1887 .type = HDA_FIXUP_FUNC, 1888 .v.func = stac92hd73xx_fixup_alienware_m17x, 1889 }, 1890 [STAC_92HD73XX_INTEL] = { 1891 .type = HDA_FIXUP_PINS, 1892 .v.pins = intel_dg45id_pin_configs, 1893 }, 1894 [STAC_92HD73XX_NO_JD] = { 1895 .type = HDA_FIXUP_FUNC, 1896 .v.func = stac92hd73xx_fixup_no_jd, 1897 } 1898 }; 1899 1900 static const struct hda_model_fixup stac92hd73xx_models[] = { 1901 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1902 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1903 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1904 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1905 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1906 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1907 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1908 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1909 {} 1910 }; 1911 1912 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1913 /* SigmaTel reference board */ 1914 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1915 "DFI LanParty", STAC_92HD73XX_REF), 1916 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1917 "DFI LanParty", STAC_92HD73XX_REF), 1918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1919 "Intel DG45ID", STAC_92HD73XX_INTEL), 1920 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1921 "Intel DG45FC", STAC_92HD73XX_INTEL), 1922 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1923 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1924 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1925 "unknown Dell", STAC_DELL_M6_DMIC), 1926 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1927 "unknown Dell", STAC_DELL_M6_BOTH), 1928 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1929 "unknown Dell", STAC_DELL_M6_BOTH), 1930 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1931 "unknown Dell", STAC_DELL_M6_AMIC), 1932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1933 "unknown Dell", STAC_DELL_M6_AMIC), 1934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1935 "unknown Dell", STAC_DELL_M6_DMIC), 1936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1937 "unknown Dell", STAC_DELL_M6_DMIC), 1938 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1939 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1940 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1941 "Dell Studio 17", STAC_DELL_M6_DMIC), 1942 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1943 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1944 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1945 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1946 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1947 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1948 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1949 "Dell Studio 1558", STAC_DELL_M6_DMIC), 1950 /* codec SSID matching */ 1951 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 1952 "Alienware M17x", STAC_ALIENWARE_M17X), 1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1954 "Alienware M17x", STAC_ALIENWARE_M17X), 1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 1956 "Alienware M17x R3", STAC_DELL_EQ), 1957 {} /* terminator */ 1958 }; 1959 1960 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 1961 { 0x0a, 0x02214030 }, 1962 { 0x0b, 0x02211010 }, 1963 { 0x0c, 0x02a19020 }, 1964 { 0x0d, 0x02170130 }, 1965 { 0x0e, 0x01014050 }, 1966 { 0x0f, 0x01819040 }, 1967 { 0x10, 0x01014020 }, 1968 { 0x11, 0x90a3014e }, 1969 { 0x1f, 0x01451160 }, 1970 { 0x20, 0x98560170 }, 1971 {} 1972 }; 1973 1974 static const struct hda_pintbl dell_s14_pin_configs[] = { 1975 { 0x0a, 0x0221403f }, 1976 { 0x0b, 0x0221101f }, 1977 { 0x0c, 0x02a19020 }, 1978 { 0x0d, 0x90170110 }, 1979 { 0x0e, 0x40f000f0 }, 1980 { 0x0f, 0x40f000f0 }, 1981 { 0x10, 0x40f000f0 }, 1982 { 0x11, 0x90a60160 }, 1983 { 0x1f, 0x40f000f0 }, 1984 { 0x20, 0x40f000f0 }, 1985 {} 1986 }; 1987 1988 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 1989 { 0x0a, 0x02a11020 }, 1990 { 0x0b, 0x0221101f }, 1991 { 0x0c, 0x400000f0 }, 1992 { 0x0d, 0x90170110 }, 1993 { 0x0e, 0x400000f1 }, 1994 { 0x0f, 0x400000f2 }, 1995 { 0x10, 0x400000f3 }, 1996 { 0x11, 0x90a60160 }, 1997 { 0x1f, 0x400000f4 }, 1998 { 0x20, 0x400000f5 }, 1999 {} 2000 }; 2001 2002 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2003 { 0x0a, 0x03a12050 }, 2004 { 0x0b, 0x0321201f }, 2005 { 0x0c, 0x40f000f0 }, 2006 { 0x0d, 0x90170110 }, 2007 { 0x0e, 0x40f000f0 }, 2008 { 0x0f, 0x40f000f0 }, 2009 { 0x10, 0x90170110 }, 2010 { 0x11, 0xd5a30140 }, 2011 { 0x1f, 0x40f000f0 }, 2012 { 0x20, 0x40f000f0 }, 2013 {} 2014 }; 2015 2016 static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2017 { 0x0a, 0x01813050 }, 2018 { 0x0b, 0x0421201f }, 2019 { 0x0c, 0x04a1205e }, 2020 { 0x0d, 0x96130310 }, 2021 { 0x0e, 0x96130310 }, 2022 { 0x0f, 0x0101401f }, 2023 { 0x10, 0x1111611f }, 2024 { 0x11, 0xd5a30130 }, 2025 {} 2026 }; 2027 2028 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2029 { 0x0a, 0x40f000f0 }, 2030 { 0x0b, 0x0221101f }, 2031 { 0x0c, 0x02a11020 }, 2032 { 0x0d, 0x92170110 }, 2033 { 0x0e, 0x40f000f0 }, 2034 { 0x0f, 0x92170110 }, 2035 { 0x10, 0x40f000f0 }, 2036 { 0x11, 0xd5a30130 }, 2037 { 0x1f, 0x40f000f0 }, 2038 { 0x20, 0x40f000f0 }, 2039 {} 2040 }; 2041 2042 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2043 const struct hda_fixup *fix, int action) 2044 { 2045 struct sigmatel_spec *spec = codec->spec; 2046 2047 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2048 return; 2049 2050 if (hp_bnb2011_with_dock(codec)) { 2051 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2052 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2053 } 2054 2055 if (find_mute_led_cfg(codec, spec->default_polarity)) 2056 snd_printd("mute LED gpio %d polarity %d\n", 2057 spec->gpio_led, 2058 spec->gpio_led_polarity); 2059 } 2060 2061 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2062 const struct hda_fixup *fix, int action) 2063 { 2064 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2065 return; 2066 2067 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2068 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2069 } 2070 2071 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2072 const struct hda_fixup *fix, int action) 2073 { 2074 struct sigmatel_spec *spec = codec->spec; 2075 2076 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2077 spec->default_polarity = 0; 2078 } 2079 2080 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2081 const struct hda_fixup *fix, int action) 2082 { 2083 struct sigmatel_spec *spec = codec->spec; 2084 2085 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2086 spec->default_polarity = 1; 2087 } 2088 2089 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2090 const struct hda_fixup *fix, int action) 2091 { 2092 struct sigmatel_spec *spec = codec->spec; 2093 2094 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2095 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2096 } 2097 2098 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2099 const struct hda_fixup *fix, int action) 2100 { 2101 struct sigmatel_spec *spec = codec->spec; 2102 2103 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2104 spec->headset_jack = 1; 2105 } 2106 2107 static const struct hda_fixup stac92hd83xxx_fixups[] = { 2108 [STAC_92HD83XXX_REF] = { 2109 .type = HDA_FIXUP_PINS, 2110 .v.pins = ref92hd83xxx_pin_configs, 2111 }, 2112 [STAC_92HD83XXX_PWR_REF] = { 2113 .type = HDA_FIXUP_PINS, 2114 .v.pins = ref92hd83xxx_pin_configs, 2115 }, 2116 [STAC_DELL_S14] = { 2117 .type = HDA_FIXUP_PINS, 2118 .v.pins = dell_s14_pin_configs, 2119 }, 2120 [STAC_DELL_VOSTRO_3500] = { 2121 .type = HDA_FIXUP_PINS, 2122 .v.pins = dell_vostro_3500_pin_configs, 2123 }, 2124 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2125 .type = HDA_FIXUP_PINS, 2126 .v.pins = hp_cNB11_intquad_pin_configs, 2127 .chained = true, 2128 .chain_id = STAC_92HD83XXX_HP, 2129 }, 2130 [STAC_92HD83XXX_HP] = { 2131 .type = HDA_FIXUP_FUNC, 2132 .v.func = stac92hd83xxx_fixup_hp, 2133 }, 2134 [STAC_HP_DV7_4000] = { 2135 .type = HDA_FIXUP_PINS, 2136 .v.pins = hp_dv7_4000_pin_configs, 2137 .chained = true, 2138 .chain_id = STAC_92HD83XXX_HP, 2139 }, 2140 [STAC_HP_ZEPHYR] = { 2141 .type = HDA_FIXUP_FUNC, 2142 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2143 .chained = true, 2144 .chain_id = STAC_92HD83XXX_HP, 2145 }, 2146 [STAC_92HD83XXX_HP_LED] = { 2147 .type = HDA_FIXUP_FUNC, 2148 .v.func = stac92hd83xxx_fixup_hp_led, 2149 .chained = true, 2150 .chain_id = STAC_92HD83XXX_HP, 2151 }, 2152 [STAC_92HD83XXX_HP_INV_LED] = { 2153 .type = HDA_FIXUP_FUNC, 2154 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2155 .chained = true, 2156 .chain_id = STAC_92HD83XXX_HP, 2157 }, 2158 [STAC_92HD83XXX_HP_MIC_LED] = { 2159 .type = HDA_FIXUP_FUNC, 2160 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2161 .chained = true, 2162 .chain_id = STAC_92HD83XXX_HP, 2163 }, 2164 [STAC_92HD83XXX_HEADSET_JACK] = { 2165 .type = HDA_FIXUP_FUNC, 2166 .v.func = stac92hd83xxx_fixup_headset_jack, 2167 }, 2168 [STAC_HP_ENVY_BASS] = { 2169 .type = HDA_FIXUP_PINS, 2170 .v.pins = (const struct hda_pintbl[]) { 2171 { 0x0f, 0x90170111 }, 2172 {} 2173 }, 2174 }, 2175 }; 2176 2177 static const struct hda_model_fixup stac92hd83xxx_models[] = { 2178 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2179 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2180 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2181 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2182 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2183 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2184 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2185 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2186 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2187 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2188 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2189 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2190 {} 2191 }; 2192 2193 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2194 /* SigmaTel reference board */ 2195 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2196 "DFI LanParty", STAC_92HD83XXX_REF), 2197 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2198 "DFI LanParty", STAC_92HD83XXX_REF), 2199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2200 "unknown Dell", STAC_DELL_S14), 2201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2202 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2204 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2206 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2208 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2210 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2212 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2214 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2216 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2217 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2218 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2219 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2220 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2221 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2222 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2223 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2224 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2225 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2226 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2227 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2228 "HP Pavilion dv7", STAC_HP_DV7_4000), 2229 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2230 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2231 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2232 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2233 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2234 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2235 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2236 "HP Folio", STAC_92HD83XXX_HP_MIC_LED), 2237 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2238 "HP", STAC_92HD83XXX_HP_MIC_LED), 2239 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2240 "HP", STAC_92HD83XXX_HP_MIC_LED), 2241 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2242 "HP", STAC_92HD83XXX_HP_MIC_LED), 2243 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2244 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2245 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2246 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2247 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2248 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2249 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2250 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2251 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2252 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2253 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2254 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2256 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2258 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2259 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2260 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2261 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2262 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2263 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2264 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2265 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2266 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2267 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2268 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2269 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2270 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2271 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2272 "HP", STAC_HP_ZEPHYR), 2273 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2274 "HP Mini", STAC_92HD83XXX_HP_LED), 2275 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2276 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2277 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2278 "HP Mini", STAC_92HD83XXX_HP_LED), 2279 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2280 {} /* terminator */ 2281 }; 2282 2283 /* HP dv7 bass switch - GPIO5 */ 2284 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2285 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2286 struct snd_ctl_elem_value *ucontrol) 2287 { 2288 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2289 struct sigmatel_spec *spec = codec->spec; 2290 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2291 return 0; 2292 } 2293 2294 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2295 struct snd_ctl_elem_value *ucontrol) 2296 { 2297 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2298 struct sigmatel_spec *spec = codec->spec; 2299 unsigned int gpio_data; 2300 2301 gpio_data = (spec->gpio_data & ~0x20) | 2302 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2303 if (gpio_data == spec->gpio_data) 2304 return 0; 2305 spec->gpio_data = gpio_data; 2306 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2307 return 1; 2308 } 2309 2310 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2311 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2312 .info = stac_hp_bass_gpio_info, 2313 .get = stac_hp_bass_gpio_get, 2314 .put = stac_hp_bass_gpio_put, 2315 }; 2316 2317 static int stac_add_hp_bass_switch(struct hda_codec *codec) 2318 { 2319 struct sigmatel_spec *spec = codec->spec; 2320 2321 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2322 &stac_hp_bass_sw_ctrl)) 2323 return -ENOMEM; 2324 2325 spec->gpio_mask |= 0x20; 2326 spec->gpio_dir |= 0x20; 2327 spec->gpio_data |= 0x20; 2328 return 0; 2329 } 2330 2331 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 2332 { 0x0a, 0x02214030 }, 2333 { 0x0b, 0x02a19040 }, 2334 { 0x0c, 0x01a19020 }, 2335 { 0x0d, 0x01014010 }, 2336 { 0x0e, 0x0181302e }, 2337 { 0x0f, 0x01014010 }, 2338 { 0x14, 0x01019020 }, 2339 { 0x18, 0x90a000f0 }, 2340 { 0x19, 0x90a000f0 }, 2341 { 0x1e, 0x01452050 }, 2342 { 0x1f, 0x01452050 }, 2343 {} 2344 }; 2345 2346 static const struct hda_pintbl dell_m4_1_pin_configs[] = { 2347 { 0x0a, 0x0421101f }, 2348 { 0x0b, 0x04a11221 }, 2349 { 0x0c, 0x40f000f0 }, 2350 { 0x0d, 0x90170110 }, 2351 { 0x0e, 0x23a1902e }, 2352 { 0x0f, 0x23014250 }, 2353 { 0x14, 0x40f000f0 }, 2354 { 0x18, 0x90a000f0 }, 2355 { 0x19, 0x40f000f0 }, 2356 { 0x1e, 0x4f0000f0 }, 2357 { 0x1f, 0x4f0000f0 }, 2358 {} 2359 }; 2360 2361 static const struct hda_pintbl dell_m4_2_pin_configs[] = { 2362 { 0x0a, 0x0421101f }, 2363 { 0x0b, 0x04a11221 }, 2364 { 0x0c, 0x90a70330 }, 2365 { 0x0d, 0x90170110 }, 2366 { 0x0e, 0x23a1902e }, 2367 { 0x0f, 0x23014250 }, 2368 { 0x14, 0x40f000f0 }, 2369 { 0x18, 0x40f000f0 }, 2370 { 0x19, 0x40f000f0 }, 2371 { 0x1e, 0x044413b0 }, 2372 { 0x1f, 0x044413b0 }, 2373 {} 2374 }; 2375 2376 static const struct hda_pintbl dell_m4_3_pin_configs[] = { 2377 { 0x0a, 0x0421101f }, 2378 { 0x0b, 0x04a11221 }, 2379 { 0x0c, 0x90a70330 }, 2380 { 0x0d, 0x90170110 }, 2381 { 0x0e, 0x40f000f0 }, 2382 { 0x0f, 0x40f000f0 }, 2383 { 0x14, 0x40f000f0 }, 2384 { 0x18, 0x90a000f0 }, 2385 { 0x19, 0x40f000f0 }, 2386 { 0x1e, 0x044413b0 }, 2387 { 0x1f, 0x044413b0 }, 2388 {} 2389 }; 2390 2391 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 2392 const struct hda_fixup *fix, int action) 2393 { 2394 struct sigmatel_spec *spec = codec->spec; 2395 2396 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2397 return; 2398 2399 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 2400 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 2401 } 2402 2403 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 2404 const struct hda_fixup *fix, int action) 2405 { 2406 struct sigmatel_spec *spec = codec->spec; 2407 struct hda_jack_tbl *jack; 2408 2409 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2410 return; 2411 2412 /* Enable VREF power saving on GPIO1 detect */ 2413 snd_hda_codec_write_cache(codec, codec->afg, 0, 2414 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 2415 snd_hda_jack_detect_enable_callback(codec, codec->afg, 2416 STAC_VREF_EVENT, 2417 stac_vref_event); 2418 jack = snd_hda_jack_tbl_get(codec, codec->afg); 2419 if (jack) 2420 jack->private_data = 0x02; 2421 2422 spec->gpio_mask |= 0x02; 2423 2424 /* enable internal microphone */ 2425 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 2426 } 2427 2428 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 2429 const struct hda_fixup *fix, int action) 2430 { 2431 struct sigmatel_spec *spec = codec->spec; 2432 2433 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2434 return; 2435 spec->gpio_led = 0x01; 2436 } 2437 2438 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 2439 const struct hda_fixup *fix, int action) 2440 { 2441 unsigned int cap; 2442 2443 switch (action) { 2444 case HDA_FIXUP_ACT_PRE_PROBE: 2445 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 2446 break; 2447 2448 case HDA_FIXUP_ACT_PROBE: 2449 /* enable bass on HP dv7 */ 2450 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 2451 cap &= AC_GPIO_IO_COUNT; 2452 if (cap >= 6) 2453 stac_add_hp_bass_switch(codec); 2454 break; 2455 } 2456 } 2457 2458 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 2459 const struct hda_fixup *fix, int action) 2460 { 2461 struct sigmatel_spec *spec = codec->spec; 2462 2463 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2464 return; 2465 spec->gpio_led = 0x08; 2466 } 2467 2468 2469 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 2470 const struct hda_fixup *fix, int action) 2471 { 2472 struct sigmatel_spec *spec = codec->spec; 2473 2474 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2475 return; 2476 2477 if (hp_blike_system(codec->subsystem_id)) { 2478 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f); 2479 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 2480 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER || 2481 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) { 2482 /* It was changed in the BIOS to just satisfy MS DTM. 2483 * Lets turn it back into slaved HP 2484 */ 2485 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) 2486 | (AC_JACK_HP_OUT << 2487 AC_DEFCFG_DEVICE_SHIFT); 2488 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC 2489 | AC_DEFCFG_SEQUENCE))) 2490 | 0x1f; 2491 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg); 2492 } 2493 } 2494 2495 if (find_mute_led_cfg(codec, 1)) 2496 snd_printd("mute LED gpio %d polarity %d\n", 2497 spec->gpio_led, 2498 spec->gpio_led_polarity); 2499 2500 } 2501 2502 static const struct hda_fixup stac92hd71bxx_fixups[] = { 2503 [STAC_92HD71BXX_REF] = { 2504 .type = HDA_FIXUP_FUNC, 2505 .v.func = stac92hd71bxx_fixup_ref, 2506 }, 2507 [STAC_DELL_M4_1] = { 2508 .type = HDA_FIXUP_PINS, 2509 .v.pins = dell_m4_1_pin_configs, 2510 }, 2511 [STAC_DELL_M4_2] = { 2512 .type = HDA_FIXUP_PINS, 2513 .v.pins = dell_m4_2_pin_configs, 2514 }, 2515 [STAC_DELL_M4_3] = { 2516 .type = HDA_FIXUP_PINS, 2517 .v.pins = dell_m4_3_pin_configs, 2518 }, 2519 [STAC_HP_M4] = { 2520 .type = HDA_FIXUP_FUNC, 2521 .v.func = stac92hd71bxx_fixup_hp_m4, 2522 .chained = true, 2523 .chain_id = STAC_92HD71BXX_HP, 2524 }, 2525 [STAC_HP_DV4] = { 2526 .type = HDA_FIXUP_FUNC, 2527 .v.func = stac92hd71bxx_fixup_hp_dv4, 2528 .chained = true, 2529 .chain_id = STAC_HP_DV5, 2530 }, 2531 [STAC_HP_DV5] = { 2532 .type = HDA_FIXUP_FUNC, 2533 .v.func = stac92hd71bxx_fixup_hp_dv5, 2534 .chained = true, 2535 .chain_id = STAC_92HD71BXX_HP, 2536 }, 2537 [STAC_HP_HDX] = { 2538 .type = HDA_FIXUP_FUNC, 2539 .v.func = stac92hd71bxx_fixup_hp_hdx, 2540 .chained = true, 2541 .chain_id = STAC_92HD71BXX_HP, 2542 }, 2543 [STAC_92HD71BXX_HP] = { 2544 .type = HDA_FIXUP_FUNC, 2545 .v.func = stac92hd71bxx_fixup_hp, 2546 }, 2547 }; 2548 2549 static const struct hda_model_fixup stac92hd71bxx_models[] = { 2550 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 2551 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 2552 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 2553 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 2554 { .id = STAC_HP_M4, .name = "hp-m4" }, 2555 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 2556 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 2557 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 2558 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 2559 {} 2560 }; 2561 2562 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 2563 /* SigmaTel reference board */ 2564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2565 "DFI LanParty", STAC_92HD71BXX_REF), 2566 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2567 "DFI LanParty", STAC_92HD71BXX_REF), 2568 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 2569 "HP", STAC_HP_DV5), 2570 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 2571 "HP", STAC_HP_DV5), 2572 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 2573 "HP dv4-7", STAC_HP_DV4), 2574 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 2575 "HP dv4-7", STAC_HP_DV5), 2576 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 2577 "HP HDX", STAC_HP_HDX), /* HDX18 */ 2578 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 2579 "HP mini 1000", STAC_HP_M4), 2580 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 2581 "HP HDX", STAC_HP_HDX), /* HDX16 */ 2582 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 2583 "HP dv6", STAC_HP_DV5), 2584 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 2585 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 2586 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 2587 "HP DV6", STAC_HP_DV5), 2588 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 2589 "HP", STAC_HP_DV5), 2590 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 2591 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 2592 "unknown Dell", STAC_DELL_M4_1), 2593 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 2594 "unknown Dell", STAC_DELL_M4_1), 2595 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 2596 "unknown Dell", STAC_DELL_M4_1), 2597 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 2598 "unknown Dell", STAC_DELL_M4_1), 2599 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 2600 "unknown Dell", STAC_DELL_M4_1), 2601 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 2602 "unknown Dell", STAC_DELL_M4_1), 2603 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 2604 "unknown Dell", STAC_DELL_M4_1), 2605 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 2606 "unknown Dell", STAC_DELL_M4_2), 2607 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 2608 "unknown Dell", STAC_DELL_M4_2), 2609 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 2610 "unknown Dell", STAC_DELL_M4_2), 2611 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 2612 "unknown Dell", STAC_DELL_M4_2), 2613 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 2614 "unknown Dell", STAC_DELL_M4_3), 2615 {} /* terminator */ 2616 }; 2617 2618 static const struct hda_pintbl ref922x_pin_configs[] = { 2619 { 0x0a, 0x01014010 }, 2620 { 0x0b, 0x01016011 }, 2621 { 0x0c, 0x01012012 }, 2622 { 0x0d, 0x0221401f }, 2623 { 0x0e, 0x01813122 }, 2624 { 0x0f, 0x01011014 }, 2625 { 0x10, 0x01441030 }, 2626 { 0x11, 0x01c41030 }, 2627 { 0x15, 0x40000100 }, 2628 { 0x1b, 0x40000100 }, 2629 {} 2630 }; 2631 2632 /* 2633 STAC 922X pin configs for 2634 102801A7 2635 102801AB 2636 102801A9 2637 102801D1 2638 102801D2 2639 */ 2640 static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 2641 { 0x0a, 0x02214030 }, 2642 { 0x0b, 0x01a19021 }, 2643 { 0x0c, 0x01111012 }, 2644 { 0x0d, 0x01114010 }, 2645 { 0x0e, 0x02a19020 }, 2646 { 0x0f, 0x01117011 }, 2647 { 0x10, 0x400001f0 }, 2648 { 0x11, 0x400001f1 }, 2649 { 0x15, 0x01813122 }, 2650 { 0x1b, 0x400001f2 }, 2651 {} 2652 }; 2653 2654 /* 2655 STAC 922X pin configs for 2656 102801AC 2657 102801D0 2658 */ 2659 static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 2660 { 0x0a, 0x02214030 }, 2661 { 0x0b, 0x01a19021 }, 2662 { 0x0c, 0x01111012 }, 2663 { 0x0d, 0x01114010 }, 2664 { 0x0e, 0x02a19020 }, 2665 { 0x0f, 0x01117011 }, 2666 { 0x10, 0x01451140 }, 2667 { 0x11, 0x400001f0 }, 2668 { 0x15, 0x01813122 }, 2669 { 0x1b, 0x400001f1 }, 2670 {} 2671 }; 2672 2673 /* 2674 STAC 922X pin configs for 2675 102801BF 2676 */ 2677 static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 2678 { 0x0a, 0x0321101f }, 2679 { 0x0b, 0x01112024 }, 2680 { 0x0c, 0x01111222 }, 2681 { 0x0d, 0x91174220 }, 2682 { 0x0e, 0x03a11050 }, 2683 { 0x0f, 0x01116221 }, 2684 { 0x10, 0x90a70330 }, 2685 { 0x11, 0x01452340 }, 2686 { 0x15, 0x40C003f1 }, 2687 { 0x1b, 0x405003f0 }, 2688 {} 2689 }; 2690 2691 /* 2692 STAC 9221 A1 pin configs for 2693 102801D7 (Dell XPS M1210) 2694 */ 2695 static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 2696 { 0x0a, 0x02211211 }, 2697 { 0x0b, 0x408103ff }, 2698 { 0x0c, 0x02a1123e }, 2699 { 0x0d, 0x90100310 }, 2700 { 0x0e, 0x408003f1 }, 2701 { 0x0f, 0x0221121f }, 2702 { 0x10, 0x03451340 }, 2703 { 0x11, 0x40c003f2 }, 2704 { 0x15, 0x508003f3 }, 2705 { 0x1b, 0x405003f4 }, 2706 {} 2707 }; 2708 2709 static const struct hda_pintbl d945gtp3_pin_configs[] = { 2710 { 0x0a, 0x0221401f }, 2711 { 0x0b, 0x01a19022 }, 2712 { 0x0c, 0x01813021 }, 2713 { 0x0d, 0x01014010 }, 2714 { 0x0e, 0x40000100 }, 2715 { 0x0f, 0x40000100 }, 2716 { 0x10, 0x40000100 }, 2717 { 0x11, 0x40000100 }, 2718 { 0x15, 0x02a19120 }, 2719 { 0x1b, 0x40000100 }, 2720 {} 2721 }; 2722 2723 static const struct hda_pintbl d945gtp5_pin_configs[] = { 2724 { 0x0a, 0x0221401f }, 2725 { 0x0b, 0x01011012 }, 2726 { 0x0c, 0x01813024 }, 2727 { 0x0d, 0x01014010 }, 2728 { 0x0e, 0x01a19021 }, 2729 { 0x0f, 0x01016011 }, 2730 { 0x10, 0x01452130 }, 2731 { 0x11, 0x40000100 }, 2732 { 0x15, 0x02a19320 }, 2733 { 0x1b, 0x40000100 }, 2734 {} 2735 }; 2736 2737 static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 2738 { 0x0a, 0x0121e21f }, 2739 { 0x0b, 0x400000ff }, 2740 { 0x0c, 0x9017e110 }, 2741 { 0x0d, 0x400000fd }, 2742 { 0x0e, 0x400000fe }, 2743 { 0x0f, 0x0181e020 }, 2744 { 0x10, 0x1145e030 }, 2745 { 0x11, 0x11c5e240 }, 2746 { 0x15, 0x400000fc }, 2747 { 0x1b, 0x400000fb }, 2748 {} 2749 }; 2750 2751 static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 2752 { 0x0a, 0x0121e21f }, 2753 { 0x0b, 0x90a7012e }, 2754 { 0x0c, 0x9017e110 }, 2755 { 0x0d, 0x400000fd }, 2756 { 0x0e, 0x400000fe }, 2757 { 0x0f, 0x0181e020 }, 2758 { 0x10, 0x1145e230 }, 2759 { 0x11, 0x500000fa }, 2760 { 0x15, 0x400000fc }, 2761 { 0x1b, 0x400000fb }, 2762 {} 2763 }; 2764 2765 static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 2766 { 0x0a, 0x0121e21f }, 2767 { 0x0b, 0x90a7012e }, 2768 { 0x0c, 0x9017e110 }, 2769 { 0x0d, 0x400000fd }, 2770 { 0x0e, 0x400000fe }, 2771 { 0x0f, 0x0181e020 }, 2772 { 0x10, 0x1145e230 }, 2773 { 0x11, 0x11c5e240 }, 2774 { 0x15, 0x400000fc }, 2775 { 0x1b, 0x400000fb }, 2776 {} 2777 }; 2778 2779 static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 2780 { 0x0a, 0x0321e21f }, 2781 { 0x0b, 0x03a1e02e }, 2782 { 0x0c, 0x9017e110 }, 2783 { 0x0d, 0x9017e11f }, 2784 { 0x0e, 0x400000fe }, 2785 { 0x0f, 0x0381e020 }, 2786 { 0x10, 0x1345e230 }, 2787 { 0x11, 0x13c5e240 }, 2788 { 0x15, 0x400000fc }, 2789 { 0x1b, 0x400000fb }, 2790 {} 2791 }; 2792 2793 static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 2794 { 0x0a, 0x0321e21f }, 2795 { 0x0b, 0x03a1e02e }, 2796 { 0x0c, 0x9017e110 }, 2797 { 0x0d, 0x9017e11f }, 2798 { 0x0e, 0x400000fe }, 2799 { 0x0f, 0x0381e020 }, 2800 { 0x10, 0x1345e230 }, 2801 { 0x11, 0x13c5e240 }, 2802 { 0x15, 0x400000fc }, 2803 { 0x1b, 0x400000fb }, 2804 {} 2805 }; 2806 2807 static const struct hda_pintbl ecs202_pin_configs[] = { 2808 { 0x0a, 0x0221401f }, 2809 { 0x0b, 0x02a19020 }, 2810 { 0x0c, 0x01a19020 }, 2811 { 0x0d, 0x01114010 }, 2812 { 0x0e, 0x408000f0 }, 2813 { 0x0f, 0x01813022 }, 2814 { 0x10, 0x074510a0 }, 2815 { 0x11, 0x40c400f1 }, 2816 { 0x15, 0x9037012e }, 2817 { 0x1b, 0x40e000f2 }, 2818 {} 2819 }; 2820 2821 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 2822 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 2823 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 2824 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 2825 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 2826 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 2827 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 2828 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 2829 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 2830 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 2831 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 2832 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 2833 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 2834 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 2835 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 2836 {} 2837 }; 2838 2839 static const struct hda_fixup stac922x_fixups[]; 2840 2841 /* remap the fixup from codec SSID and apply it */ 2842 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 2843 const struct hda_fixup *fix, 2844 int action) 2845 { 2846 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2847 return; 2848 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 2849 stac922x_fixups); 2850 if (codec->fixup_id != STAC_INTEL_MAC_AUTO) 2851 snd_hda_apply_fixup(codec, action); 2852 } 2853 2854 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 2855 const struct hda_fixup *fix, 2856 int action) 2857 { 2858 struct sigmatel_spec *spec = codec->spec; 2859 2860 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2861 spec->gpio_mask = spec->gpio_dir = 0x03; 2862 spec->gpio_data = 0x03; 2863 } 2864 } 2865 2866 static const struct hda_fixup stac922x_fixups[] = { 2867 [STAC_D945_REF] = { 2868 .type = HDA_FIXUP_PINS, 2869 .v.pins = ref922x_pin_configs, 2870 }, 2871 [STAC_D945GTP3] = { 2872 .type = HDA_FIXUP_PINS, 2873 .v.pins = d945gtp3_pin_configs, 2874 }, 2875 [STAC_D945GTP5] = { 2876 .type = HDA_FIXUP_PINS, 2877 .v.pins = d945gtp5_pin_configs, 2878 }, 2879 [STAC_INTEL_MAC_AUTO] = { 2880 .type = HDA_FIXUP_FUNC, 2881 .v.func = stac922x_fixup_intel_mac_auto, 2882 }, 2883 [STAC_INTEL_MAC_V1] = { 2884 .type = HDA_FIXUP_PINS, 2885 .v.pins = intel_mac_v1_pin_configs, 2886 .chained = true, 2887 .chain_id = STAC_922X_INTEL_MAC_GPIO, 2888 }, 2889 [STAC_INTEL_MAC_V2] = { 2890 .type = HDA_FIXUP_PINS, 2891 .v.pins = intel_mac_v2_pin_configs, 2892 .chained = true, 2893 .chain_id = STAC_922X_INTEL_MAC_GPIO, 2894 }, 2895 [STAC_INTEL_MAC_V3] = { 2896 .type = HDA_FIXUP_PINS, 2897 .v.pins = intel_mac_v3_pin_configs, 2898 .chained = true, 2899 .chain_id = STAC_922X_INTEL_MAC_GPIO, 2900 }, 2901 [STAC_INTEL_MAC_V4] = { 2902 .type = HDA_FIXUP_PINS, 2903 .v.pins = intel_mac_v4_pin_configs, 2904 .chained = true, 2905 .chain_id = STAC_922X_INTEL_MAC_GPIO, 2906 }, 2907 [STAC_INTEL_MAC_V5] = { 2908 .type = HDA_FIXUP_PINS, 2909 .v.pins = intel_mac_v5_pin_configs, 2910 .chained = true, 2911 .chain_id = STAC_922X_INTEL_MAC_GPIO, 2912 }, 2913 [STAC_922X_INTEL_MAC_GPIO] = { 2914 .type = HDA_FIXUP_FUNC, 2915 .v.func = stac922x_fixup_intel_mac_gpio, 2916 }, 2917 [STAC_ECS_202] = { 2918 .type = HDA_FIXUP_PINS, 2919 .v.pins = ecs202_pin_configs, 2920 }, 2921 [STAC_922X_DELL_D81] = { 2922 .type = HDA_FIXUP_PINS, 2923 .v.pins = dell_922x_d81_pin_configs, 2924 }, 2925 [STAC_922X_DELL_D82] = { 2926 .type = HDA_FIXUP_PINS, 2927 .v.pins = dell_922x_d82_pin_configs, 2928 }, 2929 [STAC_922X_DELL_M81] = { 2930 .type = HDA_FIXUP_PINS, 2931 .v.pins = dell_922x_m81_pin_configs, 2932 }, 2933 [STAC_922X_DELL_M82] = { 2934 .type = HDA_FIXUP_PINS, 2935 .v.pins = dell_922x_m82_pin_configs, 2936 }, 2937 }; 2938 2939 static const struct hda_model_fixup stac922x_models[] = { 2940 { .id = STAC_D945_REF, .name = "ref" }, 2941 { .id = STAC_D945GTP5, .name = "5stack" }, 2942 { .id = STAC_D945GTP3, .name = "3stack" }, 2943 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 2944 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 2945 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 2946 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 2947 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 2948 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 2949 { .id = STAC_ECS_202, .name = "ecs202" }, 2950 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 2951 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 2952 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 2953 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 2954 /* for backward compatibility */ 2955 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 2956 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 2957 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 2958 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 2959 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 2960 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 2961 {} 2962 }; 2963 2964 static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 2965 /* SigmaTel reference board */ 2966 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2967 "DFI LanParty", STAC_D945_REF), 2968 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2969 "DFI LanParty", STAC_D945_REF), 2970 /* Intel 945G based systems */ 2971 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 2972 "Intel D945G", STAC_D945GTP3), 2973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 2974 "Intel D945G", STAC_D945GTP3), 2975 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 2976 "Intel D945G", STAC_D945GTP3), 2977 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 2978 "Intel D945G", STAC_D945GTP3), 2979 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 2980 "Intel D945G", STAC_D945GTP3), 2981 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 2982 "Intel D945G", STAC_D945GTP3), 2983 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 2984 "Intel D945G", STAC_D945GTP3), 2985 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 2986 "Intel D945G", STAC_D945GTP3), 2987 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 2988 "Intel D945G", STAC_D945GTP3), 2989 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 2990 "Intel D945G", STAC_D945GTP3), 2991 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 2992 "Intel D945G", STAC_D945GTP3), 2993 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 2994 "Intel D945G", STAC_D945GTP3), 2995 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 2996 "Intel D945G", STAC_D945GTP3), 2997 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 2998 "Intel D945G", STAC_D945GTP3), 2999 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3000 "Intel D945G", STAC_D945GTP3), 3001 /* Intel D945G 5-stack systems */ 3002 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3003 "Intel D945G", STAC_D945GTP5), 3004 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3005 "Intel D945G", STAC_D945GTP5), 3006 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3007 "Intel D945G", STAC_D945GTP5), 3008 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3009 "Intel D945G", STAC_D945GTP5), 3010 /* Intel 945P based systems */ 3011 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3012 "Intel D945P", STAC_D945GTP3), 3013 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3014 "Intel D945P", STAC_D945GTP3), 3015 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3016 "Intel D945P", STAC_D945GTP3), 3017 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3018 "Intel D945P", STAC_D945GTP3), 3019 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3020 "Intel D945P", STAC_D945GTP3), 3021 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3022 "Intel D945P", STAC_D945GTP5), 3023 /* other intel */ 3024 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3025 "Intel D945", STAC_D945_REF), 3026 /* other systems */ 3027 3028 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3029 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3030 3031 /* Dell systems */ 3032 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3033 "unknown Dell", STAC_922X_DELL_D81), 3034 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3035 "unknown Dell", STAC_922X_DELL_D81), 3036 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3037 "unknown Dell", STAC_922X_DELL_D81), 3038 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3039 "unknown Dell", STAC_922X_DELL_D82), 3040 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3041 "unknown Dell", STAC_922X_DELL_M81), 3042 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3043 "unknown Dell", STAC_922X_DELL_D82), 3044 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3045 "unknown Dell", STAC_922X_DELL_D81), 3046 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3047 "unknown Dell", STAC_922X_DELL_D81), 3048 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3049 "Dell XPS M1210", STAC_922X_DELL_M82), 3050 /* ECS/PC Chips boards */ 3051 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3052 "ECS/PC chips", STAC_ECS_202), 3053 {} /* terminator */ 3054 }; 3055 3056 static const struct hda_pintbl ref927x_pin_configs[] = { 3057 { 0x0a, 0x02214020 }, 3058 { 0x0b, 0x02a19080 }, 3059 { 0x0c, 0x0181304e }, 3060 { 0x0d, 0x01014010 }, 3061 { 0x0e, 0x01a19040 }, 3062 { 0x0f, 0x01011012 }, 3063 { 0x10, 0x01016011 }, 3064 { 0x11, 0x0101201f }, 3065 { 0x12, 0x183301f0 }, 3066 { 0x13, 0x18a001f0 }, 3067 { 0x14, 0x18a001f0 }, 3068 { 0x21, 0x01442070 }, 3069 { 0x22, 0x01c42190 }, 3070 { 0x23, 0x40000100 }, 3071 {} 3072 }; 3073 3074 static const struct hda_pintbl d965_3st_pin_configs[] = { 3075 { 0x0a, 0x0221401f }, 3076 { 0x0b, 0x02a19120 }, 3077 { 0x0c, 0x40000100 }, 3078 { 0x0d, 0x01014011 }, 3079 { 0x0e, 0x01a19021 }, 3080 { 0x0f, 0x01813024 }, 3081 { 0x10, 0x40000100 }, 3082 { 0x11, 0x40000100 }, 3083 { 0x12, 0x40000100 }, 3084 { 0x13, 0x40000100 }, 3085 { 0x14, 0x40000100 }, 3086 { 0x21, 0x40000100 }, 3087 { 0x22, 0x40000100 }, 3088 { 0x23, 0x40000100 }, 3089 {} 3090 }; 3091 3092 static const struct hda_pintbl d965_5st_pin_configs[] = { 3093 { 0x0a, 0x02214020 }, 3094 { 0x0b, 0x02a19080 }, 3095 { 0x0c, 0x0181304e }, 3096 { 0x0d, 0x01014010 }, 3097 { 0x0e, 0x01a19040 }, 3098 { 0x0f, 0x01011012 }, 3099 { 0x10, 0x01016011 }, 3100 { 0x11, 0x40000100 }, 3101 { 0x12, 0x40000100 }, 3102 { 0x13, 0x40000100 }, 3103 { 0x14, 0x40000100 }, 3104 { 0x21, 0x01442070 }, 3105 { 0x22, 0x40000100 }, 3106 { 0x23, 0x40000100 }, 3107 {} 3108 }; 3109 3110 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3111 { 0x0a, 0x40000100 }, 3112 { 0x0b, 0x40000100 }, 3113 { 0x0c, 0x0181304e }, 3114 { 0x0d, 0x01014010 }, 3115 { 0x0e, 0x01a19040 }, 3116 { 0x0f, 0x01011012 }, 3117 { 0x10, 0x01016011 }, 3118 { 0x11, 0x40000100 }, 3119 { 0x12, 0x40000100 }, 3120 { 0x13, 0x40000100 }, 3121 { 0x14, 0x40000100 }, 3122 { 0x21, 0x01442070 }, 3123 { 0x22, 0x40000100 }, 3124 { 0x23, 0x40000100 }, 3125 {} 3126 }; 3127 3128 static const struct hda_pintbl dell_3st_pin_configs[] = { 3129 { 0x0a, 0x02211230 }, 3130 { 0x0b, 0x02a11220 }, 3131 { 0x0c, 0x01a19040 }, 3132 { 0x0d, 0x01114210 }, 3133 { 0x0e, 0x01111212 }, 3134 { 0x0f, 0x01116211 }, 3135 { 0x10, 0x01813050 }, 3136 { 0x11, 0x01112214 }, 3137 { 0x12, 0x403003fa }, 3138 { 0x13, 0x90a60040 }, 3139 { 0x14, 0x90a60040 }, 3140 { 0x21, 0x404003fb }, 3141 { 0x22, 0x40c003fc }, 3142 { 0x23, 0x40000100 }, 3143 {} 3144 }; 3145 3146 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3147 const struct hda_fixup *fix, int action) 3148 { 3149 /* no jack detecion for ref-no-jd model */ 3150 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3151 codec->no_jack_detect = 1; 3152 } 3153 3154 static void stac927x_fixup_ref(struct hda_codec *codec, 3155 const struct hda_fixup *fix, int action) 3156 { 3157 struct sigmatel_spec *spec = codec->spec; 3158 3159 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3160 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3161 spec->eapd_mask = spec->gpio_mask = 0; 3162 spec->gpio_dir = spec->gpio_data = 0; 3163 } 3164 } 3165 3166 static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3167 const struct hda_fixup *fix, int action) 3168 { 3169 struct sigmatel_spec *spec = codec->spec; 3170 3171 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3172 return; 3173 3174 if (codec->subsystem_id != 0x1028022f) { 3175 /* GPIO2 High = Enable EAPD */ 3176 spec->eapd_mask = spec->gpio_mask = 0x04; 3177 spec->gpio_dir = spec->gpio_data = 0x04; 3178 } 3179 3180 snd_hda_add_verbs(codec, dell_3st_core_init); 3181 spec->volknob_init = 1; 3182 } 3183 3184 static void stac927x_fixup_volknob(struct hda_codec *codec, 3185 const struct hda_fixup *fix, int action) 3186 { 3187 struct sigmatel_spec *spec = codec->spec; 3188 3189 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3190 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3191 spec->volknob_init = 1; 3192 } 3193 } 3194 3195 static const struct hda_fixup stac927x_fixups[] = { 3196 [STAC_D965_REF_NO_JD] = { 3197 .type = HDA_FIXUP_FUNC, 3198 .v.func = stac927x_fixup_ref_no_jd, 3199 .chained = true, 3200 .chain_id = STAC_D965_REF, 3201 }, 3202 [STAC_D965_REF] = { 3203 .type = HDA_FIXUP_FUNC, 3204 .v.func = stac927x_fixup_ref, 3205 }, 3206 [STAC_D965_3ST] = { 3207 .type = HDA_FIXUP_PINS, 3208 .v.pins = d965_3st_pin_configs, 3209 .chained = true, 3210 .chain_id = STAC_D965_VERBS, 3211 }, 3212 [STAC_D965_5ST] = { 3213 .type = HDA_FIXUP_PINS, 3214 .v.pins = d965_5st_pin_configs, 3215 .chained = true, 3216 .chain_id = STAC_D965_VERBS, 3217 }, 3218 [STAC_D965_VERBS] = { 3219 .type = HDA_FIXUP_VERBS, 3220 .v.verbs = d965_core_init, 3221 }, 3222 [STAC_D965_5ST_NO_FP] = { 3223 .type = HDA_FIXUP_PINS, 3224 .v.pins = d965_5st_no_fp_pin_configs, 3225 }, 3226 [STAC_DELL_3ST] = { 3227 .type = HDA_FIXUP_PINS, 3228 .v.pins = dell_3st_pin_configs, 3229 .chained = true, 3230 .chain_id = STAC_927X_DELL_DMIC, 3231 }, 3232 [STAC_DELL_BIOS] = { 3233 .type = HDA_FIXUP_PINS, 3234 .v.pins = (const struct hda_pintbl[]) { 3235 /* correct the front output jack as a hp out */ 3236 { 0x0f, 0x0221101f }, 3237 /* correct the front input jack as a mic */ 3238 { 0x0e, 0x02a79130 }, 3239 {} 3240 }, 3241 .chained = true, 3242 .chain_id = STAC_927X_DELL_DMIC, 3243 }, 3244 [STAC_DELL_BIOS_AMIC] = { 3245 .type = HDA_FIXUP_PINS, 3246 .v.pins = (const struct hda_pintbl[]) { 3247 /* configure the analog microphone on some laptops */ 3248 { 0x0c, 0x90a79130 }, 3249 {} 3250 }, 3251 .chained = true, 3252 .chain_id = STAC_DELL_BIOS, 3253 }, 3254 [STAC_DELL_BIOS_SPDIF] = { 3255 .type = HDA_FIXUP_PINS, 3256 .v.pins = (const struct hda_pintbl[]) { 3257 /* correct the device field to SPDIF out */ 3258 { 0x21, 0x01442070 }, 3259 {} 3260 }, 3261 .chained = true, 3262 .chain_id = STAC_DELL_BIOS, 3263 }, 3264 [STAC_927X_DELL_DMIC] = { 3265 .type = HDA_FIXUP_FUNC, 3266 .v.func = stac927x_fixup_dell_dmic, 3267 }, 3268 [STAC_927X_VOLKNOB] = { 3269 .type = HDA_FIXUP_FUNC, 3270 .v.func = stac927x_fixup_volknob, 3271 }, 3272 }; 3273 3274 static const struct hda_model_fixup stac927x_models[] = { 3275 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3276 { .id = STAC_D965_REF, .name = "ref" }, 3277 { .id = STAC_D965_3ST, .name = "3stack" }, 3278 { .id = STAC_D965_5ST, .name = "5stack" }, 3279 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3280 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3281 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3282 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3283 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3284 {} 3285 }; 3286 3287 static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3288 /* SigmaTel reference board */ 3289 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3290 "DFI LanParty", STAC_D965_REF), 3291 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3292 "DFI LanParty", STAC_D965_REF), 3293 /* Intel 946 based systems */ 3294 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3295 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3296 /* 965 based 3 stack systems */ 3297 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3298 "Intel D965", STAC_D965_3ST), 3299 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3300 "Intel D965", STAC_D965_3ST), 3301 /* Dell 3 stack systems */ 3302 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3303 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3304 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3305 /* Dell 3 stack systems with verb table in BIOS */ 3306 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3307 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3308 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3309 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3310 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3311 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3312 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3313 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 3314 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 3315 /* 965 based 5 stack systems */ 3316 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 3317 "Intel D965", STAC_D965_5ST), 3318 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 3319 "Intel D965", STAC_D965_5ST), 3320 /* volume-knob fixes */ 3321 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 3322 {} /* terminator */ 3323 }; 3324 3325 static const struct hda_pintbl ref9205_pin_configs[] = { 3326 { 0x0a, 0x40000100 }, 3327 { 0x0b, 0x40000100 }, 3328 { 0x0c, 0x01016011 }, 3329 { 0x0d, 0x01014010 }, 3330 { 0x0e, 0x01813122 }, 3331 { 0x0f, 0x01a19021 }, 3332 { 0x14, 0x01019020 }, 3333 { 0x16, 0x40000100 }, 3334 { 0x17, 0x90a000f0 }, 3335 { 0x18, 0x90a000f0 }, 3336 { 0x21, 0x01441030 }, 3337 { 0x22, 0x01c41030 }, 3338 {} 3339 }; 3340 3341 /* 3342 STAC 9205 pin configs for 3343 102801F1 3344 102801F2 3345 102801FC 3346 102801FD 3347 10280204 3348 1028021F 3349 10280228 (Dell Vostro 1500) 3350 10280229 (Dell Vostro 1700) 3351 */ 3352 static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 3353 { 0x0a, 0x0321101F }, 3354 { 0x0b, 0x03A11020 }, 3355 { 0x0c, 0x400003FA }, 3356 { 0x0d, 0x90170310 }, 3357 { 0x0e, 0x400003FB }, 3358 { 0x0f, 0x400003FC }, 3359 { 0x14, 0x400003FD }, 3360 { 0x16, 0x40F000F9 }, 3361 { 0x17, 0x90A60330 }, 3362 { 0x18, 0x400003FF }, 3363 { 0x21, 0x0144131F }, 3364 { 0x22, 0x40C003FE }, 3365 {} 3366 }; 3367 3368 /* 3369 STAC 9205 pin configs for 3370 102801F9 3371 102801FA 3372 102801FE 3373 102801FF (Dell Precision M4300) 3374 10280206 3375 10280200 3376 10280201 3377 */ 3378 static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 3379 { 0x0a, 0x0321101f }, 3380 { 0x0b, 0x03a11020 }, 3381 { 0x0c, 0x90a70330 }, 3382 { 0x0d, 0x90170310 }, 3383 { 0x0e, 0x400000fe }, 3384 { 0x0f, 0x400000ff }, 3385 { 0x14, 0x400000fd }, 3386 { 0x16, 0x40f000f9 }, 3387 { 0x17, 0x400000fa }, 3388 { 0x18, 0x400000fc }, 3389 { 0x21, 0x0144131f }, 3390 { 0x22, 0x40c003f8 }, 3391 /* Enable SPDIF in/out */ 3392 { 0x1f, 0x01441030 }, 3393 { 0x20, 0x1c410030 }, 3394 {} 3395 }; 3396 3397 static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 3398 { 0x0a, 0x0421101f }, 3399 { 0x0b, 0x04a11020 }, 3400 { 0x0c, 0x400003fa }, 3401 { 0x0d, 0x90170310 }, 3402 { 0x0e, 0x400003fb }, 3403 { 0x0f, 0x400003fc }, 3404 { 0x14, 0x400003fd }, 3405 { 0x16, 0x400003f9 }, 3406 { 0x17, 0x90a60330 }, 3407 { 0x18, 0x400003ff }, 3408 { 0x21, 0x01441340 }, 3409 { 0x22, 0x40c003fe }, 3410 {} 3411 }; 3412 3413 static void stac9205_fixup_ref(struct hda_codec *codec, 3414 const struct hda_fixup *fix, int action) 3415 { 3416 struct sigmatel_spec *spec = codec->spec; 3417 3418 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3419 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 3420 /* SPDIF-In enabled */ 3421 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 3422 } 3423 } 3424 3425 static void stac9205_fixup_dell_m43(struct hda_codec *codec, 3426 const struct hda_fixup *fix, int action) 3427 { 3428 struct sigmatel_spec *spec = codec->spec; 3429 struct hda_jack_tbl *jack; 3430 3431 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3432 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 3433 3434 /* Enable unsol response for GPIO4/Dock HP connection */ 3435 snd_hda_codec_write_cache(codec, codec->afg, 0, 3436 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 3437 snd_hda_jack_detect_enable_callback(codec, codec->afg, 3438 STAC_VREF_EVENT, 3439 stac_vref_event); 3440 jack = snd_hda_jack_tbl_get(codec, codec->afg); 3441 if (jack) 3442 jack->private_data = 0x01; 3443 3444 spec->gpio_dir = 0x0b; 3445 spec->eapd_mask = 0x01; 3446 spec->gpio_mask = 0x1b; 3447 spec->gpio_mute = 0x10; 3448 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 3449 * GPIO3 Low = DRM 3450 */ 3451 spec->gpio_data = 0x01; 3452 } 3453 } 3454 3455 static void stac9205_fixup_eapd(struct hda_codec *codec, 3456 const struct hda_fixup *fix, int action) 3457 { 3458 struct sigmatel_spec *spec = codec->spec; 3459 3460 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3461 spec->eapd_switch = 0; 3462 } 3463 3464 static const struct hda_fixup stac9205_fixups[] = { 3465 [STAC_9205_REF] = { 3466 .type = HDA_FIXUP_FUNC, 3467 .v.func = stac9205_fixup_ref, 3468 }, 3469 [STAC_9205_DELL_M42] = { 3470 .type = HDA_FIXUP_PINS, 3471 .v.pins = dell_9205_m42_pin_configs, 3472 }, 3473 [STAC_9205_DELL_M43] = { 3474 .type = HDA_FIXUP_FUNC, 3475 .v.func = stac9205_fixup_dell_m43, 3476 }, 3477 [STAC_9205_DELL_M44] = { 3478 .type = HDA_FIXUP_PINS, 3479 .v.pins = dell_9205_m44_pin_configs, 3480 }, 3481 [STAC_9205_EAPD] = { 3482 .type = HDA_FIXUP_FUNC, 3483 .v.func = stac9205_fixup_eapd, 3484 }, 3485 {} 3486 }; 3487 3488 static const struct hda_model_fixup stac9205_models[] = { 3489 { .id = STAC_9205_REF, .name = "ref" }, 3490 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 3491 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 3492 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 3493 { .id = STAC_9205_EAPD, .name = "eapd" }, 3494 {} 3495 }; 3496 3497 static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 3498 /* SigmaTel reference board */ 3499 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3500 "DFI LanParty", STAC_9205_REF), 3501 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 3502 "SigmaTel", STAC_9205_REF), 3503 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3504 "DFI LanParty", STAC_9205_REF), 3505 /* Dell */ 3506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 3507 "unknown Dell", STAC_9205_DELL_M42), 3508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 3509 "unknown Dell", STAC_9205_DELL_M42), 3510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 3511 "Dell Precision", STAC_9205_DELL_M43), 3512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 3513 "Dell Precision", STAC_9205_DELL_M43), 3514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 3515 "Dell Precision", STAC_9205_DELL_M43), 3516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 3517 "unknown Dell", STAC_9205_DELL_M42), 3518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 3519 "unknown Dell", STAC_9205_DELL_M42), 3520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 3521 "Dell Precision", STAC_9205_DELL_M43), 3522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 3523 "Dell Precision M4300", STAC_9205_DELL_M43), 3524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 3525 "unknown Dell", STAC_9205_DELL_M42), 3526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 3527 "Dell Precision", STAC_9205_DELL_M43), 3528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 3529 "Dell Precision", STAC_9205_DELL_M43), 3530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 3531 "Dell Precision", STAC_9205_DELL_M43), 3532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 3533 "Dell Inspiron", STAC_9205_DELL_M44), 3534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 3535 "Dell Vostro 1500", STAC_9205_DELL_M42), 3536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 3537 "Dell Vostro 1700", STAC_9205_DELL_M42), 3538 /* Gateway */ 3539 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 3540 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 3541 {} /* terminator */ 3542 }; 3543 3544 static int stac_parse_auto_config(struct hda_codec *codec) 3545 { 3546 struct sigmatel_spec *spec = codec->spec; 3547 int err; 3548 int flags = 0; 3549 3550 if (spec->headset_jack) 3551 flags |= HDA_PINCFG_HEADSET_MIC; 3552 3553 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 3554 if (err < 0) 3555 return err; 3556 3557 /* add hooks */ 3558 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 3559 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 3560 3561 spec->gen.automute_hook = stac_update_outputs; 3562 spec->gen.hp_automute_hook = stac_hp_automute; 3563 spec->gen.line_automute_hook = stac_line_automute; 3564 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch; 3565 3566 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 3567 if (err < 0) 3568 return err; 3569 3570 /* minimum value is actually mute */ 3571 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE; 3572 3573 /* setup analog beep controls */ 3574 if (spec->anabeep_nid > 0) { 3575 err = stac_auto_create_beep_ctls(codec, 3576 spec->anabeep_nid); 3577 if (err < 0) 3578 return err; 3579 } 3580 3581 /* setup digital beep controls and input device */ 3582 #ifdef CONFIG_SND_HDA_INPUT_BEEP 3583 if (spec->gen.beep_nid) { 3584 hda_nid_t nid = spec->gen.beep_nid; 3585 unsigned int caps; 3586 3587 err = stac_auto_create_beep_ctls(codec, nid); 3588 if (err < 0) 3589 return err; 3590 if (codec->beep) { 3591 /* IDT/STAC codecs have linear beep tone parameter */ 3592 codec->beep->linear_tone = spec->linear_tone_beep; 3593 /* if no beep switch is available, make its own one */ 3594 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 3595 if (!(caps & AC_AMPCAP_MUTE)) { 3596 err = stac_beep_switch_ctl(codec); 3597 if (err < 0) 3598 return err; 3599 } 3600 } 3601 } 3602 #endif 3603 3604 if (spec->gpio_led) 3605 spec->gen.vmaster_mute.hook = stac_vmaster_hook; 3606 3607 if (spec->aloopback_ctl && 3608 snd_hda_get_bool_hint(codec, "loopback") == 1) { 3609 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 3610 return -ENOMEM; 3611 } 3612 3613 if (spec->have_spdif_mux) { 3614 err = stac_create_spdif_mux_ctls(codec); 3615 if (err < 0) 3616 return err; 3617 } 3618 3619 stac_init_power_map(codec); 3620 3621 return 0; 3622 } 3623 3624 3625 static int stac_init(struct hda_codec *codec) 3626 { 3627 struct sigmatel_spec *spec = codec->spec; 3628 int i; 3629 3630 /* override some hints */ 3631 stac_store_hints(codec); 3632 3633 /* set up GPIO */ 3634 /* turn on EAPD statically when spec->eapd_switch isn't set. 3635 * otherwise, unsol event will turn it on/off dynamically 3636 */ 3637 if (!spec->eapd_switch) 3638 spec->gpio_data |= spec->eapd_mask; 3639 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 3640 3641 snd_hda_gen_init(codec); 3642 3643 /* sync the power-map */ 3644 if (spec->num_pwrs) 3645 snd_hda_codec_write(codec, codec->afg, 0, 3646 AC_VERB_IDT_SET_POWER_MAP, 3647 spec->power_map_bits); 3648 3649 /* power down inactive ADCs */ 3650 if (spec->powerdown_adcs) { 3651 for (i = 0; i < spec->gen.num_all_adcs; i++) { 3652 if (spec->active_adcs & (1 << i)) 3653 continue; 3654 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 3655 AC_VERB_SET_POWER_STATE, 3656 AC_PWRST_D3); 3657 } 3658 } 3659 3660 return 0; 3661 } 3662 3663 static void stac_shutup(struct hda_codec *codec) 3664 { 3665 struct sigmatel_spec *spec = codec->spec; 3666 3667 snd_hda_shutup_pins(codec); 3668 3669 if (spec->eapd_mask) 3670 stac_gpio_set(codec, spec->gpio_mask, 3671 spec->gpio_dir, spec->gpio_data & 3672 ~spec->eapd_mask); 3673 } 3674 3675 #define stac_free snd_hda_gen_free 3676 3677 #ifdef CONFIG_PROC_FS 3678 static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 3679 struct hda_codec *codec, hda_nid_t nid) 3680 { 3681 if (nid == codec->afg) 3682 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 3683 snd_hda_codec_read(codec, nid, 0, 3684 AC_VERB_IDT_GET_POWER_MAP, 0)); 3685 } 3686 3687 static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 3688 struct hda_codec *codec, 3689 unsigned int verb) 3690 { 3691 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 3692 snd_hda_codec_read(codec, codec->afg, 0, verb, 0)); 3693 } 3694 3695 /* stac92hd71bxx, stac92hd73xx */ 3696 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 3697 struct hda_codec *codec, hda_nid_t nid) 3698 { 3699 stac92hd_proc_hook(buffer, codec, nid); 3700 if (nid == codec->afg) 3701 analog_loop_proc_hook(buffer, codec, 0xfa0); 3702 } 3703 3704 static void stac9205_proc_hook(struct snd_info_buffer *buffer, 3705 struct hda_codec *codec, hda_nid_t nid) 3706 { 3707 if (nid == codec->afg) 3708 analog_loop_proc_hook(buffer, codec, 0xfe0); 3709 } 3710 3711 static void stac927x_proc_hook(struct snd_info_buffer *buffer, 3712 struct hda_codec *codec, hda_nid_t nid) 3713 { 3714 if (nid == codec->afg) 3715 analog_loop_proc_hook(buffer, codec, 0xfeb); 3716 } 3717 #else 3718 #define stac92hd_proc_hook NULL 3719 #define stac92hd7x_proc_hook NULL 3720 #define stac9205_proc_hook NULL 3721 #define stac927x_proc_hook NULL 3722 #endif 3723 3724 #ifdef CONFIG_PM 3725 static int stac_suspend(struct hda_codec *codec) 3726 { 3727 stac_shutup(codec); 3728 return 0; 3729 } 3730 3731 static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg, 3732 unsigned int power_state) 3733 { 3734 unsigned int afg_power_state = power_state; 3735 struct sigmatel_spec *spec = codec->spec; 3736 3737 if (power_state == AC_PWRST_D3) { 3738 if (spec->vref_mute_led_nid) { 3739 /* with vref-out pin used for mute led control 3740 * codec AFG is prevented from D3 state 3741 */ 3742 afg_power_state = AC_PWRST_D1; 3743 } 3744 /* this delay seems necessary to avoid click noise at power-down */ 3745 msleep(100); 3746 } 3747 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, 3748 afg_power_state); 3749 snd_hda_codec_set_power_to_all(codec, fg, power_state); 3750 } 3751 #else 3752 #define stac_suspend NULL 3753 #define stac_set_power_state NULL 3754 #endif /* CONFIG_PM */ 3755 3756 static const struct hda_codec_ops stac_patch_ops = { 3757 .build_controls = snd_hda_gen_build_controls, 3758 .build_pcms = snd_hda_gen_build_pcms, 3759 .init = stac_init, 3760 .free = stac_free, 3761 .unsol_event = snd_hda_jack_unsol_event, 3762 #ifdef CONFIG_PM 3763 .suspend = stac_suspend, 3764 #endif 3765 .reboot_notify = stac_shutup, 3766 }; 3767 3768 static int alloc_stac_spec(struct hda_codec *codec) 3769 { 3770 struct sigmatel_spec *spec; 3771 3772 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 3773 if (!spec) 3774 return -ENOMEM; 3775 snd_hda_gen_spec_init(&spec->gen); 3776 codec->spec = spec; 3777 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 3778 return 0; 3779 } 3780 3781 static int patch_stac9200(struct hda_codec *codec) 3782 { 3783 struct sigmatel_spec *spec; 3784 int err; 3785 3786 err = alloc_stac_spec(codec); 3787 if (err < 0) 3788 return err; 3789 3790 spec = codec->spec; 3791 spec->linear_tone_beep = 1; 3792 spec->gen.own_eapd_ctl = 1; 3793 3794 codec->patch_ops = stac_patch_ops; 3795 codec->power_filter = snd_hda_codec_eapd_power_filter; 3796 3797 snd_hda_add_verbs(codec, stac9200_eapd_init); 3798 3799 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 3800 stac9200_fixups); 3801 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 3802 3803 err = stac_parse_auto_config(codec); 3804 if (err < 0) { 3805 stac_free(codec); 3806 return err; 3807 } 3808 3809 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 3810 3811 return 0; 3812 } 3813 3814 static int patch_stac925x(struct hda_codec *codec) 3815 { 3816 struct sigmatel_spec *spec; 3817 int err; 3818 3819 err = alloc_stac_spec(codec); 3820 if (err < 0) 3821 return err; 3822 3823 spec = codec->spec; 3824 spec->linear_tone_beep = 1; 3825 spec->gen.own_eapd_ctl = 1; 3826 3827 codec->patch_ops = stac_patch_ops; 3828 3829 snd_hda_add_verbs(codec, stac925x_core_init); 3830 3831 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 3832 stac925x_fixups); 3833 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 3834 3835 err = stac_parse_auto_config(codec); 3836 if (err < 0) { 3837 stac_free(codec); 3838 return err; 3839 } 3840 3841 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 3842 3843 return 0; 3844 } 3845 3846 static int patch_stac92hd73xx(struct hda_codec *codec) 3847 { 3848 struct sigmatel_spec *spec; 3849 int err; 3850 int num_dacs; 3851 3852 err = alloc_stac_spec(codec); 3853 if (err < 0) 3854 return err; 3855 3856 spec = codec->spec; 3857 spec->linear_tone_beep = 0; 3858 spec->gen.mixer_nid = 0x1d; 3859 spec->have_spdif_mux = 1; 3860 3861 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 3862 if (num_dacs < 3 || num_dacs > 5) { 3863 printk(KERN_WARNING "hda_codec: Could not determine " 3864 "number of channels defaulting to DAC count\n"); 3865 num_dacs = 5; 3866 } 3867 3868 switch (num_dacs) { 3869 case 0x3: /* 6 Channel */ 3870 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 3871 break; 3872 case 0x4: /* 8 Channel */ 3873 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 3874 break; 3875 case 0x5: /* 10 Channel */ 3876 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 3877 break; 3878 } 3879 3880 spec->aloopback_mask = 0x01; 3881 spec->aloopback_shift = 8; 3882 3883 spec->gen.beep_nid = 0x1c; /* digital beep */ 3884 3885 /* GPIO0 High = Enable EAPD */ 3886 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 3887 spec->gpio_data = 0x01; 3888 3889 spec->eapd_switch = 1; 3890 3891 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 3892 spec->pwr_nids = stac92hd73xx_pwr_nids; 3893 3894 spec->gen.own_eapd_ctl = 1; 3895 spec->gen.power_down_unused = 1; 3896 3897 codec->patch_ops = stac_patch_ops; 3898 3899 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 3900 stac92hd73xx_fixups); 3901 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 3902 3903 if (!spec->volknob_init) 3904 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 3905 3906 err = stac_parse_auto_config(codec); 3907 if (err < 0) { 3908 stac_free(codec); 3909 return err; 3910 } 3911 3912 /* Don't GPIO-mute speakers if there are no internal speakers, because 3913 * the GPIO might be necessary for Headphone 3914 */ 3915 if (spec->eapd_switch && !has_builtin_speaker(codec)) 3916 spec->eapd_switch = 0; 3917 3918 codec->proc_widget_hook = stac92hd7x_proc_hook; 3919 3920 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 3921 3922 return 0; 3923 } 3924 3925 static void stac_setup_gpio(struct hda_codec *codec) 3926 { 3927 struct sigmatel_spec *spec = codec->spec; 3928 3929 spec->gpio_mask |= spec->eapd_mask; 3930 if (spec->gpio_led) { 3931 if (!spec->vref_mute_led_nid) { 3932 spec->gpio_mask |= spec->gpio_led; 3933 spec->gpio_dir |= spec->gpio_led; 3934 spec->gpio_data |= spec->gpio_led; 3935 } else { 3936 codec->patch_ops.set_power_state = 3937 stac_set_power_state; 3938 } 3939 } 3940 3941 if (spec->mic_mute_led_gpio) { 3942 spec->gpio_mask |= spec->mic_mute_led_gpio; 3943 spec->gpio_dir |= spec->mic_mute_led_gpio; 3944 spec->mic_mute_led_on = true; 3945 spec->gpio_data |= spec->mic_mute_led_gpio; 3946 3947 spec->gen.cap_sync_hook = stac_capture_led_hook; 3948 } 3949 } 3950 3951 static int patch_stac92hd83xxx(struct hda_codec *codec) 3952 { 3953 struct sigmatel_spec *spec; 3954 int err; 3955 3956 err = alloc_stac_spec(codec); 3957 if (err < 0) 3958 return err; 3959 3960 codec->epss = 0; /* longer delay needed for D3 */ 3961 3962 spec = codec->spec; 3963 spec->linear_tone_beep = 0; 3964 spec->gen.own_eapd_ctl = 1; 3965 spec->gen.power_down_unused = 1; 3966 spec->gen.mixer_nid = 0x1b; 3967 3968 spec->gen.beep_nid = 0x21; /* digital beep */ 3969 spec->pwr_nids = stac92hd83xxx_pwr_nids; 3970 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 3971 spec->default_polarity = -1; /* no default cfg */ 3972 3973 codec->patch_ops = stac_patch_ops; 3974 3975 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 3976 3977 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 3978 stac92hd83xxx_fixups); 3979 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 3980 3981 stac_setup_gpio(codec); 3982 3983 err = stac_parse_auto_config(codec); 3984 if (err < 0) { 3985 stac_free(codec); 3986 return err; 3987 } 3988 3989 codec->proc_widget_hook = stac92hd_proc_hook; 3990 3991 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 3992 3993 return 0; 3994 } 3995 3996 static const hda_nid_t stac92hd95_pwr_nids[] = { 3997 0x0a, 0x0b, 0x0c, 0x0d 3998 }; 3999 4000 static int patch_stac92hd95(struct hda_codec *codec) 4001 { 4002 struct sigmatel_spec *spec; 4003 int err; 4004 4005 err = alloc_stac_spec(codec); 4006 if (err < 0) 4007 return err; 4008 4009 codec->epss = 0; /* longer delay needed for D3 */ 4010 4011 spec = codec->spec; 4012 spec->linear_tone_beep = 0; 4013 spec->gen.own_eapd_ctl = 1; 4014 spec->gen.power_down_unused = 1; 4015 4016 spec->gen.beep_nid = 0x19; /* digital beep */ 4017 spec->pwr_nids = stac92hd95_pwr_nids; 4018 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4019 spec->default_polarity = -1; /* no default cfg */ 4020 4021 codec->patch_ops = stac_patch_ops; 4022 4023 err = stac_parse_auto_config(codec); 4024 if (err < 0) { 4025 stac_free(codec); 4026 return err; 4027 } 4028 4029 codec->proc_widget_hook = stac92hd_proc_hook; 4030 4031 return 0; 4032 } 4033 4034 static int patch_stac92hd71bxx(struct hda_codec *codec) 4035 { 4036 struct sigmatel_spec *spec; 4037 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; 4038 int err; 4039 4040 err = alloc_stac_spec(codec); 4041 if (err < 0) 4042 return err; 4043 4044 spec = codec->spec; 4045 spec->linear_tone_beep = 0; 4046 spec->gen.own_eapd_ctl = 1; 4047 spec->gen.power_down_unused = 1; 4048 spec->gen.mixer_nid = 0x17; 4049 spec->have_spdif_mux = 1; 4050 4051 codec->patch_ops = stac_patch_ops; 4052 4053 /* GPIO0 = EAPD */ 4054 spec->gpio_mask = 0x01; 4055 spec->gpio_dir = 0x01; 4056 spec->gpio_data = 0x01; 4057 4058 switch (codec->vendor_id) { 4059 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4060 case 0x111d76b7: 4061 unmute_init++; 4062 break; 4063 case 0x111d7608: /* 5 Port with Analog Mixer */ 4064 if ((codec->revision_id & 0xf) == 0 || 4065 (codec->revision_id & 0xf) == 1) 4066 spec->stream_delay = 40; /* 40 milliseconds */ 4067 4068 /* disable VSW */ 4069 unmute_init++; 4070 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4071 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4072 break; 4073 case 0x111d7603: /* 6 Port with Analog Mixer */ 4074 if ((codec->revision_id & 0xf) == 1) 4075 spec->stream_delay = 40; /* 40 milliseconds */ 4076 4077 break; 4078 } 4079 4080 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4081 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4082 4083 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) 4084 snd_hda_sequence_write_cache(codec, unmute_init); 4085 4086 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4087 spec->aloopback_mask = 0x50; 4088 spec->aloopback_shift = 0; 4089 4090 spec->powerdown_adcs = 1; 4091 spec->gen.beep_nid = 0x26; /* digital beep */ 4092 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4093 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4094 4095 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4096 stac92hd71bxx_fixups); 4097 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4098 4099 stac_setup_gpio(codec); 4100 4101 err = stac_parse_auto_config(codec); 4102 if (err < 0) { 4103 stac_free(codec); 4104 return err; 4105 } 4106 4107 codec->proc_widget_hook = stac92hd7x_proc_hook; 4108 4109 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4110 4111 return 0; 4112 } 4113 4114 static int patch_stac922x(struct hda_codec *codec) 4115 { 4116 struct sigmatel_spec *spec; 4117 int err; 4118 4119 err = alloc_stac_spec(codec); 4120 if (err < 0) 4121 return err; 4122 4123 spec = codec->spec; 4124 spec->linear_tone_beep = 1; 4125 spec->gen.own_eapd_ctl = 1; 4126 4127 codec->patch_ops = stac_patch_ops; 4128 4129 snd_hda_add_verbs(codec, stac922x_core_init); 4130 4131 /* Fix Mux capture level; max to 2 */ 4132 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4133 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4134 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4135 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4136 (0 << AC_AMPCAP_MUTE_SHIFT)); 4137 4138 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4139 stac922x_fixups); 4140 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4141 4142 err = stac_parse_auto_config(codec); 4143 if (err < 0) { 4144 stac_free(codec); 4145 return err; 4146 } 4147 4148 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4149 4150 return 0; 4151 } 4152 4153 static const char * const stac927x_spdif_labels[] = { 4154 "Digital Playback", "ADAT", "Analog Mux 1", 4155 "Analog Mux 2", "Analog Mux 3", NULL 4156 }; 4157 4158 static int patch_stac927x(struct hda_codec *codec) 4159 { 4160 struct sigmatel_spec *spec; 4161 int err; 4162 4163 err = alloc_stac_spec(codec); 4164 if (err < 0) 4165 return err; 4166 4167 spec = codec->spec; 4168 spec->linear_tone_beep = 1; 4169 spec->gen.own_eapd_ctl = 1; 4170 spec->have_spdif_mux = 1; 4171 spec->spdif_labels = stac927x_spdif_labels; 4172 4173 spec->gen.beep_nid = 0x23; /* digital beep */ 4174 4175 /* GPIO0 High = Enable EAPD */ 4176 spec->eapd_mask = spec->gpio_mask = 0x01; 4177 spec->gpio_dir = spec->gpio_data = 0x01; 4178 4179 spec->aloopback_ctl = &stac927x_loopback; 4180 spec->aloopback_mask = 0x40; 4181 spec->aloopback_shift = 0; 4182 spec->eapd_switch = 1; 4183 4184 codec->patch_ops = stac_patch_ops; 4185 4186 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4187 stac927x_fixups); 4188 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4189 4190 if (!spec->volknob_init) 4191 snd_hda_add_verbs(codec, stac927x_core_init); 4192 4193 err = stac_parse_auto_config(codec); 4194 if (err < 0) { 4195 stac_free(codec); 4196 return err; 4197 } 4198 4199 codec->proc_widget_hook = stac927x_proc_hook; 4200 4201 /* 4202 * !!FIXME!! 4203 * The STAC927x seem to require fairly long delays for certain 4204 * command sequences. With too short delays (even if the answer 4205 * is set to RIRB properly), it results in the silence output 4206 * on some hardwares like Dell. 4207 * 4208 * The below flag enables the longer delay (see get_response 4209 * in hda_intel.c). 4210 */ 4211 codec->bus->needs_damn_long_delay = 1; 4212 4213 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4214 4215 return 0; 4216 } 4217 4218 static int patch_stac9205(struct hda_codec *codec) 4219 { 4220 struct sigmatel_spec *spec; 4221 int err; 4222 4223 err = alloc_stac_spec(codec); 4224 if (err < 0) 4225 return err; 4226 4227 spec = codec->spec; 4228 spec->linear_tone_beep = 1; 4229 spec->gen.own_eapd_ctl = 1; 4230 spec->have_spdif_mux = 1; 4231 4232 spec->gen.beep_nid = 0x23; /* digital beep */ 4233 4234 snd_hda_add_verbs(codec, stac9205_core_init); 4235 spec->aloopback_ctl = &stac9205_loopback; 4236 4237 spec->aloopback_mask = 0x40; 4238 spec->aloopback_shift = 0; 4239 4240 /* GPIO0 High = EAPD */ 4241 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4242 spec->gpio_data = 0x01; 4243 4244 /* Turn on/off EAPD per HP plugging */ 4245 spec->eapd_switch = 1; 4246 4247 codec->patch_ops = stac_patch_ops; 4248 4249 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4250 stac9205_fixups); 4251 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4252 4253 err = stac_parse_auto_config(codec); 4254 if (err < 0) { 4255 stac_free(codec); 4256 return err; 4257 } 4258 4259 codec->proc_widget_hook = stac9205_proc_hook; 4260 4261 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4262 4263 return 0; 4264 } 4265 4266 /* 4267 * STAC9872 hack 4268 */ 4269 4270 static const struct hda_verb stac9872_core_init[] = { 4271 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4272 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4273 {} 4274 }; 4275 4276 static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4277 { 0x0a, 0x03211020 }, 4278 { 0x0b, 0x411111f0 }, 4279 { 0x0c, 0x411111f0 }, 4280 { 0x0d, 0x03a15030 }, 4281 { 0x0e, 0x411111f0 }, 4282 { 0x0f, 0x90170110 }, 4283 { 0x11, 0x411111f0 }, 4284 { 0x13, 0x411111f0 }, 4285 { 0x14, 0x90a7013e }, 4286 {} 4287 }; 4288 4289 static const struct hda_model_fixup stac9872_models[] = { 4290 { .id = STAC_9872_VAIO, .name = "vaio" }, 4291 {} 4292 }; 4293 4294 static const struct hda_fixup stac9872_fixups[] = { 4295 [STAC_9872_VAIO] = { 4296 .type = HDA_FIXUP_PINS, 4297 .v.pins = stac9872_vaio_pin_configs, 4298 }, 4299 }; 4300 4301 static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 4302 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 4303 "Sony VAIO F/S", STAC_9872_VAIO), 4304 {} /* terminator */ 4305 }; 4306 4307 static int patch_stac9872(struct hda_codec *codec) 4308 { 4309 struct sigmatel_spec *spec; 4310 int err; 4311 4312 err = alloc_stac_spec(codec); 4313 if (err < 0) 4314 return err; 4315 4316 spec = codec->spec; 4317 spec->linear_tone_beep = 1; 4318 spec->gen.own_eapd_ctl = 1; 4319 4320 codec->patch_ops = stac_patch_ops; 4321 4322 snd_hda_add_verbs(codec, stac9872_core_init); 4323 4324 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 4325 stac9872_fixups); 4326 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4327 4328 err = stac_parse_auto_config(codec); 4329 if (err < 0) { 4330 stac_free(codec); 4331 return -EINVAL; 4332 } 4333 4334 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4335 4336 return 0; 4337 } 4338 4339 4340 /* 4341 * patch entries 4342 */ 4343 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = { 4344 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, 4345 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, 4346 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, 4347 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, 4348 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, 4349 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, 4350 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, 4351 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, 4352 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, 4353 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, 4354 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, 4355 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, 4356 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, 4357 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, 4358 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, 4359 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, 4360 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, 4361 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, 4362 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, 4363 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, 4364 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, 4365 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, 4366 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, 4367 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, 4368 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, 4369 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, 4370 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, 4371 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, 4372 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, 4373 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x }, 4374 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x }, 4375 /* The following does not take into account .id=0x83847661 when subsys = 4376 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 4377 * currently not fully supported. 4378 */ 4379 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, 4380 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, 4381 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, 4382 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 }, 4383 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, 4384 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, 4385 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, 4386 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, 4387 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, 4388 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, 4389 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, 4390 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, 4391 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx}, 4392 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx}, 4393 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx}, 4394 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx}, 4395 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx}, 4396 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx}, 4397 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx}, 4398 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx}, 4399 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx}, 4400 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx}, 4401 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx}, 4402 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx}, 4403 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, 4404 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, 4405 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, 4406 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 }, 4407 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 4408 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 4409 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 4410 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 4411 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 4412 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 4413 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 4414 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 4415 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx }, 4416 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx }, 4417 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx }, 4418 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx }, 4419 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx }, 4420 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx }, 4421 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx }, 4422 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx }, 4423 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx }, 4424 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx }, 4425 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx }, 4426 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx }, 4427 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx }, 4428 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, 4429 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, 4430 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx}, 4431 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, 4432 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx}, 4433 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx}, 4434 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, 4435 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx}, 4436 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx}, 4437 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx}, 4438 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx}, 4439 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx}, 4440 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx}, 4441 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx}, 4442 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx}, 4443 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx}, 4444 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx}, 4445 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx}, 4446 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx}, 4447 {} /* terminator */ 4448 }; 4449 4450 MODULE_ALIAS("snd-hda-codec-id:8384*"); 4451 MODULE_ALIAS("snd-hda-codec-id:111d*"); 4452 4453 MODULE_LICENSE("GPL"); 4454 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 4455 4456 static struct hda_codec_preset_list sigmatel_list = { 4457 .preset = snd_hda_preset_sigmatel, 4458 .owner = THIS_MODULE, 4459 }; 4460 4461 static int __init patch_sigmatel_init(void) 4462 { 4463 return snd_hda_add_codec_preset(&sigmatel_list); 4464 } 4465 4466 static void __exit patch_sigmatel_exit(void) 4467 { 4468 snd_hda_delete_codec_preset(&sigmatel_list); 4469 } 4470 4471 module_init(patch_sigmatel_init) 4472 module_exit(patch_sigmatel_exit) 4473