xref: /openbmc/linux/sound/pci/hda/patch_sigmatel.c (revision adb57164)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Universal Interface for Intel High Definition Audio Codec
4  *
5  * HD audio interface patch for SigmaTel STAC92xx
6  *
7  * Copyright (c) 2005 Embedded Alley Solutions, Inc.
8  * Matt Porter <mporter@embeddedalley.com>
9  *
10  * Based on patch_cmedia.c and patch_realtek.c
11  * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
12  */
13 
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/slab.h>
17 #include <linux/pci.h>
18 #include <linux/dmi.h>
19 #include <linux/module.h>
20 #include <sound/core.h>
21 #include <sound/jack.h>
22 #include <sound/hda_codec.h>
23 #include "hda_local.h"
24 #include "hda_auto_parser.h"
25 #include "hda_beep.h"
26 #include "hda_jack.h"
27 #include "hda_generic.h"
28 
29 enum {
30 	STAC_REF,
31 	STAC_9200_OQO,
32 	STAC_9200_DELL_D21,
33 	STAC_9200_DELL_D22,
34 	STAC_9200_DELL_D23,
35 	STAC_9200_DELL_M21,
36 	STAC_9200_DELL_M22,
37 	STAC_9200_DELL_M23,
38 	STAC_9200_DELL_M24,
39 	STAC_9200_DELL_M25,
40 	STAC_9200_DELL_M26,
41 	STAC_9200_DELL_M27,
42 	STAC_9200_M4,
43 	STAC_9200_M4_2,
44 	STAC_9200_PANASONIC,
45 	STAC_9200_EAPD_INIT,
46 	STAC_9200_MODELS
47 };
48 
49 enum {
50 	STAC_9205_REF,
51 	STAC_9205_DELL_M42,
52 	STAC_9205_DELL_M43,
53 	STAC_9205_DELL_M44,
54 	STAC_9205_EAPD,
55 	STAC_9205_MODELS
56 };
57 
58 enum {
59 	STAC_92HD73XX_NO_JD, /* no jack-detection */
60 	STAC_92HD73XX_REF,
61 	STAC_92HD73XX_INTEL,
62 	STAC_DELL_M6_AMIC,
63 	STAC_DELL_M6_DMIC,
64 	STAC_DELL_M6_BOTH,
65 	STAC_DELL_EQ,
66 	STAC_ALIENWARE_M17X,
67 	STAC_ELO_VUPOINT_15MX,
68 	STAC_92HD89XX_HP_FRONT_JACK,
69 	STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
70 	STAC_92HD73XX_ASUS_MOBO,
71 	STAC_92HD73XX_MODELS
72 };
73 
74 enum {
75 	STAC_92HD83XXX_REF,
76 	STAC_92HD83XXX_PWR_REF,
77 	STAC_DELL_S14,
78 	STAC_DELL_VOSTRO_3500,
79 	STAC_92HD83XXX_HP_cNB11_INTQUAD,
80 	STAC_HP_DV7_4000,
81 	STAC_HP_ZEPHYR,
82 	STAC_92HD83XXX_HP_LED,
83 	STAC_92HD83XXX_HP_INV_LED,
84 	STAC_92HD83XXX_HP_MIC_LED,
85 	STAC_HP_LED_GPIO10,
86 	STAC_92HD83XXX_HEADSET_JACK,
87 	STAC_92HD83XXX_HP,
88 	STAC_HP_ENVY_BASS,
89 	STAC_HP_BNB13_EQ,
90 	STAC_HP_ENVY_TS_BASS,
91 	STAC_HP_ENVY_TS_DAC_BIND,
92 	STAC_92HD83XXX_GPIO10_EAPD,
93 	STAC_92HD83XXX_MODELS
94 };
95 
96 enum {
97 	STAC_92HD71BXX_REF,
98 	STAC_DELL_M4_1,
99 	STAC_DELL_M4_2,
100 	STAC_DELL_M4_3,
101 	STAC_HP_M4,
102 	STAC_HP_DV4,
103 	STAC_HP_DV5,
104 	STAC_HP_HDX,
105 	STAC_92HD71BXX_HP,
106 	STAC_92HD71BXX_NO_DMIC,
107 	STAC_92HD71BXX_NO_SMUX,
108 	STAC_92HD71BXX_MODELS
109 };
110 
111 enum {
112 	STAC_92HD95_HP_LED,
113 	STAC_92HD95_HP_BASS,
114 	STAC_92HD95_MODELS
115 };
116 
117 enum {
118 	STAC_925x_REF,
119 	STAC_M1,
120 	STAC_M1_2,
121 	STAC_M2,
122 	STAC_M2_2,
123 	STAC_M3,
124 	STAC_M5,
125 	STAC_M6,
126 	STAC_925x_MODELS
127 };
128 
129 enum {
130 	STAC_D945_REF,
131 	STAC_D945GTP3,
132 	STAC_D945GTP5,
133 	STAC_INTEL_MAC_V1,
134 	STAC_INTEL_MAC_V2,
135 	STAC_INTEL_MAC_V3,
136 	STAC_INTEL_MAC_V4,
137 	STAC_INTEL_MAC_V5,
138 	STAC_INTEL_MAC_AUTO,
139 	STAC_ECS_202,
140 	STAC_922X_DELL_D81,
141 	STAC_922X_DELL_D82,
142 	STAC_922X_DELL_M81,
143 	STAC_922X_DELL_M82,
144 	STAC_922X_INTEL_MAC_GPIO,
145 	STAC_922X_MODELS
146 };
147 
148 enum {
149 	STAC_D965_REF_NO_JD, /* no jack-detection */
150 	STAC_D965_REF,
151 	STAC_D965_3ST,
152 	STAC_D965_5ST,
153 	STAC_D965_5ST_NO_FP,
154 	STAC_D965_VERBS,
155 	STAC_DELL_3ST,
156 	STAC_DELL_BIOS,
157 	STAC_NEMO_DEFAULT,
158 	STAC_DELL_BIOS_AMIC,
159 	STAC_DELL_BIOS_SPDIF,
160 	STAC_927X_DELL_DMIC,
161 	STAC_927X_VOLKNOB,
162 	STAC_927X_MODELS
163 };
164 
165 enum {
166 	STAC_9872_VAIO,
167 	STAC_9872_MODELS
168 };
169 
170 struct sigmatel_spec {
171 	struct hda_gen_spec gen;
172 
173 	unsigned int eapd_switch: 1;
174 	unsigned int linear_tone_beep:1;
175 	unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
176 	unsigned int volknob_init:1; /* special volume-knob initialization */
177 	unsigned int powerdown_adcs:1;
178 	unsigned int have_spdif_mux:1;
179 
180 	/* gpio lines */
181 	unsigned int eapd_mask;
182 	unsigned int gpio_mask;
183 	unsigned int gpio_dir;
184 	unsigned int gpio_data;
185 	unsigned int gpio_mute;
186 	unsigned int gpio_led;
187 	unsigned int gpio_led_polarity;
188 	unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
189 	unsigned int vref_led;
190 	int default_polarity;
191 
192 	unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
193 	unsigned int mic_enabled; /* current mic mute state (bitmask) */
194 
195 	/* stream */
196 	unsigned int stream_delay;
197 
198 	/* analog loopback */
199 	const struct snd_kcontrol_new *aloopback_ctl;
200 	unsigned int aloopback;
201 	unsigned char aloopback_mask;
202 	unsigned char aloopback_shift;
203 
204 	/* power management */
205 	unsigned int power_map_bits;
206 	unsigned int num_pwrs;
207 	const hda_nid_t *pwr_nids;
208 	unsigned int active_adcs;
209 
210 	/* beep widgets */
211 	hda_nid_t anabeep_nid;
212 
213 	/* SPDIF-out mux */
214 	const char * const *spdif_labels;
215 	struct hda_input_mux spdif_mux;
216 	unsigned int cur_smux[2];
217 };
218 
219 #define AC_VERB_IDT_SET_POWER_MAP	0x7ec
220 #define AC_VERB_IDT_GET_POWER_MAP	0xfec
221 
222 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
223 	0x0a, 0x0b, 0x0c, 0xd, 0x0e,
224 	0x0f, 0x10, 0x11
225 };
226 
227 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
228 	0x0a, 0x0b, 0x0c, 0xd, 0x0e,
229 	0x0f, 0x10
230 };
231 
232 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
233 	0x0a, 0x0d, 0x0f
234 };
235 
236 
237 /*
238  * PCM hooks
239  */
240 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
241 				   struct hda_codec *codec,
242 				   struct snd_pcm_substream *substream,
243 				   int action)
244 {
245 	struct sigmatel_spec *spec = codec->spec;
246 	if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
247 		msleep(spec->stream_delay);
248 }
249 
250 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
251 				  struct hda_codec *codec,
252 				  struct snd_pcm_substream *substream,
253 				  int action)
254 {
255 	struct sigmatel_spec *spec = codec->spec;
256 	int i, idx = 0;
257 
258 	if (!spec->powerdown_adcs)
259 		return;
260 
261 	for (i = 0; i < spec->gen.num_all_adcs; i++) {
262 		if (spec->gen.all_adcs[i] == hinfo->nid) {
263 			idx = i;
264 			break;
265 		}
266 	}
267 
268 	switch (action) {
269 	case HDA_GEN_PCM_ACT_OPEN:
270 		msleep(40);
271 		snd_hda_codec_write(codec, hinfo->nid, 0,
272 				    AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
273 		spec->active_adcs |= (1 << idx);
274 		break;
275 	case HDA_GEN_PCM_ACT_CLOSE:
276 		snd_hda_codec_write(codec, hinfo->nid, 0,
277 				    AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
278 		spec->active_adcs &= ~(1 << idx);
279 		break;
280 	}
281 }
282 
283 /*
284  * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
285  * funky external mute control using GPIO pins.
286  */
287 
288 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
289 			  unsigned int dir_mask, unsigned int data)
290 {
291 	unsigned int gpiostate, gpiomask, gpiodir;
292 	hda_nid_t fg = codec->core.afg;
293 
294 	codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
295 
296 	gpiostate = snd_hda_codec_read(codec, fg, 0,
297 				       AC_VERB_GET_GPIO_DATA, 0);
298 	gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
299 
300 	gpiomask = snd_hda_codec_read(codec, fg, 0,
301 				      AC_VERB_GET_GPIO_MASK, 0);
302 	gpiomask |= mask;
303 
304 	gpiodir = snd_hda_codec_read(codec, fg, 0,
305 				     AC_VERB_GET_GPIO_DIRECTION, 0);
306 	gpiodir |= dir_mask;
307 
308 	/* Configure GPIOx as CMOS */
309 	snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
310 
311 	snd_hda_codec_write(codec, fg, 0,
312 			    AC_VERB_SET_GPIO_MASK, gpiomask);
313 	snd_hda_codec_read(codec, fg, 0,
314 			   AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
315 
316 	msleep(1);
317 
318 	snd_hda_codec_read(codec, fg, 0,
319 			   AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
320 }
321 
322 /* hook for controlling mic-mute LED GPIO */
323 static void stac_capture_led_update(struct hda_codec *codec)
324 {
325 	struct sigmatel_spec *spec = codec->spec;
326 
327 	if (spec->gen.micmute_led.led_value)
328 		spec->gpio_data |= spec->mic_mute_led_gpio;
329 	else
330 		spec->gpio_data &= ~spec->mic_mute_led_gpio;
331 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
332 }
333 
334 static int stac_vrefout_set(struct hda_codec *codec,
335 					hda_nid_t nid, unsigned int new_vref)
336 {
337 	int error, pinctl;
338 
339 	codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
340 	pinctl = snd_hda_codec_read(codec, nid, 0,
341 				AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
342 
343 	if (pinctl < 0)
344 		return pinctl;
345 
346 	pinctl &= 0xff;
347 	pinctl &= ~AC_PINCTL_VREFEN;
348 	pinctl |= (new_vref & AC_PINCTL_VREFEN);
349 
350 	error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
351 	if (error < 0)
352 		return error;
353 
354 	return 1;
355 }
356 
357 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
358 /* this hook is set in stac_setup_gpio() */
359 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
360 					       hda_nid_t nid,
361 					       unsigned int power_state)
362 {
363 	if (nid == codec->core.afg && power_state == AC_PWRST_D3)
364 		return AC_PWRST_D1;
365 	return snd_hda_gen_path_power_filter(codec, nid, power_state);
366 }
367 
368 /* update mute-LED accoring to the master switch */
369 static void stac_update_led_status(struct hda_codec *codec, int enabled)
370 {
371 	struct sigmatel_spec *spec = codec->spec;
372 	int muted = !enabled;
373 
374 	if (!spec->gpio_led)
375 		return;
376 
377 	/* LED state is inverted on these systems */
378 	if (spec->gpio_led_polarity)
379 		muted = !muted;
380 
381 	if (!spec->vref_mute_led_nid) {
382 		if (muted)
383 			spec->gpio_data |= spec->gpio_led;
384 		else
385 			spec->gpio_data &= ~spec->gpio_led;
386 		stac_gpio_set(codec, spec->gpio_mask,
387 				spec->gpio_dir, spec->gpio_data);
388 	} else {
389 		spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
390 		stac_vrefout_set(codec,	spec->vref_mute_led_nid,
391 				 spec->vref_led);
392 	}
393 }
394 
395 /* vmaster hook to update mute LED */
396 static void stac_vmaster_hook(void *private_data, int val)
397 {
398 	stac_update_led_status(private_data, val);
399 }
400 
401 /* automute hook to handle GPIO mute and EAPD updates */
402 static void stac_update_outputs(struct hda_codec *codec)
403 {
404 	struct sigmatel_spec *spec = codec->spec;
405 
406 	if (spec->gpio_mute)
407 		spec->gen.master_mute =
408 			!(snd_hda_codec_read(codec, codec->core.afg, 0,
409 				AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
410 
411 	snd_hda_gen_update_outputs(codec);
412 
413 	if (spec->eapd_mask && spec->eapd_switch) {
414 		unsigned int val = spec->gpio_data;
415 		if (spec->gen.speaker_muted)
416 			val &= ~spec->eapd_mask;
417 		else
418 			val |= spec->eapd_mask;
419 		if (spec->gpio_data != val) {
420 			spec->gpio_data = val;
421 			stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
422 				      val);
423 		}
424 	}
425 }
426 
427 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
428 				  bool enable, bool do_write)
429 {
430 	struct sigmatel_spec *spec = codec->spec;
431 	unsigned int idx, val;
432 
433 	for (idx = 0; idx < spec->num_pwrs; idx++) {
434 		if (spec->pwr_nids[idx] == nid)
435 			break;
436 	}
437 	if (idx >= spec->num_pwrs)
438 		return;
439 
440 	idx = 1 << idx;
441 
442 	val = spec->power_map_bits;
443 	if (enable)
444 		val &= ~idx;
445 	else
446 		val |= idx;
447 
448 	/* power down unused output ports */
449 	if (val != spec->power_map_bits) {
450 		spec->power_map_bits = val;
451 		if (do_write)
452 			snd_hda_codec_write(codec, codec->core.afg, 0,
453 					    AC_VERB_IDT_SET_POWER_MAP, val);
454 	}
455 }
456 
457 /* update power bit per jack plug/unplug */
458 static void jack_update_power(struct hda_codec *codec,
459 			      struct hda_jack_callback *jack)
460 {
461 	struct sigmatel_spec *spec = codec->spec;
462 	int i;
463 
464 	if (!spec->num_pwrs)
465 		return;
466 
467 	if (jack && jack->nid) {
468 		stac_toggle_power_map(codec, jack->nid,
469 				      snd_hda_jack_detect(codec, jack->nid),
470 				      true);
471 		return;
472 	}
473 
474 	/* update all jacks */
475 	for (i = 0; i < spec->num_pwrs; i++) {
476 		hda_nid_t nid = spec->pwr_nids[i];
477 		if (!snd_hda_jack_tbl_get(codec, nid))
478 			continue;
479 		stac_toggle_power_map(codec, nid,
480 				      snd_hda_jack_detect(codec, nid),
481 				      false);
482 	}
483 
484 	snd_hda_codec_write(codec, codec->core.afg, 0,
485 			    AC_VERB_IDT_SET_POWER_MAP,
486 			    spec->power_map_bits);
487 }
488 
489 static void stac_vref_event(struct hda_codec *codec,
490 			    struct hda_jack_callback *event)
491 {
492 	unsigned int data;
493 
494 	data = snd_hda_codec_read(codec, codec->core.afg, 0,
495 				  AC_VERB_GET_GPIO_DATA, 0);
496 	/* toggle VREF state based on GPIOx status */
497 	snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
498 			    !!(data & (1 << event->private_data)));
499 }
500 
501 /* initialize the power map and enable the power event to jacks that
502  * haven't been assigned to automute
503  */
504 static void stac_init_power_map(struct hda_codec *codec)
505 {
506 	struct sigmatel_spec *spec = codec->spec;
507 	int i;
508 
509 	for (i = 0; i < spec->num_pwrs; i++)  {
510 		hda_nid_t nid = spec->pwr_nids[i];
511 		unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
512 		def_conf = get_defcfg_connect(def_conf);
513 		if (def_conf == AC_JACK_PORT_COMPLEX &&
514 		    spec->vref_mute_led_nid != nid &&
515 		    is_jack_detectable(codec, nid)) {
516 			snd_hda_jack_detect_enable_callback(codec, nid,
517 							    jack_update_power);
518 		} else {
519 			if (def_conf == AC_JACK_PORT_NONE)
520 				stac_toggle_power_map(codec, nid, false, false);
521 			else
522 				stac_toggle_power_map(codec, nid, true, false);
523 		}
524 	}
525 }
526 
527 /*
528  */
529 
530 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
531 				int *valp)
532 {
533 	return !snd_hda_get_int_hint(codec, key, valp);
534 }
535 
536 /* override some hints from the hwdep entry */
537 static void stac_store_hints(struct hda_codec *codec)
538 {
539 	struct sigmatel_spec *spec = codec->spec;
540 	int val;
541 
542 	if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
543 		spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
544 			spec->gpio_mask;
545 	}
546 	if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
547 		spec->gpio_dir &= spec->gpio_mask;
548 	if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
549 		spec->gpio_data &= spec->gpio_mask;
550 	if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
551 		spec->eapd_mask &= spec->gpio_mask;
552 	if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
553 		spec->gpio_mute &= spec->gpio_mask;
554 	val = snd_hda_get_bool_hint(codec, "eapd_switch");
555 	if (val >= 0)
556 		spec->eapd_switch = val;
557 }
558 
559 /*
560  * loopback controls
561  */
562 
563 #define stac_aloopback_info snd_ctl_boolean_mono_info
564 
565 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
566 			      struct snd_ctl_elem_value *ucontrol)
567 {
568 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
569 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
570 	struct sigmatel_spec *spec = codec->spec;
571 
572 	ucontrol->value.integer.value[0] = !!(spec->aloopback &
573 					      (spec->aloopback_mask << idx));
574 	return 0;
575 }
576 
577 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
578 			      struct snd_ctl_elem_value *ucontrol)
579 {
580 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 	struct sigmatel_spec *spec = codec->spec;
582 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
583 	unsigned int dac_mode;
584 	unsigned int val, idx_val;
585 
586 	idx_val = spec->aloopback_mask << idx;
587 	if (ucontrol->value.integer.value[0])
588 		val = spec->aloopback | idx_val;
589 	else
590 		val = spec->aloopback & ~idx_val;
591 	if (spec->aloopback == val)
592 		return 0;
593 
594 	spec->aloopback = val;
595 
596 	/* Only return the bits defined by the shift value of the
597 	 * first two bytes of the mask
598 	 */
599 	dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
600 				      kcontrol->private_value & 0xFFFF, 0x0);
601 	dac_mode >>= spec->aloopback_shift;
602 
603 	if (spec->aloopback & idx_val) {
604 		snd_hda_power_up(codec);
605 		dac_mode |= idx_val;
606 	} else {
607 		snd_hda_power_down(codec);
608 		dac_mode &= ~idx_val;
609 	}
610 
611 	snd_hda_codec_write_cache(codec, codec->core.afg, 0,
612 		kcontrol->private_value >> 16, dac_mode);
613 
614 	return 1;
615 }
616 
617 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
618 	{ \
619 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
620 		.name  = "Analog Loopback", \
621 		.count = cnt, \
622 		.info  = stac_aloopback_info, \
623 		.get   = stac_aloopback_get, \
624 		.put   = stac_aloopback_put, \
625 		.private_value = verb_read | (verb_write << 16), \
626 	}
627 
628 /*
629  * Mute LED handling on HP laptops
630  */
631 
632 /* check whether it's a HP laptop with a docking port */
633 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
634 {
635 	if (codec->core.vendor_id != 0x111d7605 &&
636 	    codec->core.vendor_id != 0x111d76d1)
637 		return false;
638 
639 	switch (codec->core.subsystem_id) {
640 	case 0x103c1618:
641 	case 0x103c1619:
642 	case 0x103c161a:
643 	case 0x103c161b:
644 	case 0x103c161c:
645 	case 0x103c161d:
646 	case 0x103c161e:
647 	case 0x103c161f:
648 
649 	case 0x103c162a:
650 	case 0x103c162b:
651 
652 	case 0x103c1630:
653 	case 0x103c1631:
654 
655 	case 0x103c1633:
656 	case 0x103c1634:
657 	case 0x103c1635:
658 
659 	case 0x103c3587:
660 	case 0x103c3588:
661 	case 0x103c3589:
662 	case 0x103c358a:
663 
664 	case 0x103c3667:
665 	case 0x103c3668:
666 	case 0x103c3669:
667 
668 		return true;
669 	}
670 	return false;
671 }
672 
673 static bool hp_blike_system(u32 subsystem_id)
674 {
675 	switch (subsystem_id) {
676 	case 0x103c1473: /* HP ProBook 6550b */
677 	case 0x103c1520:
678 	case 0x103c1521:
679 	case 0x103c1523:
680 	case 0x103c1524:
681 	case 0x103c1525:
682 	case 0x103c1722:
683 	case 0x103c1723:
684 	case 0x103c1724:
685 	case 0x103c1725:
686 	case 0x103c1726:
687 	case 0x103c1727:
688 	case 0x103c1728:
689 	case 0x103c1729:
690 	case 0x103c172a:
691 	case 0x103c172b:
692 	case 0x103c307e:
693 	case 0x103c307f:
694 	case 0x103c3080:
695 	case 0x103c3081:
696 	case 0x103c7007:
697 	case 0x103c7008:
698 		return true;
699 	}
700 	return false;
701 }
702 
703 static void set_hp_led_gpio(struct hda_codec *codec)
704 {
705 	struct sigmatel_spec *spec = codec->spec;
706 	unsigned int gpio;
707 
708 	if (spec->gpio_led)
709 		return;
710 
711 	gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
712 	gpio &= AC_GPIO_IO_COUNT;
713 	if (gpio > 3)
714 		spec->gpio_led = 0x08; /* GPIO 3 */
715 	else
716 		spec->gpio_led = 0x01; /* GPIO 0 */
717 }
718 
719 /*
720  * This method searches for the mute LED GPIO configuration
721  * provided as OEM string in SMBIOS. The format of that string
722  * is HP_Mute_LED_P_G or HP_Mute_LED_P
723  * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
724  * that corresponds to the NOT muted state of the master volume
725  * and G is the index of the GPIO to use as the mute LED control (0..9)
726  * If _G portion is missing it is assigned based on the codec ID
727  *
728  * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
729  * or  HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
730  *
731  *
732  * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
733  * SMBIOS - at least the ones I have seen do not have them - which include
734  * my own system (HP Pavilion dv6-1110ax) and my cousin's
735  * HP Pavilion dv9500t CTO.
736  * Need more information on whether it is true across the entire series.
737  * -- kunal
738  */
739 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
740 {
741 	struct sigmatel_spec *spec = codec->spec;
742 	const struct dmi_device *dev = NULL;
743 
744 	if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
745 		get_int_hint(codec, "gpio_led_polarity",
746 			     &spec->gpio_led_polarity);
747 		return 1;
748 	}
749 
750 	while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
751 		if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
752 			   &spec->gpio_led_polarity,
753 			   &spec->gpio_led) == 2) {
754 			unsigned int max_gpio;
755 			max_gpio = snd_hda_param_read(codec, codec->core.afg,
756 						      AC_PAR_GPIO_CAP);
757 			max_gpio &= AC_GPIO_IO_COUNT;
758 			if (spec->gpio_led < max_gpio)
759 				spec->gpio_led = 1 << spec->gpio_led;
760 			else
761 				spec->vref_mute_led_nid = spec->gpio_led;
762 			return 1;
763 		}
764 		if (sscanf(dev->name, "HP_Mute_LED_%u",
765 			   &spec->gpio_led_polarity) == 1) {
766 			set_hp_led_gpio(codec);
767 			return 1;
768 		}
769 		/* BIOS bug: unfilled OEM string */
770 		if (strstr(dev->name, "HP_Mute_LED_P_G")) {
771 			set_hp_led_gpio(codec);
772 			if (default_polarity >= 0)
773 				spec->gpio_led_polarity = default_polarity;
774 			else
775 				spec->gpio_led_polarity = 1;
776 			return 1;
777 		}
778 	}
779 
780 	/*
781 	 * Fallback case - if we don't find the DMI strings,
782 	 * we statically set the GPIO - if not a B-series system
783 	 * and default polarity is provided
784 	 */
785 	if (!hp_blike_system(codec->core.subsystem_id) &&
786 	    (default_polarity == 0 || default_polarity == 1)) {
787 		set_hp_led_gpio(codec);
788 		spec->gpio_led_polarity = default_polarity;
789 		return 1;
790 	}
791 	return 0;
792 }
793 
794 /* check whether a built-in speaker is included in parsed pins */
795 static bool has_builtin_speaker(struct hda_codec *codec)
796 {
797 	struct sigmatel_spec *spec = codec->spec;
798 	const hda_nid_t *nid_pin;
799 	int nids, i;
800 
801 	if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
802 		nid_pin = spec->gen.autocfg.line_out_pins;
803 		nids = spec->gen.autocfg.line_outs;
804 	} else {
805 		nid_pin = spec->gen.autocfg.speaker_pins;
806 		nids = spec->gen.autocfg.speaker_outs;
807 	}
808 
809 	for (i = 0; i < nids; i++) {
810 		unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
811 		if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
812 			return true;
813 	}
814 	return false;
815 }
816 
817 /*
818  * PC beep controls
819  */
820 
821 /* create PC beep volume controls */
822 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
823 						hda_nid_t nid)
824 {
825 	struct sigmatel_spec *spec = codec->spec;
826 	u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
827 	struct snd_kcontrol_new *knew;
828 	static const struct snd_kcontrol_new abeep_mute_ctl =
829 		HDA_CODEC_MUTE(NULL, 0, 0, 0);
830 	static const struct snd_kcontrol_new dbeep_mute_ctl =
831 		HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
832 	static const struct snd_kcontrol_new beep_vol_ctl =
833 		HDA_CODEC_VOLUME(NULL, 0, 0, 0);
834 
835 	/* check for mute support for the the amp */
836 	if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
837 		const struct snd_kcontrol_new *temp;
838 		if (spec->anabeep_nid == nid)
839 			temp = &abeep_mute_ctl;
840 		else
841 			temp = &dbeep_mute_ctl;
842 		knew = snd_hda_gen_add_kctl(&spec->gen,
843 					    "Beep Playback Switch", temp);
844 		if (!knew)
845 			return -ENOMEM;
846 		knew->private_value =
847 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
848 	}
849 
850 	/* check to see if there is volume support for the amp */
851 	if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
852 		knew = snd_hda_gen_add_kctl(&spec->gen,
853 					    "Beep Playback Volume",
854 					    &beep_vol_ctl);
855 		if (!knew)
856 			return -ENOMEM;
857 		knew->private_value =
858 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
859 	}
860 	return 0;
861 }
862 
863 #ifdef CONFIG_SND_HDA_INPUT_BEEP
864 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
865 
866 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
867 				    struct snd_ctl_elem_value *ucontrol)
868 {
869 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
870 	ucontrol->value.integer.value[0] = codec->beep->enabled;
871 	return 0;
872 }
873 
874 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
875 				    struct snd_ctl_elem_value *ucontrol)
876 {
877 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
878 	return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
879 }
880 
881 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
882 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
883 	.name = "Beep Playback Switch",
884 	.info = stac_dig_beep_switch_info,
885 	.get = stac_dig_beep_switch_get,
886 	.put = stac_dig_beep_switch_put,
887 };
888 
889 static int stac_beep_switch_ctl(struct hda_codec *codec)
890 {
891 	struct sigmatel_spec *spec = codec->spec;
892 
893 	if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
894 		return -ENOMEM;
895 	return 0;
896 }
897 #endif
898 
899 /*
900  * SPDIF-out mux controls
901  */
902 
903 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
904 			       struct snd_ctl_elem_info *uinfo)
905 {
906 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
907 	struct sigmatel_spec *spec = codec->spec;
908 	return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
909 }
910 
911 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
912 			      struct snd_ctl_elem_value *ucontrol)
913 {
914 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
915 	struct sigmatel_spec *spec = codec->spec;
916 	unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
917 
918 	ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
919 	return 0;
920 }
921 
922 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
923 			      struct snd_ctl_elem_value *ucontrol)
924 {
925 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
926 	struct sigmatel_spec *spec = codec->spec;
927 	unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
928 
929 	return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
930 				     spec->gen.autocfg.dig_out_pins[smux_idx],
931 				     &spec->cur_smux[smux_idx]);
932 }
933 
934 static const struct snd_kcontrol_new stac_smux_mixer = {
935 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
936 	.name = "IEC958 Playback Source",
937 	/* count set later */
938 	.info = stac_smux_enum_info,
939 	.get = stac_smux_enum_get,
940 	.put = stac_smux_enum_put,
941 };
942 
943 static const char * const stac_spdif_labels[] = {
944 	"Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
945 };
946 
947 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
948 {
949 	struct sigmatel_spec *spec = codec->spec;
950 	struct auto_pin_cfg *cfg = &spec->gen.autocfg;
951 	const char * const *labels = spec->spdif_labels;
952 	struct snd_kcontrol_new *kctl;
953 	int i, num_cons;
954 
955 	if (cfg->dig_outs < 1)
956 		return 0;
957 
958 	num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
959 	if (num_cons <= 1)
960 		return 0;
961 
962 	if (!labels)
963 		labels = stac_spdif_labels;
964 	for (i = 0; i < num_cons; i++) {
965 		if (snd_BUG_ON(!labels[i]))
966 			return -EINVAL;
967 		snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
968 	}
969 
970 	kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
971 	if (!kctl)
972 		return -ENOMEM;
973 	kctl->count = cfg->dig_outs;
974 
975 	return 0;
976 }
977 
978 static const struct hda_verb stac9200_eapd_init[] = {
979 	/* set dac0mux for dac converter */
980 	{0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
981 	{0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
982 	{}
983 };
984 
985 static const struct hda_verb dell_eq_core_init[] = {
986 	/* set master volume to max value without distortion
987 	 * and direct control */
988 	{ 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
989 	{}
990 };
991 
992 static const struct hda_verb stac92hd73xx_core_init[] = {
993 	/* set master volume and direct control */
994 	{ 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
995 	{}
996 };
997 
998 static const struct hda_verb stac92hd83xxx_core_init[] = {
999 	/* power state controls amps */
1000 	{ 0x01, AC_VERB_SET_EAPD, 1 << 2},
1001 	{}
1002 };
1003 
1004 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1005 	{ 0x22, 0x785, 0x43 },
1006 	{ 0x22, 0x782, 0xe0 },
1007 	{ 0x22, 0x795, 0x00 },
1008 	{}
1009 };
1010 
1011 static const struct hda_verb stac92hd71bxx_core_init[] = {
1012 	/* set master volume and direct control */
1013 	{ 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1014 	{}
1015 };
1016 
1017 static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
1018 	/* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1019 	0x0f, 0x0a, 0x0d, 0
1020 };
1021 
1022 static const struct hda_verb stac925x_core_init[] = {
1023 	/* set dac0mux for dac converter */
1024 	{ 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1025 	/* mute the master volume */
1026 	{ 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1027 	{}
1028 };
1029 
1030 static const struct hda_verb stac922x_core_init[] = {
1031 	/* set master volume and direct control */
1032 	{ 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1033 	{}
1034 };
1035 
1036 static const struct hda_verb d965_core_init[] = {
1037 	/* unmute node 0x1b */
1038 	{ 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1039 	/* select node 0x03 as DAC */
1040 	{ 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1041 	{}
1042 };
1043 
1044 static const struct hda_verb dell_3st_core_init[] = {
1045 	/* don't set delta bit */
1046 	{0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1047 	/* unmute node 0x1b */
1048 	{0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1049 	/* select node 0x03 as DAC */
1050 	{0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1051 	{}
1052 };
1053 
1054 static const struct hda_verb stac927x_core_init[] = {
1055 	/* set master volume and direct control */
1056 	{ 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1057 	/* enable analog pc beep path */
1058 	{ 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1059 	{}
1060 };
1061 
1062 static const struct hda_verb stac927x_volknob_core_init[] = {
1063 	/* don't set delta bit */
1064 	{0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1065 	/* enable analog pc beep path */
1066 	{0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1067 	{}
1068 };
1069 
1070 static const struct hda_verb stac9205_core_init[] = {
1071 	/* set master volume and direct control */
1072 	{ 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1073 	/* enable analog pc beep path */
1074 	{ 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1075 	{}
1076 };
1077 
1078 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1079 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1080 
1081 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1082 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1083 
1084 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1085 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1086 
1087 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1088 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1089 
1090 static const struct snd_kcontrol_new stac9205_loopback =
1091 	STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1092 
1093 static const struct snd_kcontrol_new stac927x_loopback =
1094 	STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1095 
1096 static const struct hda_pintbl ref9200_pin_configs[] = {
1097 	{ 0x08, 0x01c47010 },
1098 	{ 0x09, 0x01447010 },
1099 	{ 0x0d, 0x0221401f },
1100 	{ 0x0e, 0x01114010 },
1101 	{ 0x0f, 0x02a19020 },
1102 	{ 0x10, 0x01a19021 },
1103 	{ 0x11, 0x90100140 },
1104 	{ 0x12, 0x01813122 },
1105 	{}
1106 };
1107 
1108 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1109 	{ 0x08, 0x400000fe },
1110 	{ 0x09, 0x404500f4 },
1111 	{ 0x0d, 0x400100f0 },
1112 	{ 0x0e, 0x90110010 },
1113 	{ 0x0f, 0x400100f1 },
1114 	{ 0x10, 0x02a1902e },
1115 	{ 0x11, 0x500000f2 },
1116 	{ 0x12, 0x500000f3 },
1117 	{}
1118 };
1119 
1120 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1121 	{ 0x08, 0x400000fe },
1122 	{ 0x09, 0x404500f4 },
1123 	{ 0x0d, 0x400100f0 },
1124 	{ 0x0e, 0x90110010 },
1125 	{ 0x0f, 0x400100f1 },
1126 	{ 0x10, 0x02a1902e },
1127 	{ 0x11, 0x500000f2 },
1128 	{ 0x12, 0x500000f3 },
1129 	{}
1130 };
1131 
1132 /*
1133     STAC 9200 pin configs for
1134     102801A8
1135     102801DE
1136     102801E8
1137 */
1138 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1139 	{ 0x08, 0x400001f0 },
1140 	{ 0x09, 0x400001f1 },
1141 	{ 0x0d, 0x02214030 },
1142 	{ 0x0e, 0x01014010 },
1143 	{ 0x0f, 0x02a19020 },
1144 	{ 0x10, 0x01a19021 },
1145 	{ 0x11, 0x90100140 },
1146 	{ 0x12, 0x01813122 },
1147 	{}
1148 };
1149 
1150 /*
1151     STAC 9200 pin configs for
1152     102801C0
1153     102801C1
1154 */
1155 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1156 	{ 0x08, 0x400001f0 },
1157 	{ 0x09, 0x400001f1 },
1158 	{ 0x0d, 0x0221401f },
1159 	{ 0x0e, 0x01014010 },
1160 	{ 0x0f, 0x01813020 },
1161 	{ 0x10, 0x02a19021 },
1162 	{ 0x11, 0x90100140 },
1163 	{ 0x12, 0x400001f2 },
1164 	{}
1165 };
1166 
1167 /*
1168     STAC 9200 pin configs for
1169     102801C4 (Dell Dimension E310)
1170     102801C5
1171     102801C7
1172     102801D9
1173     102801DA
1174     102801E3
1175 */
1176 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1177 	{ 0x08, 0x400001f0 },
1178 	{ 0x09, 0x400001f1 },
1179 	{ 0x0d, 0x0221401f },
1180 	{ 0x0e, 0x01014010 },
1181 	{ 0x0f, 0x01813020 },
1182 	{ 0x10, 0x01a19021 },
1183 	{ 0x11, 0x90100140 },
1184 	{ 0x12, 0x400001f2 },
1185 	{}
1186 };
1187 
1188 
1189 /*
1190     STAC 9200-32 pin configs for
1191     102801B5 (Dell Inspiron 630m)
1192     102801D8 (Dell Inspiron 640m)
1193 */
1194 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1195 	{ 0x08, 0x40c003fa },
1196 	{ 0x09, 0x03441340 },
1197 	{ 0x0d, 0x0321121f },
1198 	{ 0x0e, 0x90170310 },
1199 	{ 0x0f, 0x408003fb },
1200 	{ 0x10, 0x03a11020 },
1201 	{ 0x11, 0x401003fc },
1202 	{ 0x12, 0x403003fd },
1203 	{}
1204 };
1205 
1206 /*
1207     STAC 9200-32 pin configs for
1208     102801C2 (Dell Latitude D620)
1209     102801C8
1210     102801CC (Dell Latitude D820)
1211     102801D4
1212     102801D6
1213 */
1214 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1215 	{ 0x08, 0x40c003fa },
1216 	{ 0x09, 0x0144131f },
1217 	{ 0x0d, 0x0321121f },
1218 	{ 0x0e, 0x90170310 },
1219 	{ 0x0f, 0x90a70321 },
1220 	{ 0x10, 0x03a11020 },
1221 	{ 0x11, 0x401003fb },
1222 	{ 0x12, 0x40f000fc },
1223 	{}
1224 };
1225 
1226 /*
1227     STAC 9200-32 pin configs for
1228     102801CE (Dell XPS M1710)
1229     102801CF (Dell Precision M90)
1230 */
1231 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1232 	{ 0x08, 0x40c003fa },
1233 	{ 0x09, 0x01441340 },
1234 	{ 0x0d, 0x0421421f },
1235 	{ 0x0e, 0x90170310 },
1236 	{ 0x0f, 0x408003fb },
1237 	{ 0x10, 0x04a1102e },
1238 	{ 0x11, 0x90170311 },
1239 	{ 0x12, 0x403003fc },
1240 	{}
1241 };
1242 
1243 /*
1244     STAC 9200-32 pin configs for
1245     102801C9
1246     102801CA
1247     102801CB (Dell Latitude 120L)
1248     102801D3
1249 */
1250 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1251 	{ 0x08, 0x40c003fa },
1252 	{ 0x09, 0x404003fb },
1253 	{ 0x0d, 0x0321121f },
1254 	{ 0x0e, 0x90170310 },
1255 	{ 0x0f, 0x408003fc },
1256 	{ 0x10, 0x03a11020 },
1257 	{ 0x11, 0x401003fd },
1258 	{ 0x12, 0x403003fe },
1259 	{}
1260 };
1261 
1262 /*
1263     STAC 9200-32 pin configs for
1264     102801BD (Dell Inspiron E1505n)
1265     102801EE
1266     102801EF
1267 */
1268 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1269 	{ 0x08, 0x40c003fa },
1270 	{ 0x09, 0x01441340 },
1271 	{ 0x0d, 0x0421121f },
1272 	{ 0x0e, 0x90170310 },
1273 	{ 0x0f, 0x408003fb },
1274 	{ 0x10, 0x04a11020 },
1275 	{ 0x11, 0x401003fc },
1276 	{ 0x12, 0x403003fd },
1277 	{}
1278 };
1279 
1280 /*
1281     STAC 9200-32 pin configs for
1282     102801F5 (Dell Inspiron 1501)
1283     102801F6
1284 */
1285 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1286 	{ 0x08, 0x40c003fa },
1287 	{ 0x09, 0x404003fb },
1288 	{ 0x0d, 0x0421121f },
1289 	{ 0x0e, 0x90170310 },
1290 	{ 0x0f, 0x408003fc },
1291 	{ 0x10, 0x04a11020 },
1292 	{ 0x11, 0x401003fd },
1293 	{ 0x12, 0x403003fe },
1294 	{}
1295 };
1296 
1297 /*
1298     STAC 9200-32
1299     102801CD (Dell Inspiron E1705/9400)
1300 */
1301 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1302 	{ 0x08, 0x40c003fa },
1303 	{ 0x09, 0x01441340 },
1304 	{ 0x0d, 0x0421121f },
1305 	{ 0x0e, 0x90170310 },
1306 	{ 0x0f, 0x90170310 },
1307 	{ 0x10, 0x04a11020 },
1308 	{ 0x11, 0x90170310 },
1309 	{ 0x12, 0x40f003fc },
1310 	{}
1311 };
1312 
1313 static const struct hda_pintbl oqo9200_pin_configs[] = {
1314 	{ 0x08, 0x40c000f0 },
1315 	{ 0x09, 0x404000f1 },
1316 	{ 0x0d, 0x0221121f },
1317 	{ 0x0e, 0x02211210 },
1318 	{ 0x0f, 0x90170111 },
1319 	{ 0x10, 0x90a70120 },
1320 	{ 0x11, 0x400000f2 },
1321 	{ 0x12, 0x400000f3 },
1322 	{}
1323 };
1324 
1325 /*
1326  *  STAC 92HD700
1327  *  18881000 Amigaone X1000
1328  */
1329 static const struct hda_pintbl nemo_pin_configs[] = {
1330 	{ 0x0a, 0x02214020 },	/* Front panel HP socket */
1331 	{ 0x0b, 0x02a19080 },	/* Front Mic */
1332 	{ 0x0c, 0x0181304e },	/* Line in */
1333 	{ 0x0d, 0x01014010 },	/* Line out */
1334 	{ 0x0e, 0x01a19040 },	/* Rear Mic */
1335 	{ 0x0f, 0x01011012 },	/* Rear speakers */
1336 	{ 0x10, 0x01016011 },	/* Center speaker */
1337 	{ 0x11, 0x01012014 },	/* Side speakers (7.1) */
1338 	{ 0x12, 0x103301f0 },	/* Motherboard CD line in connector */
1339 	{ 0x13, 0x411111f0 },	/* Unused */
1340 	{ 0x14, 0x411111f0 },	/* Unused */
1341 	{ 0x21, 0x01442170 },	/* S/PDIF line out */
1342 	{ 0x22, 0x411111f0 },	/* Unused */
1343 	{ 0x23, 0x411111f0 },	/* Unused */
1344 	{}
1345 };
1346 
1347 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1348 				     const struct hda_fixup *fix, int action)
1349 {
1350 	struct sigmatel_spec *spec = codec->spec;
1351 
1352 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1353 		spec->gpio_mask = spec->gpio_dir = 0x09;
1354 		spec->gpio_data = 0x00;
1355 		/* CF-74 has no headphone detection, and the driver should *NOT*
1356 		 * do detection and HP/speaker toggle because the hardware does it.
1357 		 */
1358 		spec->gen.suppress_auto_mute = 1;
1359 	}
1360 }
1361 
1362 
1363 static const struct hda_fixup stac9200_fixups[] = {
1364 	[STAC_REF] = {
1365 		.type = HDA_FIXUP_PINS,
1366 		.v.pins = ref9200_pin_configs,
1367 	},
1368 	[STAC_9200_OQO] = {
1369 		.type = HDA_FIXUP_PINS,
1370 		.v.pins = oqo9200_pin_configs,
1371 		.chained = true,
1372 		.chain_id = STAC_9200_EAPD_INIT,
1373 	},
1374 	[STAC_9200_DELL_D21] = {
1375 		.type = HDA_FIXUP_PINS,
1376 		.v.pins = dell9200_d21_pin_configs,
1377 	},
1378 	[STAC_9200_DELL_D22] = {
1379 		.type = HDA_FIXUP_PINS,
1380 		.v.pins = dell9200_d22_pin_configs,
1381 	},
1382 	[STAC_9200_DELL_D23] = {
1383 		.type = HDA_FIXUP_PINS,
1384 		.v.pins = dell9200_d23_pin_configs,
1385 	},
1386 	[STAC_9200_DELL_M21] = {
1387 		.type = HDA_FIXUP_PINS,
1388 		.v.pins = dell9200_m21_pin_configs,
1389 	},
1390 	[STAC_9200_DELL_M22] = {
1391 		.type = HDA_FIXUP_PINS,
1392 		.v.pins = dell9200_m22_pin_configs,
1393 	},
1394 	[STAC_9200_DELL_M23] = {
1395 		.type = HDA_FIXUP_PINS,
1396 		.v.pins = dell9200_m23_pin_configs,
1397 	},
1398 	[STAC_9200_DELL_M24] = {
1399 		.type = HDA_FIXUP_PINS,
1400 		.v.pins = dell9200_m24_pin_configs,
1401 	},
1402 	[STAC_9200_DELL_M25] = {
1403 		.type = HDA_FIXUP_PINS,
1404 		.v.pins = dell9200_m25_pin_configs,
1405 	},
1406 	[STAC_9200_DELL_M26] = {
1407 		.type = HDA_FIXUP_PINS,
1408 		.v.pins = dell9200_m26_pin_configs,
1409 	},
1410 	[STAC_9200_DELL_M27] = {
1411 		.type = HDA_FIXUP_PINS,
1412 		.v.pins = dell9200_m27_pin_configs,
1413 	},
1414 	[STAC_9200_M4] = {
1415 		.type = HDA_FIXUP_PINS,
1416 		.v.pins = gateway9200_m4_pin_configs,
1417 		.chained = true,
1418 		.chain_id = STAC_9200_EAPD_INIT,
1419 	},
1420 	[STAC_9200_M4_2] = {
1421 		.type = HDA_FIXUP_PINS,
1422 		.v.pins = gateway9200_m4_2_pin_configs,
1423 		.chained = true,
1424 		.chain_id = STAC_9200_EAPD_INIT,
1425 	},
1426 	[STAC_9200_PANASONIC] = {
1427 		.type = HDA_FIXUP_FUNC,
1428 		.v.func = stac9200_fixup_panasonic,
1429 	},
1430 	[STAC_9200_EAPD_INIT] = {
1431 		.type = HDA_FIXUP_VERBS,
1432 		.v.verbs = (const struct hda_verb[]) {
1433 			{0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1434 			{}
1435 		},
1436 	},
1437 };
1438 
1439 static const struct hda_model_fixup stac9200_models[] = {
1440 	{ .id = STAC_REF, .name = "ref" },
1441 	{ .id = STAC_9200_OQO, .name = "oqo" },
1442 	{ .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1443 	{ .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1444 	{ .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1445 	{ .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1446 	{ .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1447 	{ .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1448 	{ .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1449 	{ .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1450 	{ .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1451 	{ .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1452 	{ .id = STAC_9200_M4, .name = "gateway-m4" },
1453 	{ .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1454 	{ .id = STAC_9200_PANASONIC, .name = "panasonic" },
1455 	{}
1456 };
1457 
1458 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1459 	/* SigmaTel reference board */
1460 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1461 		      "DFI LanParty", STAC_REF),
1462 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1463 		      "DFI LanParty", STAC_REF),
1464 	/* Dell laptops have BIOS problem */
1465 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1466 		      "unknown Dell", STAC_9200_DELL_D21),
1467 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1468 		      "Dell Inspiron 630m", STAC_9200_DELL_M21),
1469 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1470 		      "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1471 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1472 		      "unknown Dell", STAC_9200_DELL_D22),
1473 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1474 		      "unknown Dell", STAC_9200_DELL_D22),
1475 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1476 		      "Dell Latitude D620", STAC_9200_DELL_M22),
1477 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1478 		      "unknown Dell", STAC_9200_DELL_D23),
1479 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1480 		      "unknown Dell", STAC_9200_DELL_D23),
1481 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1482 		      "unknown Dell", STAC_9200_DELL_M22),
1483 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1484 		      "unknown Dell", STAC_9200_DELL_M24),
1485 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1486 		      "unknown Dell", STAC_9200_DELL_M24),
1487 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1488 		      "Dell Latitude 120L", STAC_9200_DELL_M24),
1489 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1490 		      "Dell Latitude D820", STAC_9200_DELL_M22),
1491 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1492 		      "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1493 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1494 		      "Dell XPS M1710", STAC_9200_DELL_M23),
1495 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1496 		      "Dell Precision M90", STAC_9200_DELL_M23),
1497 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1498 		      "unknown Dell", STAC_9200_DELL_M22),
1499 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1500 		      "unknown Dell", STAC_9200_DELL_M22),
1501 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1502 		      "unknown Dell", STAC_9200_DELL_M22),
1503 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1504 		      "Dell Inspiron 640m", STAC_9200_DELL_M21),
1505 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1506 		      "unknown Dell", STAC_9200_DELL_D23),
1507 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1508 		      "unknown Dell", STAC_9200_DELL_D23),
1509 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1510 		      "unknown Dell", STAC_9200_DELL_D21),
1511 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1512 		      "unknown Dell", STAC_9200_DELL_D23),
1513 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1514 		      "unknown Dell", STAC_9200_DELL_D21),
1515 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1516 		      "unknown Dell", STAC_9200_DELL_M25),
1517 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1518 		      "unknown Dell", STAC_9200_DELL_M25),
1519 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1520 		      "Dell Inspiron 1501", STAC_9200_DELL_M26),
1521 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1522 		      "unknown Dell", STAC_9200_DELL_M26),
1523 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1524 		      "Dell Latitude D430", STAC_9200_DELL_M22),
1525 	/* Panasonic */
1526 	SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1527 	/* Gateway machines needs EAPD to be set on resume */
1528 	SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1529 	SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1530 	SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1531 	/* OQO Mobile */
1532 	SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1533 	{} /* terminator */
1534 };
1535 
1536 static const struct hda_pintbl ref925x_pin_configs[] = {
1537 	{ 0x07, 0x40c003f0 },
1538 	{ 0x08, 0x424503f2 },
1539 	{ 0x0a, 0x01813022 },
1540 	{ 0x0b, 0x02a19021 },
1541 	{ 0x0c, 0x90a70320 },
1542 	{ 0x0d, 0x02214210 },
1543 	{ 0x10, 0x01019020 },
1544 	{ 0x11, 0x9033032e },
1545 	{}
1546 };
1547 
1548 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1549 	{ 0x07, 0x40c003f4 },
1550 	{ 0x08, 0x424503f2 },
1551 	{ 0x0a, 0x400000f3 },
1552 	{ 0x0b, 0x02a19020 },
1553 	{ 0x0c, 0x40a000f0 },
1554 	{ 0x0d, 0x90100210 },
1555 	{ 0x10, 0x400003f1 },
1556 	{ 0x11, 0x9033032e },
1557 	{}
1558 };
1559 
1560 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1561 	{ 0x07, 0x40c003f4 },
1562 	{ 0x08, 0x424503f2 },
1563 	{ 0x0a, 0x400000f3 },
1564 	{ 0x0b, 0x02a19020 },
1565 	{ 0x0c, 0x40a000f0 },
1566 	{ 0x0d, 0x90100210 },
1567 	{ 0x10, 0x400003f1 },
1568 	{ 0x11, 0x9033032e },
1569 	{}
1570 };
1571 
1572 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1573 	{ 0x07, 0x40c003f4 },
1574 	{ 0x08, 0x424503f2 },
1575 	{ 0x0a, 0x400000f3 },
1576 	{ 0x0b, 0x02a19020 },
1577 	{ 0x0c, 0x40a000f0 },
1578 	{ 0x0d, 0x90100210 },
1579 	{ 0x10, 0x400003f1 },
1580 	{ 0x11, 0x9033032e },
1581 	{}
1582 };
1583 
1584 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1585 	{ 0x07, 0x40c003f4 },
1586 	{ 0x08, 0x424503f2 },
1587 	{ 0x0a, 0x400000f3 },
1588 	{ 0x0b, 0x02a19020 },
1589 	{ 0x0c, 0x40a000f0 },
1590 	{ 0x0d, 0x90100210 },
1591 	{ 0x10, 0x400003f1 },
1592 	{ 0x11, 0x9033032e },
1593 	{}
1594 };
1595 
1596 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1597 	{ 0x07, 0x40c003f4 },
1598 	{ 0x08, 0x424503f2 },
1599 	{ 0x0a, 0x400000f3 },
1600 	{ 0x0b, 0x02a19020 },
1601 	{ 0x0c, 0x40a000f0 },
1602 	{ 0x0d, 0x90100210 },
1603 	{ 0x10, 0x400003f1 },
1604 	{ 0x11, 0x503303f3 },
1605 	{}
1606 };
1607 
1608 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1609 	{ 0x07, 0x40c003f4 },
1610 	{ 0x08, 0x424503f2 },
1611 	{ 0x0a, 0x400000f3 },
1612 	{ 0x0b, 0x02a19020 },
1613 	{ 0x0c, 0x40a000f0 },
1614 	{ 0x0d, 0x90100210 },
1615 	{ 0x10, 0x400003f1 },
1616 	{ 0x11, 0x9033032e },
1617 	{}
1618 };
1619 
1620 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1621 	{ 0x07, 0x40c003f4 },
1622 	{ 0x08, 0x424503f2 },
1623 	{ 0x0a, 0x400000f3 },
1624 	{ 0x0b, 0x02a19020 },
1625 	{ 0x0c, 0x40a000f0 },
1626 	{ 0x0d, 0x90100210 },
1627 	{ 0x10, 0x400003f1 },
1628 	{ 0x11, 0x90330320 },
1629 	{}
1630 };
1631 
1632 static const struct hda_fixup stac925x_fixups[] = {
1633 	[STAC_REF] = {
1634 		.type = HDA_FIXUP_PINS,
1635 		.v.pins = ref925x_pin_configs,
1636 	},
1637 	[STAC_M1] = {
1638 		.type = HDA_FIXUP_PINS,
1639 		.v.pins = stac925xM1_pin_configs,
1640 	},
1641 	[STAC_M1_2] = {
1642 		.type = HDA_FIXUP_PINS,
1643 		.v.pins = stac925xM1_2_pin_configs,
1644 	},
1645 	[STAC_M2] = {
1646 		.type = HDA_FIXUP_PINS,
1647 		.v.pins = stac925xM2_pin_configs,
1648 	},
1649 	[STAC_M2_2] = {
1650 		.type = HDA_FIXUP_PINS,
1651 		.v.pins = stac925xM2_2_pin_configs,
1652 	},
1653 	[STAC_M3] = {
1654 		.type = HDA_FIXUP_PINS,
1655 		.v.pins = stac925xM3_pin_configs,
1656 	},
1657 	[STAC_M5] = {
1658 		.type = HDA_FIXUP_PINS,
1659 		.v.pins = stac925xM5_pin_configs,
1660 	},
1661 	[STAC_M6] = {
1662 		.type = HDA_FIXUP_PINS,
1663 		.v.pins = stac925xM6_pin_configs,
1664 	},
1665 };
1666 
1667 static const struct hda_model_fixup stac925x_models[] = {
1668 	{ .id = STAC_REF, .name = "ref" },
1669 	{ .id = STAC_M1, .name = "m1" },
1670 	{ .id = STAC_M1_2, .name = "m1-2" },
1671 	{ .id = STAC_M2, .name = "m2" },
1672 	{ .id = STAC_M2_2, .name = "m2-2" },
1673 	{ .id = STAC_M3, .name = "m3" },
1674 	{ .id = STAC_M5, .name = "m5" },
1675 	{ .id = STAC_M6, .name = "m6" },
1676 	{}
1677 };
1678 
1679 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1680 	/* SigmaTel reference board */
1681 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1682 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1683 	SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1684 
1685 	/* Default table for unknown ID */
1686 	SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1687 
1688 	/* gateway machines are checked via codec ssid */
1689 	SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1690 	SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1691 	SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1692 	SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1693 	SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1694 	/* Not sure about the brand name for those */
1695 	SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1696 	SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1697 	SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1698 	SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1699 	{} /* terminator */
1700 };
1701 
1702 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1703 	{ 0x0a, 0x02214030 },
1704 	{ 0x0b, 0x02a19040 },
1705 	{ 0x0c, 0x01a19020 },
1706 	{ 0x0d, 0x02214030 },
1707 	{ 0x0e, 0x0181302e },
1708 	{ 0x0f, 0x01014010 },
1709 	{ 0x10, 0x01014020 },
1710 	{ 0x11, 0x01014030 },
1711 	{ 0x12, 0x02319040 },
1712 	{ 0x13, 0x90a000f0 },
1713 	{ 0x14, 0x90a000f0 },
1714 	{ 0x22, 0x01452050 },
1715 	{ 0x23, 0x01452050 },
1716 	{}
1717 };
1718 
1719 static const struct hda_pintbl dell_m6_pin_configs[] = {
1720 	{ 0x0a, 0x0321101f },
1721 	{ 0x0b, 0x4f00000f },
1722 	{ 0x0c, 0x4f0000f0 },
1723 	{ 0x0d, 0x90170110 },
1724 	{ 0x0e, 0x03a11020 },
1725 	{ 0x0f, 0x0321101f },
1726 	{ 0x10, 0x4f0000f0 },
1727 	{ 0x11, 0x4f0000f0 },
1728 	{ 0x12, 0x4f0000f0 },
1729 	{ 0x13, 0x90a60160 },
1730 	{ 0x14, 0x4f0000f0 },
1731 	{ 0x22, 0x4f0000f0 },
1732 	{ 0x23, 0x4f0000f0 },
1733 	{}
1734 };
1735 
1736 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1737 	{ 0x0a, 0x0321101f },
1738 	{ 0x0b, 0x0321101f },
1739 	{ 0x0c, 0x03a11020 },
1740 	{ 0x0d, 0x03014020 },
1741 	{ 0x0e, 0x90170110 },
1742 	{ 0x0f, 0x4f0000f0 },
1743 	{ 0x10, 0x4f0000f0 },
1744 	{ 0x11, 0x4f0000f0 },
1745 	{ 0x12, 0x4f0000f0 },
1746 	{ 0x13, 0x90a60160 },
1747 	{ 0x14, 0x4f0000f0 },
1748 	{ 0x22, 0x4f0000f0 },
1749 	{ 0x23, 0x904601b0 },
1750 	{}
1751 };
1752 
1753 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1754 	{ 0x0a, 0x02214230 },
1755 	{ 0x0b, 0x02A19240 },
1756 	{ 0x0c, 0x01013214 },
1757 	{ 0x0d, 0x01014210 },
1758 	{ 0x0e, 0x01A19250 },
1759 	{ 0x0f, 0x01011212 },
1760 	{ 0x10, 0x01016211 },
1761 	{}
1762 };
1763 
1764 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1765 	{ 0x0a, 0x02214030 },
1766 	{ 0x0b, 0x02A19010 },
1767 	{}
1768 };
1769 
1770 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1771 	{ 0x0e, 0x400000f0 },
1772 	{}
1773 };
1774 
1775 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1776 				   const struct hda_fixup *fix, int action)
1777 {
1778 	struct sigmatel_spec *spec = codec->spec;
1779 
1780 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1781 		return;
1782 
1783 	snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1784 	spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1785 }
1786 
1787 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1788 {
1789 	struct sigmatel_spec *spec = codec->spec;
1790 
1791 	snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1792 	spec->eapd_switch = 0;
1793 }
1794 
1795 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1796 				       const struct hda_fixup *fix, int action)
1797 {
1798 	struct sigmatel_spec *spec = codec->spec;
1799 
1800 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1801 		return;
1802 
1803 	stac92hd73xx_fixup_dell(codec);
1804 	snd_hda_add_verbs(codec, dell_eq_core_init);
1805 	spec->volknob_init = 1;
1806 }
1807 
1808 /* Analog Mics */
1809 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1810 				    const struct hda_fixup *fix, int action)
1811 {
1812 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1813 		return;
1814 
1815 	stac92hd73xx_fixup_dell(codec);
1816 	snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1817 }
1818 
1819 /* Digital Mics */
1820 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1821 				    const struct hda_fixup *fix, int action)
1822 {
1823 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1824 		return;
1825 
1826 	stac92hd73xx_fixup_dell(codec);
1827 	snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1828 }
1829 
1830 /* Both */
1831 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1832 				    const struct hda_fixup *fix, int action)
1833 {
1834 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1835 		return;
1836 
1837 	stac92hd73xx_fixup_dell(codec);
1838 	snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1839 	snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1840 }
1841 
1842 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1843 				    const struct hda_fixup *fix, int action)
1844 {
1845 	struct sigmatel_spec *spec = codec->spec;
1846 
1847 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1848 		return;
1849 
1850 	snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1851 	spec->eapd_switch = 0;
1852 }
1853 
1854 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1855 				     const struct hda_fixup *fix, int action)
1856 {
1857 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
1858 		codec->no_jack_detect = 1;
1859 }
1860 
1861 
1862 static void stac92hd73xx_disable_automute(struct hda_codec *codec,
1863 				     const struct hda_fixup *fix, int action)
1864 {
1865 	struct sigmatel_spec *spec = codec->spec;
1866 
1867 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1868 		return;
1869 
1870 	spec->gen.suppress_auto_mute = 1;
1871 }
1872 
1873 static const struct hda_fixup stac92hd73xx_fixups[] = {
1874 	[STAC_92HD73XX_REF] = {
1875 		.type = HDA_FIXUP_FUNC,
1876 		.v.func = stac92hd73xx_fixup_ref,
1877 	},
1878 	[STAC_DELL_M6_AMIC] = {
1879 		.type = HDA_FIXUP_FUNC,
1880 		.v.func = stac92hd73xx_fixup_dell_m6_amic,
1881 	},
1882 	[STAC_DELL_M6_DMIC] = {
1883 		.type = HDA_FIXUP_FUNC,
1884 		.v.func = stac92hd73xx_fixup_dell_m6_dmic,
1885 	},
1886 	[STAC_DELL_M6_BOTH] = {
1887 		.type = HDA_FIXUP_FUNC,
1888 		.v.func = stac92hd73xx_fixup_dell_m6_both,
1889 	},
1890 	[STAC_DELL_EQ]	= {
1891 		.type = HDA_FIXUP_FUNC,
1892 		.v.func = stac92hd73xx_fixup_dell_eq,
1893 	},
1894 	[STAC_ALIENWARE_M17X] = {
1895 		.type = HDA_FIXUP_FUNC,
1896 		.v.func = stac92hd73xx_fixup_alienware_m17x,
1897 	},
1898 	[STAC_ELO_VUPOINT_15MX] = {
1899 		.type = HDA_FIXUP_FUNC,
1900 		.v.func = stac92hd73xx_disable_automute,
1901 	},
1902 	[STAC_92HD73XX_INTEL] = {
1903 		.type = HDA_FIXUP_PINS,
1904 		.v.pins = intel_dg45id_pin_configs,
1905 	},
1906 	[STAC_92HD73XX_NO_JD] = {
1907 		.type = HDA_FIXUP_FUNC,
1908 		.v.func = stac92hd73xx_fixup_no_jd,
1909 	},
1910 	[STAC_92HD89XX_HP_FRONT_JACK] = {
1911 		.type = HDA_FIXUP_PINS,
1912 		.v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1913 	},
1914 	[STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1915 		.type = HDA_FIXUP_PINS,
1916 		.v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1917 	},
1918 	[STAC_92HD73XX_ASUS_MOBO] = {
1919 		.type = HDA_FIXUP_PINS,
1920 		.v.pins = (const struct hda_pintbl[]) {
1921 			/* enable 5.1 and SPDIF out */
1922 			{ 0x0c, 0x01014411 },
1923 			{ 0x0d, 0x01014410 },
1924 			{ 0x0e, 0x01014412 },
1925 			{ 0x22, 0x014b1180 },
1926 			{ }
1927 		}
1928 	},
1929 };
1930 
1931 static const struct hda_model_fixup stac92hd73xx_models[] = {
1932 	{ .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1933 	{ .id = STAC_92HD73XX_REF, .name = "ref" },
1934 	{ .id = STAC_92HD73XX_INTEL, .name = "intel" },
1935 	{ .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1936 	{ .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1937 	{ .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1938 	{ .id = STAC_DELL_EQ, .name = "dell-eq" },
1939 	{ .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1940 	{ .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" },
1941 	{ .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1942 	{}
1943 };
1944 
1945 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1946 	/* SigmaTel reference board */
1947 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1948 				"DFI LanParty", STAC_92HD73XX_REF),
1949 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1950 				"DFI LanParty", STAC_92HD73XX_REF),
1951 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1952 				"Intel DG45ID", STAC_92HD73XX_INTEL),
1953 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1954 				"Intel DG45FC", STAC_92HD73XX_INTEL),
1955 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1956 				"Dell Studio 1535", STAC_DELL_M6_DMIC),
1957 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1958 				"unknown Dell", STAC_DELL_M6_DMIC),
1959 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1960 				"unknown Dell", STAC_DELL_M6_BOTH),
1961 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1962 				"unknown Dell", STAC_DELL_M6_BOTH),
1963 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1964 				"unknown Dell", STAC_DELL_M6_AMIC),
1965 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1966 				"unknown Dell", STAC_DELL_M6_AMIC),
1967 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1968 				"unknown Dell", STAC_DELL_M6_DMIC),
1969 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1970 				"unknown Dell", STAC_DELL_M6_DMIC),
1971 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1972 				"Dell Studio 1537", STAC_DELL_M6_DMIC),
1973 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1974 				"Dell Studio 17", STAC_DELL_M6_DMIC),
1975 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1976 				"Dell Studio 1555", STAC_DELL_M6_DMIC),
1977 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1978 				"Dell Studio 1557", STAC_DELL_M6_DMIC),
1979 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1980 				"Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1981 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1982 				"Dell Studio 1558", STAC_DELL_M6_DMIC),
1983 	/* codec SSID matching */
1984 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1985 		      "Alienware M17x", STAC_ALIENWARE_M17X),
1986 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1987 		      "Alienware M17x", STAC_ALIENWARE_M17X),
1988 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1989 		      "Alienware M17x R3", STAC_DELL_EQ),
1990 	SND_PCI_QUIRK(0x1059, 0x1011,
1991 		      "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX),
1992 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
1993 				"HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
1994 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
1995 				"unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
1996 	SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
1997 		      STAC_92HD73XX_ASUS_MOBO),
1998 	{} /* terminator */
1999 };
2000 
2001 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2002 	{ 0x0a, 0x02214030 },
2003 	{ 0x0b, 0x02211010 },
2004 	{ 0x0c, 0x02a19020 },
2005 	{ 0x0d, 0x02170130 },
2006 	{ 0x0e, 0x01014050 },
2007 	{ 0x0f, 0x01819040 },
2008 	{ 0x10, 0x01014020 },
2009 	{ 0x11, 0x90a3014e },
2010 	{ 0x1f, 0x01451160 },
2011 	{ 0x20, 0x98560170 },
2012 	{}
2013 };
2014 
2015 static const struct hda_pintbl dell_s14_pin_configs[] = {
2016 	{ 0x0a, 0x0221403f },
2017 	{ 0x0b, 0x0221101f },
2018 	{ 0x0c, 0x02a19020 },
2019 	{ 0x0d, 0x90170110 },
2020 	{ 0x0e, 0x40f000f0 },
2021 	{ 0x0f, 0x40f000f0 },
2022 	{ 0x10, 0x40f000f0 },
2023 	{ 0x11, 0x90a60160 },
2024 	{ 0x1f, 0x40f000f0 },
2025 	{ 0x20, 0x40f000f0 },
2026 	{}
2027 };
2028 
2029 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2030 	{ 0x0a, 0x02a11020 },
2031 	{ 0x0b, 0x0221101f },
2032 	{ 0x0c, 0x400000f0 },
2033 	{ 0x0d, 0x90170110 },
2034 	{ 0x0e, 0x400000f1 },
2035 	{ 0x0f, 0x400000f2 },
2036 	{ 0x10, 0x400000f3 },
2037 	{ 0x11, 0x90a60160 },
2038 	{ 0x1f, 0x400000f4 },
2039 	{ 0x20, 0x400000f5 },
2040 	{}
2041 };
2042 
2043 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2044 	{ 0x0a, 0x03a12050 },
2045 	{ 0x0b, 0x0321201f },
2046 	{ 0x0c, 0x40f000f0 },
2047 	{ 0x0d, 0x90170110 },
2048 	{ 0x0e, 0x40f000f0 },
2049 	{ 0x0f, 0x40f000f0 },
2050 	{ 0x10, 0x90170110 },
2051 	{ 0x11, 0xd5a30140 },
2052 	{ 0x1f, 0x40f000f0 },
2053 	{ 0x20, 0x40f000f0 },
2054 	{}
2055 };
2056 
2057 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2058 	{ 0x0a, 0x01813050 },
2059 	{ 0x0b, 0x0421201f },
2060 	{ 0x0c, 0x04a1205e },
2061 	{ 0x0d, 0x96130310 },
2062 	{ 0x0e, 0x96130310 },
2063 	{ 0x0f, 0x0101401f },
2064 	{ 0x10, 0x1111611f },
2065 	{ 0x11, 0xd5a30130 },
2066 	{}
2067 };
2068 
2069 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2070 	{ 0x0a, 0x40f000f0 },
2071 	{ 0x0b, 0x0221101f },
2072 	{ 0x0c, 0x02a11020 },
2073 	{ 0x0d, 0x92170110 },
2074 	{ 0x0e, 0x40f000f0 },
2075 	{ 0x0f, 0x92170110 },
2076 	{ 0x10, 0x40f000f0 },
2077 	{ 0x11, 0xd5a30130 },
2078 	{ 0x1f, 0x40f000f0 },
2079 	{ 0x20, 0x40f000f0 },
2080 	{}
2081 };
2082 
2083 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2084 				   const struct hda_fixup *fix, int action)
2085 {
2086 	struct sigmatel_spec *spec = codec->spec;
2087 
2088 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2089 		return;
2090 
2091 	if (hp_bnb2011_with_dock(codec)) {
2092 		snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2093 		snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2094 	}
2095 
2096 	if (find_mute_led_cfg(codec, spec->default_polarity))
2097 		codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2098 				spec->gpio_led,
2099 				spec->gpio_led_polarity);
2100 
2101 	/* allow auto-switching of dock line-in */
2102 	spec->gen.line_in_auto_switch = true;
2103 }
2104 
2105 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2106 				   const struct hda_fixup *fix, int action)
2107 {
2108 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2109 		return;
2110 
2111 	snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2112 	snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2113 }
2114 
2115 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2116 				   const struct hda_fixup *fix, int action)
2117 {
2118 	struct sigmatel_spec *spec = codec->spec;
2119 
2120 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2121 		spec->default_polarity = 0;
2122 }
2123 
2124 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2125 				   const struct hda_fixup *fix, int action)
2126 {
2127 	struct sigmatel_spec *spec = codec->spec;
2128 
2129 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2130 		spec->default_polarity = 1;
2131 }
2132 
2133 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2134 				   const struct hda_fixup *fix, int action)
2135 {
2136 	struct sigmatel_spec *spec = codec->spec;
2137 
2138 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2139 		spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2140 #ifdef CONFIG_PM
2141 		/* resetting controller clears GPIO, so we need to keep on */
2142 		codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
2143 #endif
2144 	}
2145 }
2146 
2147 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2148 				   const struct hda_fixup *fix, int action)
2149 {
2150 	struct sigmatel_spec *spec = codec->spec;
2151 
2152 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2153 		spec->gpio_led = 0x10; /* GPIO4 */
2154 		spec->default_polarity = 0;
2155 	}
2156 }
2157 
2158 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2159 				   const struct hda_fixup *fix, int action)
2160 {
2161 	struct sigmatel_spec *spec = codec->spec;
2162 
2163 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2164 		spec->headset_jack = 1;
2165 }
2166 
2167 static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2168 					    const struct hda_fixup *fix,
2169 					    int action)
2170 {
2171 	struct sigmatel_spec *spec = codec->spec;
2172 
2173 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2174 		return;
2175 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2176 		spec->gpio_data = 0x10;
2177 	spec->eapd_switch = 0;
2178 }
2179 
2180 static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2181 					    const struct hda_fixup *fix,
2182 					    int action)
2183 {
2184 	struct sigmatel_spec *spec = codec->spec;
2185 	static const hda_nid_t preferred_pairs[] = {
2186 		0xd, 0x13,
2187 		0
2188 	};
2189 
2190 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2191 		return;
2192 
2193 	spec->gen.preferred_dacs = preferred_pairs;
2194 }
2195 
2196 static const struct hda_verb hp_bnb13_eq_verbs[] = {
2197 	/* 44.1KHz base */
2198 	{ 0x22, 0x7A6, 0x3E },
2199 	{ 0x22, 0x7A7, 0x68 },
2200 	{ 0x22, 0x7A8, 0x17 },
2201 	{ 0x22, 0x7A9, 0x3E },
2202 	{ 0x22, 0x7AA, 0x68 },
2203 	{ 0x22, 0x7AB, 0x17 },
2204 	{ 0x22, 0x7AC, 0x00 },
2205 	{ 0x22, 0x7AD, 0x80 },
2206 	{ 0x22, 0x7A6, 0x83 },
2207 	{ 0x22, 0x7A7, 0x2F },
2208 	{ 0x22, 0x7A8, 0xD1 },
2209 	{ 0x22, 0x7A9, 0x83 },
2210 	{ 0x22, 0x7AA, 0x2F },
2211 	{ 0x22, 0x7AB, 0xD1 },
2212 	{ 0x22, 0x7AC, 0x01 },
2213 	{ 0x22, 0x7AD, 0x80 },
2214 	{ 0x22, 0x7A6, 0x3E },
2215 	{ 0x22, 0x7A7, 0x68 },
2216 	{ 0x22, 0x7A8, 0x17 },
2217 	{ 0x22, 0x7A9, 0x3E },
2218 	{ 0x22, 0x7AA, 0x68 },
2219 	{ 0x22, 0x7AB, 0x17 },
2220 	{ 0x22, 0x7AC, 0x02 },
2221 	{ 0x22, 0x7AD, 0x80 },
2222 	{ 0x22, 0x7A6, 0x7C },
2223 	{ 0x22, 0x7A7, 0xC6 },
2224 	{ 0x22, 0x7A8, 0x0C },
2225 	{ 0x22, 0x7A9, 0x7C },
2226 	{ 0x22, 0x7AA, 0xC6 },
2227 	{ 0x22, 0x7AB, 0x0C },
2228 	{ 0x22, 0x7AC, 0x03 },
2229 	{ 0x22, 0x7AD, 0x80 },
2230 	{ 0x22, 0x7A6, 0xC3 },
2231 	{ 0x22, 0x7A7, 0x25 },
2232 	{ 0x22, 0x7A8, 0xAF },
2233 	{ 0x22, 0x7A9, 0xC3 },
2234 	{ 0x22, 0x7AA, 0x25 },
2235 	{ 0x22, 0x7AB, 0xAF },
2236 	{ 0x22, 0x7AC, 0x04 },
2237 	{ 0x22, 0x7AD, 0x80 },
2238 	{ 0x22, 0x7A6, 0x3E },
2239 	{ 0x22, 0x7A7, 0x85 },
2240 	{ 0x22, 0x7A8, 0x73 },
2241 	{ 0x22, 0x7A9, 0x3E },
2242 	{ 0x22, 0x7AA, 0x85 },
2243 	{ 0x22, 0x7AB, 0x73 },
2244 	{ 0x22, 0x7AC, 0x05 },
2245 	{ 0x22, 0x7AD, 0x80 },
2246 	{ 0x22, 0x7A6, 0x85 },
2247 	{ 0x22, 0x7A7, 0x39 },
2248 	{ 0x22, 0x7A8, 0xC7 },
2249 	{ 0x22, 0x7A9, 0x85 },
2250 	{ 0x22, 0x7AA, 0x39 },
2251 	{ 0x22, 0x7AB, 0xC7 },
2252 	{ 0x22, 0x7AC, 0x06 },
2253 	{ 0x22, 0x7AD, 0x80 },
2254 	{ 0x22, 0x7A6, 0x3C },
2255 	{ 0x22, 0x7A7, 0x90 },
2256 	{ 0x22, 0x7A8, 0xB0 },
2257 	{ 0x22, 0x7A9, 0x3C },
2258 	{ 0x22, 0x7AA, 0x90 },
2259 	{ 0x22, 0x7AB, 0xB0 },
2260 	{ 0x22, 0x7AC, 0x07 },
2261 	{ 0x22, 0x7AD, 0x80 },
2262 	{ 0x22, 0x7A6, 0x7A },
2263 	{ 0x22, 0x7A7, 0xC6 },
2264 	{ 0x22, 0x7A8, 0x39 },
2265 	{ 0x22, 0x7A9, 0x7A },
2266 	{ 0x22, 0x7AA, 0xC6 },
2267 	{ 0x22, 0x7AB, 0x39 },
2268 	{ 0x22, 0x7AC, 0x08 },
2269 	{ 0x22, 0x7AD, 0x80 },
2270 	{ 0x22, 0x7A6, 0xC4 },
2271 	{ 0x22, 0x7A7, 0xE9 },
2272 	{ 0x22, 0x7A8, 0xDC },
2273 	{ 0x22, 0x7A9, 0xC4 },
2274 	{ 0x22, 0x7AA, 0xE9 },
2275 	{ 0x22, 0x7AB, 0xDC },
2276 	{ 0x22, 0x7AC, 0x09 },
2277 	{ 0x22, 0x7AD, 0x80 },
2278 	{ 0x22, 0x7A6, 0x3D },
2279 	{ 0x22, 0x7A7, 0xE1 },
2280 	{ 0x22, 0x7A8, 0x0D },
2281 	{ 0x22, 0x7A9, 0x3D },
2282 	{ 0x22, 0x7AA, 0xE1 },
2283 	{ 0x22, 0x7AB, 0x0D },
2284 	{ 0x22, 0x7AC, 0x0A },
2285 	{ 0x22, 0x7AD, 0x80 },
2286 	{ 0x22, 0x7A6, 0x89 },
2287 	{ 0x22, 0x7A7, 0xB6 },
2288 	{ 0x22, 0x7A8, 0xEB },
2289 	{ 0x22, 0x7A9, 0x89 },
2290 	{ 0x22, 0x7AA, 0xB6 },
2291 	{ 0x22, 0x7AB, 0xEB },
2292 	{ 0x22, 0x7AC, 0x0B },
2293 	{ 0x22, 0x7AD, 0x80 },
2294 	{ 0x22, 0x7A6, 0x39 },
2295 	{ 0x22, 0x7A7, 0x9D },
2296 	{ 0x22, 0x7A8, 0xFE },
2297 	{ 0x22, 0x7A9, 0x39 },
2298 	{ 0x22, 0x7AA, 0x9D },
2299 	{ 0x22, 0x7AB, 0xFE },
2300 	{ 0x22, 0x7AC, 0x0C },
2301 	{ 0x22, 0x7AD, 0x80 },
2302 	{ 0x22, 0x7A6, 0x76 },
2303 	{ 0x22, 0x7A7, 0x49 },
2304 	{ 0x22, 0x7A8, 0x15 },
2305 	{ 0x22, 0x7A9, 0x76 },
2306 	{ 0x22, 0x7AA, 0x49 },
2307 	{ 0x22, 0x7AB, 0x15 },
2308 	{ 0x22, 0x7AC, 0x0D },
2309 	{ 0x22, 0x7AD, 0x80 },
2310 	{ 0x22, 0x7A6, 0xC8 },
2311 	{ 0x22, 0x7A7, 0x80 },
2312 	{ 0x22, 0x7A8, 0xF5 },
2313 	{ 0x22, 0x7A9, 0xC8 },
2314 	{ 0x22, 0x7AA, 0x80 },
2315 	{ 0x22, 0x7AB, 0xF5 },
2316 	{ 0x22, 0x7AC, 0x0E },
2317 	{ 0x22, 0x7AD, 0x80 },
2318 	{ 0x22, 0x7A6, 0x40 },
2319 	{ 0x22, 0x7A7, 0x00 },
2320 	{ 0x22, 0x7A8, 0x00 },
2321 	{ 0x22, 0x7A9, 0x40 },
2322 	{ 0x22, 0x7AA, 0x00 },
2323 	{ 0x22, 0x7AB, 0x00 },
2324 	{ 0x22, 0x7AC, 0x0F },
2325 	{ 0x22, 0x7AD, 0x80 },
2326 	{ 0x22, 0x7A6, 0x90 },
2327 	{ 0x22, 0x7A7, 0x68 },
2328 	{ 0x22, 0x7A8, 0xF1 },
2329 	{ 0x22, 0x7A9, 0x90 },
2330 	{ 0x22, 0x7AA, 0x68 },
2331 	{ 0x22, 0x7AB, 0xF1 },
2332 	{ 0x22, 0x7AC, 0x10 },
2333 	{ 0x22, 0x7AD, 0x80 },
2334 	{ 0x22, 0x7A6, 0x34 },
2335 	{ 0x22, 0x7A7, 0x47 },
2336 	{ 0x22, 0x7A8, 0x6C },
2337 	{ 0x22, 0x7A9, 0x34 },
2338 	{ 0x22, 0x7AA, 0x47 },
2339 	{ 0x22, 0x7AB, 0x6C },
2340 	{ 0x22, 0x7AC, 0x11 },
2341 	{ 0x22, 0x7AD, 0x80 },
2342 	{ 0x22, 0x7A6, 0x6F },
2343 	{ 0x22, 0x7A7, 0x97 },
2344 	{ 0x22, 0x7A8, 0x0F },
2345 	{ 0x22, 0x7A9, 0x6F },
2346 	{ 0x22, 0x7AA, 0x97 },
2347 	{ 0x22, 0x7AB, 0x0F },
2348 	{ 0x22, 0x7AC, 0x12 },
2349 	{ 0x22, 0x7AD, 0x80 },
2350 	{ 0x22, 0x7A6, 0xCB },
2351 	{ 0x22, 0x7A7, 0xB8 },
2352 	{ 0x22, 0x7A8, 0x94 },
2353 	{ 0x22, 0x7A9, 0xCB },
2354 	{ 0x22, 0x7AA, 0xB8 },
2355 	{ 0x22, 0x7AB, 0x94 },
2356 	{ 0x22, 0x7AC, 0x13 },
2357 	{ 0x22, 0x7AD, 0x80 },
2358 	{ 0x22, 0x7A6, 0x40 },
2359 	{ 0x22, 0x7A7, 0x00 },
2360 	{ 0x22, 0x7A8, 0x00 },
2361 	{ 0x22, 0x7A9, 0x40 },
2362 	{ 0x22, 0x7AA, 0x00 },
2363 	{ 0x22, 0x7AB, 0x00 },
2364 	{ 0x22, 0x7AC, 0x14 },
2365 	{ 0x22, 0x7AD, 0x80 },
2366 	{ 0x22, 0x7A6, 0x95 },
2367 	{ 0x22, 0x7A7, 0x76 },
2368 	{ 0x22, 0x7A8, 0x5B },
2369 	{ 0x22, 0x7A9, 0x95 },
2370 	{ 0x22, 0x7AA, 0x76 },
2371 	{ 0x22, 0x7AB, 0x5B },
2372 	{ 0x22, 0x7AC, 0x15 },
2373 	{ 0x22, 0x7AD, 0x80 },
2374 	{ 0x22, 0x7A6, 0x31 },
2375 	{ 0x22, 0x7A7, 0xAC },
2376 	{ 0x22, 0x7A8, 0x31 },
2377 	{ 0x22, 0x7A9, 0x31 },
2378 	{ 0x22, 0x7AA, 0xAC },
2379 	{ 0x22, 0x7AB, 0x31 },
2380 	{ 0x22, 0x7AC, 0x16 },
2381 	{ 0x22, 0x7AD, 0x80 },
2382 	{ 0x22, 0x7A6, 0x6A },
2383 	{ 0x22, 0x7A7, 0x89 },
2384 	{ 0x22, 0x7A8, 0xA5 },
2385 	{ 0x22, 0x7A9, 0x6A },
2386 	{ 0x22, 0x7AA, 0x89 },
2387 	{ 0x22, 0x7AB, 0xA5 },
2388 	{ 0x22, 0x7AC, 0x17 },
2389 	{ 0x22, 0x7AD, 0x80 },
2390 	{ 0x22, 0x7A6, 0xCE },
2391 	{ 0x22, 0x7A7, 0x53 },
2392 	{ 0x22, 0x7A8, 0xCF },
2393 	{ 0x22, 0x7A9, 0xCE },
2394 	{ 0x22, 0x7AA, 0x53 },
2395 	{ 0x22, 0x7AB, 0xCF },
2396 	{ 0x22, 0x7AC, 0x18 },
2397 	{ 0x22, 0x7AD, 0x80 },
2398 	{ 0x22, 0x7A6, 0x40 },
2399 	{ 0x22, 0x7A7, 0x00 },
2400 	{ 0x22, 0x7A8, 0x00 },
2401 	{ 0x22, 0x7A9, 0x40 },
2402 	{ 0x22, 0x7AA, 0x00 },
2403 	{ 0x22, 0x7AB, 0x00 },
2404 	{ 0x22, 0x7AC, 0x19 },
2405 	{ 0x22, 0x7AD, 0x80 },
2406 	/* 48KHz base */
2407 	{ 0x22, 0x7A6, 0x3E },
2408 	{ 0x22, 0x7A7, 0x88 },
2409 	{ 0x22, 0x7A8, 0xDC },
2410 	{ 0x22, 0x7A9, 0x3E },
2411 	{ 0x22, 0x7AA, 0x88 },
2412 	{ 0x22, 0x7AB, 0xDC },
2413 	{ 0x22, 0x7AC, 0x1A },
2414 	{ 0x22, 0x7AD, 0x80 },
2415 	{ 0x22, 0x7A6, 0x82 },
2416 	{ 0x22, 0x7A7, 0xEE },
2417 	{ 0x22, 0x7A8, 0x46 },
2418 	{ 0x22, 0x7A9, 0x82 },
2419 	{ 0x22, 0x7AA, 0xEE },
2420 	{ 0x22, 0x7AB, 0x46 },
2421 	{ 0x22, 0x7AC, 0x1B },
2422 	{ 0x22, 0x7AD, 0x80 },
2423 	{ 0x22, 0x7A6, 0x3E },
2424 	{ 0x22, 0x7A7, 0x88 },
2425 	{ 0x22, 0x7A8, 0xDC },
2426 	{ 0x22, 0x7A9, 0x3E },
2427 	{ 0x22, 0x7AA, 0x88 },
2428 	{ 0x22, 0x7AB, 0xDC },
2429 	{ 0x22, 0x7AC, 0x1C },
2430 	{ 0x22, 0x7AD, 0x80 },
2431 	{ 0x22, 0x7A6, 0x7D },
2432 	{ 0x22, 0x7A7, 0x09 },
2433 	{ 0x22, 0x7A8, 0x28 },
2434 	{ 0x22, 0x7A9, 0x7D },
2435 	{ 0x22, 0x7AA, 0x09 },
2436 	{ 0x22, 0x7AB, 0x28 },
2437 	{ 0x22, 0x7AC, 0x1D },
2438 	{ 0x22, 0x7AD, 0x80 },
2439 	{ 0x22, 0x7A6, 0xC2 },
2440 	{ 0x22, 0x7A7, 0xE5 },
2441 	{ 0x22, 0x7A8, 0xB4 },
2442 	{ 0x22, 0x7A9, 0xC2 },
2443 	{ 0x22, 0x7AA, 0xE5 },
2444 	{ 0x22, 0x7AB, 0xB4 },
2445 	{ 0x22, 0x7AC, 0x1E },
2446 	{ 0x22, 0x7AD, 0x80 },
2447 	{ 0x22, 0x7A6, 0x3E },
2448 	{ 0x22, 0x7A7, 0xA3 },
2449 	{ 0x22, 0x7A8, 0x1F },
2450 	{ 0x22, 0x7A9, 0x3E },
2451 	{ 0x22, 0x7AA, 0xA3 },
2452 	{ 0x22, 0x7AB, 0x1F },
2453 	{ 0x22, 0x7AC, 0x1F },
2454 	{ 0x22, 0x7AD, 0x80 },
2455 	{ 0x22, 0x7A6, 0x84 },
2456 	{ 0x22, 0x7A7, 0xCA },
2457 	{ 0x22, 0x7A8, 0xF1 },
2458 	{ 0x22, 0x7A9, 0x84 },
2459 	{ 0x22, 0x7AA, 0xCA },
2460 	{ 0x22, 0x7AB, 0xF1 },
2461 	{ 0x22, 0x7AC, 0x20 },
2462 	{ 0x22, 0x7AD, 0x80 },
2463 	{ 0x22, 0x7A6, 0x3C },
2464 	{ 0x22, 0x7A7, 0xD5 },
2465 	{ 0x22, 0x7A8, 0x9C },
2466 	{ 0x22, 0x7A9, 0x3C },
2467 	{ 0x22, 0x7AA, 0xD5 },
2468 	{ 0x22, 0x7AB, 0x9C },
2469 	{ 0x22, 0x7AC, 0x21 },
2470 	{ 0x22, 0x7AD, 0x80 },
2471 	{ 0x22, 0x7A6, 0x7B },
2472 	{ 0x22, 0x7A7, 0x35 },
2473 	{ 0x22, 0x7A8, 0x0F },
2474 	{ 0x22, 0x7A9, 0x7B },
2475 	{ 0x22, 0x7AA, 0x35 },
2476 	{ 0x22, 0x7AB, 0x0F },
2477 	{ 0x22, 0x7AC, 0x22 },
2478 	{ 0x22, 0x7AD, 0x80 },
2479 	{ 0x22, 0x7A6, 0xC4 },
2480 	{ 0x22, 0x7A7, 0x87 },
2481 	{ 0x22, 0x7A8, 0x45 },
2482 	{ 0x22, 0x7A9, 0xC4 },
2483 	{ 0x22, 0x7AA, 0x87 },
2484 	{ 0x22, 0x7AB, 0x45 },
2485 	{ 0x22, 0x7AC, 0x23 },
2486 	{ 0x22, 0x7AD, 0x80 },
2487 	{ 0x22, 0x7A6, 0x3E },
2488 	{ 0x22, 0x7A7, 0x0A },
2489 	{ 0x22, 0x7A8, 0x78 },
2490 	{ 0x22, 0x7A9, 0x3E },
2491 	{ 0x22, 0x7AA, 0x0A },
2492 	{ 0x22, 0x7AB, 0x78 },
2493 	{ 0x22, 0x7AC, 0x24 },
2494 	{ 0x22, 0x7AD, 0x80 },
2495 	{ 0x22, 0x7A6, 0x88 },
2496 	{ 0x22, 0x7A7, 0xE2 },
2497 	{ 0x22, 0x7A8, 0x05 },
2498 	{ 0x22, 0x7A9, 0x88 },
2499 	{ 0x22, 0x7AA, 0xE2 },
2500 	{ 0x22, 0x7AB, 0x05 },
2501 	{ 0x22, 0x7AC, 0x25 },
2502 	{ 0x22, 0x7AD, 0x80 },
2503 	{ 0x22, 0x7A6, 0x3A },
2504 	{ 0x22, 0x7A7, 0x1A },
2505 	{ 0x22, 0x7A8, 0xA3 },
2506 	{ 0x22, 0x7A9, 0x3A },
2507 	{ 0x22, 0x7AA, 0x1A },
2508 	{ 0x22, 0x7AB, 0xA3 },
2509 	{ 0x22, 0x7AC, 0x26 },
2510 	{ 0x22, 0x7AD, 0x80 },
2511 	{ 0x22, 0x7A6, 0x77 },
2512 	{ 0x22, 0x7A7, 0x1D },
2513 	{ 0x22, 0x7A8, 0xFB },
2514 	{ 0x22, 0x7A9, 0x77 },
2515 	{ 0x22, 0x7AA, 0x1D },
2516 	{ 0x22, 0x7AB, 0xFB },
2517 	{ 0x22, 0x7AC, 0x27 },
2518 	{ 0x22, 0x7AD, 0x80 },
2519 	{ 0x22, 0x7A6, 0xC7 },
2520 	{ 0x22, 0x7A7, 0xDA },
2521 	{ 0x22, 0x7A8, 0xE5 },
2522 	{ 0x22, 0x7A9, 0xC7 },
2523 	{ 0x22, 0x7AA, 0xDA },
2524 	{ 0x22, 0x7AB, 0xE5 },
2525 	{ 0x22, 0x7AC, 0x28 },
2526 	{ 0x22, 0x7AD, 0x80 },
2527 	{ 0x22, 0x7A6, 0x40 },
2528 	{ 0x22, 0x7A7, 0x00 },
2529 	{ 0x22, 0x7A8, 0x00 },
2530 	{ 0x22, 0x7A9, 0x40 },
2531 	{ 0x22, 0x7AA, 0x00 },
2532 	{ 0x22, 0x7AB, 0x00 },
2533 	{ 0x22, 0x7AC, 0x29 },
2534 	{ 0x22, 0x7AD, 0x80 },
2535 	{ 0x22, 0x7A6, 0x8E },
2536 	{ 0x22, 0x7A7, 0xD7 },
2537 	{ 0x22, 0x7A8, 0x22 },
2538 	{ 0x22, 0x7A9, 0x8E },
2539 	{ 0x22, 0x7AA, 0xD7 },
2540 	{ 0x22, 0x7AB, 0x22 },
2541 	{ 0x22, 0x7AC, 0x2A },
2542 	{ 0x22, 0x7AD, 0x80 },
2543 	{ 0x22, 0x7A6, 0x35 },
2544 	{ 0x22, 0x7A7, 0x26 },
2545 	{ 0x22, 0x7A8, 0xC6 },
2546 	{ 0x22, 0x7A9, 0x35 },
2547 	{ 0x22, 0x7AA, 0x26 },
2548 	{ 0x22, 0x7AB, 0xC6 },
2549 	{ 0x22, 0x7AC, 0x2B },
2550 	{ 0x22, 0x7AD, 0x80 },
2551 	{ 0x22, 0x7A6, 0x71 },
2552 	{ 0x22, 0x7A7, 0x28 },
2553 	{ 0x22, 0x7A8, 0xDE },
2554 	{ 0x22, 0x7A9, 0x71 },
2555 	{ 0x22, 0x7AA, 0x28 },
2556 	{ 0x22, 0x7AB, 0xDE },
2557 	{ 0x22, 0x7AC, 0x2C },
2558 	{ 0x22, 0x7AD, 0x80 },
2559 	{ 0x22, 0x7A6, 0xCA },
2560 	{ 0x22, 0x7A7, 0xD9 },
2561 	{ 0x22, 0x7A8, 0x3A },
2562 	{ 0x22, 0x7A9, 0xCA },
2563 	{ 0x22, 0x7AA, 0xD9 },
2564 	{ 0x22, 0x7AB, 0x3A },
2565 	{ 0x22, 0x7AC, 0x2D },
2566 	{ 0x22, 0x7AD, 0x80 },
2567 	{ 0x22, 0x7A6, 0x40 },
2568 	{ 0x22, 0x7A7, 0x00 },
2569 	{ 0x22, 0x7A8, 0x00 },
2570 	{ 0x22, 0x7A9, 0x40 },
2571 	{ 0x22, 0x7AA, 0x00 },
2572 	{ 0x22, 0x7AB, 0x00 },
2573 	{ 0x22, 0x7AC, 0x2E },
2574 	{ 0x22, 0x7AD, 0x80 },
2575 	{ 0x22, 0x7A6, 0x93 },
2576 	{ 0x22, 0x7A7, 0x5E },
2577 	{ 0x22, 0x7A8, 0xD8 },
2578 	{ 0x22, 0x7A9, 0x93 },
2579 	{ 0x22, 0x7AA, 0x5E },
2580 	{ 0x22, 0x7AB, 0xD8 },
2581 	{ 0x22, 0x7AC, 0x2F },
2582 	{ 0x22, 0x7AD, 0x80 },
2583 	{ 0x22, 0x7A6, 0x32 },
2584 	{ 0x22, 0x7A7, 0xB7 },
2585 	{ 0x22, 0x7A8, 0xB1 },
2586 	{ 0x22, 0x7A9, 0x32 },
2587 	{ 0x22, 0x7AA, 0xB7 },
2588 	{ 0x22, 0x7AB, 0xB1 },
2589 	{ 0x22, 0x7AC, 0x30 },
2590 	{ 0x22, 0x7AD, 0x80 },
2591 	{ 0x22, 0x7A6, 0x6C },
2592 	{ 0x22, 0x7A7, 0xA1 },
2593 	{ 0x22, 0x7A8, 0x28 },
2594 	{ 0x22, 0x7A9, 0x6C },
2595 	{ 0x22, 0x7AA, 0xA1 },
2596 	{ 0x22, 0x7AB, 0x28 },
2597 	{ 0x22, 0x7AC, 0x31 },
2598 	{ 0x22, 0x7AD, 0x80 },
2599 	{ 0x22, 0x7A6, 0xCD },
2600 	{ 0x22, 0x7A7, 0x48 },
2601 	{ 0x22, 0x7A8, 0x4F },
2602 	{ 0x22, 0x7A9, 0xCD },
2603 	{ 0x22, 0x7AA, 0x48 },
2604 	{ 0x22, 0x7AB, 0x4F },
2605 	{ 0x22, 0x7AC, 0x32 },
2606 	{ 0x22, 0x7AD, 0x80 },
2607 	{ 0x22, 0x7A6, 0x40 },
2608 	{ 0x22, 0x7A7, 0x00 },
2609 	{ 0x22, 0x7A8, 0x00 },
2610 	{ 0x22, 0x7A9, 0x40 },
2611 	{ 0x22, 0x7AA, 0x00 },
2612 	{ 0x22, 0x7AB, 0x00 },
2613 	{ 0x22, 0x7AC, 0x33 },
2614 	{ 0x22, 0x7AD, 0x80 },
2615 	/* common */
2616 	{ 0x22, 0x782, 0xC1 },
2617 	{ 0x22, 0x771, 0x2C },
2618 	{ 0x22, 0x772, 0x2C },
2619 	{ 0x22, 0x788, 0x04 },
2620 	{ 0x01, 0x7B0, 0x08 },
2621 	{}
2622 };
2623 
2624 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2625 	[STAC_92HD83XXX_REF] = {
2626 		.type = HDA_FIXUP_PINS,
2627 		.v.pins = ref92hd83xxx_pin_configs,
2628 	},
2629 	[STAC_92HD83XXX_PWR_REF] = {
2630 		.type = HDA_FIXUP_PINS,
2631 		.v.pins = ref92hd83xxx_pin_configs,
2632 	},
2633 	[STAC_DELL_S14] = {
2634 		.type = HDA_FIXUP_PINS,
2635 		.v.pins = dell_s14_pin_configs,
2636 	},
2637 	[STAC_DELL_VOSTRO_3500] = {
2638 		.type = HDA_FIXUP_PINS,
2639 		.v.pins = dell_vostro_3500_pin_configs,
2640 	},
2641 	[STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2642 		.type = HDA_FIXUP_PINS,
2643 		.v.pins = hp_cNB11_intquad_pin_configs,
2644 		.chained = true,
2645 		.chain_id = STAC_92HD83XXX_HP,
2646 	},
2647 	[STAC_92HD83XXX_HP] = {
2648 		.type = HDA_FIXUP_FUNC,
2649 		.v.func = stac92hd83xxx_fixup_hp,
2650 	},
2651 	[STAC_HP_DV7_4000] = {
2652 		.type = HDA_FIXUP_PINS,
2653 		.v.pins = hp_dv7_4000_pin_configs,
2654 		.chained = true,
2655 		.chain_id = STAC_92HD83XXX_HP,
2656 	},
2657 	[STAC_HP_ZEPHYR] = {
2658 		.type = HDA_FIXUP_FUNC,
2659 		.v.func = stac92hd83xxx_fixup_hp_zephyr,
2660 		.chained = true,
2661 		.chain_id = STAC_92HD83XXX_HP,
2662 	},
2663 	[STAC_92HD83XXX_HP_LED] = {
2664 		.type = HDA_FIXUP_FUNC,
2665 		.v.func = stac92hd83xxx_fixup_hp_led,
2666 		.chained = true,
2667 		.chain_id = STAC_92HD83XXX_HP,
2668 	},
2669 	[STAC_92HD83XXX_HP_INV_LED] = {
2670 		.type = HDA_FIXUP_FUNC,
2671 		.v.func = stac92hd83xxx_fixup_hp_inv_led,
2672 		.chained = true,
2673 		.chain_id = STAC_92HD83XXX_HP,
2674 	},
2675 	[STAC_92HD83XXX_HP_MIC_LED] = {
2676 		.type = HDA_FIXUP_FUNC,
2677 		.v.func = stac92hd83xxx_fixup_hp_mic_led,
2678 		.chained = true,
2679 		.chain_id = STAC_92HD83XXX_HP,
2680 	},
2681 	[STAC_HP_LED_GPIO10] = {
2682 		.type = HDA_FIXUP_FUNC,
2683 		.v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2684 		.chained = true,
2685 		.chain_id = STAC_92HD83XXX_HP,
2686 	},
2687 	[STAC_92HD83XXX_HEADSET_JACK] = {
2688 		.type = HDA_FIXUP_FUNC,
2689 		.v.func = stac92hd83xxx_fixup_headset_jack,
2690 	},
2691 	[STAC_HP_ENVY_BASS] = {
2692 		.type = HDA_FIXUP_PINS,
2693 		.v.pins = (const struct hda_pintbl[]) {
2694 			{ 0x0f, 0x90170111 },
2695 			{}
2696 		},
2697 	},
2698 	[STAC_HP_BNB13_EQ] = {
2699 		.type = HDA_FIXUP_VERBS,
2700 		.v.verbs = hp_bnb13_eq_verbs,
2701 		.chained = true,
2702 		.chain_id = STAC_92HD83XXX_HP_MIC_LED,
2703 	},
2704 	[STAC_HP_ENVY_TS_BASS] = {
2705 		.type = HDA_FIXUP_PINS,
2706 		.v.pins = (const struct hda_pintbl[]) {
2707 			{ 0x10, 0x92170111 },
2708 			{}
2709 		},
2710 	},
2711 	[STAC_HP_ENVY_TS_DAC_BIND] = {
2712 		.type = HDA_FIXUP_FUNC,
2713 		.v.func = hp_envy_ts_fixup_dac_bind,
2714 		.chained = true,
2715 		.chain_id = STAC_HP_ENVY_TS_BASS,
2716 	},
2717 	[STAC_92HD83XXX_GPIO10_EAPD] = {
2718 		.type = HDA_FIXUP_FUNC,
2719 		.v.func = stac92hd83xxx_fixup_gpio10_eapd,
2720 	},
2721 };
2722 
2723 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2724 	{ .id = STAC_92HD83XXX_REF, .name = "ref" },
2725 	{ .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2726 	{ .id = STAC_DELL_S14, .name = "dell-s14" },
2727 	{ .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2728 	{ .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2729 	{ .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2730 	{ .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2731 	{ .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2732 	{ .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2733 	{ .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2734 	{ .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2735 	{ .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2736 	{ .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2737 	{ .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
2738 	{}
2739 };
2740 
2741 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2742 	/* SigmaTel reference board */
2743 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2744 		      "DFI LanParty", STAC_92HD83XXX_REF),
2745 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2746 		      "DFI LanParty", STAC_92HD83XXX_REF),
2747 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2748 		      "unknown Dell", STAC_DELL_S14),
2749 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2750 		      "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2751 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2752 		      "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2753 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2754 		      "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2755 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2756 		      "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2757 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2758 		      "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2759 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2760 		      "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2761 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2762 		      "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2763 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2764 		      "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2765 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2766 		      "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2767 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2768 		      "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2769 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2770 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2771 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2772 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2773 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2774 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2775 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2776 			  "HP Pavilion dv7", STAC_HP_DV7_4000),
2777 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2778 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2779 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2780 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2781 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2782 			  "HP Envy Spectre", STAC_HP_ENVY_BASS),
2783 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2784 			  "HP Folio 13", STAC_HP_LED_GPIO10),
2785 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2786 			  "HP Folio", STAC_HP_BNB13_EQ),
2787 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2788 			  "HP bNB13", STAC_HP_BNB13_EQ),
2789 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2790 			  "HP bNB13", STAC_HP_BNB13_EQ),
2791 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2792 			  "HP bNB13", STAC_HP_BNB13_EQ),
2793 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2794 			  "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
2795 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2796 			  "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
2797 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2798 			  "HP bNB13", STAC_HP_BNB13_EQ),
2799 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2800 			  "HP bNB13", STAC_HP_BNB13_EQ),
2801 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2802 			  "HP bNB13", STAC_HP_BNB13_EQ),
2803 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2804 			  "HP bNB13", STAC_HP_BNB13_EQ),
2805 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2806 			  "HP bNB13", STAC_HP_BNB13_EQ),
2807 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2808 			  "HP bNB13", STAC_HP_BNB13_EQ),
2809 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2810 			  "HP bNB13", STAC_HP_BNB13_EQ),
2811 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2812 			  "HP bNB13", STAC_HP_BNB13_EQ),
2813 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2814 			  "HP bNB13", STAC_HP_BNB13_EQ),
2815 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2816 			  "HP bNB13", STAC_HP_BNB13_EQ),
2817 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2818 			  "HP bNB13", STAC_HP_BNB13_EQ),
2819 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2820 			  "HP bNB13", STAC_HP_BNB13_EQ),
2821 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2822 			  "HP bNB13", STAC_HP_BNB13_EQ),
2823 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2824 			  "HP bNB13", STAC_HP_BNB13_EQ),
2825 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2826 			  "HP bNB13", STAC_HP_BNB13_EQ),
2827 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2828 			  "HP bNB13", STAC_HP_BNB13_EQ),
2829 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2830 			  "HP bNB13", STAC_HP_BNB13_EQ),
2831 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2832 			  "HP bNB13", STAC_HP_BNB13_EQ),
2833 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2834 			  "HP bNB13", STAC_HP_BNB13_EQ),
2835 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2836 			  "HP bNB13", STAC_HP_BNB13_EQ),
2837 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2838 			  "HP bNB13", STAC_HP_BNB13_EQ),
2839 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2840 			  "HP bNB13", STAC_HP_BNB13_EQ),
2841 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2842 			  "HP bNB13", STAC_HP_BNB13_EQ),
2843 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2844 			  "HP bNB13", STAC_HP_BNB13_EQ),
2845 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2846 			  "HP bNB13", STAC_HP_BNB13_EQ),
2847 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2848 			  "HP bNB13", STAC_HP_BNB13_EQ),
2849 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2850 			  "HP bNB13", STAC_HP_BNB13_EQ),
2851 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2852 			  "HP bNB13", STAC_HP_BNB13_EQ),
2853 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2854 			  "HP bNB13", STAC_HP_BNB13_EQ),
2855 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2856 			  "HP bNB13", STAC_HP_BNB13_EQ),
2857 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2858 			  "HP bNB13", STAC_HP_BNB13_EQ),
2859 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2860 			  "HP bNB13", STAC_HP_BNB13_EQ),
2861 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2862 			  "HP bNB13", STAC_HP_BNB13_EQ),
2863 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2864 			  "HP bNB13", STAC_HP_BNB13_EQ),
2865 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2866 			  "HP bNB13", STAC_HP_BNB13_EQ),
2867 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2868 			  "HP bNB13", STAC_HP_BNB13_EQ),
2869 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2870 			  "HP bNB13", STAC_HP_BNB13_EQ),
2871 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2872 			  "HP bNB13", STAC_HP_BNB13_EQ),
2873 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2874 			  "HP bNB13", STAC_HP_BNB13_EQ),
2875 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2876 			  "HP bNB13", STAC_HP_BNB13_EQ),
2877 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2878 			  "HP bNB13", STAC_HP_BNB13_EQ),
2879 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2880 			  "HP bNB13", STAC_HP_BNB13_EQ),
2881 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2882 			  "HP bNB13", STAC_HP_BNB13_EQ),
2883 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2884 			  "HP bNB13", STAC_HP_BNB13_EQ),
2885 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2886 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2887 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2888 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2889 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2890 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2891 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2892 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2893 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2894 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2895 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2896 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2897 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2898 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2899 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2900 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2901 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2902 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2903 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2904 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2905 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2906 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2907 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2908 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2909 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2910 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2911 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2912 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2913 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2914 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2915 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2916 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2917 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2918 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2919 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2920 			  "HP", STAC_HP_ZEPHYR),
2921 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2922 			  "HP Mini", STAC_92HD83XXX_HP_LED),
2923 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2924 			  "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2925 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2926 		      "HP Mini", STAC_92HD83XXX_HP_LED),
2927 	SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2928 	/* match both for 0xfa91 and 0xfa93 */
2929 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
2930 		      "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
2931 	{} /* terminator */
2932 };
2933 
2934 /* HP dv7 bass switch - GPIO5 */
2935 #define stac_hp_bass_gpio_info	snd_ctl_boolean_mono_info
2936 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2937 				 struct snd_ctl_elem_value *ucontrol)
2938 {
2939 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2940 	struct sigmatel_spec *spec = codec->spec;
2941 	ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2942 	return 0;
2943 }
2944 
2945 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2946 				 struct snd_ctl_elem_value *ucontrol)
2947 {
2948 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2949 	struct sigmatel_spec *spec = codec->spec;
2950 	unsigned int gpio_data;
2951 
2952 	gpio_data = (spec->gpio_data & ~0x20) |
2953 		(ucontrol->value.integer.value[0] ? 0x20 : 0);
2954 	if (gpio_data == spec->gpio_data)
2955 		return 0;
2956 	spec->gpio_data = gpio_data;
2957 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2958 	return 1;
2959 }
2960 
2961 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2962 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2963 	.info = stac_hp_bass_gpio_info,
2964 	.get = stac_hp_bass_gpio_get,
2965 	.put = stac_hp_bass_gpio_put,
2966 };
2967 
2968 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2969 {
2970 	struct sigmatel_spec *spec = codec->spec;
2971 
2972 	if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2973 				  &stac_hp_bass_sw_ctrl))
2974 		return -ENOMEM;
2975 
2976 	spec->gpio_mask |= 0x20;
2977 	spec->gpio_dir |= 0x20;
2978 	spec->gpio_data |= 0x20;
2979 	return 0;
2980 }
2981 
2982 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2983 	{ 0x0a, 0x02214030 },
2984 	{ 0x0b, 0x02a19040 },
2985 	{ 0x0c, 0x01a19020 },
2986 	{ 0x0d, 0x01014010 },
2987 	{ 0x0e, 0x0181302e },
2988 	{ 0x0f, 0x01014010 },
2989 	{ 0x14, 0x01019020 },
2990 	{ 0x18, 0x90a000f0 },
2991 	{ 0x19, 0x90a000f0 },
2992 	{ 0x1e, 0x01452050 },
2993 	{ 0x1f, 0x01452050 },
2994 	{}
2995 };
2996 
2997 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2998 	{ 0x0a, 0x0421101f },
2999 	{ 0x0b, 0x04a11221 },
3000 	{ 0x0c, 0x40f000f0 },
3001 	{ 0x0d, 0x90170110 },
3002 	{ 0x0e, 0x23a1902e },
3003 	{ 0x0f, 0x23014250 },
3004 	{ 0x14, 0x40f000f0 },
3005 	{ 0x18, 0x90a000f0 },
3006 	{ 0x19, 0x40f000f0 },
3007 	{ 0x1e, 0x4f0000f0 },
3008 	{ 0x1f, 0x4f0000f0 },
3009 	{}
3010 };
3011 
3012 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3013 	{ 0x0a, 0x0421101f },
3014 	{ 0x0b, 0x04a11221 },
3015 	{ 0x0c, 0x90a70330 },
3016 	{ 0x0d, 0x90170110 },
3017 	{ 0x0e, 0x23a1902e },
3018 	{ 0x0f, 0x23014250 },
3019 	{ 0x14, 0x40f000f0 },
3020 	{ 0x18, 0x40f000f0 },
3021 	{ 0x19, 0x40f000f0 },
3022 	{ 0x1e, 0x044413b0 },
3023 	{ 0x1f, 0x044413b0 },
3024 	{}
3025 };
3026 
3027 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3028 	{ 0x0a, 0x0421101f },
3029 	{ 0x0b, 0x04a11221 },
3030 	{ 0x0c, 0x90a70330 },
3031 	{ 0x0d, 0x90170110 },
3032 	{ 0x0e, 0x40f000f0 },
3033 	{ 0x0f, 0x40f000f0 },
3034 	{ 0x14, 0x40f000f0 },
3035 	{ 0x18, 0x90a000f0 },
3036 	{ 0x19, 0x40f000f0 },
3037 	{ 0x1e, 0x044413b0 },
3038 	{ 0x1f, 0x044413b0 },
3039 	{}
3040 };
3041 
3042 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3043 				    const struct hda_fixup *fix, int action)
3044 {
3045 	struct sigmatel_spec *spec = codec->spec;
3046 
3047 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3048 		return;
3049 
3050 	snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3051 	spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3052 }
3053 
3054 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3055 				      const struct hda_fixup *fix, int action)
3056 {
3057 	struct sigmatel_spec *spec = codec->spec;
3058 	struct hda_jack_callback *jack;
3059 
3060 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3061 		return;
3062 
3063 	/* Enable VREF power saving on GPIO1 detect */
3064 	snd_hda_codec_write_cache(codec, codec->core.afg, 0,
3065 				  AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3066 	jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
3067 						   stac_vref_event);
3068 	if (!IS_ERR(jack))
3069 		jack->private_data = 0x02;
3070 
3071 	spec->gpio_mask |= 0x02;
3072 
3073 	/* enable internal microphone */
3074 	snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3075 }
3076 
3077 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3078 				       const struct hda_fixup *fix, int action)
3079 {
3080 	struct sigmatel_spec *spec = codec->spec;
3081 
3082 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3083 		return;
3084 	spec->gpio_led = 0x01;
3085 }
3086 
3087 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3088 				       const struct hda_fixup *fix, int action)
3089 {
3090 	unsigned int cap;
3091 
3092 	switch (action) {
3093 	case HDA_FIXUP_ACT_PRE_PROBE:
3094 		snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3095 		break;
3096 
3097 	case HDA_FIXUP_ACT_PROBE:
3098 		/* enable bass on HP dv7 */
3099 		cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3100 		cap &= AC_GPIO_IO_COUNT;
3101 		if (cap >= 6)
3102 			stac_add_hp_bass_switch(codec);
3103 		break;
3104 	}
3105 }
3106 
3107 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3108 				       const struct hda_fixup *fix, int action)
3109 {
3110 	struct sigmatel_spec *spec = codec->spec;
3111 
3112 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3113 		return;
3114 	spec->gpio_led = 0x08;
3115 }
3116 
3117 static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3118 {
3119 	unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3120 
3121 	/* count line-out, too, as BIOS sets often so */
3122 	return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3123 		(get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3124 		 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3125 }
3126 
3127 static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3128 {
3129 	unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3130 
3131 	/* It was changed in the BIOS to just satisfy MS DTM.
3132 	 * Lets turn it back into slaved HP
3133 	 */
3134 	pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3135 		(AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3136 	pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3137 		0x1f;
3138 	snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3139 }
3140 
3141 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3142 				   const struct hda_fixup *fix, int action)
3143 {
3144 	struct sigmatel_spec *spec = codec->spec;
3145 
3146 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3147 		return;
3148 
3149 	/* when both output A and F are assigned, these are supposedly
3150 	 * dock and built-in headphones; fix both pin configs
3151 	 */
3152 	if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3153 		fixup_hp_headphone(codec, 0x0a);
3154 		fixup_hp_headphone(codec, 0x0f);
3155 	}
3156 
3157 	if (find_mute_led_cfg(codec, 1))
3158 		codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3159 				spec->gpio_led,
3160 				spec->gpio_led_polarity);
3161 
3162 }
3163 
3164 static const struct hda_fixup stac92hd71bxx_fixups[] = {
3165 	[STAC_92HD71BXX_REF] = {
3166 		.type = HDA_FIXUP_FUNC,
3167 		.v.func = stac92hd71bxx_fixup_ref,
3168 	},
3169 	[STAC_DELL_M4_1] = {
3170 		.type = HDA_FIXUP_PINS,
3171 		.v.pins = dell_m4_1_pin_configs,
3172 	},
3173 	[STAC_DELL_M4_2] = {
3174 		.type = HDA_FIXUP_PINS,
3175 		.v.pins = dell_m4_2_pin_configs,
3176 	},
3177 	[STAC_DELL_M4_3] = {
3178 		.type = HDA_FIXUP_PINS,
3179 		.v.pins = dell_m4_3_pin_configs,
3180 	},
3181 	[STAC_HP_M4] = {
3182 		.type = HDA_FIXUP_FUNC,
3183 		.v.func = stac92hd71bxx_fixup_hp_m4,
3184 		.chained = true,
3185 		.chain_id = STAC_92HD71BXX_HP,
3186 	},
3187 	[STAC_HP_DV4] = {
3188 		.type = HDA_FIXUP_FUNC,
3189 		.v.func = stac92hd71bxx_fixup_hp_dv4,
3190 		.chained = true,
3191 		.chain_id = STAC_HP_DV5,
3192 	},
3193 	[STAC_HP_DV5] = {
3194 		.type = HDA_FIXUP_FUNC,
3195 		.v.func = stac92hd71bxx_fixup_hp_dv5,
3196 		.chained = true,
3197 		.chain_id = STAC_92HD71BXX_HP,
3198 	},
3199 	[STAC_HP_HDX] = {
3200 		.type = HDA_FIXUP_FUNC,
3201 		.v.func = stac92hd71bxx_fixup_hp_hdx,
3202 		.chained = true,
3203 		.chain_id = STAC_92HD71BXX_HP,
3204 	},
3205 	[STAC_92HD71BXX_HP] = {
3206 		.type = HDA_FIXUP_FUNC,
3207 		.v.func = stac92hd71bxx_fixup_hp,
3208 	},
3209 };
3210 
3211 static const struct hda_model_fixup stac92hd71bxx_models[] = {
3212 	{ .id = STAC_92HD71BXX_REF, .name = "ref" },
3213 	{ .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3214 	{ .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3215 	{ .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3216 	{ .id = STAC_HP_M4, .name = "hp-m4" },
3217 	{ .id = STAC_HP_DV4, .name = "hp-dv4" },
3218 	{ .id = STAC_HP_DV5, .name = "hp-dv5" },
3219 	{ .id = STAC_HP_HDX, .name = "hp-hdx" },
3220 	{ .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3221 	{}
3222 };
3223 
3224 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3225 	/* SigmaTel reference board */
3226 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3227 		      "DFI LanParty", STAC_92HD71BXX_REF),
3228 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3229 		      "DFI LanParty", STAC_92HD71BXX_REF),
3230 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3231 			  "HP", STAC_HP_DV5),
3232 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3233 		      "HP", STAC_HP_DV5),
3234 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3235 		      "HP dv4-7", STAC_HP_DV4),
3236 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3237 		      "HP dv4-7", STAC_HP_DV5),
3238 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3239 		      "HP HDX", STAC_HP_HDX),  /* HDX18 */
3240 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3241 		      "HP mini 1000", STAC_HP_M4),
3242 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3243 		      "HP HDX", STAC_HP_HDX),  /* HDX16 */
3244 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3245 		      "HP dv6", STAC_HP_DV5),
3246 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3247 		      "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3248 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3249 		      "HP DV6", STAC_HP_DV5),
3250 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3251 		      "HP", STAC_HP_DV5),
3252 	SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3253 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3254 				"unknown Dell", STAC_DELL_M4_1),
3255 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3256 				"unknown Dell", STAC_DELL_M4_1),
3257 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3258 				"unknown Dell", STAC_DELL_M4_1),
3259 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3260 				"unknown Dell", STAC_DELL_M4_1),
3261 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3262 				"unknown Dell", STAC_DELL_M4_1),
3263 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3264 				"unknown Dell", STAC_DELL_M4_1),
3265 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3266 				"unknown Dell", STAC_DELL_M4_1),
3267 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3268 				"unknown Dell", STAC_DELL_M4_2),
3269 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3270 				"unknown Dell", STAC_DELL_M4_2),
3271 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3272 				"unknown Dell", STAC_DELL_M4_2),
3273 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3274 				"unknown Dell", STAC_DELL_M4_2),
3275 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3276 				"unknown Dell", STAC_DELL_M4_3),
3277 	{} /* terminator */
3278 };
3279 
3280 static const struct hda_pintbl ref922x_pin_configs[] = {
3281 	{ 0x0a, 0x01014010 },
3282 	{ 0x0b, 0x01016011 },
3283 	{ 0x0c, 0x01012012 },
3284 	{ 0x0d, 0x0221401f },
3285 	{ 0x0e, 0x01813122 },
3286 	{ 0x0f, 0x01011014 },
3287 	{ 0x10, 0x01441030 },
3288 	{ 0x11, 0x01c41030 },
3289 	{ 0x15, 0x40000100 },
3290 	{ 0x1b, 0x40000100 },
3291 	{}
3292 };
3293 
3294 /*
3295     STAC 922X pin configs for
3296     102801A7
3297     102801AB
3298     102801A9
3299     102801D1
3300     102801D2
3301 */
3302 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3303 	{ 0x0a, 0x02214030 },
3304 	{ 0x0b, 0x01a19021 },
3305 	{ 0x0c, 0x01111012 },
3306 	{ 0x0d, 0x01114010 },
3307 	{ 0x0e, 0x02a19020 },
3308 	{ 0x0f, 0x01117011 },
3309 	{ 0x10, 0x400001f0 },
3310 	{ 0x11, 0x400001f1 },
3311 	{ 0x15, 0x01813122 },
3312 	{ 0x1b, 0x400001f2 },
3313 	{}
3314 };
3315 
3316 /*
3317     STAC 922X pin configs for
3318     102801AC
3319     102801D0
3320 */
3321 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3322 	{ 0x0a, 0x02214030 },
3323 	{ 0x0b, 0x01a19021 },
3324 	{ 0x0c, 0x01111012 },
3325 	{ 0x0d, 0x01114010 },
3326 	{ 0x0e, 0x02a19020 },
3327 	{ 0x0f, 0x01117011 },
3328 	{ 0x10, 0x01451140 },
3329 	{ 0x11, 0x400001f0 },
3330 	{ 0x15, 0x01813122 },
3331 	{ 0x1b, 0x400001f1 },
3332 	{}
3333 };
3334 
3335 /*
3336     STAC 922X pin configs for
3337     102801BF
3338 */
3339 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3340 	{ 0x0a, 0x0321101f },
3341 	{ 0x0b, 0x01112024 },
3342 	{ 0x0c, 0x01111222 },
3343 	{ 0x0d, 0x91174220 },
3344 	{ 0x0e, 0x03a11050 },
3345 	{ 0x0f, 0x01116221 },
3346 	{ 0x10, 0x90a70330 },
3347 	{ 0x11, 0x01452340 },
3348 	{ 0x15, 0x40C003f1 },
3349 	{ 0x1b, 0x405003f0 },
3350 	{}
3351 };
3352 
3353 /*
3354     STAC 9221 A1 pin configs for
3355     102801D7 (Dell XPS M1210)
3356 */
3357 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3358 	{ 0x0a, 0x02211211 },
3359 	{ 0x0b, 0x408103ff },
3360 	{ 0x0c, 0x02a1123e },
3361 	{ 0x0d, 0x90100310 },
3362 	{ 0x0e, 0x408003f1 },
3363 	{ 0x0f, 0x0221121f },
3364 	{ 0x10, 0x03451340 },
3365 	{ 0x11, 0x40c003f2 },
3366 	{ 0x15, 0x508003f3 },
3367 	{ 0x1b, 0x405003f4 },
3368 	{}
3369 };
3370 
3371 static const struct hda_pintbl d945gtp3_pin_configs[] = {
3372 	{ 0x0a, 0x0221401f },
3373 	{ 0x0b, 0x01a19022 },
3374 	{ 0x0c, 0x01813021 },
3375 	{ 0x0d, 0x01014010 },
3376 	{ 0x0e, 0x40000100 },
3377 	{ 0x0f, 0x40000100 },
3378 	{ 0x10, 0x40000100 },
3379 	{ 0x11, 0x40000100 },
3380 	{ 0x15, 0x02a19120 },
3381 	{ 0x1b, 0x40000100 },
3382 	{}
3383 };
3384 
3385 static const struct hda_pintbl d945gtp5_pin_configs[] = {
3386 	{ 0x0a, 0x0221401f },
3387 	{ 0x0b, 0x01011012 },
3388 	{ 0x0c, 0x01813024 },
3389 	{ 0x0d, 0x01014010 },
3390 	{ 0x0e, 0x01a19021 },
3391 	{ 0x0f, 0x01016011 },
3392 	{ 0x10, 0x01452130 },
3393 	{ 0x11, 0x40000100 },
3394 	{ 0x15, 0x02a19320 },
3395 	{ 0x1b, 0x40000100 },
3396 	{}
3397 };
3398 
3399 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3400 	{ 0x0a, 0x0121e21f },
3401 	{ 0x0b, 0x400000ff },
3402 	{ 0x0c, 0x9017e110 },
3403 	{ 0x0d, 0x400000fd },
3404 	{ 0x0e, 0x400000fe },
3405 	{ 0x0f, 0x0181e020 },
3406 	{ 0x10, 0x1145e030 },
3407 	{ 0x11, 0x11c5e240 },
3408 	{ 0x15, 0x400000fc },
3409 	{ 0x1b, 0x400000fb },
3410 	{}
3411 };
3412 
3413 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3414 	{ 0x0a, 0x0121e21f },
3415 	{ 0x0b, 0x90a7012e },
3416 	{ 0x0c, 0x9017e110 },
3417 	{ 0x0d, 0x400000fd },
3418 	{ 0x0e, 0x400000fe },
3419 	{ 0x0f, 0x0181e020 },
3420 	{ 0x10, 0x1145e230 },
3421 	{ 0x11, 0x500000fa },
3422 	{ 0x15, 0x400000fc },
3423 	{ 0x1b, 0x400000fb },
3424 	{}
3425 };
3426 
3427 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3428 	{ 0x0a, 0x0121e21f },
3429 	{ 0x0b, 0x90a7012e },
3430 	{ 0x0c, 0x9017e110 },
3431 	{ 0x0d, 0x400000fd },
3432 	{ 0x0e, 0x400000fe },
3433 	{ 0x0f, 0x0181e020 },
3434 	{ 0x10, 0x1145e230 },
3435 	{ 0x11, 0x11c5e240 },
3436 	{ 0x15, 0x400000fc },
3437 	{ 0x1b, 0x400000fb },
3438 	{}
3439 };
3440 
3441 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3442 	{ 0x0a, 0x0321e21f },
3443 	{ 0x0b, 0x03a1e02e },
3444 	{ 0x0c, 0x9017e110 },
3445 	{ 0x0d, 0x9017e11f },
3446 	{ 0x0e, 0x400000fe },
3447 	{ 0x0f, 0x0381e020 },
3448 	{ 0x10, 0x1345e230 },
3449 	{ 0x11, 0x13c5e240 },
3450 	{ 0x15, 0x400000fc },
3451 	{ 0x1b, 0x400000fb },
3452 	{}
3453 };
3454 
3455 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3456 	{ 0x0a, 0x0321e21f },
3457 	{ 0x0b, 0x03a1e02e },
3458 	{ 0x0c, 0x9017e110 },
3459 	{ 0x0d, 0x9017e11f },
3460 	{ 0x0e, 0x400000fe },
3461 	{ 0x0f, 0x0381e020 },
3462 	{ 0x10, 0x1345e230 },
3463 	{ 0x11, 0x13c5e240 },
3464 	{ 0x15, 0x400000fc },
3465 	{ 0x1b, 0x400000fb },
3466 	{}
3467 };
3468 
3469 static const struct hda_pintbl ecs202_pin_configs[] = {
3470 	{ 0x0a, 0x0221401f },
3471 	{ 0x0b, 0x02a19020 },
3472 	{ 0x0c, 0x01a19020 },
3473 	{ 0x0d, 0x01114010 },
3474 	{ 0x0e, 0x408000f0 },
3475 	{ 0x0f, 0x01813022 },
3476 	{ 0x10, 0x074510a0 },
3477 	{ 0x11, 0x40c400f1 },
3478 	{ 0x15, 0x9037012e },
3479 	{ 0x1b, 0x40e000f2 },
3480 	{}
3481 };
3482 
3483 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3484 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3485 	SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3486 	SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3487 	SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3488 	SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3489 	SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3490 	SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3491 	SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3492 	SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3493 	SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3494 	SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3495 	SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3496 	SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3497 	SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3498 	{}
3499 };
3500 
3501 static const struct hda_fixup stac922x_fixups[];
3502 
3503 /* remap the fixup from codec SSID and apply it */
3504 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3505 					  const struct hda_fixup *fix,
3506 					  int action)
3507 {
3508 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3509 		return;
3510 
3511 	codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
3512 	snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3513 			   stac922x_fixups);
3514 	if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
3515 		snd_hda_apply_fixup(codec, action);
3516 }
3517 
3518 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3519 					  const struct hda_fixup *fix,
3520 					  int action)
3521 {
3522 	struct sigmatel_spec *spec = codec->spec;
3523 
3524 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3525 		spec->gpio_mask = spec->gpio_dir = 0x03;
3526 		spec->gpio_data = 0x03;
3527 	}
3528 }
3529 
3530 static const struct hda_fixup stac922x_fixups[] = {
3531 	[STAC_D945_REF] = {
3532 		.type = HDA_FIXUP_PINS,
3533 		.v.pins = ref922x_pin_configs,
3534 	},
3535 	[STAC_D945GTP3] = {
3536 		.type = HDA_FIXUP_PINS,
3537 		.v.pins = d945gtp3_pin_configs,
3538 	},
3539 	[STAC_D945GTP5] = {
3540 		.type = HDA_FIXUP_PINS,
3541 		.v.pins = d945gtp5_pin_configs,
3542 	},
3543 	[STAC_INTEL_MAC_AUTO] = {
3544 		.type = HDA_FIXUP_FUNC,
3545 		.v.func = stac922x_fixup_intel_mac_auto,
3546 	},
3547 	[STAC_INTEL_MAC_V1] = {
3548 		.type = HDA_FIXUP_PINS,
3549 		.v.pins = intel_mac_v1_pin_configs,
3550 		.chained = true,
3551 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3552 	},
3553 	[STAC_INTEL_MAC_V2] = {
3554 		.type = HDA_FIXUP_PINS,
3555 		.v.pins = intel_mac_v2_pin_configs,
3556 		.chained = true,
3557 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3558 	},
3559 	[STAC_INTEL_MAC_V3] = {
3560 		.type = HDA_FIXUP_PINS,
3561 		.v.pins = intel_mac_v3_pin_configs,
3562 		.chained = true,
3563 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3564 	},
3565 	[STAC_INTEL_MAC_V4] = {
3566 		.type = HDA_FIXUP_PINS,
3567 		.v.pins = intel_mac_v4_pin_configs,
3568 		.chained = true,
3569 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3570 	},
3571 	[STAC_INTEL_MAC_V5] = {
3572 		.type = HDA_FIXUP_PINS,
3573 		.v.pins = intel_mac_v5_pin_configs,
3574 		.chained = true,
3575 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3576 	},
3577 	[STAC_922X_INTEL_MAC_GPIO] = {
3578 		.type = HDA_FIXUP_FUNC,
3579 		.v.func = stac922x_fixup_intel_mac_gpio,
3580 	},
3581 	[STAC_ECS_202] = {
3582 		.type = HDA_FIXUP_PINS,
3583 		.v.pins = ecs202_pin_configs,
3584 	},
3585 	[STAC_922X_DELL_D81] = {
3586 		.type = HDA_FIXUP_PINS,
3587 		.v.pins = dell_922x_d81_pin_configs,
3588 	},
3589 	[STAC_922X_DELL_D82] = {
3590 		.type = HDA_FIXUP_PINS,
3591 		.v.pins = dell_922x_d82_pin_configs,
3592 	},
3593 	[STAC_922X_DELL_M81] = {
3594 		.type = HDA_FIXUP_PINS,
3595 		.v.pins = dell_922x_m81_pin_configs,
3596 	},
3597 	[STAC_922X_DELL_M82] = {
3598 		.type = HDA_FIXUP_PINS,
3599 		.v.pins = dell_922x_m82_pin_configs,
3600 	},
3601 };
3602 
3603 static const struct hda_model_fixup stac922x_models[] = {
3604 	{ .id = STAC_D945_REF, .name = "ref" },
3605 	{ .id = STAC_D945GTP5, .name = "5stack" },
3606 	{ .id = STAC_D945GTP3, .name = "3stack" },
3607 	{ .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3608 	{ .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3609 	{ .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3610 	{ .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3611 	{ .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3612 	{ .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3613 	{ .id = STAC_ECS_202, .name = "ecs202" },
3614 	{ .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3615 	{ .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3616 	{ .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3617 	{ .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3618 	/* for backward compatibility */
3619 	{ .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3620 	{ .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3621 	{ .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3622 	{ .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3623 	{ .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3624 	{ .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3625 	{}
3626 };
3627 
3628 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3629 	/* SigmaTel reference board */
3630 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3631 		      "DFI LanParty", STAC_D945_REF),
3632 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3633 		      "DFI LanParty", STAC_D945_REF),
3634 	/* Intel 945G based systems */
3635 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3636 		      "Intel D945G", STAC_D945GTP3),
3637 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3638 		      "Intel D945G", STAC_D945GTP3),
3639 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3640 		      "Intel D945G", STAC_D945GTP3),
3641 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3642 		      "Intel D945G", STAC_D945GTP3),
3643 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3644 		      "Intel D945G", STAC_D945GTP3),
3645 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3646 		      "Intel D945G", STAC_D945GTP3),
3647 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3648 		      "Intel D945G", STAC_D945GTP3),
3649 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3650 		      "Intel D945G", STAC_D945GTP3),
3651 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3652 		      "Intel D945G", STAC_D945GTP3),
3653 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3654 		      "Intel D945G", STAC_D945GTP3),
3655 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3656 		      "Intel D945G", STAC_D945GTP3),
3657 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3658 		      "Intel D945G", STAC_D945GTP3),
3659 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3660 		      "Intel D945G", STAC_D945GTP3),
3661 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3662 		      "Intel D945G", STAC_D945GTP3),
3663 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3664 		      "Intel D945G", STAC_D945GTP3),
3665 	/* Intel D945G 5-stack systems */
3666 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3667 		      "Intel D945G", STAC_D945GTP5),
3668 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3669 		      "Intel D945G", STAC_D945GTP5),
3670 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3671 		      "Intel D945G", STAC_D945GTP5),
3672 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3673 		      "Intel D945G", STAC_D945GTP5),
3674 	/* Intel 945P based systems */
3675 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3676 		      "Intel D945P", STAC_D945GTP3),
3677 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3678 		      "Intel D945P", STAC_D945GTP3),
3679 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3680 		      "Intel D945P", STAC_D945GTP3),
3681 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3682 		      "Intel D945P", STAC_D945GTP3),
3683 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3684 		      "Intel D945P", STAC_D945GTP3),
3685 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3686 		      "Intel D945P", STAC_D945GTP5),
3687 	/* other intel */
3688 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3689 		      "Intel D945", STAC_D945_REF),
3690 	/* other systems  */
3691 
3692 	/* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3693 	SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3694 
3695 	/* Dell systems  */
3696 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3697 		      "unknown Dell", STAC_922X_DELL_D81),
3698 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3699 		      "unknown Dell", STAC_922X_DELL_D81),
3700 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3701 		      "unknown Dell", STAC_922X_DELL_D81),
3702 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3703 		      "unknown Dell", STAC_922X_DELL_D82),
3704 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3705 		      "unknown Dell", STAC_922X_DELL_M81),
3706 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3707 		      "unknown Dell", STAC_922X_DELL_D82),
3708 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3709 		      "unknown Dell", STAC_922X_DELL_D81),
3710 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3711 		      "unknown Dell", STAC_922X_DELL_D81),
3712 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3713 		      "Dell XPS M1210", STAC_922X_DELL_M82),
3714 	/* ECS/PC Chips boards */
3715 	SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3716 		      "ECS/PC chips", STAC_ECS_202),
3717 	{} /* terminator */
3718 };
3719 
3720 static const struct hda_pintbl ref927x_pin_configs[] = {
3721 	{ 0x0a, 0x02214020 },
3722 	{ 0x0b, 0x02a19080 },
3723 	{ 0x0c, 0x0181304e },
3724 	{ 0x0d, 0x01014010 },
3725 	{ 0x0e, 0x01a19040 },
3726 	{ 0x0f, 0x01011012 },
3727 	{ 0x10, 0x01016011 },
3728 	{ 0x11, 0x0101201f },
3729 	{ 0x12, 0x183301f0 },
3730 	{ 0x13, 0x18a001f0 },
3731 	{ 0x14, 0x18a001f0 },
3732 	{ 0x21, 0x01442070 },
3733 	{ 0x22, 0x01c42190 },
3734 	{ 0x23, 0x40000100 },
3735 	{}
3736 };
3737 
3738 static const struct hda_pintbl d965_3st_pin_configs[] = {
3739 	{ 0x0a, 0x0221401f },
3740 	{ 0x0b, 0x02a19120 },
3741 	{ 0x0c, 0x40000100 },
3742 	{ 0x0d, 0x01014011 },
3743 	{ 0x0e, 0x01a19021 },
3744 	{ 0x0f, 0x01813024 },
3745 	{ 0x10, 0x40000100 },
3746 	{ 0x11, 0x40000100 },
3747 	{ 0x12, 0x40000100 },
3748 	{ 0x13, 0x40000100 },
3749 	{ 0x14, 0x40000100 },
3750 	{ 0x21, 0x40000100 },
3751 	{ 0x22, 0x40000100 },
3752 	{ 0x23, 0x40000100 },
3753 	{}
3754 };
3755 
3756 static const struct hda_pintbl d965_5st_pin_configs[] = {
3757 	{ 0x0a, 0x02214020 },
3758 	{ 0x0b, 0x02a19080 },
3759 	{ 0x0c, 0x0181304e },
3760 	{ 0x0d, 0x01014010 },
3761 	{ 0x0e, 0x01a19040 },
3762 	{ 0x0f, 0x01011012 },
3763 	{ 0x10, 0x01016011 },
3764 	{ 0x11, 0x40000100 },
3765 	{ 0x12, 0x40000100 },
3766 	{ 0x13, 0x40000100 },
3767 	{ 0x14, 0x40000100 },
3768 	{ 0x21, 0x01442070 },
3769 	{ 0x22, 0x40000100 },
3770 	{ 0x23, 0x40000100 },
3771 	{}
3772 };
3773 
3774 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3775 	{ 0x0a, 0x40000100 },
3776 	{ 0x0b, 0x40000100 },
3777 	{ 0x0c, 0x0181304e },
3778 	{ 0x0d, 0x01014010 },
3779 	{ 0x0e, 0x01a19040 },
3780 	{ 0x0f, 0x01011012 },
3781 	{ 0x10, 0x01016011 },
3782 	{ 0x11, 0x40000100 },
3783 	{ 0x12, 0x40000100 },
3784 	{ 0x13, 0x40000100 },
3785 	{ 0x14, 0x40000100 },
3786 	{ 0x21, 0x01442070 },
3787 	{ 0x22, 0x40000100 },
3788 	{ 0x23, 0x40000100 },
3789 	{}
3790 };
3791 
3792 static const struct hda_pintbl dell_3st_pin_configs[] = {
3793 	{ 0x0a, 0x02211230 },
3794 	{ 0x0b, 0x02a11220 },
3795 	{ 0x0c, 0x01a19040 },
3796 	{ 0x0d, 0x01114210 },
3797 	{ 0x0e, 0x01111212 },
3798 	{ 0x0f, 0x01116211 },
3799 	{ 0x10, 0x01813050 },
3800 	{ 0x11, 0x01112214 },
3801 	{ 0x12, 0x403003fa },
3802 	{ 0x13, 0x90a60040 },
3803 	{ 0x14, 0x90a60040 },
3804 	{ 0x21, 0x404003fb },
3805 	{ 0x22, 0x40c003fc },
3806 	{ 0x23, 0x40000100 },
3807 	{}
3808 };
3809 
3810 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3811 				     const struct hda_fixup *fix, int action)
3812 {
3813 	/* no jack detecion for ref-no-jd model */
3814 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
3815 		codec->no_jack_detect = 1;
3816 }
3817 
3818 static void stac927x_fixup_ref(struct hda_codec *codec,
3819 			       const struct hda_fixup *fix, int action)
3820 {
3821 	struct sigmatel_spec *spec = codec->spec;
3822 
3823 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3824 		snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3825 		spec->eapd_mask = spec->gpio_mask = 0;
3826 		spec->gpio_dir = spec->gpio_data = 0;
3827 	}
3828 }
3829 
3830 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3831 				     const struct hda_fixup *fix, int action)
3832 {
3833 	struct sigmatel_spec *spec = codec->spec;
3834 
3835 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3836 		return;
3837 
3838 	if (codec->core.subsystem_id != 0x1028022f) {
3839 		/* GPIO2 High = Enable EAPD */
3840 		spec->eapd_mask = spec->gpio_mask = 0x04;
3841 		spec->gpio_dir = spec->gpio_data = 0x04;
3842 	}
3843 
3844 	snd_hda_add_verbs(codec, dell_3st_core_init);
3845 	spec->volknob_init = 1;
3846 }
3847 
3848 static void stac927x_fixup_volknob(struct hda_codec *codec,
3849 				   const struct hda_fixup *fix, int action)
3850 {
3851 	struct sigmatel_spec *spec = codec->spec;
3852 
3853 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3854 		snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3855 		spec->volknob_init = 1;
3856 	}
3857 }
3858 
3859 static const struct hda_fixup stac927x_fixups[] = {
3860 	[STAC_D965_REF_NO_JD] = {
3861 		.type = HDA_FIXUP_FUNC,
3862 		.v.func = stac927x_fixup_ref_no_jd,
3863 		.chained = true,
3864 		.chain_id = STAC_D965_REF,
3865 	},
3866 	[STAC_D965_REF] = {
3867 		.type = HDA_FIXUP_FUNC,
3868 		.v.func = stac927x_fixup_ref,
3869 	},
3870 	[STAC_D965_3ST] = {
3871 		.type = HDA_FIXUP_PINS,
3872 		.v.pins = d965_3st_pin_configs,
3873 		.chained = true,
3874 		.chain_id = STAC_D965_VERBS,
3875 	},
3876 	[STAC_D965_5ST] = {
3877 		.type = HDA_FIXUP_PINS,
3878 		.v.pins = d965_5st_pin_configs,
3879 		.chained = true,
3880 		.chain_id = STAC_D965_VERBS,
3881 	},
3882 	[STAC_D965_VERBS] = {
3883 		.type = HDA_FIXUP_VERBS,
3884 		.v.verbs = d965_core_init,
3885 	},
3886 	[STAC_D965_5ST_NO_FP] = {
3887 		.type = HDA_FIXUP_PINS,
3888 		.v.pins = d965_5st_no_fp_pin_configs,
3889 	},
3890 	[STAC_NEMO_DEFAULT] = {
3891 		.type = HDA_FIXUP_PINS,
3892 		.v.pins = nemo_pin_configs,
3893 	},
3894 	[STAC_DELL_3ST] = {
3895 		.type = HDA_FIXUP_PINS,
3896 		.v.pins = dell_3st_pin_configs,
3897 		.chained = true,
3898 		.chain_id = STAC_927X_DELL_DMIC,
3899 	},
3900 	[STAC_DELL_BIOS] = {
3901 		.type = HDA_FIXUP_PINS,
3902 		.v.pins = (const struct hda_pintbl[]) {
3903 			/* correct the front output jack as a hp out */
3904 			{ 0x0f, 0x0221101f },
3905 			/* correct the front input jack as a mic */
3906 			{ 0x0e, 0x02a79130 },
3907 			{}
3908 		},
3909 		.chained = true,
3910 		.chain_id = STAC_927X_DELL_DMIC,
3911 	},
3912 	[STAC_DELL_BIOS_AMIC] = {
3913 		.type = HDA_FIXUP_PINS,
3914 		.v.pins = (const struct hda_pintbl[]) {
3915 			/* configure the analog microphone on some laptops */
3916 			{ 0x0c, 0x90a79130 },
3917 			{}
3918 		},
3919 		.chained = true,
3920 		.chain_id = STAC_DELL_BIOS,
3921 	},
3922 	[STAC_DELL_BIOS_SPDIF] = {
3923 		.type = HDA_FIXUP_PINS,
3924 		.v.pins = (const struct hda_pintbl[]) {
3925 			/* correct the device field to SPDIF out */
3926 			{ 0x21, 0x01442070 },
3927 			{}
3928 		},
3929 		.chained = true,
3930 		.chain_id = STAC_DELL_BIOS,
3931 	},
3932 	[STAC_927X_DELL_DMIC] = {
3933 		.type = HDA_FIXUP_FUNC,
3934 		.v.func = stac927x_fixup_dell_dmic,
3935 	},
3936 	[STAC_927X_VOLKNOB] = {
3937 		.type = HDA_FIXUP_FUNC,
3938 		.v.func = stac927x_fixup_volknob,
3939 	},
3940 };
3941 
3942 static const struct hda_model_fixup stac927x_models[] = {
3943 	{ .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3944 	{ .id = STAC_D965_REF, .name = "ref" },
3945 	{ .id = STAC_D965_3ST, .name = "3stack" },
3946 	{ .id = STAC_D965_5ST, .name = "5stack" },
3947 	{ .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3948 	{ .id = STAC_DELL_3ST, .name = "dell-3stack" },
3949 	{ .id = STAC_DELL_BIOS, .name = "dell-bios" },
3950 	{ .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
3951 	{ .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3952 	{ .id = STAC_927X_VOLKNOB, .name = "volknob" },
3953 	{}
3954 };
3955 
3956 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3957 	/* SigmaTel reference board */
3958 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3959 		      "DFI LanParty", STAC_D965_REF),
3960 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3961 		      "DFI LanParty", STAC_D965_REF),
3962 	 /* Intel 946 based systems */
3963 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3964 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3965 	/* 965 based 3 stack systems */
3966 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3967 			   "Intel D965", STAC_D965_3ST),
3968 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3969 			   "Intel D965", STAC_D965_3ST),
3970 	/* Dell 3 stack systems */
3971 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3972 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01ed, "Dell     ", STAC_DELL_3ST),
3973 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f4, "Dell     ", STAC_DELL_3ST),
3974 	/* Dell 3 stack systems with verb table in BIOS */
3975 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3976 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3977 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0227, "Dell Vostro 1400  ", STAC_DELL_BIOS),
3978 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022e, "Dell     ", STAC_DELL_BIOS_SPDIF),
3979 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3980 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0242, "Dell     ", STAC_DELL_BIOS),
3981 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0243, "Dell     ", STAC_DELL_BIOS),
3982 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x02ff, "Dell     ", STAC_DELL_BIOS),
3983 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3984 	/* 965 based 5 stack systems */
3985 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3986 			   "Intel D965", STAC_D965_5ST),
3987 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3988 			   "Intel D965", STAC_D965_5ST),
3989 	/* Nemo */
3990 	SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
3991 	/* volume-knob fixes */
3992 	SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3993 	{} /* terminator */
3994 };
3995 
3996 static const struct hda_pintbl ref9205_pin_configs[] = {
3997 	{ 0x0a, 0x40000100 },
3998 	{ 0x0b, 0x40000100 },
3999 	{ 0x0c, 0x01016011 },
4000 	{ 0x0d, 0x01014010 },
4001 	{ 0x0e, 0x01813122 },
4002 	{ 0x0f, 0x01a19021 },
4003 	{ 0x14, 0x01019020 },
4004 	{ 0x16, 0x40000100 },
4005 	{ 0x17, 0x90a000f0 },
4006 	{ 0x18, 0x90a000f0 },
4007 	{ 0x21, 0x01441030 },
4008 	{ 0x22, 0x01c41030 },
4009 	{}
4010 };
4011 
4012 /*
4013     STAC 9205 pin configs for
4014     102801F1
4015     102801F2
4016     102801FC
4017     102801FD
4018     10280204
4019     1028021F
4020     10280228 (Dell Vostro 1500)
4021     10280229 (Dell Vostro 1700)
4022 */
4023 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4024 	{ 0x0a, 0x0321101F },
4025 	{ 0x0b, 0x03A11020 },
4026 	{ 0x0c, 0x400003FA },
4027 	{ 0x0d, 0x90170310 },
4028 	{ 0x0e, 0x400003FB },
4029 	{ 0x0f, 0x400003FC },
4030 	{ 0x14, 0x400003FD },
4031 	{ 0x16, 0x40F000F9 },
4032 	{ 0x17, 0x90A60330 },
4033 	{ 0x18, 0x400003FF },
4034 	{ 0x21, 0x0144131F },
4035 	{ 0x22, 0x40C003FE },
4036 	{}
4037 };
4038 
4039 /*
4040     STAC 9205 pin configs for
4041     102801F9
4042     102801FA
4043     102801FE
4044     102801FF (Dell Precision M4300)
4045     10280206
4046     10280200
4047     10280201
4048 */
4049 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4050 	{ 0x0a, 0x0321101f },
4051 	{ 0x0b, 0x03a11020 },
4052 	{ 0x0c, 0x90a70330 },
4053 	{ 0x0d, 0x90170310 },
4054 	{ 0x0e, 0x400000fe },
4055 	{ 0x0f, 0x400000ff },
4056 	{ 0x14, 0x400000fd },
4057 	{ 0x16, 0x40f000f9 },
4058 	{ 0x17, 0x400000fa },
4059 	{ 0x18, 0x400000fc },
4060 	{ 0x21, 0x0144131f },
4061 	{ 0x22, 0x40c003f8 },
4062 	/* Enable SPDIF in/out */
4063 	{ 0x1f, 0x01441030 },
4064 	{ 0x20, 0x1c410030 },
4065 	{}
4066 };
4067 
4068 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4069 	{ 0x0a, 0x0421101f },
4070 	{ 0x0b, 0x04a11020 },
4071 	{ 0x0c, 0x400003fa },
4072 	{ 0x0d, 0x90170310 },
4073 	{ 0x0e, 0x400003fb },
4074 	{ 0x0f, 0x400003fc },
4075 	{ 0x14, 0x400003fd },
4076 	{ 0x16, 0x400003f9 },
4077 	{ 0x17, 0x90a60330 },
4078 	{ 0x18, 0x400003ff },
4079 	{ 0x21, 0x01441340 },
4080 	{ 0x22, 0x40c003fe },
4081 	{}
4082 };
4083 
4084 static void stac9205_fixup_ref(struct hda_codec *codec,
4085 			       const struct hda_fixup *fix, int action)
4086 {
4087 	struct sigmatel_spec *spec = codec->spec;
4088 
4089 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4090 		snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4091 		/* SPDIF-In enabled */
4092 		spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4093 	}
4094 }
4095 
4096 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4097 				    const struct hda_fixup *fix, int action)
4098 {
4099 	struct sigmatel_spec *spec = codec->spec;
4100 	struct hda_jack_callback *jack;
4101 
4102 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4103 		snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4104 
4105 		/* Enable unsol response for GPIO4/Dock HP connection */
4106 		snd_hda_codec_write_cache(codec, codec->core.afg, 0,
4107 			AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4108 		jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
4109 							   stac_vref_event);
4110 		if (!IS_ERR(jack))
4111 			jack->private_data = 0x01;
4112 
4113 		spec->gpio_dir = 0x0b;
4114 		spec->eapd_mask = 0x01;
4115 		spec->gpio_mask = 0x1b;
4116 		spec->gpio_mute = 0x10;
4117 		/* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4118 		 * GPIO3 Low = DRM
4119 		 */
4120 		spec->gpio_data = 0x01;
4121 	}
4122 }
4123 
4124 static void stac9205_fixup_eapd(struct hda_codec *codec,
4125 				const struct hda_fixup *fix, int action)
4126 {
4127 	struct sigmatel_spec *spec = codec->spec;
4128 
4129 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
4130 		spec->eapd_switch = 0;
4131 }
4132 
4133 static const struct hda_fixup stac9205_fixups[] = {
4134 	[STAC_9205_REF] = {
4135 		.type = HDA_FIXUP_FUNC,
4136 		.v.func = stac9205_fixup_ref,
4137 	},
4138 	[STAC_9205_DELL_M42] = {
4139 		.type = HDA_FIXUP_PINS,
4140 		.v.pins = dell_9205_m42_pin_configs,
4141 	},
4142 	[STAC_9205_DELL_M43] = {
4143 		.type = HDA_FIXUP_FUNC,
4144 		.v.func = stac9205_fixup_dell_m43,
4145 	},
4146 	[STAC_9205_DELL_M44] = {
4147 		.type = HDA_FIXUP_PINS,
4148 		.v.pins = dell_9205_m44_pin_configs,
4149 	},
4150 	[STAC_9205_EAPD] = {
4151 		.type = HDA_FIXUP_FUNC,
4152 		.v.func = stac9205_fixup_eapd,
4153 	},
4154 	{}
4155 };
4156 
4157 static const struct hda_model_fixup stac9205_models[] = {
4158 	{ .id = STAC_9205_REF, .name = "ref" },
4159 	{ .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4160 	{ .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4161 	{ .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4162 	{ .id = STAC_9205_EAPD, .name = "eapd" },
4163 	{}
4164 };
4165 
4166 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4167 	/* SigmaTel reference board */
4168 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4169 		      "DFI LanParty", STAC_9205_REF),
4170 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4171 		      "SigmaTel", STAC_9205_REF),
4172 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4173 		      "DFI LanParty", STAC_9205_REF),
4174 	/* Dell */
4175 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4176 		      "unknown Dell", STAC_9205_DELL_M42),
4177 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4178 		      "unknown Dell", STAC_9205_DELL_M42),
4179 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4180 		      "Dell Precision", STAC_9205_DELL_M43),
4181 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4182 		      "Dell Precision", STAC_9205_DELL_M43),
4183 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4184 		      "Dell Precision", STAC_9205_DELL_M43),
4185 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4186 		      "unknown Dell", STAC_9205_DELL_M42),
4187 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4188 		      "unknown Dell", STAC_9205_DELL_M42),
4189 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4190 		      "Dell Precision", STAC_9205_DELL_M43),
4191 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4192 		      "Dell Precision M4300", STAC_9205_DELL_M43),
4193 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4194 		      "unknown Dell", STAC_9205_DELL_M42),
4195 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4196 		      "Dell Precision", STAC_9205_DELL_M43),
4197 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4198 		      "Dell Precision", STAC_9205_DELL_M43),
4199 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4200 		      "Dell Precision", STAC_9205_DELL_M43),
4201 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4202 		      "Dell Inspiron", STAC_9205_DELL_M44),
4203 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4204 		      "Dell Vostro 1500", STAC_9205_DELL_M42),
4205 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4206 		      "Dell Vostro 1700", STAC_9205_DELL_M42),
4207 	/* Gateway */
4208 	SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4209 	SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4210 	{} /* terminator */
4211 };
4212 
4213 static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4214 				    const struct hda_fixup *fix, int action)
4215 {
4216 	struct sigmatel_spec *spec = codec->spec;
4217 
4218 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
4219 		return;
4220 
4221 	if (find_mute_led_cfg(codec, spec->default_polarity))
4222 		codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4223 				spec->gpio_led,
4224 				spec->gpio_led_polarity);
4225 }
4226 
4227 static const struct hda_fixup stac92hd95_fixups[] = {
4228 	[STAC_92HD95_HP_LED] = {
4229 		.type = HDA_FIXUP_FUNC,
4230 		.v.func = stac92hd95_fixup_hp_led,
4231 	},
4232 	[STAC_92HD95_HP_BASS] = {
4233 		.type = HDA_FIXUP_VERBS,
4234 		.v.verbs = (const struct hda_verb[]) {
4235 			{0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4236 			{}
4237 		},
4238 		.chained = true,
4239 		.chain_id = STAC_92HD95_HP_LED,
4240 	},
4241 };
4242 
4243 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4244 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4245 	{} /* terminator */
4246 };
4247 
4248 static const struct hda_model_fixup stac92hd95_models[] = {
4249 	{ .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4250 	{ .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4251 	{}
4252 };
4253 
4254 
4255 static int stac_parse_auto_config(struct hda_codec *codec)
4256 {
4257 	struct sigmatel_spec *spec = codec->spec;
4258 	int err;
4259 	int flags = 0;
4260 
4261 	if (spec->headset_jack)
4262 		flags |= HDA_PINCFG_HEADSET_MIC;
4263 
4264 	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4265 	if (err < 0)
4266 		return err;
4267 
4268 	/* add hooks */
4269 	spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4270 	spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4271 
4272 	spec->gen.automute_hook = stac_update_outputs;
4273 
4274 	err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4275 	if (err < 0)
4276 		return err;
4277 
4278 	if (spec->vref_mute_led_nid) {
4279 		err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4280 		if (err < 0)
4281 			return err;
4282 	}
4283 
4284 	/* setup analog beep controls */
4285 	if (spec->anabeep_nid > 0) {
4286 		err = stac_auto_create_beep_ctls(codec,
4287 						 spec->anabeep_nid);
4288 		if (err < 0)
4289 			return err;
4290 	}
4291 
4292 	/* setup digital beep controls and input device */
4293 #ifdef CONFIG_SND_HDA_INPUT_BEEP
4294 	if (spec->gen.beep_nid) {
4295 		hda_nid_t nid = spec->gen.beep_nid;
4296 		unsigned int caps;
4297 
4298 		err = stac_auto_create_beep_ctls(codec, nid);
4299 		if (err < 0)
4300 			return err;
4301 		if (codec->beep) {
4302 			/* IDT/STAC codecs have linear beep tone parameter */
4303 			codec->beep->linear_tone = spec->linear_tone_beep;
4304 			/* if no beep switch is available, make its own one */
4305 			caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4306 			if (!(caps & AC_AMPCAP_MUTE)) {
4307 				err = stac_beep_switch_ctl(codec);
4308 				if (err < 0)
4309 					return err;
4310 			}
4311 		}
4312 	}
4313 #endif
4314 
4315 	if (spec->gpio_led)
4316 		spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4317 
4318 	if (spec->aloopback_ctl &&
4319 	    snd_hda_get_bool_hint(codec, "loopback") == 1) {
4320 		unsigned int wr_verb =
4321 			spec->aloopback_ctl->private_value >> 16;
4322 		if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4323 			return -ENOMEM;
4324 		if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4325 			return -ENOMEM;
4326 	}
4327 
4328 	if (spec->have_spdif_mux) {
4329 		err = stac_create_spdif_mux_ctls(codec);
4330 		if (err < 0)
4331 			return err;
4332 	}
4333 
4334 	stac_init_power_map(codec);
4335 
4336 	return 0;
4337 }
4338 
4339 static int stac_init(struct hda_codec *codec)
4340 {
4341 	struct sigmatel_spec *spec = codec->spec;
4342 	int i;
4343 
4344 	/* override some hints */
4345 	stac_store_hints(codec);
4346 
4347 	/* set up GPIO */
4348 	/* turn on EAPD statically when spec->eapd_switch isn't set.
4349 	 * otherwise, unsol event will turn it on/off dynamically
4350 	 */
4351 	if (!spec->eapd_switch)
4352 		spec->gpio_data |= spec->eapd_mask;
4353 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4354 
4355 	snd_hda_gen_init(codec);
4356 
4357 	/* sync the power-map */
4358 	if (spec->num_pwrs)
4359 		snd_hda_codec_write(codec, codec->core.afg, 0,
4360 				    AC_VERB_IDT_SET_POWER_MAP,
4361 				    spec->power_map_bits);
4362 
4363 	/* power down inactive ADCs */
4364 	if (spec->powerdown_adcs) {
4365 		for (i = 0; i < spec->gen.num_all_adcs; i++) {
4366 			if (spec->active_adcs & (1 << i))
4367 				continue;
4368 			snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4369 					    AC_VERB_SET_POWER_STATE,
4370 					    AC_PWRST_D3);
4371 		}
4372 	}
4373 
4374 	return 0;
4375 }
4376 
4377 static void stac_shutup(struct hda_codec *codec)
4378 {
4379 	struct sigmatel_spec *spec = codec->spec;
4380 
4381 	snd_hda_shutup_pins(codec);
4382 
4383 	if (spec->eapd_mask)
4384 		stac_gpio_set(codec, spec->gpio_mask,
4385 				spec->gpio_dir, spec->gpio_data &
4386 				~spec->eapd_mask);
4387 }
4388 
4389 #define stac_free	snd_hda_gen_free
4390 
4391 #ifdef CONFIG_SND_PROC_FS
4392 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4393 			       struct hda_codec *codec, hda_nid_t nid)
4394 {
4395 	if (nid == codec->core.afg)
4396 		snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4397 			    snd_hda_codec_read(codec, nid, 0,
4398 					       AC_VERB_IDT_GET_POWER_MAP, 0));
4399 }
4400 
4401 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4402 				  struct hda_codec *codec,
4403 				  unsigned int verb)
4404 {
4405 	snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4406 		    snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
4407 }
4408 
4409 /* stac92hd71bxx, stac92hd73xx */
4410 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4411 				 struct hda_codec *codec, hda_nid_t nid)
4412 {
4413 	stac92hd_proc_hook(buffer, codec, nid);
4414 	if (nid == codec->core.afg)
4415 		analog_loop_proc_hook(buffer, codec, 0xfa0);
4416 }
4417 
4418 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4419 			       struct hda_codec *codec, hda_nid_t nid)
4420 {
4421 	if (nid == codec->core.afg)
4422 		analog_loop_proc_hook(buffer, codec, 0xfe0);
4423 }
4424 
4425 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4426 			       struct hda_codec *codec, hda_nid_t nid)
4427 {
4428 	if (nid == codec->core.afg)
4429 		analog_loop_proc_hook(buffer, codec, 0xfeb);
4430 }
4431 #else
4432 #define stac92hd_proc_hook	NULL
4433 #define stac92hd7x_proc_hook	NULL
4434 #define stac9205_proc_hook	NULL
4435 #define stac927x_proc_hook	NULL
4436 #endif
4437 
4438 #ifdef CONFIG_PM
4439 static int stac_suspend(struct hda_codec *codec)
4440 {
4441 	stac_shutup(codec);
4442 	return 0;
4443 }
4444 #else
4445 #define stac_suspend		NULL
4446 #endif /* CONFIG_PM */
4447 
4448 static const struct hda_codec_ops stac_patch_ops = {
4449 	.build_controls = snd_hda_gen_build_controls,
4450 	.build_pcms = snd_hda_gen_build_pcms,
4451 	.init = stac_init,
4452 	.free = stac_free,
4453 	.unsol_event = snd_hda_jack_unsol_event,
4454 #ifdef CONFIG_PM
4455 	.suspend = stac_suspend,
4456 #endif
4457 	.reboot_notify = stac_shutup,
4458 };
4459 
4460 static int alloc_stac_spec(struct hda_codec *codec)
4461 {
4462 	struct sigmatel_spec *spec;
4463 
4464 	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4465 	if (!spec)
4466 		return -ENOMEM;
4467 	snd_hda_gen_spec_init(&spec->gen);
4468 	codec->spec = spec;
4469 	codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4470 	spec->gen.dac_min_mute = true;
4471 	codec->patch_ops = stac_patch_ops;
4472 	return 0;
4473 }
4474 
4475 static int patch_stac9200(struct hda_codec *codec)
4476 {
4477 	struct sigmatel_spec *spec;
4478 	int err;
4479 
4480 	err = alloc_stac_spec(codec);
4481 	if (err < 0)
4482 		return err;
4483 
4484 	spec = codec->spec;
4485 	spec->linear_tone_beep = 1;
4486 	spec->gen.own_eapd_ctl = 1;
4487 
4488 	codec->power_filter = snd_hda_codec_eapd_power_filter;
4489 
4490 	snd_hda_add_verbs(codec, stac9200_eapd_init);
4491 
4492 	snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4493 			   stac9200_fixups);
4494 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4495 
4496 	err = stac_parse_auto_config(codec);
4497 	if (err < 0) {
4498 		stac_free(codec);
4499 		return err;
4500 	}
4501 
4502 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4503 
4504 	return 0;
4505 }
4506 
4507 static int patch_stac925x(struct hda_codec *codec)
4508 {
4509 	struct sigmatel_spec *spec;
4510 	int err;
4511 
4512 	err = alloc_stac_spec(codec);
4513 	if (err < 0)
4514 		return err;
4515 
4516 	spec = codec->spec;
4517 	spec->linear_tone_beep = 1;
4518 	spec->gen.own_eapd_ctl = 1;
4519 
4520 	snd_hda_add_verbs(codec, stac925x_core_init);
4521 
4522 	snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4523 			   stac925x_fixups);
4524 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4525 
4526 	err = stac_parse_auto_config(codec);
4527 	if (err < 0) {
4528 		stac_free(codec);
4529 		return err;
4530 	}
4531 
4532 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4533 
4534 	return 0;
4535 }
4536 
4537 static int patch_stac92hd73xx(struct hda_codec *codec)
4538 {
4539 	struct sigmatel_spec *spec;
4540 	int err;
4541 	int num_dacs;
4542 
4543 	err = alloc_stac_spec(codec);
4544 	if (err < 0)
4545 		return err;
4546 
4547 	spec = codec->spec;
4548 	/* enable power_save_node only for new 92HD89xx chips, as it causes
4549 	 * click noises on old 92HD73xx chips.
4550 	 */
4551 	if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4552 		codec->power_save_node = 1;
4553 	spec->linear_tone_beep = 0;
4554 	spec->gen.mixer_nid = 0x1d;
4555 	spec->have_spdif_mux = 1;
4556 
4557 	num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4558 	if (num_dacs < 3 || num_dacs > 5) {
4559 		codec_warn(codec,
4560 			   "Could not determine number of channels defaulting to DAC count\n");
4561 		num_dacs = 5;
4562 	}
4563 
4564 	switch (num_dacs) {
4565 	case 0x3: /* 6 Channel */
4566 		spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4567 		break;
4568 	case 0x4: /* 8 Channel */
4569 		spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4570 		break;
4571 	case 0x5: /* 10 Channel */
4572 		spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4573 		break;
4574 	}
4575 
4576 	spec->aloopback_mask = 0x01;
4577 	spec->aloopback_shift = 8;
4578 
4579 	spec->gen.beep_nid = 0x1c; /* digital beep */
4580 
4581 	/* GPIO0 High = Enable EAPD */
4582 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4583 	spec->gpio_data = 0x01;
4584 
4585 	spec->eapd_switch = 1;
4586 
4587 	spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4588 	spec->pwr_nids = stac92hd73xx_pwr_nids;
4589 
4590 	spec->gen.own_eapd_ctl = 1;
4591 	spec->gen.power_down_unused = 1;
4592 
4593 	snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4594 			   stac92hd73xx_fixups);
4595 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4596 
4597 	if (!spec->volknob_init)
4598 		snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4599 
4600 	err = stac_parse_auto_config(codec);
4601 	if (err < 0) {
4602 		stac_free(codec);
4603 		return err;
4604 	}
4605 
4606 	/* Don't GPIO-mute speakers if there are no internal speakers, because
4607 	 * the GPIO might be necessary for Headphone
4608 	 */
4609 	if (spec->eapd_switch && !has_builtin_speaker(codec))
4610 		spec->eapd_switch = 0;
4611 
4612 	codec->proc_widget_hook = stac92hd7x_proc_hook;
4613 
4614 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4615 
4616 	return 0;
4617 }
4618 
4619 static void stac_setup_gpio(struct hda_codec *codec)
4620 {
4621 	struct sigmatel_spec *spec = codec->spec;
4622 
4623 	spec->gpio_mask |= spec->eapd_mask;
4624 	if (spec->gpio_led) {
4625 		if (!spec->vref_mute_led_nid) {
4626 			spec->gpio_mask |= spec->gpio_led;
4627 			spec->gpio_dir |= spec->gpio_led;
4628 			spec->gpio_data |= spec->gpio_led;
4629 		} else {
4630 			codec->power_filter = stac_vref_led_power_filter;
4631 		}
4632 	}
4633 
4634 	if (spec->mic_mute_led_gpio) {
4635 		spec->gpio_mask |= spec->mic_mute_led_gpio;
4636 		spec->gpio_dir |= spec->mic_mute_led_gpio;
4637 		spec->mic_enabled = 0;
4638 		spec->gpio_data |= spec->mic_mute_led_gpio;
4639 		snd_hda_gen_add_micmute_led(codec, stac_capture_led_update);
4640 	}
4641 }
4642 
4643 static int patch_stac92hd83xxx(struct hda_codec *codec)
4644 {
4645 	struct sigmatel_spec *spec;
4646 	int err;
4647 
4648 	err = alloc_stac_spec(codec);
4649 	if (err < 0)
4650 		return err;
4651 
4652 	/* longer delay needed for D3 */
4653 	codec->core.power_caps &= ~AC_PWRST_EPSS;
4654 
4655 	spec = codec->spec;
4656 	codec->power_save_node = 1;
4657 	spec->linear_tone_beep = 0;
4658 	spec->gen.own_eapd_ctl = 1;
4659 	spec->gen.power_down_unused = 1;
4660 	spec->gen.mixer_nid = 0x1b;
4661 
4662 	spec->gen.beep_nid = 0x21; /* digital beep */
4663 	spec->pwr_nids = stac92hd83xxx_pwr_nids;
4664 	spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4665 	spec->default_polarity = -1; /* no default cfg */
4666 
4667 	snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4668 
4669 	snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4670 			   stac92hd83xxx_fixups);
4671 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4672 
4673 	stac_setup_gpio(codec);
4674 
4675 	err = stac_parse_auto_config(codec);
4676 	if (err < 0) {
4677 		stac_free(codec);
4678 		return err;
4679 	}
4680 
4681 	codec->proc_widget_hook = stac92hd_proc_hook;
4682 
4683 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4684 
4685 	return 0;
4686 }
4687 
4688 static const hda_nid_t stac92hd95_pwr_nids[] = {
4689 	0x0a, 0x0b, 0x0c, 0x0d
4690 };
4691 
4692 static int patch_stac92hd95(struct hda_codec *codec)
4693 {
4694 	struct sigmatel_spec *spec;
4695 	int err;
4696 
4697 	err = alloc_stac_spec(codec);
4698 	if (err < 0)
4699 		return err;
4700 
4701 	/* longer delay needed for D3 */
4702 	codec->core.power_caps &= ~AC_PWRST_EPSS;
4703 
4704 	spec = codec->spec;
4705 	codec->power_save_node = 1;
4706 	spec->linear_tone_beep = 0;
4707 	spec->gen.own_eapd_ctl = 1;
4708 	spec->gen.power_down_unused = 1;
4709 
4710 	spec->gen.beep_nid = 0x19; /* digital beep */
4711 	spec->pwr_nids = stac92hd95_pwr_nids;
4712 	spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4713 	spec->default_polarity = 0;
4714 
4715 	snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4716 			   stac92hd95_fixups);
4717 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4718 
4719 	stac_setup_gpio(codec);
4720 
4721 	err = stac_parse_auto_config(codec);
4722 	if (err < 0) {
4723 		stac_free(codec);
4724 		return err;
4725 	}
4726 
4727 	codec->proc_widget_hook = stac92hd_proc_hook;
4728 
4729 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4730 
4731 	return 0;
4732 }
4733 
4734 static int patch_stac92hd71bxx(struct hda_codec *codec)
4735 {
4736 	struct sigmatel_spec *spec;
4737 	const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
4738 	int err;
4739 
4740 	err = alloc_stac_spec(codec);
4741 	if (err < 0)
4742 		return err;
4743 
4744 	spec = codec->spec;
4745 	/* disabled power_save_node since it causes noises on a Dell machine */
4746 	/* codec->power_save_node = 1; */
4747 	spec->linear_tone_beep = 0;
4748 	spec->gen.own_eapd_ctl = 1;
4749 	spec->gen.power_down_unused = 1;
4750 	spec->gen.mixer_nid = 0x17;
4751 	spec->have_spdif_mux = 1;
4752 
4753 	/* GPIO0 = EAPD */
4754 	spec->gpio_mask = 0x01;
4755 	spec->gpio_dir = 0x01;
4756 	spec->gpio_data = 0x01;
4757 
4758 	switch (codec->core.vendor_id) {
4759 	case 0x111d76b6: /* 4 Port without Analog Mixer */
4760 	case 0x111d76b7:
4761 		unmute_nids++;
4762 		break;
4763 	case 0x111d7608: /* 5 Port with Analog Mixer */
4764 		if ((codec->core.revision_id & 0xf) == 0 ||
4765 		    (codec->core.revision_id & 0xf) == 1)
4766 			spec->stream_delay = 40; /* 40 milliseconds */
4767 
4768 		/* disable VSW */
4769 		unmute_nids++;
4770 		snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4771 		snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4772 		break;
4773 	case 0x111d7603: /* 6 Port with Analog Mixer */
4774 		if ((codec->core.revision_id & 0xf) == 1)
4775 			spec->stream_delay = 40; /* 40 milliseconds */
4776 
4777 		break;
4778 	}
4779 
4780 	if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4781 		snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4782 
4783 	if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4784 		const hda_nid_t *p;
4785 		for (p = unmute_nids; *p; p++)
4786 			snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4787 						      0xff, 0x00);
4788 	}
4789 
4790 	spec->aloopback_ctl = &stac92hd71bxx_loopback;
4791 	spec->aloopback_mask = 0x50;
4792 	spec->aloopback_shift = 0;
4793 
4794 	spec->powerdown_adcs = 1;
4795 	spec->gen.beep_nid = 0x26; /* digital beep */
4796 	spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4797 	spec->pwr_nids = stac92hd71bxx_pwr_nids;
4798 
4799 	snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4800 			   stac92hd71bxx_fixups);
4801 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4802 
4803 	stac_setup_gpio(codec);
4804 
4805 	err = stac_parse_auto_config(codec);
4806 	if (err < 0) {
4807 		stac_free(codec);
4808 		return err;
4809 	}
4810 
4811 	codec->proc_widget_hook = stac92hd7x_proc_hook;
4812 
4813 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4814 
4815 	return 0;
4816 }
4817 
4818 static int patch_stac922x(struct hda_codec *codec)
4819 {
4820 	struct sigmatel_spec *spec;
4821 	int err;
4822 
4823 	err = alloc_stac_spec(codec);
4824 	if (err < 0)
4825 		return err;
4826 
4827 	spec = codec->spec;
4828 	spec->linear_tone_beep = 1;
4829 	spec->gen.own_eapd_ctl = 1;
4830 
4831 	snd_hda_add_verbs(codec, stac922x_core_init);
4832 
4833 	/* Fix Mux capture level; max to 2 */
4834 	snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4835 				  (0 << AC_AMPCAP_OFFSET_SHIFT) |
4836 				  (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4837 				  (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4838 				  (0 << AC_AMPCAP_MUTE_SHIFT));
4839 
4840 	snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4841 			   stac922x_fixups);
4842 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4843 
4844 	err = stac_parse_auto_config(codec);
4845 	if (err < 0) {
4846 		stac_free(codec);
4847 		return err;
4848 	}
4849 
4850 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4851 
4852 	return 0;
4853 }
4854 
4855 static const char * const stac927x_spdif_labels[] = {
4856 	"Digital Playback", "ADAT", "Analog Mux 1",
4857 	"Analog Mux 2", "Analog Mux 3", NULL
4858 };
4859 
4860 static int patch_stac927x(struct hda_codec *codec)
4861 {
4862 	struct sigmatel_spec *spec;
4863 	int err;
4864 
4865 	err = alloc_stac_spec(codec);
4866 	if (err < 0)
4867 		return err;
4868 
4869 	spec = codec->spec;
4870 	spec->linear_tone_beep = 1;
4871 	spec->gen.own_eapd_ctl = 1;
4872 	spec->have_spdif_mux = 1;
4873 	spec->spdif_labels = stac927x_spdif_labels;
4874 
4875 	spec->gen.beep_nid = 0x23; /* digital beep */
4876 
4877 	/* GPIO0 High = Enable EAPD */
4878 	spec->eapd_mask = spec->gpio_mask = 0x01;
4879 	spec->gpio_dir = spec->gpio_data = 0x01;
4880 
4881 	spec->aloopback_ctl = &stac927x_loopback;
4882 	spec->aloopback_mask = 0x40;
4883 	spec->aloopback_shift = 0;
4884 	spec->eapd_switch = 1;
4885 
4886 	snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4887 			   stac927x_fixups);
4888 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4889 
4890 	if (!spec->volknob_init)
4891 		snd_hda_add_verbs(codec, stac927x_core_init);
4892 
4893 	err = stac_parse_auto_config(codec);
4894 	if (err < 0) {
4895 		stac_free(codec);
4896 		return err;
4897 	}
4898 
4899 	codec->proc_widget_hook = stac927x_proc_hook;
4900 
4901 	/*
4902 	 * !!FIXME!!
4903 	 * The STAC927x seem to require fairly long delays for certain
4904 	 * command sequences.  With too short delays (even if the answer
4905 	 * is set to RIRB properly), it results in the silence output
4906 	 * on some hardwares like Dell.
4907 	 *
4908 	 * The below flag enables the longer delay (see get_response
4909 	 * in hda_intel.c).
4910 	 */
4911 	codec->bus->core.needs_damn_long_delay = 1;
4912 
4913 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4914 
4915 	return 0;
4916 }
4917 
4918 static int patch_stac9205(struct hda_codec *codec)
4919 {
4920 	struct sigmatel_spec *spec;
4921 	int err;
4922 
4923 	err = alloc_stac_spec(codec);
4924 	if (err < 0)
4925 		return err;
4926 
4927 	spec = codec->spec;
4928 	spec->linear_tone_beep = 1;
4929 	spec->gen.own_eapd_ctl = 1;
4930 	spec->have_spdif_mux = 1;
4931 
4932 	spec->gen.beep_nid = 0x23; /* digital beep */
4933 
4934 	snd_hda_add_verbs(codec, stac9205_core_init);
4935 	spec->aloopback_ctl = &stac9205_loopback;
4936 
4937 	spec->aloopback_mask = 0x40;
4938 	spec->aloopback_shift = 0;
4939 
4940 	/* GPIO0 High = EAPD */
4941 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4942 	spec->gpio_data = 0x01;
4943 
4944 	/* Turn on/off EAPD per HP plugging */
4945 	spec->eapd_switch = 1;
4946 
4947 	snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4948 			   stac9205_fixups);
4949 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4950 
4951 	err = stac_parse_auto_config(codec);
4952 	if (err < 0) {
4953 		stac_free(codec);
4954 		return err;
4955 	}
4956 
4957 	codec->proc_widget_hook = stac9205_proc_hook;
4958 
4959 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4960 
4961 	return 0;
4962 }
4963 
4964 /*
4965  * STAC9872 hack
4966  */
4967 
4968 static const struct hda_verb stac9872_core_init[] = {
4969 	{0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4970 	{0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4971 	{}
4972 };
4973 
4974 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4975 	{ 0x0a, 0x03211020 },
4976 	{ 0x0b, 0x411111f0 },
4977 	{ 0x0c, 0x411111f0 },
4978 	{ 0x0d, 0x03a15030 },
4979 	{ 0x0e, 0x411111f0 },
4980 	{ 0x0f, 0x90170110 },
4981 	{ 0x11, 0x411111f0 },
4982 	{ 0x13, 0x411111f0 },
4983 	{ 0x14, 0x90a7013e },
4984 	{}
4985 };
4986 
4987 static const struct hda_model_fixup stac9872_models[] = {
4988 	{ .id = STAC_9872_VAIO, .name = "vaio" },
4989 	{}
4990 };
4991 
4992 static const struct hda_fixup stac9872_fixups[] = {
4993 	[STAC_9872_VAIO] = {
4994 		.type = HDA_FIXUP_PINS,
4995 		.v.pins = stac9872_vaio_pin_configs,
4996 	},
4997 };
4998 
4999 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
5000 	SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5001 			   "Sony VAIO F/S", STAC_9872_VAIO),
5002 	{} /* terminator */
5003 };
5004 
5005 static int patch_stac9872(struct hda_codec *codec)
5006 {
5007 	struct sigmatel_spec *spec;
5008 	int err;
5009 
5010 	err = alloc_stac_spec(codec);
5011 	if (err < 0)
5012 		return err;
5013 
5014 	spec = codec->spec;
5015 	spec->linear_tone_beep = 1;
5016 	spec->gen.own_eapd_ctl = 1;
5017 
5018 	snd_hda_add_verbs(codec, stac9872_core_init);
5019 
5020 	snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5021 			   stac9872_fixups);
5022 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5023 
5024 	err = stac_parse_auto_config(codec);
5025 	if (err < 0) {
5026 		stac_free(codec);
5027 		return -EINVAL;
5028 	}
5029 
5030 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5031 
5032 	return 0;
5033 }
5034 
5035 
5036 /*
5037  * patch entries
5038  */
5039 static const struct hda_device_id snd_hda_id_sigmatel[] = {
5040 	HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5041 	HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5042 	HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5043 	HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5044 	HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5045 	HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5046 	HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5047 	HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5048 	HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
5049 	HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
5050 	HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5051 	HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5052 	HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5053 	HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5054 	HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5055 	HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5056 	HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5057 	HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5058 	HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5059 	HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5060 	HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5061 	HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5062 	HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5063 	HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5064 	HDA_CODEC_ENTRY(0x83847632, "STAC9202",  patch_stac925x),
5065 	HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5066 	HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5067 	HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5068 	HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5069 	HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5070 	HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5071 	HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5072 	/* The following does not take into account .id=0x83847661 when subsys =
5073 	 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5074 	 * currently not fully supported.
5075 	 */
5076 	HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5077 	HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5078 	HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5079 	HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5080 	HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5081 	HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5082 	HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5083 	HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5084 	HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5085 	HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5086 	HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5087 	HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5088 	HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5089 	HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5090 	HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5091 	HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5092 	HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5093 	HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5094 	HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5095 	HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5096 	HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5097 	HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5098 	HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5099 	HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5100 	HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5101 	HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5102 	HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5103 	HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5104 	HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5105 	HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5106 	HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5107 	HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5108 	HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5109 	HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5110 	HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5111 	HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5112 	HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5113 	HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5114 	HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5115 	HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5116 	HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5117 	HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5118 	HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5119 	HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5120 	HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5121 	HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5122 	HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5123 	HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5124 	HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5125 	HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5126 	HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5127 	HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5128 	HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5129 	HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5130 	HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5131 	HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5132 	HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5133 	HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5134 	HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5135 	HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5136 	HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5137 	HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5138 	HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5139 	HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5140 	HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5141 	HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5142 	HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5143 	HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
5144 	{} /* terminator */
5145 };
5146 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
5147 
5148 MODULE_LICENSE("GPL");
5149 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5150 
5151 static struct hda_codec_driver sigmatel_driver = {
5152 	.id = snd_hda_id_sigmatel,
5153 };
5154 
5155 module_hda_codec_driver(sigmatel_driver);
5156