1 /* 2 * Universal Interface for Intel High Definition Audio Codec 3 * 4 * HD audio interface patch for SigmaTel STAC92xx 5 * 6 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 7 * Matt Porter <mporter@embeddedalley.com> 8 * 9 * Based on patch_cmedia.c and patch_realtek.c 10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 11 * 12 * This driver is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This driver is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/init.h> 28 #include <linux/delay.h> 29 #include <linux/slab.h> 30 #include <linux/pci.h> 31 #include <linux/dmi.h> 32 #include <linux/module.h> 33 #include <sound/core.h> 34 #include <sound/jack.h> 35 #include "hda_codec.h" 36 #include "hda_local.h" 37 #include "hda_auto_parser.h" 38 #include "hda_beep.h" 39 #include "hda_jack.h" 40 #include "hda_generic.h" 41 42 enum { 43 STAC_REF, 44 STAC_9200_OQO, 45 STAC_9200_DELL_D21, 46 STAC_9200_DELL_D22, 47 STAC_9200_DELL_D23, 48 STAC_9200_DELL_M21, 49 STAC_9200_DELL_M22, 50 STAC_9200_DELL_M23, 51 STAC_9200_DELL_M24, 52 STAC_9200_DELL_M25, 53 STAC_9200_DELL_M26, 54 STAC_9200_DELL_M27, 55 STAC_9200_M4, 56 STAC_9200_M4_2, 57 STAC_9200_PANASONIC, 58 STAC_9200_EAPD_INIT, 59 STAC_9200_MODELS 60 }; 61 62 enum { 63 STAC_9205_REF, 64 STAC_9205_DELL_M42, 65 STAC_9205_DELL_M43, 66 STAC_9205_DELL_M44, 67 STAC_9205_EAPD, 68 STAC_9205_MODELS 69 }; 70 71 enum { 72 STAC_92HD73XX_NO_JD, /* no jack-detection */ 73 STAC_92HD73XX_REF, 74 STAC_92HD73XX_INTEL, 75 STAC_DELL_M6_AMIC, 76 STAC_DELL_M6_DMIC, 77 STAC_DELL_M6_BOTH, 78 STAC_DELL_EQ, 79 STAC_ALIENWARE_M17X, 80 STAC_92HD89XX_HP_FRONT_JACK, 81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK, 82 STAC_92HD73XX_MODELS 83 }; 84 85 enum { 86 STAC_92HD83XXX_REF, 87 STAC_92HD83XXX_PWR_REF, 88 STAC_DELL_S14, 89 STAC_DELL_VOSTRO_3500, 90 STAC_92HD83XXX_HP_cNB11_INTQUAD, 91 STAC_HP_DV7_4000, 92 STAC_HP_ZEPHYR, 93 STAC_92HD83XXX_HP_LED, 94 STAC_92HD83XXX_HP_INV_LED, 95 STAC_92HD83XXX_HP_MIC_LED, 96 STAC_HP_LED_GPIO10, 97 STAC_92HD83XXX_HEADSET_JACK, 98 STAC_92HD83XXX_HP, 99 STAC_HP_ENVY_BASS, 100 STAC_HP_BNB13_EQ, 101 STAC_HP_ENVY_TS_BASS, 102 STAC_92HD83XXX_GPIO10_EAPD, 103 STAC_92HD83XXX_MODELS 104 }; 105 106 enum { 107 STAC_92HD71BXX_REF, 108 STAC_DELL_M4_1, 109 STAC_DELL_M4_2, 110 STAC_DELL_M4_3, 111 STAC_HP_M4, 112 STAC_HP_DV4, 113 STAC_HP_DV5, 114 STAC_HP_HDX, 115 STAC_92HD71BXX_HP, 116 STAC_92HD71BXX_NO_DMIC, 117 STAC_92HD71BXX_NO_SMUX, 118 STAC_92HD71BXX_MODELS 119 }; 120 121 enum { 122 STAC_92HD95_HP_LED, 123 STAC_92HD95_HP_BASS, 124 STAC_92HD95_MODELS 125 }; 126 127 enum { 128 STAC_925x_REF, 129 STAC_M1, 130 STAC_M1_2, 131 STAC_M2, 132 STAC_M2_2, 133 STAC_M3, 134 STAC_M5, 135 STAC_M6, 136 STAC_925x_MODELS 137 }; 138 139 enum { 140 STAC_D945_REF, 141 STAC_D945GTP3, 142 STAC_D945GTP5, 143 STAC_INTEL_MAC_V1, 144 STAC_INTEL_MAC_V2, 145 STAC_INTEL_MAC_V3, 146 STAC_INTEL_MAC_V4, 147 STAC_INTEL_MAC_V5, 148 STAC_INTEL_MAC_AUTO, 149 STAC_ECS_202, 150 STAC_922X_DELL_D81, 151 STAC_922X_DELL_D82, 152 STAC_922X_DELL_M81, 153 STAC_922X_DELL_M82, 154 STAC_922X_INTEL_MAC_GPIO, 155 STAC_922X_MODELS 156 }; 157 158 enum { 159 STAC_D965_REF_NO_JD, /* no jack-detection */ 160 STAC_D965_REF, 161 STAC_D965_3ST, 162 STAC_D965_5ST, 163 STAC_D965_5ST_NO_FP, 164 STAC_D965_VERBS, 165 STAC_DELL_3ST, 166 STAC_DELL_BIOS, 167 STAC_DELL_BIOS_AMIC, 168 STAC_DELL_BIOS_SPDIF, 169 STAC_927X_DELL_DMIC, 170 STAC_927X_VOLKNOB, 171 STAC_927X_MODELS 172 }; 173 174 enum { 175 STAC_9872_VAIO, 176 STAC_9872_MODELS 177 }; 178 179 struct sigmatel_spec { 180 struct hda_gen_spec gen; 181 182 unsigned int eapd_switch: 1; 183 unsigned int linear_tone_beep:1; 184 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 185 unsigned int volknob_init:1; /* special volume-knob initialization */ 186 unsigned int powerdown_adcs:1; 187 unsigned int have_spdif_mux:1; 188 189 /* gpio lines */ 190 unsigned int eapd_mask; 191 unsigned int gpio_mask; 192 unsigned int gpio_dir; 193 unsigned int gpio_data; 194 unsigned int gpio_mute; 195 unsigned int gpio_led; 196 unsigned int gpio_led_polarity; 197 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 198 unsigned int vref_led; 199 int default_polarity; 200 201 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 202 unsigned int mic_enabled; /* current mic mute state (bitmask) */ 203 204 /* stream */ 205 unsigned int stream_delay; 206 207 /* analog loopback */ 208 const struct snd_kcontrol_new *aloopback_ctl; 209 unsigned int aloopback; 210 unsigned char aloopback_mask; 211 unsigned char aloopback_shift; 212 213 /* power management */ 214 unsigned int power_map_bits; 215 unsigned int num_pwrs; 216 const hda_nid_t *pwr_nids; 217 unsigned int active_adcs; 218 219 /* beep widgets */ 220 hda_nid_t anabeep_nid; 221 222 /* SPDIF-out mux */ 223 const char * const *spdif_labels; 224 struct hda_input_mux spdif_mux; 225 unsigned int cur_smux[2]; 226 }; 227 228 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec 229 #define AC_VERB_IDT_GET_POWER_MAP 0xfec 230 231 static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 232 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 233 0x0f, 0x10, 0x11 234 }; 235 236 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 237 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 238 0x0f, 0x10 239 }; 240 241 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 242 0x0a, 0x0d, 0x0f 243 }; 244 245 246 /* 247 * PCM hooks 248 */ 249 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 250 struct hda_codec *codec, 251 struct snd_pcm_substream *substream, 252 int action) 253 { 254 struct sigmatel_spec *spec = codec->spec; 255 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 256 msleep(spec->stream_delay); 257 } 258 259 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 260 struct hda_codec *codec, 261 struct snd_pcm_substream *substream, 262 int action) 263 { 264 struct sigmatel_spec *spec = codec->spec; 265 int i, idx = 0; 266 267 if (!spec->powerdown_adcs) 268 return; 269 270 for (i = 0; i < spec->gen.num_all_adcs; i++) { 271 if (spec->gen.all_adcs[i] == hinfo->nid) { 272 idx = i; 273 break; 274 } 275 } 276 277 switch (action) { 278 case HDA_GEN_PCM_ACT_OPEN: 279 msleep(40); 280 snd_hda_codec_write(codec, hinfo->nid, 0, 281 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 282 spec->active_adcs |= (1 << idx); 283 break; 284 case HDA_GEN_PCM_ACT_CLOSE: 285 snd_hda_codec_write(codec, hinfo->nid, 0, 286 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 287 spec->active_adcs &= ~(1 << idx); 288 break; 289 } 290 } 291 292 /* 293 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 294 * funky external mute control using GPIO pins. 295 */ 296 297 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 298 unsigned int dir_mask, unsigned int data) 299 { 300 unsigned int gpiostate, gpiomask, gpiodir; 301 302 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 303 304 gpiostate = snd_hda_codec_read(codec, codec->afg, 0, 305 AC_VERB_GET_GPIO_DATA, 0); 306 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 307 308 gpiomask = snd_hda_codec_read(codec, codec->afg, 0, 309 AC_VERB_GET_GPIO_MASK, 0); 310 gpiomask |= mask; 311 312 gpiodir = snd_hda_codec_read(codec, codec->afg, 0, 313 AC_VERB_GET_GPIO_DIRECTION, 0); 314 gpiodir |= dir_mask; 315 316 /* Configure GPIOx as CMOS */ 317 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); 318 319 snd_hda_codec_write(codec, codec->afg, 0, 320 AC_VERB_SET_GPIO_MASK, gpiomask); 321 snd_hda_codec_read(codec, codec->afg, 0, 322 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 323 324 msleep(1); 325 326 snd_hda_codec_read(codec, codec->afg, 0, 327 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 328 } 329 330 /* hook for controlling mic-mute LED GPIO */ 331 static void stac_capture_led_hook(struct hda_codec *codec, 332 struct snd_kcontrol *kcontrol, 333 struct snd_ctl_elem_value *ucontrol) 334 { 335 struct sigmatel_spec *spec = codec->spec; 336 unsigned int mask; 337 bool cur_mute, prev_mute; 338 339 if (!kcontrol || !ucontrol) 340 return; 341 342 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 343 prev_mute = !spec->mic_enabled; 344 if (ucontrol->value.integer.value[0] || 345 ucontrol->value.integer.value[1]) 346 spec->mic_enabled |= mask; 347 else 348 spec->mic_enabled &= ~mask; 349 cur_mute = !spec->mic_enabled; 350 if (cur_mute != prev_mute) { 351 if (cur_mute) 352 spec->gpio_data |= spec->mic_mute_led_gpio; 353 else 354 spec->gpio_data &= ~spec->mic_mute_led_gpio; 355 stac_gpio_set(codec, spec->gpio_mask, 356 spec->gpio_dir, spec->gpio_data); 357 } 358 } 359 360 static int stac_vrefout_set(struct hda_codec *codec, 361 hda_nid_t nid, unsigned int new_vref) 362 { 363 int error, pinctl; 364 365 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref); 366 pinctl = snd_hda_codec_read(codec, nid, 0, 367 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 368 369 if (pinctl < 0) 370 return pinctl; 371 372 pinctl &= 0xff; 373 pinctl &= ~AC_PINCTL_VREFEN; 374 pinctl |= (new_vref & AC_PINCTL_VREFEN); 375 376 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 377 if (error < 0) 378 return error; 379 380 return 1; 381 } 382 383 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ 384 /* this hook is set in stac_setup_gpio() */ 385 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, 386 hda_nid_t nid, 387 unsigned int power_state) 388 { 389 if (nid == codec->afg && power_state == AC_PWRST_D3) 390 return AC_PWRST_D1; 391 return snd_hda_gen_path_power_filter(codec, nid, power_state); 392 } 393 394 /* update mute-LED accoring to the master switch */ 395 static void stac_update_led_status(struct hda_codec *codec, int enabled) 396 { 397 struct sigmatel_spec *spec = codec->spec; 398 int muted = !enabled; 399 400 if (!spec->gpio_led) 401 return; 402 403 /* LED state is inverted on these systems */ 404 if (spec->gpio_led_polarity) 405 muted = !muted; 406 407 if (!spec->vref_mute_led_nid) { 408 if (muted) 409 spec->gpio_data |= spec->gpio_led; 410 else 411 spec->gpio_data &= ~spec->gpio_led; 412 stac_gpio_set(codec, spec->gpio_mask, 413 spec->gpio_dir, spec->gpio_data); 414 } else { 415 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 416 stac_vrefout_set(codec, spec->vref_mute_led_nid, 417 spec->vref_led); 418 } 419 } 420 421 /* vmaster hook to update mute LED */ 422 static void stac_vmaster_hook(void *private_data, int val) 423 { 424 stac_update_led_status(private_data, val); 425 } 426 427 /* automute hook to handle GPIO mute and EAPD updates */ 428 static void stac_update_outputs(struct hda_codec *codec) 429 { 430 struct sigmatel_spec *spec = codec->spec; 431 432 if (spec->gpio_mute) 433 spec->gen.master_mute = 434 !(snd_hda_codec_read(codec, codec->afg, 0, 435 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 436 437 snd_hda_gen_update_outputs(codec); 438 439 if (spec->eapd_mask && spec->eapd_switch) { 440 unsigned int val = spec->gpio_data; 441 if (spec->gen.speaker_muted) 442 val &= ~spec->eapd_mask; 443 else 444 val |= spec->eapd_mask; 445 if (spec->gpio_data != val) { 446 spec->gpio_data = val; 447 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 448 val); 449 } 450 } 451 } 452 453 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 454 bool enable, bool do_write) 455 { 456 struct sigmatel_spec *spec = codec->spec; 457 unsigned int idx, val; 458 459 for (idx = 0; idx < spec->num_pwrs; idx++) { 460 if (spec->pwr_nids[idx] == nid) 461 break; 462 } 463 if (idx >= spec->num_pwrs) 464 return; 465 466 idx = 1 << idx; 467 468 val = spec->power_map_bits; 469 if (enable) 470 val &= ~idx; 471 else 472 val |= idx; 473 474 /* power down unused output ports */ 475 if (val != spec->power_map_bits) { 476 spec->power_map_bits = val; 477 if (do_write) 478 snd_hda_codec_write(codec, codec->afg, 0, 479 AC_VERB_IDT_SET_POWER_MAP, val); 480 } 481 } 482 483 /* update power bit per jack plug/unplug */ 484 static void jack_update_power(struct hda_codec *codec, 485 struct hda_jack_callback *jack) 486 { 487 struct sigmatel_spec *spec = codec->spec; 488 int i; 489 490 if (!spec->num_pwrs) 491 return; 492 493 if (jack && jack->tbl->nid) { 494 stac_toggle_power_map(codec, jack->tbl->nid, 495 snd_hda_jack_detect(codec, jack->tbl->nid), 496 true); 497 return; 498 } 499 500 /* update all jacks */ 501 for (i = 0; i < spec->num_pwrs; i++) { 502 hda_nid_t nid = spec->pwr_nids[i]; 503 if (!snd_hda_jack_tbl_get(codec, nid)) 504 continue; 505 stac_toggle_power_map(codec, nid, 506 snd_hda_jack_detect(codec, nid), 507 false); 508 } 509 510 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP, 511 spec->power_map_bits); 512 } 513 514 static void stac_vref_event(struct hda_codec *codec, 515 struct hda_jack_callback *event) 516 { 517 unsigned int data; 518 519 data = snd_hda_codec_read(codec, codec->afg, 0, 520 AC_VERB_GET_GPIO_DATA, 0); 521 /* toggle VREF state based on GPIOx status */ 522 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0, 523 !!(data & (1 << event->private_data))); 524 } 525 526 /* initialize the power map and enable the power event to jacks that 527 * haven't been assigned to automute 528 */ 529 static void stac_init_power_map(struct hda_codec *codec) 530 { 531 struct sigmatel_spec *spec = codec->spec; 532 int i; 533 534 for (i = 0; i < spec->num_pwrs; i++) { 535 hda_nid_t nid = spec->pwr_nids[i]; 536 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 537 def_conf = get_defcfg_connect(def_conf); 538 if (def_conf == AC_JACK_PORT_COMPLEX && 539 spec->vref_mute_led_nid != nid && 540 is_jack_detectable(codec, nid)) { 541 snd_hda_jack_detect_enable_callback(codec, nid, 542 jack_update_power); 543 } else { 544 if (def_conf == AC_JACK_PORT_NONE) 545 stac_toggle_power_map(codec, nid, false, false); 546 else 547 stac_toggle_power_map(codec, nid, true, false); 548 } 549 } 550 } 551 552 /* 553 */ 554 555 static inline bool get_int_hint(struct hda_codec *codec, const char *key, 556 int *valp) 557 { 558 return !snd_hda_get_int_hint(codec, key, valp); 559 } 560 561 /* override some hints from the hwdep entry */ 562 static void stac_store_hints(struct hda_codec *codec) 563 { 564 struct sigmatel_spec *spec = codec->spec; 565 int val; 566 567 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 568 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 569 spec->gpio_mask; 570 } 571 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 572 spec->gpio_dir &= spec->gpio_mask; 573 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 574 spec->gpio_data &= spec->gpio_mask; 575 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 576 spec->eapd_mask &= spec->gpio_mask; 577 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 578 spec->gpio_mute &= spec->gpio_mask; 579 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 580 if (val >= 0) 581 spec->eapd_switch = val; 582 } 583 584 /* 585 * loopback controls 586 */ 587 588 #define stac_aloopback_info snd_ctl_boolean_mono_info 589 590 static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 591 struct snd_ctl_elem_value *ucontrol) 592 { 593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 594 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 595 struct sigmatel_spec *spec = codec->spec; 596 597 ucontrol->value.integer.value[0] = !!(spec->aloopback & 598 (spec->aloopback_mask << idx)); 599 return 0; 600 } 601 602 static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 603 struct snd_ctl_elem_value *ucontrol) 604 { 605 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 606 struct sigmatel_spec *spec = codec->spec; 607 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 608 unsigned int dac_mode; 609 unsigned int val, idx_val; 610 611 idx_val = spec->aloopback_mask << idx; 612 if (ucontrol->value.integer.value[0]) 613 val = spec->aloopback | idx_val; 614 else 615 val = spec->aloopback & ~idx_val; 616 if (spec->aloopback == val) 617 return 0; 618 619 spec->aloopback = val; 620 621 /* Only return the bits defined by the shift value of the 622 * first two bytes of the mask 623 */ 624 dac_mode = snd_hda_codec_read(codec, codec->afg, 0, 625 kcontrol->private_value & 0xFFFF, 0x0); 626 dac_mode >>= spec->aloopback_shift; 627 628 if (spec->aloopback & idx_val) { 629 snd_hda_power_up(codec); 630 dac_mode |= idx_val; 631 } else { 632 snd_hda_power_down(codec); 633 dac_mode &= ~idx_val; 634 } 635 636 snd_hda_codec_write_cache(codec, codec->afg, 0, 637 kcontrol->private_value >> 16, dac_mode); 638 639 return 1; 640 } 641 642 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 643 { \ 644 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 645 .name = "Analog Loopback", \ 646 .count = cnt, \ 647 .info = stac_aloopback_info, \ 648 .get = stac_aloopback_get, \ 649 .put = stac_aloopback_put, \ 650 .private_value = verb_read | (verb_write << 16), \ 651 } 652 653 /* 654 * Mute LED handling on HP laptops 655 */ 656 657 /* check whether it's a HP laptop with a docking port */ 658 static bool hp_bnb2011_with_dock(struct hda_codec *codec) 659 { 660 if (codec->vendor_id != 0x111d7605 && 661 codec->vendor_id != 0x111d76d1) 662 return false; 663 664 switch (codec->subsystem_id) { 665 case 0x103c1618: 666 case 0x103c1619: 667 case 0x103c161a: 668 case 0x103c161b: 669 case 0x103c161c: 670 case 0x103c161d: 671 case 0x103c161e: 672 case 0x103c161f: 673 674 case 0x103c162a: 675 case 0x103c162b: 676 677 case 0x103c1630: 678 case 0x103c1631: 679 680 case 0x103c1633: 681 case 0x103c1634: 682 case 0x103c1635: 683 684 case 0x103c3587: 685 case 0x103c3588: 686 case 0x103c3589: 687 case 0x103c358a: 688 689 case 0x103c3667: 690 case 0x103c3668: 691 case 0x103c3669: 692 693 return true; 694 } 695 return false; 696 } 697 698 static bool hp_blike_system(u32 subsystem_id) 699 { 700 switch (subsystem_id) { 701 case 0x103c1520: 702 case 0x103c1521: 703 case 0x103c1523: 704 case 0x103c1524: 705 case 0x103c1525: 706 case 0x103c1722: 707 case 0x103c1723: 708 case 0x103c1724: 709 case 0x103c1725: 710 case 0x103c1726: 711 case 0x103c1727: 712 case 0x103c1728: 713 case 0x103c1729: 714 case 0x103c172a: 715 case 0x103c172b: 716 case 0x103c307e: 717 case 0x103c307f: 718 case 0x103c3080: 719 case 0x103c3081: 720 case 0x103c7007: 721 case 0x103c7008: 722 return true; 723 } 724 return false; 725 } 726 727 static void set_hp_led_gpio(struct hda_codec *codec) 728 { 729 struct sigmatel_spec *spec = codec->spec; 730 unsigned int gpio; 731 732 if (spec->gpio_led) 733 return; 734 735 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP); 736 gpio &= AC_GPIO_IO_COUNT; 737 if (gpio > 3) 738 spec->gpio_led = 0x08; /* GPIO 3 */ 739 else 740 spec->gpio_led = 0x01; /* GPIO 0 */ 741 } 742 743 /* 744 * This method searches for the mute LED GPIO configuration 745 * provided as OEM string in SMBIOS. The format of that string 746 * is HP_Mute_LED_P_G or HP_Mute_LED_P 747 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 748 * that corresponds to the NOT muted state of the master volume 749 * and G is the index of the GPIO to use as the mute LED control (0..9) 750 * If _G portion is missing it is assigned based on the codec ID 751 * 752 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 753 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 754 * 755 * 756 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 757 * SMBIOS - at least the ones I have seen do not have them - which include 758 * my own system (HP Pavilion dv6-1110ax) and my cousin's 759 * HP Pavilion dv9500t CTO. 760 * Need more information on whether it is true across the entire series. 761 * -- kunal 762 */ 763 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 764 { 765 struct sigmatel_spec *spec = codec->spec; 766 const struct dmi_device *dev = NULL; 767 768 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 769 get_int_hint(codec, "gpio_led_polarity", 770 &spec->gpio_led_polarity); 771 return 1; 772 } 773 774 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 775 if (sscanf(dev->name, "HP_Mute_LED_%u_%x", 776 &spec->gpio_led_polarity, 777 &spec->gpio_led) == 2) { 778 unsigned int max_gpio; 779 max_gpio = snd_hda_param_read(codec, codec->afg, 780 AC_PAR_GPIO_CAP); 781 max_gpio &= AC_GPIO_IO_COUNT; 782 if (spec->gpio_led < max_gpio) 783 spec->gpio_led = 1 << spec->gpio_led; 784 else 785 spec->vref_mute_led_nid = spec->gpio_led; 786 return 1; 787 } 788 if (sscanf(dev->name, "HP_Mute_LED_%u", 789 &spec->gpio_led_polarity) == 1) { 790 set_hp_led_gpio(codec); 791 return 1; 792 } 793 /* BIOS bug: unfilled OEM string */ 794 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 795 set_hp_led_gpio(codec); 796 if (default_polarity >= 0) 797 spec->gpio_led_polarity = default_polarity; 798 else 799 spec->gpio_led_polarity = 1; 800 return 1; 801 } 802 } 803 804 /* 805 * Fallback case - if we don't find the DMI strings, 806 * we statically set the GPIO - if not a B-series system 807 * and default polarity is provided 808 */ 809 if (!hp_blike_system(codec->subsystem_id) && 810 (default_polarity == 0 || default_polarity == 1)) { 811 set_hp_led_gpio(codec); 812 spec->gpio_led_polarity = default_polarity; 813 return 1; 814 } 815 return 0; 816 } 817 818 /* check whether a built-in speaker is included in parsed pins */ 819 static bool has_builtin_speaker(struct hda_codec *codec) 820 { 821 struct sigmatel_spec *spec = codec->spec; 822 hda_nid_t *nid_pin; 823 int nids, i; 824 825 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 826 nid_pin = spec->gen.autocfg.line_out_pins; 827 nids = spec->gen.autocfg.line_outs; 828 } else { 829 nid_pin = spec->gen.autocfg.speaker_pins; 830 nids = spec->gen.autocfg.speaker_outs; 831 } 832 833 for (i = 0; i < nids; i++) { 834 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 835 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 836 return true; 837 } 838 return false; 839 } 840 841 /* 842 * PC beep controls 843 */ 844 845 /* create PC beep volume controls */ 846 static int stac_auto_create_beep_ctls(struct hda_codec *codec, 847 hda_nid_t nid) 848 { 849 struct sigmatel_spec *spec = codec->spec; 850 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 851 struct snd_kcontrol_new *knew; 852 static struct snd_kcontrol_new abeep_mute_ctl = 853 HDA_CODEC_MUTE(NULL, 0, 0, 0); 854 static struct snd_kcontrol_new dbeep_mute_ctl = 855 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 856 static struct snd_kcontrol_new beep_vol_ctl = 857 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 858 859 /* check for mute support for the the amp */ 860 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 861 const struct snd_kcontrol_new *temp; 862 if (spec->anabeep_nid == nid) 863 temp = &abeep_mute_ctl; 864 else 865 temp = &dbeep_mute_ctl; 866 knew = snd_hda_gen_add_kctl(&spec->gen, 867 "Beep Playback Switch", temp); 868 if (!knew) 869 return -ENOMEM; 870 knew->private_value = 871 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 872 } 873 874 /* check to see if there is volume support for the amp */ 875 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 876 knew = snd_hda_gen_add_kctl(&spec->gen, 877 "Beep Playback Volume", 878 &beep_vol_ctl); 879 if (!knew) 880 return -ENOMEM; 881 knew->private_value = 882 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 883 } 884 return 0; 885 } 886 887 #ifdef CONFIG_SND_HDA_INPUT_BEEP 888 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 889 890 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 891 struct snd_ctl_elem_value *ucontrol) 892 { 893 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 894 ucontrol->value.integer.value[0] = codec->beep->enabled; 895 return 0; 896 } 897 898 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 899 struct snd_ctl_elem_value *ucontrol) 900 { 901 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 902 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 903 } 904 905 static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 906 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 907 .name = "Beep Playback Switch", 908 .info = stac_dig_beep_switch_info, 909 .get = stac_dig_beep_switch_get, 910 .put = stac_dig_beep_switch_put, 911 }; 912 913 static int stac_beep_switch_ctl(struct hda_codec *codec) 914 { 915 struct sigmatel_spec *spec = codec->spec; 916 917 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 918 return -ENOMEM; 919 return 0; 920 } 921 #endif 922 923 /* 924 * SPDIF-out mux controls 925 */ 926 927 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 928 struct snd_ctl_elem_info *uinfo) 929 { 930 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 931 struct sigmatel_spec *spec = codec->spec; 932 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 933 } 934 935 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 936 struct snd_ctl_elem_value *ucontrol) 937 { 938 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 939 struct sigmatel_spec *spec = codec->spec; 940 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 941 942 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 943 return 0; 944 } 945 946 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 947 struct snd_ctl_elem_value *ucontrol) 948 { 949 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 950 struct sigmatel_spec *spec = codec->spec; 951 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 952 953 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 954 spec->gen.autocfg.dig_out_pins[smux_idx], 955 &spec->cur_smux[smux_idx]); 956 } 957 958 static struct snd_kcontrol_new stac_smux_mixer = { 959 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 960 .name = "IEC958 Playback Source", 961 /* count set later */ 962 .info = stac_smux_enum_info, 963 .get = stac_smux_enum_get, 964 .put = stac_smux_enum_put, 965 }; 966 967 static const char * const stac_spdif_labels[] = { 968 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 969 }; 970 971 static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 972 { 973 struct sigmatel_spec *spec = codec->spec; 974 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 975 const char * const *labels = spec->spdif_labels; 976 struct snd_kcontrol_new *kctl; 977 int i, num_cons; 978 979 if (cfg->dig_outs < 1) 980 return 0; 981 982 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 983 if (num_cons <= 1) 984 return 0; 985 986 if (!labels) 987 labels = stac_spdif_labels; 988 for (i = 0; i < num_cons; i++) { 989 if (snd_BUG_ON(!labels[i])) 990 return -EINVAL; 991 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL); 992 } 993 994 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 995 if (!kctl) 996 return -ENOMEM; 997 kctl->count = cfg->dig_outs; 998 999 return 0; 1000 } 1001 1002 /* 1003 */ 1004 1005 static const struct hda_verb stac9200_core_init[] = { 1006 /* set dac0mux for dac converter */ 1007 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1008 {} 1009 }; 1010 1011 static const struct hda_verb stac9200_eapd_init[] = { 1012 /* set dac0mux for dac converter */ 1013 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1014 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1015 {} 1016 }; 1017 1018 static const struct hda_verb dell_eq_core_init[] = { 1019 /* set master volume to max value without distortion 1020 * and direct control */ 1021 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 1022 {} 1023 }; 1024 1025 static const struct hda_verb stac92hd73xx_core_init[] = { 1026 /* set master volume and direct control */ 1027 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1028 {} 1029 }; 1030 1031 static const struct hda_verb stac92hd83xxx_core_init[] = { 1032 /* power state controls amps */ 1033 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1034 {} 1035 }; 1036 1037 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1038 { 0x22, 0x785, 0x43 }, 1039 { 0x22, 0x782, 0xe0 }, 1040 { 0x22, 0x795, 0x00 }, 1041 {} 1042 }; 1043 1044 static const struct hda_verb stac92hd71bxx_core_init[] = { 1045 /* set master volume and direct control */ 1046 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1047 {} 1048 }; 1049 1050 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = { 1051 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1052 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1053 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1054 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1055 {} 1056 }; 1057 1058 static const struct hda_verb stac925x_core_init[] = { 1059 /* set dac0mux for dac converter */ 1060 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1061 /* mute the master volume */ 1062 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1063 {} 1064 }; 1065 1066 static const struct hda_verb stac922x_core_init[] = { 1067 /* set master volume and direct control */ 1068 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1069 {} 1070 }; 1071 1072 static const struct hda_verb d965_core_init[] = { 1073 /* unmute node 0x1b */ 1074 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1075 /* select node 0x03 as DAC */ 1076 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1077 {} 1078 }; 1079 1080 static const struct hda_verb dell_3st_core_init[] = { 1081 /* don't set delta bit */ 1082 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1083 /* unmute node 0x1b */ 1084 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1085 /* select node 0x03 as DAC */ 1086 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1087 {} 1088 }; 1089 1090 static const struct hda_verb stac927x_core_init[] = { 1091 /* set master volume and direct control */ 1092 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1093 /* enable analog pc beep path */ 1094 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1095 {} 1096 }; 1097 1098 static const struct hda_verb stac927x_volknob_core_init[] = { 1099 /* don't set delta bit */ 1100 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1101 /* enable analog pc beep path */ 1102 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1103 {} 1104 }; 1105 1106 static const struct hda_verb stac9205_core_init[] = { 1107 /* set master volume and direct control */ 1108 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1109 /* enable analog pc beep path */ 1110 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1111 {} 1112 }; 1113 1114 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1115 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1116 1117 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1118 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1119 1120 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1121 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1122 1123 static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1124 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1125 1126 static const struct snd_kcontrol_new stac9205_loopback = 1127 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1128 1129 static const struct snd_kcontrol_new stac927x_loopback = 1130 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1131 1132 static const struct hda_pintbl ref9200_pin_configs[] = { 1133 { 0x08, 0x01c47010 }, 1134 { 0x09, 0x01447010 }, 1135 { 0x0d, 0x0221401f }, 1136 { 0x0e, 0x01114010 }, 1137 { 0x0f, 0x02a19020 }, 1138 { 0x10, 0x01a19021 }, 1139 { 0x11, 0x90100140 }, 1140 { 0x12, 0x01813122 }, 1141 {} 1142 }; 1143 1144 static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1145 { 0x08, 0x400000fe }, 1146 { 0x09, 0x404500f4 }, 1147 { 0x0d, 0x400100f0 }, 1148 { 0x0e, 0x90110010 }, 1149 { 0x0f, 0x400100f1 }, 1150 { 0x10, 0x02a1902e }, 1151 { 0x11, 0x500000f2 }, 1152 { 0x12, 0x500000f3 }, 1153 {} 1154 }; 1155 1156 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1157 { 0x08, 0x400000fe }, 1158 { 0x09, 0x404500f4 }, 1159 { 0x0d, 0x400100f0 }, 1160 { 0x0e, 0x90110010 }, 1161 { 0x0f, 0x400100f1 }, 1162 { 0x10, 0x02a1902e }, 1163 { 0x11, 0x500000f2 }, 1164 { 0x12, 0x500000f3 }, 1165 {} 1166 }; 1167 1168 /* 1169 STAC 9200 pin configs for 1170 102801A8 1171 102801DE 1172 102801E8 1173 */ 1174 static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1175 { 0x08, 0x400001f0 }, 1176 { 0x09, 0x400001f1 }, 1177 { 0x0d, 0x02214030 }, 1178 { 0x0e, 0x01014010 }, 1179 { 0x0f, 0x02a19020 }, 1180 { 0x10, 0x01a19021 }, 1181 { 0x11, 0x90100140 }, 1182 { 0x12, 0x01813122 }, 1183 {} 1184 }; 1185 1186 /* 1187 STAC 9200 pin configs for 1188 102801C0 1189 102801C1 1190 */ 1191 static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1192 { 0x08, 0x400001f0 }, 1193 { 0x09, 0x400001f1 }, 1194 { 0x0d, 0x0221401f }, 1195 { 0x0e, 0x01014010 }, 1196 { 0x0f, 0x01813020 }, 1197 { 0x10, 0x02a19021 }, 1198 { 0x11, 0x90100140 }, 1199 { 0x12, 0x400001f2 }, 1200 {} 1201 }; 1202 1203 /* 1204 STAC 9200 pin configs for 1205 102801C4 (Dell Dimension E310) 1206 102801C5 1207 102801C7 1208 102801D9 1209 102801DA 1210 102801E3 1211 */ 1212 static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1213 { 0x08, 0x400001f0 }, 1214 { 0x09, 0x400001f1 }, 1215 { 0x0d, 0x0221401f }, 1216 { 0x0e, 0x01014010 }, 1217 { 0x0f, 0x01813020 }, 1218 { 0x10, 0x01a19021 }, 1219 { 0x11, 0x90100140 }, 1220 { 0x12, 0x400001f2 }, 1221 {} 1222 }; 1223 1224 1225 /* 1226 STAC 9200-32 pin configs for 1227 102801B5 (Dell Inspiron 630m) 1228 102801D8 (Dell Inspiron 640m) 1229 */ 1230 static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1231 { 0x08, 0x40c003fa }, 1232 { 0x09, 0x03441340 }, 1233 { 0x0d, 0x0321121f }, 1234 { 0x0e, 0x90170310 }, 1235 { 0x0f, 0x408003fb }, 1236 { 0x10, 0x03a11020 }, 1237 { 0x11, 0x401003fc }, 1238 { 0x12, 0x403003fd }, 1239 {} 1240 }; 1241 1242 /* 1243 STAC 9200-32 pin configs for 1244 102801C2 (Dell Latitude D620) 1245 102801C8 1246 102801CC (Dell Latitude D820) 1247 102801D4 1248 102801D6 1249 */ 1250 static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1251 { 0x08, 0x40c003fa }, 1252 { 0x09, 0x0144131f }, 1253 { 0x0d, 0x0321121f }, 1254 { 0x0e, 0x90170310 }, 1255 { 0x0f, 0x90a70321 }, 1256 { 0x10, 0x03a11020 }, 1257 { 0x11, 0x401003fb }, 1258 { 0x12, 0x40f000fc }, 1259 {} 1260 }; 1261 1262 /* 1263 STAC 9200-32 pin configs for 1264 102801CE (Dell XPS M1710) 1265 102801CF (Dell Precision M90) 1266 */ 1267 static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1268 { 0x08, 0x40c003fa }, 1269 { 0x09, 0x01441340 }, 1270 { 0x0d, 0x0421421f }, 1271 { 0x0e, 0x90170310 }, 1272 { 0x0f, 0x408003fb }, 1273 { 0x10, 0x04a1102e }, 1274 { 0x11, 0x90170311 }, 1275 { 0x12, 0x403003fc }, 1276 {} 1277 }; 1278 1279 /* 1280 STAC 9200-32 pin configs for 1281 102801C9 1282 102801CA 1283 102801CB (Dell Latitude 120L) 1284 102801D3 1285 */ 1286 static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1287 { 0x08, 0x40c003fa }, 1288 { 0x09, 0x404003fb }, 1289 { 0x0d, 0x0321121f }, 1290 { 0x0e, 0x90170310 }, 1291 { 0x0f, 0x408003fc }, 1292 { 0x10, 0x03a11020 }, 1293 { 0x11, 0x401003fd }, 1294 { 0x12, 0x403003fe }, 1295 {} 1296 }; 1297 1298 /* 1299 STAC 9200-32 pin configs for 1300 102801BD (Dell Inspiron E1505n) 1301 102801EE 1302 102801EF 1303 */ 1304 static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1305 { 0x08, 0x40c003fa }, 1306 { 0x09, 0x01441340 }, 1307 { 0x0d, 0x0421121f }, 1308 { 0x0e, 0x90170310 }, 1309 { 0x0f, 0x408003fb }, 1310 { 0x10, 0x04a11020 }, 1311 { 0x11, 0x401003fc }, 1312 { 0x12, 0x403003fd }, 1313 {} 1314 }; 1315 1316 /* 1317 STAC 9200-32 pin configs for 1318 102801F5 (Dell Inspiron 1501) 1319 102801F6 1320 */ 1321 static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1322 { 0x08, 0x40c003fa }, 1323 { 0x09, 0x404003fb }, 1324 { 0x0d, 0x0421121f }, 1325 { 0x0e, 0x90170310 }, 1326 { 0x0f, 0x408003fc }, 1327 { 0x10, 0x04a11020 }, 1328 { 0x11, 0x401003fd }, 1329 { 0x12, 0x403003fe }, 1330 {} 1331 }; 1332 1333 /* 1334 STAC 9200-32 1335 102801CD (Dell Inspiron E1705/9400) 1336 */ 1337 static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1338 { 0x08, 0x40c003fa }, 1339 { 0x09, 0x01441340 }, 1340 { 0x0d, 0x0421121f }, 1341 { 0x0e, 0x90170310 }, 1342 { 0x0f, 0x90170310 }, 1343 { 0x10, 0x04a11020 }, 1344 { 0x11, 0x90170310 }, 1345 { 0x12, 0x40f003fc }, 1346 {} 1347 }; 1348 1349 static const struct hda_pintbl oqo9200_pin_configs[] = { 1350 { 0x08, 0x40c000f0 }, 1351 { 0x09, 0x404000f1 }, 1352 { 0x0d, 0x0221121f }, 1353 { 0x0e, 0x02211210 }, 1354 { 0x0f, 0x90170111 }, 1355 { 0x10, 0x90a70120 }, 1356 { 0x11, 0x400000f2 }, 1357 { 0x12, 0x400000f3 }, 1358 {} 1359 }; 1360 1361 1362 static void stac9200_fixup_panasonic(struct hda_codec *codec, 1363 const struct hda_fixup *fix, int action) 1364 { 1365 struct sigmatel_spec *spec = codec->spec; 1366 1367 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1368 spec->gpio_mask = spec->gpio_dir = 0x09; 1369 spec->gpio_data = 0x00; 1370 /* CF-74 has no headphone detection, and the driver should *NOT* 1371 * do detection and HP/speaker toggle because the hardware does it. 1372 */ 1373 spec->gen.suppress_auto_mute = 1; 1374 } 1375 } 1376 1377 1378 static const struct hda_fixup stac9200_fixups[] = { 1379 [STAC_REF] = { 1380 .type = HDA_FIXUP_PINS, 1381 .v.pins = ref9200_pin_configs, 1382 }, 1383 [STAC_9200_OQO] = { 1384 .type = HDA_FIXUP_PINS, 1385 .v.pins = oqo9200_pin_configs, 1386 .chained = true, 1387 .chain_id = STAC_9200_EAPD_INIT, 1388 }, 1389 [STAC_9200_DELL_D21] = { 1390 .type = HDA_FIXUP_PINS, 1391 .v.pins = dell9200_d21_pin_configs, 1392 }, 1393 [STAC_9200_DELL_D22] = { 1394 .type = HDA_FIXUP_PINS, 1395 .v.pins = dell9200_d22_pin_configs, 1396 }, 1397 [STAC_9200_DELL_D23] = { 1398 .type = HDA_FIXUP_PINS, 1399 .v.pins = dell9200_d23_pin_configs, 1400 }, 1401 [STAC_9200_DELL_M21] = { 1402 .type = HDA_FIXUP_PINS, 1403 .v.pins = dell9200_m21_pin_configs, 1404 }, 1405 [STAC_9200_DELL_M22] = { 1406 .type = HDA_FIXUP_PINS, 1407 .v.pins = dell9200_m22_pin_configs, 1408 }, 1409 [STAC_9200_DELL_M23] = { 1410 .type = HDA_FIXUP_PINS, 1411 .v.pins = dell9200_m23_pin_configs, 1412 }, 1413 [STAC_9200_DELL_M24] = { 1414 .type = HDA_FIXUP_PINS, 1415 .v.pins = dell9200_m24_pin_configs, 1416 }, 1417 [STAC_9200_DELL_M25] = { 1418 .type = HDA_FIXUP_PINS, 1419 .v.pins = dell9200_m25_pin_configs, 1420 }, 1421 [STAC_9200_DELL_M26] = { 1422 .type = HDA_FIXUP_PINS, 1423 .v.pins = dell9200_m26_pin_configs, 1424 }, 1425 [STAC_9200_DELL_M27] = { 1426 .type = HDA_FIXUP_PINS, 1427 .v.pins = dell9200_m27_pin_configs, 1428 }, 1429 [STAC_9200_M4] = { 1430 .type = HDA_FIXUP_PINS, 1431 .v.pins = gateway9200_m4_pin_configs, 1432 .chained = true, 1433 .chain_id = STAC_9200_EAPD_INIT, 1434 }, 1435 [STAC_9200_M4_2] = { 1436 .type = HDA_FIXUP_PINS, 1437 .v.pins = gateway9200_m4_2_pin_configs, 1438 .chained = true, 1439 .chain_id = STAC_9200_EAPD_INIT, 1440 }, 1441 [STAC_9200_PANASONIC] = { 1442 .type = HDA_FIXUP_FUNC, 1443 .v.func = stac9200_fixup_panasonic, 1444 }, 1445 [STAC_9200_EAPD_INIT] = { 1446 .type = HDA_FIXUP_VERBS, 1447 .v.verbs = (const struct hda_verb[]) { 1448 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1449 {} 1450 }, 1451 }, 1452 }; 1453 1454 static const struct hda_model_fixup stac9200_models[] = { 1455 { .id = STAC_REF, .name = "ref" }, 1456 { .id = STAC_9200_OQO, .name = "oqo" }, 1457 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1458 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1459 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1460 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1461 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1462 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1463 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1464 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1465 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1466 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1467 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1468 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1469 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1470 {} 1471 }; 1472 1473 static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1474 /* SigmaTel reference board */ 1475 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1476 "DFI LanParty", STAC_REF), 1477 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1478 "DFI LanParty", STAC_REF), 1479 /* Dell laptops have BIOS problem */ 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1481 "unknown Dell", STAC_9200_DELL_D21), 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1483 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1485 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1487 "unknown Dell", STAC_9200_DELL_D22), 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1489 "unknown Dell", STAC_9200_DELL_D22), 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1491 "Dell Latitude D620", STAC_9200_DELL_M22), 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1493 "unknown Dell", STAC_9200_DELL_D23), 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1495 "unknown Dell", STAC_9200_DELL_D23), 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1497 "unknown Dell", STAC_9200_DELL_M22), 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1499 "unknown Dell", STAC_9200_DELL_M24), 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1501 "unknown Dell", STAC_9200_DELL_M24), 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1503 "Dell Latitude 120L", STAC_9200_DELL_M24), 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1505 "Dell Latitude D820", STAC_9200_DELL_M22), 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1507 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1509 "Dell XPS M1710", STAC_9200_DELL_M23), 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1511 "Dell Precision M90", STAC_9200_DELL_M23), 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1513 "unknown Dell", STAC_9200_DELL_M22), 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1515 "unknown Dell", STAC_9200_DELL_M22), 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1517 "unknown Dell", STAC_9200_DELL_M22), 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1519 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1521 "unknown Dell", STAC_9200_DELL_D23), 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1523 "unknown Dell", STAC_9200_DELL_D23), 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1525 "unknown Dell", STAC_9200_DELL_D21), 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1527 "unknown Dell", STAC_9200_DELL_D23), 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1529 "unknown Dell", STAC_9200_DELL_D21), 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1531 "unknown Dell", STAC_9200_DELL_M25), 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1533 "unknown Dell", STAC_9200_DELL_M25), 1534 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1535 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1536 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1537 "unknown Dell", STAC_9200_DELL_M26), 1538 /* Panasonic */ 1539 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1540 /* Gateway machines needs EAPD to be set on resume */ 1541 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1542 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1543 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1544 /* OQO Mobile */ 1545 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1546 {} /* terminator */ 1547 }; 1548 1549 static const struct hda_pintbl ref925x_pin_configs[] = { 1550 { 0x07, 0x40c003f0 }, 1551 { 0x08, 0x424503f2 }, 1552 { 0x0a, 0x01813022 }, 1553 { 0x0b, 0x02a19021 }, 1554 { 0x0c, 0x90a70320 }, 1555 { 0x0d, 0x02214210 }, 1556 { 0x10, 0x01019020 }, 1557 { 0x11, 0x9033032e }, 1558 {} 1559 }; 1560 1561 static const struct hda_pintbl stac925xM1_pin_configs[] = { 1562 { 0x07, 0x40c003f4 }, 1563 { 0x08, 0x424503f2 }, 1564 { 0x0a, 0x400000f3 }, 1565 { 0x0b, 0x02a19020 }, 1566 { 0x0c, 0x40a000f0 }, 1567 { 0x0d, 0x90100210 }, 1568 { 0x10, 0x400003f1 }, 1569 { 0x11, 0x9033032e }, 1570 {} 1571 }; 1572 1573 static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1574 { 0x07, 0x40c003f4 }, 1575 { 0x08, 0x424503f2 }, 1576 { 0x0a, 0x400000f3 }, 1577 { 0x0b, 0x02a19020 }, 1578 { 0x0c, 0x40a000f0 }, 1579 { 0x0d, 0x90100210 }, 1580 { 0x10, 0x400003f1 }, 1581 { 0x11, 0x9033032e }, 1582 {} 1583 }; 1584 1585 static const struct hda_pintbl stac925xM2_pin_configs[] = { 1586 { 0x07, 0x40c003f4 }, 1587 { 0x08, 0x424503f2 }, 1588 { 0x0a, 0x400000f3 }, 1589 { 0x0b, 0x02a19020 }, 1590 { 0x0c, 0x40a000f0 }, 1591 { 0x0d, 0x90100210 }, 1592 { 0x10, 0x400003f1 }, 1593 { 0x11, 0x9033032e }, 1594 {} 1595 }; 1596 1597 static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1598 { 0x07, 0x40c003f4 }, 1599 { 0x08, 0x424503f2 }, 1600 { 0x0a, 0x400000f3 }, 1601 { 0x0b, 0x02a19020 }, 1602 { 0x0c, 0x40a000f0 }, 1603 { 0x0d, 0x90100210 }, 1604 { 0x10, 0x400003f1 }, 1605 { 0x11, 0x9033032e }, 1606 {} 1607 }; 1608 1609 static const struct hda_pintbl stac925xM3_pin_configs[] = { 1610 { 0x07, 0x40c003f4 }, 1611 { 0x08, 0x424503f2 }, 1612 { 0x0a, 0x400000f3 }, 1613 { 0x0b, 0x02a19020 }, 1614 { 0x0c, 0x40a000f0 }, 1615 { 0x0d, 0x90100210 }, 1616 { 0x10, 0x400003f1 }, 1617 { 0x11, 0x503303f3 }, 1618 {} 1619 }; 1620 1621 static const struct hda_pintbl stac925xM5_pin_configs[] = { 1622 { 0x07, 0x40c003f4 }, 1623 { 0x08, 0x424503f2 }, 1624 { 0x0a, 0x400000f3 }, 1625 { 0x0b, 0x02a19020 }, 1626 { 0x0c, 0x40a000f0 }, 1627 { 0x0d, 0x90100210 }, 1628 { 0x10, 0x400003f1 }, 1629 { 0x11, 0x9033032e }, 1630 {} 1631 }; 1632 1633 static const struct hda_pintbl stac925xM6_pin_configs[] = { 1634 { 0x07, 0x40c003f4 }, 1635 { 0x08, 0x424503f2 }, 1636 { 0x0a, 0x400000f3 }, 1637 { 0x0b, 0x02a19020 }, 1638 { 0x0c, 0x40a000f0 }, 1639 { 0x0d, 0x90100210 }, 1640 { 0x10, 0x400003f1 }, 1641 { 0x11, 0x90330320 }, 1642 {} 1643 }; 1644 1645 static const struct hda_fixup stac925x_fixups[] = { 1646 [STAC_REF] = { 1647 .type = HDA_FIXUP_PINS, 1648 .v.pins = ref925x_pin_configs, 1649 }, 1650 [STAC_M1] = { 1651 .type = HDA_FIXUP_PINS, 1652 .v.pins = stac925xM1_pin_configs, 1653 }, 1654 [STAC_M1_2] = { 1655 .type = HDA_FIXUP_PINS, 1656 .v.pins = stac925xM1_2_pin_configs, 1657 }, 1658 [STAC_M2] = { 1659 .type = HDA_FIXUP_PINS, 1660 .v.pins = stac925xM2_pin_configs, 1661 }, 1662 [STAC_M2_2] = { 1663 .type = HDA_FIXUP_PINS, 1664 .v.pins = stac925xM2_2_pin_configs, 1665 }, 1666 [STAC_M3] = { 1667 .type = HDA_FIXUP_PINS, 1668 .v.pins = stac925xM3_pin_configs, 1669 }, 1670 [STAC_M5] = { 1671 .type = HDA_FIXUP_PINS, 1672 .v.pins = stac925xM5_pin_configs, 1673 }, 1674 [STAC_M6] = { 1675 .type = HDA_FIXUP_PINS, 1676 .v.pins = stac925xM6_pin_configs, 1677 }, 1678 }; 1679 1680 static const struct hda_model_fixup stac925x_models[] = { 1681 { .id = STAC_REF, .name = "ref" }, 1682 { .id = STAC_M1, .name = "m1" }, 1683 { .id = STAC_M1_2, .name = "m1-2" }, 1684 { .id = STAC_M2, .name = "m2" }, 1685 { .id = STAC_M2_2, .name = "m2-2" }, 1686 { .id = STAC_M3, .name = "m3" }, 1687 { .id = STAC_M5, .name = "m5" }, 1688 { .id = STAC_M6, .name = "m6" }, 1689 {} 1690 }; 1691 1692 static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1693 /* SigmaTel reference board */ 1694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1695 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1696 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1697 1698 /* Default table for unknown ID */ 1699 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1700 1701 /* gateway machines are checked via codec ssid */ 1702 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1703 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1704 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1705 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1706 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1707 /* Not sure about the brand name for those */ 1708 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1709 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1710 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1711 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1712 {} /* terminator */ 1713 }; 1714 1715 static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1716 { 0x0a, 0x02214030 }, 1717 { 0x0b, 0x02a19040 }, 1718 { 0x0c, 0x01a19020 }, 1719 { 0x0d, 0x02214030 }, 1720 { 0x0e, 0x0181302e }, 1721 { 0x0f, 0x01014010 }, 1722 { 0x10, 0x01014020 }, 1723 { 0x11, 0x01014030 }, 1724 { 0x12, 0x02319040 }, 1725 { 0x13, 0x90a000f0 }, 1726 { 0x14, 0x90a000f0 }, 1727 { 0x22, 0x01452050 }, 1728 { 0x23, 0x01452050 }, 1729 {} 1730 }; 1731 1732 static const struct hda_pintbl dell_m6_pin_configs[] = { 1733 { 0x0a, 0x0321101f }, 1734 { 0x0b, 0x4f00000f }, 1735 { 0x0c, 0x4f0000f0 }, 1736 { 0x0d, 0x90170110 }, 1737 { 0x0e, 0x03a11020 }, 1738 { 0x0f, 0x0321101f }, 1739 { 0x10, 0x4f0000f0 }, 1740 { 0x11, 0x4f0000f0 }, 1741 { 0x12, 0x4f0000f0 }, 1742 { 0x13, 0x90a60160 }, 1743 { 0x14, 0x4f0000f0 }, 1744 { 0x22, 0x4f0000f0 }, 1745 { 0x23, 0x4f0000f0 }, 1746 {} 1747 }; 1748 1749 static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1750 { 0x0a, 0x0321101f }, 1751 { 0x0b, 0x0321101f }, 1752 { 0x0c, 0x03a11020 }, 1753 { 0x0d, 0x03014020 }, 1754 { 0x0e, 0x90170110 }, 1755 { 0x0f, 0x4f0000f0 }, 1756 { 0x10, 0x4f0000f0 }, 1757 { 0x11, 0x4f0000f0 }, 1758 { 0x12, 0x4f0000f0 }, 1759 { 0x13, 0x90a60160 }, 1760 { 0x14, 0x4f0000f0 }, 1761 { 0x22, 0x4f0000f0 }, 1762 { 0x23, 0x904601b0 }, 1763 {} 1764 }; 1765 1766 static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1767 { 0x0a, 0x02214230 }, 1768 { 0x0b, 0x02A19240 }, 1769 { 0x0c, 0x01013214 }, 1770 { 0x0d, 0x01014210 }, 1771 { 0x0e, 0x01A19250 }, 1772 { 0x0f, 0x01011212 }, 1773 { 0x10, 0x01016211 }, 1774 {} 1775 }; 1776 1777 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = { 1778 { 0x0a, 0x02214030 }, 1779 { 0x0b, 0x02A19010 }, 1780 {} 1781 }; 1782 1783 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = { 1784 { 0x0e, 0x400000f0 }, 1785 {} 1786 }; 1787 1788 static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1789 const struct hda_fixup *fix, int action) 1790 { 1791 struct sigmatel_spec *spec = codec->spec; 1792 1793 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1794 return; 1795 1796 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1797 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1798 } 1799 1800 static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1801 { 1802 struct sigmatel_spec *spec = codec->spec; 1803 1804 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1805 spec->eapd_switch = 0; 1806 } 1807 1808 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1809 const struct hda_fixup *fix, int action) 1810 { 1811 struct sigmatel_spec *spec = codec->spec; 1812 1813 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1814 return; 1815 1816 stac92hd73xx_fixup_dell(codec); 1817 snd_hda_add_verbs(codec, dell_eq_core_init); 1818 spec->volknob_init = 1; 1819 } 1820 1821 /* Analog Mics */ 1822 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1823 const struct hda_fixup *fix, int action) 1824 { 1825 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1826 return; 1827 1828 stac92hd73xx_fixup_dell(codec); 1829 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1830 } 1831 1832 /* Digital Mics */ 1833 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1834 const struct hda_fixup *fix, int action) 1835 { 1836 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1837 return; 1838 1839 stac92hd73xx_fixup_dell(codec); 1840 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1841 } 1842 1843 /* Both */ 1844 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1845 const struct hda_fixup *fix, int action) 1846 { 1847 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1848 return; 1849 1850 stac92hd73xx_fixup_dell(codec); 1851 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1852 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1853 } 1854 1855 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1856 const struct hda_fixup *fix, int action) 1857 { 1858 struct sigmatel_spec *spec = codec->spec; 1859 1860 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1861 return; 1862 1863 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1864 spec->eapd_switch = 0; 1865 } 1866 1867 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1868 const struct hda_fixup *fix, int action) 1869 { 1870 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1871 codec->no_jack_detect = 1; 1872 } 1873 1874 static const struct hda_fixup stac92hd73xx_fixups[] = { 1875 [STAC_92HD73XX_REF] = { 1876 .type = HDA_FIXUP_FUNC, 1877 .v.func = stac92hd73xx_fixup_ref, 1878 }, 1879 [STAC_DELL_M6_AMIC] = { 1880 .type = HDA_FIXUP_FUNC, 1881 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1882 }, 1883 [STAC_DELL_M6_DMIC] = { 1884 .type = HDA_FIXUP_FUNC, 1885 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1886 }, 1887 [STAC_DELL_M6_BOTH] = { 1888 .type = HDA_FIXUP_FUNC, 1889 .v.func = stac92hd73xx_fixup_dell_m6_both, 1890 }, 1891 [STAC_DELL_EQ] = { 1892 .type = HDA_FIXUP_FUNC, 1893 .v.func = stac92hd73xx_fixup_dell_eq, 1894 }, 1895 [STAC_ALIENWARE_M17X] = { 1896 .type = HDA_FIXUP_FUNC, 1897 .v.func = stac92hd73xx_fixup_alienware_m17x, 1898 }, 1899 [STAC_92HD73XX_INTEL] = { 1900 .type = HDA_FIXUP_PINS, 1901 .v.pins = intel_dg45id_pin_configs, 1902 }, 1903 [STAC_92HD73XX_NO_JD] = { 1904 .type = HDA_FIXUP_FUNC, 1905 .v.func = stac92hd73xx_fixup_no_jd, 1906 }, 1907 [STAC_92HD89XX_HP_FRONT_JACK] = { 1908 .type = HDA_FIXUP_PINS, 1909 .v.pins = stac92hd89xx_hp_front_jack_pin_configs, 1910 }, 1911 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = { 1912 .type = HDA_FIXUP_PINS, 1913 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, 1914 } 1915 }; 1916 1917 static const struct hda_model_fixup stac92hd73xx_models[] = { 1918 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1919 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1920 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1921 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1922 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1923 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1924 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1925 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1926 {} 1927 }; 1928 1929 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1930 /* SigmaTel reference board */ 1931 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1932 "DFI LanParty", STAC_92HD73XX_REF), 1933 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1934 "DFI LanParty", STAC_92HD73XX_REF), 1935 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1936 "Intel DG45ID", STAC_92HD73XX_INTEL), 1937 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1938 "Intel DG45FC", STAC_92HD73XX_INTEL), 1939 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1940 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1941 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1942 "unknown Dell", STAC_DELL_M6_DMIC), 1943 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1944 "unknown Dell", STAC_DELL_M6_BOTH), 1945 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1946 "unknown Dell", STAC_DELL_M6_BOTH), 1947 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1948 "unknown Dell", STAC_DELL_M6_AMIC), 1949 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1950 "unknown Dell", STAC_DELL_M6_AMIC), 1951 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1952 "unknown Dell", STAC_DELL_M6_DMIC), 1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1954 "unknown Dell", STAC_DELL_M6_DMIC), 1955 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1956 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1957 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1958 "Dell Studio 17", STAC_DELL_M6_DMIC), 1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1960 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1962 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1964 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1966 "Dell Studio 1558", STAC_DELL_M6_DMIC), 1967 /* codec SSID matching */ 1968 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 1969 "Alienware M17x", STAC_ALIENWARE_M17X), 1970 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1971 "Alienware M17x", STAC_ALIENWARE_M17X), 1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 1973 "Alienware M17x R3", STAC_DELL_EQ), 1974 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927, 1975 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK), 1976 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 1977 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 1978 {} /* terminator */ 1979 }; 1980 1981 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 1982 { 0x0a, 0x02214030 }, 1983 { 0x0b, 0x02211010 }, 1984 { 0x0c, 0x02a19020 }, 1985 { 0x0d, 0x02170130 }, 1986 { 0x0e, 0x01014050 }, 1987 { 0x0f, 0x01819040 }, 1988 { 0x10, 0x01014020 }, 1989 { 0x11, 0x90a3014e }, 1990 { 0x1f, 0x01451160 }, 1991 { 0x20, 0x98560170 }, 1992 {} 1993 }; 1994 1995 static const struct hda_pintbl dell_s14_pin_configs[] = { 1996 { 0x0a, 0x0221403f }, 1997 { 0x0b, 0x0221101f }, 1998 { 0x0c, 0x02a19020 }, 1999 { 0x0d, 0x90170110 }, 2000 { 0x0e, 0x40f000f0 }, 2001 { 0x0f, 0x40f000f0 }, 2002 { 0x10, 0x40f000f0 }, 2003 { 0x11, 0x90a60160 }, 2004 { 0x1f, 0x40f000f0 }, 2005 { 0x20, 0x40f000f0 }, 2006 {} 2007 }; 2008 2009 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 2010 { 0x0a, 0x02a11020 }, 2011 { 0x0b, 0x0221101f }, 2012 { 0x0c, 0x400000f0 }, 2013 { 0x0d, 0x90170110 }, 2014 { 0x0e, 0x400000f1 }, 2015 { 0x0f, 0x400000f2 }, 2016 { 0x10, 0x400000f3 }, 2017 { 0x11, 0x90a60160 }, 2018 { 0x1f, 0x400000f4 }, 2019 { 0x20, 0x400000f5 }, 2020 {} 2021 }; 2022 2023 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2024 { 0x0a, 0x03a12050 }, 2025 { 0x0b, 0x0321201f }, 2026 { 0x0c, 0x40f000f0 }, 2027 { 0x0d, 0x90170110 }, 2028 { 0x0e, 0x40f000f0 }, 2029 { 0x0f, 0x40f000f0 }, 2030 { 0x10, 0x90170110 }, 2031 { 0x11, 0xd5a30140 }, 2032 { 0x1f, 0x40f000f0 }, 2033 { 0x20, 0x40f000f0 }, 2034 {} 2035 }; 2036 2037 static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2038 { 0x0a, 0x01813050 }, 2039 { 0x0b, 0x0421201f }, 2040 { 0x0c, 0x04a1205e }, 2041 { 0x0d, 0x96130310 }, 2042 { 0x0e, 0x96130310 }, 2043 { 0x0f, 0x0101401f }, 2044 { 0x10, 0x1111611f }, 2045 { 0x11, 0xd5a30130 }, 2046 {} 2047 }; 2048 2049 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2050 { 0x0a, 0x40f000f0 }, 2051 { 0x0b, 0x0221101f }, 2052 { 0x0c, 0x02a11020 }, 2053 { 0x0d, 0x92170110 }, 2054 { 0x0e, 0x40f000f0 }, 2055 { 0x0f, 0x92170110 }, 2056 { 0x10, 0x40f000f0 }, 2057 { 0x11, 0xd5a30130 }, 2058 { 0x1f, 0x40f000f0 }, 2059 { 0x20, 0x40f000f0 }, 2060 {} 2061 }; 2062 2063 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2064 const struct hda_fixup *fix, int action) 2065 { 2066 struct sigmatel_spec *spec = codec->spec; 2067 2068 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2069 return; 2070 2071 if (hp_bnb2011_with_dock(codec)) { 2072 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2073 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2074 } 2075 2076 if (find_mute_led_cfg(codec, spec->default_polarity)) 2077 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 2078 spec->gpio_led, 2079 spec->gpio_led_polarity); 2080 2081 /* allow auto-switching of dock line-in */ 2082 spec->gen.line_in_auto_switch = true; 2083 } 2084 2085 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2086 const struct hda_fixup *fix, int action) 2087 { 2088 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2089 return; 2090 2091 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2092 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2093 } 2094 2095 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2096 const struct hda_fixup *fix, int action) 2097 { 2098 struct sigmatel_spec *spec = codec->spec; 2099 2100 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2101 spec->default_polarity = 0; 2102 } 2103 2104 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2105 const struct hda_fixup *fix, int action) 2106 { 2107 struct sigmatel_spec *spec = codec->spec; 2108 2109 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2110 spec->default_polarity = 1; 2111 } 2112 2113 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2114 const struct hda_fixup *fix, int action) 2115 { 2116 struct sigmatel_spec *spec = codec->spec; 2117 2118 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2119 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2120 /* resetting controller clears GPIO, so we need to keep on */ 2121 codec->bus->power_keep_link_on = 1; 2122 } 2123 } 2124 2125 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec, 2126 const struct hda_fixup *fix, int action) 2127 { 2128 struct sigmatel_spec *spec = codec->spec; 2129 2130 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2131 spec->gpio_led = 0x10; /* GPIO4 */ 2132 spec->default_polarity = 0; 2133 } 2134 } 2135 2136 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2137 const struct hda_fixup *fix, int action) 2138 { 2139 struct sigmatel_spec *spec = codec->spec; 2140 2141 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2142 spec->headset_jack = 1; 2143 } 2144 2145 static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec, 2146 const struct hda_fixup *fix, 2147 int action) 2148 { 2149 struct sigmatel_spec *spec = codec->spec; 2150 2151 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2152 return; 2153 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 2154 spec->gpio_data = 0x10; 2155 spec->eapd_switch = 0; 2156 } 2157 2158 static const struct hda_verb hp_bnb13_eq_verbs[] = { 2159 /* 44.1KHz base */ 2160 { 0x22, 0x7A6, 0x3E }, 2161 { 0x22, 0x7A7, 0x68 }, 2162 { 0x22, 0x7A8, 0x17 }, 2163 { 0x22, 0x7A9, 0x3E }, 2164 { 0x22, 0x7AA, 0x68 }, 2165 { 0x22, 0x7AB, 0x17 }, 2166 { 0x22, 0x7AC, 0x00 }, 2167 { 0x22, 0x7AD, 0x80 }, 2168 { 0x22, 0x7A6, 0x83 }, 2169 { 0x22, 0x7A7, 0x2F }, 2170 { 0x22, 0x7A8, 0xD1 }, 2171 { 0x22, 0x7A9, 0x83 }, 2172 { 0x22, 0x7AA, 0x2F }, 2173 { 0x22, 0x7AB, 0xD1 }, 2174 { 0x22, 0x7AC, 0x01 }, 2175 { 0x22, 0x7AD, 0x80 }, 2176 { 0x22, 0x7A6, 0x3E }, 2177 { 0x22, 0x7A7, 0x68 }, 2178 { 0x22, 0x7A8, 0x17 }, 2179 { 0x22, 0x7A9, 0x3E }, 2180 { 0x22, 0x7AA, 0x68 }, 2181 { 0x22, 0x7AB, 0x17 }, 2182 { 0x22, 0x7AC, 0x02 }, 2183 { 0x22, 0x7AD, 0x80 }, 2184 { 0x22, 0x7A6, 0x7C }, 2185 { 0x22, 0x7A7, 0xC6 }, 2186 { 0x22, 0x7A8, 0x0C }, 2187 { 0x22, 0x7A9, 0x7C }, 2188 { 0x22, 0x7AA, 0xC6 }, 2189 { 0x22, 0x7AB, 0x0C }, 2190 { 0x22, 0x7AC, 0x03 }, 2191 { 0x22, 0x7AD, 0x80 }, 2192 { 0x22, 0x7A6, 0xC3 }, 2193 { 0x22, 0x7A7, 0x25 }, 2194 { 0x22, 0x7A8, 0xAF }, 2195 { 0x22, 0x7A9, 0xC3 }, 2196 { 0x22, 0x7AA, 0x25 }, 2197 { 0x22, 0x7AB, 0xAF }, 2198 { 0x22, 0x7AC, 0x04 }, 2199 { 0x22, 0x7AD, 0x80 }, 2200 { 0x22, 0x7A6, 0x3E }, 2201 { 0x22, 0x7A7, 0x85 }, 2202 { 0x22, 0x7A8, 0x73 }, 2203 { 0x22, 0x7A9, 0x3E }, 2204 { 0x22, 0x7AA, 0x85 }, 2205 { 0x22, 0x7AB, 0x73 }, 2206 { 0x22, 0x7AC, 0x05 }, 2207 { 0x22, 0x7AD, 0x80 }, 2208 { 0x22, 0x7A6, 0x85 }, 2209 { 0x22, 0x7A7, 0x39 }, 2210 { 0x22, 0x7A8, 0xC7 }, 2211 { 0x22, 0x7A9, 0x85 }, 2212 { 0x22, 0x7AA, 0x39 }, 2213 { 0x22, 0x7AB, 0xC7 }, 2214 { 0x22, 0x7AC, 0x06 }, 2215 { 0x22, 0x7AD, 0x80 }, 2216 { 0x22, 0x7A6, 0x3C }, 2217 { 0x22, 0x7A7, 0x90 }, 2218 { 0x22, 0x7A8, 0xB0 }, 2219 { 0x22, 0x7A9, 0x3C }, 2220 { 0x22, 0x7AA, 0x90 }, 2221 { 0x22, 0x7AB, 0xB0 }, 2222 { 0x22, 0x7AC, 0x07 }, 2223 { 0x22, 0x7AD, 0x80 }, 2224 { 0x22, 0x7A6, 0x7A }, 2225 { 0x22, 0x7A7, 0xC6 }, 2226 { 0x22, 0x7A8, 0x39 }, 2227 { 0x22, 0x7A9, 0x7A }, 2228 { 0x22, 0x7AA, 0xC6 }, 2229 { 0x22, 0x7AB, 0x39 }, 2230 { 0x22, 0x7AC, 0x08 }, 2231 { 0x22, 0x7AD, 0x80 }, 2232 { 0x22, 0x7A6, 0xC4 }, 2233 { 0x22, 0x7A7, 0xE9 }, 2234 { 0x22, 0x7A8, 0xDC }, 2235 { 0x22, 0x7A9, 0xC4 }, 2236 { 0x22, 0x7AA, 0xE9 }, 2237 { 0x22, 0x7AB, 0xDC }, 2238 { 0x22, 0x7AC, 0x09 }, 2239 { 0x22, 0x7AD, 0x80 }, 2240 { 0x22, 0x7A6, 0x3D }, 2241 { 0x22, 0x7A7, 0xE1 }, 2242 { 0x22, 0x7A8, 0x0D }, 2243 { 0x22, 0x7A9, 0x3D }, 2244 { 0x22, 0x7AA, 0xE1 }, 2245 { 0x22, 0x7AB, 0x0D }, 2246 { 0x22, 0x7AC, 0x0A }, 2247 { 0x22, 0x7AD, 0x80 }, 2248 { 0x22, 0x7A6, 0x89 }, 2249 { 0x22, 0x7A7, 0xB6 }, 2250 { 0x22, 0x7A8, 0xEB }, 2251 { 0x22, 0x7A9, 0x89 }, 2252 { 0x22, 0x7AA, 0xB6 }, 2253 { 0x22, 0x7AB, 0xEB }, 2254 { 0x22, 0x7AC, 0x0B }, 2255 { 0x22, 0x7AD, 0x80 }, 2256 { 0x22, 0x7A6, 0x39 }, 2257 { 0x22, 0x7A7, 0x9D }, 2258 { 0x22, 0x7A8, 0xFE }, 2259 { 0x22, 0x7A9, 0x39 }, 2260 { 0x22, 0x7AA, 0x9D }, 2261 { 0x22, 0x7AB, 0xFE }, 2262 { 0x22, 0x7AC, 0x0C }, 2263 { 0x22, 0x7AD, 0x80 }, 2264 { 0x22, 0x7A6, 0x76 }, 2265 { 0x22, 0x7A7, 0x49 }, 2266 { 0x22, 0x7A8, 0x15 }, 2267 { 0x22, 0x7A9, 0x76 }, 2268 { 0x22, 0x7AA, 0x49 }, 2269 { 0x22, 0x7AB, 0x15 }, 2270 { 0x22, 0x7AC, 0x0D }, 2271 { 0x22, 0x7AD, 0x80 }, 2272 { 0x22, 0x7A6, 0xC8 }, 2273 { 0x22, 0x7A7, 0x80 }, 2274 { 0x22, 0x7A8, 0xF5 }, 2275 { 0x22, 0x7A9, 0xC8 }, 2276 { 0x22, 0x7AA, 0x80 }, 2277 { 0x22, 0x7AB, 0xF5 }, 2278 { 0x22, 0x7AC, 0x0E }, 2279 { 0x22, 0x7AD, 0x80 }, 2280 { 0x22, 0x7A6, 0x40 }, 2281 { 0x22, 0x7A7, 0x00 }, 2282 { 0x22, 0x7A8, 0x00 }, 2283 { 0x22, 0x7A9, 0x40 }, 2284 { 0x22, 0x7AA, 0x00 }, 2285 { 0x22, 0x7AB, 0x00 }, 2286 { 0x22, 0x7AC, 0x0F }, 2287 { 0x22, 0x7AD, 0x80 }, 2288 { 0x22, 0x7A6, 0x90 }, 2289 { 0x22, 0x7A7, 0x68 }, 2290 { 0x22, 0x7A8, 0xF1 }, 2291 { 0x22, 0x7A9, 0x90 }, 2292 { 0x22, 0x7AA, 0x68 }, 2293 { 0x22, 0x7AB, 0xF1 }, 2294 { 0x22, 0x7AC, 0x10 }, 2295 { 0x22, 0x7AD, 0x80 }, 2296 { 0x22, 0x7A6, 0x34 }, 2297 { 0x22, 0x7A7, 0x47 }, 2298 { 0x22, 0x7A8, 0x6C }, 2299 { 0x22, 0x7A9, 0x34 }, 2300 { 0x22, 0x7AA, 0x47 }, 2301 { 0x22, 0x7AB, 0x6C }, 2302 { 0x22, 0x7AC, 0x11 }, 2303 { 0x22, 0x7AD, 0x80 }, 2304 { 0x22, 0x7A6, 0x6F }, 2305 { 0x22, 0x7A7, 0x97 }, 2306 { 0x22, 0x7A8, 0x0F }, 2307 { 0x22, 0x7A9, 0x6F }, 2308 { 0x22, 0x7AA, 0x97 }, 2309 { 0x22, 0x7AB, 0x0F }, 2310 { 0x22, 0x7AC, 0x12 }, 2311 { 0x22, 0x7AD, 0x80 }, 2312 { 0x22, 0x7A6, 0xCB }, 2313 { 0x22, 0x7A7, 0xB8 }, 2314 { 0x22, 0x7A8, 0x94 }, 2315 { 0x22, 0x7A9, 0xCB }, 2316 { 0x22, 0x7AA, 0xB8 }, 2317 { 0x22, 0x7AB, 0x94 }, 2318 { 0x22, 0x7AC, 0x13 }, 2319 { 0x22, 0x7AD, 0x80 }, 2320 { 0x22, 0x7A6, 0x40 }, 2321 { 0x22, 0x7A7, 0x00 }, 2322 { 0x22, 0x7A8, 0x00 }, 2323 { 0x22, 0x7A9, 0x40 }, 2324 { 0x22, 0x7AA, 0x00 }, 2325 { 0x22, 0x7AB, 0x00 }, 2326 { 0x22, 0x7AC, 0x14 }, 2327 { 0x22, 0x7AD, 0x80 }, 2328 { 0x22, 0x7A6, 0x95 }, 2329 { 0x22, 0x7A7, 0x76 }, 2330 { 0x22, 0x7A8, 0x5B }, 2331 { 0x22, 0x7A9, 0x95 }, 2332 { 0x22, 0x7AA, 0x76 }, 2333 { 0x22, 0x7AB, 0x5B }, 2334 { 0x22, 0x7AC, 0x15 }, 2335 { 0x22, 0x7AD, 0x80 }, 2336 { 0x22, 0x7A6, 0x31 }, 2337 { 0x22, 0x7A7, 0xAC }, 2338 { 0x22, 0x7A8, 0x31 }, 2339 { 0x22, 0x7A9, 0x31 }, 2340 { 0x22, 0x7AA, 0xAC }, 2341 { 0x22, 0x7AB, 0x31 }, 2342 { 0x22, 0x7AC, 0x16 }, 2343 { 0x22, 0x7AD, 0x80 }, 2344 { 0x22, 0x7A6, 0x6A }, 2345 { 0x22, 0x7A7, 0x89 }, 2346 { 0x22, 0x7A8, 0xA5 }, 2347 { 0x22, 0x7A9, 0x6A }, 2348 { 0x22, 0x7AA, 0x89 }, 2349 { 0x22, 0x7AB, 0xA5 }, 2350 { 0x22, 0x7AC, 0x17 }, 2351 { 0x22, 0x7AD, 0x80 }, 2352 { 0x22, 0x7A6, 0xCE }, 2353 { 0x22, 0x7A7, 0x53 }, 2354 { 0x22, 0x7A8, 0xCF }, 2355 { 0x22, 0x7A9, 0xCE }, 2356 { 0x22, 0x7AA, 0x53 }, 2357 { 0x22, 0x7AB, 0xCF }, 2358 { 0x22, 0x7AC, 0x18 }, 2359 { 0x22, 0x7AD, 0x80 }, 2360 { 0x22, 0x7A6, 0x40 }, 2361 { 0x22, 0x7A7, 0x00 }, 2362 { 0x22, 0x7A8, 0x00 }, 2363 { 0x22, 0x7A9, 0x40 }, 2364 { 0x22, 0x7AA, 0x00 }, 2365 { 0x22, 0x7AB, 0x00 }, 2366 { 0x22, 0x7AC, 0x19 }, 2367 { 0x22, 0x7AD, 0x80 }, 2368 /* 48KHz base */ 2369 { 0x22, 0x7A6, 0x3E }, 2370 { 0x22, 0x7A7, 0x88 }, 2371 { 0x22, 0x7A8, 0xDC }, 2372 { 0x22, 0x7A9, 0x3E }, 2373 { 0x22, 0x7AA, 0x88 }, 2374 { 0x22, 0x7AB, 0xDC }, 2375 { 0x22, 0x7AC, 0x1A }, 2376 { 0x22, 0x7AD, 0x80 }, 2377 { 0x22, 0x7A6, 0x82 }, 2378 { 0x22, 0x7A7, 0xEE }, 2379 { 0x22, 0x7A8, 0x46 }, 2380 { 0x22, 0x7A9, 0x82 }, 2381 { 0x22, 0x7AA, 0xEE }, 2382 { 0x22, 0x7AB, 0x46 }, 2383 { 0x22, 0x7AC, 0x1B }, 2384 { 0x22, 0x7AD, 0x80 }, 2385 { 0x22, 0x7A6, 0x3E }, 2386 { 0x22, 0x7A7, 0x88 }, 2387 { 0x22, 0x7A8, 0xDC }, 2388 { 0x22, 0x7A9, 0x3E }, 2389 { 0x22, 0x7AA, 0x88 }, 2390 { 0x22, 0x7AB, 0xDC }, 2391 { 0x22, 0x7AC, 0x1C }, 2392 { 0x22, 0x7AD, 0x80 }, 2393 { 0x22, 0x7A6, 0x7D }, 2394 { 0x22, 0x7A7, 0x09 }, 2395 { 0x22, 0x7A8, 0x28 }, 2396 { 0x22, 0x7A9, 0x7D }, 2397 { 0x22, 0x7AA, 0x09 }, 2398 { 0x22, 0x7AB, 0x28 }, 2399 { 0x22, 0x7AC, 0x1D }, 2400 { 0x22, 0x7AD, 0x80 }, 2401 { 0x22, 0x7A6, 0xC2 }, 2402 { 0x22, 0x7A7, 0xE5 }, 2403 { 0x22, 0x7A8, 0xB4 }, 2404 { 0x22, 0x7A9, 0xC2 }, 2405 { 0x22, 0x7AA, 0xE5 }, 2406 { 0x22, 0x7AB, 0xB4 }, 2407 { 0x22, 0x7AC, 0x1E }, 2408 { 0x22, 0x7AD, 0x80 }, 2409 { 0x22, 0x7A6, 0x3E }, 2410 { 0x22, 0x7A7, 0xA3 }, 2411 { 0x22, 0x7A8, 0x1F }, 2412 { 0x22, 0x7A9, 0x3E }, 2413 { 0x22, 0x7AA, 0xA3 }, 2414 { 0x22, 0x7AB, 0x1F }, 2415 { 0x22, 0x7AC, 0x1F }, 2416 { 0x22, 0x7AD, 0x80 }, 2417 { 0x22, 0x7A6, 0x84 }, 2418 { 0x22, 0x7A7, 0xCA }, 2419 { 0x22, 0x7A8, 0xF1 }, 2420 { 0x22, 0x7A9, 0x84 }, 2421 { 0x22, 0x7AA, 0xCA }, 2422 { 0x22, 0x7AB, 0xF1 }, 2423 { 0x22, 0x7AC, 0x20 }, 2424 { 0x22, 0x7AD, 0x80 }, 2425 { 0x22, 0x7A6, 0x3C }, 2426 { 0x22, 0x7A7, 0xD5 }, 2427 { 0x22, 0x7A8, 0x9C }, 2428 { 0x22, 0x7A9, 0x3C }, 2429 { 0x22, 0x7AA, 0xD5 }, 2430 { 0x22, 0x7AB, 0x9C }, 2431 { 0x22, 0x7AC, 0x21 }, 2432 { 0x22, 0x7AD, 0x80 }, 2433 { 0x22, 0x7A6, 0x7B }, 2434 { 0x22, 0x7A7, 0x35 }, 2435 { 0x22, 0x7A8, 0x0F }, 2436 { 0x22, 0x7A9, 0x7B }, 2437 { 0x22, 0x7AA, 0x35 }, 2438 { 0x22, 0x7AB, 0x0F }, 2439 { 0x22, 0x7AC, 0x22 }, 2440 { 0x22, 0x7AD, 0x80 }, 2441 { 0x22, 0x7A6, 0xC4 }, 2442 { 0x22, 0x7A7, 0x87 }, 2443 { 0x22, 0x7A8, 0x45 }, 2444 { 0x22, 0x7A9, 0xC4 }, 2445 { 0x22, 0x7AA, 0x87 }, 2446 { 0x22, 0x7AB, 0x45 }, 2447 { 0x22, 0x7AC, 0x23 }, 2448 { 0x22, 0x7AD, 0x80 }, 2449 { 0x22, 0x7A6, 0x3E }, 2450 { 0x22, 0x7A7, 0x0A }, 2451 { 0x22, 0x7A8, 0x78 }, 2452 { 0x22, 0x7A9, 0x3E }, 2453 { 0x22, 0x7AA, 0x0A }, 2454 { 0x22, 0x7AB, 0x78 }, 2455 { 0x22, 0x7AC, 0x24 }, 2456 { 0x22, 0x7AD, 0x80 }, 2457 { 0x22, 0x7A6, 0x88 }, 2458 { 0x22, 0x7A7, 0xE2 }, 2459 { 0x22, 0x7A8, 0x05 }, 2460 { 0x22, 0x7A9, 0x88 }, 2461 { 0x22, 0x7AA, 0xE2 }, 2462 { 0x22, 0x7AB, 0x05 }, 2463 { 0x22, 0x7AC, 0x25 }, 2464 { 0x22, 0x7AD, 0x80 }, 2465 { 0x22, 0x7A6, 0x3A }, 2466 { 0x22, 0x7A7, 0x1A }, 2467 { 0x22, 0x7A8, 0xA3 }, 2468 { 0x22, 0x7A9, 0x3A }, 2469 { 0x22, 0x7AA, 0x1A }, 2470 { 0x22, 0x7AB, 0xA3 }, 2471 { 0x22, 0x7AC, 0x26 }, 2472 { 0x22, 0x7AD, 0x80 }, 2473 { 0x22, 0x7A6, 0x77 }, 2474 { 0x22, 0x7A7, 0x1D }, 2475 { 0x22, 0x7A8, 0xFB }, 2476 { 0x22, 0x7A9, 0x77 }, 2477 { 0x22, 0x7AA, 0x1D }, 2478 { 0x22, 0x7AB, 0xFB }, 2479 { 0x22, 0x7AC, 0x27 }, 2480 { 0x22, 0x7AD, 0x80 }, 2481 { 0x22, 0x7A6, 0xC7 }, 2482 { 0x22, 0x7A7, 0xDA }, 2483 { 0x22, 0x7A8, 0xE5 }, 2484 { 0x22, 0x7A9, 0xC7 }, 2485 { 0x22, 0x7AA, 0xDA }, 2486 { 0x22, 0x7AB, 0xE5 }, 2487 { 0x22, 0x7AC, 0x28 }, 2488 { 0x22, 0x7AD, 0x80 }, 2489 { 0x22, 0x7A6, 0x40 }, 2490 { 0x22, 0x7A7, 0x00 }, 2491 { 0x22, 0x7A8, 0x00 }, 2492 { 0x22, 0x7A9, 0x40 }, 2493 { 0x22, 0x7AA, 0x00 }, 2494 { 0x22, 0x7AB, 0x00 }, 2495 { 0x22, 0x7AC, 0x29 }, 2496 { 0x22, 0x7AD, 0x80 }, 2497 { 0x22, 0x7A6, 0x8E }, 2498 { 0x22, 0x7A7, 0xD7 }, 2499 { 0x22, 0x7A8, 0x22 }, 2500 { 0x22, 0x7A9, 0x8E }, 2501 { 0x22, 0x7AA, 0xD7 }, 2502 { 0x22, 0x7AB, 0x22 }, 2503 { 0x22, 0x7AC, 0x2A }, 2504 { 0x22, 0x7AD, 0x80 }, 2505 { 0x22, 0x7A6, 0x35 }, 2506 { 0x22, 0x7A7, 0x26 }, 2507 { 0x22, 0x7A8, 0xC6 }, 2508 { 0x22, 0x7A9, 0x35 }, 2509 { 0x22, 0x7AA, 0x26 }, 2510 { 0x22, 0x7AB, 0xC6 }, 2511 { 0x22, 0x7AC, 0x2B }, 2512 { 0x22, 0x7AD, 0x80 }, 2513 { 0x22, 0x7A6, 0x71 }, 2514 { 0x22, 0x7A7, 0x28 }, 2515 { 0x22, 0x7A8, 0xDE }, 2516 { 0x22, 0x7A9, 0x71 }, 2517 { 0x22, 0x7AA, 0x28 }, 2518 { 0x22, 0x7AB, 0xDE }, 2519 { 0x22, 0x7AC, 0x2C }, 2520 { 0x22, 0x7AD, 0x80 }, 2521 { 0x22, 0x7A6, 0xCA }, 2522 { 0x22, 0x7A7, 0xD9 }, 2523 { 0x22, 0x7A8, 0x3A }, 2524 { 0x22, 0x7A9, 0xCA }, 2525 { 0x22, 0x7AA, 0xD9 }, 2526 { 0x22, 0x7AB, 0x3A }, 2527 { 0x22, 0x7AC, 0x2D }, 2528 { 0x22, 0x7AD, 0x80 }, 2529 { 0x22, 0x7A6, 0x40 }, 2530 { 0x22, 0x7A7, 0x00 }, 2531 { 0x22, 0x7A8, 0x00 }, 2532 { 0x22, 0x7A9, 0x40 }, 2533 { 0x22, 0x7AA, 0x00 }, 2534 { 0x22, 0x7AB, 0x00 }, 2535 { 0x22, 0x7AC, 0x2E }, 2536 { 0x22, 0x7AD, 0x80 }, 2537 { 0x22, 0x7A6, 0x93 }, 2538 { 0x22, 0x7A7, 0x5E }, 2539 { 0x22, 0x7A8, 0xD8 }, 2540 { 0x22, 0x7A9, 0x93 }, 2541 { 0x22, 0x7AA, 0x5E }, 2542 { 0x22, 0x7AB, 0xD8 }, 2543 { 0x22, 0x7AC, 0x2F }, 2544 { 0x22, 0x7AD, 0x80 }, 2545 { 0x22, 0x7A6, 0x32 }, 2546 { 0x22, 0x7A7, 0xB7 }, 2547 { 0x22, 0x7A8, 0xB1 }, 2548 { 0x22, 0x7A9, 0x32 }, 2549 { 0x22, 0x7AA, 0xB7 }, 2550 { 0x22, 0x7AB, 0xB1 }, 2551 { 0x22, 0x7AC, 0x30 }, 2552 { 0x22, 0x7AD, 0x80 }, 2553 { 0x22, 0x7A6, 0x6C }, 2554 { 0x22, 0x7A7, 0xA1 }, 2555 { 0x22, 0x7A8, 0x28 }, 2556 { 0x22, 0x7A9, 0x6C }, 2557 { 0x22, 0x7AA, 0xA1 }, 2558 { 0x22, 0x7AB, 0x28 }, 2559 { 0x22, 0x7AC, 0x31 }, 2560 { 0x22, 0x7AD, 0x80 }, 2561 { 0x22, 0x7A6, 0xCD }, 2562 { 0x22, 0x7A7, 0x48 }, 2563 { 0x22, 0x7A8, 0x4F }, 2564 { 0x22, 0x7A9, 0xCD }, 2565 { 0x22, 0x7AA, 0x48 }, 2566 { 0x22, 0x7AB, 0x4F }, 2567 { 0x22, 0x7AC, 0x32 }, 2568 { 0x22, 0x7AD, 0x80 }, 2569 { 0x22, 0x7A6, 0x40 }, 2570 { 0x22, 0x7A7, 0x00 }, 2571 { 0x22, 0x7A8, 0x00 }, 2572 { 0x22, 0x7A9, 0x40 }, 2573 { 0x22, 0x7AA, 0x00 }, 2574 { 0x22, 0x7AB, 0x00 }, 2575 { 0x22, 0x7AC, 0x33 }, 2576 { 0x22, 0x7AD, 0x80 }, 2577 /* common */ 2578 { 0x22, 0x782, 0xC1 }, 2579 { 0x22, 0x771, 0x2C }, 2580 { 0x22, 0x772, 0x2C }, 2581 { 0x22, 0x788, 0x04 }, 2582 { 0x01, 0x7B0, 0x08 }, 2583 {} 2584 }; 2585 2586 static const struct hda_fixup stac92hd83xxx_fixups[] = { 2587 [STAC_92HD83XXX_REF] = { 2588 .type = HDA_FIXUP_PINS, 2589 .v.pins = ref92hd83xxx_pin_configs, 2590 }, 2591 [STAC_92HD83XXX_PWR_REF] = { 2592 .type = HDA_FIXUP_PINS, 2593 .v.pins = ref92hd83xxx_pin_configs, 2594 }, 2595 [STAC_DELL_S14] = { 2596 .type = HDA_FIXUP_PINS, 2597 .v.pins = dell_s14_pin_configs, 2598 }, 2599 [STAC_DELL_VOSTRO_3500] = { 2600 .type = HDA_FIXUP_PINS, 2601 .v.pins = dell_vostro_3500_pin_configs, 2602 }, 2603 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2604 .type = HDA_FIXUP_PINS, 2605 .v.pins = hp_cNB11_intquad_pin_configs, 2606 .chained = true, 2607 .chain_id = STAC_92HD83XXX_HP, 2608 }, 2609 [STAC_92HD83XXX_HP] = { 2610 .type = HDA_FIXUP_FUNC, 2611 .v.func = stac92hd83xxx_fixup_hp, 2612 }, 2613 [STAC_HP_DV7_4000] = { 2614 .type = HDA_FIXUP_PINS, 2615 .v.pins = hp_dv7_4000_pin_configs, 2616 .chained = true, 2617 .chain_id = STAC_92HD83XXX_HP, 2618 }, 2619 [STAC_HP_ZEPHYR] = { 2620 .type = HDA_FIXUP_FUNC, 2621 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2622 .chained = true, 2623 .chain_id = STAC_92HD83XXX_HP, 2624 }, 2625 [STAC_92HD83XXX_HP_LED] = { 2626 .type = HDA_FIXUP_FUNC, 2627 .v.func = stac92hd83xxx_fixup_hp_led, 2628 .chained = true, 2629 .chain_id = STAC_92HD83XXX_HP, 2630 }, 2631 [STAC_92HD83XXX_HP_INV_LED] = { 2632 .type = HDA_FIXUP_FUNC, 2633 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2634 .chained = true, 2635 .chain_id = STAC_92HD83XXX_HP, 2636 }, 2637 [STAC_92HD83XXX_HP_MIC_LED] = { 2638 .type = HDA_FIXUP_FUNC, 2639 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2640 .chained = true, 2641 .chain_id = STAC_92HD83XXX_HP, 2642 }, 2643 [STAC_HP_LED_GPIO10] = { 2644 .type = HDA_FIXUP_FUNC, 2645 .v.func = stac92hd83xxx_fixup_hp_led_gpio10, 2646 .chained = true, 2647 .chain_id = STAC_92HD83XXX_HP, 2648 }, 2649 [STAC_92HD83XXX_HEADSET_JACK] = { 2650 .type = HDA_FIXUP_FUNC, 2651 .v.func = stac92hd83xxx_fixup_headset_jack, 2652 }, 2653 [STAC_HP_ENVY_BASS] = { 2654 .type = HDA_FIXUP_PINS, 2655 .v.pins = (const struct hda_pintbl[]) { 2656 { 0x0f, 0x90170111 }, 2657 {} 2658 }, 2659 }, 2660 [STAC_HP_BNB13_EQ] = { 2661 .type = HDA_FIXUP_VERBS, 2662 .v.verbs = hp_bnb13_eq_verbs, 2663 .chained = true, 2664 .chain_id = STAC_92HD83XXX_HP_MIC_LED, 2665 }, 2666 [STAC_HP_ENVY_TS_BASS] = { 2667 .type = HDA_FIXUP_PINS, 2668 .v.pins = (const struct hda_pintbl[]) { 2669 { 0x10, 0x92170111 }, 2670 {} 2671 }, 2672 }, 2673 [STAC_92HD83XXX_GPIO10_EAPD] = { 2674 .type = HDA_FIXUP_FUNC, 2675 .v.func = stac92hd83xxx_fixup_gpio10_eapd, 2676 }, 2677 }; 2678 2679 static const struct hda_model_fixup stac92hd83xxx_models[] = { 2680 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2681 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2682 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2683 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2684 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2685 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2686 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2687 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2688 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2689 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2690 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2691 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2692 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, 2693 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" }, 2694 {} 2695 }; 2696 2697 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2698 /* SigmaTel reference board */ 2699 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2700 "DFI LanParty", STAC_92HD83XXX_REF), 2701 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2702 "DFI LanParty", STAC_92HD83XXX_REF), 2703 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2704 "unknown Dell", STAC_DELL_S14), 2705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2706 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2708 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2710 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2712 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2714 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2716 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2718 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2720 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2722 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2723 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2724 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2725 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2726 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2727 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2728 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2729 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2730 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2731 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2732 "HP Pavilion dv7", STAC_HP_DV7_4000), 2733 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2734 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2735 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2736 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2737 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2738 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2739 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899, 2740 "HP Folio 13", STAC_HP_LED_GPIO10), 2741 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2742 "HP Folio", STAC_HP_BNB13_EQ), 2743 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, 2744 "HP bNB13", STAC_HP_BNB13_EQ), 2745 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, 2746 "HP bNB13", STAC_HP_BNB13_EQ), 2747 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, 2748 "HP bNB13", STAC_HP_BNB13_EQ), 2749 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e, 2750 "HP ENVY TS", STAC_HP_ENVY_TS_BASS), 2751 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, 2752 "HP bNB13", STAC_HP_BNB13_EQ), 2753 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, 2754 "HP bNB13", STAC_HP_BNB13_EQ), 2755 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, 2756 "HP bNB13", STAC_HP_BNB13_EQ), 2757 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, 2758 "HP bNB13", STAC_HP_BNB13_EQ), 2759 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, 2760 "HP bNB13", STAC_HP_BNB13_EQ), 2761 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, 2762 "HP bNB13", STAC_HP_BNB13_EQ), 2763 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, 2764 "HP bNB13", STAC_HP_BNB13_EQ), 2765 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, 2766 "HP bNB13", STAC_HP_BNB13_EQ), 2767 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, 2768 "HP bNB13", STAC_HP_BNB13_EQ), 2769 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, 2770 "HP bNB13", STAC_HP_BNB13_EQ), 2771 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, 2772 "HP bNB13", STAC_HP_BNB13_EQ), 2773 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, 2774 "HP bNB13", STAC_HP_BNB13_EQ), 2775 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, 2776 "HP bNB13", STAC_HP_BNB13_EQ), 2777 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, 2778 "HP bNB13", STAC_HP_BNB13_EQ), 2779 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, 2780 "HP bNB13", STAC_HP_BNB13_EQ), 2781 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, 2782 "HP bNB13", STAC_HP_BNB13_EQ), 2783 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, 2784 "HP bNB13", STAC_HP_BNB13_EQ), 2785 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, 2786 "HP bNB13", STAC_HP_BNB13_EQ), 2787 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, 2788 "HP bNB13", STAC_HP_BNB13_EQ), 2789 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, 2790 "HP bNB13", STAC_HP_BNB13_EQ), 2791 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, 2792 "HP bNB13", STAC_HP_BNB13_EQ), 2793 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, 2794 "HP bNB13", STAC_HP_BNB13_EQ), 2795 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, 2796 "HP bNB13", STAC_HP_BNB13_EQ), 2797 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, 2798 "HP bNB13", STAC_HP_BNB13_EQ), 2799 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, 2800 "HP bNB13", STAC_HP_BNB13_EQ), 2801 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, 2802 "HP bNB13", STAC_HP_BNB13_EQ), 2803 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, 2804 "HP bNB13", STAC_HP_BNB13_EQ), 2805 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, 2806 "HP bNB13", STAC_HP_BNB13_EQ), 2807 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, 2808 "HP bNB13", STAC_HP_BNB13_EQ), 2809 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, 2810 "HP bNB13", STAC_HP_BNB13_EQ), 2811 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, 2812 "HP bNB13", STAC_HP_BNB13_EQ), 2813 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, 2814 "HP bNB13", STAC_HP_BNB13_EQ), 2815 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, 2816 "HP bNB13", STAC_HP_BNB13_EQ), 2817 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, 2818 "HP bNB13", STAC_HP_BNB13_EQ), 2819 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, 2820 "HP bNB13", STAC_HP_BNB13_EQ), 2821 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, 2822 "HP bNB13", STAC_HP_BNB13_EQ), 2823 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, 2824 "HP bNB13", STAC_HP_BNB13_EQ), 2825 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, 2826 "HP bNB13", STAC_HP_BNB13_EQ), 2827 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, 2828 "HP bNB13", STAC_HP_BNB13_EQ), 2829 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, 2830 "HP bNB13", STAC_HP_BNB13_EQ), 2831 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, 2832 "HP bNB13", STAC_HP_BNB13_EQ), 2833 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, 2834 "HP bNB13", STAC_HP_BNB13_EQ), 2835 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, 2836 "HP bNB13", STAC_HP_BNB13_EQ), 2837 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, 2838 "HP bNB13", STAC_HP_BNB13_EQ), 2839 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2840 "HP", STAC_92HD83XXX_HP_MIC_LED), 2841 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2842 "HP", STAC_92HD83XXX_HP_MIC_LED), 2843 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2844 "HP", STAC_92HD83XXX_HP_MIC_LED), 2845 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2846 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2847 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2848 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2849 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2850 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2851 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2852 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2853 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2854 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2855 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2856 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2857 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2858 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2859 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2860 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2861 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2862 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2863 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2864 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2865 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2866 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2867 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2868 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2869 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2870 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2871 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2872 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2873 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2874 "HP", STAC_HP_ZEPHYR), 2875 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2876 "HP Mini", STAC_92HD83XXX_HP_LED), 2877 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2878 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2879 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2880 "HP Mini", STAC_92HD83XXX_HP_LED), 2881 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2882 SND_PCI_QUIRK(PCI_VENDOR_ID_TOSHIBA, 0xfa91, 2883 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD), 2884 {} /* terminator */ 2885 }; 2886 2887 /* HP dv7 bass switch - GPIO5 */ 2888 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2889 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2890 struct snd_ctl_elem_value *ucontrol) 2891 { 2892 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2893 struct sigmatel_spec *spec = codec->spec; 2894 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2895 return 0; 2896 } 2897 2898 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2899 struct snd_ctl_elem_value *ucontrol) 2900 { 2901 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2902 struct sigmatel_spec *spec = codec->spec; 2903 unsigned int gpio_data; 2904 2905 gpio_data = (spec->gpio_data & ~0x20) | 2906 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2907 if (gpio_data == spec->gpio_data) 2908 return 0; 2909 spec->gpio_data = gpio_data; 2910 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2911 return 1; 2912 } 2913 2914 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2915 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2916 .info = stac_hp_bass_gpio_info, 2917 .get = stac_hp_bass_gpio_get, 2918 .put = stac_hp_bass_gpio_put, 2919 }; 2920 2921 static int stac_add_hp_bass_switch(struct hda_codec *codec) 2922 { 2923 struct sigmatel_spec *spec = codec->spec; 2924 2925 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2926 &stac_hp_bass_sw_ctrl)) 2927 return -ENOMEM; 2928 2929 spec->gpio_mask |= 0x20; 2930 spec->gpio_dir |= 0x20; 2931 spec->gpio_data |= 0x20; 2932 return 0; 2933 } 2934 2935 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 2936 { 0x0a, 0x02214030 }, 2937 { 0x0b, 0x02a19040 }, 2938 { 0x0c, 0x01a19020 }, 2939 { 0x0d, 0x01014010 }, 2940 { 0x0e, 0x0181302e }, 2941 { 0x0f, 0x01014010 }, 2942 { 0x14, 0x01019020 }, 2943 { 0x18, 0x90a000f0 }, 2944 { 0x19, 0x90a000f0 }, 2945 { 0x1e, 0x01452050 }, 2946 { 0x1f, 0x01452050 }, 2947 {} 2948 }; 2949 2950 static const struct hda_pintbl dell_m4_1_pin_configs[] = { 2951 { 0x0a, 0x0421101f }, 2952 { 0x0b, 0x04a11221 }, 2953 { 0x0c, 0x40f000f0 }, 2954 { 0x0d, 0x90170110 }, 2955 { 0x0e, 0x23a1902e }, 2956 { 0x0f, 0x23014250 }, 2957 { 0x14, 0x40f000f0 }, 2958 { 0x18, 0x90a000f0 }, 2959 { 0x19, 0x40f000f0 }, 2960 { 0x1e, 0x4f0000f0 }, 2961 { 0x1f, 0x4f0000f0 }, 2962 {} 2963 }; 2964 2965 static const struct hda_pintbl dell_m4_2_pin_configs[] = { 2966 { 0x0a, 0x0421101f }, 2967 { 0x0b, 0x04a11221 }, 2968 { 0x0c, 0x90a70330 }, 2969 { 0x0d, 0x90170110 }, 2970 { 0x0e, 0x23a1902e }, 2971 { 0x0f, 0x23014250 }, 2972 { 0x14, 0x40f000f0 }, 2973 { 0x18, 0x40f000f0 }, 2974 { 0x19, 0x40f000f0 }, 2975 { 0x1e, 0x044413b0 }, 2976 { 0x1f, 0x044413b0 }, 2977 {} 2978 }; 2979 2980 static const struct hda_pintbl dell_m4_3_pin_configs[] = { 2981 { 0x0a, 0x0421101f }, 2982 { 0x0b, 0x04a11221 }, 2983 { 0x0c, 0x90a70330 }, 2984 { 0x0d, 0x90170110 }, 2985 { 0x0e, 0x40f000f0 }, 2986 { 0x0f, 0x40f000f0 }, 2987 { 0x14, 0x40f000f0 }, 2988 { 0x18, 0x90a000f0 }, 2989 { 0x19, 0x40f000f0 }, 2990 { 0x1e, 0x044413b0 }, 2991 { 0x1f, 0x044413b0 }, 2992 {} 2993 }; 2994 2995 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 2996 const struct hda_fixup *fix, int action) 2997 { 2998 struct sigmatel_spec *spec = codec->spec; 2999 3000 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3001 return; 3002 3003 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 3004 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 3005 } 3006 3007 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 3008 const struct hda_fixup *fix, int action) 3009 { 3010 struct sigmatel_spec *spec = codec->spec; 3011 struct hda_jack_callback *jack; 3012 3013 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3014 return; 3015 3016 /* Enable VREF power saving on GPIO1 detect */ 3017 snd_hda_codec_write_cache(codec, codec->afg, 0, 3018 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 3019 jack = snd_hda_jack_detect_enable_callback(codec, codec->afg, 3020 stac_vref_event); 3021 if (!IS_ERR(jack)) 3022 jack->private_data = 0x02; 3023 3024 spec->gpio_mask |= 0x02; 3025 3026 /* enable internal microphone */ 3027 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 3028 } 3029 3030 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 3031 const struct hda_fixup *fix, int action) 3032 { 3033 struct sigmatel_spec *spec = codec->spec; 3034 3035 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3036 return; 3037 spec->gpio_led = 0x01; 3038 } 3039 3040 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 3041 const struct hda_fixup *fix, int action) 3042 { 3043 unsigned int cap; 3044 3045 switch (action) { 3046 case HDA_FIXUP_ACT_PRE_PROBE: 3047 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 3048 break; 3049 3050 case HDA_FIXUP_ACT_PROBE: 3051 /* enable bass on HP dv7 */ 3052 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 3053 cap &= AC_GPIO_IO_COUNT; 3054 if (cap >= 6) 3055 stac_add_hp_bass_switch(codec); 3056 break; 3057 } 3058 } 3059 3060 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 3061 const struct hda_fixup *fix, int action) 3062 { 3063 struct sigmatel_spec *spec = codec->spec; 3064 3065 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3066 return; 3067 spec->gpio_led = 0x08; 3068 } 3069 3070 3071 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 3072 const struct hda_fixup *fix, int action) 3073 { 3074 struct sigmatel_spec *spec = codec->spec; 3075 3076 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3077 return; 3078 3079 if (hp_blike_system(codec->subsystem_id)) { 3080 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f); 3081 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 3082 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER || 3083 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) { 3084 /* It was changed in the BIOS to just satisfy MS DTM. 3085 * Lets turn it back into slaved HP 3086 */ 3087 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) 3088 | (AC_JACK_HP_OUT << 3089 AC_DEFCFG_DEVICE_SHIFT); 3090 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC 3091 | AC_DEFCFG_SEQUENCE))) 3092 | 0x1f; 3093 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg); 3094 } 3095 } 3096 3097 if (find_mute_led_cfg(codec, 1)) 3098 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 3099 spec->gpio_led, 3100 spec->gpio_led_polarity); 3101 3102 } 3103 3104 static const struct hda_fixup stac92hd71bxx_fixups[] = { 3105 [STAC_92HD71BXX_REF] = { 3106 .type = HDA_FIXUP_FUNC, 3107 .v.func = stac92hd71bxx_fixup_ref, 3108 }, 3109 [STAC_DELL_M4_1] = { 3110 .type = HDA_FIXUP_PINS, 3111 .v.pins = dell_m4_1_pin_configs, 3112 }, 3113 [STAC_DELL_M4_2] = { 3114 .type = HDA_FIXUP_PINS, 3115 .v.pins = dell_m4_2_pin_configs, 3116 }, 3117 [STAC_DELL_M4_3] = { 3118 .type = HDA_FIXUP_PINS, 3119 .v.pins = dell_m4_3_pin_configs, 3120 }, 3121 [STAC_HP_M4] = { 3122 .type = HDA_FIXUP_FUNC, 3123 .v.func = stac92hd71bxx_fixup_hp_m4, 3124 .chained = true, 3125 .chain_id = STAC_92HD71BXX_HP, 3126 }, 3127 [STAC_HP_DV4] = { 3128 .type = HDA_FIXUP_FUNC, 3129 .v.func = stac92hd71bxx_fixup_hp_dv4, 3130 .chained = true, 3131 .chain_id = STAC_HP_DV5, 3132 }, 3133 [STAC_HP_DV5] = { 3134 .type = HDA_FIXUP_FUNC, 3135 .v.func = stac92hd71bxx_fixup_hp_dv5, 3136 .chained = true, 3137 .chain_id = STAC_92HD71BXX_HP, 3138 }, 3139 [STAC_HP_HDX] = { 3140 .type = HDA_FIXUP_FUNC, 3141 .v.func = stac92hd71bxx_fixup_hp_hdx, 3142 .chained = true, 3143 .chain_id = STAC_92HD71BXX_HP, 3144 }, 3145 [STAC_92HD71BXX_HP] = { 3146 .type = HDA_FIXUP_FUNC, 3147 .v.func = stac92hd71bxx_fixup_hp, 3148 }, 3149 }; 3150 3151 static const struct hda_model_fixup stac92hd71bxx_models[] = { 3152 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 3153 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 3154 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 3155 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 3156 { .id = STAC_HP_M4, .name = "hp-m4" }, 3157 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 3158 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 3159 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 3160 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 3161 {} 3162 }; 3163 3164 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 3165 /* SigmaTel reference board */ 3166 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3167 "DFI LanParty", STAC_92HD71BXX_REF), 3168 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3169 "DFI LanParty", STAC_92HD71BXX_REF), 3170 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 3171 "HP", STAC_HP_DV5), 3172 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 3173 "HP", STAC_HP_DV5), 3174 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 3175 "HP dv4-7", STAC_HP_DV4), 3176 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 3177 "HP dv4-7", STAC_HP_DV5), 3178 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 3179 "HP HDX", STAC_HP_HDX), /* HDX18 */ 3180 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 3181 "HP mini 1000", STAC_HP_M4), 3182 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 3183 "HP HDX", STAC_HP_HDX), /* HDX16 */ 3184 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 3185 "HP dv6", STAC_HP_DV5), 3186 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 3187 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 3188 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 3189 "HP DV6", STAC_HP_DV5), 3190 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 3191 "HP", STAC_HP_DV5), 3192 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 3193 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 3194 "unknown Dell", STAC_DELL_M4_1), 3195 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 3196 "unknown Dell", STAC_DELL_M4_1), 3197 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 3198 "unknown Dell", STAC_DELL_M4_1), 3199 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 3200 "unknown Dell", STAC_DELL_M4_1), 3201 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 3202 "unknown Dell", STAC_DELL_M4_1), 3203 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 3204 "unknown Dell", STAC_DELL_M4_1), 3205 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 3206 "unknown Dell", STAC_DELL_M4_1), 3207 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 3208 "unknown Dell", STAC_DELL_M4_2), 3209 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 3210 "unknown Dell", STAC_DELL_M4_2), 3211 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 3212 "unknown Dell", STAC_DELL_M4_2), 3213 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 3214 "unknown Dell", STAC_DELL_M4_2), 3215 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 3216 "unknown Dell", STAC_DELL_M4_3), 3217 {} /* terminator */ 3218 }; 3219 3220 static const struct hda_pintbl ref922x_pin_configs[] = { 3221 { 0x0a, 0x01014010 }, 3222 { 0x0b, 0x01016011 }, 3223 { 0x0c, 0x01012012 }, 3224 { 0x0d, 0x0221401f }, 3225 { 0x0e, 0x01813122 }, 3226 { 0x0f, 0x01011014 }, 3227 { 0x10, 0x01441030 }, 3228 { 0x11, 0x01c41030 }, 3229 { 0x15, 0x40000100 }, 3230 { 0x1b, 0x40000100 }, 3231 {} 3232 }; 3233 3234 /* 3235 STAC 922X pin configs for 3236 102801A7 3237 102801AB 3238 102801A9 3239 102801D1 3240 102801D2 3241 */ 3242 static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 3243 { 0x0a, 0x02214030 }, 3244 { 0x0b, 0x01a19021 }, 3245 { 0x0c, 0x01111012 }, 3246 { 0x0d, 0x01114010 }, 3247 { 0x0e, 0x02a19020 }, 3248 { 0x0f, 0x01117011 }, 3249 { 0x10, 0x400001f0 }, 3250 { 0x11, 0x400001f1 }, 3251 { 0x15, 0x01813122 }, 3252 { 0x1b, 0x400001f2 }, 3253 {} 3254 }; 3255 3256 /* 3257 STAC 922X pin configs for 3258 102801AC 3259 102801D0 3260 */ 3261 static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 3262 { 0x0a, 0x02214030 }, 3263 { 0x0b, 0x01a19021 }, 3264 { 0x0c, 0x01111012 }, 3265 { 0x0d, 0x01114010 }, 3266 { 0x0e, 0x02a19020 }, 3267 { 0x0f, 0x01117011 }, 3268 { 0x10, 0x01451140 }, 3269 { 0x11, 0x400001f0 }, 3270 { 0x15, 0x01813122 }, 3271 { 0x1b, 0x400001f1 }, 3272 {} 3273 }; 3274 3275 /* 3276 STAC 922X pin configs for 3277 102801BF 3278 */ 3279 static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 3280 { 0x0a, 0x0321101f }, 3281 { 0x0b, 0x01112024 }, 3282 { 0x0c, 0x01111222 }, 3283 { 0x0d, 0x91174220 }, 3284 { 0x0e, 0x03a11050 }, 3285 { 0x0f, 0x01116221 }, 3286 { 0x10, 0x90a70330 }, 3287 { 0x11, 0x01452340 }, 3288 { 0x15, 0x40C003f1 }, 3289 { 0x1b, 0x405003f0 }, 3290 {} 3291 }; 3292 3293 /* 3294 STAC 9221 A1 pin configs for 3295 102801D7 (Dell XPS M1210) 3296 */ 3297 static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 3298 { 0x0a, 0x02211211 }, 3299 { 0x0b, 0x408103ff }, 3300 { 0x0c, 0x02a1123e }, 3301 { 0x0d, 0x90100310 }, 3302 { 0x0e, 0x408003f1 }, 3303 { 0x0f, 0x0221121f }, 3304 { 0x10, 0x03451340 }, 3305 { 0x11, 0x40c003f2 }, 3306 { 0x15, 0x508003f3 }, 3307 { 0x1b, 0x405003f4 }, 3308 {} 3309 }; 3310 3311 static const struct hda_pintbl d945gtp3_pin_configs[] = { 3312 { 0x0a, 0x0221401f }, 3313 { 0x0b, 0x01a19022 }, 3314 { 0x0c, 0x01813021 }, 3315 { 0x0d, 0x01014010 }, 3316 { 0x0e, 0x40000100 }, 3317 { 0x0f, 0x40000100 }, 3318 { 0x10, 0x40000100 }, 3319 { 0x11, 0x40000100 }, 3320 { 0x15, 0x02a19120 }, 3321 { 0x1b, 0x40000100 }, 3322 {} 3323 }; 3324 3325 static const struct hda_pintbl d945gtp5_pin_configs[] = { 3326 { 0x0a, 0x0221401f }, 3327 { 0x0b, 0x01011012 }, 3328 { 0x0c, 0x01813024 }, 3329 { 0x0d, 0x01014010 }, 3330 { 0x0e, 0x01a19021 }, 3331 { 0x0f, 0x01016011 }, 3332 { 0x10, 0x01452130 }, 3333 { 0x11, 0x40000100 }, 3334 { 0x15, 0x02a19320 }, 3335 { 0x1b, 0x40000100 }, 3336 {} 3337 }; 3338 3339 static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 3340 { 0x0a, 0x0121e21f }, 3341 { 0x0b, 0x400000ff }, 3342 { 0x0c, 0x9017e110 }, 3343 { 0x0d, 0x400000fd }, 3344 { 0x0e, 0x400000fe }, 3345 { 0x0f, 0x0181e020 }, 3346 { 0x10, 0x1145e030 }, 3347 { 0x11, 0x11c5e240 }, 3348 { 0x15, 0x400000fc }, 3349 { 0x1b, 0x400000fb }, 3350 {} 3351 }; 3352 3353 static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 3354 { 0x0a, 0x0121e21f }, 3355 { 0x0b, 0x90a7012e }, 3356 { 0x0c, 0x9017e110 }, 3357 { 0x0d, 0x400000fd }, 3358 { 0x0e, 0x400000fe }, 3359 { 0x0f, 0x0181e020 }, 3360 { 0x10, 0x1145e230 }, 3361 { 0x11, 0x500000fa }, 3362 { 0x15, 0x400000fc }, 3363 { 0x1b, 0x400000fb }, 3364 {} 3365 }; 3366 3367 static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 3368 { 0x0a, 0x0121e21f }, 3369 { 0x0b, 0x90a7012e }, 3370 { 0x0c, 0x9017e110 }, 3371 { 0x0d, 0x400000fd }, 3372 { 0x0e, 0x400000fe }, 3373 { 0x0f, 0x0181e020 }, 3374 { 0x10, 0x1145e230 }, 3375 { 0x11, 0x11c5e240 }, 3376 { 0x15, 0x400000fc }, 3377 { 0x1b, 0x400000fb }, 3378 {} 3379 }; 3380 3381 static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 3382 { 0x0a, 0x0321e21f }, 3383 { 0x0b, 0x03a1e02e }, 3384 { 0x0c, 0x9017e110 }, 3385 { 0x0d, 0x9017e11f }, 3386 { 0x0e, 0x400000fe }, 3387 { 0x0f, 0x0381e020 }, 3388 { 0x10, 0x1345e230 }, 3389 { 0x11, 0x13c5e240 }, 3390 { 0x15, 0x400000fc }, 3391 { 0x1b, 0x400000fb }, 3392 {} 3393 }; 3394 3395 static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 3396 { 0x0a, 0x0321e21f }, 3397 { 0x0b, 0x03a1e02e }, 3398 { 0x0c, 0x9017e110 }, 3399 { 0x0d, 0x9017e11f }, 3400 { 0x0e, 0x400000fe }, 3401 { 0x0f, 0x0381e020 }, 3402 { 0x10, 0x1345e230 }, 3403 { 0x11, 0x13c5e240 }, 3404 { 0x15, 0x400000fc }, 3405 { 0x1b, 0x400000fb }, 3406 {} 3407 }; 3408 3409 static const struct hda_pintbl ecs202_pin_configs[] = { 3410 { 0x0a, 0x0221401f }, 3411 { 0x0b, 0x02a19020 }, 3412 { 0x0c, 0x01a19020 }, 3413 { 0x0d, 0x01114010 }, 3414 { 0x0e, 0x408000f0 }, 3415 { 0x0f, 0x01813022 }, 3416 { 0x10, 0x074510a0 }, 3417 { 0x11, 0x40c400f1 }, 3418 { 0x15, 0x9037012e }, 3419 { 0x1b, 0x40e000f2 }, 3420 {} 3421 }; 3422 3423 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 3424 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 3425 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 3426 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 3427 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 3428 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 3429 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 3430 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 3431 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 3432 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 3433 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 3434 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 3435 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 3436 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 3437 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 3438 {} 3439 }; 3440 3441 static const struct hda_fixup stac922x_fixups[]; 3442 3443 /* remap the fixup from codec SSID and apply it */ 3444 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 3445 const struct hda_fixup *fix, 3446 int action) 3447 { 3448 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3449 return; 3450 3451 codec->fixup_id = HDA_FIXUP_ID_NOT_SET; 3452 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 3453 stac922x_fixups); 3454 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET) 3455 snd_hda_apply_fixup(codec, action); 3456 } 3457 3458 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 3459 const struct hda_fixup *fix, 3460 int action) 3461 { 3462 struct sigmatel_spec *spec = codec->spec; 3463 3464 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3465 spec->gpio_mask = spec->gpio_dir = 0x03; 3466 spec->gpio_data = 0x03; 3467 } 3468 } 3469 3470 static const struct hda_fixup stac922x_fixups[] = { 3471 [STAC_D945_REF] = { 3472 .type = HDA_FIXUP_PINS, 3473 .v.pins = ref922x_pin_configs, 3474 }, 3475 [STAC_D945GTP3] = { 3476 .type = HDA_FIXUP_PINS, 3477 .v.pins = d945gtp3_pin_configs, 3478 }, 3479 [STAC_D945GTP5] = { 3480 .type = HDA_FIXUP_PINS, 3481 .v.pins = d945gtp5_pin_configs, 3482 }, 3483 [STAC_INTEL_MAC_AUTO] = { 3484 .type = HDA_FIXUP_FUNC, 3485 .v.func = stac922x_fixup_intel_mac_auto, 3486 }, 3487 [STAC_INTEL_MAC_V1] = { 3488 .type = HDA_FIXUP_PINS, 3489 .v.pins = intel_mac_v1_pin_configs, 3490 .chained = true, 3491 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3492 }, 3493 [STAC_INTEL_MAC_V2] = { 3494 .type = HDA_FIXUP_PINS, 3495 .v.pins = intel_mac_v2_pin_configs, 3496 .chained = true, 3497 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3498 }, 3499 [STAC_INTEL_MAC_V3] = { 3500 .type = HDA_FIXUP_PINS, 3501 .v.pins = intel_mac_v3_pin_configs, 3502 .chained = true, 3503 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3504 }, 3505 [STAC_INTEL_MAC_V4] = { 3506 .type = HDA_FIXUP_PINS, 3507 .v.pins = intel_mac_v4_pin_configs, 3508 .chained = true, 3509 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3510 }, 3511 [STAC_INTEL_MAC_V5] = { 3512 .type = HDA_FIXUP_PINS, 3513 .v.pins = intel_mac_v5_pin_configs, 3514 .chained = true, 3515 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3516 }, 3517 [STAC_922X_INTEL_MAC_GPIO] = { 3518 .type = HDA_FIXUP_FUNC, 3519 .v.func = stac922x_fixup_intel_mac_gpio, 3520 }, 3521 [STAC_ECS_202] = { 3522 .type = HDA_FIXUP_PINS, 3523 .v.pins = ecs202_pin_configs, 3524 }, 3525 [STAC_922X_DELL_D81] = { 3526 .type = HDA_FIXUP_PINS, 3527 .v.pins = dell_922x_d81_pin_configs, 3528 }, 3529 [STAC_922X_DELL_D82] = { 3530 .type = HDA_FIXUP_PINS, 3531 .v.pins = dell_922x_d82_pin_configs, 3532 }, 3533 [STAC_922X_DELL_M81] = { 3534 .type = HDA_FIXUP_PINS, 3535 .v.pins = dell_922x_m81_pin_configs, 3536 }, 3537 [STAC_922X_DELL_M82] = { 3538 .type = HDA_FIXUP_PINS, 3539 .v.pins = dell_922x_m82_pin_configs, 3540 }, 3541 }; 3542 3543 static const struct hda_model_fixup stac922x_models[] = { 3544 { .id = STAC_D945_REF, .name = "ref" }, 3545 { .id = STAC_D945GTP5, .name = "5stack" }, 3546 { .id = STAC_D945GTP3, .name = "3stack" }, 3547 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 3548 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 3549 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 3550 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 3551 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 3552 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 3553 { .id = STAC_ECS_202, .name = "ecs202" }, 3554 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 3555 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 3556 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 3557 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 3558 /* for backward compatibility */ 3559 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 3560 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 3561 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 3562 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 3563 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 3564 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 3565 {} 3566 }; 3567 3568 static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 3569 /* SigmaTel reference board */ 3570 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3571 "DFI LanParty", STAC_D945_REF), 3572 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3573 "DFI LanParty", STAC_D945_REF), 3574 /* Intel 945G based systems */ 3575 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 3576 "Intel D945G", STAC_D945GTP3), 3577 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 3578 "Intel D945G", STAC_D945GTP3), 3579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 3580 "Intel D945G", STAC_D945GTP3), 3581 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 3582 "Intel D945G", STAC_D945GTP3), 3583 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 3584 "Intel D945G", STAC_D945GTP3), 3585 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 3586 "Intel D945G", STAC_D945GTP3), 3587 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 3588 "Intel D945G", STAC_D945GTP3), 3589 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 3590 "Intel D945G", STAC_D945GTP3), 3591 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 3592 "Intel D945G", STAC_D945GTP3), 3593 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 3594 "Intel D945G", STAC_D945GTP3), 3595 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 3596 "Intel D945G", STAC_D945GTP3), 3597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 3598 "Intel D945G", STAC_D945GTP3), 3599 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 3600 "Intel D945G", STAC_D945GTP3), 3601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 3602 "Intel D945G", STAC_D945GTP3), 3603 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3604 "Intel D945G", STAC_D945GTP3), 3605 /* Intel D945G 5-stack systems */ 3606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3607 "Intel D945G", STAC_D945GTP5), 3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3609 "Intel D945G", STAC_D945GTP5), 3610 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3611 "Intel D945G", STAC_D945GTP5), 3612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3613 "Intel D945G", STAC_D945GTP5), 3614 /* Intel 945P based systems */ 3615 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3616 "Intel D945P", STAC_D945GTP3), 3617 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3618 "Intel D945P", STAC_D945GTP3), 3619 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3620 "Intel D945P", STAC_D945GTP3), 3621 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3622 "Intel D945P", STAC_D945GTP3), 3623 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3624 "Intel D945P", STAC_D945GTP3), 3625 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3626 "Intel D945P", STAC_D945GTP5), 3627 /* other intel */ 3628 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3629 "Intel D945", STAC_D945_REF), 3630 /* other systems */ 3631 3632 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3633 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3634 3635 /* Dell systems */ 3636 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3637 "unknown Dell", STAC_922X_DELL_D81), 3638 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3639 "unknown Dell", STAC_922X_DELL_D81), 3640 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3641 "unknown Dell", STAC_922X_DELL_D81), 3642 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3643 "unknown Dell", STAC_922X_DELL_D82), 3644 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3645 "unknown Dell", STAC_922X_DELL_M81), 3646 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3647 "unknown Dell", STAC_922X_DELL_D82), 3648 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3649 "unknown Dell", STAC_922X_DELL_D81), 3650 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3651 "unknown Dell", STAC_922X_DELL_D81), 3652 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3653 "Dell XPS M1210", STAC_922X_DELL_M82), 3654 /* ECS/PC Chips boards */ 3655 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3656 "ECS/PC chips", STAC_ECS_202), 3657 {} /* terminator */ 3658 }; 3659 3660 static const struct hda_pintbl ref927x_pin_configs[] = { 3661 { 0x0a, 0x02214020 }, 3662 { 0x0b, 0x02a19080 }, 3663 { 0x0c, 0x0181304e }, 3664 { 0x0d, 0x01014010 }, 3665 { 0x0e, 0x01a19040 }, 3666 { 0x0f, 0x01011012 }, 3667 { 0x10, 0x01016011 }, 3668 { 0x11, 0x0101201f }, 3669 { 0x12, 0x183301f0 }, 3670 { 0x13, 0x18a001f0 }, 3671 { 0x14, 0x18a001f0 }, 3672 { 0x21, 0x01442070 }, 3673 { 0x22, 0x01c42190 }, 3674 { 0x23, 0x40000100 }, 3675 {} 3676 }; 3677 3678 static const struct hda_pintbl d965_3st_pin_configs[] = { 3679 { 0x0a, 0x0221401f }, 3680 { 0x0b, 0x02a19120 }, 3681 { 0x0c, 0x40000100 }, 3682 { 0x0d, 0x01014011 }, 3683 { 0x0e, 0x01a19021 }, 3684 { 0x0f, 0x01813024 }, 3685 { 0x10, 0x40000100 }, 3686 { 0x11, 0x40000100 }, 3687 { 0x12, 0x40000100 }, 3688 { 0x13, 0x40000100 }, 3689 { 0x14, 0x40000100 }, 3690 { 0x21, 0x40000100 }, 3691 { 0x22, 0x40000100 }, 3692 { 0x23, 0x40000100 }, 3693 {} 3694 }; 3695 3696 static const struct hda_pintbl d965_5st_pin_configs[] = { 3697 { 0x0a, 0x02214020 }, 3698 { 0x0b, 0x02a19080 }, 3699 { 0x0c, 0x0181304e }, 3700 { 0x0d, 0x01014010 }, 3701 { 0x0e, 0x01a19040 }, 3702 { 0x0f, 0x01011012 }, 3703 { 0x10, 0x01016011 }, 3704 { 0x11, 0x40000100 }, 3705 { 0x12, 0x40000100 }, 3706 { 0x13, 0x40000100 }, 3707 { 0x14, 0x40000100 }, 3708 { 0x21, 0x01442070 }, 3709 { 0x22, 0x40000100 }, 3710 { 0x23, 0x40000100 }, 3711 {} 3712 }; 3713 3714 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3715 { 0x0a, 0x40000100 }, 3716 { 0x0b, 0x40000100 }, 3717 { 0x0c, 0x0181304e }, 3718 { 0x0d, 0x01014010 }, 3719 { 0x0e, 0x01a19040 }, 3720 { 0x0f, 0x01011012 }, 3721 { 0x10, 0x01016011 }, 3722 { 0x11, 0x40000100 }, 3723 { 0x12, 0x40000100 }, 3724 { 0x13, 0x40000100 }, 3725 { 0x14, 0x40000100 }, 3726 { 0x21, 0x01442070 }, 3727 { 0x22, 0x40000100 }, 3728 { 0x23, 0x40000100 }, 3729 {} 3730 }; 3731 3732 static const struct hda_pintbl dell_3st_pin_configs[] = { 3733 { 0x0a, 0x02211230 }, 3734 { 0x0b, 0x02a11220 }, 3735 { 0x0c, 0x01a19040 }, 3736 { 0x0d, 0x01114210 }, 3737 { 0x0e, 0x01111212 }, 3738 { 0x0f, 0x01116211 }, 3739 { 0x10, 0x01813050 }, 3740 { 0x11, 0x01112214 }, 3741 { 0x12, 0x403003fa }, 3742 { 0x13, 0x90a60040 }, 3743 { 0x14, 0x90a60040 }, 3744 { 0x21, 0x404003fb }, 3745 { 0x22, 0x40c003fc }, 3746 { 0x23, 0x40000100 }, 3747 {} 3748 }; 3749 3750 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3751 const struct hda_fixup *fix, int action) 3752 { 3753 /* no jack detecion for ref-no-jd model */ 3754 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3755 codec->no_jack_detect = 1; 3756 } 3757 3758 static void stac927x_fixup_ref(struct hda_codec *codec, 3759 const struct hda_fixup *fix, int action) 3760 { 3761 struct sigmatel_spec *spec = codec->spec; 3762 3763 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3764 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3765 spec->eapd_mask = spec->gpio_mask = 0; 3766 spec->gpio_dir = spec->gpio_data = 0; 3767 } 3768 } 3769 3770 static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3771 const struct hda_fixup *fix, int action) 3772 { 3773 struct sigmatel_spec *spec = codec->spec; 3774 3775 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3776 return; 3777 3778 if (codec->subsystem_id != 0x1028022f) { 3779 /* GPIO2 High = Enable EAPD */ 3780 spec->eapd_mask = spec->gpio_mask = 0x04; 3781 spec->gpio_dir = spec->gpio_data = 0x04; 3782 } 3783 3784 snd_hda_add_verbs(codec, dell_3st_core_init); 3785 spec->volknob_init = 1; 3786 } 3787 3788 static void stac927x_fixup_volknob(struct hda_codec *codec, 3789 const struct hda_fixup *fix, int action) 3790 { 3791 struct sigmatel_spec *spec = codec->spec; 3792 3793 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3794 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3795 spec->volknob_init = 1; 3796 } 3797 } 3798 3799 static const struct hda_fixup stac927x_fixups[] = { 3800 [STAC_D965_REF_NO_JD] = { 3801 .type = HDA_FIXUP_FUNC, 3802 .v.func = stac927x_fixup_ref_no_jd, 3803 .chained = true, 3804 .chain_id = STAC_D965_REF, 3805 }, 3806 [STAC_D965_REF] = { 3807 .type = HDA_FIXUP_FUNC, 3808 .v.func = stac927x_fixup_ref, 3809 }, 3810 [STAC_D965_3ST] = { 3811 .type = HDA_FIXUP_PINS, 3812 .v.pins = d965_3st_pin_configs, 3813 .chained = true, 3814 .chain_id = STAC_D965_VERBS, 3815 }, 3816 [STAC_D965_5ST] = { 3817 .type = HDA_FIXUP_PINS, 3818 .v.pins = d965_5st_pin_configs, 3819 .chained = true, 3820 .chain_id = STAC_D965_VERBS, 3821 }, 3822 [STAC_D965_VERBS] = { 3823 .type = HDA_FIXUP_VERBS, 3824 .v.verbs = d965_core_init, 3825 }, 3826 [STAC_D965_5ST_NO_FP] = { 3827 .type = HDA_FIXUP_PINS, 3828 .v.pins = d965_5st_no_fp_pin_configs, 3829 }, 3830 [STAC_DELL_3ST] = { 3831 .type = HDA_FIXUP_PINS, 3832 .v.pins = dell_3st_pin_configs, 3833 .chained = true, 3834 .chain_id = STAC_927X_DELL_DMIC, 3835 }, 3836 [STAC_DELL_BIOS] = { 3837 .type = HDA_FIXUP_PINS, 3838 .v.pins = (const struct hda_pintbl[]) { 3839 /* correct the front output jack as a hp out */ 3840 { 0x0f, 0x0221101f }, 3841 /* correct the front input jack as a mic */ 3842 { 0x0e, 0x02a79130 }, 3843 {} 3844 }, 3845 .chained = true, 3846 .chain_id = STAC_927X_DELL_DMIC, 3847 }, 3848 [STAC_DELL_BIOS_AMIC] = { 3849 .type = HDA_FIXUP_PINS, 3850 .v.pins = (const struct hda_pintbl[]) { 3851 /* configure the analog microphone on some laptops */ 3852 { 0x0c, 0x90a79130 }, 3853 {} 3854 }, 3855 .chained = true, 3856 .chain_id = STAC_DELL_BIOS, 3857 }, 3858 [STAC_DELL_BIOS_SPDIF] = { 3859 .type = HDA_FIXUP_PINS, 3860 .v.pins = (const struct hda_pintbl[]) { 3861 /* correct the device field to SPDIF out */ 3862 { 0x21, 0x01442070 }, 3863 {} 3864 }, 3865 .chained = true, 3866 .chain_id = STAC_DELL_BIOS, 3867 }, 3868 [STAC_927X_DELL_DMIC] = { 3869 .type = HDA_FIXUP_FUNC, 3870 .v.func = stac927x_fixup_dell_dmic, 3871 }, 3872 [STAC_927X_VOLKNOB] = { 3873 .type = HDA_FIXUP_FUNC, 3874 .v.func = stac927x_fixup_volknob, 3875 }, 3876 }; 3877 3878 static const struct hda_model_fixup stac927x_models[] = { 3879 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3880 { .id = STAC_D965_REF, .name = "ref" }, 3881 { .id = STAC_D965_3ST, .name = "3stack" }, 3882 { .id = STAC_D965_5ST, .name = "5stack" }, 3883 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3884 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3885 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3886 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3887 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3888 {} 3889 }; 3890 3891 static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3892 /* SigmaTel reference board */ 3893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3894 "DFI LanParty", STAC_D965_REF), 3895 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3896 "DFI LanParty", STAC_D965_REF), 3897 /* Intel 946 based systems */ 3898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3899 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3900 /* 965 based 3 stack systems */ 3901 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3902 "Intel D965", STAC_D965_3ST), 3903 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3904 "Intel D965", STAC_D965_3ST), 3905 /* Dell 3 stack systems */ 3906 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3907 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3908 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3909 /* Dell 3 stack systems with verb table in BIOS */ 3910 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3911 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3912 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3913 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3914 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3915 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3916 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3917 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 3918 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 3919 /* 965 based 5 stack systems */ 3920 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 3921 "Intel D965", STAC_D965_5ST), 3922 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 3923 "Intel D965", STAC_D965_5ST), 3924 /* volume-knob fixes */ 3925 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 3926 {} /* terminator */ 3927 }; 3928 3929 static const struct hda_pintbl ref9205_pin_configs[] = { 3930 { 0x0a, 0x40000100 }, 3931 { 0x0b, 0x40000100 }, 3932 { 0x0c, 0x01016011 }, 3933 { 0x0d, 0x01014010 }, 3934 { 0x0e, 0x01813122 }, 3935 { 0x0f, 0x01a19021 }, 3936 { 0x14, 0x01019020 }, 3937 { 0x16, 0x40000100 }, 3938 { 0x17, 0x90a000f0 }, 3939 { 0x18, 0x90a000f0 }, 3940 { 0x21, 0x01441030 }, 3941 { 0x22, 0x01c41030 }, 3942 {} 3943 }; 3944 3945 /* 3946 STAC 9205 pin configs for 3947 102801F1 3948 102801F2 3949 102801FC 3950 102801FD 3951 10280204 3952 1028021F 3953 10280228 (Dell Vostro 1500) 3954 10280229 (Dell Vostro 1700) 3955 */ 3956 static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 3957 { 0x0a, 0x0321101F }, 3958 { 0x0b, 0x03A11020 }, 3959 { 0x0c, 0x400003FA }, 3960 { 0x0d, 0x90170310 }, 3961 { 0x0e, 0x400003FB }, 3962 { 0x0f, 0x400003FC }, 3963 { 0x14, 0x400003FD }, 3964 { 0x16, 0x40F000F9 }, 3965 { 0x17, 0x90A60330 }, 3966 { 0x18, 0x400003FF }, 3967 { 0x21, 0x0144131F }, 3968 { 0x22, 0x40C003FE }, 3969 {} 3970 }; 3971 3972 /* 3973 STAC 9205 pin configs for 3974 102801F9 3975 102801FA 3976 102801FE 3977 102801FF (Dell Precision M4300) 3978 10280206 3979 10280200 3980 10280201 3981 */ 3982 static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 3983 { 0x0a, 0x0321101f }, 3984 { 0x0b, 0x03a11020 }, 3985 { 0x0c, 0x90a70330 }, 3986 { 0x0d, 0x90170310 }, 3987 { 0x0e, 0x400000fe }, 3988 { 0x0f, 0x400000ff }, 3989 { 0x14, 0x400000fd }, 3990 { 0x16, 0x40f000f9 }, 3991 { 0x17, 0x400000fa }, 3992 { 0x18, 0x400000fc }, 3993 { 0x21, 0x0144131f }, 3994 { 0x22, 0x40c003f8 }, 3995 /* Enable SPDIF in/out */ 3996 { 0x1f, 0x01441030 }, 3997 { 0x20, 0x1c410030 }, 3998 {} 3999 }; 4000 4001 static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 4002 { 0x0a, 0x0421101f }, 4003 { 0x0b, 0x04a11020 }, 4004 { 0x0c, 0x400003fa }, 4005 { 0x0d, 0x90170310 }, 4006 { 0x0e, 0x400003fb }, 4007 { 0x0f, 0x400003fc }, 4008 { 0x14, 0x400003fd }, 4009 { 0x16, 0x400003f9 }, 4010 { 0x17, 0x90a60330 }, 4011 { 0x18, 0x400003ff }, 4012 { 0x21, 0x01441340 }, 4013 { 0x22, 0x40c003fe }, 4014 {} 4015 }; 4016 4017 static void stac9205_fixup_ref(struct hda_codec *codec, 4018 const struct hda_fixup *fix, int action) 4019 { 4020 struct sigmatel_spec *spec = codec->spec; 4021 4022 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4023 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 4024 /* SPDIF-In enabled */ 4025 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 4026 } 4027 } 4028 4029 static void stac9205_fixup_dell_m43(struct hda_codec *codec, 4030 const struct hda_fixup *fix, int action) 4031 { 4032 struct sigmatel_spec *spec = codec->spec; 4033 struct hda_jack_callback *jack; 4034 4035 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4036 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 4037 4038 /* Enable unsol response for GPIO4/Dock HP connection */ 4039 snd_hda_codec_write_cache(codec, codec->afg, 0, 4040 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 4041 jack = snd_hda_jack_detect_enable_callback(codec, codec->afg, 4042 stac_vref_event); 4043 if (!IS_ERR(jack)) 4044 jack->private_data = 0x01; 4045 4046 spec->gpio_dir = 0x0b; 4047 spec->eapd_mask = 0x01; 4048 spec->gpio_mask = 0x1b; 4049 spec->gpio_mute = 0x10; 4050 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 4051 * GPIO3 Low = DRM 4052 */ 4053 spec->gpio_data = 0x01; 4054 } 4055 } 4056 4057 static void stac9205_fixup_eapd(struct hda_codec *codec, 4058 const struct hda_fixup *fix, int action) 4059 { 4060 struct sigmatel_spec *spec = codec->spec; 4061 4062 if (action == HDA_FIXUP_ACT_PRE_PROBE) 4063 spec->eapd_switch = 0; 4064 } 4065 4066 static const struct hda_fixup stac9205_fixups[] = { 4067 [STAC_9205_REF] = { 4068 .type = HDA_FIXUP_FUNC, 4069 .v.func = stac9205_fixup_ref, 4070 }, 4071 [STAC_9205_DELL_M42] = { 4072 .type = HDA_FIXUP_PINS, 4073 .v.pins = dell_9205_m42_pin_configs, 4074 }, 4075 [STAC_9205_DELL_M43] = { 4076 .type = HDA_FIXUP_FUNC, 4077 .v.func = stac9205_fixup_dell_m43, 4078 }, 4079 [STAC_9205_DELL_M44] = { 4080 .type = HDA_FIXUP_PINS, 4081 .v.pins = dell_9205_m44_pin_configs, 4082 }, 4083 [STAC_9205_EAPD] = { 4084 .type = HDA_FIXUP_FUNC, 4085 .v.func = stac9205_fixup_eapd, 4086 }, 4087 {} 4088 }; 4089 4090 static const struct hda_model_fixup stac9205_models[] = { 4091 { .id = STAC_9205_REF, .name = "ref" }, 4092 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 4093 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 4094 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 4095 { .id = STAC_9205_EAPD, .name = "eapd" }, 4096 {} 4097 }; 4098 4099 static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 4100 /* SigmaTel reference board */ 4101 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 4102 "DFI LanParty", STAC_9205_REF), 4103 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 4104 "SigmaTel", STAC_9205_REF), 4105 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 4106 "DFI LanParty", STAC_9205_REF), 4107 /* Dell */ 4108 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 4109 "unknown Dell", STAC_9205_DELL_M42), 4110 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 4111 "unknown Dell", STAC_9205_DELL_M42), 4112 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 4113 "Dell Precision", STAC_9205_DELL_M43), 4114 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 4115 "Dell Precision", STAC_9205_DELL_M43), 4116 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 4117 "Dell Precision", STAC_9205_DELL_M43), 4118 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 4119 "unknown Dell", STAC_9205_DELL_M42), 4120 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 4121 "unknown Dell", STAC_9205_DELL_M42), 4122 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 4123 "Dell Precision", STAC_9205_DELL_M43), 4124 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 4125 "Dell Precision M4300", STAC_9205_DELL_M43), 4126 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 4127 "unknown Dell", STAC_9205_DELL_M42), 4128 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 4129 "Dell Precision", STAC_9205_DELL_M43), 4130 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 4131 "Dell Precision", STAC_9205_DELL_M43), 4132 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 4133 "Dell Precision", STAC_9205_DELL_M43), 4134 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 4135 "Dell Inspiron", STAC_9205_DELL_M44), 4136 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 4137 "Dell Vostro 1500", STAC_9205_DELL_M42), 4138 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 4139 "Dell Vostro 1700", STAC_9205_DELL_M42), 4140 /* Gateway */ 4141 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 4142 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 4143 {} /* terminator */ 4144 }; 4145 4146 static void stac92hd95_fixup_hp_led(struct hda_codec *codec, 4147 const struct hda_fixup *fix, int action) 4148 { 4149 struct sigmatel_spec *spec = codec->spec; 4150 4151 if (action != HDA_FIXUP_ACT_PRE_PROBE) 4152 return; 4153 4154 if (find_mute_led_cfg(codec, spec->default_polarity)) 4155 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 4156 spec->gpio_led, 4157 spec->gpio_led_polarity); 4158 } 4159 4160 static const struct hda_fixup stac92hd95_fixups[] = { 4161 [STAC_92HD95_HP_LED] = { 4162 .type = HDA_FIXUP_FUNC, 4163 .v.func = stac92hd95_fixup_hp_led, 4164 }, 4165 [STAC_92HD95_HP_BASS] = { 4166 .type = HDA_FIXUP_VERBS, 4167 .v.verbs = (const struct hda_verb[]) { 4168 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */ 4169 {} 4170 }, 4171 .chained = true, 4172 .chain_id = STAC_92HD95_HP_LED, 4173 }, 4174 }; 4175 4176 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { 4177 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), 4178 {} /* terminator */ 4179 }; 4180 4181 static const struct hda_model_fixup stac92hd95_models[] = { 4182 { .id = STAC_92HD95_HP_LED, .name = "hp-led" }, 4183 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" }, 4184 {} 4185 }; 4186 4187 4188 static int stac_parse_auto_config(struct hda_codec *codec) 4189 { 4190 struct sigmatel_spec *spec = codec->spec; 4191 int err; 4192 int flags = 0; 4193 4194 if (spec->headset_jack) 4195 flags |= HDA_PINCFG_HEADSET_MIC; 4196 4197 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 4198 if (err < 0) 4199 return err; 4200 4201 /* add hooks */ 4202 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 4203 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 4204 4205 spec->gen.automute_hook = stac_update_outputs; 4206 4207 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 4208 if (err < 0) 4209 return err; 4210 4211 /* setup analog beep controls */ 4212 if (spec->anabeep_nid > 0) { 4213 err = stac_auto_create_beep_ctls(codec, 4214 spec->anabeep_nid); 4215 if (err < 0) 4216 return err; 4217 } 4218 4219 /* setup digital beep controls and input device */ 4220 #ifdef CONFIG_SND_HDA_INPUT_BEEP 4221 if (spec->gen.beep_nid) { 4222 hda_nid_t nid = spec->gen.beep_nid; 4223 unsigned int caps; 4224 4225 err = stac_auto_create_beep_ctls(codec, nid); 4226 if (err < 0) 4227 return err; 4228 if (codec->beep) { 4229 /* IDT/STAC codecs have linear beep tone parameter */ 4230 codec->beep->linear_tone = spec->linear_tone_beep; 4231 /* if no beep switch is available, make its own one */ 4232 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 4233 if (!(caps & AC_AMPCAP_MUTE)) { 4234 err = stac_beep_switch_ctl(codec); 4235 if (err < 0) 4236 return err; 4237 } 4238 } 4239 } 4240 #endif 4241 4242 if (spec->gpio_led) 4243 spec->gen.vmaster_mute.hook = stac_vmaster_hook; 4244 4245 if (spec->aloopback_ctl && 4246 snd_hda_get_bool_hint(codec, "loopback") == 1) { 4247 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 4248 return -ENOMEM; 4249 } 4250 4251 if (spec->have_spdif_mux) { 4252 err = stac_create_spdif_mux_ctls(codec); 4253 if (err < 0) 4254 return err; 4255 } 4256 4257 stac_init_power_map(codec); 4258 4259 return 0; 4260 } 4261 4262 static int stac_init(struct hda_codec *codec) 4263 { 4264 struct sigmatel_spec *spec = codec->spec; 4265 int i; 4266 4267 /* override some hints */ 4268 stac_store_hints(codec); 4269 4270 /* set up GPIO */ 4271 /* turn on EAPD statically when spec->eapd_switch isn't set. 4272 * otherwise, unsol event will turn it on/off dynamically 4273 */ 4274 if (!spec->eapd_switch) 4275 spec->gpio_data |= spec->eapd_mask; 4276 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 4277 4278 snd_hda_gen_init(codec); 4279 4280 /* sync the power-map */ 4281 if (spec->num_pwrs) 4282 snd_hda_codec_write(codec, codec->afg, 0, 4283 AC_VERB_IDT_SET_POWER_MAP, 4284 spec->power_map_bits); 4285 4286 /* power down inactive ADCs */ 4287 if (spec->powerdown_adcs) { 4288 for (i = 0; i < spec->gen.num_all_adcs; i++) { 4289 if (spec->active_adcs & (1 << i)) 4290 continue; 4291 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 4292 AC_VERB_SET_POWER_STATE, 4293 AC_PWRST_D3); 4294 } 4295 } 4296 4297 return 0; 4298 } 4299 4300 static void stac_shutup(struct hda_codec *codec) 4301 { 4302 struct sigmatel_spec *spec = codec->spec; 4303 4304 snd_hda_shutup_pins(codec); 4305 4306 if (spec->eapd_mask) 4307 stac_gpio_set(codec, spec->gpio_mask, 4308 spec->gpio_dir, spec->gpio_data & 4309 ~spec->eapd_mask); 4310 } 4311 4312 #define stac_free snd_hda_gen_free 4313 4314 #ifdef CONFIG_PROC_FS 4315 static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 4316 struct hda_codec *codec, hda_nid_t nid) 4317 { 4318 if (nid == codec->afg) 4319 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 4320 snd_hda_codec_read(codec, nid, 0, 4321 AC_VERB_IDT_GET_POWER_MAP, 0)); 4322 } 4323 4324 static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 4325 struct hda_codec *codec, 4326 unsigned int verb) 4327 { 4328 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 4329 snd_hda_codec_read(codec, codec->afg, 0, verb, 0)); 4330 } 4331 4332 /* stac92hd71bxx, stac92hd73xx */ 4333 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 4334 struct hda_codec *codec, hda_nid_t nid) 4335 { 4336 stac92hd_proc_hook(buffer, codec, nid); 4337 if (nid == codec->afg) 4338 analog_loop_proc_hook(buffer, codec, 0xfa0); 4339 } 4340 4341 static void stac9205_proc_hook(struct snd_info_buffer *buffer, 4342 struct hda_codec *codec, hda_nid_t nid) 4343 { 4344 if (nid == codec->afg) 4345 analog_loop_proc_hook(buffer, codec, 0xfe0); 4346 } 4347 4348 static void stac927x_proc_hook(struct snd_info_buffer *buffer, 4349 struct hda_codec *codec, hda_nid_t nid) 4350 { 4351 if (nid == codec->afg) 4352 analog_loop_proc_hook(buffer, codec, 0xfeb); 4353 } 4354 #else 4355 #define stac92hd_proc_hook NULL 4356 #define stac92hd7x_proc_hook NULL 4357 #define stac9205_proc_hook NULL 4358 #define stac927x_proc_hook NULL 4359 #endif 4360 4361 #ifdef CONFIG_PM 4362 static int stac_suspend(struct hda_codec *codec) 4363 { 4364 stac_shutup(codec); 4365 return 0; 4366 } 4367 #else 4368 #define stac_suspend NULL 4369 #endif /* CONFIG_PM */ 4370 4371 static const struct hda_codec_ops stac_patch_ops = { 4372 .build_controls = snd_hda_gen_build_controls, 4373 .build_pcms = snd_hda_gen_build_pcms, 4374 .init = stac_init, 4375 .free = stac_free, 4376 .unsol_event = snd_hda_jack_unsol_event, 4377 #ifdef CONFIG_PM 4378 .suspend = stac_suspend, 4379 #endif 4380 .reboot_notify = stac_shutup, 4381 }; 4382 4383 static int alloc_stac_spec(struct hda_codec *codec) 4384 { 4385 struct sigmatel_spec *spec; 4386 4387 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 4388 if (!spec) 4389 return -ENOMEM; 4390 snd_hda_gen_spec_init(&spec->gen); 4391 codec->spec = spec; 4392 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 4393 spec->gen.dac_min_mute = true; 4394 return 0; 4395 } 4396 4397 static int patch_stac9200(struct hda_codec *codec) 4398 { 4399 struct sigmatel_spec *spec; 4400 int err; 4401 4402 err = alloc_stac_spec(codec); 4403 if (err < 0) 4404 return err; 4405 4406 spec = codec->spec; 4407 spec->linear_tone_beep = 1; 4408 spec->gen.own_eapd_ctl = 1; 4409 4410 codec->patch_ops = stac_patch_ops; 4411 codec->power_filter = snd_hda_codec_eapd_power_filter; 4412 4413 snd_hda_add_verbs(codec, stac9200_eapd_init); 4414 4415 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 4416 stac9200_fixups); 4417 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4418 4419 err = stac_parse_auto_config(codec); 4420 if (err < 0) { 4421 stac_free(codec); 4422 return err; 4423 } 4424 4425 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4426 4427 return 0; 4428 } 4429 4430 static int patch_stac925x(struct hda_codec *codec) 4431 { 4432 struct sigmatel_spec *spec; 4433 int err; 4434 4435 err = alloc_stac_spec(codec); 4436 if (err < 0) 4437 return err; 4438 4439 spec = codec->spec; 4440 spec->linear_tone_beep = 1; 4441 spec->gen.own_eapd_ctl = 1; 4442 4443 codec->patch_ops = stac_patch_ops; 4444 4445 snd_hda_add_verbs(codec, stac925x_core_init); 4446 4447 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 4448 stac925x_fixups); 4449 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4450 4451 err = stac_parse_auto_config(codec); 4452 if (err < 0) { 4453 stac_free(codec); 4454 return err; 4455 } 4456 4457 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4458 4459 return 0; 4460 } 4461 4462 static int patch_stac92hd73xx(struct hda_codec *codec) 4463 { 4464 struct sigmatel_spec *spec; 4465 int err; 4466 int num_dacs; 4467 4468 err = alloc_stac_spec(codec); 4469 if (err < 0) 4470 return err; 4471 4472 spec = codec->spec; 4473 spec->linear_tone_beep = 0; 4474 spec->gen.mixer_nid = 0x1d; 4475 spec->have_spdif_mux = 1; 4476 4477 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 4478 if (num_dacs < 3 || num_dacs > 5) { 4479 codec_warn(codec, 4480 "Could not determine number of channels defaulting to DAC count\n"); 4481 num_dacs = 5; 4482 } 4483 4484 switch (num_dacs) { 4485 case 0x3: /* 6 Channel */ 4486 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 4487 break; 4488 case 0x4: /* 8 Channel */ 4489 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 4490 break; 4491 case 0x5: /* 10 Channel */ 4492 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 4493 break; 4494 } 4495 4496 spec->aloopback_mask = 0x01; 4497 spec->aloopback_shift = 8; 4498 4499 spec->gen.beep_nid = 0x1c; /* digital beep */ 4500 4501 /* GPIO0 High = Enable EAPD */ 4502 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4503 spec->gpio_data = 0x01; 4504 4505 spec->eapd_switch = 1; 4506 4507 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 4508 spec->pwr_nids = stac92hd73xx_pwr_nids; 4509 4510 spec->gen.own_eapd_ctl = 1; 4511 spec->gen.power_down_unused = 1; 4512 4513 codec->patch_ops = stac_patch_ops; 4514 4515 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 4516 stac92hd73xx_fixups); 4517 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4518 4519 if (!spec->volknob_init) 4520 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 4521 4522 err = stac_parse_auto_config(codec); 4523 if (err < 0) { 4524 stac_free(codec); 4525 return err; 4526 } 4527 4528 /* Don't GPIO-mute speakers if there are no internal speakers, because 4529 * the GPIO might be necessary for Headphone 4530 */ 4531 if (spec->eapd_switch && !has_builtin_speaker(codec)) 4532 spec->eapd_switch = 0; 4533 4534 codec->proc_widget_hook = stac92hd7x_proc_hook; 4535 4536 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4537 4538 return 0; 4539 } 4540 4541 static void stac_setup_gpio(struct hda_codec *codec) 4542 { 4543 struct sigmatel_spec *spec = codec->spec; 4544 4545 spec->gpio_mask |= spec->eapd_mask; 4546 if (spec->gpio_led) { 4547 if (!spec->vref_mute_led_nid) { 4548 spec->gpio_mask |= spec->gpio_led; 4549 spec->gpio_dir |= spec->gpio_led; 4550 spec->gpio_data |= spec->gpio_led; 4551 } else { 4552 codec->power_filter = stac_vref_led_power_filter; 4553 } 4554 } 4555 4556 if (spec->mic_mute_led_gpio) { 4557 spec->gpio_mask |= spec->mic_mute_led_gpio; 4558 spec->gpio_dir |= spec->mic_mute_led_gpio; 4559 spec->mic_enabled = 0; 4560 spec->gpio_data |= spec->mic_mute_led_gpio; 4561 4562 spec->gen.cap_sync_hook = stac_capture_led_hook; 4563 } 4564 } 4565 4566 static int patch_stac92hd83xxx(struct hda_codec *codec) 4567 { 4568 struct sigmatel_spec *spec; 4569 int err; 4570 4571 err = alloc_stac_spec(codec); 4572 if (err < 0) 4573 return err; 4574 4575 codec->epss = 0; /* longer delay needed for D3 */ 4576 4577 spec = codec->spec; 4578 spec->linear_tone_beep = 0; 4579 spec->gen.own_eapd_ctl = 1; 4580 spec->gen.power_down_unused = 1; 4581 spec->gen.mixer_nid = 0x1b; 4582 4583 spec->gen.beep_nid = 0x21; /* digital beep */ 4584 spec->pwr_nids = stac92hd83xxx_pwr_nids; 4585 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 4586 spec->default_polarity = -1; /* no default cfg */ 4587 4588 codec->patch_ops = stac_patch_ops; 4589 4590 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 4591 4592 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 4593 stac92hd83xxx_fixups); 4594 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4595 4596 stac_setup_gpio(codec); 4597 4598 err = stac_parse_auto_config(codec); 4599 if (err < 0) { 4600 stac_free(codec); 4601 return err; 4602 } 4603 4604 codec->proc_widget_hook = stac92hd_proc_hook; 4605 4606 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4607 4608 return 0; 4609 } 4610 4611 static const hda_nid_t stac92hd95_pwr_nids[] = { 4612 0x0a, 0x0b, 0x0c, 0x0d 4613 }; 4614 4615 static int patch_stac92hd95(struct hda_codec *codec) 4616 { 4617 struct sigmatel_spec *spec; 4618 int err; 4619 4620 err = alloc_stac_spec(codec); 4621 if (err < 0) 4622 return err; 4623 4624 codec->epss = 0; /* longer delay needed for D3 */ 4625 4626 spec = codec->spec; 4627 spec->linear_tone_beep = 0; 4628 spec->gen.own_eapd_ctl = 1; 4629 spec->gen.power_down_unused = 1; 4630 4631 spec->gen.beep_nid = 0x19; /* digital beep */ 4632 spec->pwr_nids = stac92hd95_pwr_nids; 4633 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4634 spec->default_polarity = 0; 4635 4636 codec->patch_ops = stac_patch_ops; 4637 4638 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl, 4639 stac92hd95_fixups); 4640 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4641 4642 stac_setup_gpio(codec); 4643 4644 err = stac_parse_auto_config(codec); 4645 if (err < 0) { 4646 stac_free(codec); 4647 return err; 4648 } 4649 4650 codec->proc_widget_hook = stac92hd_proc_hook; 4651 4652 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4653 4654 return 0; 4655 } 4656 4657 static int patch_stac92hd71bxx(struct hda_codec *codec) 4658 { 4659 struct sigmatel_spec *spec; 4660 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; 4661 int err; 4662 4663 err = alloc_stac_spec(codec); 4664 if (err < 0) 4665 return err; 4666 4667 spec = codec->spec; 4668 spec->linear_tone_beep = 0; 4669 spec->gen.own_eapd_ctl = 1; 4670 spec->gen.power_down_unused = 1; 4671 spec->gen.mixer_nid = 0x17; 4672 spec->have_spdif_mux = 1; 4673 4674 codec->patch_ops = stac_patch_ops; 4675 4676 /* GPIO0 = EAPD */ 4677 spec->gpio_mask = 0x01; 4678 spec->gpio_dir = 0x01; 4679 spec->gpio_data = 0x01; 4680 4681 switch (codec->vendor_id) { 4682 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4683 case 0x111d76b7: 4684 unmute_init++; 4685 break; 4686 case 0x111d7608: /* 5 Port with Analog Mixer */ 4687 if ((codec->revision_id & 0xf) == 0 || 4688 (codec->revision_id & 0xf) == 1) 4689 spec->stream_delay = 40; /* 40 milliseconds */ 4690 4691 /* disable VSW */ 4692 unmute_init++; 4693 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4694 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4695 break; 4696 case 0x111d7603: /* 6 Port with Analog Mixer */ 4697 if ((codec->revision_id & 0xf) == 1) 4698 spec->stream_delay = 40; /* 40 milliseconds */ 4699 4700 break; 4701 } 4702 4703 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4704 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4705 4706 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) 4707 snd_hda_sequence_write_cache(codec, unmute_init); 4708 4709 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4710 spec->aloopback_mask = 0x50; 4711 spec->aloopback_shift = 0; 4712 4713 spec->powerdown_adcs = 1; 4714 spec->gen.beep_nid = 0x26; /* digital beep */ 4715 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4716 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4717 4718 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4719 stac92hd71bxx_fixups); 4720 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4721 4722 stac_setup_gpio(codec); 4723 4724 err = stac_parse_auto_config(codec); 4725 if (err < 0) { 4726 stac_free(codec); 4727 return err; 4728 } 4729 4730 codec->proc_widget_hook = stac92hd7x_proc_hook; 4731 4732 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4733 4734 return 0; 4735 } 4736 4737 static int patch_stac922x(struct hda_codec *codec) 4738 { 4739 struct sigmatel_spec *spec; 4740 int err; 4741 4742 err = alloc_stac_spec(codec); 4743 if (err < 0) 4744 return err; 4745 4746 spec = codec->spec; 4747 spec->linear_tone_beep = 1; 4748 spec->gen.own_eapd_ctl = 1; 4749 4750 codec->patch_ops = stac_patch_ops; 4751 4752 snd_hda_add_verbs(codec, stac922x_core_init); 4753 4754 /* Fix Mux capture level; max to 2 */ 4755 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4756 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4757 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4758 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4759 (0 << AC_AMPCAP_MUTE_SHIFT)); 4760 4761 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4762 stac922x_fixups); 4763 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4764 4765 err = stac_parse_auto_config(codec); 4766 if (err < 0) { 4767 stac_free(codec); 4768 return err; 4769 } 4770 4771 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4772 4773 return 0; 4774 } 4775 4776 static const char * const stac927x_spdif_labels[] = { 4777 "Digital Playback", "ADAT", "Analog Mux 1", 4778 "Analog Mux 2", "Analog Mux 3", NULL 4779 }; 4780 4781 static int patch_stac927x(struct hda_codec *codec) 4782 { 4783 struct sigmatel_spec *spec; 4784 int err; 4785 4786 err = alloc_stac_spec(codec); 4787 if (err < 0) 4788 return err; 4789 4790 spec = codec->spec; 4791 spec->linear_tone_beep = 1; 4792 spec->gen.own_eapd_ctl = 1; 4793 spec->have_spdif_mux = 1; 4794 spec->spdif_labels = stac927x_spdif_labels; 4795 4796 spec->gen.beep_nid = 0x23; /* digital beep */ 4797 4798 /* GPIO0 High = Enable EAPD */ 4799 spec->eapd_mask = spec->gpio_mask = 0x01; 4800 spec->gpio_dir = spec->gpio_data = 0x01; 4801 4802 spec->aloopback_ctl = &stac927x_loopback; 4803 spec->aloopback_mask = 0x40; 4804 spec->aloopback_shift = 0; 4805 spec->eapd_switch = 1; 4806 4807 codec->patch_ops = stac_patch_ops; 4808 4809 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4810 stac927x_fixups); 4811 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4812 4813 if (!spec->volknob_init) 4814 snd_hda_add_verbs(codec, stac927x_core_init); 4815 4816 err = stac_parse_auto_config(codec); 4817 if (err < 0) { 4818 stac_free(codec); 4819 return err; 4820 } 4821 4822 codec->proc_widget_hook = stac927x_proc_hook; 4823 4824 /* 4825 * !!FIXME!! 4826 * The STAC927x seem to require fairly long delays for certain 4827 * command sequences. With too short delays (even if the answer 4828 * is set to RIRB properly), it results in the silence output 4829 * on some hardwares like Dell. 4830 * 4831 * The below flag enables the longer delay (see get_response 4832 * in hda_intel.c). 4833 */ 4834 codec->bus->needs_damn_long_delay = 1; 4835 4836 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4837 4838 return 0; 4839 } 4840 4841 static int patch_stac9205(struct hda_codec *codec) 4842 { 4843 struct sigmatel_spec *spec; 4844 int err; 4845 4846 err = alloc_stac_spec(codec); 4847 if (err < 0) 4848 return err; 4849 4850 spec = codec->spec; 4851 spec->linear_tone_beep = 1; 4852 spec->gen.own_eapd_ctl = 1; 4853 spec->have_spdif_mux = 1; 4854 4855 spec->gen.beep_nid = 0x23; /* digital beep */ 4856 4857 snd_hda_add_verbs(codec, stac9205_core_init); 4858 spec->aloopback_ctl = &stac9205_loopback; 4859 4860 spec->aloopback_mask = 0x40; 4861 spec->aloopback_shift = 0; 4862 4863 /* GPIO0 High = EAPD */ 4864 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4865 spec->gpio_data = 0x01; 4866 4867 /* Turn on/off EAPD per HP plugging */ 4868 spec->eapd_switch = 1; 4869 4870 codec->patch_ops = stac_patch_ops; 4871 4872 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4873 stac9205_fixups); 4874 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4875 4876 err = stac_parse_auto_config(codec); 4877 if (err < 0) { 4878 stac_free(codec); 4879 return err; 4880 } 4881 4882 codec->proc_widget_hook = stac9205_proc_hook; 4883 4884 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4885 4886 return 0; 4887 } 4888 4889 /* 4890 * STAC9872 hack 4891 */ 4892 4893 static const struct hda_verb stac9872_core_init[] = { 4894 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4895 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4896 {} 4897 }; 4898 4899 static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4900 { 0x0a, 0x03211020 }, 4901 { 0x0b, 0x411111f0 }, 4902 { 0x0c, 0x411111f0 }, 4903 { 0x0d, 0x03a15030 }, 4904 { 0x0e, 0x411111f0 }, 4905 { 0x0f, 0x90170110 }, 4906 { 0x11, 0x411111f0 }, 4907 { 0x13, 0x411111f0 }, 4908 { 0x14, 0x90a7013e }, 4909 {} 4910 }; 4911 4912 static const struct hda_model_fixup stac9872_models[] = { 4913 { .id = STAC_9872_VAIO, .name = "vaio" }, 4914 {} 4915 }; 4916 4917 static const struct hda_fixup stac9872_fixups[] = { 4918 [STAC_9872_VAIO] = { 4919 .type = HDA_FIXUP_PINS, 4920 .v.pins = stac9872_vaio_pin_configs, 4921 }, 4922 }; 4923 4924 static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 4925 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 4926 "Sony VAIO F/S", STAC_9872_VAIO), 4927 {} /* terminator */ 4928 }; 4929 4930 static int patch_stac9872(struct hda_codec *codec) 4931 { 4932 struct sigmatel_spec *spec; 4933 int err; 4934 4935 err = alloc_stac_spec(codec); 4936 if (err < 0) 4937 return err; 4938 4939 spec = codec->spec; 4940 spec->linear_tone_beep = 1; 4941 spec->gen.own_eapd_ctl = 1; 4942 4943 codec->patch_ops = stac_patch_ops; 4944 4945 snd_hda_add_verbs(codec, stac9872_core_init); 4946 4947 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 4948 stac9872_fixups); 4949 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4950 4951 err = stac_parse_auto_config(codec); 4952 if (err < 0) { 4953 stac_free(codec); 4954 return -EINVAL; 4955 } 4956 4957 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4958 4959 return 0; 4960 } 4961 4962 4963 /* 4964 * patch entries 4965 */ 4966 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = { 4967 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, 4968 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, 4969 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, 4970 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, 4971 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, 4972 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, 4973 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, 4974 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, 4975 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, 4976 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, 4977 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, 4978 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, 4979 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, 4980 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, 4981 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, 4982 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, 4983 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, 4984 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, 4985 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, 4986 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, 4987 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, 4988 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, 4989 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, 4990 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, 4991 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, 4992 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, 4993 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, 4994 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, 4995 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, 4996 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x }, 4997 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x }, 4998 /* The following does not take into account .id=0x83847661 when subsys = 4999 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 5000 * currently not fully supported. 5001 */ 5002 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, 5003 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, 5004 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, 5005 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 }, 5006 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, 5007 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, 5008 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, 5009 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, 5010 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, 5011 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, 5012 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, 5013 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, 5014 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx}, 5015 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx}, 5016 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx}, 5017 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx}, 5018 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx}, 5019 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx}, 5020 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx}, 5021 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx}, 5022 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx}, 5023 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx}, 5024 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx}, 5025 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx}, 5026 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, 5027 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, 5028 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, 5029 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 }, 5030 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5031 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5032 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5033 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5034 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5035 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5036 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5037 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5038 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx }, 5039 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx }, 5040 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx }, 5041 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx }, 5042 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx }, 5043 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx }, 5044 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx }, 5045 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx }, 5046 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx }, 5047 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx }, 5048 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx }, 5049 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx }, 5050 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx }, 5051 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, 5052 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, 5053 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx}, 5054 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, 5055 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx}, 5056 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx}, 5057 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, 5058 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx}, 5059 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx}, 5060 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx}, 5061 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx}, 5062 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx}, 5063 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx}, 5064 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx}, 5065 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx}, 5066 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx}, 5067 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx}, 5068 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx}, 5069 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx}, 5070 {} /* terminator */ 5071 }; 5072 5073 MODULE_ALIAS("snd-hda-codec-id:8384*"); 5074 MODULE_ALIAS("snd-hda-codec-id:111d*"); 5075 5076 MODULE_LICENSE("GPL"); 5077 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 5078 5079 static struct hda_codec_preset_list sigmatel_list = { 5080 .preset = snd_hda_preset_sigmatel, 5081 .owner = THIS_MODULE, 5082 }; 5083 5084 static int __init patch_sigmatel_init(void) 5085 { 5086 return snd_hda_add_codec_preset(&sigmatel_list); 5087 } 5088 5089 static void __exit patch_sigmatel_exit(void) 5090 { 5091 snd_hda_delete_codec_preset(&sigmatel_list); 5092 } 5093 5094 module_init(patch_sigmatel_init) 5095 module_exit(patch_sigmatel_exit) 5096