1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Universal Interface for Intel High Definition Audio Codec 4 * 5 * HD audio interface patch for SigmaTel STAC92xx 6 * 7 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 8 * Matt Porter <mporter@embeddedalley.com> 9 * 10 * Based on patch_cmedia.c and patch_realtek.c 11 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 12 */ 13 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/slab.h> 17 #include <linux/pci.h> 18 #include <linux/dmi.h> 19 #include <linux/module.h> 20 #include <sound/core.h> 21 #include <sound/jack.h> 22 #include <sound/hda_codec.h> 23 #include "hda_local.h" 24 #include "hda_auto_parser.h" 25 #include "hda_beep.h" 26 #include "hda_jack.h" 27 #include "hda_generic.h" 28 29 enum { 30 STAC_REF, 31 STAC_9200_OQO, 32 STAC_9200_DELL_D21, 33 STAC_9200_DELL_D22, 34 STAC_9200_DELL_D23, 35 STAC_9200_DELL_M21, 36 STAC_9200_DELL_M22, 37 STAC_9200_DELL_M23, 38 STAC_9200_DELL_M24, 39 STAC_9200_DELL_M25, 40 STAC_9200_DELL_M26, 41 STAC_9200_DELL_M27, 42 STAC_9200_M4, 43 STAC_9200_M4_2, 44 STAC_9200_PANASONIC, 45 STAC_9200_EAPD_INIT, 46 STAC_9200_MODELS 47 }; 48 49 enum { 50 STAC_9205_REF, 51 STAC_9205_DELL_M42, 52 STAC_9205_DELL_M43, 53 STAC_9205_DELL_M44, 54 STAC_9205_EAPD, 55 STAC_9205_MODELS 56 }; 57 58 enum { 59 STAC_92HD73XX_NO_JD, /* no jack-detection */ 60 STAC_92HD73XX_REF, 61 STAC_92HD73XX_INTEL, 62 STAC_DELL_M6_AMIC, 63 STAC_DELL_M6_DMIC, 64 STAC_DELL_M6_BOTH, 65 STAC_DELL_EQ, 66 STAC_ALIENWARE_M17X, 67 STAC_ELO_VUPOINT_15MX, 68 STAC_92HD89XX_HP_FRONT_JACK, 69 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK, 70 STAC_92HD73XX_ASUS_MOBO, 71 STAC_92HD73XX_MODELS 72 }; 73 74 enum { 75 STAC_92HD83XXX_REF, 76 STAC_92HD83XXX_PWR_REF, 77 STAC_DELL_S14, 78 STAC_DELL_VOSTRO_3500, 79 STAC_92HD83XXX_HP_cNB11_INTQUAD, 80 STAC_HP_DV7_4000, 81 STAC_HP_ZEPHYR, 82 STAC_92HD83XXX_HP_LED, 83 STAC_92HD83XXX_HP_INV_LED, 84 STAC_92HD83XXX_HP_MIC_LED, 85 STAC_HP_LED_GPIO10, 86 STAC_92HD83XXX_HEADSET_JACK, 87 STAC_92HD83XXX_HP, 88 STAC_HP_ENVY_BASS, 89 STAC_HP_BNB13_EQ, 90 STAC_HP_ENVY_TS_BASS, 91 STAC_HP_ENVY_TS_DAC_BIND, 92 STAC_92HD83XXX_GPIO10_EAPD, 93 STAC_92HD83XXX_MODELS 94 }; 95 96 enum { 97 STAC_92HD71BXX_REF, 98 STAC_DELL_M4_1, 99 STAC_DELL_M4_2, 100 STAC_DELL_M4_3, 101 STAC_HP_M4, 102 STAC_HP_DV4, 103 STAC_HP_DV5, 104 STAC_HP_HDX, 105 STAC_92HD71BXX_HP, 106 STAC_92HD71BXX_NO_DMIC, 107 STAC_92HD71BXX_NO_SMUX, 108 STAC_92HD71BXX_MODELS 109 }; 110 111 enum { 112 STAC_92HD95_HP_LED, 113 STAC_92HD95_HP_BASS, 114 STAC_92HD95_MODELS 115 }; 116 117 enum { 118 STAC_925x_REF, 119 STAC_M1, 120 STAC_M1_2, 121 STAC_M2, 122 STAC_M2_2, 123 STAC_M3, 124 STAC_M5, 125 STAC_M6, 126 STAC_925x_MODELS 127 }; 128 129 enum { 130 STAC_D945_REF, 131 STAC_D945GTP3, 132 STAC_D945GTP5, 133 STAC_INTEL_MAC_V1, 134 STAC_INTEL_MAC_V2, 135 STAC_INTEL_MAC_V3, 136 STAC_INTEL_MAC_V4, 137 STAC_INTEL_MAC_V5, 138 STAC_INTEL_MAC_AUTO, 139 STAC_ECS_202, 140 STAC_922X_DELL_D81, 141 STAC_922X_DELL_D82, 142 STAC_922X_DELL_M81, 143 STAC_922X_DELL_M82, 144 STAC_922X_INTEL_MAC_GPIO, 145 STAC_922X_MODELS 146 }; 147 148 enum { 149 STAC_D965_REF_NO_JD, /* no jack-detection */ 150 STAC_D965_REF, 151 STAC_D965_3ST, 152 STAC_D965_5ST, 153 STAC_D965_5ST_NO_FP, 154 STAC_D965_VERBS, 155 STAC_DELL_3ST, 156 STAC_DELL_BIOS, 157 STAC_NEMO_DEFAULT, 158 STAC_DELL_BIOS_AMIC, 159 STAC_DELL_BIOS_SPDIF, 160 STAC_927X_DELL_DMIC, 161 STAC_927X_VOLKNOB, 162 STAC_927X_MODELS 163 }; 164 165 enum { 166 STAC_9872_VAIO, 167 STAC_9872_MODELS 168 }; 169 170 struct sigmatel_spec { 171 struct hda_gen_spec gen; 172 173 unsigned int eapd_switch: 1; 174 unsigned int linear_tone_beep:1; 175 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 176 unsigned int volknob_init:1; /* special volume-knob initialization */ 177 unsigned int powerdown_adcs:1; 178 unsigned int have_spdif_mux:1; 179 180 /* gpio lines */ 181 unsigned int eapd_mask; 182 unsigned int gpio_mask; 183 unsigned int gpio_dir; 184 unsigned int gpio_data; 185 unsigned int gpio_mute; 186 unsigned int gpio_led; 187 unsigned int gpio_led_polarity; 188 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 189 unsigned int vref_led; 190 int default_polarity; 191 192 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 193 unsigned int mic_enabled; /* current mic mute state (bitmask) */ 194 195 /* stream */ 196 unsigned int stream_delay; 197 198 /* analog loopback */ 199 const struct snd_kcontrol_new *aloopback_ctl; 200 unsigned int aloopback; 201 unsigned char aloopback_mask; 202 unsigned char aloopback_shift; 203 204 /* power management */ 205 unsigned int power_map_bits; 206 unsigned int num_pwrs; 207 const hda_nid_t *pwr_nids; 208 unsigned int active_adcs; 209 210 /* beep widgets */ 211 hda_nid_t anabeep_nid; 212 213 /* SPDIF-out mux */ 214 const char * const *spdif_labels; 215 struct hda_input_mux spdif_mux; 216 unsigned int cur_smux[2]; 217 }; 218 219 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec 220 #define AC_VERB_IDT_GET_POWER_MAP 0xfec 221 222 static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 223 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 224 0x0f, 0x10, 0x11 225 }; 226 227 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 228 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 229 0x0f, 0x10 230 }; 231 232 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 233 0x0a, 0x0d, 0x0f 234 }; 235 236 237 /* 238 * PCM hooks 239 */ 240 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 241 struct hda_codec *codec, 242 struct snd_pcm_substream *substream, 243 int action) 244 { 245 struct sigmatel_spec *spec = codec->spec; 246 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 247 msleep(spec->stream_delay); 248 } 249 250 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 251 struct hda_codec *codec, 252 struct snd_pcm_substream *substream, 253 int action) 254 { 255 struct sigmatel_spec *spec = codec->spec; 256 int i, idx = 0; 257 258 if (!spec->powerdown_adcs) 259 return; 260 261 for (i = 0; i < spec->gen.num_all_adcs; i++) { 262 if (spec->gen.all_adcs[i] == hinfo->nid) { 263 idx = i; 264 break; 265 } 266 } 267 268 switch (action) { 269 case HDA_GEN_PCM_ACT_OPEN: 270 msleep(40); 271 snd_hda_codec_write(codec, hinfo->nid, 0, 272 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 273 spec->active_adcs |= (1 << idx); 274 break; 275 case HDA_GEN_PCM_ACT_CLOSE: 276 snd_hda_codec_write(codec, hinfo->nid, 0, 277 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 278 spec->active_adcs &= ~(1 << idx); 279 break; 280 } 281 } 282 283 /* 284 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 285 * funky external mute control using GPIO pins. 286 */ 287 288 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 289 unsigned int dir_mask, unsigned int data) 290 { 291 unsigned int gpiostate, gpiomask, gpiodir; 292 hda_nid_t fg = codec->core.afg; 293 294 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 295 296 gpiostate = snd_hda_codec_read(codec, fg, 0, 297 AC_VERB_GET_GPIO_DATA, 0); 298 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 299 300 gpiomask = snd_hda_codec_read(codec, fg, 0, 301 AC_VERB_GET_GPIO_MASK, 0); 302 gpiomask |= mask; 303 304 gpiodir = snd_hda_codec_read(codec, fg, 0, 305 AC_VERB_GET_GPIO_DIRECTION, 0); 306 gpiodir |= dir_mask; 307 308 /* Configure GPIOx as CMOS */ 309 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0); 310 311 snd_hda_codec_write(codec, fg, 0, 312 AC_VERB_SET_GPIO_MASK, gpiomask); 313 snd_hda_codec_read(codec, fg, 0, 314 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 315 316 msleep(1); 317 318 snd_hda_codec_read(codec, fg, 0, 319 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 320 } 321 322 /* hook for controlling mic-mute LED GPIO */ 323 static void stac_capture_led_update(struct hda_codec *codec) 324 { 325 struct sigmatel_spec *spec = codec->spec; 326 327 if (spec->gen.micmute_led.led_value) 328 spec->gpio_data |= spec->mic_mute_led_gpio; 329 else 330 spec->gpio_data &= ~spec->mic_mute_led_gpio; 331 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 332 } 333 334 static int stac_vrefout_set(struct hda_codec *codec, 335 hda_nid_t nid, unsigned int new_vref) 336 { 337 int error, pinctl; 338 339 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref); 340 pinctl = snd_hda_codec_read(codec, nid, 0, 341 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 342 343 if (pinctl < 0) 344 return pinctl; 345 346 pinctl &= 0xff; 347 pinctl &= ~AC_PINCTL_VREFEN; 348 pinctl |= (new_vref & AC_PINCTL_VREFEN); 349 350 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 351 if (error < 0) 352 return error; 353 354 return 1; 355 } 356 357 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ 358 /* this hook is set in stac_setup_gpio() */ 359 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, 360 hda_nid_t nid, 361 unsigned int power_state) 362 { 363 if (nid == codec->core.afg && power_state == AC_PWRST_D3) 364 return AC_PWRST_D1; 365 return snd_hda_gen_path_power_filter(codec, nid, power_state); 366 } 367 368 /* update mute-LED accoring to the master switch */ 369 static void stac_update_led_status(struct hda_codec *codec, int enabled) 370 { 371 struct sigmatel_spec *spec = codec->spec; 372 int muted = !enabled; 373 374 if (!spec->gpio_led) 375 return; 376 377 /* LED state is inverted on these systems */ 378 if (spec->gpio_led_polarity) 379 muted = !muted; 380 381 if (!spec->vref_mute_led_nid) { 382 if (muted) 383 spec->gpio_data |= spec->gpio_led; 384 else 385 spec->gpio_data &= ~spec->gpio_led; 386 stac_gpio_set(codec, spec->gpio_mask, 387 spec->gpio_dir, spec->gpio_data); 388 } else { 389 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 390 stac_vrefout_set(codec, spec->vref_mute_led_nid, 391 spec->vref_led); 392 } 393 } 394 395 /* vmaster hook to update mute LED */ 396 static void stac_vmaster_hook(void *private_data, int val) 397 { 398 stac_update_led_status(private_data, val); 399 } 400 401 /* automute hook to handle GPIO mute and EAPD updates */ 402 static void stac_update_outputs(struct hda_codec *codec) 403 { 404 struct sigmatel_spec *spec = codec->spec; 405 406 if (spec->gpio_mute) 407 spec->gen.master_mute = 408 !(snd_hda_codec_read(codec, codec->core.afg, 0, 409 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 410 411 snd_hda_gen_update_outputs(codec); 412 413 if (spec->eapd_mask && spec->eapd_switch) { 414 unsigned int val = spec->gpio_data; 415 if (spec->gen.speaker_muted) 416 val &= ~spec->eapd_mask; 417 else 418 val |= spec->eapd_mask; 419 if (spec->gpio_data != val) { 420 spec->gpio_data = val; 421 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 422 val); 423 } 424 } 425 } 426 427 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 428 bool enable, bool do_write) 429 { 430 struct sigmatel_spec *spec = codec->spec; 431 unsigned int idx, val; 432 433 for (idx = 0; idx < spec->num_pwrs; idx++) { 434 if (spec->pwr_nids[idx] == nid) 435 break; 436 } 437 if (idx >= spec->num_pwrs) 438 return; 439 440 idx = 1 << idx; 441 442 val = spec->power_map_bits; 443 if (enable) 444 val &= ~idx; 445 else 446 val |= idx; 447 448 /* power down unused output ports */ 449 if (val != spec->power_map_bits) { 450 spec->power_map_bits = val; 451 if (do_write) 452 snd_hda_codec_write(codec, codec->core.afg, 0, 453 AC_VERB_IDT_SET_POWER_MAP, val); 454 } 455 } 456 457 /* update power bit per jack plug/unplug */ 458 static void jack_update_power(struct hda_codec *codec, 459 struct hda_jack_callback *jack) 460 { 461 struct sigmatel_spec *spec = codec->spec; 462 int i; 463 464 if (!spec->num_pwrs) 465 return; 466 467 if (jack && jack->nid) { 468 stac_toggle_power_map(codec, jack->nid, 469 snd_hda_jack_detect(codec, jack->nid), 470 true); 471 return; 472 } 473 474 /* update all jacks */ 475 for (i = 0; i < spec->num_pwrs; i++) { 476 hda_nid_t nid = spec->pwr_nids[i]; 477 if (!snd_hda_jack_tbl_get(codec, nid)) 478 continue; 479 stac_toggle_power_map(codec, nid, 480 snd_hda_jack_detect(codec, nid), 481 false); 482 } 483 484 snd_hda_codec_write(codec, codec->core.afg, 0, 485 AC_VERB_IDT_SET_POWER_MAP, 486 spec->power_map_bits); 487 } 488 489 static void stac_vref_event(struct hda_codec *codec, 490 struct hda_jack_callback *event) 491 { 492 unsigned int data; 493 494 data = snd_hda_codec_read(codec, codec->core.afg, 0, 495 AC_VERB_GET_GPIO_DATA, 0); 496 /* toggle VREF state based on GPIOx status */ 497 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0, 498 !!(data & (1 << event->private_data))); 499 } 500 501 /* initialize the power map and enable the power event to jacks that 502 * haven't been assigned to automute 503 */ 504 static void stac_init_power_map(struct hda_codec *codec) 505 { 506 struct sigmatel_spec *spec = codec->spec; 507 int i; 508 509 for (i = 0; i < spec->num_pwrs; i++) { 510 hda_nid_t nid = spec->pwr_nids[i]; 511 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 512 def_conf = get_defcfg_connect(def_conf); 513 if (def_conf == AC_JACK_PORT_COMPLEX && 514 spec->vref_mute_led_nid != nid && 515 is_jack_detectable(codec, nid)) { 516 snd_hda_jack_detect_enable_callback(codec, nid, 517 jack_update_power); 518 } else { 519 if (def_conf == AC_JACK_PORT_NONE) 520 stac_toggle_power_map(codec, nid, false, false); 521 else 522 stac_toggle_power_map(codec, nid, true, false); 523 } 524 } 525 } 526 527 /* 528 */ 529 530 static inline bool get_int_hint(struct hda_codec *codec, const char *key, 531 int *valp) 532 { 533 return !snd_hda_get_int_hint(codec, key, valp); 534 } 535 536 /* override some hints from the hwdep entry */ 537 static void stac_store_hints(struct hda_codec *codec) 538 { 539 struct sigmatel_spec *spec = codec->spec; 540 int val; 541 542 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 543 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 544 spec->gpio_mask; 545 } 546 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 547 spec->gpio_dir &= spec->gpio_mask; 548 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 549 spec->gpio_data &= spec->gpio_mask; 550 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 551 spec->eapd_mask &= spec->gpio_mask; 552 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 553 spec->gpio_mute &= spec->gpio_mask; 554 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 555 if (val >= 0) 556 spec->eapd_switch = val; 557 } 558 559 /* 560 * loopback controls 561 */ 562 563 #define stac_aloopback_info snd_ctl_boolean_mono_info 564 565 static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 566 struct snd_ctl_elem_value *ucontrol) 567 { 568 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 569 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 570 struct sigmatel_spec *spec = codec->spec; 571 572 ucontrol->value.integer.value[0] = !!(spec->aloopback & 573 (spec->aloopback_mask << idx)); 574 return 0; 575 } 576 577 static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 578 struct snd_ctl_elem_value *ucontrol) 579 { 580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 581 struct sigmatel_spec *spec = codec->spec; 582 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 583 unsigned int dac_mode; 584 unsigned int val, idx_val; 585 586 idx_val = spec->aloopback_mask << idx; 587 if (ucontrol->value.integer.value[0]) 588 val = spec->aloopback | idx_val; 589 else 590 val = spec->aloopback & ~idx_val; 591 if (spec->aloopback == val) 592 return 0; 593 594 spec->aloopback = val; 595 596 /* Only return the bits defined by the shift value of the 597 * first two bytes of the mask 598 */ 599 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0, 600 kcontrol->private_value & 0xFFFF, 0x0); 601 dac_mode >>= spec->aloopback_shift; 602 603 if (spec->aloopback & idx_val) { 604 snd_hda_power_up(codec); 605 dac_mode |= idx_val; 606 } else { 607 snd_hda_power_down(codec); 608 dac_mode &= ~idx_val; 609 } 610 611 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 612 kcontrol->private_value >> 16, dac_mode); 613 614 return 1; 615 } 616 617 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 618 { \ 619 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 620 .name = "Analog Loopback", \ 621 .count = cnt, \ 622 .info = stac_aloopback_info, \ 623 .get = stac_aloopback_get, \ 624 .put = stac_aloopback_put, \ 625 .private_value = verb_read | (verb_write << 16), \ 626 } 627 628 /* 629 * Mute LED handling on HP laptops 630 */ 631 632 /* check whether it's a HP laptop with a docking port */ 633 static bool hp_bnb2011_with_dock(struct hda_codec *codec) 634 { 635 if (codec->core.vendor_id != 0x111d7605 && 636 codec->core.vendor_id != 0x111d76d1) 637 return false; 638 639 switch (codec->core.subsystem_id) { 640 case 0x103c1618: 641 case 0x103c1619: 642 case 0x103c161a: 643 case 0x103c161b: 644 case 0x103c161c: 645 case 0x103c161d: 646 case 0x103c161e: 647 case 0x103c161f: 648 649 case 0x103c162a: 650 case 0x103c162b: 651 652 case 0x103c1630: 653 case 0x103c1631: 654 655 case 0x103c1633: 656 case 0x103c1634: 657 case 0x103c1635: 658 659 case 0x103c3587: 660 case 0x103c3588: 661 case 0x103c3589: 662 case 0x103c358a: 663 664 case 0x103c3667: 665 case 0x103c3668: 666 case 0x103c3669: 667 668 return true; 669 } 670 return false; 671 } 672 673 static bool hp_blike_system(u32 subsystem_id) 674 { 675 switch (subsystem_id) { 676 case 0x103c1473: /* HP ProBook 6550b */ 677 case 0x103c1520: 678 case 0x103c1521: 679 case 0x103c1523: 680 case 0x103c1524: 681 case 0x103c1525: 682 case 0x103c1722: 683 case 0x103c1723: 684 case 0x103c1724: 685 case 0x103c1725: 686 case 0x103c1726: 687 case 0x103c1727: 688 case 0x103c1728: 689 case 0x103c1729: 690 case 0x103c172a: 691 case 0x103c172b: 692 case 0x103c307e: 693 case 0x103c307f: 694 case 0x103c3080: 695 case 0x103c3081: 696 case 0x103c7007: 697 case 0x103c7008: 698 return true; 699 } 700 return false; 701 } 702 703 static void set_hp_led_gpio(struct hda_codec *codec) 704 { 705 struct sigmatel_spec *spec = codec->spec; 706 unsigned int gpio; 707 708 if (spec->gpio_led) 709 return; 710 711 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP); 712 gpio &= AC_GPIO_IO_COUNT; 713 if (gpio > 3) 714 spec->gpio_led = 0x08; /* GPIO 3 */ 715 else 716 spec->gpio_led = 0x01; /* GPIO 0 */ 717 } 718 719 /* 720 * This method searches for the mute LED GPIO configuration 721 * provided as OEM string in SMBIOS. The format of that string 722 * is HP_Mute_LED_P_G or HP_Mute_LED_P 723 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 724 * that corresponds to the NOT muted state of the master volume 725 * and G is the index of the GPIO to use as the mute LED control (0..9) 726 * If _G portion is missing it is assigned based on the codec ID 727 * 728 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 729 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 730 * 731 * 732 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 733 * SMBIOS - at least the ones I have seen do not have them - which include 734 * my own system (HP Pavilion dv6-1110ax) and my cousin's 735 * HP Pavilion dv9500t CTO. 736 * Need more information on whether it is true across the entire series. 737 * -- kunal 738 */ 739 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 740 { 741 struct sigmatel_spec *spec = codec->spec; 742 const struct dmi_device *dev = NULL; 743 744 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 745 get_int_hint(codec, "gpio_led_polarity", 746 &spec->gpio_led_polarity); 747 return 1; 748 } 749 750 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 751 if (sscanf(dev->name, "HP_Mute_LED_%u_%x", 752 &spec->gpio_led_polarity, 753 &spec->gpio_led) == 2) { 754 unsigned int max_gpio; 755 max_gpio = snd_hda_param_read(codec, codec->core.afg, 756 AC_PAR_GPIO_CAP); 757 max_gpio &= AC_GPIO_IO_COUNT; 758 if (spec->gpio_led < max_gpio) 759 spec->gpio_led = 1 << spec->gpio_led; 760 else 761 spec->vref_mute_led_nid = spec->gpio_led; 762 return 1; 763 } 764 if (sscanf(dev->name, "HP_Mute_LED_%u", 765 &spec->gpio_led_polarity) == 1) { 766 set_hp_led_gpio(codec); 767 return 1; 768 } 769 /* BIOS bug: unfilled OEM string */ 770 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 771 set_hp_led_gpio(codec); 772 if (default_polarity >= 0) 773 spec->gpio_led_polarity = default_polarity; 774 else 775 spec->gpio_led_polarity = 1; 776 return 1; 777 } 778 } 779 780 /* 781 * Fallback case - if we don't find the DMI strings, 782 * we statically set the GPIO - if not a B-series system 783 * and default polarity is provided 784 */ 785 if (!hp_blike_system(codec->core.subsystem_id) && 786 (default_polarity == 0 || default_polarity == 1)) { 787 set_hp_led_gpio(codec); 788 spec->gpio_led_polarity = default_polarity; 789 return 1; 790 } 791 return 0; 792 } 793 794 /* check whether a built-in speaker is included in parsed pins */ 795 static bool has_builtin_speaker(struct hda_codec *codec) 796 { 797 struct sigmatel_spec *spec = codec->spec; 798 hda_nid_t *nid_pin; 799 int nids, i; 800 801 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 802 nid_pin = spec->gen.autocfg.line_out_pins; 803 nids = spec->gen.autocfg.line_outs; 804 } else { 805 nid_pin = spec->gen.autocfg.speaker_pins; 806 nids = spec->gen.autocfg.speaker_outs; 807 } 808 809 for (i = 0; i < nids; i++) { 810 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 811 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 812 return true; 813 } 814 return false; 815 } 816 817 /* 818 * PC beep controls 819 */ 820 821 /* create PC beep volume controls */ 822 static int stac_auto_create_beep_ctls(struct hda_codec *codec, 823 hda_nid_t nid) 824 { 825 struct sigmatel_spec *spec = codec->spec; 826 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 827 struct snd_kcontrol_new *knew; 828 static struct snd_kcontrol_new abeep_mute_ctl = 829 HDA_CODEC_MUTE(NULL, 0, 0, 0); 830 static struct snd_kcontrol_new dbeep_mute_ctl = 831 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 832 static struct snd_kcontrol_new beep_vol_ctl = 833 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 834 835 /* check for mute support for the the amp */ 836 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 837 const struct snd_kcontrol_new *temp; 838 if (spec->anabeep_nid == nid) 839 temp = &abeep_mute_ctl; 840 else 841 temp = &dbeep_mute_ctl; 842 knew = snd_hda_gen_add_kctl(&spec->gen, 843 "Beep Playback Switch", temp); 844 if (!knew) 845 return -ENOMEM; 846 knew->private_value = 847 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 848 } 849 850 /* check to see if there is volume support for the amp */ 851 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 852 knew = snd_hda_gen_add_kctl(&spec->gen, 853 "Beep Playback Volume", 854 &beep_vol_ctl); 855 if (!knew) 856 return -ENOMEM; 857 knew->private_value = 858 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 859 } 860 return 0; 861 } 862 863 #ifdef CONFIG_SND_HDA_INPUT_BEEP 864 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 865 866 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 867 struct snd_ctl_elem_value *ucontrol) 868 { 869 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 870 ucontrol->value.integer.value[0] = codec->beep->enabled; 871 return 0; 872 } 873 874 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 875 struct snd_ctl_elem_value *ucontrol) 876 { 877 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 878 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 879 } 880 881 static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 882 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 883 .name = "Beep Playback Switch", 884 .info = stac_dig_beep_switch_info, 885 .get = stac_dig_beep_switch_get, 886 .put = stac_dig_beep_switch_put, 887 }; 888 889 static int stac_beep_switch_ctl(struct hda_codec *codec) 890 { 891 struct sigmatel_spec *spec = codec->spec; 892 893 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 894 return -ENOMEM; 895 return 0; 896 } 897 #endif 898 899 /* 900 * SPDIF-out mux controls 901 */ 902 903 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 904 struct snd_ctl_elem_info *uinfo) 905 { 906 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 907 struct sigmatel_spec *spec = codec->spec; 908 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 909 } 910 911 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 912 struct snd_ctl_elem_value *ucontrol) 913 { 914 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 915 struct sigmatel_spec *spec = codec->spec; 916 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 917 918 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 919 return 0; 920 } 921 922 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 923 struct snd_ctl_elem_value *ucontrol) 924 { 925 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 926 struct sigmatel_spec *spec = codec->spec; 927 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 928 929 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 930 spec->gen.autocfg.dig_out_pins[smux_idx], 931 &spec->cur_smux[smux_idx]); 932 } 933 934 static const struct snd_kcontrol_new stac_smux_mixer = { 935 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 936 .name = "IEC958 Playback Source", 937 /* count set later */ 938 .info = stac_smux_enum_info, 939 .get = stac_smux_enum_get, 940 .put = stac_smux_enum_put, 941 }; 942 943 static const char * const stac_spdif_labels[] = { 944 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 945 }; 946 947 static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 948 { 949 struct sigmatel_spec *spec = codec->spec; 950 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 951 const char * const *labels = spec->spdif_labels; 952 struct snd_kcontrol_new *kctl; 953 int i, num_cons; 954 955 if (cfg->dig_outs < 1) 956 return 0; 957 958 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 959 if (num_cons <= 1) 960 return 0; 961 962 if (!labels) 963 labels = stac_spdif_labels; 964 for (i = 0; i < num_cons; i++) { 965 if (snd_BUG_ON(!labels[i])) 966 return -EINVAL; 967 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL); 968 } 969 970 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 971 if (!kctl) 972 return -ENOMEM; 973 kctl->count = cfg->dig_outs; 974 975 return 0; 976 } 977 978 /* 979 */ 980 981 static const struct hda_verb stac9200_core_init[] = { 982 /* set dac0mux for dac converter */ 983 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 984 {} 985 }; 986 987 static const struct hda_verb stac9200_eapd_init[] = { 988 /* set dac0mux for dac converter */ 989 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 990 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 991 {} 992 }; 993 994 static const struct hda_verb dell_eq_core_init[] = { 995 /* set master volume to max value without distortion 996 * and direct control */ 997 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 998 {} 999 }; 1000 1001 static const struct hda_verb stac92hd73xx_core_init[] = { 1002 /* set master volume and direct control */ 1003 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1004 {} 1005 }; 1006 1007 static const struct hda_verb stac92hd83xxx_core_init[] = { 1008 /* power state controls amps */ 1009 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1010 {} 1011 }; 1012 1013 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1014 { 0x22, 0x785, 0x43 }, 1015 { 0x22, 0x782, 0xe0 }, 1016 { 0x22, 0x795, 0x00 }, 1017 {} 1018 }; 1019 1020 static const struct hda_verb stac92hd71bxx_core_init[] = { 1021 /* set master volume and direct control */ 1022 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1023 {} 1024 }; 1025 1026 static const hda_nid_t stac92hd71bxx_unmute_nids[] = { 1027 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1028 0x0f, 0x0a, 0x0d, 0 1029 }; 1030 1031 static const struct hda_verb stac925x_core_init[] = { 1032 /* set dac0mux for dac converter */ 1033 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1034 /* mute the master volume */ 1035 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1036 {} 1037 }; 1038 1039 static const struct hda_verb stac922x_core_init[] = { 1040 /* set master volume and direct control */ 1041 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1042 {} 1043 }; 1044 1045 static const struct hda_verb d965_core_init[] = { 1046 /* unmute node 0x1b */ 1047 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1048 /* select node 0x03 as DAC */ 1049 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1050 {} 1051 }; 1052 1053 static const struct hda_verb dell_3st_core_init[] = { 1054 /* don't set delta bit */ 1055 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1056 /* unmute node 0x1b */ 1057 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1058 /* select node 0x03 as DAC */ 1059 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1060 {} 1061 }; 1062 1063 static const struct hda_verb stac927x_core_init[] = { 1064 /* set master volume and direct control */ 1065 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1066 /* enable analog pc beep path */ 1067 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1068 {} 1069 }; 1070 1071 static const struct hda_verb stac927x_volknob_core_init[] = { 1072 /* don't set delta bit */ 1073 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1074 /* enable analog pc beep path */ 1075 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1076 {} 1077 }; 1078 1079 static const struct hda_verb stac9205_core_init[] = { 1080 /* set master volume and direct control */ 1081 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1082 /* enable analog pc beep path */ 1083 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1084 {} 1085 }; 1086 1087 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1088 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1089 1090 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1091 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1092 1093 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1094 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1095 1096 static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1097 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1098 1099 static const struct snd_kcontrol_new stac9205_loopback = 1100 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1101 1102 static const struct snd_kcontrol_new stac927x_loopback = 1103 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1104 1105 static const struct hda_pintbl ref9200_pin_configs[] = { 1106 { 0x08, 0x01c47010 }, 1107 { 0x09, 0x01447010 }, 1108 { 0x0d, 0x0221401f }, 1109 { 0x0e, 0x01114010 }, 1110 { 0x0f, 0x02a19020 }, 1111 { 0x10, 0x01a19021 }, 1112 { 0x11, 0x90100140 }, 1113 { 0x12, 0x01813122 }, 1114 {} 1115 }; 1116 1117 static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1118 { 0x08, 0x400000fe }, 1119 { 0x09, 0x404500f4 }, 1120 { 0x0d, 0x400100f0 }, 1121 { 0x0e, 0x90110010 }, 1122 { 0x0f, 0x400100f1 }, 1123 { 0x10, 0x02a1902e }, 1124 { 0x11, 0x500000f2 }, 1125 { 0x12, 0x500000f3 }, 1126 {} 1127 }; 1128 1129 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1130 { 0x08, 0x400000fe }, 1131 { 0x09, 0x404500f4 }, 1132 { 0x0d, 0x400100f0 }, 1133 { 0x0e, 0x90110010 }, 1134 { 0x0f, 0x400100f1 }, 1135 { 0x10, 0x02a1902e }, 1136 { 0x11, 0x500000f2 }, 1137 { 0x12, 0x500000f3 }, 1138 {} 1139 }; 1140 1141 /* 1142 STAC 9200 pin configs for 1143 102801A8 1144 102801DE 1145 102801E8 1146 */ 1147 static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1148 { 0x08, 0x400001f0 }, 1149 { 0x09, 0x400001f1 }, 1150 { 0x0d, 0x02214030 }, 1151 { 0x0e, 0x01014010 }, 1152 { 0x0f, 0x02a19020 }, 1153 { 0x10, 0x01a19021 }, 1154 { 0x11, 0x90100140 }, 1155 { 0x12, 0x01813122 }, 1156 {} 1157 }; 1158 1159 /* 1160 STAC 9200 pin configs for 1161 102801C0 1162 102801C1 1163 */ 1164 static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1165 { 0x08, 0x400001f0 }, 1166 { 0x09, 0x400001f1 }, 1167 { 0x0d, 0x0221401f }, 1168 { 0x0e, 0x01014010 }, 1169 { 0x0f, 0x01813020 }, 1170 { 0x10, 0x02a19021 }, 1171 { 0x11, 0x90100140 }, 1172 { 0x12, 0x400001f2 }, 1173 {} 1174 }; 1175 1176 /* 1177 STAC 9200 pin configs for 1178 102801C4 (Dell Dimension E310) 1179 102801C5 1180 102801C7 1181 102801D9 1182 102801DA 1183 102801E3 1184 */ 1185 static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1186 { 0x08, 0x400001f0 }, 1187 { 0x09, 0x400001f1 }, 1188 { 0x0d, 0x0221401f }, 1189 { 0x0e, 0x01014010 }, 1190 { 0x0f, 0x01813020 }, 1191 { 0x10, 0x01a19021 }, 1192 { 0x11, 0x90100140 }, 1193 { 0x12, 0x400001f2 }, 1194 {} 1195 }; 1196 1197 1198 /* 1199 STAC 9200-32 pin configs for 1200 102801B5 (Dell Inspiron 630m) 1201 102801D8 (Dell Inspiron 640m) 1202 */ 1203 static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1204 { 0x08, 0x40c003fa }, 1205 { 0x09, 0x03441340 }, 1206 { 0x0d, 0x0321121f }, 1207 { 0x0e, 0x90170310 }, 1208 { 0x0f, 0x408003fb }, 1209 { 0x10, 0x03a11020 }, 1210 { 0x11, 0x401003fc }, 1211 { 0x12, 0x403003fd }, 1212 {} 1213 }; 1214 1215 /* 1216 STAC 9200-32 pin configs for 1217 102801C2 (Dell Latitude D620) 1218 102801C8 1219 102801CC (Dell Latitude D820) 1220 102801D4 1221 102801D6 1222 */ 1223 static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1224 { 0x08, 0x40c003fa }, 1225 { 0x09, 0x0144131f }, 1226 { 0x0d, 0x0321121f }, 1227 { 0x0e, 0x90170310 }, 1228 { 0x0f, 0x90a70321 }, 1229 { 0x10, 0x03a11020 }, 1230 { 0x11, 0x401003fb }, 1231 { 0x12, 0x40f000fc }, 1232 {} 1233 }; 1234 1235 /* 1236 STAC 9200-32 pin configs for 1237 102801CE (Dell XPS M1710) 1238 102801CF (Dell Precision M90) 1239 */ 1240 static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1241 { 0x08, 0x40c003fa }, 1242 { 0x09, 0x01441340 }, 1243 { 0x0d, 0x0421421f }, 1244 { 0x0e, 0x90170310 }, 1245 { 0x0f, 0x408003fb }, 1246 { 0x10, 0x04a1102e }, 1247 { 0x11, 0x90170311 }, 1248 { 0x12, 0x403003fc }, 1249 {} 1250 }; 1251 1252 /* 1253 STAC 9200-32 pin configs for 1254 102801C9 1255 102801CA 1256 102801CB (Dell Latitude 120L) 1257 102801D3 1258 */ 1259 static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1260 { 0x08, 0x40c003fa }, 1261 { 0x09, 0x404003fb }, 1262 { 0x0d, 0x0321121f }, 1263 { 0x0e, 0x90170310 }, 1264 { 0x0f, 0x408003fc }, 1265 { 0x10, 0x03a11020 }, 1266 { 0x11, 0x401003fd }, 1267 { 0x12, 0x403003fe }, 1268 {} 1269 }; 1270 1271 /* 1272 STAC 9200-32 pin configs for 1273 102801BD (Dell Inspiron E1505n) 1274 102801EE 1275 102801EF 1276 */ 1277 static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1278 { 0x08, 0x40c003fa }, 1279 { 0x09, 0x01441340 }, 1280 { 0x0d, 0x0421121f }, 1281 { 0x0e, 0x90170310 }, 1282 { 0x0f, 0x408003fb }, 1283 { 0x10, 0x04a11020 }, 1284 { 0x11, 0x401003fc }, 1285 { 0x12, 0x403003fd }, 1286 {} 1287 }; 1288 1289 /* 1290 STAC 9200-32 pin configs for 1291 102801F5 (Dell Inspiron 1501) 1292 102801F6 1293 */ 1294 static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1295 { 0x08, 0x40c003fa }, 1296 { 0x09, 0x404003fb }, 1297 { 0x0d, 0x0421121f }, 1298 { 0x0e, 0x90170310 }, 1299 { 0x0f, 0x408003fc }, 1300 { 0x10, 0x04a11020 }, 1301 { 0x11, 0x401003fd }, 1302 { 0x12, 0x403003fe }, 1303 {} 1304 }; 1305 1306 /* 1307 STAC 9200-32 1308 102801CD (Dell Inspiron E1705/9400) 1309 */ 1310 static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1311 { 0x08, 0x40c003fa }, 1312 { 0x09, 0x01441340 }, 1313 { 0x0d, 0x0421121f }, 1314 { 0x0e, 0x90170310 }, 1315 { 0x0f, 0x90170310 }, 1316 { 0x10, 0x04a11020 }, 1317 { 0x11, 0x90170310 }, 1318 { 0x12, 0x40f003fc }, 1319 {} 1320 }; 1321 1322 static const struct hda_pintbl oqo9200_pin_configs[] = { 1323 { 0x08, 0x40c000f0 }, 1324 { 0x09, 0x404000f1 }, 1325 { 0x0d, 0x0221121f }, 1326 { 0x0e, 0x02211210 }, 1327 { 0x0f, 0x90170111 }, 1328 { 0x10, 0x90a70120 }, 1329 { 0x11, 0x400000f2 }, 1330 { 0x12, 0x400000f3 }, 1331 {} 1332 }; 1333 1334 /* 1335 * STAC 92HD700 1336 * 18881000 Amigaone X1000 1337 */ 1338 static const struct hda_pintbl nemo_pin_configs[] = { 1339 { 0x0a, 0x02214020 }, /* Front panel HP socket */ 1340 { 0x0b, 0x02a19080 }, /* Front Mic */ 1341 { 0x0c, 0x0181304e }, /* Line in */ 1342 { 0x0d, 0x01014010 }, /* Line out */ 1343 { 0x0e, 0x01a19040 }, /* Rear Mic */ 1344 { 0x0f, 0x01011012 }, /* Rear speakers */ 1345 { 0x10, 0x01016011 }, /* Center speaker */ 1346 { 0x11, 0x01012014 }, /* Side speakers (7.1) */ 1347 { 0x12, 0x103301f0 }, /* Motherboard CD line in connector */ 1348 { 0x13, 0x411111f0 }, /* Unused */ 1349 { 0x14, 0x411111f0 }, /* Unused */ 1350 { 0x21, 0x01442170 }, /* S/PDIF line out */ 1351 { 0x22, 0x411111f0 }, /* Unused */ 1352 { 0x23, 0x411111f0 }, /* Unused */ 1353 {} 1354 }; 1355 1356 static void stac9200_fixup_panasonic(struct hda_codec *codec, 1357 const struct hda_fixup *fix, int action) 1358 { 1359 struct sigmatel_spec *spec = codec->spec; 1360 1361 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1362 spec->gpio_mask = spec->gpio_dir = 0x09; 1363 spec->gpio_data = 0x00; 1364 /* CF-74 has no headphone detection, and the driver should *NOT* 1365 * do detection and HP/speaker toggle because the hardware does it. 1366 */ 1367 spec->gen.suppress_auto_mute = 1; 1368 } 1369 } 1370 1371 1372 static const struct hda_fixup stac9200_fixups[] = { 1373 [STAC_REF] = { 1374 .type = HDA_FIXUP_PINS, 1375 .v.pins = ref9200_pin_configs, 1376 }, 1377 [STAC_9200_OQO] = { 1378 .type = HDA_FIXUP_PINS, 1379 .v.pins = oqo9200_pin_configs, 1380 .chained = true, 1381 .chain_id = STAC_9200_EAPD_INIT, 1382 }, 1383 [STAC_9200_DELL_D21] = { 1384 .type = HDA_FIXUP_PINS, 1385 .v.pins = dell9200_d21_pin_configs, 1386 }, 1387 [STAC_9200_DELL_D22] = { 1388 .type = HDA_FIXUP_PINS, 1389 .v.pins = dell9200_d22_pin_configs, 1390 }, 1391 [STAC_9200_DELL_D23] = { 1392 .type = HDA_FIXUP_PINS, 1393 .v.pins = dell9200_d23_pin_configs, 1394 }, 1395 [STAC_9200_DELL_M21] = { 1396 .type = HDA_FIXUP_PINS, 1397 .v.pins = dell9200_m21_pin_configs, 1398 }, 1399 [STAC_9200_DELL_M22] = { 1400 .type = HDA_FIXUP_PINS, 1401 .v.pins = dell9200_m22_pin_configs, 1402 }, 1403 [STAC_9200_DELL_M23] = { 1404 .type = HDA_FIXUP_PINS, 1405 .v.pins = dell9200_m23_pin_configs, 1406 }, 1407 [STAC_9200_DELL_M24] = { 1408 .type = HDA_FIXUP_PINS, 1409 .v.pins = dell9200_m24_pin_configs, 1410 }, 1411 [STAC_9200_DELL_M25] = { 1412 .type = HDA_FIXUP_PINS, 1413 .v.pins = dell9200_m25_pin_configs, 1414 }, 1415 [STAC_9200_DELL_M26] = { 1416 .type = HDA_FIXUP_PINS, 1417 .v.pins = dell9200_m26_pin_configs, 1418 }, 1419 [STAC_9200_DELL_M27] = { 1420 .type = HDA_FIXUP_PINS, 1421 .v.pins = dell9200_m27_pin_configs, 1422 }, 1423 [STAC_9200_M4] = { 1424 .type = HDA_FIXUP_PINS, 1425 .v.pins = gateway9200_m4_pin_configs, 1426 .chained = true, 1427 .chain_id = STAC_9200_EAPD_INIT, 1428 }, 1429 [STAC_9200_M4_2] = { 1430 .type = HDA_FIXUP_PINS, 1431 .v.pins = gateway9200_m4_2_pin_configs, 1432 .chained = true, 1433 .chain_id = STAC_9200_EAPD_INIT, 1434 }, 1435 [STAC_9200_PANASONIC] = { 1436 .type = HDA_FIXUP_FUNC, 1437 .v.func = stac9200_fixup_panasonic, 1438 }, 1439 [STAC_9200_EAPD_INIT] = { 1440 .type = HDA_FIXUP_VERBS, 1441 .v.verbs = (const struct hda_verb[]) { 1442 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1443 {} 1444 }, 1445 }, 1446 }; 1447 1448 static const struct hda_model_fixup stac9200_models[] = { 1449 { .id = STAC_REF, .name = "ref" }, 1450 { .id = STAC_9200_OQO, .name = "oqo" }, 1451 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1452 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1453 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1454 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1455 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1456 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1457 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1458 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1459 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1460 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1461 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1462 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1463 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1464 {} 1465 }; 1466 1467 static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1468 /* SigmaTel reference board */ 1469 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1470 "DFI LanParty", STAC_REF), 1471 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1472 "DFI LanParty", STAC_REF), 1473 /* Dell laptops have BIOS problem */ 1474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1475 "unknown Dell", STAC_9200_DELL_D21), 1476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1477 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1479 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1481 "unknown Dell", STAC_9200_DELL_D22), 1482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1483 "unknown Dell", STAC_9200_DELL_D22), 1484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1485 "Dell Latitude D620", STAC_9200_DELL_M22), 1486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1487 "unknown Dell", STAC_9200_DELL_D23), 1488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1489 "unknown Dell", STAC_9200_DELL_D23), 1490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1491 "unknown Dell", STAC_9200_DELL_M22), 1492 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1493 "unknown Dell", STAC_9200_DELL_M24), 1494 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1495 "unknown Dell", STAC_9200_DELL_M24), 1496 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1497 "Dell Latitude 120L", STAC_9200_DELL_M24), 1498 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1499 "Dell Latitude D820", STAC_9200_DELL_M22), 1500 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1501 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1502 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1503 "Dell XPS M1710", STAC_9200_DELL_M23), 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1505 "Dell Precision M90", STAC_9200_DELL_M23), 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1507 "unknown Dell", STAC_9200_DELL_M22), 1508 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1509 "unknown Dell", STAC_9200_DELL_M22), 1510 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1511 "unknown Dell", STAC_9200_DELL_M22), 1512 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1513 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1514 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1515 "unknown Dell", STAC_9200_DELL_D23), 1516 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1517 "unknown Dell", STAC_9200_DELL_D23), 1518 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1519 "unknown Dell", STAC_9200_DELL_D21), 1520 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1521 "unknown Dell", STAC_9200_DELL_D23), 1522 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1523 "unknown Dell", STAC_9200_DELL_D21), 1524 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1525 "unknown Dell", STAC_9200_DELL_M25), 1526 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1527 "unknown Dell", STAC_9200_DELL_M25), 1528 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1529 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1530 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1531 "unknown Dell", STAC_9200_DELL_M26), 1532 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201, 1533 "Dell Latitude D430", STAC_9200_DELL_M22), 1534 /* Panasonic */ 1535 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1536 /* Gateway machines needs EAPD to be set on resume */ 1537 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1538 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1539 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1540 /* OQO Mobile */ 1541 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1542 {} /* terminator */ 1543 }; 1544 1545 static const struct hda_pintbl ref925x_pin_configs[] = { 1546 { 0x07, 0x40c003f0 }, 1547 { 0x08, 0x424503f2 }, 1548 { 0x0a, 0x01813022 }, 1549 { 0x0b, 0x02a19021 }, 1550 { 0x0c, 0x90a70320 }, 1551 { 0x0d, 0x02214210 }, 1552 { 0x10, 0x01019020 }, 1553 { 0x11, 0x9033032e }, 1554 {} 1555 }; 1556 1557 static const struct hda_pintbl stac925xM1_pin_configs[] = { 1558 { 0x07, 0x40c003f4 }, 1559 { 0x08, 0x424503f2 }, 1560 { 0x0a, 0x400000f3 }, 1561 { 0x0b, 0x02a19020 }, 1562 { 0x0c, 0x40a000f0 }, 1563 { 0x0d, 0x90100210 }, 1564 { 0x10, 0x400003f1 }, 1565 { 0x11, 0x9033032e }, 1566 {} 1567 }; 1568 1569 static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1570 { 0x07, 0x40c003f4 }, 1571 { 0x08, 0x424503f2 }, 1572 { 0x0a, 0x400000f3 }, 1573 { 0x0b, 0x02a19020 }, 1574 { 0x0c, 0x40a000f0 }, 1575 { 0x0d, 0x90100210 }, 1576 { 0x10, 0x400003f1 }, 1577 { 0x11, 0x9033032e }, 1578 {} 1579 }; 1580 1581 static const struct hda_pintbl stac925xM2_pin_configs[] = { 1582 { 0x07, 0x40c003f4 }, 1583 { 0x08, 0x424503f2 }, 1584 { 0x0a, 0x400000f3 }, 1585 { 0x0b, 0x02a19020 }, 1586 { 0x0c, 0x40a000f0 }, 1587 { 0x0d, 0x90100210 }, 1588 { 0x10, 0x400003f1 }, 1589 { 0x11, 0x9033032e }, 1590 {} 1591 }; 1592 1593 static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1594 { 0x07, 0x40c003f4 }, 1595 { 0x08, 0x424503f2 }, 1596 { 0x0a, 0x400000f3 }, 1597 { 0x0b, 0x02a19020 }, 1598 { 0x0c, 0x40a000f0 }, 1599 { 0x0d, 0x90100210 }, 1600 { 0x10, 0x400003f1 }, 1601 { 0x11, 0x9033032e }, 1602 {} 1603 }; 1604 1605 static const struct hda_pintbl stac925xM3_pin_configs[] = { 1606 { 0x07, 0x40c003f4 }, 1607 { 0x08, 0x424503f2 }, 1608 { 0x0a, 0x400000f3 }, 1609 { 0x0b, 0x02a19020 }, 1610 { 0x0c, 0x40a000f0 }, 1611 { 0x0d, 0x90100210 }, 1612 { 0x10, 0x400003f1 }, 1613 { 0x11, 0x503303f3 }, 1614 {} 1615 }; 1616 1617 static const struct hda_pintbl stac925xM5_pin_configs[] = { 1618 { 0x07, 0x40c003f4 }, 1619 { 0x08, 0x424503f2 }, 1620 { 0x0a, 0x400000f3 }, 1621 { 0x0b, 0x02a19020 }, 1622 { 0x0c, 0x40a000f0 }, 1623 { 0x0d, 0x90100210 }, 1624 { 0x10, 0x400003f1 }, 1625 { 0x11, 0x9033032e }, 1626 {} 1627 }; 1628 1629 static const struct hda_pintbl stac925xM6_pin_configs[] = { 1630 { 0x07, 0x40c003f4 }, 1631 { 0x08, 0x424503f2 }, 1632 { 0x0a, 0x400000f3 }, 1633 { 0x0b, 0x02a19020 }, 1634 { 0x0c, 0x40a000f0 }, 1635 { 0x0d, 0x90100210 }, 1636 { 0x10, 0x400003f1 }, 1637 { 0x11, 0x90330320 }, 1638 {} 1639 }; 1640 1641 static const struct hda_fixup stac925x_fixups[] = { 1642 [STAC_REF] = { 1643 .type = HDA_FIXUP_PINS, 1644 .v.pins = ref925x_pin_configs, 1645 }, 1646 [STAC_M1] = { 1647 .type = HDA_FIXUP_PINS, 1648 .v.pins = stac925xM1_pin_configs, 1649 }, 1650 [STAC_M1_2] = { 1651 .type = HDA_FIXUP_PINS, 1652 .v.pins = stac925xM1_2_pin_configs, 1653 }, 1654 [STAC_M2] = { 1655 .type = HDA_FIXUP_PINS, 1656 .v.pins = stac925xM2_pin_configs, 1657 }, 1658 [STAC_M2_2] = { 1659 .type = HDA_FIXUP_PINS, 1660 .v.pins = stac925xM2_2_pin_configs, 1661 }, 1662 [STAC_M3] = { 1663 .type = HDA_FIXUP_PINS, 1664 .v.pins = stac925xM3_pin_configs, 1665 }, 1666 [STAC_M5] = { 1667 .type = HDA_FIXUP_PINS, 1668 .v.pins = stac925xM5_pin_configs, 1669 }, 1670 [STAC_M6] = { 1671 .type = HDA_FIXUP_PINS, 1672 .v.pins = stac925xM6_pin_configs, 1673 }, 1674 }; 1675 1676 static const struct hda_model_fixup stac925x_models[] = { 1677 { .id = STAC_REF, .name = "ref" }, 1678 { .id = STAC_M1, .name = "m1" }, 1679 { .id = STAC_M1_2, .name = "m1-2" }, 1680 { .id = STAC_M2, .name = "m2" }, 1681 { .id = STAC_M2_2, .name = "m2-2" }, 1682 { .id = STAC_M3, .name = "m3" }, 1683 { .id = STAC_M5, .name = "m5" }, 1684 { .id = STAC_M6, .name = "m6" }, 1685 {} 1686 }; 1687 1688 static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1689 /* SigmaTel reference board */ 1690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1691 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1692 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1693 1694 /* Default table for unknown ID */ 1695 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1696 1697 /* gateway machines are checked via codec ssid */ 1698 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1699 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1700 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1701 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1702 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1703 /* Not sure about the brand name for those */ 1704 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1705 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1706 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1707 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1708 {} /* terminator */ 1709 }; 1710 1711 static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1712 { 0x0a, 0x02214030 }, 1713 { 0x0b, 0x02a19040 }, 1714 { 0x0c, 0x01a19020 }, 1715 { 0x0d, 0x02214030 }, 1716 { 0x0e, 0x0181302e }, 1717 { 0x0f, 0x01014010 }, 1718 { 0x10, 0x01014020 }, 1719 { 0x11, 0x01014030 }, 1720 { 0x12, 0x02319040 }, 1721 { 0x13, 0x90a000f0 }, 1722 { 0x14, 0x90a000f0 }, 1723 { 0x22, 0x01452050 }, 1724 { 0x23, 0x01452050 }, 1725 {} 1726 }; 1727 1728 static const struct hda_pintbl dell_m6_pin_configs[] = { 1729 { 0x0a, 0x0321101f }, 1730 { 0x0b, 0x4f00000f }, 1731 { 0x0c, 0x4f0000f0 }, 1732 { 0x0d, 0x90170110 }, 1733 { 0x0e, 0x03a11020 }, 1734 { 0x0f, 0x0321101f }, 1735 { 0x10, 0x4f0000f0 }, 1736 { 0x11, 0x4f0000f0 }, 1737 { 0x12, 0x4f0000f0 }, 1738 { 0x13, 0x90a60160 }, 1739 { 0x14, 0x4f0000f0 }, 1740 { 0x22, 0x4f0000f0 }, 1741 { 0x23, 0x4f0000f0 }, 1742 {} 1743 }; 1744 1745 static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1746 { 0x0a, 0x0321101f }, 1747 { 0x0b, 0x0321101f }, 1748 { 0x0c, 0x03a11020 }, 1749 { 0x0d, 0x03014020 }, 1750 { 0x0e, 0x90170110 }, 1751 { 0x0f, 0x4f0000f0 }, 1752 { 0x10, 0x4f0000f0 }, 1753 { 0x11, 0x4f0000f0 }, 1754 { 0x12, 0x4f0000f0 }, 1755 { 0x13, 0x90a60160 }, 1756 { 0x14, 0x4f0000f0 }, 1757 { 0x22, 0x4f0000f0 }, 1758 { 0x23, 0x904601b0 }, 1759 {} 1760 }; 1761 1762 static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1763 { 0x0a, 0x02214230 }, 1764 { 0x0b, 0x02A19240 }, 1765 { 0x0c, 0x01013214 }, 1766 { 0x0d, 0x01014210 }, 1767 { 0x0e, 0x01A19250 }, 1768 { 0x0f, 0x01011212 }, 1769 { 0x10, 0x01016211 }, 1770 {} 1771 }; 1772 1773 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = { 1774 { 0x0a, 0x02214030 }, 1775 { 0x0b, 0x02A19010 }, 1776 {} 1777 }; 1778 1779 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = { 1780 { 0x0e, 0x400000f0 }, 1781 {} 1782 }; 1783 1784 static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1785 const struct hda_fixup *fix, int action) 1786 { 1787 struct sigmatel_spec *spec = codec->spec; 1788 1789 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1790 return; 1791 1792 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1793 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1794 } 1795 1796 static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1797 { 1798 struct sigmatel_spec *spec = codec->spec; 1799 1800 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1801 spec->eapd_switch = 0; 1802 } 1803 1804 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1805 const struct hda_fixup *fix, int action) 1806 { 1807 struct sigmatel_spec *spec = codec->spec; 1808 1809 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1810 return; 1811 1812 stac92hd73xx_fixup_dell(codec); 1813 snd_hda_add_verbs(codec, dell_eq_core_init); 1814 spec->volknob_init = 1; 1815 } 1816 1817 /* Analog Mics */ 1818 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1819 const struct hda_fixup *fix, int action) 1820 { 1821 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1822 return; 1823 1824 stac92hd73xx_fixup_dell(codec); 1825 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1826 } 1827 1828 /* Digital Mics */ 1829 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1830 const struct hda_fixup *fix, int action) 1831 { 1832 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1833 return; 1834 1835 stac92hd73xx_fixup_dell(codec); 1836 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1837 } 1838 1839 /* Both */ 1840 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1841 const struct hda_fixup *fix, int action) 1842 { 1843 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1844 return; 1845 1846 stac92hd73xx_fixup_dell(codec); 1847 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1848 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1849 } 1850 1851 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1852 const struct hda_fixup *fix, int action) 1853 { 1854 struct sigmatel_spec *spec = codec->spec; 1855 1856 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1857 return; 1858 1859 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1860 spec->eapd_switch = 0; 1861 } 1862 1863 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1864 const struct hda_fixup *fix, int action) 1865 { 1866 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1867 codec->no_jack_detect = 1; 1868 } 1869 1870 1871 static void stac92hd73xx_disable_automute(struct hda_codec *codec, 1872 const struct hda_fixup *fix, int action) 1873 { 1874 struct sigmatel_spec *spec = codec->spec; 1875 1876 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1877 return; 1878 1879 spec->gen.suppress_auto_mute = 1; 1880 } 1881 1882 static const struct hda_fixup stac92hd73xx_fixups[] = { 1883 [STAC_92HD73XX_REF] = { 1884 .type = HDA_FIXUP_FUNC, 1885 .v.func = stac92hd73xx_fixup_ref, 1886 }, 1887 [STAC_DELL_M6_AMIC] = { 1888 .type = HDA_FIXUP_FUNC, 1889 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1890 }, 1891 [STAC_DELL_M6_DMIC] = { 1892 .type = HDA_FIXUP_FUNC, 1893 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1894 }, 1895 [STAC_DELL_M6_BOTH] = { 1896 .type = HDA_FIXUP_FUNC, 1897 .v.func = stac92hd73xx_fixup_dell_m6_both, 1898 }, 1899 [STAC_DELL_EQ] = { 1900 .type = HDA_FIXUP_FUNC, 1901 .v.func = stac92hd73xx_fixup_dell_eq, 1902 }, 1903 [STAC_ALIENWARE_M17X] = { 1904 .type = HDA_FIXUP_FUNC, 1905 .v.func = stac92hd73xx_fixup_alienware_m17x, 1906 }, 1907 [STAC_ELO_VUPOINT_15MX] = { 1908 .type = HDA_FIXUP_FUNC, 1909 .v.func = stac92hd73xx_disable_automute, 1910 }, 1911 [STAC_92HD73XX_INTEL] = { 1912 .type = HDA_FIXUP_PINS, 1913 .v.pins = intel_dg45id_pin_configs, 1914 }, 1915 [STAC_92HD73XX_NO_JD] = { 1916 .type = HDA_FIXUP_FUNC, 1917 .v.func = stac92hd73xx_fixup_no_jd, 1918 }, 1919 [STAC_92HD89XX_HP_FRONT_JACK] = { 1920 .type = HDA_FIXUP_PINS, 1921 .v.pins = stac92hd89xx_hp_front_jack_pin_configs, 1922 }, 1923 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = { 1924 .type = HDA_FIXUP_PINS, 1925 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, 1926 }, 1927 [STAC_92HD73XX_ASUS_MOBO] = { 1928 .type = HDA_FIXUP_PINS, 1929 .v.pins = (const struct hda_pintbl[]) { 1930 /* enable 5.1 and SPDIF out */ 1931 { 0x0c, 0x01014411 }, 1932 { 0x0d, 0x01014410 }, 1933 { 0x0e, 0x01014412 }, 1934 { 0x22, 0x014b1180 }, 1935 { } 1936 } 1937 }, 1938 }; 1939 1940 static const struct hda_model_fixup stac92hd73xx_models[] = { 1941 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1942 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1943 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1944 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1945 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1946 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1947 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1948 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1949 { .id = STAC_ELO_VUPOINT_15MX, .name = "elo-vupoint-15mx" }, 1950 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" }, 1951 {} 1952 }; 1953 1954 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1955 /* SigmaTel reference board */ 1956 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1957 "DFI LanParty", STAC_92HD73XX_REF), 1958 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1959 "DFI LanParty", STAC_92HD73XX_REF), 1960 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1961 "Intel DG45ID", STAC_92HD73XX_INTEL), 1962 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1963 "Intel DG45FC", STAC_92HD73XX_INTEL), 1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1965 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1966 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1967 "unknown Dell", STAC_DELL_M6_DMIC), 1968 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1969 "unknown Dell", STAC_DELL_M6_BOTH), 1970 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1971 "unknown Dell", STAC_DELL_M6_BOTH), 1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1973 "unknown Dell", STAC_DELL_M6_AMIC), 1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1975 "unknown Dell", STAC_DELL_M6_AMIC), 1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1977 "unknown Dell", STAC_DELL_M6_DMIC), 1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1979 "unknown Dell", STAC_DELL_M6_DMIC), 1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1981 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1983 "Dell Studio 17", STAC_DELL_M6_DMIC), 1984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1985 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1987 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1989 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1991 "Dell Studio 1558", STAC_DELL_M6_DMIC), 1992 /* codec SSID matching */ 1993 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 1994 "Alienware M17x", STAC_ALIENWARE_M17X), 1995 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1996 "Alienware M17x", STAC_ALIENWARE_M17X), 1997 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 1998 "Alienware M17x R3", STAC_DELL_EQ), 1999 SND_PCI_QUIRK(0x1059, 0x1011, 2000 "ELO VuPoint 15MX", STAC_ELO_VUPOINT_15MX), 2001 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927, 2002 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK), 2003 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 2004 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 2005 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10", 2006 STAC_92HD73XX_ASUS_MOBO), 2007 {} /* terminator */ 2008 }; 2009 2010 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 2011 { 0x0a, 0x02214030 }, 2012 { 0x0b, 0x02211010 }, 2013 { 0x0c, 0x02a19020 }, 2014 { 0x0d, 0x02170130 }, 2015 { 0x0e, 0x01014050 }, 2016 { 0x0f, 0x01819040 }, 2017 { 0x10, 0x01014020 }, 2018 { 0x11, 0x90a3014e }, 2019 { 0x1f, 0x01451160 }, 2020 { 0x20, 0x98560170 }, 2021 {} 2022 }; 2023 2024 static const struct hda_pintbl dell_s14_pin_configs[] = { 2025 { 0x0a, 0x0221403f }, 2026 { 0x0b, 0x0221101f }, 2027 { 0x0c, 0x02a19020 }, 2028 { 0x0d, 0x90170110 }, 2029 { 0x0e, 0x40f000f0 }, 2030 { 0x0f, 0x40f000f0 }, 2031 { 0x10, 0x40f000f0 }, 2032 { 0x11, 0x90a60160 }, 2033 { 0x1f, 0x40f000f0 }, 2034 { 0x20, 0x40f000f0 }, 2035 {} 2036 }; 2037 2038 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 2039 { 0x0a, 0x02a11020 }, 2040 { 0x0b, 0x0221101f }, 2041 { 0x0c, 0x400000f0 }, 2042 { 0x0d, 0x90170110 }, 2043 { 0x0e, 0x400000f1 }, 2044 { 0x0f, 0x400000f2 }, 2045 { 0x10, 0x400000f3 }, 2046 { 0x11, 0x90a60160 }, 2047 { 0x1f, 0x400000f4 }, 2048 { 0x20, 0x400000f5 }, 2049 {} 2050 }; 2051 2052 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2053 { 0x0a, 0x03a12050 }, 2054 { 0x0b, 0x0321201f }, 2055 { 0x0c, 0x40f000f0 }, 2056 { 0x0d, 0x90170110 }, 2057 { 0x0e, 0x40f000f0 }, 2058 { 0x0f, 0x40f000f0 }, 2059 { 0x10, 0x90170110 }, 2060 { 0x11, 0xd5a30140 }, 2061 { 0x1f, 0x40f000f0 }, 2062 { 0x20, 0x40f000f0 }, 2063 {} 2064 }; 2065 2066 static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2067 { 0x0a, 0x01813050 }, 2068 { 0x0b, 0x0421201f }, 2069 { 0x0c, 0x04a1205e }, 2070 { 0x0d, 0x96130310 }, 2071 { 0x0e, 0x96130310 }, 2072 { 0x0f, 0x0101401f }, 2073 { 0x10, 0x1111611f }, 2074 { 0x11, 0xd5a30130 }, 2075 {} 2076 }; 2077 2078 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2079 { 0x0a, 0x40f000f0 }, 2080 { 0x0b, 0x0221101f }, 2081 { 0x0c, 0x02a11020 }, 2082 { 0x0d, 0x92170110 }, 2083 { 0x0e, 0x40f000f0 }, 2084 { 0x0f, 0x92170110 }, 2085 { 0x10, 0x40f000f0 }, 2086 { 0x11, 0xd5a30130 }, 2087 { 0x1f, 0x40f000f0 }, 2088 { 0x20, 0x40f000f0 }, 2089 {} 2090 }; 2091 2092 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2093 const struct hda_fixup *fix, int action) 2094 { 2095 struct sigmatel_spec *spec = codec->spec; 2096 2097 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2098 return; 2099 2100 if (hp_bnb2011_with_dock(codec)) { 2101 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2102 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2103 } 2104 2105 if (find_mute_led_cfg(codec, spec->default_polarity)) 2106 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 2107 spec->gpio_led, 2108 spec->gpio_led_polarity); 2109 2110 /* allow auto-switching of dock line-in */ 2111 spec->gen.line_in_auto_switch = true; 2112 } 2113 2114 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2115 const struct hda_fixup *fix, int action) 2116 { 2117 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2118 return; 2119 2120 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2121 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2122 } 2123 2124 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2125 const struct hda_fixup *fix, int action) 2126 { 2127 struct sigmatel_spec *spec = codec->spec; 2128 2129 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2130 spec->default_polarity = 0; 2131 } 2132 2133 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2134 const struct hda_fixup *fix, int action) 2135 { 2136 struct sigmatel_spec *spec = codec->spec; 2137 2138 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2139 spec->default_polarity = 1; 2140 } 2141 2142 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2143 const struct hda_fixup *fix, int action) 2144 { 2145 struct sigmatel_spec *spec = codec->spec; 2146 2147 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2148 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2149 #ifdef CONFIG_PM 2150 /* resetting controller clears GPIO, so we need to keep on */ 2151 codec->core.power_caps &= ~AC_PWRST_CLKSTOP; 2152 #endif 2153 } 2154 } 2155 2156 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec, 2157 const struct hda_fixup *fix, int action) 2158 { 2159 struct sigmatel_spec *spec = codec->spec; 2160 2161 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2162 spec->gpio_led = 0x10; /* GPIO4 */ 2163 spec->default_polarity = 0; 2164 } 2165 } 2166 2167 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2168 const struct hda_fixup *fix, int action) 2169 { 2170 struct sigmatel_spec *spec = codec->spec; 2171 2172 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2173 spec->headset_jack = 1; 2174 } 2175 2176 static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec, 2177 const struct hda_fixup *fix, 2178 int action) 2179 { 2180 struct sigmatel_spec *spec = codec->spec; 2181 2182 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2183 return; 2184 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 2185 spec->gpio_data = 0x10; 2186 spec->eapd_switch = 0; 2187 } 2188 2189 static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec, 2190 const struct hda_fixup *fix, 2191 int action) 2192 { 2193 struct sigmatel_spec *spec = codec->spec; 2194 static hda_nid_t preferred_pairs[] = { 2195 0xd, 0x13, 2196 0 2197 }; 2198 2199 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2200 return; 2201 2202 spec->gen.preferred_dacs = preferred_pairs; 2203 } 2204 2205 static const struct hda_verb hp_bnb13_eq_verbs[] = { 2206 /* 44.1KHz base */ 2207 { 0x22, 0x7A6, 0x3E }, 2208 { 0x22, 0x7A7, 0x68 }, 2209 { 0x22, 0x7A8, 0x17 }, 2210 { 0x22, 0x7A9, 0x3E }, 2211 { 0x22, 0x7AA, 0x68 }, 2212 { 0x22, 0x7AB, 0x17 }, 2213 { 0x22, 0x7AC, 0x00 }, 2214 { 0x22, 0x7AD, 0x80 }, 2215 { 0x22, 0x7A6, 0x83 }, 2216 { 0x22, 0x7A7, 0x2F }, 2217 { 0x22, 0x7A8, 0xD1 }, 2218 { 0x22, 0x7A9, 0x83 }, 2219 { 0x22, 0x7AA, 0x2F }, 2220 { 0x22, 0x7AB, 0xD1 }, 2221 { 0x22, 0x7AC, 0x01 }, 2222 { 0x22, 0x7AD, 0x80 }, 2223 { 0x22, 0x7A6, 0x3E }, 2224 { 0x22, 0x7A7, 0x68 }, 2225 { 0x22, 0x7A8, 0x17 }, 2226 { 0x22, 0x7A9, 0x3E }, 2227 { 0x22, 0x7AA, 0x68 }, 2228 { 0x22, 0x7AB, 0x17 }, 2229 { 0x22, 0x7AC, 0x02 }, 2230 { 0x22, 0x7AD, 0x80 }, 2231 { 0x22, 0x7A6, 0x7C }, 2232 { 0x22, 0x7A7, 0xC6 }, 2233 { 0x22, 0x7A8, 0x0C }, 2234 { 0x22, 0x7A9, 0x7C }, 2235 { 0x22, 0x7AA, 0xC6 }, 2236 { 0x22, 0x7AB, 0x0C }, 2237 { 0x22, 0x7AC, 0x03 }, 2238 { 0x22, 0x7AD, 0x80 }, 2239 { 0x22, 0x7A6, 0xC3 }, 2240 { 0x22, 0x7A7, 0x25 }, 2241 { 0x22, 0x7A8, 0xAF }, 2242 { 0x22, 0x7A9, 0xC3 }, 2243 { 0x22, 0x7AA, 0x25 }, 2244 { 0x22, 0x7AB, 0xAF }, 2245 { 0x22, 0x7AC, 0x04 }, 2246 { 0x22, 0x7AD, 0x80 }, 2247 { 0x22, 0x7A6, 0x3E }, 2248 { 0x22, 0x7A7, 0x85 }, 2249 { 0x22, 0x7A8, 0x73 }, 2250 { 0x22, 0x7A9, 0x3E }, 2251 { 0x22, 0x7AA, 0x85 }, 2252 { 0x22, 0x7AB, 0x73 }, 2253 { 0x22, 0x7AC, 0x05 }, 2254 { 0x22, 0x7AD, 0x80 }, 2255 { 0x22, 0x7A6, 0x85 }, 2256 { 0x22, 0x7A7, 0x39 }, 2257 { 0x22, 0x7A8, 0xC7 }, 2258 { 0x22, 0x7A9, 0x85 }, 2259 { 0x22, 0x7AA, 0x39 }, 2260 { 0x22, 0x7AB, 0xC7 }, 2261 { 0x22, 0x7AC, 0x06 }, 2262 { 0x22, 0x7AD, 0x80 }, 2263 { 0x22, 0x7A6, 0x3C }, 2264 { 0x22, 0x7A7, 0x90 }, 2265 { 0x22, 0x7A8, 0xB0 }, 2266 { 0x22, 0x7A9, 0x3C }, 2267 { 0x22, 0x7AA, 0x90 }, 2268 { 0x22, 0x7AB, 0xB0 }, 2269 { 0x22, 0x7AC, 0x07 }, 2270 { 0x22, 0x7AD, 0x80 }, 2271 { 0x22, 0x7A6, 0x7A }, 2272 { 0x22, 0x7A7, 0xC6 }, 2273 { 0x22, 0x7A8, 0x39 }, 2274 { 0x22, 0x7A9, 0x7A }, 2275 { 0x22, 0x7AA, 0xC6 }, 2276 { 0x22, 0x7AB, 0x39 }, 2277 { 0x22, 0x7AC, 0x08 }, 2278 { 0x22, 0x7AD, 0x80 }, 2279 { 0x22, 0x7A6, 0xC4 }, 2280 { 0x22, 0x7A7, 0xE9 }, 2281 { 0x22, 0x7A8, 0xDC }, 2282 { 0x22, 0x7A9, 0xC4 }, 2283 { 0x22, 0x7AA, 0xE9 }, 2284 { 0x22, 0x7AB, 0xDC }, 2285 { 0x22, 0x7AC, 0x09 }, 2286 { 0x22, 0x7AD, 0x80 }, 2287 { 0x22, 0x7A6, 0x3D }, 2288 { 0x22, 0x7A7, 0xE1 }, 2289 { 0x22, 0x7A8, 0x0D }, 2290 { 0x22, 0x7A9, 0x3D }, 2291 { 0x22, 0x7AA, 0xE1 }, 2292 { 0x22, 0x7AB, 0x0D }, 2293 { 0x22, 0x7AC, 0x0A }, 2294 { 0x22, 0x7AD, 0x80 }, 2295 { 0x22, 0x7A6, 0x89 }, 2296 { 0x22, 0x7A7, 0xB6 }, 2297 { 0x22, 0x7A8, 0xEB }, 2298 { 0x22, 0x7A9, 0x89 }, 2299 { 0x22, 0x7AA, 0xB6 }, 2300 { 0x22, 0x7AB, 0xEB }, 2301 { 0x22, 0x7AC, 0x0B }, 2302 { 0x22, 0x7AD, 0x80 }, 2303 { 0x22, 0x7A6, 0x39 }, 2304 { 0x22, 0x7A7, 0x9D }, 2305 { 0x22, 0x7A8, 0xFE }, 2306 { 0x22, 0x7A9, 0x39 }, 2307 { 0x22, 0x7AA, 0x9D }, 2308 { 0x22, 0x7AB, 0xFE }, 2309 { 0x22, 0x7AC, 0x0C }, 2310 { 0x22, 0x7AD, 0x80 }, 2311 { 0x22, 0x7A6, 0x76 }, 2312 { 0x22, 0x7A7, 0x49 }, 2313 { 0x22, 0x7A8, 0x15 }, 2314 { 0x22, 0x7A9, 0x76 }, 2315 { 0x22, 0x7AA, 0x49 }, 2316 { 0x22, 0x7AB, 0x15 }, 2317 { 0x22, 0x7AC, 0x0D }, 2318 { 0x22, 0x7AD, 0x80 }, 2319 { 0x22, 0x7A6, 0xC8 }, 2320 { 0x22, 0x7A7, 0x80 }, 2321 { 0x22, 0x7A8, 0xF5 }, 2322 { 0x22, 0x7A9, 0xC8 }, 2323 { 0x22, 0x7AA, 0x80 }, 2324 { 0x22, 0x7AB, 0xF5 }, 2325 { 0x22, 0x7AC, 0x0E }, 2326 { 0x22, 0x7AD, 0x80 }, 2327 { 0x22, 0x7A6, 0x40 }, 2328 { 0x22, 0x7A7, 0x00 }, 2329 { 0x22, 0x7A8, 0x00 }, 2330 { 0x22, 0x7A9, 0x40 }, 2331 { 0x22, 0x7AA, 0x00 }, 2332 { 0x22, 0x7AB, 0x00 }, 2333 { 0x22, 0x7AC, 0x0F }, 2334 { 0x22, 0x7AD, 0x80 }, 2335 { 0x22, 0x7A6, 0x90 }, 2336 { 0x22, 0x7A7, 0x68 }, 2337 { 0x22, 0x7A8, 0xF1 }, 2338 { 0x22, 0x7A9, 0x90 }, 2339 { 0x22, 0x7AA, 0x68 }, 2340 { 0x22, 0x7AB, 0xF1 }, 2341 { 0x22, 0x7AC, 0x10 }, 2342 { 0x22, 0x7AD, 0x80 }, 2343 { 0x22, 0x7A6, 0x34 }, 2344 { 0x22, 0x7A7, 0x47 }, 2345 { 0x22, 0x7A8, 0x6C }, 2346 { 0x22, 0x7A9, 0x34 }, 2347 { 0x22, 0x7AA, 0x47 }, 2348 { 0x22, 0x7AB, 0x6C }, 2349 { 0x22, 0x7AC, 0x11 }, 2350 { 0x22, 0x7AD, 0x80 }, 2351 { 0x22, 0x7A6, 0x6F }, 2352 { 0x22, 0x7A7, 0x97 }, 2353 { 0x22, 0x7A8, 0x0F }, 2354 { 0x22, 0x7A9, 0x6F }, 2355 { 0x22, 0x7AA, 0x97 }, 2356 { 0x22, 0x7AB, 0x0F }, 2357 { 0x22, 0x7AC, 0x12 }, 2358 { 0x22, 0x7AD, 0x80 }, 2359 { 0x22, 0x7A6, 0xCB }, 2360 { 0x22, 0x7A7, 0xB8 }, 2361 { 0x22, 0x7A8, 0x94 }, 2362 { 0x22, 0x7A9, 0xCB }, 2363 { 0x22, 0x7AA, 0xB8 }, 2364 { 0x22, 0x7AB, 0x94 }, 2365 { 0x22, 0x7AC, 0x13 }, 2366 { 0x22, 0x7AD, 0x80 }, 2367 { 0x22, 0x7A6, 0x40 }, 2368 { 0x22, 0x7A7, 0x00 }, 2369 { 0x22, 0x7A8, 0x00 }, 2370 { 0x22, 0x7A9, 0x40 }, 2371 { 0x22, 0x7AA, 0x00 }, 2372 { 0x22, 0x7AB, 0x00 }, 2373 { 0x22, 0x7AC, 0x14 }, 2374 { 0x22, 0x7AD, 0x80 }, 2375 { 0x22, 0x7A6, 0x95 }, 2376 { 0x22, 0x7A7, 0x76 }, 2377 { 0x22, 0x7A8, 0x5B }, 2378 { 0x22, 0x7A9, 0x95 }, 2379 { 0x22, 0x7AA, 0x76 }, 2380 { 0x22, 0x7AB, 0x5B }, 2381 { 0x22, 0x7AC, 0x15 }, 2382 { 0x22, 0x7AD, 0x80 }, 2383 { 0x22, 0x7A6, 0x31 }, 2384 { 0x22, 0x7A7, 0xAC }, 2385 { 0x22, 0x7A8, 0x31 }, 2386 { 0x22, 0x7A9, 0x31 }, 2387 { 0x22, 0x7AA, 0xAC }, 2388 { 0x22, 0x7AB, 0x31 }, 2389 { 0x22, 0x7AC, 0x16 }, 2390 { 0x22, 0x7AD, 0x80 }, 2391 { 0x22, 0x7A6, 0x6A }, 2392 { 0x22, 0x7A7, 0x89 }, 2393 { 0x22, 0x7A8, 0xA5 }, 2394 { 0x22, 0x7A9, 0x6A }, 2395 { 0x22, 0x7AA, 0x89 }, 2396 { 0x22, 0x7AB, 0xA5 }, 2397 { 0x22, 0x7AC, 0x17 }, 2398 { 0x22, 0x7AD, 0x80 }, 2399 { 0x22, 0x7A6, 0xCE }, 2400 { 0x22, 0x7A7, 0x53 }, 2401 { 0x22, 0x7A8, 0xCF }, 2402 { 0x22, 0x7A9, 0xCE }, 2403 { 0x22, 0x7AA, 0x53 }, 2404 { 0x22, 0x7AB, 0xCF }, 2405 { 0x22, 0x7AC, 0x18 }, 2406 { 0x22, 0x7AD, 0x80 }, 2407 { 0x22, 0x7A6, 0x40 }, 2408 { 0x22, 0x7A7, 0x00 }, 2409 { 0x22, 0x7A8, 0x00 }, 2410 { 0x22, 0x7A9, 0x40 }, 2411 { 0x22, 0x7AA, 0x00 }, 2412 { 0x22, 0x7AB, 0x00 }, 2413 { 0x22, 0x7AC, 0x19 }, 2414 { 0x22, 0x7AD, 0x80 }, 2415 /* 48KHz base */ 2416 { 0x22, 0x7A6, 0x3E }, 2417 { 0x22, 0x7A7, 0x88 }, 2418 { 0x22, 0x7A8, 0xDC }, 2419 { 0x22, 0x7A9, 0x3E }, 2420 { 0x22, 0x7AA, 0x88 }, 2421 { 0x22, 0x7AB, 0xDC }, 2422 { 0x22, 0x7AC, 0x1A }, 2423 { 0x22, 0x7AD, 0x80 }, 2424 { 0x22, 0x7A6, 0x82 }, 2425 { 0x22, 0x7A7, 0xEE }, 2426 { 0x22, 0x7A8, 0x46 }, 2427 { 0x22, 0x7A9, 0x82 }, 2428 { 0x22, 0x7AA, 0xEE }, 2429 { 0x22, 0x7AB, 0x46 }, 2430 { 0x22, 0x7AC, 0x1B }, 2431 { 0x22, 0x7AD, 0x80 }, 2432 { 0x22, 0x7A6, 0x3E }, 2433 { 0x22, 0x7A7, 0x88 }, 2434 { 0x22, 0x7A8, 0xDC }, 2435 { 0x22, 0x7A9, 0x3E }, 2436 { 0x22, 0x7AA, 0x88 }, 2437 { 0x22, 0x7AB, 0xDC }, 2438 { 0x22, 0x7AC, 0x1C }, 2439 { 0x22, 0x7AD, 0x80 }, 2440 { 0x22, 0x7A6, 0x7D }, 2441 { 0x22, 0x7A7, 0x09 }, 2442 { 0x22, 0x7A8, 0x28 }, 2443 { 0x22, 0x7A9, 0x7D }, 2444 { 0x22, 0x7AA, 0x09 }, 2445 { 0x22, 0x7AB, 0x28 }, 2446 { 0x22, 0x7AC, 0x1D }, 2447 { 0x22, 0x7AD, 0x80 }, 2448 { 0x22, 0x7A6, 0xC2 }, 2449 { 0x22, 0x7A7, 0xE5 }, 2450 { 0x22, 0x7A8, 0xB4 }, 2451 { 0x22, 0x7A9, 0xC2 }, 2452 { 0x22, 0x7AA, 0xE5 }, 2453 { 0x22, 0x7AB, 0xB4 }, 2454 { 0x22, 0x7AC, 0x1E }, 2455 { 0x22, 0x7AD, 0x80 }, 2456 { 0x22, 0x7A6, 0x3E }, 2457 { 0x22, 0x7A7, 0xA3 }, 2458 { 0x22, 0x7A8, 0x1F }, 2459 { 0x22, 0x7A9, 0x3E }, 2460 { 0x22, 0x7AA, 0xA3 }, 2461 { 0x22, 0x7AB, 0x1F }, 2462 { 0x22, 0x7AC, 0x1F }, 2463 { 0x22, 0x7AD, 0x80 }, 2464 { 0x22, 0x7A6, 0x84 }, 2465 { 0x22, 0x7A7, 0xCA }, 2466 { 0x22, 0x7A8, 0xF1 }, 2467 { 0x22, 0x7A9, 0x84 }, 2468 { 0x22, 0x7AA, 0xCA }, 2469 { 0x22, 0x7AB, 0xF1 }, 2470 { 0x22, 0x7AC, 0x20 }, 2471 { 0x22, 0x7AD, 0x80 }, 2472 { 0x22, 0x7A6, 0x3C }, 2473 { 0x22, 0x7A7, 0xD5 }, 2474 { 0x22, 0x7A8, 0x9C }, 2475 { 0x22, 0x7A9, 0x3C }, 2476 { 0x22, 0x7AA, 0xD5 }, 2477 { 0x22, 0x7AB, 0x9C }, 2478 { 0x22, 0x7AC, 0x21 }, 2479 { 0x22, 0x7AD, 0x80 }, 2480 { 0x22, 0x7A6, 0x7B }, 2481 { 0x22, 0x7A7, 0x35 }, 2482 { 0x22, 0x7A8, 0x0F }, 2483 { 0x22, 0x7A9, 0x7B }, 2484 { 0x22, 0x7AA, 0x35 }, 2485 { 0x22, 0x7AB, 0x0F }, 2486 { 0x22, 0x7AC, 0x22 }, 2487 { 0x22, 0x7AD, 0x80 }, 2488 { 0x22, 0x7A6, 0xC4 }, 2489 { 0x22, 0x7A7, 0x87 }, 2490 { 0x22, 0x7A8, 0x45 }, 2491 { 0x22, 0x7A9, 0xC4 }, 2492 { 0x22, 0x7AA, 0x87 }, 2493 { 0x22, 0x7AB, 0x45 }, 2494 { 0x22, 0x7AC, 0x23 }, 2495 { 0x22, 0x7AD, 0x80 }, 2496 { 0x22, 0x7A6, 0x3E }, 2497 { 0x22, 0x7A7, 0x0A }, 2498 { 0x22, 0x7A8, 0x78 }, 2499 { 0x22, 0x7A9, 0x3E }, 2500 { 0x22, 0x7AA, 0x0A }, 2501 { 0x22, 0x7AB, 0x78 }, 2502 { 0x22, 0x7AC, 0x24 }, 2503 { 0x22, 0x7AD, 0x80 }, 2504 { 0x22, 0x7A6, 0x88 }, 2505 { 0x22, 0x7A7, 0xE2 }, 2506 { 0x22, 0x7A8, 0x05 }, 2507 { 0x22, 0x7A9, 0x88 }, 2508 { 0x22, 0x7AA, 0xE2 }, 2509 { 0x22, 0x7AB, 0x05 }, 2510 { 0x22, 0x7AC, 0x25 }, 2511 { 0x22, 0x7AD, 0x80 }, 2512 { 0x22, 0x7A6, 0x3A }, 2513 { 0x22, 0x7A7, 0x1A }, 2514 { 0x22, 0x7A8, 0xA3 }, 2515 { 0x22, 0x7A9, 0x3A }, 2516 { 0x22, 0x7AA, 0x1A }, 2517 { 0x22, 0x7AB, 0xA3 }, 2518 { 0x22, 0x7AC, 0x26 }, 2519 { 0x22, 0x7AD, 0x80 }, 2520 { 0x22, 0x7A6, 0x77 }, 2521 { 0x22, 0x7A7, 0x1D }, 2522 { 0x22, 0x7A8, 0xFB }, 2523 { 0x22, 0x7A9, 0x77 }, 2524 { 0x22, 0x7AA, 0x1D }, 2525 { 0x22, 0x7AB, 0xFB }, 2526 { 0x22, 0x7AC, 0x27 }, 2527 { 0x22, 0x7AD, 0x80 }, 2528 { 0x22, 0x7A6, 0xC7 }, 2529 { 0x22, 0x7A7, 0xDA }, 2530 { 0x22, 0x7A8, 0xE5 }, 2531 { 0x22, 0x7A9, 0xC7 }, 2532 { 0x22, 0x7AA, 0xDA }, 2533 { 0x22, 0x7AB, 0xE5 }, 2534 { 0x22, 0x7AC, 0x28 }, 2535 { 0x22, 0x7AD, 0x80 }, 2536 { 0x22, 0x7A6, 0x40 }, 2537 { 0x22, 0x7A7, 0x00 }, 2538 { 0x22, 0x7A8, 0x00 }, 2539 { 0x22, 0x7A9, 0x40 }, 2540 { 0x22, 0x7AA, 0x00 }, 2541 { 0x22, 0x7AB, 0x00 }, 2542 { 0x22, 0x7AC, 0x29 }, 2543 { 0x22, 0x7AD, 0x80 }, 2544 { 0x22, 0x7A6, 0x8E }, 2545 { 0x22, 0x7A7, 0xD7 }, 2546 { 0x22, 0x7A8, 0x22 }, 2547 { 0x22, 0x7A9, 0x8E }, 2548 { 0x22, 0x7AA, 0xD7 }, 2549 { 0x22, 0x7AB, 0x22 }, 2550 { 0x22, 0x7AC, 0x2A }, 2551 { 0x22, 0x7AD, 0x80 }, 2552 { 0x22, 0x7A6, 0x35 }, 2553 { 0x22, 0x7A7, 0x26 }, 2554 { 0x22, 0x7A8, 0xC6 }, 2555 { 0x22, 0x7A9, 0x35 }, 2556 { 0x22, 0x7AA, 0x26 }, 2557 { 0x22, 0x7AB, 0xC6 }, 2558 { 0x22, 0x7AC, 0x2B }, 2559 { 0x22, 0x7AD, 0x80 }, 2560 { 0x22, 0x7A6, 0x71 }, 2561 { 0x22, 0x7A7, 0x28 }, 2562 { 0x22, 0x7A8, 0xDE }, 2563 { 0x22, 0x7A9, 0x71 }, 2564 { 0x22, 0x7AA, 0x28 }, 2565 { 0x22, 0x7AB, 0xDE }, 2566 { 0x22, 0x7AC, 0x2C }, 2567 { 0x22, 0x7AD, 0x80 }, 2568 { 0x22, 0x7A6, 0xCA }, 2569 { 0x22, 0x7A7, 0xD9 }, 2570 { 0x22, 0x7A8, 0x3A }, 2571 { 0x22, 0x7A9, 0xCA }, 2572 { 0x22, 0x7AA, 0xD9 }, 2573 { 0x22, 0x7AB, 0x3A }, 2574 { 0x22, 0x7AC, 0x2D }, 2575 { 0x22, 0x7AD, 0x80 }, 2576 { 0x22, 0x7A6, 0x40 }, 2577 { 0x22, 0x7A7, 0x00 }, 2578 { 0x22, 0x7A8, 0x00 }, 2579 { 0x22, 0x7A9, 0x40 }, 2580 { 0x22, 0x7AA, 0x00 }, 2581 { 0x22, 0x7AB, 0x00 }, 2582 { 0x22, 0x7AC, 0x2E }, 2583 { 0x22, 0x7AD, 0x80 }, 2584 { 0x22, 0x7A6, 0x93 }, 2585 { 0x22, 0x7A7, 0x5E }, 2586 { 0x22, 0x7A8, 0xD8 }, 2587 { 0x22, 0x7A9, 0x93 }, 2588 { 0x22, 0x7AA, 0x5E }, 2589 { 0x22, 0x7AB, 0xD8 }, 2590 { 0x22, 0x7AC, 0x2F }, 2591 { 0x22, 0x7AD, 0x80 }, 2592 { 0x22, 0x7A6, 0x32 }, 2593 { 0x22, 0x7A7, 0xB7 }, 2594 { 0x22, 0x7A8, 0xB1 }, 2595 { 0x22, 0x7A9, 0x32 }, 2596 { 0x22, 0x7AA, 0xB7 }, 2597 { 0x22, 0x7AB, 0xB1 }, 2598 { 0x22, 0x7AC, 0x30 }, 2599 { 0x22, 0x7AD, 0x80 }, 2600 { 0x22, 0x7A6, 0x6C }, 2601 { 0x22, 0x7A7, 0xA1 }, 2602 { 0x22, 0x7A8, 0x28 }, 2603 { 0x22, 0x7A9, 0x6C }, 2604 { 0x22, 0x7AA, 0xA1 }, 2605 { 0x22, 0x7AB, 0x28 }, 2606 { 0x22, 0x7AC, 0x31 }, 2607 { 0x22, 0x7AD, 0x80 }, 2608 { 0x22, 0x7A6, 0xCD }, 2609 { 0x22, 0x7A7, 0x48 }, 2610 { 0x22, 0x7A8, 0x4F }, 2611 { 0x22, 0x7A9, 0xCD }, 2612 { 0x22, 0x7AA, 0x48 }, 2613 { 0x22, 0x7AB, 0x4F }, 2614 { 0x22, 0x7AC, 0x32 }, 2615 { 0x22, 0x7AD, 0x80 }, 2616 { 0x22, 0x7A6, 0x40 }, 2617 { 0x22, 0x7A7, 0x00 }, 2618 { 0x22, 0x7A8, 0x00 }, 2619 { 0x22, 0x7A9, 0x40 }, 2620 { 0x22, 0x7AA, 0x00 }, 2621 { 0x22, 0x7AB, 0x00 }, 2622 { 0x22, 0x7AC, 0x33 }, 2623 { 0x22, 0x7AD, 0x80 }, 2624 /* common */ 2625 { 0x22, 0x782, 0xC1 }, 2626 { 0x22, 0x771, 0x2C }, 2627 { 0x22, 0x772, 0x2C }, 2628 { 0x22, 0x788, 0x04 }, 2629 { 0x01, 0x7B0, 0x08 }, 2630 {} 2631 }; 2632 2633 static const struct hda_fixup stac92hd83xxx_fixups[] = { 2634 [STAC_92HD83XXX_REF] = { 2635 .type = HDA_FIXUP_PINS, 2636 .v.pins = ref92hd83xxx_pin_configs, 2637 }, 2638 [STAC_92HD83XXX_PWR_REF] = { 2639 .type = HDA_FIXUP_PINS, 2640 .v.pins = ref92hd83xxx_pin_configs, 2641 }, 2642 [STAC_DELL_S14] = { 2643 .type = HDA_FIXUP_PINS, 2644 .v.pins = dell_s14_pin_configs, 2645 }, 2646 [STAC_DELL_VOSTRO_3500] = { 2647 .type = HDA_FIXUP_PINS, 2648 .v.pins = dell_vostro_3500_pin_configs, 2649 }, 2650 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2651 .type = HDA_FIXUP_PINS, 2652 .v.pins = hp_cNB11_intquad_pin_configs, 2653 .chained = true, 2654 .chain_id = STAC_92HD83XXX_HP, 2655 }, 2656 [STAC_92HD83XXX_HP] = { 2657 .type = HDA_FIXUP_FUNC, 2658 .v.func = stac92hd83xxx_fixup_hp, 2659 }, 2660 [STAC_HP_DV7_4000] = { 2661 .type = HDA_FIXUP_PINS, 2662 .v.pins = hp_dv7_4000_pin_configs, 2663 .chained = true, 2664 .chain_id = STAC_92HD83XXX_HP, 2665 }, 2666 [STAC_HP_ZEPHYR] = { 2667 .type = HDA_FIXUP_FUNC, 2668 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2669 .chained = true, 2670 .chain_id = STAC_92HD83XXX_HP, 2671 }, 2672 [STAC_92HD83XXX_HP_LED] = { 2673 .type = HDA_FIXUP_FUNC, 2674 .v.func = stac92hd83xxx_fixup_hp_led, 2675 .chained = true, 2676 .chain_id = STAC_92HD83XXX_HP, 2677 }, 2678 [STAC_92HD83XXX_HP_INV_LED] = { 2679 .type = HDA_FIXUP_FUNC, 2680 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2681 .chained = true, 2682 .chain_id = STAC_92HD83XXX_HP, 2683 }, 2684 [STAC_92HD83XXX_HP_MIC_LED] = { 2685 .type = HDA_FIXUP_FUNC, 2686 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2687 .chained = true, 2688 .chain_id = STAC_92HD83XXX_HP, 2689 }, 2690 [STAC_HP_LED_GPIO10] = { 2691 .type = HDA_FIXUP_FUNC, 2692 .v.func = stac92hd83xxx_fixup_hp_led_gpio10, 2693 .chained = true, 2694 .chain_id = STAC_92HD83XXX_HP, 2695 }, 2696 [STAC_92HD83XXX_HEADSET_JACK] = { 2697 .type = HDA_FIXUP_FUNC, 2698 .v.func = stac92hd83xxx_fixup_headset_jack, 2699 }, 2700 [STAC_HP_ENVY_BASS] = { 2701 .type = HDA_FIXUP_PINS, 2702 .v.pins = (const struct hda_pintbl[]) { 2703 { 0x0f, 0x90170111 }, 2704 {} 2705 }, 2706 }, 2707 [STAC_HP_BNB13_EQ] = { 2708 .type = HDA_FIXUP_VERBS, 2709 .v.verbs = hp_bnb13_eq_verbs, 2710 .chained = true, 2711 .chain_id = STAC_92HD83XXX_HP_MIC_LED, 2712 }, 2713 [STAC_HP_ENVY_TS_BASS] = { 2714 .type = HDA_FIXUP_PINS, 2715 .v.pins = (const struct hda_pintbl[]) { 2716 { 0x10, 0x92170111 }, 2717 {} 2718 }, 2719 }, 2720 [STAC_HP_ENVY_TS_DAC_BIND] = { 2721 .type = HDA_FIXUP_FUNC, 2722 .v.func = hp_envy_ts_fixup_dac_bind, 2723 .chained = true, 2724 .chain_id = STAC_HP_ENVY_TS_BASS, 2725 }, 2726 [STAC_92HD83XXX_GPIO10_EAPD] = { 2727 .type = HDA_FIXUP_FUNC, 2728 .v.func = stac92hd83xxx_fixup_gpio10_eapd, 2729 }, 2730 }; 2731 2732 static const struct hda_model_fixup stac92hd83xxx_models[] = { 2733 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2734 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2735 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2736 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2737 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2738 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2739 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2740 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2741 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2742 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2743 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2744 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2745 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, 2746 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" }, 2747 {} 2748 }; 2749 2750 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2751 /* SigmaTel reference board */ 2752 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2753 "DFI LanParty", STAC_92HD83XXX_REF), 2754 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2755 "DFI LanParty", STAC_92HD83XXX_REF), 2756 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2757 "unknown Dell", STAC_DELL_S14), 2758 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2759 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2760 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2761 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2762 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2763 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2764 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2765 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2766 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2767 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2768 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2769 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2770 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2771 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2772 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2773 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2774 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2775 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2776 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2777 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2778 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2779 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2780 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2781 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2782 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2783 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2785 "HP Pavilion dv7", STAC_HP_DV7_4000), 2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2787 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2789 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2791 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899, 2793 "HP Folio 13", STAC_HP_LED_GPIO10), 2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2795 "HP Folio", STAC_HP_BNB13_EQ), 2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, 2797 "HP bNB13", STAC_HP_BNB13_EQ), 2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, 2799 "HP bNB13", STAC_HP_BNB13_EQ), 2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, 2801 "HP bNB13", STAC_HP_BNB13_EQ), 2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e, 2803 "HP ENVY TS", STAC_HP_ENVY_TS_BASS), 2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967, 2805 "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND), 2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, 2807 "HP bNB13", STAC_HP_BNB13_EQ), 2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, 2809 "HP bNB13", STAC_HP_BNB13_EQ), 2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, 2811 "HP bNB13", STAC_HP_BNB13_EQ), 2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, 2813 "HP bNB13", STAC_HP_BNB13_EQ), 2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, 2815 "HP bNB13", STAC_HP_BNB13_EQ), 2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, 2817 "HP bNB13", STAC_HP_BNB13_EQ), 2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, 2819 "HP bNB13", STAC_HP_BNB13_EQ), 2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, 2821 "HP bNB13", STAC_HP_BNB13_EQ), 2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, 2823 "HP bNB13", STAC_HP_BNB13_EQ), 2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, 2825 "HP bNB13", STAC_HP_BNB13_EQ), 2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, 2827 "HP bNB13", STAC_HP_BNB13_EQ), 2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, 2829 "HP bNB13", STAC_HP_BNB13_EQ), 2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, 2831 "HP bNB13", STAC_HP_BNB13_EQ), 2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, 2833 "HP bNB13", STAC_HP_BNB13_EQ), 2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, 2835 "HP bNB13", STAC_HP_BNB13_EQ), 2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, 2837 "HP bNB13", STAC_HP_BNB13_EQ), 2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, 2839 "HP bNB13", STAC_HP_BNB13_EQ), 2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, 2841 "HP bNB13", STAC_HP_BNB13_EQ), 2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, 2843 "HP bNB13", STAC_HP_BNB13_EQ), 2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, 2845 "HP bNB13", STAC_HP_BNB13_EQ), 2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, 2847 "HP bNB13", STAC_HP_BNB13_EQ), 2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, 2849 "HP bNB13", STAC_HP_BNB13_EQ), 2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, 2851 "HP bNB13", STAC_HP_BNB13_EQ), 2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, 2853 "HP bNB13", STAC_HP_BNB13_EQ), 2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, 2855 "HP bNB13", STAC_HP_BNB13_EQ), 2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, 2857 "HP bNB13", STAC_HP_BNB13_EQ), 2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, 2859 "HP bNB13", STAC_HP_BNB13_EQ), 2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, 2861 "HP bNB13", STAC_HP_BNB13_EQ), 2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, 2863 "HP bNB13", STAC_HP_BNB13_EQ), 2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, 2865 "HP bNB13", STAC_HP_BNB13_EQ), 2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, 2867 "HP bNB13", STAC_HP_BNB13_EQ), 2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, 2869 "HP bNB13", STAC_HP_BNB13_EQ), 2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, 2871 "HP bNB13", STAC_HP_BNB13_EQ), 2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, 2873 "HP bNB13", STAC_HP_BNB13_EQ), 2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, 2875 "HP bNB13", STAC_HP_BNB13_EQ), 2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, 2877 "HP bNB13", STAC_HP_BNB13_EQ), 2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, 2879 "HP bNB13", STAC_HP_BNB13_EQ), 2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, 2881 "HP bNB13", STAC_HP_BNB13_EQ), 2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, 2883 "HP bNB13", STAC_HP_BNB13_EQ), 2884 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, 2885 "HP bNB13", STAC_HP_BNB13_EQ), 2886 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, 2887 "HP bNB13", STAC_HP_BNB13_EQ), 2888 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, 2889 "HP bNB13", STAC_HP_BNB13_EQ), 2890 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, 2891 "HP bNB13", STAC_HP_BNB13_EQ), 2892 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, 2893 "HP bNB13", STAC_HP_BNB13_EQ), 2894 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2895 "HP", STAC_92HD83XXX_HP_MIC_LED), 2896 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2897 "HP", STAC_92HD83XXX_HP_MIC_LED), 2898 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2899 "HP", STAC_92HD83XXX_HP_MIC_LED), 2900 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2901 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2902 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2903 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2904 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2905 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2906 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2907 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2908 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2909 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2910 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2911 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2912 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2913 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2914 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2915 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2916 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2917 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2918 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2919 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2920 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2921 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2922 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2923 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2924 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2925 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2926 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2927 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2928 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2929 "HP", STAC_HP_ZEPHYR), 2930 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2931 "HP Mini", STAC_92HD83XXX_HP_LED), 2932 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2933 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2934 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2935 "HP Mini", STAC_92HD83XXX_HP_LED), 2936 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2937 /* match both for 0xfa91 and 0xfa93 */ 2938 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91, 2939 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD), 2940 {} /* terminator */ 2941 }; 2942 2943 /* HP dv7 bass switch - GPIO5 */ 2944 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2945 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2946 struct snd_ctl_elem_value *ucontrol) 2947 { 2948 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2949 struct sigmatel_spec *spec = codec->spec; 2950 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2951 return 0; 2952 } 2953 2954 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2955 struct snd_ctl_elem_value *ucontrol) 2956 { 2957 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2958 struct sigmatel_spec *spec = codec->spec; 2959 unsigned int gpio_data; 2960 2961 gpio_data = (spec->gpio_data & ~0x20) | 2962 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2963 if (gpio_data == spec->gpio_data) 2964 return 0; 2965 spec->gpio_data = gpio_data; 2966 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2967 return 1; 2968 } 2969 2970 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2971 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2972 .info = stac_hp_bass_gpio_info, 2973 .get = stac_hp_bass_gpio_get, 2974 .put = stac_hp_bass_gpio_put, 2975 }; 2976 2977 static int stac_add_hp_bass_switch(struct hda_codec *codec) 2978 { 2979 struct sigmatel_spec *spec = codec->spec; 2980 2981 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2982 &stac_hp_bass_sw_ctrl)) 2983 return -ENOMEM; 2984 2985 spec->gpio_mask |= 0x20; 2986 spec->gpio_dir |= 0x20; 2987 spec->gpio_data |= 0x20; 2988 return 0; 2989 } 2990 2991 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 2992 { 0x0a, 0x02214030 }, 2993 { 0x0b, 0x02a19040 }, 2994 { 0x0c, 0x01a19020 }, 2995 { 0x0d, 0x01014010 }, 2996 { 0x0e, 0x0181302e }, 2997 { 0x0f, 0x01014010 }, 2998 { 0x14, 0x01019020 }, 2999 { 0x18, 0x90a000f0 }, 3000 { 0x19, 0x90a000f0 }, 3001 { 0x1e, 0x01452050 }, 3002 { 0x1f, 0x01452050 }, 3003 {} 3004 }; 3005 3006 static const struct hda_pintbl dell_m4_1_pin_configs[] = { 3007 { 0x0a, 0x0421101f }, 3008 { 0x0b, 0x04a11221 }, 3009 { 0x0c, 0x40f000f0 }, 3010 { 0x0d, 0x90170110 }, 3011 { 0x0e, 0x23a1902e }, 3012 { 0x0f, 0x23014250 }, 3013 { 0x14, 0x40f000f0 }, 3014 { 0x18, 0x90a000f0 }, 3015 { 0x19, 0x40f000f0 }, 3016 { 0x1e, 0x4f0000f0 }, 3017 { 0x1f, 0x4f0000f0 }, 3018 {} 3019 }; 3020 3021 static const struct hda_pintbl dell_m4_2_pin_configs[] = { 3022 { 0x0a, 0x0421101f }, 3023 { 0x0b, 0x04a11221 }, 3024 { 0x0c, 0x90a70330 }, 3025 { 0x0d, 0x90170110 }, 3026 { 0x0e, 0x23a1902e }, 3027 { 0x0f, 0x23014250 }, 3028 { 0x14, 0x40f000f0 }, 3029 { 0x18, 0x40f000f0 }, 3030 { 0x19, 0x40f000f0 }, 3031 { 0x1e, 0x044413b0 }, 3032 { 0x1f, 0x044413b0 }, 3033 {} 3034 }; 3035 3036 static const struct hda_pintbl dell_m4_3_pin_configs[] = { 3037 { 0x0a, 0x0421101f }, 3038 { 0x0b, 0x04a11221 }, 3039 { 0x0c, 0x90a70330 }, 3040 { 0x0d, 0x90170110 }, 3041 { 0x0e, 0x40f000f0 }, 3042 { 0x0f, 0x40f000f0 }, 3043 { 0x14, 0x40f000f0 }, 3044 { 0x18, 0x90a000f0 }, 3045 { 0x19, 0x40f000f0 }, 3046 { 0x1e, 0x044413b0 }, 3047 { 0x1f, 0x044413b0 }, 3048 {} 3049 }; 3050 3051 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 3052 const struct hda_fixup *fix, int action) 3053 { 3054 struct sigmatel_spec *spec = codec->spec; 3055 3056 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3057 return; 3058 3059 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 3060 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 3061 } 3062 3063 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 3064 const struct hda_fixup *fix, int action) 3065 { 3066 struct sigmatel_spec *spec = codec->spec; 3067 struct hda_jack_callback *jack; 3068 3069 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3070 return; 3071 3072 /* Enable VREF power saving on GPIO1 detect */ 3073 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 3074 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 3075 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg, 3076 stac_vref_event); 3077 if (!IS_ERR(jack)) 3078 jack->private_data = 0x02; 3079 3080 spec->gpio_mask |= 0x02; 3081 3082 /* enable internal microphone */ 3083 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 3084 } 3085 3086 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 3087 const struct hda_fixup *fix, int action) 3088 { 3089 struct sigmatel_spec *spec = codec->spec; 3090 3091 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3092 return; 3093 spec->gpio_led = 0x01; 3094 } 3095 3096 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 3097 const struct hda_fixup *fix, int action) 3098 { 3099 unsigned int cap; 3100 3101 switch (action) { 3102 case HDA_FIXUP_ACT_PRE_PROBE: 3103 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 3104 break; 3105 3106 case HDA_FIXUP_ACT_PROBE: 3107 /* enable bass on HP dv7 */ 3108 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 3109 cap &= AC_GPIO_IO_COUNT; 3110 if (cap >= 6) 3111 stac_add_hp_bass_switch(codec); 3112 break; 3113 } 3114 } 3115 3116 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 3117 const struct hda_fixup *fix, int action) 3118 { 3119 struct sigmatel_spec *spec = codec->spec; 3120 3121 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3122 return; 3123 spec->gpio_led = 0x08; 3124 } 3125 3126 static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin) 3127 { 3128 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin); 3129 3130 /* count line-out, too, as BIOS sets often so */ 3131 return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE && 3132 (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 3133 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT); 3134 } 3135 3136 static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin) 3137 { 3138 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin); 3139 3140 /* It was changed in the BIOS to just satisfy MS DTM. 3141 * Lets turn it back into slaved HP 3142 */ 3143 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) | 3144 (AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT); 3145 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) | 3146 0x1f; 3147 snd_hda_codec_set_pincfg(codec, pin, pin_cfg); 3148 } 3149 3150 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 3151 const struct hda_fixup *fix, int action) 3152 { 3153 struct sigmatel_spec *spec = codec->spec; 3154 3155 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3156 return; 3157 3158 /* when both output A and F are assigned, these are supposedly 3159 * dock and built-in headphones; fix both pin configs 3160 */ 3161 if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) { 3162 fixup_hp_headphone(codec, 0x0a); 3163 fixup_hp_headphone(codec, 0x0f); 3164 } 3165 3166 if (find_mute_led_cfg(codec, 1)) 3167 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 3168 spec->gpio_led, 3169 spec->gpio_led_polarity); 3170 3171 } 3172 3173 static const struct hda_fixup stac92hd71bxx_fixups[] = { 3174 [STAC_92HD71BXX_REF] = { 3175 .type = HDA_FIXUP_FUNC, 3176 .v.func = stac92hd71bxx_fixup_ref, 3177 }, 3178 [STAC_DELL_M4_1] = { 3179 .type = HDA_FIXUP_PINS, 3180 .v.pins = dell_m4_1_pin_configs, 3181 }, 3182 [STAC_DELL_M4_2] = { 3183 .type = HDA_FIXUP_PINS, 3184 .v.pins = dell_m4_2_pin_configs, 3185 }, 3186 [STAC_DELL_M4_3] = { 3187 .type = HDA_FIXUP_PINS, 3188 .v.pins = dell_m4_3_pin_configs, 3189 }, 3190 [STAC_HP_M4] = { 3191 .type = HDA_FIXUP_FUNC, 3192 .v.func = stac92hd71bxx_fixup_hp_m4, 3193 .chained = true, 3194 .chain_id = STAC_92HD71BXX_HP, 3195 }, 3196 [STAC_HP_DV4] = { 3197 .type = HDA_FIXUP_FUNC, 3198 .v.func = stac92hd71bxx_fixup_hp_dv4, 3199 .chained = true, 3200 .chain_id = STAC_HP_DV5, 3201 }, 3202 [STAC_HP_DV5] = { 3203 .type = HDA_FIXUP_FUNC, 3204 .v.func = stac92hd71bxx_fixup_hp_dv5, 3205 .chained = true, 3206 .chain_id = STAC_92HD71BXX_HP, 3207 }, 3208 [STAC_HP_HDX] = { 3209 .type = HDA_FIXUP_FUNC, 3210 .v.func = stac92hd71bxx_fixup_hp_hdx, 3211 .chained = true, 3212 .chain_id = STAC_92HD71BXX_HP, 3213 }, 3214 [STAC_92HD71BXX_HP] = { 3215 .type = HDA_FIXUP_FUNC, 3216 .v.func = stac92hd71bxx_fixup_hp, 3217 }, 3218 }; 3219 3220 static const struct hda_model_fixup stac92hd71bxx_models[] = { 3221 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 3222 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 3223 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 3224 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 3225 { .id = STAC_HP_M4, .name = "hp-m4" }, 3226 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 3227 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 3228 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 3229 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 3230 {} 3231 }; 3232 3233 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 3234 /* SigmaTel reference board */ 3235 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3236 "DFI LanParty", STAC_92HD71BXX_REF), 3237 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3238 "DFI LanParty", STAC_92HD71BXX_REF), 3239 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 3240 "HP", STAC_HP_DV5), 3241 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 3242 "HP", STAC_HP_DV5), 3243 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 3244 "HP dv4-7", STAC_HP_DV4), 3245 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 3246 "HP dv4-7", STAC_HP_DV5), 3247 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 3248 "HP HDX", STAC_HP_HDX), /* HDX18 */ 3249 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 3250 "HP mini 1000", STAC_HP_M4), 3251 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 3252 "HP HDX", STAC_HP_HDX), /* HDX16 */ 3253 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 3254 "HP dv6", STAC_HP_DV5), 3255 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 3256 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 3257 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 3258 "HP DV6", STAC_HP_DV5), 3259 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 3260 "HP", STAC_HP_DV5), 3261 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 3262 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 3263 "unknown Dell", STAC_DELL_M4_1), 3264 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 3265 "unknown Dell", STAC_DELL_M4_1), 3266 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 3267 "unknown Dell", STAC_DELL_M4_1), 3268 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 3269 "unknown Dell", STAC_DELL_M4_1), 3270 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 3271 "unknown Dell", STAC_DELL_M4_1), 3272 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 3273 "unknown Dell", STAC_DELL_M4_1), 3274 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 3275 "unknown Dell", STAC_DELL_M4_1), 3276 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 3277 "unknown Dell", STAC_DELL_M4_2), 3278 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 3279 "unknown Dell", STAC_DELL_M4_2), 3280 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 3281 "unknown Dell", STAC_DELL_M4_2), 3282 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 3283 "unknown Dell", STAC_DELL_M4_2), 3284 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 3285 "unknown Dell", STAC_DELL_M4_3), 3286 {} /* terminator */ 3287 }; 3288 3289 static const struct hda_pintbl ref922x_pin_configs[] = { 3290 { 0x0a, 0x01014010 }, 3291 { 0x0b, 0x01016011 }, 3292 { 0x0c, 0x01012012 }, 3293 { 0x0d, 0x0221401f }, 3294 { 0x0e, 0x01813122 }, 3295 { 0x0f, 0x01011014 }, 3296 { 0x10, 0x01441030 }, 3297 { 0x11, 0x01c41030 }, 3298 { 0x15, 0x40000100 }, 3299 { 0x1b, 0x40000100 }, 3300 {} 3301 }; 3302 3303 /* 3304 STAC 922X pin configs for 3305 102801A7 3306 102801AB 3307 102801A9 3308 102801D1 3309 102801D2 3310 */ 3311 static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 3312 { 0x0a, 0x02214030 }, 3313 { 0x0b, 0x01a19021 }, 3314 { 0x0c, 0x01111012 }, 3315 { 0x0d, 0x01114010 }, 3316 { 0x0e, 0x02a19020 }, 3317 { 0x0f, 0x01117011 }, 3318 { 0x10, 0x400001f0 }, 3319 { 0x11, 0x400001f1 }, 3320 { 0x15, 0x01813122 }, 3321 { 0x1b, 0x400001f2 }, 3322 {} 3323 }; 3324 3325 /* 3326 STAC 922X pin configs for 3327 102801AC 3328 102801D0 3329 */ 3330 static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 3331 { 0x0a, 0x02214030 }, 3332 { 0x0b, 0x01a19021 }, 3333 { 0x0c, 0x01111012 }, 3334 { 0x0d, 0x01114010 }, 3335 { 0x0e, 0x02a19020 }, 3336 { 0x0f, 0x01117011 }, 3337 { 0x10, 0x01451140 }, 3338 { 0x11, 0x400001f0 }, 3339 { 0x15, 0x01813122 }, 3340 { 0x1b, 0x400001f1 }, 3341 {} 3342 }; 3343 3344 /* 3345 STAC 922X pin configs for 3346 102801BF 3347 */ 3348 static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 3349 { 0x0a, 0x0321101f }, 3350 { 0x0b, 0x01112024 }, 3351 { 0x0c, 0x01111222 }, 3352 { 0x0d, 0x91174220 }, 3353 { 0x0e, 0x03a11050 }, 3354 { 0x0f, 0x01116221 }, 3355 { 0x10, 0x90a70330 }, 3356 { 0x11, 0x01452340 }, 3357 { 0x15, 0x40C003f1 }, 3358 { 0x1b, 0x405003f0 }, 3359 {} 3360 }; 3361 3362 /* 3363 STAC 9221 A1 pin configs for 3364 102801D7 (Dell XPS M1210) 3365 */ 3366 static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 3367 { 0x0a, 0x02211211 }, 3368 { 0x0b, 0x408103ff }, 3369 { 0x0c, 0x02a1123e }, 3370 { 0x0d, 0x90100310 }, 3371 { 0x0e, 0x408003f1 }, 3372 { 0x0f, 0x0221121f }, 3373 { 0x10, 0x03451340 }, 3374 { 0x11, 0x40c003f2 }, 3375 { 0x15, 0x508003f3 }, 3376 { 0x1b, 0x405003f4 }, 3377 {} 3378 }; 3379 3380 static const struct hda_pintbl d945gtp3_pin_configs[] = { 3381 { 0x0a, 0x0221401f }, 3382 { 0x0b, 0x01a19022 }, 3383 { 0x0c, 0x01813021 }, 3384 { 0x0d, 0x01014010 }, 3385 { 0x0e, 0x40000100 }, 3386 { 0x0f, 0x40000100 }, 3387 { 0x10, 0x40000100 }, 3388 { 0x11, 0x40000100 }, 3389 { 0x15, 0x02a19120 }, 3390 { 0x1b, 0x40000100 }, 3391 {} 3392 }; 3393 3394 static const struct hda_pintbl d945gtp5_pin_configs[] = { 3395 { 0x0a, 0x0221401f }, 3396 { 0x0b, 0x01011012 }, 3397 { 0x0c, 0x01813024 }, 3398 { 0x0d, 0x01014010 }, 3399 { 0x0e, 0x01a19021 }, 3400 { 0x0f, 0x01016011 }, 3401 { 0x10, 0x01452130 }, 3402 { 0x11, 0x40000100 }, 3403 { 0x15, 0x02a19320 }, 3404 { 0x1b, 0x40000100 }, 3405 {} 3406 }; 3407 3408 static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 3409 { 0x0a, 0x0121e21f }, 3410 { 0x0b, 0x400000ff }, 3411 { 0x0c, 0x9017e110 }, 3412 { 0x0d, 0x400000fd }, 3413 { 0x0e, 0x400000fe }, 3414 { 0x0f, 0x0181e020 }, 3415 { 0x10, 0x1145e030 }, 3416 { 0x11, 0x11c5e240 }, 3417 { 0x15, 0x400000fc }, 3418 { 0x1b, 0x400000fb }, 3419 {} 3420 }; 3421 3422 static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 3423 { 0x0a, 0x0121e21f }, 3424 { 0x0b, 0x90a7012e }, 3425 { 0x0c, 0x9017e110 }, 3426 { 0x0d, 0x400000fd }, 3427 { 0x0e, 0x400000fe }, 3428 { 0x0f, 0x0181e020 }, 3429 { 0x10, 0x1145e230 }, 3430 { 0x11, 0x500000fa }, 3431 { 0x15, 0x400000fc }, 3432 { 0x1b, 0x400000fb }, 3433 {} 3434 }; 3435 3436 static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 3437 { 0x0a, 0x0121e21f }, 3438 { 0x0b, 0x90a7012e }, 3439 { 0x0c, 0x9017e110 }, 3440 { 0x0d, 0x400000fd }, 3441 { 0x0e, 0x400000fe }, 3442 { 0x0f, 0x0181e020 }, 3443 { 0x10, 0x1145e230 }, 3444 { 0x11, 0x11c5e240 }, 3445 { 0x15, 0x400000fc }, 3446 { 0x1b, 0x400000fb }, 3447 {} 3448 }; 3449 3450 static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 3451 { 0x0a, 0x0321e21f }, 3452 { 0x0b, 0x03a1e02e }, 3453 { 0x0c, 0x9017e110 }, 3454 { 0x0d, 0x9017e11f }, 3455 { 0x0e, 0x400000fe }, 3456 { 0x0f, 0x0381e020 }, 3457 { 0x10, 0x1345e230 }, 3458 { 0x11, 0x13c5e240 }, 3459 { 0x15, 0x400000fc }, 3460 { 0x1b, 0x400000fb }, 3461 {} 3462 }; 3463 3464 static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 3465 { 0x0a, 0x0321e21f }, 3466 { 0x0b, 0x03a1e02e }, 3467 { 0x0c, 0x9017e110 }, 3468 { 0x0d, 0x9017e11f }, 3469 { 0x0e, 0x400000fe }, 3470 { 0x0f, 0x0381e020 }, 3471 { 0x10, 0x1345e230 }, 3472 { 0x11, 0x13c5e240 }, 3473 { 0x15, 0x400000fc }, 3474 { 0x1b, 0x400000fb }, 3475 {} 3476 }; 3477 3478 static const struct hda_pintbl ecs202_pin_configs[] = { 3479 { 0x0a, 0x0221401f }, 3480 { 0x0b, 0x02a19020 }, 3481 { 0x0c, 0x01a19020 }, 3482 { 0x0d, 0x01114010 }, 3483 { 0x0e, 0x408000f0 }, 3484 { 0x0f, 0x01813022 }, 3485 { 0x10, 0x074510a0 }, 3486 { 0x11, 0x40c400f1 }, 3487 { 0x15, 0x9037012e }, 3488 { 0x1b, 0x40e000f2 }, 3489 {} 3490 }; 3491 3492 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 3493 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 3494 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 3495 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 3496 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 3497 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 3498 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 3499 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 3500 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 3501 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 3502 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 3503 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 3504 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 3505 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 3506 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 3507 {} 3508 }; 3509 3510 static const struct hda_fixup stac922x_fixups[]; 3511 3512 /* remap the fixup from codec SSID and apply it */ 3513 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 3514 const struct hda_fixup *fix, 3515 int action) 3516 { 3517 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3518 return; 3519 3520 codec->fixup_id = HDA_FIXUP_ID_NOT_SET; 3521 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 3522 stac922x_fixups); 3523 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET) 3524 snd_hda_apply_fixup(codec, action); 3525 } 3526 3527 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 3528 const struct hda_fixup *fix, 3529 int action) 3530 { 3531 struct sigmatel_spec *spec = codec->spec; 3532 3533 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3534 spec->gpio_mask = spec->gpio_dir = 0x03; 3535 spec->gpio_data = 0x03; 3536 } 3537 } 3538 3539 static const struct hda_fixup stac922x_fixups[] = { 3540 [STAC_D945_REF] = { 3541 .type = HDA_FIXUP_PINS, 3542 .v.pins = ref922x_pin_configs, 3543 }, 3544 [STAC_D945GTP3] = { 3545 .type = HDA_FIXUP_PINS, 3546 .v.pins = d945gtp3_pin_configs, 3547 }, 3548 [STAC_D945GTP5] = { 3549 .type = HDA_FIXUP_PINS, 3550 .v.pins = d945gtp5_pin_configs, 3551 }, 3552 [STAC_INTEL_MAC_AUTO] = { 3553 .type = HDA_FIXUP_FUNC, 3554 .v.func = stac922x_fixup_intel_mac_auto, 3555 }, 3556 [STAC_INTEL_MAC_V1] = { 3557 .type = HDA_FIXUP_PINS, 3558 .v.pins = intel_mac_v1_pin_configs, 3559 .chained = true, 3560 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3561 }, 3562 [STAC_INTEL_MAC_V2] = { 3563 .type = HDA_FIXUP_PINS, 3564 .v.pins = intel_mac_v2_pin_configs, 3565 .chained = true, 3566 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3567 }, 3568 [STAC_INTEL_MAC_V3] = { 3569 .type = HDA_FIXUP_PINS, 3570 .v.pins = intel_mac_v3_pin_configs, 3571 .chained = true, 3572 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3573 }, 3574 [STAC_INTEL_MAC_V4] = { 3575 .type = HDA_FIXUP_PINS, 3576 .v.pins = intel_mac_v4_pin_configs, 3577 .chained = true, 3578 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3579 }, 3580 [STAC_INTEL_MAC_V5] = { 3581 .type = HDA_FIXUP_PINS, 3582 .v.pins = intel_mac_v5_pin_configs, 3583 .chained = true, 3584 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3585 }, 3586 [STAC_922X_INTEL_MAC_GPIO] = { 3587 .type = HDA_FIXUP_FUNC, 3588 .v.func = stac922x_fixup_intel_mac_gpio, 3589 }, 3590 [STAC_ECS_202] = { 3591 .type = HDA_FIXUP_PINS, 3592 .v.pins = ecs202_pin_configs, 3593 }, 3594 [STAC_922X_DELL_D81] = { 3595 .type = HDA_FIXUP_PINS, 3596 .v.pins = dell_922x_d81_pin_configs, 3597 }, 3598 [STAC_922X_DELL_D82] = { 3599 .type = HDA_FIXUP_PINS, 3600 .v.pins = dell_922x_d82_pin_configs, 3601 }, 3602 [STAC_922X_DELL_M81] = { 3603 .type = HDA_FIXUP_PINS, 3604 .v.pins = dell_922x_m81_pin_configs, 3605 }, 3606 [STAC_922X_DELL_M82] = { 3607 .type = HDA_FIXUP_PINS, 3608 .v.pins = dell_922x_m82_pin_configs, 3609 }, 3610 }; 3611 3612 static const struct hda_model_fixup stac922x_models[] = { 3613 { .id = STAC_D945_REF, .name = "ref" }, 3614 { .id = STAC_D945GTP5, .name = "5stack" }, 3615 { .id = STAC_D945GTP3, .name = "3stack" }, 3616 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 3617 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 3618 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 3619 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 3620 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 3621 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 3622 { .id = STAC_ECS_202, .name = "ecs202" }, 3623 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 3624 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 3625 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 3626 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 3627 /* for backward compatibility */ 3628 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 3629 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 3630 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 3631 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 3632 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 3633 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 3634 {} 3635 }; 3636 3637 static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 3638 /* SigmaTel reference board */ 3639 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3640 "DFI LanParty", STAC_D945_REF), 3641 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3642 "DFI LanParty", STAC_D945_REF), 3643 /* Intel 945G based systems */ 3644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 3645 "Intel D945G", STAC_D945GTP3), 3646 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 3647 "Intel D945G", STAC_D945GTP3), 3648 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 3649 "Intel D945G", STAC_D945GTP3), 3650 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 3651 "Intel D945G", STAC_D945GTP3), 3652 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 3653 "Intel D945G", STAC_D945GTP3), 3654 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 3655 "Intel D945G", STAC_D945GTP3), 3656 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 3657 "Intel D945G", STAC_D945GTP3), 3658 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 3659 "Intel D945G", STAC_D945GTP3), 3660 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 3661 "Intel D945G", STAC_D945GTP3), 3662 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 3663 "Intel D945G", STAC_D945GTP3), 3664 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 3665 "Intel D945G", STAC_D945GTP3), 3666 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 3667 "Intel D945G", STAC_D945GTP3), 3668 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 3669 "Intel D945G", STAC_D945GTP3), 3670 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 3671 "Intel D945G", STAC_D945GTP3), 3672 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3673 "Intel D945G", STAC_D945GTP3), 3674 /* Intel D945G 5-stack systems */ 3675 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3676 "Intel D945G", STAC_D945GTP5), 3677 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3678 "Intel D945G", STAC_D945GTP5), 3679 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3680 "Intel D945G", STAC_D945GTP5), 3681 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3682 "Intel D945G", STAC_D945GTP5), 3683 /* Intel 945P based systems */ 3684 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3685 "Intel D945P", STAC_D945GTP3), 3686 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3687 "Intel D945P", STAC_D945GTP3), 3688 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3689 "Intel D945P", STAC_D945GTP3), 3690 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3691 "Intel D945P", STAC_D945GTP3), 3692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3693 "Intel D945P", STAC_D945GTP3), 3694 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3695 "Intel D945P", STAC_D945GTP5), 3696 /* other intel */ 3697 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3698 "Intel D945", STAC_D945_REF), 3699 /* other systems */ 3700 3701 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3702 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3703 3704 /* Dell systems */ 3705 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3706 "unknown Dell", STAC_922X_DELL_D81), 3707 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3708 "unknown Dell", STAC_922X_DELL_D81), 3709 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3710 "unknown Dell", STAC_922X_DELL_D81), 3711 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3712 "unknown Dell", STAC_922X_DELL_D82), 3713 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3714 "unknown Dell", STAC_922X_DELL_M81), 3715 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3716 "unknown Dell", STAC_922X_DELL_D82), 3717 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3718 "unknown Dell", STAC_922X_DELL_D81), 3719 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3720 "unknown Dell", STAC_922X_DELL_D81), 3721 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3722 "Dell XPS M1210", STAC_922X_DELL_M82), 3723 /* ECS/PC Chips boards */ 3724 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3725 "ECS/PC chips", STAC_ECS_202), 3726 {} /* terminator */ 3727 }; 3728 3729 static const struct hda_pintbl ref927x_pin_configs[] = { 3730 { 0x0a, 0x02214020 }, 3731 { 0x0b, 0x02a19080 }, 3732 { 0x0c, 0x0181304e }, 3733 { 0x0d, 0x01014010 }, 3734 { 0x0e, 0x01a19040 }, 3735 { 0x0f, 0x01011012 }, 3736 { 0x10, 0x01016011 }, 3737 { 0x11, 0x0101201f }, 3738 { 0x12, 0x183301f0 }, 3739 { 0x13, 0x18a001f0 }, 3740 { 0x14, 0x18a001f0 }, 3741 { 0x21, 0x01442070 }, 3742 { 0x22, 0x01c42190 }, 3743 { 0x23, 0x40000100 }, 3744 {} 3745 }; 3746 3747 static const struct hda_pintbl d965_3st_pin_configs[] = { 3748 { 0x0a, 0x0221401f }, 3749 { 0x0b, 0x02a19120 }, 3750 { 0x0c, 0x40000100 }, 3751 { 0x0d, 0x01014011 }, 3752 { 0x0e, 0x01a19021 }, 3753 { 0x0f, 0x01813024 }, 3754 { 0x10, 0x40000100 }, 3755 { 0x11, 0x40000100 }, 3756 { 0x12, 0x40000100 }, 3757 { 0x13, 0x40000100 }, 3758 { 0x14, 0x40000100 }, 3759 { 0x21, 0x40000100 }, 3760 { 0x22, 0x40000100 }, 3761 { 0x23, 0x40000100 }, 3762 {} 3763 }; 3764 3765 static const struct hda_pintbl d965_5st_pin_configs[] = { 3766 { 0x0a, 0x02214020 }, 3767 { 0x0b, 0x02a19080 }, 3768 { 0x0c, 0x0181304e }, 3769 { 0x0d, 0x01014010 }, 3770 { 0x0e, 0x01a19040 }, 3771 { 0x0f, 0x01011012 }, 3772 { 0x10, 0x01016011 }, 3773 { 0x11, 0x40000100 }, 3774 { 0x12, 0x40000100 }, 3775 { 0x13, 0x40000100 }, 3776 { 0x14, 0x40000100 }, 3777 { 0x21, 0x01442070 }, 3778 { 0x22, 0x40000100 }, 3779 { 0x23, 0x40000100 }, 3780 {} 3781 }; 3782 3783 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3784 { 0x0a, 0x40000100 }, 3785 { 0x0b, 0x40000100 }, 3786 { 0x0c, 0x0181304e }, 3787 { 0x0d, 0x01014010 }, 3788 { 0x0e, 0x01a19040 }, 3789 { 0x0f, 0x01011012 }, 3790 { 0x10, 0x01016011 }, 3791 { 0x11, 0x40000100 }, 3792 { 0x12, 0x40000100 }, 3793 { 0x13, 0x40000100 }, 3794 { 0x14, 0x40000100 }, 3795 { 0x21, 0x01442070 }, 3796 { 0x22, 0x40000100 }, 3797 { 0x23, 0x40000100 }, 3798 {} 3799 }; 3800 3801 static const struct hda_pintbl dell_3st_pin_configs[] = { 3802 { 0x0a, 0x02211230 }, 3803 { 0x0b, 0x02a11220 }, 3804 { 0x0c, 0x01a19040 }, 3805 { 0x0d, 0x01114210 }, 3806 { 0x0e, 0x01111212 }, 3807 { 0x0f, 0x01116211 }, 3808 { 0x10, 0x01813050 }, 3809 { 0x11, 0x01112214 }, 3810 { 0x12, 0x403003fa }, 3811 { 0x13, 0x90a60040 }, 3812 { 0x14, 0x90a60040 }, 3813 { 0x21, 0x404003fb }, 3814 { 0x22, 0x40c003fc }, 3815 { 0x23, 0x40000100 }, 3816 {} 3817 }; 3818 3819 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3820 const struct hda_fixup *fix, int action) 3821 { 3822 /* no jack detecion for ref-no-jd model */ 3823 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3824 codec->no_jack_detect = 1; 3825 } 3826 3827 static void stac927x_fixup_ref(struct hda_codec *codec, 3828 const struct hda_fixup *fix, int action) 3829 { 3830 struct sigmatel_spec *spec = codec->spec; 3831 3832 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3833 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3834 spec->eapd_mask = spec->gpio_mask = 0; 3835 spec->gpio_dir = spec->gpio_data = 0; 3836 } 3837 } 3838 3839 static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3840 const struct hda_fixup *fix, int action) 3841 { 3842 struct sigmatel_spec *spec = codec->spec; 3843 3844 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3845 return; 3846 3847 if (codec->core.subsystem_id != 0x1028022f) { 3848 /* GPIO2 High = Enable EAPD */ 3849 spec->eapd_mask = spec->gpio_mask = 0x04; 3850 spec->gpio_dir = spec->gpio_data = 0x04; 3851 } 3852 3853 snd_hda_add_verbs(codec, dell_3st_core_init); 3854 spec->volknob_init = 1; 3855 } 3856 3857 static void stac927x_fixup_volknob(struct hda_codec *codec, 3858 const struct hda_fixup *fix, int action) 3859 { 3860 struct sigmatel_spec *spec = codec->spec; 3861 3862 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3863 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3864 spec->volknob_init = 1; 3865 } 3866 } 3867 3868 static const struct hda_fixup stac927x_fixups[] = { 3869 [STAC_D965_REF_NO_JD] = { 3870 .type = HDA_FIXUP_FUNC, 3871 .v.func = stac927x_fixup_ref_no_jd, 3872 .chained = true, 3873 .chain_id = STAC_D965_REF, 3874 }, 3875 [STAC_D965_REF] = { 3876 .type = HDA_FIXUP_FUNC, 3877 .v.func = stac927x_fixup_ref, 3878 }, 3879 [STAC_D965_3ST] = { 3880 .type = HDA_FIXUP_PINS, 3881 .v.pins = d965_3st_pin_configs, 3882 .chained = true, 3883 .chain_id = STAC_D965_VERBS, 3884 }, 3885 [STAC_D965_5ST] = { 3886 .type = HDA_FIXUP_PINS, 3887 .v.pins = d965_5st_pin_configs, 3888 .chained = true, 3889 .chain_id = STAC_D965_VERBS, 3890 }, 3891 [STAC_D965_VERBS] = { 3892 .type = HDA_FIXUP_VERBS, 3893 .v.verbs = d965_core_init, 3894 }, 3895 [STAC_D965_5ST_NO_FP] = { 3896 .type = HDA_FIXUP_PINS, 3897 .v.pins = d965_5st_no_fp_pin_configs, 3898 }, 3899 [STAC_NEMO_DEFAULT] = { 3900 .type = HDA_FIXUP_PINS, 3901 .v.pins = nemo_pin_configs, 3902 }, 3903 [STAC_DELL_3ST] = { 3904 .type = HDA_FIXUP_PINS, 3905 .v.pins = dell_3st_pin_configs, 3906 .chained = true, 3907 .chain_id = STAC_927X_DELL_DMIC, 3908 }, 3909 [STAC_DELL_BIOS] = { 3910 .type = HDA_FIXUP_PINS, 3911 .v.pins = (const struct hda_pintbl[]) { 3912 /* correct the front output jack as a hp out */ 3913 { 0x0f, 0x0221101f }, 3914 /* correct the front input jack as a mic */ 3915 { 0x0e, 0x02a79130 }, 3916 {} 3917 }, 3918 .chained = true, 3919 .chain_id = STAC_927X_DELL_DMIC, 3920 }, 3921 [STAC_DELL_BIOS_AMIC] = { 3922 .type = HDA_FIXUP_PINS, 3923 .v.pins = (const struct hda_pintbl[]) { 3924 /* configure the analog microphone on some laptops */ 3925 { 0x0c, 0x90a79130 }, 3926 {} 3927 }, 3928 .chained = true, 3929 .chain_id = STAC_DELL_BIOS, 3930 }, 3931 [STAC_DELL_BIOS_SPDIF] = { 3932 .type = HDA_FIXUP_PINS, 3933 .v.pins = (const struct hda_pintbl[]) { 3934 /* correct the device field to SPDIF out */ 3935 { 0x21, 0x01442070 }, 3936 {} 3937 }, 3938 .chained = true, 3939 .chain_id = STAC_DELL_BIOS, 3940 }, 3941 [STAC_927X_DELL_DMIC] = { 3942 .type = HDA_FIXUP_FUNC, 3943 .v.func = stac927x_fixup_dell_dmic, 3944 }, 3945 [STAC_927X_VOLKNOB] = { 3946 .type = HDA_FIXUP_FUNC, 3947 .v.func = stac927x_fixup_volknob, 3948 }, 3949 }; 3950 3951 static const struct hda_model_fixup stac927x_models[] = { 3952 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3953 { .id = STAC_D965_REF, .name = "ref" }, 3954 { .id = STAC_D965_3ST, .name = "3stack" }, 3955 { .id = STAC_D965_5ST, .name = "5stack" }, 3956 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3957 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3958 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3959 { .id = STAC_NEMO_DEFAULT, .name = "nemo-default" }, 3960 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3961 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3962 {} 3963 }; 3964 3965 static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3966 /* SigmaTel reference board */ 3967 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3968 "DFI LanParty", STAC_D965_REF), 3969 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3970 "DFI LanParty", STAC_D965_REF), 3971 /* Intel 946 based systems */ 3972 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3973 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3974 /* 965 based 3 stack systems */ 3975 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3976 "Intel D965", STAC_D965_3ST), 3977 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3978 "Intel D965", STAC_D965_3ST), 3979 /* Dell 3 stack systems */ 3980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3982 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3983 /* Dell 3 stack systems with verb table in BIOS */ 3984 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3986 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3989 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3991 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 3992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 3993 /* 965 based 5 stack systems */ 3994 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 3995 "Intel D965", STAC_D965_5ST), 3996 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 3997 "Intel D965", STAC_D965_5ST), 3998 /* Nemo */ 3999 SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT), 4000 /* volume-knob fixes */ 4001 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 4002 {} /* terminator */ 4003 }; 4004 4005 static const struct hda_pintbl ref9205_pin_configs[] = { 4006 { 0x0a, 0x40000100 }, 4007 { 0x0b, 0x40000100 }, 4008 { 0x0c, 0x01016011 }, 4009 { 0x0d, 0x01014010 }, 4010 { 0x0e, 0x01813122 }, 4011 { 0x0f, 0x01a19021 }, 4012 { 0x14, 0x01019020 }, 4013 { 0x16, 0x40000100 }, 4014 { 0x17, 0x90a000f0 }, 4015 { 0x18, 0x90a000f0 }, 4016 { 0x21, 0x01441030 }, 4017 { 0x22, 0x01c41030 }, 4018 {} 4019 }; 4020 4021 /* 4022 STAC 9205 pin configs for 4023 102801F1 4024 102801F2 4025 102801FC 4026 102801FD 4027 10280204 4028 1028021F 4029 10280228 (Dell Vostro 1500) 4030 10280229 (Dell Vostro 1700) 4031 */ 4032 static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 4033 { 0x0a, 0x0321101F }, 4034 { 0x0b, 0x03A11020 }, 4035 { 0x0c, 0x400003FA }, 4036 { 0x0d, 0x90170310 }, 4037 { 0x0e, 0x400003FB }, 4038 { 0x0f, 0x400003FC }, 4039 { 0x14, 0x400003FD }, 4040 { 0x16, 0x40F000F9 }, 4041 { 0x17, 0x90A60330 }, 4042 { 0x18, 0x400003FF }, 4043 { 0x21, 0x0144131F }, 4044 { 0x22, 0x40C003FE }, 4045 {} 4046 }; 4047 4048 /* 4049 STAC 9205 pin configs for 4050 102801F9 4051 102801FA 4052 102801FE 4053 102801FF (Dell Precision M4300) 4054 10280206 4055 10280200 4056 10280201 4057 */ 4058 static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 4059 { 0x0a, 0x0321101f }, 4060 { 0x0b, 0x03a11020 }, 4061 { 0x0c, 0x90a70330 }, 4062 { 0x0d, 0x90170310 }, 4063 { 0x0e, 0x400000fe }, 4064 { 0x0f, 0x400000ff }, 4065 { 0x14, 0x400000fd }, 4066 { 0x16, 0x40f000f9 }, 4067 { 0x17, 0x400000fa }, 4068 { 0x18, 0x400000fc }, 4069 { 0x21, 0x0144131f }, 4070 { 0x22, 0x40c003f8 }, 4071 /* Enable SPDIF in/out */ 4072 { 0x1f, 0x01441030 }, 4073 { 0x20, 0x1c410030 }, 4074 {} 4075 }; 4076 4077 static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 4078 { 0x0a, 0x0421101f }, 4079 { 0x0b, 0x04a11020 }, 4080 { 0x0c, 0x400003fa }, 4081 { 0x0d, 0x90170310 }, 4082 { 0x0e, 0x400003fb }, 4083 { 0x0f, 0x400003fc }, 4084 { 0x14, 0x400003fd }, 4085 { 0x16, 0x400003f9 }, 4086 { 0x17, 0x90a60330 }, 4087 { 0x18, 0x400003ff }, 4088 { 0x21, 0x01441340 }, 4089 { 0x22, 0x40c003fe }, 4090 {} 4091 }; 4092 4093 static void stac9205_fixup_ref(struct hda_codec *codec, 4094 const struct hda_fixup *fix, int action) 4095 { 4096 struct sigmatel_spec *spec = codec->spec; 4097 4098 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4099 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 4100 /* SPDIF-In enabled */ 4101 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 4102 } 4103 } 4104 4105 static void stac9205_fixup_dell_m43(struct hda_codec *codec, 4106 const struct hda_fixup *fix, int action) 4107 { 4108 struct sigmatel_spec *spec = codec->spec; 4109 struct hda_jack_callback *jack; 4110 4111 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4112 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 4113 4114 /* Enable unsol response for GPIO4/Dock HP connection */ 4115 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 4116 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 4117 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg, 4118 stac_vref_event); 4119 if (!IS_ERR(jack)) 4120 jack->private_data = 0x01; 4121 4122 spec->gpio_dir = 0x0b; 4123 spec->eapd_mask = 0x01; 4124 spec->gpio_mask = 0x1b; 4125 spec->gpio_mute = 0x10; 4126 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 4127 * GPIO3 Low = DRM 4128 */ 4129 spec->gpio_data = 0x01; 4130 } 4131 } 4132 4133 static void stac9205_fixup_eapd(struct hda_codec *codec, 4134 const struct hda_fixup *fix, int action) 4135 { 4136 struct sigmatel_spec *spec = codec->spec; 4137 4138 if (action == HDA_FIXUP_ACT_PRE_PROBE) 4139 spec->eapd_switch = 0; 4140 } 4141 4142 static const struct hda_fixup stac9205_fixups[] = { 4143 [STAC_9205_REF] = { 4144 .type = HDA_FIXUP_FUNC, 4145 .v.func = stac9205_fixup_ref, 4146 }, 4147 [STAC_9205_DELL_M42] = { 4148 .type = HDA_FIXUP_PINS, 4149 .v.pins = dell_9205_m42_pin_configs, 4150 }, 4151 [STAC_9205_DELL_M43] = { 4152 .type = HDA_FIXUP_FUNC, 4153 .v.func = stac9205_fixup_dell_m43, 4154 }, 4155 [STAC_9205_DELL_M44] = { 4156 .type = HDA_FIXUP_PINS, 4157 .v.pins = dell_9205_m44_pin_configs, 4158 }, 4159 [STAC_9205_EAPD] = { 4160 .type = HDA_FIXUP_FUNC, 4161 .v.func = stac9205_fixup_eapd, 4162 }, 4163 {} 4164 }; 4165 4166 static const struct hda_model_fixup stac9205_models[] = { 4167 { .id = STAC_9205_REF, .name = "ref" }, 4168 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 4169 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 4170 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 4171 { .id = STAC_9205_EAPD, .name = "eapd" }, 4172 {} 4173 }; 4174 4175 static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 4176 /* SigmaTel reference board */ 4177 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 4178 "DFI LanParty", STAC_9205_REF), 4179 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 4180 "SigmaTel", STAC_9205_REF), 4181 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 4182 "DFI LanParty", STAC_9205_REF), 4183 /* Dell */ 4184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 4185 "unknown Dell", STAC_9205_DELL_M42), 4186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 4187 "unknown Dell", STAC_9205_DELL_M42), 4188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 4189 "Dell Precision", STAC_9205_DELL_M43), 4190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 4191 "Dell Precision", STAC_9205_DELL_M43), 4192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 4193 "Dell Precision", STAC_9205_DELL_M43), 4194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 4195 "unknown Dell", STAC_9205_DELL_M42), 4196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 4197 "unknown Dell", STAC_9205_DELL_M42), 4198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 4199 "Dell Precision", STAC_9205_DELL_M43), 4200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 4201 "Dell Precision M4300", STAC_9205_DELL_M43), 4202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 4203 "unknown Dell", STAC_9205_DELL_M42), 4204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 4205 "Dell Precision", STAC_9205_DELL_M43), 4206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 4207 "Dell Precision", STAC_9205_DELL_M43), 4208 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 4209 "Dell Precision", STAC_9205_DELL_M43), 4210 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 4211 "Dell Inspiron", STAC_9205_DELL_M44), 4212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 4213 "Dell Vostro 1500", STAC_9205_DELL_M42), 4214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 4215 "Dell Vostro 1700", STAC_9205_DELL_M42), 4216 /* Gateway */ 4217 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 4218 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 4219 {} /* terminator */ 4220 }; 4221 4222 static void stac92hd95_fixup_hp_led(struct hda_codec *codec, 4223 const struct hda_fixup *fix, int action) 4224 { 4225 struct sigmatel_spec *spec = codec->spec; 4226 4227 if (action != HDA_FIXUP_ACT_PRE_PROBE) 4228 return; 4229 4230 if (find_mute_led_cfg(codec, spec->default_polarity)) 4231 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 4232 spec->gpio_led, 4233 spec->gpio_led_polarity); 4234 } 4235 4236 static const struct hda_fixup stac92hd95_fixups[] = { 4237 [STAC_92HD95_HP_LED] = { 4238 .type = HDA_FIXUP_FUNC, 4239 .v.func = stac92hd95_fixup_hp_led, 4240 }, 4241 [STAC_92HD95_HP_BASS] = { 4242 .type = HDA_FIXUP_VERBS, 4243 .v.verbs = (const struct hda_verb[]) { 4244 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */ 4245 {} 4246 }, 4247 .chained = true, 4248 .chain_id = STAC_92HD95_HP_LED, 4249 }, 4250 }; 4251 4252 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { 4253 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), 4254 {} /* terminator */ 4255 }; 4256 4257 static const struct hda_model_fixup stac92hd95_models[] = { 4258 { .id = STAC_92HD95_HP_LED, .name = "hp-led" }, 4259 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" }, 4260 {} 4261 }; 4262 4263 4264 static int stac_parse_auto_config(struct hda_codec *codec) 4265 { 4266 struct sigmatel_spec *spec = codec->spec; 4267 int err; 4268 int flags = 0; 4269 4270 if (spec->headset_jack) 4271 flags |= HDA_PINCFG_HEADSET_MIC; 4272 4273 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 4274 if (err < 0) 4275 return err; 4276 4277 /* add hooks */ 4278 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 4279 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 4280 4281 spec->gen.automute_hook = stac_update_outputs; 4282 4283 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 4284 if (err < 0) 4285 return err; 4286 4287 if (spec->vref_mute_led_nid) { 4288 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid); 4289 if (err < 0) 4290 return err; 4291 } 4292 4293 /* setup analog beep controls */ 4294 if (spec->anabeep_nid > 0) { 4295 err = stac_auto_create_beep_ctls(codec, 4296 spec->anabeep_nid); 4297 if (err < 0) 4298 return err; 4299 } 4300 4301 /* setup digital beep controls and input device */ 4302 #ifdef CONFIG_SND_HDA_INPUT_BEEP 4303 if (spec->gen.beep_nid) { 4304 hda_nid_t nid = spec->gen.beep_nid; 4305 unsigned int caps; 4306 4307 err = stac_auto_create_beep_ctls(codec, nid); 4308 if (err < 0) 4309 return err; 4310 if (codec->beep) { 4311 /* IDT/STAC codecs have linear beep tone parameter */ 4312 codec->beep->linear_tone = spec->linear_tone_beep; 4313 /* if no beep switch is available, make its own one */ 4314 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 4315 if (!(caps & AC_AMPCAP_MUTE)) { 4316 err = stac_beep_switch_ctl(codec); 4317 if (err < 0) 4318 return err; 4319 } 4320 } 4321 } 4322 #endif 4323 4324 if (spec->gpio_led) 4325 spec->gen.vmaster_mute.hook = stac_vmaster_hook; 4326 4327 if (spec->aloopback_ctl && 4328 snd_hda_get_bool_hint(codec, "loopback") == 1) { 4329 unsigned int wr_verb = 4330 spec->aloopback_ctl->private_value >> 16; 4331 if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb)) 4332 return -ENOMEM; 4333 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 4334 return -ENOMEM; 4335 } 4336 4337 if (spec->have_spdif_mux) { 4338 err = stac_create_spdif_mux_ctls(codec); 4339 if (err < 0) 4340 return err; 4341 } 4342 4343 stac_init_power_map(codec); 4344 4345 return 0; 4346 } 4347 4348 static int stac_init(struct hda_codec *codec) 4349 { 4350 struct sigmatel_spec *spec = codec->spec; 4351 int i; 4352 4353 /* override some hints */ 4354 stac_store_hints(codec); 4355 4356 /* set up GPIO */ 4357 /* turn on EAPD statically when spec->eapd_switch isn't set. 4358 * otherwise, unsol event will turn it on/off dynamically 4359 */ 4360 if (!spec->eapd_switch) 4361 spec->gpio_data |= spec->eapd_mask; 4362 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 4363 4364 snd_hda_gen_init(codec); 4365 4366 /* sync the power-map */ 4367 if (spec->num_pwrs) 4368 snd_hda_codec_write(codec, codec->core.afg, 0, 4369 AC_VERB_IDT_SET_POWER_MAP, 4370 spec->power_map_bits); 4371 4372 /* power down inactive ADCs */ 4373 if (spec->powerdown_adcs) { 4374 for (i = 0; i < spec->gen.num_all_adcs; i++) { 4375 if (spec->active_adcs & (1 << i)) 4376 continue; 4377 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 4378 AC_VERB_SET_POWER_STATE, 4379 AC_PWRST_D3); 4380 } 4381 } 4382 4383 return 0; 4384 } 4385 4386 static void stac_shutup(struct hda_codec *codec) 4387 { 4388 struct sigmatel_spec *spec = codec->spec; 4389 4390 snd_hda_shutup_pins(codec); 4391 4392 if (spec->eapd_mask) 4393 stac_gpio_set(codec, spec->gpio_mask, 4394 spec->gpio_dir, spec->gpio_data & 4395 ~spec->eapd_mask); 4396 } 4397 4398 #define stac_free snd_hda_gen_free 4399 4400 #ifdef CONFIG_SND_PROC_FS 4401 static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 4402 struct hda_codec *codec, hda_nid_t nid) 4403 { 4404 if (nid == codec->core.afg) 4405 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 4406 snd_hda_codec_read(codec, nid, 0, 4407 AC_VERB_IDT_GET_POWER_MAP, 0)); 4408 } 4409 4410 static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 4411 struct hda_codec *codec, 4412 unsigned int verb) 4413 { 4414 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 4415 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0)); 4416 } 4417 4418 /* stac92hd71bxx, stac92hd73xx */ 4419 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 4420 struct hda_codec *codec, hda_nid_t nid) 4421 { 4422 stac92hd_proc_hook(buffer, codec, nid); 4423 if (nid == codec->core.afg) 4424 analog_loop_proc_hook(buffer, codec, 0xfa0); 4425 } 4426 4427 static void stac9205_proc_hook(struct snd_info_buffer *buffer, 4428 struct hda_codec *codec, hda_nid_t nid) 4429 { 4430 if (nid == codec->core.afg) 4431 analog_loop_proc_hook(buffer, codec, 0xfe0); 4432 } 4433 4434 static void stac927x_proc_hook(struct snd_info_buffer *buffer, 4435 struct hda_codec *codec, hda_nid_t nid) 4436 { 4437 if (nid == codec->core.afg) 4438 analog_loop_proc_hook(buffer, codec, 0xfeb); 4439 } 4440 #else 4441 #define stac92hd_proc_hook NULL 4442 #define stac92hd7x_proc_hook NULL 4443 #define stac9205_proc_hook NULL 4444 #define stac927x_proc_hook NULL 4445 #endif 4446 4447 #ifdef CONFIG_PM 4448 static int stac_suspend(struct hda_codec *codec) 4449 { 4450 stac_shutup(codec); 4451 return 0; 4452 } 4453 #else 4454 #define stac_suspend NULL 4455 #endif /* CONFIG_PM */ 4456 4457 static const struct hda_codec_ops stac_patch_ops = { 4458 .build_controls = snd_hda_gen_build_controls, 4459 .build_pcms = snd_hda_gen_build_pcms, 4460 .init = stac_init, 4461 .free = stac_free, 4462 .unsol_event = snd_hda_jack_unsol_event, 4463 #ifdef CONFIG_PM 4464 .suspend = stac_suspend, 4465 #endif 4466 .reboot_notify = stac_shutup, 4467 }; 4468 4469 static int alloc_stac_spec(struct hda_codec *codec) 4470 { 4471 struct sigmatel_spec *spec; 4472 4473 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 4474 if (!spec) 4475 return -ENOMEM; 4476 snd_hda_gen_spec_init(&spec->gen); 4477 codec->spec = spec; 4478 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 4479 spec->gen.dac_min_mute = true; 4480 codec->patch_ops = stac_patch_ops; 4481 return 0; 4482 } 4483 4484 static int patch_stac9200(struct hda_codec *codec) 4485 { 4486 struct sigmatel_spec *spec; 4487 int err; 4488 4489 err = alloc_stac_spec(codec); 4490 if (err < 0) 4491 return err; 4492 4493 spec = codec->spec; 4494 spec->linear_tone_beep = 1; 4495 spec->gen.own_eapd_ctl = 1; 4496 4497 codec->power_filter = snd_hda_codec_eapd_power_filter; 4498 4499 snd_hda_add_verbs(codec, stac9200_eapd_init); 4500 4501 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 4502 stac9200_fixups); 4503 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4504 4505 err = stac_parse_auto_config(codec); 4506 if (err < 0) { 4507 stac_free(codec); 4508 return err; 4509 } 4510 4511 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4512 4513 return 0; 4514 } 4515 4516 static int patch_stac925x(struct hda_codec *codec) 4517 { 4518 struct sigmatel_spec *spec; 4519 int err; 4520 4521 err = alloc_stac_spec(codec); 4522 if (err < 0) 4523 return err; 4524 4525 spec = codec->spec; 4526 spec->linear_tone_beep = 1; 4527 spec->gen.own_eapd_ctl = 1; 4528 4529 snd_hda_add_verbs(codec, stac925x_core_init); 4530 4531 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 4532 stac925x_fixups); 4533 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4534 4535 err = stac_parse_auto_config(codec); 4536 if (err < 0) { 4537 stac_free(codec); 4538 return err; 4539 } 4540 4541 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4542 4543 return 0; 4544 } 4545 4546 static int patch_stac92hd73xx(struct hda_codec *codec) 4547 { 4548 struct sigmatel_spec *spec; 4549 int err; 4550 int num_dacs; 4551 4552 err = alloc_stac_spec(codec); 4553 if (err < 0) 4554 return err; 4555 4556 spec = codec->spec; 4557 /* enable power_save_node only for new 92HD89xx chips, as it causes 4558 * click noises on old 92HD73xx chips. 4559 */ 4560 if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670) 4561 codec->power_save_node = 1; 4562 spec->linear_tone_beep = 0; 4563 spec->gen.mixer_nid = 0x1d; 4564 spec->have_spdif_mux = 1; 4565 4566 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 4567 if (num_dacs < 3 || num_dacs > 5) { 4568 codec_warn(codec, 4569 "Could not determine number of channels defaulting to DAC count\n"); 4570 num_dacs = 5; 4571 } 4572 4573 switch (num_dacs) { 4574 case 0x3: /* 6 Channel */ 4575 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 4576 break; 4577 case 0x4: /* 8 Channel */ 4578 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 4579 break; 4580 case 0x5: /* 10 Channel */ 4581 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 4582 break; 4583 } 4584 4585 spec->aloopback_mask = 0x01; 4586 spec->aloopback_shift = 8; 4587 4588 spec->gen.beep_nid = 0x1c; /* digital beep */ 4589 4590 /* GPIO0 High = Enable EAPD */ 4591 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4592 spec->gpio_data = 0x01; 4593 4594 spec->eapd_switch = 1; 4595 4596 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 4597 spec->pwr_nids = stac92hd73xx_pwr_nids; 4598 4599 spec->gen.own_eapd_ctl = 1; 4600 spec->gen.power_down_unused = 1; 4601 4602 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 4603 stac92hd73xx_fixups); 4604 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4605 4606 if (!spec->volknob_init) 4607 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 4608 4609 err = stac_parse_auto_config(codec); 4610 if (err < 0) { 4611 stac_free(codec); 4612 return err; 4613 } 4614 4615 /* Don't GPIO-mute speakers if there are no internal speakers, because 4616 * the GPIO might be necessary for Headphone 4617 */ 4618 if (spec->eapd_switch && !has_builtin_speaker(codec)) 4619 spec->eapd_switch = 0; 4620 4621 codec->proc_widget_hook = stac92hd7x_proc_hook; 4622 4623 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4624 4625 return 0; 4626 } 4627 4628 static void stac_setup_gpio(struct hda_codec *codec) 4629 { 4630 struct sigmatel_spec *spec = codec->spec; 4631 4632 spec->gpio_mask |= spec->eapd_mask; 4633 if (spec->gpio_led) { 4634 if (!spec->vref_mute_led_nid) { 4635 spec->gpio_mask |= spec->gpio_led; 4636 spec->gpio_dir |= spec->gpio_led; 4637 spec->gpio_data |= spec->gpio_led; 4638 } else { 4639 codec->power_filter = stac_vref_led_power_filter; 4640 } 4641 } 4642 4643 if (spec->mic_mute_led_gpio) { 4644 spec->gpio_mask |= spec->mic_mute_led_gpio; 4645 spec->gpio_dir |= spec->mic_mute_led_gpio; 4646 spec->mic_enabled = 0; 4647 spec->gpio_data |= spec->mic_mute_led_gpio; 4648 snd_hda_gen_add_micmute_led(codec, stac_capture_led_update); 4649 } 4650 } 4651 4652 static int patch_stac92hd83xxx(struct hda_codec *codec) 4653 { 4654 struct sigmatel_spec *spec; 4655 int err; 4656 4657 err = alloc_stac_spec(codec); 4658 if (err < 0) 4659 return err; 4660 4661 /* longer delay needed for D3 */ 4662 codec->core.power_caps &= ~AC_PWRST_EPSS; 4663 4664 spec = codec->spec; 4665 codec->power_save_node = 1; 4666 spec->linear_tone_beep = 0; 4667 spec->gen.own_eapd_ctl = 1; 4668 spec->gen.power_down_unused = 1; 4669 spec->gen.mixer_nid = 0x1b; 4670 4671 spec->gen.beep_nid = 0x21; /* digital beep */ 4672 spec->pwr_nids = stac92hd83xxx_pwr_nids; 4673 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 4674 spec->default_polarity = -1; /* no default cfg */ 4675 4676 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 4677 4678 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 4679 stac92hd83xxx_fixups); 4680 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4681 4682 stac_setup_gpio(codec); 4683 4684 err = stac_parse_auto_config(codec); 4685 if (err < 0) { 4686 stac_free(codec); 4687 return err; 4688 } 4689 4690 codec->proc_widget_hook = stac92hd_proc_hook; 4691 4692 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4693 4694 return 0; 4695 } 4696 4697 static const hda_nid_t stac92hd95_pwr_nids[] = { 4698 0x0a, 0x0b, 0x0c, 0x0d 4699 }; 4700 4701 static int patch_stac92hd95(struct hda_codec *codec) 4702 { 4703 struct sigmatel_spec *spec; 4704 int err; 4705 4706 err = alloc_stac_spec(codec); 4707 if (err < 0) 4708 return err; 4709 4710 /* longer delay needed for D3 */ 4711 codec->core.power_caps &= ~AC_PWRST_EPSS; 4712 4713 spec = codec->spec; 4714 codec->power_save_node = 1; 4715 spec->linear_tone_beep = 0; 4716 spec->gen.own_eapd_ctl = 1; 4717 spec->gen.power_down_unused = 1; 4718 4719 spec->gen.beep_nid = 0x19; /* digital beep */ 4720 spec->pwr_nids = stac92hd95_pwr_nids; 4721 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4722 spec->default_polarity = 0; 4723 4724 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl, 4725 stac92hd95_fixups); 4726 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4727 4728 stac_setup_gpio(codec); 4729 4730 err = stac_parse_auto_config(codec); 4731 if (err < 0) { 4732 stac_free(codec); 4733 return err; 4734 } 4735 4736 codec->proc_widget_hook = stac92hd_proc_hook; 4737 4738 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4739 4740 return 0; 4741 } 4742 4743 static int patch_stac92hd71bxx(struct hda_codec *codec) 4744 { 4745 struct sigmatel_spec *spec; 4746 const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids; 4747 int err; 4748 4749 err = alloc_stac_spec(codec); 4750 if (err < 0) 4751 return err; 4752 4753 spec = codec->spec; 4754 /* disabled power_save_node since it causes noises on a Dell machine */ 4755 /* codec->power_save_node = 1; */ 4756 spec->linear_tone_beep = 0; 4757 spec->gen.own_eapd_ctl = 1; 4758 spec->gen.power_down_unused = 1; 4759 spec->gen.mixer_nid = 0x17; 4760 spec->have_spdif_mux = 1; 4761 4762 /* GPIO0 = EAPD */ 4763 spec->gpio_mask = 0x01; 4764 spec->gpio_dir = 0x01; 4765 spec->gpio_data = 0x01; 4766 4767 switch (codec->core.vendor_id) { 4768 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4769 case 0x111d76b7: 4770 unmute_nids++; 4771 break; 4772 case 0x111d7608: /* 5 Port with Analog Mixer */ 4773 if ((codec->core.revision_id & 0xf) == 0 || 4774 (codec->core.revision_id & 0xf) == 1) 4775 spec->stream_delay = 40; /* 40 milliseconds */ 4776 4777 /* disable VSW */ 4778 unmute_nids++; 4779 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4780 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4781 break; 4782 case 0x111d7603: /* 6 Port with Analog Mixer */ 4783 if ((codec->core.revision_id & 0xf) == 1) 4784 spec->stream_delay = 40; /* 40 milliseconds */ 4785 4786 break; 4787 } 4788 4789 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4790 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4791 4792 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) { 4793 const hda_nid_t *p; 4794 for (p = unmute_nids; *p; p++) 4795 snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0, 4796 0xff, 0x00); 4797 } 4798 4799 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4800 spec->aloopback_mask = 0x50; 4801 spec->aloopback_shift = 0; 4802 4803 spec->powerdown_adcs = 1; 4804 spec->gen.beep_nid = 0x26; /* digital beep */ 4805 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4806 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4807 4808 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4809 stac92hd71bxx_fixups); 4810 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4811 4812 stac_setup_gpio(codec); 4813 4814 err = stac_parse_auto_config(codec); 4815 if (err < 0) { 4816 stac_free(codec); 4817 return err; 4818 } 4819 4820 codec->proc_widget_hook = stac92hd7x_proc_hook; 4821 4822 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4823 4824 return 0; 4825 } 4826 4827 static int patch_stac922x(struct hda_codec *codec) 4828 { 4829 struct sigmatel_spec *spec; 4830 int err; 4831 4832 err = alloc_stac_spec(codec); 4833 if (err < 0) 4834 return err; 4835 4836 spec = codec->spec; 4837 spec->linear_tone_beep = 1; 4838 spec->gen.own_eapd_ctl = 1; 4839 4840 snd_hda_add_verbs(codec, stac922x_core_init); 4841 4842 /* Fix Mux capture level; max to 2 */ 4843 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4844 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4845 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4846 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4847 (0 << AC_AMPCAP_MUTE_SHIFT)); 4848 4849 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4850 stac922x_fixups); 4851 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4852 4853 err = stac_parse_auto_config(codec); 4854 if (err < 0) { 4855 stac_free(codec); 4856 return err; 4857 } 4858 4859 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4860 4861 return 0; 4862 } 4863 4864 static const char * const stac927x_spdif_labels[] = { 4865 "Digital Playback", "ADAT", "Analog Mux 1", 4866 "Analog Mux 2", "Analog Mux 3", NULL 4867 }; 4868 4869 static int patch_stac927x(struct hda_codec *codec) 4870 { 4871 struct sigmatel_spec *spec; 4872 int err; 4873 4874 err = alloc_stac_spec(codec); 4875 if (err < 0) 4876 return err; 4877 4878 spec = codec->spec; 4879 spec->linear_tone_beep = 1; 4880 spec->gen.own_eapd_ctl = 1; 4881 spec->have_spdif_mux = 1; 4882 spec->spdif_labels = stac927x_spdif_labels; 4883 4884 spec->gen.beep_nid = 0x23; /* digital beep */ 4885 4886 /* GPIO0 High = Enable EAPD */ 4887 spec->eapd_mask = spec->gpio_mask = 0x01; 4888 spec->gpio_dir = spec->gpio_data = 0x01; 4889 4890 spec->aloopback_ctl = &stac927x_loopback; 4891 spec->aloopback_mask = 0x40; 4892 spec->aloopback_shift = 0; 4893 spec->eapd_switch = 1; 4894 4895 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4896 stac927x_fixups); 4897 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4898 4899 if (!spec->volknob_init) 4900 snd_hda_add_verbs(codec, stac927x_core_init); 4901 4902 err = stac_parse_auto_config(codec); 4903 if (err < 0) { 4904 stac_free(codec); 4905 return err; 4906 } 4907 4908 codec->proc_widget_hook = stac927x_proc_hook; 4909 4910 /* 4911 * !!FIXME!! 4912 * The STAC927x seem to require fairly long delays for certain 4913 * command sequences. With too short delays (even if the answer 4914 * is set to RIRB properly), it results in the silence output 4915 * on some hardwares like Dell. 4916 * 4917 * The below flag enables the longer delay (see get_response 4918 * in hda_intel.c). 4919 */ 4920 codec->bus->needs_damn_long_delay = 1; 4921 4922 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4923 4924 return 0; 4925 } 4926 4927 static int patch_stac9205(struct hda_codec *codec) 4928 { 4929 struct sigmatel_spec *spec; 4930 int err; 4931 4932 err = alloc_stac_spec(codec); 4933 if (err < 0) 4934 return err; 4935 4936 spec = codec->spec; 4937 spec->linear_tone_beep = 1; 4938 spec->gen.own_eapd_ctl = 1; 4939 spec->have_spdif_mux = 1; 4940 4941 spec->gen.beep_nid = 0x23; /* digital beep */ 4942 4943 snd_hda_add_verbs(codec, stac9205_core_init); 4944 spec->aloopback_ctl = &stac9205_loopback; 4945 4946 spec->aloopback_mask = 0x40; 4947 spec->aloopback_shift = 0; 4948 4949 /* GPIO0 High = EAPD */ 4950 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4951 spec->gpio_data = 0x01; 4952 4953 /* Turn on/off EAPD per HP plugging */ 4954 spec->eapd_switch = 1; 4955 4956 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4957 stac9205_fixups); 4958 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4959 4960 err = stac_parse_auto_config(codec); 4961 if (err < 0) { 4962 stac_free(codec); 4963 return err; 4964 } 4965 4966 codec->proc_widget_hook = stac9205_proc_hook; 4967 4968 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4969 4970 return 0; 4971 } 4972 4973 /* 4974 * STAC9872 hack 4975 */ 4976 4977 static const struct hda_verb stac9872_core_init[] = { 4978 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4979 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4980 {} 4981 }; 4982 4983 static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4984 { 0x0a, 0x03211020 }, 4985 { 0x0b, 0x411111f0 }, 4986 { 0x0c, 0x411111f0 }, 4987 { 0x0d, 0x03a15030 }, 4988 { 0x0e, 0x411111f0 }, 4989 { 0x0f, 0x90170110 }, 4990 { 0x11, 0x411111f0 }, 4991 { 0x13, 0x411111f0 }, 4992 { 0x14, 0x90a7013e }, 4993 {} 4994 }; 4995 4996 static const struct hda_model_fixup stac9872_models[] = { 4997 { .id = STAC_9872_VAIO, .name = "vaio" }, 4998 {} 4999 }; 5000 5001 static const struct hda_fixup stac9872_fixups[] = { 5002 [STAC_9872_VAIO] = { 5003 .type = HDA_FIXUP_PINS, 5004 .v.pins = stac9872_vaio_pin_configs, 5005 }, 5006 }; 5007 5008 static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 5009 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 5010 "Sony VAIO F/S", STAC_9872_VAIO), 5011 {} /* terminator */ 5012 }; 5013 5014 static int patch_stac9872(struct hda_codec *codec) 5015 { 5016 struct sigmatel_spec *spec; 5017 int err; 5018 5019 err = alloc_stac_spec(codec); 5020 if (err < 0) 5021 return err; 5022 5023 spec = codec->spec; 5024 spec->linear_tone_beep = 1; 5025 spec->gen.own_eapd_ctl = 1; 5026 5027 snd_hda_add_verbs(codec, stac9872_core_init); 5028 5029 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 5030 stac9872_fixups); 5031 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 5032 5033 err = stac_parse_auto_config(codec); 5034 if (err < 0) { 5035 stac_free(codec); 5036 return -EINVAL; 5037 } 5038 5039 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 5040 5041 return 0; 5042 } 5043 5044 5045 /* 5046 * patch entries 5047 */ 5048 static const struct hda_device_id snd_hda_id_sigmatel[] = { 5049 HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200), 5050 HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x), 5051 HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x), 5052 HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x), 5053 HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x), 5054 HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x), 5055 HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x), 5056 HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x), 5057 HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x), 5058 HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x), 5059 HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x), 5060 HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x), 5061 HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x), 5062 HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x), 5063 HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x), 5064 HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x), 5065 HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x), 5066 HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x), 5067 HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x), 5068 HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x), 5069 HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x), 5070 HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x), 5071 HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x), 5072 HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x), 5073 HDA_CODEC_ENTRY(0x83847632, "STAC9202", patch_stac925x), 5074 HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x), 5075 HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x), 5076 HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x), 5077 HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x), 5078 HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x), 5079 HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x), 5080 HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x), 5081 /* The following does not take into account .id=0x83847661 when subsys = 5082 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 5083 * currently not fully supported. 5084 */ 5085 HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872), 5086 HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872), 5087 HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872), 5088 HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205), 5089 HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205), 5090 HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205), 5091 HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205), 5092 HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205), 5093 HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205), 5094 HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205), 5095 HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205), 5096 HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205), 5097 HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx), 5098 HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx), 5099 HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx), 5100 HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx), 5101 HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx), 5102 HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx), 5103 HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx), 5104 HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx), 5105 HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx), 5106 HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx), 5107 HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx), 5108 HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx), 5109 HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx), 5110 HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx), 5111 HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx), 5112 HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95), 5113 HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx), 5114 HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx), 5115 HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx), 5116 HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx), 5117 HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx), 5118 HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx), 5119 HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx), 5120 HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx), 5121 HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx), 5122 HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx), 5123 HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx), 5124 HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx), 5125 HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx), 5126 HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx), 5127 HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx), 5128 HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx), 5129 HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx), 5130 HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx), 5131 HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx), 5132 HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx), 5133 HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx), 5134 HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx), 5135 HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx), 5136 HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx), 5137 HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx), 5138 HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx), 5139 HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx), 5140 HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx), 5141 HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx), 5142 HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx), 5143 HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx), 5144 HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx), 5145 HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx), 5146 HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx), 5147 HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx), 5148 HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx), 5149 HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx), 5150 HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx), 5151 HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx), 5152 HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx), 5153 {} /* terminator */ 5154 }; 5155 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel); 5156 5157 MODULE_LICENSE("GPL"); 5158 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 5159 5160 static struct hda_codec_driver sigmatel_driver = { 5161 .id = snd_hda_id_sigmatel, 5162 }; 5163 5164 module_hda_codec_driver(sigmatel_driver); 5165