1 /* 2 * Universal Interface for Intel High Definition Audio Codec 3 * 4 * HD audio interface patch for SigmaTel STAC92xx 5 * 6 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 7 * Matt Porter <mporter@embeddedalley.com> 8 * 9 * Based on patch_cmedia.c and patch_realtek.c 10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 11 * 12 * This driver is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This driver is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/init.h> 28 #include <linux/delay.h> 29 #include <linux/slab.h> 30 #include <linux/pci.h> 31 #include <linux/dmi.h> 32 #include <linux/module.h> 33 #include <sound/core.h> 34 #include <sound/jack.h> 35 #include <sound/tlv.h> 36 #include "hda_codec.h" 37 #include "hda_local.h" 38 #include "hda_auto_parser.h" 39 #include "hda_beep.h" 40 #include "hda_jack.h" 41 #include "hda_generic.h" 42 43 enum { 44 STAC_VREF_EVENT = 8, 45 STAC_PWR_EVENT, 46 }; 47 48 enum { 49 STAC_REF, 50 STAC_9200_OQO, 51 STAC_9200_DELL_D21, 52 STAC_9200_DELL_D22, 53 STAC_9200_DELL_D23, 54 STAC_9200_DELL_M21, 55 STAC_9200_DELL_M22, 56 STAC_9200_DELL_M23, 57 STAC_9200_DELL_M24, 58 STAC_9200_DELL_M25, 59 STAC_9200_DELL_M26, 60 STAC_9200_DELL_M27, 61 STAC_9200_M4, 62 STAC_9200_M4_2, 63 STAC_9200_PANASONIC, 64 STAC_9200_EAPD_INIT, 65 STAC_9200_MODELS 66 }; 67 68 enum { 69 STAC_9205_REF, 70 STAC_9205_DELL_M42, 71 STAC_9205_DELL_M43, 72 STAC_9205_DELL_M44, 73 STAC_9205_EAPD, 74 STAC_9205_MODELS 75 }; 76 77 enum { 78 STAC_92HD73XX_NO_JD, /* no jack-detection */ 79 STAC_92HD73XX_REF, 80 STAC_92HD73XX_INTEL, 81 STAC_DELL_M6_AMIC, 82 STAC_DELL_M6_DMIC, 83 STAC_DELL_M6_BOTH, 84 STAC_DELL_EQ, 85 STAC_ALIENWARE_M17X, 86 STAC_92HD89XX_HP_FRONT_JACK, 87 STAC_92HD73XX_MODELS 88 }; 89 90 enum { 91 STAC_92HD83XXX_REF, 92 STAC_92HD83XXX_PWR_REF, 93 STAC_DELL_S14, 94 STAC_DELL_VOSTRO_3500, 95 STAC_92HD83XXX_HP_cNB11_INTQUAD, 96 STAC_HP_DV7_4000, 97 STAC_HP_ZEPHYR, 98 STAC_92HD83XXX_HP_LED, 99 STAC_92HD83XXX_HP_INV_LED, 100 STAC_92HD83XXX_HP_MIC_LED, 101 STAC_HP_LED_GPIO10, 102 STAC_92HD83XXX_HEADSET_JACK, 103 STAC_92HD83XXX_HP, 104 STAC_HP_ENVY_BASS, 105 STAC_HP_BNB13_EQ, 106 STAC_92HD83XXX_MODELS 107 }; 108 109 enum { 110 STAC_92HD71BXX_REF, 111 STAC_DELL_M4_1, 112 STAC_DELL_M4_2, 113 STAC_DELL_M4_3, 114 STAC_HP_M4, 115 STAC_HP_DV4, 116 STAC_HP_DV5, 117 STAC_HP_HDX, 118 STAC_92HD71BXX_HP, 119 STAC_92HD71BXX_NO_DMIC, 120 STAC_92HD71BXX_NO_SMUX, 121 STAC_92HD71BXX_MODELS 122 }; 123 124 enum { 125 STAC_92HD95_HP_LED, 126 STAC_92HD95_HP_BASS, 127 STAC_92HD95_MODELS 128 }; 129 130 enum { 131 STAC_925x_REF, 132 STAC_M1, 133 STAC_M1_2, 134 STAC_M2, 135 STAC_M2_2, 136 STAC_M3, 137 STAC_M5, 138 STAC_M6, 139 STAC_925x_MODELS 140 }; 141 142 enum { 143 STAC_D945_REF, 144 STAC_D945GTP3, 145 STAC_D945GTP5, 146 STAC_INTEL_MAC_V1, 147 STAC_INTEL_MAC_V2, 148 STAC_INTEL_MAC_V3, 149 STAC_INTEL_MAC_V4, 150 STAC_INTEL_MAC_V5, 151 STAC_INTEL_MAC_AUTO, 152 STAC_ECS_202, 153 STAC_922X_DELL_D81, 154 STAC_922X_DELL_D82, 155 STAC_922X_DELL_M81, 156 STAC_922X_DELL_M82, 157 STAC_922X_INTEL_MAC_GPIO, 158 STAC_922X_MODELS 159 }; 160 161 enum { 162 STAC_D965_REF_NO_JD, /* no jack-detection */ 163 STAC_D965_REF, 164 STAC_D965_3ST, 165 STAC_D965_5ST, 166 STAC_D965_5ST_NO_FP, 167 STAC_D965_VERBS, 168 STAC_DELL_3ST, 169 STAC_DELL_BIOS, 170 STAC_DELL_BIOS_AMIC, 171 STAC_DELL_BIOS_SPDIF, 172 STAC_927X_DELL_DMIC, 173 STAC_927X_VOLKNOB, 174 STAC_927X_MODELS 175 }; 176 177 enum { 178 STAC_9872_VAIO, 179 STAC_9872_MODELS 180 }; 181 182 struct sigmatel_spec { 183 struct hda_gen_spec gen; 184 185 unsigned int eapd_switch: 1; 186 unsigned int linear_tone_beep:1; 187 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 188 unsigned int volknob_init:1; /* special volume-knob initialization */ 189 unsigned int powerdown_adcs:1; 190 unsigned int have_spdif_mux:1; 191 192 /* gpio lines */ 193 unsigned int eapd_mask; 194 unsigned int gpio_mask; 195 unsigned int gpio_dir; 196 unsigned int gpio_data; 197 unsigned int gpio_mute; 198 unsigned int gpio_led; 199 unsigned int gpio_led_polarity; 200 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 201 unsigned int vref_led; 202 int default_polarity; 203 204 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 205 unsigned int mic_enabled; /* current mic mute state (bitmask) */ 206 207 /* stream */ 208 unsigned int stream_delay; 209 210 /* analog loopback */ 211 const struct snd_kcontrol_new *aloopback_ctl; 212 unsigned int aloopback; 213 unsigned char aloopback_mask; 214 unsigned char aloopback_shift; 215 216 /* power management */ 217 unsigned int power_map_bits; 218 unsigned int num_pwrs; 219 const hda_nid_t *pwr_nids; 220 unsigned int active_adcs; 221 222 /* beep widgets */ 223 hda_nid_t anabeep_nid; 224 225 /* SPDIF-out mux */ 226 const char * const *spdif_labels; 227 struct hda_input_mux spdif_mux; 228 unsigned int cur_smux[2]; 229 }; 230 231 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec 232 #define AC_VERB_IDT_GET_POWER_MAP 0xfec 233 234 static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 235 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 236 0x0f, 0x10, 0x11 237 }; 238 239 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 240 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 241 0x0f, 0x10 242 }; 243 244 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 245 0x0a, 0x0d, 0x0f 246 }; 247 248 249 /* 250 * PCM hooks 251 */ 252 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 253 struct hda_codec *codec, 254 struct snd_pcm_substream *substream, 255 int action) 256 { 257 struct sigmatel_spec *spec = codec->spec; 258 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 259 msleep(spec->stream_delay); 260 } 261 262 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 263 struct hda_codec *codec, 264 struct snd_pcm_substream *substream, 265 int action) 266 { 267 struct sigmatel_spec *spec = codec->spec; 268 int i, idx = 0; 269 270 if (!spec->powerdown_adcs) 271 return; 272 273 for (i = 0; i < spec->gen.num_all_adcs; i++) { 274 if (spec->gen.all_adcs[i] == hinfo->nid) { 275 idx = i; 276 break; 277 } 278 } 279 280 switch (action) { 281 case HDA_GEN_PCM_ACT_OPEN: 282 msleep(40); 283 snd_hda_codec_write(codec, hinfo->nid, 0, 284 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 285 spec->active_adcs |= (1 << idx); 286 break; 287 case HDA_GEN_PCM_ACT_CLOSE: 288 snd_hda_codec_write(codec, hinfo->nid, 0, 289 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 290 spec->active_adcs &= ~(1 << idx); 291 break; 292 } 293 } 294 295 /* 296 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 297 * funky external mute control using GPIO pins. 298 */ 299 300 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 301 unsigned int dir_mask, unsigned int data) 302 { 303 unsigned int gpiostate, gpiomask, gpiodir; 304 305 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 306 307 gpiostate = snd_hda_codec_read(codec, codec->afg, 0, 308 AC_VERB_GET_GPIO_DATA, 0); 309 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 310 311 gpiomask = snd_hda_codec_read(codec, codec->afg, 0, 312 AC_VERB_GET_GPIO_MASK, 0); 313 gpiomask |= mask; 314 315 gpiodir = snd_hda_codec_read(codec, codec->afg, 0, 316 AC_VERB_GET_GPIO_DIRECTION, 0); 317 gpiodir |= dir_mask; 318 319 /* Configure GPIOx as CMOS */ 320 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0); 321 322 snd_hda_codec_write(codec, codec->afg, 0, 323 AC_VERB_SET_GPIO_MASK, gpiomask); 324 snd_hda_codec_read(codec, codec->afg, 0, 325 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 326 327 msleep(1); 328 329 snd_hda_codec_read(codec, codec->afg, 0, 330 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 331 } 332 333 /* hook for controlling mic-mute LED GPIO */ 334 static void stac_capture_led_hook(struct hda_codec *codec, 335 struct snd_kcontrol *kcontrol, 336 struct snd_ctl_elem_value *ucontrol) 337 { 338 struct sigmatel_spec *spec = codec->spec; 339 unsigned int mask; 340 bool cur_mute, prev_mute; 341 342 if (!kcontrol || !ucontrol) 343 return; 344 345 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 346 prev_mute = !spec->mic_enabled; 347 if (ucontrol->value.integer.value[0] || 348 ucontrol->value.integer.value[1]) 349 spec->mic_enabled |= mask; 350 else 351 spec->mic_enabled &= ~mask; 352 cur_mute = !spec->mic_enabled; 353 if (cur_mute != prev_mute) { 354 if (cur_mute) 355 spec->gpio_data |= spec->mic_mute_led_gpio; 356 else 357 spec->gpio_data &= ~spec->mic_mute_led_gpio; 358 stac_gpio_set(codec, spec->gpio_mask, 359 spec->gpio_dir, spec->gpio_data); 360 } 361 } 362 363 static int stac_vrefout_set(struct hda_codec *codec, 364 hda_nid_t nid, unsigned int new_vref) 365 { 366 int error, pinctl; 367 368 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref); 369 pinctl = snd_hda_codec_read(codec, nid, 0, 370 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 371 372 if (pinctl < 0) 373 return pinctl; 374 375 pinctl &= 0xff; 376 pinctl &= ~AC_PINCTL_VREFEN; 377 pinctl |= (new_vref & AC_PINCTL_VREFEN); 378 379 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 380 if (error < 0) 381 return error; 382 383 return 1; 384 } 385 386 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ 387 /* this hook is set in stac_setup_gpio() */ 388 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, 389 hda_nid_t nid, 390 unsigned int power_state) 391 { 392 if (nid == codec->afg && power_state == AC_PWRST_D3) 393 return AC_PWRST_D1; 394 return snd_hda_gen_path_power_filter(codec, nid, power_state); 395 } 396 397 /* update mute-LED accoring to the master switch */ 398 static void stac_update_led_status(struct hda_codec *codec, int enabled) 399 { 400 struct sigmatel_spec *spec = codec->spec; 401 int muted = !enabled; 402 403 if (!spec->gpio_led) 404 return; 405 406 /* LED state is inverted on these systems */ 407 if (spec->gpio_led_polarity) 408 muted = !muted; 409 410 if (!spec->vref_mute_led_nid) { 411 if (muted) 412 spec->gpio_data |= spec->gpio_led; 413 else 414 spec->gpio_data &= ~spec->gpio_led; 415 stac_gpio_set(codec, spec->gpio_mask, 416 spec->gpio_dir, spec->gpio_data); 417 } else { 418 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 419 stac_vrefout_set(codec, spec->vref_mute_led_nid, 420 spec->vref_led); 421 } 422 } 423 424 /* vmaster hook to update mute LED */ 425 static void stac_vmaster_hook(void *private_data, int val) 426 { 427 stac_update_led_status(private_data, val); 428 } 429 430 /* automute hook to handle GPIO mute and EAPD updates */ 431 static void stac_update_outputs(struct hda_codec *codec) 432 { 433 struct sigmatel_spec *spec = codec->spec; 434 435 if (spec->gpio_mute) 436 spec->gen.master_mute = 437 !(snd_hda_codec_read(codec, codec->afg, 0, 438 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 439 440 snd_hda_gen_update_outputs(codec); 441 442 if (spec->eapd_mask && spec->eapd_switch) { 443 unsigned int val = spec->gpio_data; 444 if (spec->gen.speaker_muted) 445 val &= ~spec->eapd_mask; 446 else 447 val |= spec->eapd_mask; 448 if (spec->gpio_data != val) { 449 spec->gpio_data = val; 450 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 451 val); 452 } 453 } 454 } 455 456 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 457 bool enable, bool do_write) 458 { 459 struct sigmatel_spec *spec = codec->spec; 460 unsigned int idx, val; 461 462 for (idx = 0; idx < spec->num_pwrs; idx++) { 463 if (spec->pwr_nids[idx] == nid) 464 break; 465 } 466 if (idx >= spec->num_pwrs) 467 return; 468 469 idx = 1 << idx; 470 471 val = spec->power_map_bits; 472 if (enable) 473 val &= ~idx; 474 else 475 val |= idx; 476 477 /* power down unused output ports */ 478 if (val != spec->power_map_bits) { 479 spec->power_map_bits = val; 480 if (do_write) 481 snd_hda_codec_write(codec, codec->afg, 0, 482 AC_VERB_IDT_SET_POWER_MAP, val); 483 } 484 } 485 486 /* update power bit per jack plug/unplug */ 487 static void jack_update_power(struct hda_codec *codec, 488 struct hda_jack_tbl *jack) 489 { 490 struct sigmatel_spec *spec = codec->spec; 491 int i; 492 493 if (!spec->num_pwrs) 494 return; 495 496 if (jack && jack->nid) { 497 stac_toggle_power_map(codec, jack->nid, 498 snd_hda_jack_detect(codec, jack->nid), 499 true); 500 return; 501 } 502 503 /* update all jacks */ 504 for (i = 0; i < spec->num_pwrs; i++) { 505 hda_nid_t nid = spec->pwr_nids[i]; 506 jack = snd_hda_jack_tbl_get(codec, nid); 507 if (!jack || !jack->action) 508 continue; 509 if (jack->action == STAC_PWR_EVENT || 510 jack->action <= HDA_GEN_LAST_EVENT) 511 stac_toggle_power_map(codec, nid, 512 snd_hda_jack_detect(codec, nid), 513 false); 514 } 515 516 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP, 517 spec->power_map_bits); 518 } 519 520 static void stac_hp_automute(struct hda_codec *codec, 521 struct hda_jack_tbl *jack) 522 { 523 snd_hda_gen_hp_automute(codec, jack); 524 jack_update_power(codec, jack); 525 } 526 527 static void stac_line_automute(struct hda_codec *codec, 528 struct hda_jack_tbl *jack) 529 { 530 snd_hda_gen_line_automute(codec, jack); 531 jack_update_power(codec, jack); 532 } 533 534 static void stac_mic_autoswitch(struct hda_codec *codec, 535 struct hda_jack_tbl *jack) 536 { 537 snd_hda_gen_mic_autoswitch(codec, jack); 538 jack_update_power(codec, jack); 539 } 540 541 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event) 542 { 543 unsigned int data; 544 545 data = snd_hda_codec_read(codec, codec->afg, 0, 546 AC_VERB_GET_GPIO_DATA, 0); 547 /* toggle VREF state based on GPIOx status */ 548 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0, 549 !!(data & (1 << event->private_data))); 550 } 551 552 /* initialize the power map and enable the power event to jacks that 553 * haven't been assigned to automute 554 */ 555 static void stac_init_power_map(struct hda_codec *codec) 556 { 557 struct sigmatel_spec *spec = codec->spec; 558 int i; 559 560 for (i = 0; i < spec->num_pwrs; i++) { 561 hda_nid_t nid = spec->pwr_nids[i]; 562 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 563 def_conf = get_defcfg_connect(def_conf); 564 if (snd_hda_jack_tbl_get(codec, nid)) 565 continue; 566 if (def_conf == AC_JACK_PORT_COMPLEX && 567 !(spec->vref_mute_led_nid == nid || 568 is_jack_detectable(codec, nid))) { 569 snd_hda_jack_detect_enable_callback(codec, nid, 570 STAC_PWR_EVENT, 571 jack_update_power); 572 } else { 573 if (def_conf == AC_JACK_PORT_NONE) 574 stac_toggle_power_map(codec, nid, false, false); 575 else 576 stac_toggle_power_map(codec, nid, true, false); 577 } 578 } 579 } 580 581 /* 582 */ 583 584 static inline bool get_int_hint(struct hda_codec *codec, const char *key, 585 int *valp) 586 { 587 return !snd_hda_get_int_hint(codec, key, valp); 588 } 589 590 /* override some hints from the hwdep entry */ 591 static void stac_store_hints(struct hda_codec *codec) 592 { 593 struct sigmatel_spec *spec = codec->spec; 594 int val; 595 596 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 597 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 598 spec->gpio_mask; 599 } 600 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 601 spec->gpio_mask &= spec->gpio_mask; 602 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 603 spec->gpio_dir &= spec->gpio_mask; 604 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 605 spec->eapd_mask &= spec->gpio_mask; 606 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 607 spec->gpio_mute &= spec->gpio_mask; 608 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 609 if (val >= 0) 610 spec->eapd_switch = val; 611 } 612 613 /* 614 * loopback controls 615 */ 616 617 #define stac_aloopback_info snd_ctl_boolean_mono_info 618 619 static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 620 struct snd_ctl_elem_value *ucontrol) 621 { 622 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 623 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 624 struct sigmatel_spec *spec = codec->spec; 625 626 ucontrol->value.integer.value[0] = !!(spec->aloopback & 627 (spec->aloopback_mask << idx)); 628 return 0; 629 } 630 631 static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 632 struct snd_ctl_elem_value *ucontrol) 633 { 634 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 635 struct sigmatel_spec *spec = codec->spec; 636 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 637 unsigned int dac_mode; 638 unsigned int val, idx_val; 639 640 idx_val = spec->aloopback_mask << idx; 641 if (ucontrol->value.integer.value[0]) 642 val = spec->aloopback | idx_val; 643 else 644 val = spec->aloopback & ~idx_val; 645 if (spec->aloopback == val) 646 return 0; 647 648 spec->aloopback = val; 649 650 /* Only return the bits defined by the shift value of the 651 * first two bytes of the mask 652 */ 653 dac_mode = snd_hda_codec_read(codec, codec->afg, 0, 654 kcontrol->private_value & 0xFFFF, 0x0); 655 dac_mode >>= spec->aloopback_shift; 656 657 if (spec->aloopback & idx_val) { 658 snd_hda_power_up(codec); 659 dac_mode |= idx_val; 660 } else { 661 snd_hda_power_down(codec); 662 dac_mode &= ~idx_val; 663 } 664 665 snd_hda_codec_write_cache(codec, codec->afg, 0, 666 kcontrol->private_value >> 16, dac_mode); 667 668 return 1; 669 } 670 671 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 672 { \ 673 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 674 .name = "Analog Loopback", \ 675 .count = cnt, \ 676 .info = stac_aloopback_info, \ 677 .get = stac_aloopback_get, \ 678 .put = stac_aloopback_put, \ 679 .private_value = verb_read | (verb_write << 16), \ 680 } 681 682 /* 683 * Mute LED handling on HP laptops 684 */ 685 686 /* check whether it's a HP laptop with a docking port */ 687 static bool hp_bnb2011_with_dock(struct hda_codec *codec) 688 { 689 if (codec->vendor_id != 0x111d7605 && 690 codec->vendor_id != 0x111d76d1) 691 return false; 692 693 switch (codec->subsystem_id) { 694 case 0x103c1618: 695 case 0x103c1619: 696 case 0x103c161a: 697 case 0x103c161b: 698 case 0x103c161c: 699 case 0x103c161d: 700 case 0x103c161e: 701 case 0x103c161f: 702 703 case 0x103c162a: 704 case 0x103c162b: 705 706 case 0x103c1630: 707 case 0x103c1631: 708 709 case 0x103c1633: 710 case 0x103c1634: 711 case 0x103c1635: 712 713 case 0x103c3587: 714 case 0x103c3588: 715 case 0x103c3589: 716 case 0x103c358a: 717 718 case 0x103c3667: 719 case 0x103c3668: 720 case 0x103c3669: 721 722 return true; 723 } 724 return false; 725 } 726 727 static bool hp_blike_system(u32 subsystem_id) 728 { 729 switch (subsystem_id) { 730 case 0x103c1520: 731 case 0x103c1521: 732 case 0x103c1523: 733 case 0x103c1524: 734 case 0x103c1525: 735 case 0x103c1722: 736 case 0x103c1723: 737 case 0x103c1724: 738 case 0x103c1725: 739 case 0x103c1726: 740 case 0x103c1727: 741 case 0x103c1728: 742 case 0x103c1729: 743 case 0x103c172a: 744 case 0x103c172b: 745 case 0x103c307e: 746 case 0x103c307f: 747 case 0x103c3080: 748 case 0x103c3081: 749 case 0x103c7007: 750 case 0x103c7008: 751 return true; 752 } 753 return false; 754 } 755 756 static void set_hp_led_gpio(struct hda_codec *codec) 757 { 758 struct sigmatel_spec *spec = codec->spec; 759 unsigned int gpio; 760 761 if (spec->gpio_led) 762 return; 763 764 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP); 765 gpio &= AC_GPIO_IO_COUNT; 766 if (gpio > 3) 767 spec->gpio_led = 0x08; /* GPIO 3 */ 768 else 769 spec->gpio_led = 0x01; /* GPIO 0 */ 770 } 771 772 /* 773 * This method searches for the mute LED GPIO configuration 774 * provided as OEM string in SMBIOS. The format of that string 775 * is HP_Mute_LED_P_G or HP_Mute_LED_P 776 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 777 * that corresponds to the NOT muted state of the master volume 778 * and G is the index of the GPIO to use as the mute LED control (0..9) 779 * If _G portion is missing it is assigned based on the codec ID 780 * 781 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 782 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 783 * 784 * 785 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 786 * SMBIOS - at least the ones I have seen do not have them - which include 787 * my own system (HP Pavilion dv6-1110ax) and my cousin's 788 * HP Pavilion dv9500t CTO. 789 * Need more information on whether it is true across the entire series. 790 * -- kunal 791 */ 792 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 793 { 794 struct sigmatel_spec *spec = codec->spec; 795 const struct dmi_device *dev = NULL; 796 797 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 798 get_int_hint(codec, "gpio_led_polarity", 799 &spec->gpio_led_polarity); 800 return 1; 801 } 802 803 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 804 if (sscanf(dev->name, "HP_Mute_LED_%u_%x", 805 &spec->gpio_led_polarity, 806 &spec->gpio_led) == 2) { 807 unsigned int max_gpio; 808 max_gpio = snd_hda_param_read(codec, codec->afg, 809 AC_PAR_GPIO_CAP); 810 max_gpio &= AC_GPIO_IO_COUNT; 811 if (spec->gpio_led < max_gpio) 812 spec->gpio_led = 1 << spec->gpio_led; 813 else 814 spec->vref_mute_led_nid = spec->gpio_led; 815 return 1; 816 } 817 if (sscanf(dev->name, "HP_Mute_LED_%u", 818 &spec->gpio_led_polarity) == 1) { 819 set_hp_led_gpio(codec); 820 return 1; 821 } 822 /* BIOS bug: unfilled OEM string */ 823 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 824 set_hp_led_gpio(codec); 825 if (default_polarity >= 0) 826 spec->gpio_led_polarity = default_polarity; 827 else 828 spec->gpio_led_polarity = 1; 829 return 1; 830 } 831 } 832 833 /* 834 * Fallback case - if we don't find the DMI strings, 835 * we statically set the GPIO - if not a B-series system 836 * and default polarity is provided 837 */ 838 if (!hp_blike_system(codec->subsystem_id) && 839 (default_polarity == 0 || default_polarity == 1)) { 840 set_hp_led_gpio(codec); 841 spec->gpio_led_polarity = default_polarity; 842 return 1; 843 } 844 return 0; 845 } 846 847 /* check whether a built-in speaker is included in parsed pins */ 848 static bool has_builtin_speaker(struct hda_codec *codec) 849 { 850 struct sigmatel_spec *spec = codec->spec; 851 hda_nid_t *nid_pin; 852 int nids, i; 853 854 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 855 nid_pin = spec->gen.autocfg.line_out_pins; 856 nids = spec->gen.autocfg.line_outs; 857 } else { 858 nid_pin = spec->gen.autocfg.speaker_pins; 859 nids = spec->gen.autocfg.speaker_outs; 860 } 861 862 for (i = 0; i < nids; i++) { 863 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 864 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 865 return true; 866 } 867 return false; 868 } 869 870 /* 871 * PC beep controls 872 */ 873 874 /* create PC beep volume controls */ 875 static int stac_auto_create_beep_ctls(struct hda_codec *codec, 876 hda_nid_t nid) 877 { 878 struct sigmatel_spec *spec = codec->spec; 879 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 880 struct snd_kcontrol_new *knew; 881 static struct snd_kcontrol_new abeep_mute_ctl = 882 HDA_CODEC_MUTE(NULL, 0, 0, 0); 883 static struct snd_kcontrol_new dbeep_mute_ctl = 884 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 885 static struct snd_kcontrol_new beep_vol_ctl = 886 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 887 888 /* check for mute support for the the amp */ 889 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 890 const struct snd_kcontrol_new *temp; 891 if (spec->anabeep_nid == nid) 892 temp = &abeep_mute_ctl; 893 else 894 temp = &dbeep_mute_ctl; 895 knew = snd_hda_gen_add_kctl(&spec->gen, 896 "Beep Playback Switch", temp); 897 if (!knew) 898 return -ENOMEM; 899 knew->private_value = 900 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 901 } 902 903 /* check to see if there is volume support for the amp */ 904 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 905 knew = snd_hda_gen_add_kctl(&spec->gen, 906 "Beep Playback Volume", 907 &beep_vol_ctl); 908 if (!knew) 909 return -ENOMEM; 910 knew->private_value = 911 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 912 } 913 return 0; 914 } 915 916 #ifdef CONFIG_SND_HDA_INPUT_BEEP 917 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 918 919 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 920 struct snd_ctl_elem_value *ucontrol) 921 { 922 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 923 ucontrol->value.integer.value[0] = codec->beep->enabled; 924 return 0; 925 } 926 927 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 928 struct snd_ctl_elem_value *ucontrol) 929 { 930 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 931 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 932 } 933 934 static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 935 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 936 .name = "Beep Playback Switch", 937 .info = stac_dig_beep_switch_info, 938 .get = stac_dig_beep_switch_get, 939 .put = stac_dig_beep_switch_put, 940 }; 941 942 static int stac_beep_switch_ctl(struct hda_codec *codec) 943 { 944 struct sigmatel_spec *spec = codec->spec; 945 946 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 947 return -ENOMEM; 948 return 0; 949 } 950 #endif 951 952 /* 953 * SPDIF-out mux controls 954 */ 955 956 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 957 struct snd_ctl_elem_info *uinfo) 958 { 959 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 960 struct sigmatel_spec *spec = codec->spec; 961 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 962 } 963 964 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 965 struct snd_ctl_elem_value *ucontrol) 966 { 967 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 968 struct sigmatel_spec *spec = codec->spec; 969 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 970 971 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 972 return 0; 973 } 974 975 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 976 struct snd_ctl_elem_value *ucontrol) 977 { 978 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 979 struct sigmatel_spec *spec = codec->spec; 980 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 981 982 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 983 spec->gen.autocfg.dig_out_pins[smux_idx], 984 &spec->cur_smux[smux_idx]); 985 } 986 987 static struct snd_kcontrol_new stac_smux_mixer = { 988 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 989 .name = "IEC958 Playback Source", 990 /* count set later */ 991 .info = stac_smux_enum_info, 992 .get = stac_smux_enum_get, 993 .put = stac_smux_enum_put, 994 }; 995 996 static const char * const stac_spdif_labels[] = { 997 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 998 }; 999 1000 static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 1001 { 1002 struct sigmatel_spec *spec = codec->spec; 1003 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 1004 const char * const *labels = spec->spdif_labels; 1005 struct snd_kcontrol_new *kctl; 1006 int i, num_cons; 1007 1008 if (cfg->dig_outs < 1) 1009 return 0; 1010 1011 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 1012 if (num_cons <= 1) 1013 return 0; 1014 1015 if (!labels) 1016 labels = stac_spdif_labels; 1017 for (i = 0; i < num_cons; i++) { 1018 if (snd_BUG_ON(!labels[i])) 1019 return -EINVAL; 1020 snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL); 1021 } 1022 1023 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 1024 if (!kctl) 1025 return -ENOMEM; 1026 kctl->count = cfg->dig_outs; 1027 1028 return 0; 1029 } 1030 1031 /* 1032 */ 1033 1034 static const struct hda_verb stac9200_core_init[] = { 1035 /* set dac0mux for dac converter */ 1036 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1037 {} 1038 }; 1039 1040 static const struct hda_verb stac9200_eapd_init[] = { 1041 /* set dac0mux for dac converter */ 1042 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1043 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1044 {} 1045 }; 1046 1047 static const struct hda_verb dell_eq_core_init[] = { 1048 /* set master volume to max value without distortion 1049 * and direct control */ 1050 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 1051 {} 1052 }; 1053 1054 static const struct hda_verb stac92hd73xx_core_init[] = { 1055 /* set master volume and direct control */ 1056 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1057 {} 1058 }; 1059 1060 static const struct hda_verb stac92hd83xxx_core_init[] = { 1061 /* power state controls amps */ 1062 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1063 {} 1064 }; 1065 1066 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1067 { 0x22, 0x785, 0x43 }, 1068 { 0x22, 0x782, 0xe0 }, 1069 { 0x22, 0x795, 0x00 }, 1070 {} 1071 }; 1072 1073 static const struct hda_verb stac92hd71bxx_core_init[] = { 1074 /* set master volume and direct control */ 1075 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1076 {} 1077 }; 1078 1079 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = { 1080 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1081 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1082 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1083 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1084 {} 1085 }; 1086 1087 static const struct hda_verb stac925x_core_init[] = { 1088 /* set dac0mux for dac converter */ 1089 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1090 /* mute the master volume */ 1091 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1092 {} 1093 }; 1094 1095 static const struct hda_verb stac922x_core_init[] = { 1096 /* set master volume and direct control */ 1097 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1098 {} 1099 }; 1100 1101 static const struct hda_verb d965_core_init[] = { 1102 /* unmute node 0x1b */ 1103 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1104 /* select node 0x03 as DAC */ 1105 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1106 {} 1107 }; 1108 1109 static const struct hda_verb dell_3st_core_init[] = { 1110 /* don't set delta bit */ 1111 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1112 /* unmute node 0x1b */ 1113 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1114 /* select node 0x03 as DAC */ 1115 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1116 {} 1117 }; 1118 1119 static const struct hda_verb stac927x_core_init[] = { 1120 /* set master volume and direct control */ 1121 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1122 /* enable analog pc beep path */ 1123 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1124 {} 1125 }; 1126 1127 static const struct hda_verb stac927x_volknob_core_init[] = { 1128 /* don't set delta bit */ 1129 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1130 /* enable analog pc beep path */ 1131 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1132 {} 1133 }; 1134 1135 static const struct hda_verb stac9205_core_init[] = { 1136 /* set master volume and direct control */ 1137 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1138 /* enable analog pc beep path */ 1139 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1140 {} 1141 }; 1142 1143 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1144 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1145 1146 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1147 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1148 1149 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1150 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1151 1152 static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1153 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1154 1155 static const struct snd_kcontrol_new stac9205_loopback = 1156 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1157 1158 static const struct snd_kcontrol_new stac927x_loopback = 1159 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1160 1161 static const struct hda_pintbl ref9200_pin_configs[] = { 1162 { 0x08, 0x01c47010 }, 1163 { 0x09, 0x01447010 }, 1164 { 0x0d, 0x0221401f }, 1165 { 0x0e, 0x01114010 }, 1166 { 0x0f, 0x02a19020 }, 1167 { 0x10, 0x01a19021 }, 1168 { 0x11, 0x90100140 }, 1169 { 0x12, 0x01813122 }, 1170 {} 1171 }; 1172 1173 static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1174 { 0x08, 0x400000fe }, 1175 { 0x09, 0x404500f4 }, 1176 { 0x0d, 0x400100f0 }, 1177 { 0x0e, 0x90110010 }, 1178 { 0x0f, 0x400100f1 }, 1179 { 0x10, 0x02a1902e }, 1180 { 0x11, 0x500000f2 }, 1181 { 0x12, 0x500000f3 }, 1182 {} 1183 }; 1184 1185 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1186 { 0x08, 0x400000fe }, 1187 { 0x09, 0x404500f4 }, 1188 { 0x0d, 0x400100f0 }, 1189 { 0x0e, 0x90110010 }, 1190 { 0x0f, 0x400100f1 }, 1191 { 0x10, 0x02a1902e }, 1192 { 0x11, 0x500000f2 }, 1193 { 0x12, 0x500000f3 }, 1194 {} 1195 }; 1196 1197 /* 1198 STAC 9200 pin configs for 1199 102801A8 1200 102801DE 1201 102801E8 1202 */ 1203 static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1204 { 0x08, 0x400001f0 }, 1205 { 0x09, 0x400001f1 }, 1206 { 0x0d, 0x02214030 }, 1207 { 0x0e, 0x01014010 }, 1208 { 0x0f, 0x02a19020 }, 1209 { 0x10, 0x01a19021 }, 1210 { 0x11, 0x90100140 }, 1211 { 0x12, 0x01813122 }, 1212 {} 1213 }; 1214 1215 /* 1216 STAC 9200 pin configs for 1217 102801C0 1218 102801C1 1219 */ 1220 static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1221 { 0x08, 0x400001f0 }, 1222 { 0x09, 0x400001f1 }, 1223 { 0x0d, 0x0221401f }, 1224 { 0x0e, 0x01014010 }, 1225 { 0x0f, 0x01813020 }, 1226 { 0x10, 0x02a19021 }, 1227 { 0x11, 0x90100140 }, 1228 { 0x12, 0x400001f2 }, 1229 {} 1230 }; 1231 1232 /* 1233 STAC 9200 pin configs for 1234 102801C4 (Dell Dimension E310) 1235 102801C5 1236 102801C7 1237 102801D9 1238 102801DA 1239 102801E3 1240 */ 1241 static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1242 { 0x08, 0x400001f0 }, 1243 { 0x09, 0x400001f1 }, 1244 { 0x0d, 0x0221401f }, 1245 { 0x0e, 0x01014010 }, 1246 { 0x0f, 0x01813020 }, 1247 { 0x10, 0x01a19021 }, 1248 { 0x11, 0x90100140 }, 1249 { 0x12, 0x400001f2 }, 1250 {} 1251 }; 1252 1253 1254 /* 1255 STAC 9200-32 pin configs for 1256 102801B5 (Dell Inspiron 630m) 1257 102801D8 (Dell Inspiron 640m) 1258 */ 1259 static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1260 { 0x08, 0x40c003fa }, 1261 { 0x09, 0x03441340 }, 1262 { 0x0d, 0x0321121f }, 1263 { 0x0e, 0x90170310 }, 1264 { 0x0f, 0x408003fb }, 1265 { 0x10, 0x03a11020 }, 1266 { 0x11, 0x401003fc }, 1267 { 0x12, 0x403003fd }, 1268 {} 1269 }; 1270 1271 /* 1272 STAC 9200-32 pin configs for 1273 102801C2 (Dell Latitude D620) 1274 102801C8 1275 102801CC (Dell Latitude D820) 1276 102801D4 1277 102801D6 1278 */ 1279 static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1280 { 0x08, 0x40c003fa }, 1281 { 0x09, 0x0144131f }, 1282 { 0x0d, 0x0321121f }, 1283 { 0x0e, 0x90170310 }, 1284 { 0x0f, 0x90a70321 }, 1285 { 0x10, 0x03a11020 }, 1286 { 0x11, 0x401003fb }, 1287 { 0x12, 0x40f000fc }, 1288 {} 1289 }; 1290 1291 /* 1292 STAC 9200-32 pin configs for 1293 102801CE (Dell XPS M1710) 1294 102801CF (Dell Precision M90) 1295 */ 1296 static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1297 { 0x08, 0x40c003fa }, 1298 { 0x09, 0x01441340 }, 1299 { 0x0d, 0x0421421f }, 1300 { 0x0e, 0x90170310 }, 1301 { 0x0f, 0x408003fb }, 1302 { 0x10, 0x04a1102e }, 1303 { 0x11, 0x90170311 }, 1304 { 0x12, 0x403003fc }, 1305 {} 1306 }; 1307 1308 /* 1309 STAC 9200-32 pin configs for 1310 102801C9 1311 102801CA 1312 102801CB (Dell Latitude 120L) 1313 102801D3 1314 */ 1315 static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1316 { 0x08, 0x40c003fa }, 1317 { 0x09, 0x404003fb }, 1318 { 0x0d, 0x0321121f }, 1319 { 0x0e, 0x90170310 }, 1320 { 0x0f, 0x408003fc }, 1321 { 0x10, 0x03a11020 }, 1322 { 0x11, 0x401003fd }, 1323 { 0x12, 0x403003fe }, 1324 {} 1325 }; 1326 1327 /* 1328 STAC 9200-32 pin configs for 1329 102801BD (Dell Inspiron E1505n) 1330 102801EE 1331 102801EF 1332 */ 1333 static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1334 { 0x08, 0x40c003fa }, 1335 { 0x09, 0x01441340 }, 1336 { 0x0d, 0x0421121f }, 1337 { 0x0e, 0x90170310 }, 1338 { 0x0f, 0x408003fb }, 1339 { 0x10, 0x04a11020 }, 1340 { 0x11, 0x401003fc }, 1341 { 0x12, 0x403003fd }, 1342 {} 1343 }; 1344 1345 /* 1346 STAC 9200-32 pin configs for 1347 102801F5 (Dell Inspiron 1501) 1348 102801F6 1349 */ 1350 static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1351 { 0x08, 0x40c003fa }, 1352 { 0x09, 0x404003fb }, 1353 { 0x0d, 0x0421121f }, 1354 { 0x0e, 0x90170310 }, 1355 { 0x0f, 0x408003fc }, 1356 { 0x10, 0x04a11020 }, 1357 { 0x11, 0x401003fd }, 1358 { 0x12, 0x403003fe }, 1359 {} 1360 }; 1361 1362 /* 1363 STAC 9200-32 1364 102801CD (Dell Inspiron E1705/9400) 1365 */ 1366 static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1367 { 0x08, 0x40c003fa }, 1368 { 0x09, 0x01441340 }, 1369 { 0x0d, 0x0421121f }, 1370 { 0x0e, 0x90170310 }, 1371 { 0x0f, 0x90170310 }, 1372 { 0x10, 0x04a11020 }, 1373 { 0x11, 0x90170310 }, 1374 { 0x12, 0x40f003fc }, 1375 {} 1376 }; 1377 1378 static const struct hda_pintbl oqo9200_pin_configs[] = { 1379 { 0x08, 0x40c000f0 }, 1380 { 0x09, 0x404000f1 }, 1381 { 0x0d, 0x0221121f }, 1382 { 0x0e, 0x02211210 }, 1383 { 0x0f, 0x90170111 }, 1384 { 0x10, 0x90a70120 }, 1385 { 0x11, 0x400000f2 }, 1386 { 0x12, 0x400000f3 }, 1387 {} 1388 }; 1389 1390 1391 static void stac9200_fixup_panasonic(struct hda_codec *codec, 1392 const struct hda_fixup *fix, int action) 1393 { 1394 struct sigmatel_spec *spec = codec->spec; 1395 1396 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1397 spec->gpio_mask = spec->gpio_dir = 0x09; 1398 spec->gpio_data = 0x00; 1399 /* CF-74 has no headphone detection, and the driver should *NOT* 1400 * do detection and HP/speaker toggle because the hardware does it. 1401 */ 1402 spec->gen.suppress_auto_mute = 1; 1403 } 1404 } 1405 1406 1407 static const struct hda_fixup stac9200_fixups[] = { 1408 [STAC_REF] = { 1409 .type = HDA_FIXUP_PINS, 1410 .v.pins = ref9200_pin_configs, 1411 }, 1412 [STAC_9200_OQO] = { 1413 .type = HDA_FIXUP_PINS, 1414 .v.pins = oqo9200_pin_configs, 1415 .chained = true, 1416 .chain_id = STAC_9200_EAPD_INIT, 1417 }, 1418 [STAC_9200_DELL_D21] = { 1419 .type = HDA_FIXUP_PINS, 1420 .v.pins = dell9200_d21_pin_configs, 1421 }, 1422 [STAC_9200_DELL_D22] = { 1423 .type = HDA_FIXUP_PINS, 1424 .v.pins = dell9200_d22_pin_configs, 1425 }, 1426 [STAC_9200_DELL_D23] = { 1427 .type = HDA_FIXUP_PINS, 1428 .v.pins = dell9200_d23_pin_configs, 1429 }, 1430 [STAC_9200_DELL_M21] = { 1431 .type = HDA_FIXUP_PINS, 1432 .v.pins = dell9200_m21_pin_configs, 1433 }, 1434 [STAC_9200_DELL_M22] = { 1435 .type = HDA_FIXUP_PINS, 1436 .v.pins = dell9200_m22_pin_configs, 1437 }, 1438 [STAC_9200_DELL_M23] = { 1439 .type = HDA_FIXUP_PINS, 1440 .v.pins = dell9200_m23_pin_configs, 1441 }, 1442 [STAC_9200_DELL_M24] = { 1443 .type = HDA_FIXUP_PINS, 1444 .v.pins = dell9200_m24_pin_configs, 1445 }, 1446 [STAC_9200_DELL_M25] = { 1447 .type = HDA_FIXUP_PINS, 1448 .v.pins = dell9200_m25_pin_configs, 1449 }, 1450 [STAC_9200_DELL_M26] = { 1451 .type = HDA_FIXUP_PINS, 1452 .v.pins = dell9200_m26_pin_configs, 1453 }, 1454 [STAC_9200_DELL_M27] = { 1455 .type = HDA_FIXUP_PINS, 1456 .v.pins = dell9200_m27_pin_configs, 1457 }, 1458 [STAC_9200_M4] = { 1459 .type = HDA_FIXUP_PINS, 1460 .v.pins = gateway9200_m4_pin_configs, 1461 .chained = true, 1462 .chain_id = STAC_9200_EAPD_INIT, 1463 }, 1464 [STAC_9200_M4_2] = { 1465 .type = HDA_FIXUP_PINS, 1466 .v.pins = gateway9200_m4_2_pin_configs, 1467 .chained = true, 1468 .chain_id = STAC_9200_EAPD_INIT, 1469 }, 1470 [STAC_9200_PANASONIC] = { 1471 .type = HDA_FIXUP_FUNC, 1472 .v.func = stac9200_fixup_panasonic, 1473 }, 1474 [STAC_9200_EAPD_INIT] = { 1475 .type = HDA_FIXUP_VERBS, 1476 .v.verbs = (const struct hda_verb[]) { 1477 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1478 {} 1479 }, 1480 }, 1481 }; 1482 1483 static const struct hda_model_fixup stac9200_models[] = { 1484 { .id = STAC_REF, .name = "ref" }, 1485 { .id = STAC_9200_OQO, .name = "oqo" }, 1486 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1487 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1488 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1489 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1490 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1491 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1492 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1493 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1494 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1495 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1496 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1497 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1498 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1499 {} 1500 }; 1501 1502 static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1503 /* SigmaTel reference board */ 1504 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1505 "DFI LanParty", STAC_REF), 1506 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1507 "DFI LanParty", STAC_REF), 1508 /* Dell laptops have BIOS problem */ 1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1510 "unknown Dell", STAC_9200_DELL_D21), 1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1512 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1514 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1516 "unknown Dell", STAC_9200_DELL_D22), 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1518 "unknown Dell", STAC_9200_DELL_D22), 1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1520 "Dell Latitude D620", STAC_9200_DELL_M22), 1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1522 "unknown Dell", STAC_9200_DELL_D23), 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1524 "unknown Dell", STAC_9200_DELL_D23), 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1526 "unknown Dell", STAC_9200_DELL_M22), 1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1528 "unknown Dell", STAC_9200_DELL_M24), 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1530 "unknown Dell", STAC_9200_DELL_M24), 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1532 "Dell Latitude 120L", STAC_9200_DELL_M24), 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1534 "Dell Latitude D820", STAC_9200_DELL_M22), 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1536 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1538 "Dell XPS M1710", STAC_9200_DELL_M23), 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1540 "Dell Precision M90", STAC_9200_DELL_M23), 1541 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1542 "unknown Dell", STAC_9200_DELL_M22), 1543 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1544 "unknown Dell", STAC_9200_DELL_M22), 1545 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1546 "unknown Dell", STAC_9200_DELL_M22), 1547 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1548 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1549 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1550 "unknown Dell", STAC_9200_DELL_D23), 1551 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1552 "unknown Dell", STAC_9200_DELL_D23), 1553 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1554 "unknown Dell", STAC_9200_DELL_D21), 1555 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1556 "unknown Dell", STAC_9200_DELL_D23), 1557 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1558 "unknown Dell", STAC_9200_DELL_D21), 1559 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1560 "unknown Dell", STAC_9200_DELL_M25), 1561 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1562 "unknown Dell", STAC_9200_DELL_M25), 1563 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1564 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1565 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1566 "unknown Dell", STAC_9200_DELL_M26), 1567 /* Panasonic */ 1568 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1569 /* Gateway machines needs EAPD to be set on resume */ 1570 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1571 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1572 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1573 /* OQO Mobile */ 1574 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1575 {} /* terminator */ 1576 }; 1577 1578 static const struct hda_pintbl ref925x_pin_configs[] = { 1579 { 0x07, 0x40c003f0 }, 1580 { 0x08, 0x424503f2 }, 1581 { 0x0a, 0x01813022 }, 1582 { 0x0b, 0x02a19021 }, 1583 { 0x0c, 0x90a70320 }, 1584 { 0x0d, 0x02214210 }, 1585 { 0x10, 0x01019020 }, 1586 { 0x11, 0x9033032e }, 1587 {} 1588 }; 1589 1590 static const struct hda_pintbl stac925xM1_pin_configs[] = { 1591 { 0x07, 0x40c003f4 }, 1592 { 0x08, 0x424503f2 }, 1593 { 0x0a, 0x400000f3 }, 1594 { 0x0b, 0x02a19020 }, 1595 { 0x0c, 0x40a000f0 }, 1596 { 0x0d, 0x90100210 }, 1597 { 0x10, 0x400003f1 }, 1598 { 0x11, 0x9033032e }, 1599 {} 1600 }; 1601 1602 static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1603 { 0x07, 0x40c003f4 }, 1604 { 0x08, 0x424503f2 }, 1605 { 0x0a, 0x400000f3 }, 1606 { 0x0b, 0x02a19020 }, 1607 { 0x0c, 0x40a000f0 }, 1608 { 0x0d, 0x90100210 }, 1609 { 0x10, 0x400003f1 }, 1610 { 0x11, 0x9033032e }, 1611 {} 1612 }; 1613 1614 static const struct hda_pintbl stac925xM2_pin_configs[] = { 1615 { 0x07, 0x40c003f4 }, 1616 { 0x08, 0x424503f2 }, 1617 { 0x0a, 0x400000f3 }, 1618 { 0x0b, 0x02a19020 }, 1619 { 0x0c, 0x40a000f0 }, 1620 { 0x0d, 0x90100210 }, 1621 { 0x10, 0x400003f1 }, 1622 { 0x11, 0x9033032e }, 1623 {} 1624 }; 1625 1626 static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1627 { 0x07, 0x40c003f4 }, 1628 { 0x08, 0x424503f2 }, 1629 { 0x0a, 0x400000f3 }, 1630 { 0x0b, 0x02a19020 }, 1631 { 0x0c, 0x40a000f0 }, 1632 { 0x0d, 0x90100210 }, 1633 { 0x10, 0x400003f1 }, 1634 { 0x11, 0x9033032e }, 1635 {} 1636 }; 1637 1638 static const struct hda_pintbl stac925xM3_pin_configs[] = { 1639 { 0x07, 0x40c003f4 }, 1640 { 0x08, 0x424503f2 }, 1641 { 0x0a, 0x400000f3 }, 1642 { 0x0b, 0x02a19020 }, 1643 { 0x0c, 0x40a000f0 }, 1644 { 0x0d, 0x90100210 }, 1645 { 0x10, 0x400003f1 }, 1646 { 0x11, 0x503303f3 }, 1647 {} 1648 }; 1649 1650 static const struct hda_pintbl stac925xM5_pin_configs[] = { 1651 { 0x07, 0x40c003f4 }, 1652 { 0x08, 0x424503f2 }, 1653 { 0x0a, 0x400000f3 }, 1654 { 0x0b, 0x02a19020 }, 1655 { 0x0c, 0x40a000f0 }, 1656 { 0x0d, 0x90100210 }, 1657 { 0x10, 0x400003f1 }, 1658 { 0x11, 0x9033032e }, 1659 {} 1660 }; 1661 1662 static const struct hda_pintbl stac925xM6_pin_configs[] = { 1663 { 0x07, 0x40c003f4 }, 1664 { 0x08, 0x424503f2 }, 1665 { 0x0a, 0x400000f3 }, 1666 { 0x0b, 0x02a19020 }, 1667 { 0x0c, 0x40a000f0 }, 1668 { 0x0d, 0x90100210 }, 1669 { 0x10, 0x400003f1 }, 1670 { 0x11, 0x90330320 }, 1671 {} 1672 }; 1673 1674 static const struct hda_fixup stac925x_fixups[] = { 1675 [STAC_REF] = { 1676 .type = HDA_FIXUP_PINS, 1677 .v.pins = ref925x_pin_configs, 1678 }, 1679 [STAC_M1] = { 1680 .type = HDA_FIXUP_PINS, 1681 .v.pins = stac925xM1_pin_configs, 1682 }, 1683 [STAC_M1_2] = { 1684 .type = HDA_FIXUP_PINS, 1685 .v.pins = stac925xM1_2_pin_configs, 1686 }, 1687 [STAC_M2] = { 1688 .type = HDA_FIXUP_PINS, 1689 .v.pins = stac925xM2_pin_configs, 1690 }, 1691 [STAC_M2_2] = { 1692 .type = HDA_FIXUP_PINS, 1693 .v.pins = stac925xM2_2_pin_configs, 1694 }, 1695 [STAC_M3] = { 1696 .type = HDA_FIXUP_PINS, 1697 .v.pins = stac925xM3_pin_configs, 1698 }, 1699 [STAC_M5] = { 1700 .type = HDA_FIXUP_PINS, 1701 .v.pins = stac925xM5_pin_configs, 1702 }, 1703 [STAC_M6] = { 1704 .type = HDA_FIXUP_PINS, 1705 .v.pins = stac925xM6_pin_configs, 1706 }, 1707 }; 1708 1709 static const struct hda_model_fixup stac925x_models[] = { 1710 { .id = STAC_REF, .name = "ref" }, 1711 { .id = STAC_M1, .name = "m1" }, 1712 { .id = STAC_M1_2, .name = "m1-2" }, 1713 { .id = STAC_M2, .name = "m2" }, 1714 { .id = STAC_M2_2, .name = "m2-2" }, 1715 { .id = STAC_M3, .name = "m3" }, 1716 { .id = STAC_M5, .name = "m5" }, 1717 { .id = STAC_M6, .name = "m6" }, 1718 {} 1719 }; 1720 1721 static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1722 /* SigmaTel reference board */ 1723 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1724 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1725 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1726 1727 /* Default table for unknown ID */ 1728 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1729 1730 /* gateway machines are checked via codec ssid */ 1731 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1732 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1733 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1734 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1735 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1736 /* Not sure about the brand name for those */ 1737 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1738 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1739 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1740 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1741 {} /* terminator */ 1742 }; 1743 1744 static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1745 { 0x0a, 0x02214030 }, 1746 { 0x0b, 0x02a19040 }, 1747 { 0x0c, 0x01a19020 }, 1748 { 0x0d, 0x02214030 }, 1749 { 0x0e, 0x0181302e }, 1750 { 0x0f, 0x01014010 }, 1751 { 0x10, 0x01014020 }, 1752 { 0x11, 0x01014030 }, 1753 { 0x12, 0x02319040 }, 1754 { 0x13, 0x90a000f0 }, 1755 { 0x14, 0x90a000f0 }, 1756 { 0x22, 0x01452050 }, 1757 { 0x23, 0x01452050 }, 1758 {} 1759 }; 1760 1761 static const struct hda_pintbl dell_m6_pin_configs[] = { 1762 { 0x0a, 0x0321101f }, 1763 { 0x0b, 0x4f00000f }, 1764 { 0x0c, 0x4f0000f0 }, 1765 { 0x0d, 0x90170110 }, 1766 { 0x0e, 0x03a11020 }, 1767 { 0x0f, 0x0321101f }, 1768 { 0x10, 0x4f0000f0 }, 1769 { 0x11, 0x4f0000f0 }, 1770 { 0x12, 0x4f0000f0 }, 1771 { 0x13, 0x90a60160 }, 1772 { 0x14, 0x4f0000f0 }, 1773 { 0x22, 0x4f0000f0 }, 1774 { 0x23, 0x4f0000f0 }, 1775 {} 1776 }; 1777 1778 static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1779 { 0x0a, 0x0321101f }, 1780 { 0x0b, 0x0321101f }, 1781 { 0x0c, 0x03a11020 }, 1782 { 0x0d, 0x03014020 }, 1783 { 0x0e, 0x90170110 }, 1784 { 0x0f, 0x4f0000f0 }, 1785 { 0x10, 0x4f0000f0 }, 1786 { 0x11, 0x4f0000f0 }, 1787 { 0x12, 0x4f0000f0 }, 1788 { 0x13, 0x90a60160 }, 1789 { 0x14, 0x4f0000f0 }, 1790 { 0x22, 0x4f0000f0 }, 1791 { 0x23, 0x904601b0 }, 1792 {} 1793 }; 1794 1795 static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1796 { 0x0a, 0x02214230 }, 1797 { 0x0b, 0x02A19240 }, 1798 { 0x0c, 0x01013214 }, 1799 { 0x0d, 0x01014210 }, 1800 { 0x0e, 0x01A19250 }, 1801 { 0x0f, 0x01011212 }, 1802 { 0x10, 0x01016211 }, 1803 {} 1804 }; 1805 1806 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = { 1807 { 0x0a, 0x02214030 }, 1808 { 0x0b, 0x02A19010 }, 1809 {} 1810 }; 1811 1812 static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1813 const struct hda_fixup *fix, int action) 1814 { 1815 struct sigmatel_spec *spec = codec->spec; 1816 1817 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1818 return; 1819 1820 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1821 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1822 } 1823 1824 static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1825 { 1826 struct sigmatel_spec *spec = codec->spec; 1827 1828 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1829 spec->eapd_switch = 0; 1830 } 1831 1832 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1833 const struct hda_fixup *fix, int action) 1834 { 1835 struct sigmatel_spec *spec = codec->spec; 1836 1837 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1838 return; 1839 1840 stac92hd73xx_fixup_dell(codec); 1841 snd_hda_add_verbs(codec, dell_eq_core_init); 1842 spec->volknob_init = 1; 1843 } 1844 1845 /* Analog Mics */ 1846 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1847 const struct hda_fixup *fix, int action) 1848 { 1849 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1850 return; 1851 1852 stac92hd73xx_fixup_dell(codec); 1853 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1854 } 1855 1856 /* Digital Mics */ 1857 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1858 const struct hda_fixup *fix, int action) 1859 { 1860 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1861 return; 1862 1863 stac92hd73xx_fixup_dell(codec); 1864 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1865 } 1866 1867 /* Both */ 1868 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1869 const struct hda_fixup *fix, int action) 1870 { 1871 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1872 return; 1873 1874 stac92hd73xx_fixup_dell(codec); 1875 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1876 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1877 } 1878 1879 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1880 const struct hda_fixup *fix, int action) 1881 { 1882 struct sigmatel_spec *spec = codec->spec; 1883 1884 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1885 return; 1886 1887 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1888 spec->eapd_switch = 0; 1889 } 1890 1891 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1892 const struct hda_fixup *fix, int action) 1893 { 1894 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1895 codec->no_jack_detect = 1; 1896 } 1897 1898 static const struct hda_fixup stac92hd73xx_fixups[] = { 1899 [STAC_92HD73XX_REF] = { 1900 .type = HDA_FIXUP_FUNC, 1901 .v.func = stac92hd73xx_fixup_ref, 1902 }, 1903 [STAC_DELL_M6_AMIC] = { 1904 .type = HDA_FIXUP_FUNC, 1905 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1906 }, 1907 [STAC_DELL_M6_DMIC] = { 1908 .type = HDA_FIXUP_FUNC, 1909 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1910 }, 1911 [STAC_DELL_M6_BOTH] = { 1912 .type = HDA_FIXUP_FUNC, 1913 .v.func = stac92hd73xx_fixup_dell_m6_both, 1914 }, 1915 [STAC_DELL_EQ] = { 1916 .type = HDA_FIXUP_FUNC, 1917 .v.func = stac92hd73xx_fixup_dell_eq, 1918 }, 1919 [STAC_ALIENWARE_M17X] = { 1920 .type = HDA_FIXUP_FUNC, 1921 .v.func = stac92hd73xx_fixup_alienware_m17x, 1922 }, 1923 [STAC_92HD73XX_INTEL] = { 1924 .type = HDA_FIXUP_PINS, 1925 .v.pins = intel_dg45id_pin_configs, 1926 }, 1927 [STAC_92HD73XX_NO_JD] = { 1928 .type = HDA_FIXUP_FUNC, 1929 .v.func = stac92hd73xx_fixup_no_jd, 1930 }, 1931 [STAC_92HD89XX_HP_FRONT_JACK] = { 1932 .type = HDA_FIXUP_PINS, 1933 .v.pins = stac92hd89xx_hp_front_jack_pin_configs, 1934 } 1935 }; 1936 1937 static const struct hda_model_fixup stac92hd73xx_models[] = { 1938 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1939 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1940 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1941 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1942 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1943 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1944 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1945 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1946 {} 1947 }; 1948 1949 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1950 /* SigmaTel reference board */ 1951 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1952 "DFI LanParty", STAC_92HD73XX_REF), 1953 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1954 "DFI LanParty", STAC_92HD73XX_REF), 1955 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1956 "Intel DG45ID", STAC_92HD73XX_INTEL), 1957 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1958 "Intel DG45FC", STAC_92HD73XX_INTEL), 1959 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1960 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1961 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1962 "unknown Dell", STAC_DELL_M6_DMIC), 1963 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1964 "unknown Dell", STAC_DELL_M6_BOTH), 1965 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1966 "unknown Dell", STAC_DELL_M6_BOTH), 1967 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1968 "unknown Dell", STAC_DELL_M6_AMIC), 1969 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1970 "unknown Dell", STAC_DELL_M6_AMIC), 1971 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1972 "unknown Dell", STAC_DELL_M6_DMIC), 1973 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1974 "unknown Dell", STAC_DELL_M6_DMIC), 1975 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1976 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1977 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1978 "Dell Studio 17", STAC_DELL_M6_DMIC), 1979 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1980 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1981 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1982 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1984 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1986 "Dell Studio 1558", STAC_DELL_M6_DMIC), 1987 /* codec SSID matching */ 1988 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 1989 "Alienware M17x", STAC_ALIENWARE_M17X), 1990 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1991 "Alienware M17x", STAC_ALIENWARE_M17X), 1992 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 1993 "Alienware M17x R3", STAC_DELL_EQ), 1994 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 1995 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 1996 {} /* terminator */ 1997 }; 1998 1999 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 2000 { 0x0a, 0x02214030 }, 2001 { 0x0b, 0x02211010 }, 2002 { 0x0c, 0x02a19020 }, 2003 { 0x0d, 0x02170130 }, 2004 { 0x0e, 0x01014050 }, 2005 { 0x0f, 0x01819040 }, 2006 { 0x10, 0x01014020 }, 2007 { 0x11, 0x90a3014e }, 2008 { 0x1f, 0x01451160 }, 2009 { 0x20, 0x98560170 }, 2010 {} 2011 }; 2012 2013 static const struct hda_pintbl dell_s14_pin_configs[] = { 2014 { 0x0a, 0x0221403f }, 2015 { 0x0b, 0x0221101f }, 2016 { 0x0c, 0x02a19020 }, 2017 { 0x0d, 0x90170110 }, 2018 { 0x0e, 0x40f000f0 }, 2019 { 0x0f, 0x40f000f0 }, 2020 { 0x10, 0x40f000f0 }, 2021 { 0x11, 0x90a60160 }, 2022 { 0x1f, 0x40f000f0 }, 2023 { 0x20, 0x40f000f0 }, 2024 {} 2025 }; 2026 2027 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 2028 { 0x0a, 0x02a11020 }, 2029 { 0x0b, 0x0221101f }, 2030 { 0x0c, 0x400000f0 }, 2031 { 0x0d, 0x90170110 }, 2032 { 0x0e, 0x400000f1 }, 2033 { 0x0f, 0x400000f2 }, 2034 { 0x10, 0x400000f3 }, 2035 { 0x11, 0x90a60160 }, 2036 { 0x1f, 0x400000f4 }, 2037 { 0x20, 0x400000f5 }, 2038 {} 2039 }; 2040 2041 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2042 { 0x0a, 0x03a12050 }, 2043 { 0x0b, 0x0321201f }, 2044 { 0x0c, 0x40f000f0 }, 2045 { 0x0d, 0x90170110 }, 2046 { 0x0e, 0x40f000f0 }, 2047 { 0x0f, 0x40f000f0 }, 2048 { 0x10, 0x90170110 }, 2049 { 0x11, 0xd5a30140 }, 2050 { 0x1f, 0x40f000f0 }, 2051 { 0x20, 0x40f000f0 }, 2052 {} 2053 }; 2054 2055 static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2056 { 0x0a, 0x01813050 }, 2057 { 0x0b, 0x0421201f }, 2058 { 0x0c, 0x04a1205e }, 2059 { 0x0d, 0x96130310 }, 2060 { 0x0e, 0x96130310 }, 2061 { 0x0f, 0x0101401f }, 2062 { 0x10, 0x1111611f }, 2063 { 0x11, 0xd5a30130 }, 2064 {} 2065 }; 2066 2067 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2068 { 0x0a, 0x40f000f0 }, 2069 { 0x0b, 0x0221101f }, 2070 { 0x0c, 0x02a11020 }, 2071 { 0x0d, 0x92170110 }, 2072 { 0x0e, 0x40f000f0 }, 2073 { 0x0f, 0x92170110 }, 2074 { 0x10, 0x40f000f0 }, 2075 { 0x11, 0xd5a30130 }, 2076 { 0x1f, 0x40f000f0 }, 2077 { 0x20, 0x40f000f0 }, 2078 {} 2079 }; 2080 2081 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2082 const struct hda_fixup *fix, int action) 2083 { 2084 struct sigmatel_spec *spec = codec->spec; 2085 2086 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2087 return; 2088 2089 if (hp_bnb2011_with_dock(codec)) { 2090 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2091 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2092 } 2093 2094 if (find_mute_led_cfg(codec, spec->default_polarity)) 2095 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 2096 spec->gpio_led, 2097 spec->gpio_led_polarity); 2098 2099 /* allow auto-switching of dock line-in */ 2100 spec->gen.line_in_auto_switch = true; 2101 } 2102 2103 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2104 const struct hda_fixup *fix, int action) 2105 { 2106 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2107 return; 2108 2109 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2110 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2111 } 2112 2113 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2114 const struct hda_fixup *fix, int action) 2115 { 2116 struct sigmatel_spec *spec = codec->spec; 2117 2118 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2119 spec->default_polarity = 0; 2120 } 2121 2122 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2123 const struct hda_fixup *fix, int action) 2124 { 2125 struct sigmatel_spec *spec = codec->spec; 2126 2127 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2128 spec->default_polarity = 1; 2129 } 2130 2131 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2132 const struct hda_fixup *fix, int action) 2133 { 2134 struct sigmatel_spec *spec = codec->spec; 2135 2136 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2137 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2138 /* resetting controller clears GPIO, so we need to keep on */ 2139 codec->bus->power_keep_link_on = 1; 2140 } 2141 } 2142 2143 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec, 2144 const struct hda_fixup *fix, int action) 2145 { 2146 struct sigmatel_spec *spec = codec->spec; 2147 2148 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2149 spec->gpio_led = 0x10; /* GPIO4 */ 2150 spec->default_polarity = 0; 2151 } 2152 } 2153 2154 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2155 const struct hda_fixup *fix, int action) 2156 { 2157 struct sigmatel_spec *spec = codec->spec; 2158 2159 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2160 spec->headset_jack = 1; 2161 } 2162 2163 static const struct hda_verb hp_bnb13_eq_verbs[] = { 2164 /* 44.1KHz base */ 2165 { 0x22, 0x7A6, 0x3E }, 2166 { 0x22, 0x7A7, 0x68 }, 2167 { 0x22, 0x7A8, 0x17 }, 2168 { 0x22, 0x7A9, 0x3E }, 2169 { 0x22, 0x7AA, 0x68 }, 2170 { 0x22, 0x7AB, 0x17 }, 2171 { 0x22, 0x7AC, 0x00 }, 2172 { 0x22, 0x7AD, 0x80 }, 2173 { 0x22, 0x7A6, 0x83 }, 2174 { 0x22, 0x7A7, 0x2F }, 2175 { 0x22, 0x7A8, 0xD1 }, 2176 { 0x22, 0x7A9, 0x83 }, 2177 { 0x22, 0x7AA, 0x2F }, 2178 { 0x22, 0x7AB, 0xD1 }, 2179 { 0x22, 0x7AC, 0x01 }, 2180 { 0x22, 0x7AD, 0x80 }, 2181 { 0x22, 0x7A6, 0x3E }, 2182 { 0x22, 0x7A7, 0x68 }, 2183 { 0x22, 0x7A8, 0x17 }, 2184 { 0x22, 0x7A9, 0x3E }, 2185 { 0x22, 0x7AA, 0x68 }, 2186 { 0x22, 0x7AB, 0x17 }, 2187 { 0x22, 0x7AC, 0x02 }, 2188 { 0x22, 0x7AD, 0x80 }, 2189 { 0x22, 0x7A6, 0x7C }, 2190 { 0x22, 0x7A7, 0xC6 }, 2191 { 0x22, 0x7A8, 0x0C }, 2192 { 0x22, 0x7A9, 0x7C }, 2193 { 0x22, 0x7AA, 0xC6 }, 2194 { 0x22, 0x7AB, 0x0C }, 2195 { 0x22, 0x7AC, 0x03 }, 2196 { 0x22, 0x7AD, 0x80 }, 2197 { 0x22, 0x7A6, 0xC3 }, 2198 { 0x22, 0x7A7, 0x25 }, 2199 { 0x22, 0x7A8, 0xAF }, 2200 { 0x22, 0x7A9, 0xC3 }, 2201 { 0x22, 0x7AA, 0x25 }, 2202 { 0x22, 0x7AB, 0xAF }, 2203 { 0x22, 0x7AC, 0x04 }, 2204 { 0x22, 0x7AD, 0x80 }, 2205 { 0x22, 0x7A6, 0x3E }, 2206 { 0x22, 0x7A7, 0x85 }, 2207 { 0x22, 0x7A8, 0x73 }, 2208 { 0x22, 0x7A9, 0x3E }, 2209 { 0x22, 0x7AA, 0x85 }, 2210 { 0x22, 0x7AB, 0x73 }, 2211 { 0x22, 0x7AC, 0x05 }, 2212 { 0x22, 0x7AD, 0x80 }, 2213 { 0x22, 0x7A6, 0x85 }, 2214 { 0x22, 0x7A7, 0x39 }, 2215 { 0x22, 0x7A8, 0xC7 }, 2216 { 0x22, 0x7A9, 0x85 }, 2217 { 0x22, 0x7AA, 0x39 }, 2218 { 0x22, 0x7AB, 0xC7 }, 2219 { 0x22, 0x7AC, 0x06 }, 2220 { 0x22, 0x7AD, 0x80 }, 2221 { 0x22, 0x7A6, 0x3C }, 2222 { 0x22, 0x7A7, 0x90 }, 2223 { 0x22, 0x7A8, 0xB0 }, 2224 { 0x22, 0x7A9, 0x3C }, 2225 { 0x22, 0x7AA, 0x90 }, 2226 { 0x22, 0x7AB, 0xB0 }, 2227 { 0x22, 0x7AC, 0x07 }, 2228 { 0x22, 0x7AD, 0x80 }, 2229 { 0x22, 0x7A6, 0x7A }, 2230 { 0x22, 0x7A7, 0xC6 }, 2231 { 0x22, 0x7A8, 0x39 }, 2232 { 0x22, 0x7A9, 0x7A }, 2233 { 0x22, 0x7AA, 0xC6 }, 2234 { 0x22, 0x7AB, 0x39 }, 2235 { 0x22, 0x7AC, 0x08 }, 2236 { 0x22, 0x7AD, 0x80 }, 2237 { 0x22, 0x7A6, 0xC4 }, 2238 { 0x22, 0x7A7, 0xE9 }, 2239 { 0x22, 0x7A8, 0xDC }, 2240 { 0x22, 0x7A9, 0xC4 }, 2241 { 0x22, 0x7AA, 0xE9 }, 2242 { 0x22, 0x7AB, 0xDC }, 2243 { 0x22, 0x7AC, 0x09 }, 2244 { 0x22, 0x7AD, 0x80 }, 2245 { 0x22, 0x7A6, 0x3D }, 2246 { 0x22, 0x7A7, 0xE1 }, 2247 { 0x22, 0x7A8, 0x0D }, 2248 { 0x22, 0x7A9, 0x3D }, 2249 { 0x22, 0x7AA, 0xE1 }, 2250 { 0x22, 0x7AB, 0x0D }, 2251 { 0x22, 0x7AC, 0x0A }, 2252 { 0x22, 0x7AD, 0x80 }, 2253 { 0x22, 0x7A6, 0x89 }, 2254 { 0x22, 0x7A7, 0xB6 }, 2255 { 0x22, 0x7A8, 0xEB }, 2256 { 0x22, 0x7A9, 0x89 }, 2257 { 0x22, 0x7AA, 0xB6 }, 2258 { 0x22, 0x7AB, 0xEB }, 2259 { 0x22, 0x7AC, 0x0B }, 2260 { 0x22, 0x7AD, 0x80 }, 2261 { 0x22, 0x7A6, 0x39 }, 2262 { 0x22, 0x7A7, 0x9D }, 2263 { 0x22, 0x7A8, 0xFE }, 2264 { 0x22, 0x7A9, 0x39 }, 2265 { 0x22, 0x7AA, 0x9D }, 2266 { 0x22, 0x7AB, 0xFE }, 2267 { 0x22, 0x7AC, 0x0C }, 2268 { 0x22, 0x7AD, 0x80 }, 2269 { 0x22, 0x7A6, 0x76 }, 2270 { 0x22, 0x7A7, 0x49 }, 2271 { 0x22, 0x7A8, 0x15 }, 2272 { 0x22, 0x7A9, 0x76 }, 2273 { 0x22, 0x7AA, 0x49 }, 2274 { 0x22, 0x7AB, 0x15 }, 2275 { 0x22, 0x7AC, 0x0D }, 2276 { 0x22, 0x7AD, 0x80 }, 2277 { 0x22, 0x7A6, 0xC8 }, 2278 { 0x22, 0x7A7, 0x80 }, 2279 { 0x22, 0x7A8, 0xF5 }, 2280 { 0x22, 0x7A9, 0xC8 }, 2281 { 0x22, 0x7AA, 0x80 }, 2282 { 0x22, 0x7AB, 0xF5 }, 2283 { 0x22, 0x7AC, 0x0E }, 2284 { 0x22, 0x7AD, 0x80 }, 2285 { 0x22, 0x7A6, 0x40 }, 2286 { 0x22, 0x7A7, 0x00 }, 2287 { 0x22, 0x7A8, 0x00 }, 2288 { 0x22, 0x7A9, 0x40 }, 2289 { 0x22, 0x7AA, 0x00 }, 2290 { 0x22, 0x7AB, 0x00 }, 2291 { 0x22, 0x7AC, 0x0F }, 2292 { 0x22, 0x7AD, 0x80 }, 2293 { 0x22, 0x7A6, 0x90 }, 2294 { 0x22, 0x7A7, 0x68 }, 2295 { 0x22, 0x7A8, 0xF1 }, 2296 { 0x22, 0x7A9, 0x90 }, 2297 { 0x22, 0x7AA, 0x68 }, 2298 { 0x22, 0x7AB, 0xF1 }, 2299 { 0x22, 0x7AC, 0x10 }, 2300 { 0x22, 0x7AD, 0x80 }, 2301 { 0x22, 0x7A6, 0x34 }, 2302 { 0x22, 0x7A7, 0x47 }, 2303 { 0x22, 0x7A8, 0x6C }, 2304 { 0x22, 0x7A9, 0x34 }, 2305 { 0x22, 0x7AA, 0x47 }, 2306 { 0x22, 0x7AB, 0x6C }, 2307 { 0x22, 0x7AC, 0x11 }, 2308 { 0x22, 0x7AD, 0x80 }, 2309 { 0x22, 0x7A6, 0x6F }, 2310 { 0x22, 0x7A7, 0x97 }, 2311 { 0x22, 0x7A8, 0x0F }, 2312 { 0x22, 0x7A9, 0x6F }, 2313 { 0x22, 0x7AA, 0x97 }, 2314 { 0x22, 0x7AB, 0x0F }, 2315 { 0x22, 0x7AC, 0x12 }, 2316 { 0x22, 0x7AD, 0x80 }, 2317 { 0x22, 0x7A6, 0xCB }, 2318 { 0x22, 0x7A7, 0xB8 }, 2319 { 0x22, 0x7A8, 0x94 }, 2320 { 0x22, 0x7A9, 0xCB }, 2321 { 0x22, 0x7AA, 0xB8 }, 2322 { 0x22, 0x7AB, 0x94 }, 2323 { 0x22, 0x7AC, 0x13 }, 2324 { 0x22, 0x7AD, 0x80 }, 2325 { 0x22, 0x7A6, 0x40 }, 2326 { 0x22, 0x7A7, 0x00 }, 2327 { 0x22, 0x7A8, 0x00 }, 2328 { 0x22, 0x7A9, 0x40 }, 2329 { 0x22, 0x7AA, 0x00 }, 2330 { 0x22, 0x7AB, 0x00 }, 2331 { 0x22, 0x7AC, 0x14 }, 2332 { 0x22, 0x7AD, 0x80 }, 2333 { 0x22, 0x7A6, 0x95 }, 2334 { 0x22, 0x7A7, 0x76 }, 2335 { 0x22, 0x7A8, 0x5B }, 2336 { 0x22, 0x7A9, 0x95 }, 2337 { 0x22, 0x7AA, 0x76 }, 2338 { 0x22, 0x7AB, 0x5B }, 2339 { 0x22, 0x7AC, 0x15 }, 2340 { 0x22, 0x7AD, 0x80 }, 2341 { 0x22, 0x7A6, 0x31 }, 2342 { 0x22, 0x7A7, 0xAC }, 2343 { 0x22, 0x7A8, 0x31 }, 2344 { 0x22, 0x7A9, 0x31 }, 2345 { 0x22, 0x7AA, 0xAC }, 2346 { 0x22, 0x7AB, 0x31 }, 2347 { 0x22, 0x7AC, 0x16 }, 2348 { 0x22, 0x7AD, 0x80 }, 2349 { 0x22, 0x7A6, 0x6A }, 2350 { 0x22, 0x7A7, 0x89 }, 2351 { 0x22, 0x7A8, 0xA5 }, 2352 { 0x22, 0x7A9, 0x6A }, 2353 { 0x22, 0x7AA, 0x89 }, 2354 { 0x22, 0x7AB, 0xA5 }, 2355 { 0x22, 0x7AC, 0x17 }, 2356 { 0x22, 0x7AD, 0x80 }, 2357 { 0x22, 0x7A6, 0xCE }, 2358 { 0x22, 0x7A7, 0x53 }, 2359 { 0x22, 0x7A8, 0xCF }, 2360 { 0x22, 0x7A9, 0xCE }, 2361 { 0x22, 0x7AA, 0x53 }, 2362 { 0x22, 0x7AB, 0xCF }, 2363 { 0x22, 0x7AC, 0x18 }, 2364 { 0x22, 0x7AD, 0x80 }, 2365 { 0x22, 0x7A6, 0x40 }, 2366 { 0x22, 0x7A7, 0x00 }, 2367 { 0x22, 0x7A8, 0x00 }, 2368 { 0x22, 0x7A9, 0x40 }, 2369 { 0x22, 0x7AA, 0x00 }, 2370 { 0x22, 0x7AB, 0x00 }, 2371 { 0x22, 0x7AC, 0x19 }, 2372 { 0x22, 0x7AD, 0x80 }, 2373 /* 48KHz base */ 2374 { 0x22, 0x7A6, 0x3E }, 2375 { 0x22, 0x7A7, 0x88 }, 2376 { 0x22, 0x7A8, 0xDC }, 2377 { 0x22, 0x7A9, 0x3E }, 2378 { 0x22, 0x7AA, 0x88 }, 2379 { 0x22, 0x7AB, 0xDC }, 2380 { 0x22, 0x7AC, 0x1A }, 2381 { 0x22, 0x7AD, 0x80 }, 2382 { 0x22, 0x7A6, 0x82 }, 2383 { 0x22, 0x7A7, 0xEE }, 2384 { 0x22, 0x7A8, 0x46 }, 2385 { 0x22, 0x7A9, 0x82 }, 2386 { 0x22, 0x7AA, 0xEE }, 2387 { 0x22, 0x7AB, 0x46 }, 2388 { 0x22, 0x7AC, 0x1B }, 2389 { 0x22, 0x7AD, 0x80 }, 2390 { 0x22, 0x7A6, 0x3E }, 2391 { 0x22, 0x7A7, 0x88 }, 2392 { 0x22, 0x7A8, 0xDC }, 2393 { 0x22, 0x7A9, 0x3E }, 2394 { 0x22, 0x7AA, 0x88 }, 2395 { 0x22, 0x7AB, 0xDC }, 2396 { 0x22, 0x7AC, 0x1C }, 2397 { 0x22, 0x7AD, 0x80 }, 2398 { 0x22, 0x7A6, 0x7D }, 2399 { 0x22, 0x7A7, 0x09 }, 2400 { 0x22, 0x7A8, 0x28 }, 2401 { 0x22, 0x7A9, 0x7D }, 2402 { 0x22, 0x7AA, 0x09 }, 2403 { 0x22, 0x7AB, 0x28 }, 2404 { 0x22, 0x7AC, 0x1D }, 2405 { 0x22, 0x7AD, 0x80 }, 2406 { 0x22, 0x7A6, 0xC2 }, 2407 { 0x22, 0x7A7, 0xE5 }, 2408 { 0x22, 0x7A8, 0xB4 }, 2409 { 0x22, 0x7A9, 0xC2 }, 2410 { 0x22, 0x7AA, 0xE5 }, 2411 { 0x22, 0x7AB, 0xB4 }, 2412 { 0x22, 0x7AC, 0x1E }, 2413 { 0x22, 0x7AD, 0x80 }, 2414 { 0x22, 0x7A6, 0x3E }, 2415 { 0x22, 0x7A7, 0xA3 }, 2416 { 0x22, 0x7A8, 0x1F }, 2417 { 0x22, 0x7A9, 0x3E }, 2418 { 0x22, 0x7AA, 0xA3 }, 2419 { 0x22, 0x7AB, 0x1F }, 2420 { 0x22, 0x7AC, 0x1F }, 2421 { 0x22, 0x7AD, 0x80 }, 2422 { 0x22, 0x7A6, 0x84 }, 2423 { 0x22, 0x7A7, 0xCA }, 2424 { 0x22, 0x7A8, 0xF1 }, 2425 { 0x22, 0x7A9, 0x84 }, 2426 { 0x22, 0x7AA, 0xCA }, 2427 { 0x22, 0x7AB, 0xF1 }, 2428 { 0x22, 0x7AC, 0x20 }, 2429 { 0x22, 0x7AD, 0x80 }, 2430 { 0x22, 0x7A6, 0x3C }, 2431 { 0x22, 0x7A7, 0xD5 }, 2432 { 0x22, 0x7A8, 0x9C }, 2433 { 0x22, 0x7A9, 0x3C }, 2434 { 0x22, 0x7AA, 0xD5 }, 2435 { 0x22, 0x7AB, 0x9C }, 2436 { 0x22, 0x7AC, 0x21 }, 2437 { 0x22, 0x7AD, 0x80 }, 2438 { 0x22, 0x7A6, 0x7B }, 2439 { 0x22, 0x7A7, 0x35 }, 2440 { 0x22, 0x7A8, 0x0F }, 2441 { 0x22, 0x7A9, 0x7B }, 2442 { 0x22, 0x7AA, 0x35 }, 2443 { 0x22, 0x7AB, 0x0F }, 2444 { 0x22, 0x7AC, 0x22 }, 2445 { 0x22, 0x7AD, 0x80 }, 2446 { 0x22, 0x7A6, 0xC4 }, 2447 { 0x22, 0x7A7, 0x87 }, 2448 { 0x22, 0x7A8, 0x45 }, 2449 { 0x22, 0x7A9, 0xC4 }, 2450 { 0x22, 0x7AA, 0x87 }, 2451 { 0x22, 0x7AB, 0x45 }, 2452 { 0x22, 0x7AC, 0x23 }, 2453 { 0x22, 0x7AD, 0x80 }, 2454 { 0x22, 0x7A6, 0x3E }, 2455 { 0x22, 0x7A7, 0x0A }, 2456 { 0x22, 0x7A8, 0x78 }, 2457 { 0x22, 0x7A9, 0x3E }, 2458 { 0x22, 0x7AA, 0x0A }, 2459 { 0x22, 0x7AB, 0x78 }, 2460 { 0x22, 0x7AC, 0x24 }, 2461 { 0x22, 0x7AD, 0x80 }, 2462 { 0x22, 0x7A6, 0x88 }, 2463 { 0x22, 0x7A7, 0xE2 }, 2464 { 0x22, 0x7A8, 0x05 }, 2465 { 0x22, 0x7A9, 0x88 }, 2466 { 0x22, 0x7AA, 0xE2 }, 2467 { 0x22, 0x7AB, 0x05 }, 2468 { 0x22, 0x7AC, 0x25 }, 2469 { 0x22, 0x7AD, 0x80 }, 2470 { 0x22, 0x7A6, 0x3A }, 2471 { 0x22, 0x7A7, 0x1A }, 2472 { 0x22, 0x7A8, 0xA3 }, 2473 { 0x22, 0x7A9, 0x3A }, 2474 { 0x22, 0x7AA, 0x1A }, 2475 { 0x22, 0x7AB, 0xA3 }, 2476 { 0x22, 0x7AC, 0x26 }, 2477 { 0x22, 0x7AD, 0x80 }, 2478 { 0x22, 0x7A6, 0x77 }, 2479 { 0x22, 0x7A7, 0x1D }, 2480 { 0x22, 0x7A8, 0xFB }, 2481 { 0x22, 0x7A9, 0x77 }, 2482 { 0x22, 0x7AA, 0x1D }, 2483 { 0x22, 0x7AB, 0xFB }, 2484 { 0x22, 0x7AC, 0x27 }, 2485 { 0x22, 0x7AD, 0x80 }, 2486 { 0x22, 0x7A6, 0xC7 }, 2487 { 0x22, 0x7A7, 0xDA }, 2488 { 0x22, 0x7A8, 0xE5 }, 2489 { 0x22, 0x7A9, 0xC7 }, 2490 { 0x22, 0x7AA, 0xDA }, 2491 { 0x22, 0x7AB, 0xE5 }, 2492 { 0x22, 0x7AC, 0x28 }, 2493 { 0x22, 0x7AD, 0x80 }, 2494 { 0x22, 0x7A6, 0x40 }, 2495 { 0x22, 0x7A7, 0x00 }, 2496 { 0x22, 0x7A8, 0x00 }, 2497 { 0x22, 0x7A9, 0x40 }, 2498 { 0x22, 0x7AA, 0x00 }, 2499 { 0x22, 0x7AB, 0x00 }, 2500 { 0x22, 0x7AC, 0x29 }, 2501 { 0x22, 0x7AD, 0x80 }, 2502 { 0x22, 0x7A6, 0x8E }, 2503 { 0x22, 0x7A7, 0xD7 }, 2504 { 0x22, 0x7A8, 0x22 }, 2505 { 0x22, 0x7A9, 0x8E }, 2506 { 0x22, 0x7AA, 0xD7 }, 2507 { 0x22, 0x7AB, 0x22 }, 2508 { 0x22, 0x7AC, 0x2A }, 2509 { 0x22, 0x7AD, 0x80 }, 2510 { 0x22, 0x7A6, 0x35 }, 2511 { 0x22, 0x7A7, 0x26 }, 2512 { 0x22, 0x7A8, 0xC6 }, 2513 { 0x22, 0x7A9, 0x35 }, 2514 { 0x22, 0x7AA, 0x26 }, 2515 { 0x22, 0x7AB, 0xC6 }, 2516 { 0x22, 0x7AC, 0x2B }, 2517 { 0x22, 0x7AD, 0x80 }, 2518 { 0x22, 0x7A6, 0x71 }, 2519 { 0x22, 0x7A7, 0x28 }, 2520 { 0x22, 0x7A8, 0xDE }, 2521 { 0x22, 0x7A9, 0x71 }, 2522 { 0x22, 0x7AA, 0x28 }, 2523 { 0x22, 0x7AB, 0xDE }, 2524 { 0x22, 0x7AC, 0x2C }, 2525 { 0x22, 0x7AD, 0x80 }, 2526 { 0x22, 0x7A6, 0xCA }, 2527 { 0x22, 0x7A7, 0xD9 }, 2528 { 0x22, 0x7A8, 0x3A }, 2529 { 0x22, 0x7A9, 0xCA }, 2530 { 0x22, 0x7AA, 0xD9 }, 2531 { 0x22, 0x7AB, 0x3A }, 2532 { 0x22, 0x7AC, 0x2D }, 2533 { 0x22, 0x7AD, 0x80 }, 2534 { 0x22, 0x7A6, 0x40 }, 2535 { 0x22, 0x7A7, 0x00 }, 2536 { 0x22, 0x7A8, 0x00 }, 2537 { 0x22, 0x7A9, 0x40 }, 2538 { 0x22, 0x7AA, 0x00 }, 2539 { 0x22, 0x7AB, 0x00 }, 2540 { 0x22, 0x7AC, 0x2E }, 2541 { 0x22, 0x7AD, 0x80 }, 2542 { 0x22, 0x7A6, 0x93 }, 2543 { 0x22, 0x7A7, 0x5E }, 2544 { 0x22, 0x7A8, 0xD8 }, 2545 { 0x22, 0x7A9, 0x93 }, 2546 { 0x22, 0x7AA, 0x5E }, 2547 { 0x22, 0x7AB, 0xD8 }, 2548 { 0x22, 0x7AC, 0x2F }, 2549 { 0x22, 0x7AD, 0x80 }, 2550 { 0x22, 0x7A6, 0x32 }, 2551 { 0x22, 0x7A7, 0xB7 }, 2552 { 0x22, 0x7A8, 0xB1 }, 2553 { 0x22, 0x7A9, 0x32 }, 2554 { 0x22, 0x7AA, 0xB7 }, 2555 { 0x22, 0x7AB, 0xB1 }, 2556 { 0x22, 0x7AC, 0x30 }, 2557 { 0x22, 0x7AD, 0x80 }, 2558 { 0x22, 0x7A6, 0x6C }, 2559 { 0x22, 0x7A7, 0xA1 }, 2560 { 0x22, 0x7A8, 0x28 }, 2561 { 0x22, 0x7A9, 0x6C }, 2562 { 0x22, 0x7AA, 0xA1 }, 2563 { 0x22, 0x7AB, 0x28 }, 2564 { 0x22, 0x7AC, 0x31 }, 2565 { 0x22, 0x7AD, 0x80 }, 2566 { 0x22, 0x7A6, 0xCD }, 2567 { 0x22, 0x7A7, 0x48 }, 2568 { 0x22, 0x7A8, 0x4F }, 2569 { 0x22, 0x7A9, 0xCD }, 2570 { 0x22, 0x7AA, 0x48 }, 2571 { 0x22, 0x7AB, 0x4F }, 2572 { 0x22, 0x7AC, 0x32 }, 2573 { 0x22, 0x7AD, 0x80 }, 2574 { 0x22, 0x7A6, 0x40 }, 2575 { 0x22, 0x7A7, 0x00 }, 2576 { 0x22, 0x7A8, 0x00 }, 2577 { 0x22, 0x7A9, 0x40 }, 2578 { 0x22, 0x7AA, 0x00 }, 2579 { 0x22, 0x7AB, 0x00 }, 2580 { 0x22, 0x7AC, 0x33 }, 2581 { 0x22, 0x7AD, 0x80 }, 2582 /* common */ 2583 { 0x22, 0x782, 0xC1 }, 2584 { 0x22, 0x771, 0x2C }, 2585 { 0x22, 0x772, 0x2C }, 2586 { 0x22, 0x788, 0x04 }, 2587 { 0x01, 0x7B0, 0x08 }, 2588 {} 2589 }; 2590 2591 static const struct hda_fixup stac92hd83xxx_fixups[] = { 2592 [STAC_92HD83XXX_REF] = { 2593 .type = HDA_FIXUP_PINS, 2594 .v.pins = ref92hd83xxx_pin_configs, 2595 }, 2596 [STAC_92HD83XXX_PWR_REF] = { 2597 .type = HDA_FIXUP_PINS, 2598 .v.pins = ref92hd83xxx_pin_configs, 2599 }, 2600 [STAC_DELL_S14] = { 2601 .type = HDA_FIXUP_PINS, 2602 .v.pins = dell_s14_pin_configs, 2603 }, 2604 [STAC_DELL_VOSTRO_3500] = { 2605 .type = HDA_FIXUP_PINS, 2606 .v.pins = dell_vostro_3500_pin_configs, 2607 }, 2608 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2609 .type = HDA_FIXUP_PINS, 2610 .v.pins = hp_cNB11_intquad_pin_configs, 2611 .chained = true, 2612 .chain_id = STAC_92HD83XXX_HP, 2613 }, 2614 [STAC_92HD83XXX_HP] = { 2615 .type = HDA_FIXUP_FUNC, 2616 .v.func = stac92hd83xxx_fixup_hp, 2617 }, 2618 [STAC_HP_DV7_4000] = { 2619 .type = HDA_FIXUP_PINS, 2620 .v.pins = hp_dv7_4000_pin_configs, 2621 .chained = true, 2622 .chain_id = STAC_92HD83XXX_HP, 2623 }, 2624 [STAC_HP_ZEPHYR] = { 2625 .type = HDA_FIXUP_FUNC, 2626 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2627 .chained = true, 2628 .chain_id = STAC_92HD83XXX_HP, 2629 }, 2630 [STAC_92HD83XXX_HP_LED] = { 2631 .type = HDA_FIXUP_FUNC, 2632 .v.func = stac92hd83xxx_fixup_hp_led, 2633 .chained = true, 2634 .chain_id = STAC_92HD83XXX_HP, 2635 }, 2636 [STAC_92HD83XXX_HP_INV_LED] = { 2637 .type = HDA_FIXUP_FUNC, 2638 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2639 .chained = true, 2640 .chain_id = STAC_92HD83XXX_HP, 2641 }, 2642 [STAC_92HD83XXX_HP_MIC_LED] = { 2643 .type = HDA_FIXUP_FUNC, 2644 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2645 .chained = true, 2646 .chain_id = STAC_92HD83XXX_HP, 2647 }, 2648 [STAC_HP_LED_GPIO10] = { 2649 .type = HDA_FIXUP_FUNC, 2650 .v.func = stac92hd83xxx_fixup_hp_led_gpio10, 2651 .chained = true, 2652 .chain_id = STAC_92HD83XXX_HP, 2653 }, 2654 [STAC_92HD83XXX_HEADSET_JACK] = { 2655 .type = HDA_FIXUP_FUNC, 2656 .v.func = stac92hd83xxx_fixup_headset_jack, 2657 }, 2658 [STAC_HP_ENVY_BASS] = { 2659 .type = HDA_FIXUP_PINS, 2660 .v.pins = (const struct hda_pintbl[]) { 2661 { 0x0f, 0x90170111 }, 2662 {} 2663 }, 2664 }, 2665 [STAC_HP_BNB13_EQ] = { 2666 .type = HDA_FIXUP_VERBS, 2667 .v.verbs = hp_bnb13_eq_verbs, 2668 .chained = true, 2669 .chain_id = STAC_92HD83XXX_HP_MIC_LED, 2670 }, 2671 }; 2672 2673 static const struct hda_model_fixup stac92hd83xxx_models[] = { 2674 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2675 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2676 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2677 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2678 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2679 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2680 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2681 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2682 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2683 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2684 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2685 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2686 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, 2687 {} 2688 }; 2689 2690 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2691 /* SigmaTel reference board */ 2692 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2693 "DFI LanParty", STAC_92HD83XXX_REF), 2694 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2695 "DFI LanParty", STAC_92HD83XXX_REF), 2696 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2697 "unknown Dell", STAC_DELL_S14), 2698 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2699 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2700 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2701 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2702 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2703 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2704 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2705 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2706 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2707 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2708 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2709 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2710 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2711 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2712 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2713 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2714 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2715 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2716 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2717 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2718 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2719 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2720 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2721 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2722 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2723 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2724 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2725 "HP Pavilion dv7", STAC_HP_DV7_4000), 2726 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2727 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2728 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2729 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2730 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2731 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2732 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899, 2733 "HP Folio 13", STAC_HP_LED_GPIO10), 2734 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2735 "HP Folio", STAC_HP_BNB13_EQ), 2736 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, 2737 "HP bNB13", STAC_HP_BNB13_EQ), 2738 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, 2739 "HP bNB13", STAC_HP_BNB13_EQ), 2740 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, 2741 "HP bNB13", STAC_HP_BNB13_EQ), 2742 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, 2743 "HP bNB13", STAC_HP_BNB13_EQ), 2744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, 2745 "HP bNB13", STAC_HP_BNB13_EQ), 2746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, 2747 "HP bNB13", STAC_HP_BNB13_EQ), 2748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, 2749 "HP bNB13", STAC_HP_BNB13_EQ), 2750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, 2751 "HP bNB13", STAC_HP_BNB13_EQ), 2752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, 2753 "HP bNB13", STAC_HP_BNB13_EQ), 2754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, 2755 "HP bNB13", STAC_HP_BNB13_EQ), 2756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, 2757 "HP bNB13", STAC_HP_BNB13_EQ), 2758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, 2759 "HP bNB13", STAC_HP_BNB13_EQ), 2760 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, 2761 "HP bNB13", STAC_HP_BNB13_EQ), 2762 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, 2763 "HP bNB13", STAC_HP_BNB13_EQ), 2764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, 2765 "HP bNB13", STAC_HP_BNB13_EQ), 2766 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, 2767 "HP bNB13", STAC_HP_BNB13_EQ), 2768 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, 2769 "HP bNB13", STAC_HP_BNB13_EQ), 2770 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, 2771 "HP bNB13", STAC_HP_BNB13_EQ), 2772 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, 2773 "HP bNB13", STAC_HP_BNB13_EQ), 2774 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, 2775 "HP bNB13", STAC_HP_BNB13_EQ), 2776 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, 2777 "HP bNB13", STAC_HP_BNB13_EQ), 2778 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, 2779 "HP bNB13", STAC_HP_BNB13_EQ), 2780 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, 2781 "HP bNB13", STAC_HP_BNB13_EQ), 2782 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, 2783 "HP bNB13", STAC_HP_BNB13_EQ), 2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, 2785 "HP bNB13", STAC_HP_BNB13_EQ), 2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, 2787 "HP bNB13", STAC_HP_BNB13_EQ), 2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, 2789 "HP bNB13", STAC_HP_BNB13_EQ), 2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, 2791 "HP bNB13", STAC_HP_BNB13_EQ), 2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, 2793 "HP bNB13", STAC_HP_BNB13_EQ), 2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, 2795 "HP bNB13", STAC_HP_BNB13_EQ), 2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, 2797 "HP bNB13", STAC_HP_BNB13_EQ), 2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, 2799 "HP bNB13", STAC_HP_BNB13_EQ), 2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, 2801 "HP bNB13", STAC_HP_BNB13_EQ), 2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, 2803 "HP bNB13", STAC_HP_BNB13_EQ), 2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, 2805 "HP bNB13", STAC_HP_BNB13_EQ), 2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, 2807 "HP bNB13", STAC_HP_BNB13_EQ), 2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, 2809 "HP bNB13", STAC_HP_BNB13_EQ), 2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, 2811 "HP bNB13", STAC_HP_BNB13_EQ), 2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, 2813 "HP bNB13", STAC_HP_BNB13_EQ), 2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, 2815 "HP bNB13", STAC_HP_BNB13_EQ), 2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, 2817 "HP bNB13", STAC_HP_BNB13_EQ), 2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, 2819 "HP bNB13", STAC_HP_BNB13_EQ), 2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, 2821 "HP bNB13", STAC_HP_BNB13_EQ), 2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, 2823 "HP bNB13", STAC_HP_BNB13_EQ), 2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, 2825 "HP bNB13", STAC_HP_BNB13_EQ), 2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, 2827 "HP bNB13", STAC_HP_BNB13_EQ), 2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, 2829 "HP bNB13", STAC_HP_BNB13_EQ), 2830 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2831 "HP", STAC_92HD83XXX_HP_MIC_LED), 2832 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2833 "HP", STAC_92HD83XXX_HP_MIC_LED), 2834 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2835 "HP", STAC_92HD83XXX_HP_MIC_LED), 2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2837 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2839 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2841 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2843 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2845 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2847 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2849 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2851 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2853 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2855 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2857 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2858 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2859 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2860 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2861 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2862 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2863 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2865 "HP", STAC_HP_ZEPHYR), 2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2867 "HP Mini", STAC_92HD83XXX_HP_LED), 2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2869 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2871 "HP Mini", STAC_92HD83XXX_HP_LED), 2872 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2873 {} /* terminator */ 2874 }; 2875 2876 /* HP dv7 bass switch - GPIO5 */ 2877 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2878 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2879 struct snd_ctl_elem_value *ucontrol) 2880 { 2881 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2882 struct sigmatel_spec *spec = codec->spec; 2883 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2884 return 0; 2885 } 2886 2887 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2888 struct snd_ctl_elem_value *ucontrol) 2889 { 2890 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2891 struct sigmatel_spec *spec = codec->spec; 2892 unsigned int gpio_data; 2893 2894 gpio_data = (spec->gpio_data & ~0x20) | 2895 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2896 if (gpio_data == spec->gpio_data) 2897 return 0; 2898 spec->gpio_data = gpio_data; 2899 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2900 return 1; 2901 } 2902 2903 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2904 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2905 .info = stac_hp_bass_gpio_info, 2906 .get = stac_hp_bass_gpio_get, 2907 .put = stac_hp_bass_gpio_put, 2908 }; 2909 2910 static int stac_add_hp_bass_switch(struct hda_codec *codec) 2911 { 2912 struct sigmatel_spec *spec = codec->spec; 2913 2914 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2915 &stac_hp_bass_sw_ctrl)) 2916 return -ENOMEM; 2917 2918 spec->gpio_mask |= 0x20; 2919 spec->gpio_dir |= 0x20; 2920 spec->gpio_data |= 0x20; 2921 return 0; 2922 } 2923 2924 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 2925 { 0x0a, 0x02214030 }, 2926 { 0x0b, 0x02a19040 }, 2927 { 0x0c, 0x01a19020 }, 2928 { 0x0d, 0x01014010 }, 2929 { 0x0e, 0x0181302e }, 2930 { 0x0f, 0x01014010 }, 2931 { 0x14, 0x01019020 }, 2932 { 0x18, 0x90a000f0 }, 2933 { 0x19, 0x90a000f0 }, 2934 { 0x1e, 0x01452050 }, 2935 { 0x1f, 0x01452050 }, 2936 {} 2937 }; 2938 2939 static const struct hda_pintbl dell_m4_1_pin_configs[] = { 2940 { 0x0a, 0x0421101f }, 2941 { 0x0b, 0x04a11221 }, 2942 { 0x0c, 0x40f000f0 }, 2943 { 0x0d, 0x90170110 }, 2944 { 0x0e, 0x23a1902e }, 2945 { 0x0f, 0x23014250 }, 2946 { 0x14, 0x40f000f0 }, 2947 { 0x18, 0x90a000f0 }, 2948 { 0x19, 0x40f000f0 }, 2949 { 0x1e, 0x4f0000f0 }, 2950 { 0x1f, 0x4f0000f0 }, 2951 {} 2952 }; 2953 2954 static const struct hda_pintbl dell_m4_2_pin_configs[] = { 2955 { 0x0a, 0x0421101f }, 2956 { 0x0b, 0x04a11221 }, 2957 { 0x0c, 0x90a70330 }, 2958 { 0x0d, 0x90170110 }, 2959 { 0x0e, 0x23a1902e }, 2960 { 0x0f, 0x23014250 }, 2961 { 0x14, 0x40f000f0 }, 2962 { 0x18, 0x40f000f0 }, 2963 { 0x19, 0x40f000f0 }, 2964 { 0x1e, 0x044413b0 }, 2965 { 0x1f, 0x044413b0 }, 2966 {} 2967 }; 2968 2969 static const struct hda_pintbl dell_m4_3_pin_configs[] = { 2970 { 0x0a, 0x0421101f }, 2971 { 0x0b, 0x04a11221 }, 2972 { 0x0c, 0x90a70330 }, 2973 { 0x0d, 0x90170110 }, 2974 { 0x0e, 0x40f000f0 }, 2975 { 0x0f, 0x40f000f0 }, 2976 { 0x14, 0x40f000f0 }, 2977 { 0x18, 0x90a000f0 }, 2978 { 0x19, 0x40f000f0 }, 2979 { 0x1e, 0x044413b0 }, 2980 { 0x1f, 0x044413b0 }, 2981 {} 2982 }; 2983 2984 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 2985 const struct hda_fixup *fix, int action) 2986 { 2987 struct sigmatel_spec *spec = codec->spec; 2988 2989 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2990 return; 2991 2992 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 2993 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 2994 } 2995 2996 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 2997 const struct hda_fixup *fix, int action) 2998 { 2999 struct sigmatel_spec *spec = codec->spec; 3000 struct hda_jack_tbl *jack; 3001 3002 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3003 return; 3004 3005 /* Enable VREF power saving on GPIO1 detect */ 3006 snd_hda_codec_write_cache(codec, codec->afg, 0, 3007 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 3008 snd_hda_jack_detect_enable_callback(codec, codec->afg, 3009 STAC_VREF_EVENT, 3010 stac_vref_event); 3011 jack = snd_hda_jack_tbl_get(codec, codec->afg); 3012 if (jack) 3013 jack->private_data = 0x02; 3014 3015 spec->gpio_mask |= 0x02; 3016 3017 /* enable internal microphone */ 3018 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 3019 } 3020 3021 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 3022 const struct hda_fixup *fix, int action) 3023 { 3024 struct sigmatel_spec *spec = codec->spec; 3025 3026 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3027 return; 3028 spec->gpio_led = 0x01; 3029 } 3030 3031 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 3032 const struct hda_fixup *fix, int action) 3033 { 3034 unsigned int cap; 3035 3036 switch (action) { 3037 case HDA_FIXUP_ACT_PRE_PROBE: 3038 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 3039 break; 3040 3041 case HDA_FIXUP_ACT_PROBE: 3042 /* enable bass on HP dv7 */ 3043 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 3044 cap &= AC_GPIO_IO_COUNT; 3045 if (cap >= 6) 3046 stac_add_hp_bass_switch(codec); 3047 break; 3048 } 3049 } 3050 3051 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 3052 const struct hda_fixup *fix, int action) 3053 { 3054 struct sigmatel_spec *spec = codec->spec; 3055 3056 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3057 return; 3058 spec->gpio_led = 0x08; 3059 } 3060 3061 3062 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 3063 const struct hda_fixup *fix, int action) 3064 { 3065 struct sigmatel_spec *spec = codec->spec; 3066 3067 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3068 return; 3069 3070 if (hp_blike_system(codec->subsystem_id)) { 3071 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f); 3072 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 3073 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER || 3074 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) { 3075 /* It was changed in the BIOS to just satisfy MS DTM. 3076 * Lets turn it back into slaved HP 3077 */ 3078 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) 3079 | (AC_JACK_HP_OUT << 3080 AC_DEFCFG_DEVICE_SHIFT); 3081 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC 3082 | AC_DEFCFG_SEQUENCE))) 3083 | 0x1f; 3084 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg); 3085 } 3086 } 3087 3088 if (find_mute_led_cfg(codec, 1)) 3089 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 3090 spec->gpio_led, 3091 spec->gpio_led_polarity); 3092 3093 } 3094 3095 static const struct hda_fixup stac92hd71bxx_fixups[] = { 3096 [STAC_92HD71BXX_REF] = { 3097 .type = HDA_FIXUP_FUNC, 3098 .v.func = stac92hd71bxx_fixup_ref, 3099 }, 3100 [STAC_DELL_M4_1] = { 3101 .type = HDA_FIXUP_PINS, 3102 .v.pins = dell_m4_1_pin_configs, 3103 }, 3104 [STAC_DELL_M4_2] = { 3105 .type = HDA_FIXUP_PINS, 3106 .v.pins = dell_m4_2_pin_configs, 3107 }, 3108 [STAC_DELL_M4_3] = { 3109 .type = HDA_FIXUP_PINS, 3110 .v.pins = dell_m4_3_pin_configs, 3111 }, 3112 [STAC_HP_M4] = { 3113 .type = HDA_FIXUP_FUNC, 3114 .v.func = stac92hd71bxx_fixup_hp_m4, 3115 .chained = true, 3116 .chain_id = STAC_92HD71BXX_HP, 3117 }, 3118 [STAC_HP_DV4] = { 3119 .type = HDA_FIXUP_FUNC, 3120 .v.func = stac92hd71bxx_fixup_hp_dv4, 3121 .chained = true, 3122 .chain_id = STAC_HP_DV5, 3123 }, 3124 [STAC_HP_DV5] = { 3125 .type = HDA_FIXUP_FUNC, 3126 .v.func = stac92hd71bxx_fixup_hp_dv5, 3127 .chained = true, 3128 .chain_id = STAC_92HD71BXX_HP, 3129 }, 3130 [STAC_HP_HDX] = { 3131 .type = HDA_FIXUP_FUNC, 3132 .v.func = stac92hd71bxx_fixup_hp_hdx, 3133 .chained = true, 3134 .chain_id = STAC_92HD71BXX_HP, 3135 }, 3136 [STAC_92HD71BXX_HP] = { 3137 .type = HDA_FIXUP_FUNC, 3138 .v.func = stac92hd71bxx_fixup_hp, 3139 }, 3140 }; 3141 3142 static const struct hda_model_fixup stac92hd71bxx_models[] = { 3143 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 3144 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 3145 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 3146 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 3147 { .id = STAC_HP_M4, .name = "hp-m4" }, 3148 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 3149 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 3150 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 3151 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 3152 {} 3153 }; 3154 3155 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 3156 /* SigmaTel reference board */ 3157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3158 "DFI LanParty", STAC_92HD71BXX_REF), 3159 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3160 "DFI LanParty", STAC_92HD71BXX_REF), 3161 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 3162 "HP", STAC_HP_DV5), 3163 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 3164 "HP", STAC_HP_DV5), 3165 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 3166 "HP dv4-7", STAC_HP_DV4), 3167 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 3168 "HP dv4-7", STAC_HP_DV5), 3169 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 3170 "HP HDX", STAC_HP_HDX), /* HDX18 */ 3171 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 3172 "HP mini 1000", STAC_HP_M4), 3173 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 3174 "HP HDX", STAC_HP_HDX), /* HDX16 */ 3175 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 3176 "HP dv6", STAC_HP_DV5), 3177 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 3178 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 3179 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 3180 "HP DV6", STAC_HP_DV5), 3181 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 3182 "HP", STAC_HP_DV5), 3183 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 3184 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 3185 "unknown Dell", STAC_DELL_M4_1), 3186 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 3187 "unknown Dell", STAC_DELL_M4_1), 3188 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 3189 "unknown Dell", STAC_DELL_M4_1), 3190 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 3191 "unknown Dell", STAC_DELL_M4_1), 3192 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 3193 "unknown Dell", STAC_DELL_M4_1), 3194 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 3195 "unknown Dell", STAC_DELL_M4_1), 3196 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 3197 "unknown Dell", STAC_DELL_M4_1), 3198 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 3199 "unknown Dell", STAC_DELL_M4_2), 3200 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 3201 "unknown Dell", STAC_DELL_M4_2), 3202 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 3203 "unknown Dell", STAC_DELL_M4_2), 3204 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 3205 "unknown Dell", STAC_DELL_M4_2), 3206 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 3207 "unknown Dell", STAC_DELL_M4_3), 3208 {} /* terminator */ 3209 }; 3210 3211 static const struct hda_pintbl ref922x_pin_configs[] = { 3212 { 0x0a, 0x01014010 }, 3213 { 0x0b, 0x01016011 }, 3214 { 0x0c, 0x01012012 }, 3215 { 0x0d, 0x0221401f }, 3216 { 0x0e, 0x01813122 }, 3217 { 0x0f, 0x01011014 }, 3218 { 0x10, 0x01441030 }, 3219 { 0x11, 0x01c41030 }, 3220 { 0x15, 0x40000100 }, 3221 { 0x1b, 0x40000100 }, 3222 {} 3223 }; 3224 3225 /* 3226 STAC 922X pin configs for 3227 102801A7 3228 102801AB 3229 102801A9 3230 102801D1 3231 102801D2 3232 */ 3233 static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 3234 { 0x0a, 0x02214030 }, 3235 { 0x0b, 0x01a19021 }, 3236 { 0x0c, 0x01111012 }, 3237 { 0x0d, 0x01114010 }, 3238 { 0x0e, 0x02a19020 }, 3239 { 0x0f, 0x01117011 }, 3240 { 0x10, 0x400001f0 }, 3241 { 0x11, 0x400001f1 }, 3242 { 0x15, 0x01813122 }, 3243 { 0x1b, 0x400001f2 }, 3244 {} 3245 }; 3246 3247 /* 3248 STAC 922X pin configs for 3249 102801AC 3250 102801D0 3251 */ 3252 static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 3253 { 0x0a, 0x02214030 }, 3254 { 0x0b, 0x01a19021 }, 3255 { 0x0c, 0x01111012 }, 3256 { 0x0d, 0x01114010 }, 3257 { 0x0e, 0x02a19020 }, 3258 { 0x0f, 0x01117011 }, 3259 { 0x10, 0x01451140 }, 3260 { 0x11, 0x400001f0 }, 3261 { 0x15, 0x01813122 }, 3262 { 0x1b, 0x400001f1 }, 3263 {} 3264 }; 3265 3266 /* 3267 STAC 922X pin configs for 3268 102801BF 3269 */ 3270 static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 3271 { 0x0a, 0x0321101f }, 3272 { 0x0b, 0x01112024 }, 3273 { 0x0c, 0x01111222 }, 3274 { 0x0d, 0x91174220 }, 3275 { 0x0e, 0x03a11050 }, 3276 { 0x0f, 0x01116221 }, 3277 { 0x10, 0x90a70330 }, 3278 { 0x11, 0x01452340 }, 3279 { 0x15, 0x40C003f1 }, 3280 { 0x1b, 0x405003f0 }, 3281 {} 3282 }; 3283 3284 /* 3285 STAC 9221 A1 pin configs for 3286 102801D7 (Dell XPS M1210) 3287 */ 3288 static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 3289 { 0x0a, 0x02211211 }, 3290 { 0x0b, 0x408103ff }, 3291 { 0x0c, 0x02a1123e }, 3292 { 0x0d, 0x90100310 }, 3293 { 0x0e, 0x408003f1 }, 3294 { 0x0f, 0x0221121f }, 3295 { 0x10, 0x03451340 }, 3296 { 0x11, 0x40c003f2 }, 3297 { 0x15, 0x508003f3 }, 3298 { 0x1b, 0x405003f4 }, 3299 {} 3300 }; 3301 3302 static const struct hda_pintbl d945gtp3_pin_configs[] = { 3303 { 0x0a, 0x0221401f }, 3304 { 0x0b, 0x01a19022 }, 3305 { 0x0c, 0x01813021 }, 3306 { 0x0d, 0x01014010 }, 3307 { 0x0e, 0x40000100 }, 3308 { 0x0f, 0x40000100 }, 3309 { 0x10, 0x40000100 }, 3310 { 0x11, 0x40000100 }, 3311 { 0x15, 0x02a19120 }, 3312 { 0x1b, 0x40000100 }, 3313 {} 3314 }; 3315 3316 static const struct hda_pintbl d945gtp5_pin_configs[] = { 3317 { 0x0a, 0x0221401f }, 3318 { 0x0b, 0x01011012 }, 3319 { 0x0c, 0x01813024 }, 3320 { 0x0d, 0x01014010 }, 3321 { 0x0e, 0x01a19021 }, 3322 { 0x0f, 0x01016011 }, 3323 { 0x10, 0x01452130 }, 3324 { 0x11, 0x40000100 }, 3325 { 0x15, 0x02a19320 }, 3326 { 0x1b, 0x40000100 }, 3327 {} 3328 }; 3329 3330 static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 3331 { 0x0a, 0x0121e21f }, 3332 { 0x0b, 0x400000ff }, 3333 { 0x0c, 0x9017e110 }, 3334 { 0x0d, 0x400000fd }, 3335 { 0x0e, 0x400000fe }, 3336 { 0x0f, 0x0181e020 }, 3337 { 0x10, 0x1145e030 }, 3338 { 0x11, 0x11c5e240 }, 3339 { 0x15, 0x400000fc }, 3340 { 0x1b, 0x400000fb }, 3341 {} 3342 }; 3343 3344 static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 3345 { 0x0a, 0x0121e21f }, 3346 { 0x0b, 0x90a7012e }, 3347 { 0x0c, 0x9017e110 }, 3348 { 0x0d, 0x400000fd }, 3349 { 0x0e, 0x400000fe }, 3350 { 0x0f, 0x0181e020 }, 3351 { 0x10, 0x1145e230 }, 3352 { 0x11, 0x500000fa }, 3353 { 0x15, 0x400000fc }, 3354 { 0x1b, 0x400000fb }, 3355 {} 3356 }; 3357 3358 static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 3359 { 0x0a, 0x0121e21f }, 3360 { 0x0b, 0x90a7012e }, 3361 { 0x0c, 0x9017e110 }, 3362 { 0x0d, 0x400000fd }, 3363 { 0x0e, 0x400000fe }, 3364 { 0x0f, 0x0181e020 }, 3365 { 0x10, 0x1145e230 }, 3366 { 0x11, 0x11c5e240 }, 3367 { 0x15, 0x400000fc }, 3368 { 0x1b, 0x400000fb }, 3369 {} 3370 }; 3371 3372 static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 3373 { 0x0a, 0x0321e21f }, 3374 { 0x0b, 0x03a1e02e }, 3375 { 0x0c, 0x9017e110 }, 3376 { 0x0d, 0x9017e11f }, 3377 { 0x0e, 0x400000fe }, 3378 { 0x0f, 0x0381e020 }, 3379 { 0x10, 0x1345e230 }, 3380 { 0x11, 0x13c5e240 }, 3381 { 0x15, 0x400000fc }, 3382 { 0x1b, 0x400000fb }, 3383 {} 3384 }; 3385 3386 static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 3387 { 0x0a, 0x0321e21f }, 3388 { 0x0b, 0x03a1e02e }, 3389 { 0x0c, 0x9017e110 }, 3390 { 0x0d, 0x9017e11f }, 3391 { 0x0e, 0x400000fe }, 3392 { 0x0f, 0x0381e020 }, 3393 { 0x10, 0x1345e230 }, 3394 { 0x11, 0x13c5e240 }, 3395 { 0x15, 0x400000fc }, 3396 { 0x1b, 0x400000fb }, 3397 {} 3398 }; 3399 3400 static const struct hda_pintbl ecs202_pin_configs[] = { 3401 { 0x0a, 0x0221401f }, 3402 { 0x0b, 0x02a19020 }, 3403 { 0x0c, 0x01a19020 }, 3404 { 0x0d, 0x01114010 }, 3405 { 0x0e, 0x408000f0 }, 3406 { 0x0f, 0x01813022 }, 3407 { 0x10, 0x074510a0 }, 3408 { 0x11, 0x40c400f1 }, 3409 { 0x15, 0x9037012e }, 3410 { 0x1b, 0x40e000f2 }, 3411 {} 3412 }; 3413 3414 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 3415 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 3416 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 3417 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 3418 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 3419 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 3420 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 3421 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 3422 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 3423 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 3424 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 3425 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 3426 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 3427 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 3428 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 3429 {} 3430 }; 3431 3432 static const struct hda_fixup stac922x_fixups[]; 3433 3434 /* remap the fixup from codec SSID and apply it */ 3435 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 3436 const struct hda_fixup *fix, 3437 int action) 3438 { 3439 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3440 return; 3441 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 3442 stac922x_fixups); 3443 if (codec->fixup_id != STAC_INTEL_MAC_AUTO) 3444 snd_hda_apply_fixup(codec, action); 3445 } 3446 3447 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 3448 const struct hda_fixup *fix, 3449 int action) 3450 { 3451 struct sigmatel_spec *spec = codec->spec; 3452 3453 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3454 spec->gpio_mask = spec->gpio_dir = 0x03; 3455 spec->gpio_data = 0x03; 3456 } 3457 } 3458 3459 static const struct hda_fixup stac922x_fixups[] = { 3460 [STAC_D945_REF] = { 3461 .type = HDA_FIXUP_PINS, 3462 .v.pins = ref922x_pin_configs, 3463 }, 3464 [STAC_D945GTP3] = { 3465 .type = HDA_FIXUP_PINS, 3466 .v.pins = d945gtp3_pin_configs, 3467 }, 3468 [STAC_D945GTP5] = { 3469 .type = HDA_FIXUP_PINS, 3470 .v.pins = d945gtp5_pin_configs, 3471 }, 3472 [STAC_INTEL_MAC_AUTO] = { 3473 .type = HDA_FIXUP_FUNC, 3474 .v.func = stac922x_fixup_intel_mac_auto, 3475 }, 3476 [STAC_INTEL_MAC_V1] = { 3477 .type = HDA_FIXUP_PINS, 3478 .v.pins = intel_mac_v1_pin_configs, 3479 .chained = true, 3480 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3481 }, 3482 [STAC_INTEL_MAC_V2] = { 3483 .type = HDA_FIXUP_PINS, 3484 .v.pins = intel_mac_v2_pin_configs, 3485 .chained = true, 3486 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3487 }, 3488 [STAC_INTEL_MAC_V3] = { 3489 .type = HDA_FIXUP_PINS, 3490 .v.pins = intel_mac_v3_pin_configs, 3491 .chained = true, 3492 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3493 }, 3494 [STAC_INTEL_MAC_V4] = { 3495 .type = HDA_FIXUP_PINS, 3496 .v.pins = intel_mac_v4_pin_configs, 3497 .chained = true, 3498 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3499 }, 3500 [STAC_INTEL_MAC_V5] = { 3501 .type = HDA_FIXUP_PINS, 3502 .v.pins = intel_mac_v5_pin_configs, 3503 .chained = true, 3504 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3505 }, 3506 [STAC_922X_INTEL_MAC_GPIO] = { 3507 .type = HDA_FIXUP_FUNC, 3508 .v.func = stac922x_fixup_intel_mac_gpio, 3509 }, 3510 [STAC_ECS_202] = { 3511 .type = HDA_FIXUP_PINS, 3512 .v.pins = ecs202_pin_configs, 3513 }, 3514 [STAC_922X_DELL_D81] = { 3515 .type = HDA_FIXUP_PINS, 3516 .v.pins = dell_922x_d81_pin_configs, 3517 }, 3518 [STAC_922X_DELL_D82] = { 3519 .type = HDA_FIXUP_PINS, 3520 .v.pins = dell_922x_d82_pin_configs, 3521 }, 3522 [STAC_922X_DELL_M81] = { 3523 .type = HDA_FIXUP_PINS, 3524 .v.pins = dell_922x_m81_pin_configs, 3525 }, 3526 [STAC_922X_DELL_M82] = { 3527 .type = HDA_FIXUP_PINS, 3528 .v.pins = dell_922x_m82_pin_configs, 3529 }, 3530 }; 3531 3532 static const struct hda_model_fixup stac922x_models[] = { 3533 { .id = STAC_D945_REF, .name = "ref" }, 3534 { .id = STAC_D945GTP5, .name = "5stack" }, 3535 { .id = STAC_D945GTP3, .name = "3stack" }, 3536 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 3537 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 3538 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 3539 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 3540 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 3541 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 3542 { .id = STAC_ECS_202, .name = "ecs202" }, 3543 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 3544 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 3545 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 3546 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 3547 /* for backward compatibility */ 3548 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 3549 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 3550 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 3551 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 3552 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 3553 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 3554 {} 3555 }; 3556 3557 static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 3558 /* SigmaTel reference board */ 3559 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3560 "DFI LanParty", STAC_D945_REF), 3561 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3562 "DFI LanParty", STAC_D945_REF), 3563 /* Intel 945G based systems */ 3564 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 3565 "Intel D945G", STAC_D945GTP3), 3566 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 3567 "Intel D945G", STAC_D945GTP3), 3568 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 3569 "Intel D945G", STAC_D945GTP3), 3570 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 3571 "Intel D945G", STAC_D945GTP3), 3572 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 3573 "Intel D945G", STAC_D945GTP3), 3574 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 3575 "Intel D945G", STAC_D945GTP3), 3576 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 3577 "Intel D945G", STAC_D945GTP3), 3578 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 3579 "Intel D945G", STAC_D945GTP3), 3580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 3581 "Intel D945G", STAC_D945GTP3), 3582 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 3583 "Intel D945G", STAC_D945GTP3), 3584 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 3585 "Intel D945G", STAC_D945GTP3), 3586 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 3587 "Intel D945G", STAC_D945GTP3), 3588 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 3589 "Intel D945G", STAC_D945GTP3), 3590 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 3591 "Intel D945G", STAC_D945GTP3), 3592 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3593 "Intel D945G", STAC_D945GTP3), 3594 /* Intel D945G 5-stack systems */ 3595 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3596 "Intel D945G", STAC_D945GTP5), 3597 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3598 "Intel D945G", STAC_D945GTP5), 3599 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3600 "Intel D945G", STAC_D945GTP5), 3601 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3602 "Intel D945G", STAC_D945GTP5), 3603 /* Intel 945P based systems */ 3604 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3605 "Intel D945P", STAC_D945GTP3), 3606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3607 "Intel D945P", STAC_D945GTP3), 3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3609 "Intel D945P", STAC_D945GTP3), 3610 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3611 "Intel D945P", STAC_D945GTP3), 3612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3613 "Intel D945P", STAC_D945GTP3), 3614 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3615 "Intel D945P", STAC_D945GTP5), 3616 /* other intel */ 3617 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3618 "Intel D945", STAC_D945_REF), 3619 /* other systems */ 3620 3621 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3622 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3623 3624 /* Dell systems */ 3625 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3626 "unknown Dell", STAC_922X_DELL_D81), 3627 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3628 "unknown Dell", STAC_922X_DELL_D81), 3629 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3630 "unknown Dell", STAC_922X_DELL_D81), 3631 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3632 "unknown Dell", STAC_922X_DELL_D82), 3633 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3634 "unknown Dell", STAC_922X_DELL_M81), 3635 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3636 "unknown Dell", STAC_922X_DELL_D82), 3637 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3638 "unknown Dell", STAC_922X_DELL_D81), 3639 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3640 "unknown Dell", STAC_922X_DELL_D81), 3641 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3642 "Dell XPS M1210", STAC_922X_DELL_M82), 3643 /* ECS/PC Chips boards */ 3644 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3645 "ECS/PC chips", STAC_ECS_202), 3646 {} /* terminator */ 3647 }; 3648 3649 static const struct hda_pintbl ref927x_pin_configs[] = { 3650 { 0x0a, 0x02214020 }, 3651 { 0x0b, 0x02a19080 }, 3652 { 0x0c, 0x0181304e }, 3653 { 0x0d, 0x01014010 }, 3654 { 0x0e, 0x01a19040 }, 3655 { 0x0f, 0x01011012 }, 3656 { 0x10, 0x01016011 }, 3657 { 0x11, 0x0101201f }, 3658 { 0x12, 0x183301f0 }, 3659 { 0x13, 0x18a001f0 }, 3660 { 0x14, 0x18a001f0 }, 3661 { 0x21, 0x01442070 }, 3662 { 0x22, 0x01c42190 }, 3663 { 0x23, 0x40000100 }, 3664 {} 3665 }; 3666 3667 static const struct hda_pintbl d965_3st_pin_configs[] = { 3668 { 0x0a, 0x0221401f }, 3669 { 0x0b, 0x02a19120 }, 3670 { 0x0c, 0x40000100 }, 3671 { 0x0d, 0x01014011 }, 3672 { 0x0e, 0x01a19021 }, 3673 { 0x0f, 0x01813024 }, 3674 { 0x10, 0x40000100 }, 3675 { 0x11, 0x40000100 }, 3676 { 0x12, 0x40000100 }, 3677 { 0x13, 0x40000100 }, 3678 { 0x14, 0x40000100 }, 3679 { 0x21, 0x40000100 }, 3680 { 0x22, 0x40000100 }, 3681 { 0x23, 0x40000100 }, 3682 {} 3683 }; 3684 3685 static const struct hda_pintbl d965_5st_pin_configs[] = { 3686 { 0x0a, 0x02214020 }, 3687 { 0x0b, 0x02a19080 }, 3688 { 0x0c, 0x0181304e }, 3689 { 0x0d, 0x01014010 }, 3690 { 0x0e, 0x01a19040 }, 3691 { 0x0f, 0x01011012 }, 3692 { 0x10, 0x01016011 }, 3693 { 0x11, 0x40000100 }, 3694 { 0x12, 0x40000100 }, 3695 { 0x13, 0x40000100 }, 3696 { 0x14, 0x40000100 }, 3697 { 0x21, 0x01442070 }, 3698 { 0x22, 0x40000100 }, 3699 { 0x23, 0x40000100 }, 3700 {} 3701 }; 3702 3703 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3704 { 0x0a, 0x40000100 }, 3705 { 0x0b, 0x40000100 }, 3706 { 0x0c, 0x0181304e }, 3707 { 0x0d, 0x01014010 }, 3708 { 0x0e, 0x01a19040 }, 3709 { 0x0f, 0x01011012 }, 3710 { 0x10, 0x01016011 }, 3711 { 0x11, 0x40000100 }, 3712 { 0x12, 0x40000100 }, 3713 { 0x13, 0x40000100 }, 3714 { 0x14, 0x40000100 }, 3715 { 0x21, 0x01442070 }, 3716 { 0x22, 0x40000100 }, 3717 { 0x23, 0x40000100 }, 3718 {} 3719 }; 3720 3721 static const struct hda_pintbl dell_3st_pin_configs[] = { 3722 { 0x0a, 0x02211230 }, 3723 { 0x0b, 0x02a11220 }, 3724 { 0x0c, 0x01a19040 }, 3725 { 0x0d, 0x01114210 }, 3726 { 0x0e, 0x01111212 }, 3727 { 0x0f, 0x01116211 }, 3728 { 0x10, 0x01813050 }, 3729 { 0x11, 0x01112214 }, 3730 { 0x12, 0x403003fa }, 3731 { 0x13, 0x90a60040 }, 3732 { 0x14, 0x90a60040 }, 3733 { 0x21, 0x404003fb }, 3734 { 0x22, 0x40c003fc }, 3735 { 0x23, 0x40000100 }, 3736 {} 3737 }; 3738 3739 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3740 const struct hda_fixup *fix, int action) 3741 { 3742 /* no jack detecion for ref-no-jd model */ 3743 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3744 codec->no_jack_detect = 1; 3745 } 3746 3747 static void stac927x_fixup_ref(struct hda_codec *codec, 3748 const struct hda_fixup *fix, int action) 3749 { 3750 struct sigmatel_spec *spec = codec->spec; 3751 3752 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3753 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3754 spec->eapd_mask = spec->gpio_mask = 0; 3755 spec->gpio_dir = spec->gpio_data = 0; 3756 } 3757 } 3758 3759 static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3760 const struct hda_fixup *fix, int action) 3761 { 3762 struct sigmatel_spec *spec = codec->spec; 3763 3764 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3765 return; 3766 3767 if (codec->subsystem_id != 0x1028022f) { 3768 /* GPIO2 High = Enable EAPD */ 3769 spec->eapd_mask = spec->gpio_mask = 0x04; 3770 spec->gpio_dir = spec->gpio_data = 0x04; 3771 } 3772 3773 snd_hda_add_verbs(codec, dell_3st_core_init); 3774 spec->volknob_init = 1; 3775 } 3776 3777 static void stac927x_fixup_volknob(struct hda_codec *codec, 3778 const struct hda_fixup *fix, int action) 3779 { 3780 struct sigmatel_spec *spec = codec->spec; 3781 3782 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3783 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3784 spec->volknob_init = 1; 3785 } 3786 } 3787 3788 static const struct hda_fixup stac927x_fixups[] = { 3789 [STAC_D965_REF_NO_JD] = { 3790 .type = HDA_FIXUP_FUNC, 3791 .v.func = stac927x_fixup_ref_no_jd, 3792 .chained = true, 3793 .chain_id = STAC_D965_REF, 3794 }, 3795 [STAC_D965_REF] = { 3796 .type = HDA_FIXUP_FUNC, 3797 .v.func = stac927x_fixup_ref, 3798 }, 3799 [STAC_D965_3ST] = { 3800 .type = HDA_FIXUP_PINS, 3801 .v.pins = d965_3st_pin_configs, 3802 .chained = true, 3803 .chain_id = STAC_D965_VERBS, 3804 }, 3805 [STAC_D965_5ST] = { 3806 .type = HDA_FIXUP_PINS, 3807 .v.pins = d965_5st_pin_configs, 3808 .chained = true, 3809 .chain_id = STAC_D965_VERBS, 3810 }, 3811 [STAC_D965_VERBS] = { 3812 .type = HDA_FIXUP_VERBS, 3813 .v.verbs = d965_core_init, 3814 }, 3815 [STAC_D965_5ST_NO_FP] = { 3816 .type = HDA_FIXUP_PINS, 3817 .v.pins = d965_5st_no_fp_pin_configs, 3818 }, 3819 [STAC_DELL_3ST] = { 3820 .type = HDA_FIXUP_PINS, 3821 .v.pins = dell_3st_pin_configs, 3822 .chained = true, 3823 .chain_id = STAC_927X_DELL_DMIC, 3824 }, 3825 [STAC_DELL_BIOS] = { 3826 .type = HDA_FIXUP_PINS, 3827 .v.pins = (const struct hda_pintbl[]) { 3828 /* correct the front output jack as a hp out */ 3829 { 0x0f, 0x0221101f }, 3830 /* correct the front input jack as a mic */ 3831 { 0x0e, 0x02a79130 }, 3832 {} 3833 }, 3834 .chained = true, 3835 .chain_id = STAC_927X_DELL_DMIC, 3836 }, 3837 [STAC_DELL_BIOS_AMIC] = { 3838 .type = HDA_FIXUP_PINS, 3839 .v.pins = (const struct hda_pintbl[]) { 3840 /* configure the analog microphone on some laptops */ 3841 { 0x0c, 0x90a79130 }, 3842 {} 3843 }, 3844 .chained = true, 3845 .chain_id = STAC_DELL_BIOS, 3846 }, 3847 [STAC_DELL_BIOS_SPDIF] = { 3848 .type = HDA_FIXUP_PINS, 3849 .v.pins = (const struct hda_pintbl[]) { 3850 /* correct the device field to SPDIF out */ 3851 { 0x21, 0x01442070 }, 3852 {} 3853 }, 3854 .chained = true, 3855 .chain_id = STAC_DELL_BIOS, 3856 }, 3857 [STAC_927X_DELL_DMIC] = { 3858 .type = HDA_FIXUP_FUNC, 3859 .v.func = stac927x_fixup_dell_dmic, 3860 }, 3861 [STAC_927X_VOLKNOB] = { 3862 .type = HDA_FIXUP_FUNC, 3863 .v.func = stac927x_fixup_volknob, 3864 }, 3865 }; 3866 3867 static const struct hda_model_fixup stac927x_models[] = { 3868 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3869 { .id = STAC_D965_REF, .name = "ref" }, 3870 { .id = STAC_D965_3ST, .name = "3stack" }, 3871 { .id = STAC_D965_5ST, .name = "5stack" }, 3872 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3873 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3874 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3875 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3876 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3877 {} 3878 }; 3879 3880 static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3881 /* SigmaTel reference board */ 3882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3883 "DFI LanParty", STAC_D965_REF), 3884 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3885 "DFI LanParty", STAC_D965_REF), 3886 /* Intel 946 based systems */ 3887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3889 /* 965 based 3 stack systems */ 3890 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3891 "Intel D965", STAC_D965_3ST), 3892 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3893 "Intel D965", STAC_D965_3ST), 3894 /* Dell 3 stack systems */ 3895 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3896 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3897 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3898 /* Dell 3 stack systems with verb table in BIOS */ 3899 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3900 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3901 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3902 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3903 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3904 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3905 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3906 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 3907 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 3908 /* 965 based 5 stack systems */ 3909 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 3910 "Intel D965", STAC_D965_5ST), 3911 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 3912 "Intel D965", STAC_D965_5ST), 3913 /* volume-knob fixes */ 3914 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 3915 {} /* terminator */ 3916 }; 3917 3918 static const struct hda_pintbl ref9205_pin_configs[] = { 3919 { 0x0a, 0x40000100 }, 3920 { 0x0b, 0x40000100 }, 3921 { 0x0c, 0x01016011 }, 3922 { 0x0d, 0x01014010 }, 3923 { 0x0e, 0x01813122 }, 3924 { 0x0f, 0x01a19021 }, 3925 { 0x14, 0x01019020 }, 3926 { 0x16, 0x40000100 }, 3927 { 0x17, 0x90a000f0 }, 3928 { 0x18, 0x90a000f0 }, 3929 { 0x21, 0x01441030 }, 3930 { 0x22, 0x01c41030 }, 3931 {} 3932 }; 3933 3934 /* 3935 STAC 9205 pin configs for 3936 102801F1 3937 102801F2 3938 102801FC 3939 102801FD 3940 10280204 3941 1028021F 3942 10280228 (Dell Vostro 1500) 3943 10280229 (Dell Vostro 1700) 3944 */ 3945 static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 3946 { 0x0a, 0x0321101F }, 3947 { 0x0b, 0x03A11020 }, 3948 { 0x0c, 0x400003FA }, 3949 { 0x0d, 0x90170310 }, 3950 { 0x0e, 0x400003FB }, 3951 { 0x0f, 0x400003FC }, 3952 { 0x14, 0x400003FD }, 3953 { 0x16, 0x40F000F9 }, 3954 { 0x17, 0x90A60330 }, 3955 { 0x18, 0x400003FF }, 3956 { 0x21, 0x0144131F }, 3957 { 0x22, 0x40C003FE }, 3958 {} 3959 }; 3960 3961 /* 3962 STAC 9205 pin configs for 3963 102801F9 3964 102801FA 3965 102801FE 3966 102801FF (Dell Precision M4300) 3967 10280206 3968 10280200 3969 10280201 3970 */ 3971 static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 3972 { 0x0a, 0x0321101f }, 3973 { 0x0b, 0x03a11020 }, 3974 { 0x0c, 0x90a70330 }, 3975 { 0x0d, 0x90170310 }, 3976 { 0x0e, 0x400000fe }, 3977 { 0x0f, 0x400000ff }, 3978 { 0x14, 0x400000fd }, 3979 { 0x16, 0x40f000f9 }, 3980 { 0x17, 0x400000fa }, 3981 { 0x18, 0x400000fc }, 3982 { 0x21, 0x0144131f }, 3983 { 0x22, 0x40c003f8 }, 3984 /* Enable SPDIF in/out */ 3985 { 0x1f, 0x01441030 }, 3986 { 0x20, 0x1c410030 }, 3987 {} 3988 }; 3989 3990 static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 3991 { 0x0a, 0x0421101f }, 3992 { 0x0b, 0x04a11020 }, 3993 { 0x0c, 0x400003fa }, 3994 { 0x0d, 0x90170310 }, 3995 { 0x0e, 0x400003fb }, 3996 { 0x0f, 0x400003fc }, 3997 { 0x14, 0x400003fd }, 3998 { 0x16, 0x400003f9 }, 3999 { 0x17, 0x90a60330 }, 4000 { 0x18, 0x400003ff }, 4001 { 0x21, 0x01441340 }, 4002 { 0x22, 0x40c003fe }, 4003 {} 4004 }; 4005 4006 static void stac9205_fixup_ref(struct hda_codec *codec, 4007 const struct hda_fixup *fix, int action) 4008 { 4009 struct sigmatel_spec *spec = codec->spec; 4010 4011 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4012 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 4013 /* SPDIF-In enabled */ 4014 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 4015 } 4016 } 4017 4018 static void stac9205_fixup_dell_m43(struct hda_codec *codec, 4019 const struct hda_fixup *fix, int action) 4020 { 4021 struct sigmatel_spec *spec = codec->spec; 4022 struct hda_jack_tbl *jack; 4023 4024 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4025 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 4026 4027 /* Enable unsol response for GPIO4/Dock HP connection */ 4028 snd_hda_codec_write_cache(codec, codec->afg, 0, 4029 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 4030 snd_hda_jack_detect_enable_callback(codec, codec->afg, 4031 STAC_VREF_EVENT, 4032 stac_vref_event); 4033 jack = snd_hda_jack_tbl_get(codec, codec->afg); 4034 if (jack) 4035 jack->private_data = 0x01; 4036 4037 spec->gpio_dir = 0x0b; 4038 spec->eapd_mask = 0x01; 4039 spec->gpio_mask = 0x1b; 4040 spec->gpio_mute = 0x10; 4041 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 4042 * GPIO3 Low = DRM 4043 */ 4044 spec->gpio_data = 0x01; 4045 } 4046 } 4047 4048 static void stac9205_fixup_eapd(struct hda_codec *codec, 4049 const struct hda_fixup *fix, int action) 4050 { 4051 struct sigmatel_spec *spec = codec->spec; 4052 4053 if (action == HDA_FIXUP_ACT_PRE_PROBE) 4054 spec->eapd_switch = 0; 4055 } 4056 4057 static const struct hda_fixup stac9205_fixups[] = { 4058 [STAC_9205_REF] = { 4059 .type = HDA_FIXUP_FUNC, 4060 .v.func = stac9205_fixup_ref, 4061 }, 4062 [STAC_9205_DELL_M42] = { 4063 .type = HDA_FIXUP_PINS, 4064 .v.pins = dell_9205_m42_pin_configs, 4065 }, 4066 [STAC_9205_DELL_M43] = { 4067 .type = HDA_FIXUP_FUNC, 4068 .v.func = stac9205_fixup_dell_m43, 4069 }, 4070 [STAC_9205_DELL_M44] = { 4071 .type = HDA_FIXUP_PINS, 4072 .v.pins = dell_9205_m44_pin_configs, 4073 }, 4074 [STAC_9205_EAPD] = { 4075 .type = HDA_FIXUP_FUNC, 4076 .v.func = stac9205_fixup_eapd, 4077 }, 4078 {} 4079 }; 4080 4081 static const struct hda_model_fixup stac9205_models[] = { 4082 { .id = STAC_9205_REF, .name = "ref" }, 4083 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 4084 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 4085 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 4086 { .id = STAC_9205_EAPD, .name = "eapd" }, 4087 {} 4088 }; 4089 4090 static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 4091 /* SigmaTel reference board */ 4092 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 4093 "DFI LanParty", STAC_9205_REF), 4094 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 4095 "SigmaTel", STAC_9205_REF), 4096 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 4097 "DFI LanParty", STAC_9205_REF), 4098 /* Dell */ 4099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 4100 "unknown Dell", STAC_9205_DELL_M42), 4101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 4102 "unknown Dell", STAC_9205_DELL_M42), 4103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 4104 "Dell Precision", STAC_9205_DELL_M43), 4105 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 4106 "Dell Precision", STAC_9205_DELL_M43), 4107 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 4108 "Dell Precision", STAC_9205_DELL_M43), 4109 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 4110 "unknown Dell", STAC_9205_DELL_M42), 4111 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 4112 "unknown Dell", STAC_9205_DELL_M42), 4113 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 4114 "Dell Precision", STAC_9205_DELL_M43), 4115 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 4116 "Dell Precision M4300", STAC_9205_DELL_M43), 4117 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 4118 "unknown Dell", STAC_9205_DELL_M42), 4119 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 4120 "Dell Precision", STAC_9205_DELL_M43), 4121 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 4122 "Dell Precision", STAC_9205_DELL_M43), 4123 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 4124 "Dell Precision", STAC_9205_DELL_M43), 4125 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 4126 "Dell Inspiron", STAC_9205_DELL_M44), 4127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 4128 "Dell Vostro 1500", STAC_9205_DELL_M42), 4129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 4130 "Dell Vostro 1700", STAC_9205_DELL_M42), 4131 /* Gateway */ 4132 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 4133 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 4134 {} /* terminator */ 4135 }; 4136 4137 static void stac92hd95_fixup_hp_led(struct hda_codec *codec, 4138 const struct hda_fixup *fix, int action) 4139 { 4140 struct sigmatel_spec *spec = codec->spec; 4141 4142 if (action != HDA_FIXUP_ACT_PRE_PROBE) 4143 return; 4144 4145 if (find_mute_led_cfg(codec, spec->default_polarity)) 4146 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 4147 spec->gpio_led, 4148 spec->gpio_led_polarity); 4149 } 4150 4151 static const struct hda_fixup stac92hd95_fixups[] = { 4152 [STAC_92HD95_HP_LED] = { 4153 .type = HDA_FIXUP_FUNC, 4154 .v.func = stac92hd95_fixup_hp_led, 4155 }, 4156 [STAC_92HD95_HP_BASS] = { 4157 .type = HDA_FIXUP_VERBS, 4158 .v.verbs = (const struct hda_verb[]) { 4159 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */ 4160 {} 4161 }, 4162 .chained = true, 4163 .chain_id = STAC_92HD95_HP_LED, 4164 }, 4165 }; 4166 4167 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { 4168 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), 4169 {} /* terminator */ 4170 }; 4171 4172 static const struct hda_model_fixup stac92hd95_models[] = { 4173 { .id = STAC_92HD95_HP_LED, .name = "hp-led" }, 4174 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" }, 4175 {} 4176 }; 4177 4178 4179 static int stac_parse_auto_config(struct hda_codec *codec) 4180 { 4181 struct sigmatel_spec *spec = codec->spec; 4182 int err; 4183 int flags = 0; 4184 4185 if (spec->headset_jack) 4186 flags |= HDA_PINCFG_HEADSET_MIC; 4187 4188 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 4189 if (err < 0) 4190 return err; 4191 4192 /* add hooks */ 4193 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 4194 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 4195 4196 spec->gen.automute_hook = stac_update_outputs; 4197 spec->gen.hp_automute_hook = stac_hp_automute; 4198 spec->gen.line_automute_hook = stac_line_automute; 4199 spec->gen.mic_autoswitch_hook = stac_mic_autoswitch; 4200 4201 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 4202 if (err < 0) 4203 return err; 4204 4205 /* minimum value is actually mute */ 4206 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE; 4207 4208 /* setup analog beep controls */ 4209 if (spec->anabeep_nid > 0) { 4210 err = stac_auto_create_beep_ctls(codec, 4211 spec->anabeep_nid); 4212 if (err < 0) 4213 return err; 4214 } 4215 4216 /* setup digital beep controls and input device */ 4217 #ifdef CONFIG_SND_HDA_INPUT_BEEP 4218 if (spec->gen.beep_nid) { 4219 hda_nid_t nid = spec->gen.beep_nid; 4220 unsigned int caps; 4221 4222 err = stac_auto_create_beep_ctls(codec, nid); 4223 if (err < 0) 4224 return err; 4225 if (codec->beep) { 4226 /* IDT/STAC codecs have linear beep tone parameter */ 4227 codec->beep->linear_tone = spec->linear_tone_beep; 4228 /* if no beep switch is available, make its own one */ 4229 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 4230 if (!(caps & AC_AMPCAP_MUTE)) { 4231 err = stac_beep_switch_ctl(codec); 4232 if (err < 0) 4233 return err; 4234 } 4235 } 4236 } 4237 #endif 4238 4239 if (spec->gpio_led) 4240 spec->gen.vmaster_mute.hook = stac_vmaster_hook; 4241 4242 if (spec->aloopback_ctl && 4243 snd_hda_get_bool_hint(codec, "loopback") == 1) { 4244 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 4245 return -ENOMEM; 4246 } 4247 4248 if (spec->have_spdif_mux) { 4249 err = stac_create_spdif_mux_ctls(codec); 4250 if (err < 0) 4251 return err; 4252 } 4253 4254 stac_init_power_map(codec); 4255 4256 return 0; 4257 } 4258 4259 4260 static int stac_init(struct hda_codec *codec) 4261 { 4262 struct sigmatel_spec *spec = codec->spec; 4263 int i; 4264 4265 /* override some hints */ 4266 stac_store_hints(codec); 4267 4268 /* set up GPIO */ 4269 /* turn on EAPD statically when spec->eapd_switch isn't set. 4270 * otherwise, unsol event will turn it on/off dynamically 4271 */ 4272 if (!spec->eapd_switch) 4273 spec->gpio_data |= spec->eapd_mask; 4274 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 4275 4276 snd_hda_gen_init(codec); 4277 4278 /* sync the power-map */ 4279 if (spec->num_pwrs) 4280 snd_hda_codec_write(codec, codec->afg, 0, 4281 AC_VERB_IDT_SET_POWER_MAP, 4282 spec->power_map_bits); 4283 4284 /* power down inactive ADCs */ 4285 if (spec->powerdown_adcs) { 4286 for (i = 0; i < spec->gen.num_all_adcs; i++) { 4287 if (spec->active_adcs & (1 << i)) 4288 continue; 4289 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 4290 AC_VERB_SET_POWER_STATE, 4291 AC_PWRST_D3); 4292 } 4293 } 4294 4295 return 0; 4296 } 4297 4298 static void stac_shutup(struct hda_codec *codec) 4299 { 4300 struct sigmatel_spec *spec = codec->spec; 4301 4302 snd_hda_shutup_pins(codec); 4303 4304 if (spec->eapd_mask) 4305 stac_gpio_set(codec, spec->gpio_mask, 4306 spec->gpio_dir, spec->gpio_data & 4307 ~spec->eapd_mask); 4308 } 4309 4310 #define stac_free snd_hda_gen_free 4311 4312 #ifdef CONFIG_PROC_FS 4313 static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 4314 struct hda_codec *codec, hda_nid_t nid) 4315 { 4316 if (nid == codec->afg) 4317 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 4318 snd_hda_codec_read(codec, nid, 0, 4319 AC_VERB_IDT_GET_POWER_MAP, 0)); 4320 } 4321 4322 static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 4323 struct hda_codec *codec, 4324 unsigned int verb) 4325 { 4326 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 4327 snd_hda_codec_read(codec, codec->afg, 0, verb, 0)); 4328 } 4329 4330 /* stac92hd71bxx, stac92hd73xx */ 4331 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 4332 struct hda_codec *codec, hda_nid_t nid) 4333 { 4334 stac92hd_proc_hook(buffer, codec, nid); 4335 if (nid == codec->afg) 4336 analog_loop_proc_hook(buffer, codec, 0xfa0); 4337 } 4338 4339 static void stac9205_proc_hook(struct snd_info_buffer *buffer, 4340 struct hda_codec *codec, hda_nid_t nid) 4341 { 4342 if (nid == codec->afg) 4343 analog_loop_proc_hook(buffer, codec, 0xfe0); 4344 } 4345 4346 static void stac927x_proc_hook(struct snd_info_buffer *buffer, 4347 struct hda_codec *codec, hda_nid_t nid) 4348 { 4349 if (nid == codec->afg) 4350 analog_loop_proc_hook(buffer, codec, 0xfeb); 4351 } 4352 #else 4353 #define stac92hd_proc_hook NULL 4354 #define stac92hd7x_proc_hook NULL 4355 #define stac9205_proc_hook NULL 4356 #define stac927x_proc_hook NULL 4357 #endif 4358 4359 #ifdef CONFIG_PM 4360 static int stac_suspend(struct hda_codec *codec) 4361 { 4362 stac_shutup(codec); 4363 return 0; 4364 } 4365 #else 4366 #define stac_suspend NULL 4367 #endif /* CONFIG_PM */ 4368 4369 static const struct hda_codec_ops stac_patch_ops = { 4370 .build_controls = snd_hda_gen_build_controls, 4371 .build_pcms = snd_hda_gen_build_pcms, 4372 .init = stac_init, 4373 .free = stac_free, 4374 .unsol_event = snd_hda_jack_unsol_event, 4375 #ifdef CONFIG_PM 4376 .suspend = stac_suspend, 4377 #endif 4378 .reboot_notify = stac_shutup, 4379 }; 4380 4381 static int alloc_stac_spec(struct hda_codec *codec) 4382 { 4383 struct sigmatel_spec *spec; 4384 4385 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 4386 if (!spec) 4387 return -ENOMEM; 4388 snd_hda_gen_spec_init(&spec->gen); 4389 codec->spec = spec; 4390 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 4391 return 0; 4392 } 4393 4394 static int patch_stac9200(struct hda_codec *codec) 4395 { 4396 struct sigmatel_spec *spec; 4397 int err; 4398 4399 err = alloc_stac_spec(codec); 4400 if (err < 0) 4401 return err; 4402 4403 spec = codec->spec; 4404 spec->linear_tone_beep = 1; 4405 spec->gen.own_eapd_ctl = 1; 4406 4407 codec->patch_ops = stac_patch_ops; 4408 codec->power_filter = snd_hda_codec_eapd_power_filter; 4409 4410 snd_hda_add_verbs(codec, stac9200_eapd_init); 4411 4412 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 4413 stac9200_fixups); 4414 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4415 4416 err = stac_parse_auto_config(codec); 4417 if (err < 0) { 4418 stac_free(codec); 4419 return err; 4420 } 4421 4422 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4423 4424 return 0; 4425 } 4426 4427 static int patch_stac925x(struct hda_codec *codec) 4428 { 4429 struct sigmatel_spec *spec; 4430 int err; 4431 4432 err = alloc_stac_spec(codec); 4433 if (err < 0) 4434 return err; 4435 4436 spec = codec->spec; 4437 spec->linear_tone_beep = 1; 4438 spec->gen.own_eapd_ctl = 1; 4439 4440 codec->patch_ops = stac_patch_ops; 4441 4442 snd_hda_add_verbs(codec, stac925x_core_init); 4443 4444 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 4445 stac925x_fixups); 4446 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4447 4448 err = stac_parse_auto_config(codec); 4449 if (err < 0) { 4450 stac_free(codec); 4451 return err; 4452 } 4453 4454 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4455 4456 return 0; 4457 } 4458 4459 static int patch_stac92hd73xx(struct hda_codec *codec) 4460 { 4461 struct sigmatel_spec *spec; 4462 int err; 4463 int num_dacs; 4464 4465 err = alloc_stac_spec(codec); 4466 if (err < 0) 4467 return err; 4468 4469 spec = codec->spec; 4470 spec->linear_tone_beep = 0; 4471 spec->gen.mixer_nid = 0x1d; 4472 spec->have_spdif_mux = 1; 4473 4474 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 4475 if (num_dacs < 3 || num_dacs > 5) { 4476 codec_warn(codec, 4477 "Could not determine number of channels defaulting to DAC count\n"); 4478 num_dacs = 5; 4479 } 4480 4481 switch (num_dacs) { 4482 case 0x3: /* 6 Channel */ 4483 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 4484 break; 4485 case 0x4: /* 8 Channel */ 4486 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 4487 break; 4488 case 0x5: /* 10 Channel */ 4489 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 4490 break; 4491 } 4492 4493 spec->aloopback_mask = 0x01; 4494 spec->aloopback_shift = 8; 4495 4496 spec->gen.beep_nid = 0x1c; /* digital beep */ 4497 4498 /* GPIO0 High = Enable EAPD */ 4499 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4500 spec->gpio_data = 0x01; 4501 4502 spec->eapd_switch = 1; 4503 4504 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 4505 spec->pwr_nids = stac92hd73xx_pwr_nids; 4506 4507 spec->gen.own_eapd_ctl = 1; 4508 spec->gen.power_down_unused = 1; 4509 4510 codec->patch_ops = stac_patch_ops; 4511 4512 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 4513 stac92hd73xx_fixups); 4514 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4515 4516 if (!spec->volknob_init) 4517 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 4518 4519 err = stac_parse_auto_config(codec); 4520 if (err < 0) { 4521 stac_free(codec); 4522 return err; 4523 } 4524 4525 /* Don't GPIO-mute speakers if there are no internal speakers, because 4526 * the GPIO might be necessary for Headphone 4527 */ 4528 if (spec->eapd_switch && !has_builtin_speaker(codec)) 4529 spec->eapd_switch = 0; 4530 4531 codec->proc_widget_hook = stac92hd7x_proc_hook; 4532 4533 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4534 4535 return 0; 4536 } 4537 4538 static void stac_setup_gpio(struct hda_codec *codec) 4539 { 4540 struct sigmatel_spec *spec = codec->spec; 4541 4542 spec->gpio_mask |= spec->eapd_mask; 4543 if (spec->gpio_led) { 4544 if (!spec->vref_mute_led_nid) { 4545 spec->gpio_mask |= spec->gpio_led; 4546 spec->gpio_dir |= spec->gpio_led; 4547 spec->gpio_data |= spec->gpio_led; 4548 } else { 4549 codec->power_filter = stac_vref_led_power_filter; 4550 } 4551 } 4552 4553 if (spec->mic_mute_led_gpio) { 4554 spec->gpio_mask |= spec->mic_mute_led_gpio; 4555 spec->gpio_dir |= spec->mic_mute_led_gpio; 4556 spec->mic_enabled = 0; 4557 spec->gpio_data |= spec->mic_mute_led_gpio; 4558 4559 spec->gen.cap_sync_hook = stac_capture_led_hook; 4560 } 4561 } 4562 4563 static int patch_stac92hd83xxx(struct hda_codec *codec) 4564 { 4565 struct sigmatel_spec *spec; 4566 int err; 4567 4568 err = alloc_stac_spec(codec); 4569 if (err < 0) 4570 return err; 4571 4572 codec->epss = 0; /* longer delay needed for D3 */ 4573 4574 spec = codec->spec; 4575 spec->linear_tone_beep = 0; 4576 spec->gen.own_eapd_ctl = 1; 4577 spec->gen.power_down_unused = 1; 4578 spec->gen.mixer_nid = 0x1b; 4579 4580 spec->gen.beep_nid = 0x21; /* digital beep */ 4581 spec->pwr_nids = stac92hd83xxx_pwr_nids; 4582 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 4583 spec->default_polarity = -1; /* no default cfg */ 4584 4585 codec->patch_ops = stac_patch_ops; 4586 4587 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 4588 4589 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 4590 stac92hd83xxx_fixups); 4591 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4592 4593 stac_setup_gpio(codec); 4594 4595 err = stac_parse_auto_config(codec); 4596 if (err < 0) { 4597 stac_free(codec); 4598 return err; 4599 } 4600 4601 codec->proc_widget_hook = stac92hd_proc_hook; 4602 4603 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4604 4605 return 0; 4606 } 4607 4608 static const hda_nid_t stac92hd95_pwr_nids[] = { 4609 0x0a, 0x0b, 0x0c, 0x0d 4610 }; 4611 4612 static int patch_stac92hd95(struct hda_codec *codec) 4613 { 4614 struct sigmatel_spec *spec; 4615 int err; 4616 4617 err = alloc_stac_spec(codec); 4618 if (err < 0) 4619 return err; 4620 4621 codec->epss = 0; /* longer delay needed for D3 */ 4622 4623 spec = codec->spec; 4624 spec->linear_tone_beep = 0; 4625 spec->gen.own_eapd_ctl = 1; 4626 spec->gen.power_down_unused = 1; 4627 4628 spec->gen.beep_nid = 0x19; /* digital beep */ 4629 spec->pwr_nids = stac92hd95_pwr_nids; 4630 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4631 spec->default_polarity = 0; 4632 4633 codec->patch_ops = stac_patch_ops; 4634 4635 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl, 4636 stac92hd95_fixups); 4637 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4638 4639 stac_setup_gpio(codec); 4640 4641 err = stac_parse_auto_config(codec); 4642 if (err < 0) { 4643 stac_free(codec); 4644 return err; 4645 } 4646 4647 codec->proc_widget_hook = stac92hd_proc_hook; 4648 4649 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4650 4651 return 0; 4652 } 4653 4654 static int patch_stac92hd71bxx(struct hda_codec *codec) 4655 { 4656 struct sigmatel_spec *spec; 4657 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; 4658 int err; 4659 4660 err = alloc_stac_spec(codec); 4661 if (err < 0) 4662 return err; 4663 4664 spec = codec->spec; 4665 spec->linear_tone_beep = 0; 4666 spec->gen.own_eapd_ctl = 1; 4667 spec->gen.power_down_unused = 1; 4668 spec->gen.mixer_nid = 0x17; 4669 spec->have_spdif_mux = 1; 4670 4671 codec->patch_ops = stac_patch_ops; 4672 4673 /* GPIO0 = EAPD */ 4674 spec->gpio_mask = 0x01; 4675 spec->gpio_dir = 0x01; 4676 spec->gpio_data = 0x01; 4677 4678 switch (codec->vendor_id) { 4679 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4680 case 0x111d76b7: 4681 unmute_init++; 4682 break; 4683 case 0x111d7608: /* 5 Port with Analog Mixer */ 4684 if ((codec->revision_id & 0xf) == 0 || 4685 (codec->revision_id & 0xf) == 1) 4686 spec->stream_delay = 40; /* 40 milliseconds */ 4687 4688 /* disable VSW */ 4689 unmute_init++; 4690 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4691 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4692 break; 4693 case 0x111d7603: /* 6 Port with Analog Mixer */ 4694 if ((codec->revision_id & 0xf) == 1) 4695 spec->stream_delay = 40; /* 40 milliseconds */ 4696 4697 break; 4698 } 4699 4700 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4701 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4702 4703 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) 4704 snd_hda_sequence_write_cache(codec, unmute_init); 4705 4706 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4707 spec->aloopback_mask = 0x50; 4708 spec->aloopback_shift = 0; 4709 4710 spec->powerdown_adcs = 1; 4711 spec->gen.beep_nid = 0x26; /* digital beep */ 4712 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4713 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4714 4715 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4716 stac92hd71bxx_fixups); 4717 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4718 4719 stac_setup_gpio(codec); 4720 4721 err = stac_parse_auto_config(codec); 4722 if (err < 0) { 4723 stac_free(codec); 4724 return err; 4725 } 4726 4727 codec->proc_widget_hook = stac92hd7x_proc_hook; 4728 4729 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4730 4731 return 0; 4732 } 4733 4734 static int patch_stac922x(struct hda_codec *codec) 4735 { 4736 struct sigmatel_spec *spec; 4737 int err; 4738 4739 err = alloc_stac_spec(codec); 4740 if (err < 0) 4741 return err; 4742 4743 spec = codec->spec; 4744 spec->linear_tone_beep = 1; 4745 spec->gen.own_eapd_ctl = 1; 4746 4747 codec->patch_ops = stac_patch_ops; 4748 4749 snd_hda_add_verbs(codec, stac922x_core_init); 4750 4751 /* Fix Mux capture level; max to 2 */ 4752 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4753 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4754 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4755 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4756 (0 << AC_AMPCAP_MUTE_SHIFT)); 4757 4758 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4759 stac922x_fixups); 4760 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4761 4762 err = stac_parse_auto_config(codec); 4763 if (err < 0) { 4764 stac_free(codec); 4765 return err; 4766 } 4767 4768 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4769 4770 return 0; 4771 } 4772 4773 static const char * const stac927x_spdif_labels[] = { 4774 "Digital Playback", "ADAT", "Analog Mux 1", 4775 "Analog Mux 2", "Analog Mux 3", NULL 4776 }; 4777 4778 static int patch_stac927x(struct hda_codec *codec) 4779 { 4780 struct sigmatel_spec *spec; 4781 int err; 4782 4783 err = alloc_stac_spec(codec); 4784 if (err < 0) 4785 return err; 4786 4787 spec = codec->spec; 4788 spec->linear_tone_beep = 1; 4789 spec->gen.own_eapd_ctl = 1; 4790 spec->have_spdif_mux = 1; 4791 spec->spdif_labels = stac927x_spdif_labels; 4792 4793 spec->gen.beep_nid = 0x23; /* digital beep */ 4794 4795 /* GPIO0 High = Enable EAPD */ 4796 spec->eapd_mask = spec->gpio_mask = 0x01; 4797 spec->gpio_dir = spec->gpio_data = 0x01; 4798 4799 spec->aloopback_ctl = &stac927x_loopback; 4800 spec->aloopback_mask = 0x40; 4801 spec->aloopback_shift = 0; 4802 spec->eapd_switch = 1; 4803 4804 codec->patch_ops = stac_patch_ops; 4805 4806 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4807 stac927x_fixups); 4808 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4809 4810 if (!spec->volknob_init) 4811 snd_hda_add_verbs(codec, stac927x_core_init); 4812 4813 err = stac_parse_auto_config(codec); 4814 if (err < 0) { 4815 stac_free(codec); 4816 return err; 4817 } 4818 4819 codec->proc_widget_hook = stac927x_proc_hook; 4820 4821 /* 4822 * !!FIXME!! 4823 * The STAC927x seem to require fairly long delays for certain 4824 * command sequences. With too short delays (even if the answer 4825 * is set to RIRB properly), it results in the silence output 4826 * on some hardwares like Dell. 4827 * 4828 * The below flag enables the longer delay (see get_response 4829 * in hda_intel.c). 4830 */ 4831 codec->bus->needs_damn_long_delay = 1; 4832 4833 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4834 4835 return 0; 4836 } 4837 4838 static int patch_stac9205(struct hda_codec *codec) 4839 { 4840 struct sigmatel_spec *spec; 4841 int err; 4842 4843 err = alloc_stac_spec(codec); 4844 if (err < 0) 4845 return err; 4846 4847 spec = codec->spec; 4848 spec->linear_tone_beep = 1; 4849 spec->gen.own_eapd_ctl = 1; 4850 spec->have_spdif_mux = 1; 4851 4852 spec->gen.beep_nid = 0x23; /* digital beep */ 4853 4854 snd_hda_add_verbs(codec, stac9205_core_init); 4855 spec->aloopback_ctl = &stac9205_loopback; 4856 4857 spec->aloopback_mask = 0x40; 4858 spec->aloopback_shift = 0; 4859 4860 /* GPIO0 High = EAPD */ 4861 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4862 spec->gpio_data = 0x01; 4863 4864 /* Turn on/off EAPD per HP plugging */ 4865 spec->eapd_switch = 1; 4866 4867 codec->patch_ops = stac_patch_ops; 4868 4869 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4870 stac9205_fixups); 4871 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4872 4873 err = stac_parse_auto_config(codec); 4874 if (err < 0) { 4875 stac_free(codec); 4876 return err; 4877 } 4878 4879 codec->proc_widget_hook = stac9205_proc_hook; 4880 4881 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4882 4883 return 0; 4884 } 4885 4886 /* 4887 * STAC9872 hack 4888 */ 4889 4890 static const struct hda_verb stac9872_core_init[] = { 4891 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4892 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4893 {} 4894 }; 4895 4896 static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4897 { 0x0a, 0x03211020 }, 4898 { 0x0b, 0x411111f0 }, 4899 { 0x0c, 0x411111f0 }, 4900 { 0x0d, 0x03a15030 }, 4901 { 0x0e, 0x411111f0 }, 4902 { 0x0f, 0x90170110 }, 4903 { 0x11, 0x411111f0 }, 4904 { 0x13, 0x411111f0 }, 4905 { 0x14, 0x90a7013e }, 4906 {} 4907 }; 4908 4909 static const struct hda_model_fixup stac9872_models[] = { 4910 { .id = STAC_9872_VAIO, .name = "vaio" }, 4911 {} 4912 }; 4913 4914 static const struct hda_fixup stac9872_fixups[] = { 4915 [STAC_9872_VAIO] = { 4916 .type = HDA_FIXUP_PINS, 4917 .v.pins = stac9872_vaio_pin_configs, 4918 }, 4919 }; 4920 4921 static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 4922 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 4923 "Sony VAIO F/S", STAC_9872_VAIO), 4924 {} /* terminator */ 4925 }; 4926 4927 static int patch_stac9872(struct hda_codec *codec) 4928 { 4929 struct sigmatel_spec *spec; 4930 int err; 4931 4932 err = alloc_stac_spec(codec); 4933 if (err < 0) 4934 return err; 4935 4936 spec = codec->spec; 4937 spec->linear_tone_beep = 1; 4938 spec->gen.own_eapd_ctl = 1; 4939 4940 codec->patch_ops = stac_patch_ops; 4941 4942 snd_hda_add_verbs(codec, stac9872_core_init); 4943 4944 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 4945 stac9872_fixups); 4946 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4947 4948 err = stac_parse_auto_config(codec); 4949 if (err < 0) { 4950 stac_free(codec); 4951 return -EINVAL; 4952 } 4953 4954 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4955 4956 return 0; 4957 } 4958 4959 4960 /* 4961 * patch entries 4962 */ 4963 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = { 4964 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, 4965 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, 4966 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, 4967 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, 4968 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, 4969 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, 4970 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, 4971 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, 4972 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, 4973 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, 4974 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, 4975 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, 4976 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, 4977 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, 4978 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, 4979 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, 4980 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, 4981 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, 4982 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, 4983 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, 4984 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, 4985 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, 4986 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, 4987 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, 4988 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, 4989 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, 4990 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, 4991 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, 4992 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, 4993 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x }, 4994 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x }, 4995 /* The following does not take into account .id=0x83847661 when subsys = 4996 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 4997 * currently not fully supported. 4998 */ 4999 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, 5000 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, 5001 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, 5002 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 }, 5003 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, 5004 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, 5005 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, 5006 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, 5007 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, 5008 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, 5009 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, 5010 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, 5011 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx}, 5012 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx}, 5013 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx}, 5014 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx}, 5015 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx}, 5016 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx}, 5017 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx}, 5018 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx}, 5019 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx}, 5020 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx}, 5021 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx}, 5022 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx}, 5023 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, 5024 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, 5025 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, 5026 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 }, 5027 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5028 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5029 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5030 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5031 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5032 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5033 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5034 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5035 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx }, 5036 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx }, 5037 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx }, 5038 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx }, 5039 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx }, 5040 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx }, 5041 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx }, 5042 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx }, 5043 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx }, 5044 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx }, 5045 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx }, 5046 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx }, 5047 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx }, 5048 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, 5049 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, 5050 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx}, 5051 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, 5052 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx}, 5053 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx}, 5054 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, 5055 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx}, 5056 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx}, 5057 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx}, 5058 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx}, 5059 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx}, 5060 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx}, 5061 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx}, 5062 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx}, 5063 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx}, 5064 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx}, 5065 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx}, 5066 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx}, 5067 {} /* terminator */ 5068 }; 5069 5070 MODULE_ALIAS("snd-hda-codec-id:8384*"); 5071 MODULE_ALIAS("snd-hda-codec-id:111d*"); 5072 5073 MODULE_LICENSE("GPL"); 5074 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 5075 5076 static struct hda_codec_preset_list sigmatel_list = { 5077 .preset = snd_hda_preset_sigmatel, 5078 .owner = THIS_MODULE, 5079 }; 5080 5081 static int __init patch_sigmatel_init(void) 5082 { 5083 return snd_hda_add_codec_preset(&sigmatel_list); 5084 } 5085 5086 static void __exit patch_sigmatel_exit(void) 5087 { 5088 snd_hda_delete_codec_preset(&sigmatel_list); 5089 } 5090 5091 module_init(patch_sigmatel_init) 5092 module_exit(patch_sigmatel_exit) 5093