xref: /openbmc/linux/sound/pci/hda/patch_sigmatel.c (revision 39b6f3aa)
1 /*
2  * Universal Interface for Intel High Definition Audio Codec
3  *
4  * HD audio interface patch for SigmaTel STAC92xx
5  *
6  * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7  * Matt Porter <mporter@embeddedalley.com>
8  *
9  * Based on patch_cmedia.c and patch_realtek.c
10  * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11  *
12  *  This driver is free software; you can redistribute it and/or modify
13  *  it under the terms of the GNU General Public License as published by
14  *  the Free Software Foundation; either version 2 of the License, or
15  *  (at your option) any later version.
16  *
17  *  This driver is distributed in the hope that it will be useful,
18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  *  GNU General Public License for more details.
21  *
22  *  You should have received a copy of the GNU General Public License
23  *  along with this program; if not, write to the Free Software
24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
25  */
26 
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include <sound/tlv.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
38 #include "hda_auto_parser.h"
39 #include "hda_beep.h"
40 #include "hda_jack.h"
41 #include "hda_generic.h"
42 
43 enum {
44 	STAC_VREF_EVENT	= 8,
45 	STAC_PWR_EVENT,
46 };
47 
48 enum {
49 	STAC_REF,
50 	STAC_9200_OQO,
51 	STAC_9200_DELL_D21,
52 	STAC_9200_DELL_D22,
53 	STAC_9200_DELL_D23,
54 	STAC_9200_DELL_M21,
55 	STAC_9200_DELL_M22,
56 	STAC_9200_DELL_M23,
57 	STAC_9200_DELL_M24,
58 	STAC_9200_DELL_M25,
59 	STAC_9200_DELL_M26,
60 	STAC_9200_DELL_M27,
61 	STAC_9200_M4,
62 	STAC_9200_M4_2,
63 	STAC_9200_PANASONIC,
64 	STAC_9200_EAPD_INIT,
65 	STAC_9200_MODELS
66 };
67 
68 enum {
69 	STAC_9205_REF,
70 	STAC_9205_DELL_M42,
71 	STAC_9205_DELL_M43,
72 	STAC_9205_DELL_M44,
73 	STAC_9205_EAPD,
74 	STAC_9205_MODELS
75 };
76 
77 enum {
78 	STAC_92HD73XX_NO_JD, /* no jack-detection */
79 	STAC_92HD73XX_REF,
80 	STAC_92HD73XX_INTEL,
81 	STAC_DELL_M6_AMIC,
82 	STAC_DELL_M6_DMIC,
83 	STAC_DELL_M6_BOTH,
84 	STAC_DELL_EQ,
85 	STAC_ALIENWARE_M17X,
86 	STAC_92HD73XX_MODELS
87 };
88 
89 enum {
90 	STAC_92HD83XXX_REF,
91 	STAC_92HD83XXX_PWR_REF,
92 	STAC_DELL_S14,
93 	STAC_DELL_VOSTRO_3500,
94 	STAC_92HD83XXX_HP_cNB11_INTQUAD,
95 	STAC_HP_DV7_4000,
96 	STAC_HP_ZEPHYR,
97 	STAC_92HD83XXX_HP_LED,
98 	STAC_92HD83XXX_HP_INV_LED,
99 	STAC_92HD83XXX_HP_MIC_LED,
100 	STAC_92HD83XXX_HEADSET_JACK,
101 	STAC_92HD83XXX_HP,
102 	STAC_HP_ENVY_BASS,
103 	STAC_92HD83XXX_MODELS
104 };
105 
106 enum {
107 	STAC_92HD71BXX_REF,
108 	STAC_DELL_M4_1,
109 	STAC_DELL_M4_2,
110 	STAC_DELL_M4_3,
111 	STAC_HP_M4,
112 	STAC_HP_DV4,
113 	STAC_HP_DV5,
114 	STAC_HP_HDX,
115 	STAC_92HD71BXX_HP,
116 	STAC_92HD71BXX_NO_DMIC,
117 	STAC_92HD71BXX_NO_SMUX,
118 	STAC_92HD71BXX_MODELS
119 };
120 
121 enum {
122 	STAC_925x_REF,
123 	STAC_M1,
124 	STAC_M1_2,
125 	STAC_M2,
126 	STAC_M2_2,
127 	STAC_M3,
128 	STAC_M5,
129 	STAC_M6,
130 	STAC_925x_MODELS
131 };
132 
133 enum {
134 	STAC_D945_REF,
135 	STAC_D945GTP3,
136 	STAC_D945GTP5,
137 	STAC_INTEL_MAC_V1,
138 	STAC_INTEL_MAC_V2,
139 	STAC_INTEL_MAC_V3,
140 	STAC_INTEL_MAC_V4,
141 	STAC_INTEL_MAC_V5,
142 	STAC_INTEL_MAC_AUTO,
143 	STAC_ECS_202,
144 	STAC_922X_DELL_D81,
145 	STAC_922X_DELL_D82,
146 	STAC_922X_DELL_M81,
147 	STAC_922X_DELL_M82,
148 	STAC_922X_INTEL_MAC_GPIO,
149 	STAC_922X_MODELS
150 };
151 
152 enum {
153 	STAC_D965_REF_NO_JD, /* no jack-detection */
154 	STAC_D965_REF,
155 	STAC_D965_3ST,
156 	STAC_D965_5ST,
157 	STAC_D965_5ST_NO_FP,
158 	STAC_D965_VERBS,
159 	STAC_DELL_3ST,
160 	STAC_DELL_BIOS,
161 	STAC_DELL_BIOS_SPDIF,
162 	STAC_927X_DELL_DMIC,
163 	STAC_927X_VOLKNOB,
164 	STAC_927X_MODELS
165 };
166 
167 enum {
168 	STAC_9872_VAIO,
169 	STAC_9872_MODELS
170 };
171 
172 struct sigmatel_spec {
173 	struct hda_gen_spec gen;
174 
175 	unsigned int eapd_switch: 1;
176 	unsigned int linear_tone_beep:1;
177 	unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
178 	unsigned int volknob_init:1; /* special volume-knob initialization */
179 	unsigned int powerdown_adcs:1;
180 	unsigned int have_spdif_mux:1;
181 
182 	/* gpio lines */
183 	unsigned int eapd_mask;
184 	unsigned int gpio_mask;
185 	unsigned int gpio_dir;
186 	unsigned int gpio_data;
187 	unsigned int gpio_mute;
188 	unsigned int gpio_led;
189 	unsigned int gpio_led_polarity;
190 	unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
191 	unsigned int vref_led;
192 	int default_polarity;
193 
194 	unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
195 	bool mic_mute_led_on; /* current mic mute state */
196 
197 	/* stream */
198 	unsigned int stream_delay;
199 
200 	/* analog loopback */
201 	const struct snd_kcontrol_new *aloopback_ctl;
202 	unsigned int aloopback;
203 	unsigned char aloopback_mask;
204 	unsigned char aloopback_shift;
205 
206 	/* power management */
207 	unsigned int power_map_bits;
208 	unsigned int num_pwrs;
209 	const hda_nid_t *pwr_nids;
210 	unsigned int active_adcs;
211 
212 	/* beep widgets */
213 	hda_nid_t anabeep_nid;
214 
215 	/* SPDIF-out mux */
216 	const char * const *spdif_labels;
217 	struct hda_input_mux spdif_mux;
218 	unsigned int cur_smux[2];
219 };
220 
221 #define AC_VERB_IDT_SET_POWER_MAP	0x7ec
222 #define AC_VERB_IDT_GET_POWER_MAP	0xfec
223 
224 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
225 	0x0a, 0x0b, 0x0c, 0xd, 0x0e,
226 	0x0f, 0x10, 0x11
227 };
228 
229 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
230 	0x0a, 0x0b, 0x0c, 0xd, 0x0e,
231 	0x0f, 0x10
232 };
233 
234 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
235 	0x0a, 0x0d, 0x0f
236 };
237 
238 
239 /*
240  * PCM hooks
241  */
242 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
243 				   struct hda_codec *codec,
244 				   struct snd_pcm_substream *substream,
245 				   int action)
246 {
247 	struct sigmatel_spec *spec = codec->spec;
248 	if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
249 		msleep(spec->stream_delay);
250 }
251 
252 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
253 				  struct hda_codec *codec,
254 				  struct snd_pcm_substream *substream,
255 				  int action)
256 {
257 	struct sigmatel_spec *spec = codec->spec;
258 	int i, idx = 0;
259 
260 	if (!spec->powerdown_adcs)
261 		return;
262 
263 	for (i = 0; i < spec->gen.num_all_adcs; i++) {
264 		if (spec->gen.all_adcs[i] == hinfo->nid) {
265 			idx = i;
266 			break;
267 		}
268 	}
269 
270 	switch (action) {
271 	case HDA_GEN_PCM_ACT_OPEN:
272 		msleep(40);
273 		snd_hda_codec_write(codec, hinfo->nid, 0,
274 				    AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
275 		spec->active_adcs |= (1 << idx);
276 		break;
277 	case HDA_GEN_PCM_ACT_CLOSE:
278 		snd_hda_codec_write(codec, hinfo->nid, 0,
279 				    AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
280 		spec->active_adcs &= ~(1 << idx);
281 		break;
282 	}
283 }
284 
285 /*
286  * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
287  * funky external mute control using GPIO pins.
288  */
289 
290 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
291 			  unsigned int dir_mask, unsigned int data)
292 {
293 	unsigned int gpiostate, gpiomask, gpiodir;
294 
295 	snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
296 
297 	gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
298 				       AC_VERB_GET_GPIO_DATA, 0);
299 	gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
300 
301 	gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
302 				      AC_VERB_GET_GPIO_MASK, 0);
303 	gpiomask |= mask;
304 
305 	gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
306 				     AC_VERB_GET_GPIO_DIRECTION, 0);
307 	gpiodir |= dir_mask;
308 
309 	/* Configure GPIOx as CMOS */
310 	snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
311 
312 	snd_hda_codec_write(codec, codec->afg, 0,
313 			    AC_VERB_SET_GPIO_MASK, gpiomask);
314 	snd_hda_codec_read(codec, codec->afg, 0,
315 			   AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
316 
317 	msleep(1);
318 
319 	snd_hda_codec_read(codec, codec->afg, 0,
320 			   AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
321 }
322 
323 /* hook for controlling mic-mute LED GPIO */
324 static void stac_capture_led_hook(struct hda_codec *codec,
325 			       struct snd_ctl_elem_value *ucontrol)
326 {
327 	struct sigmatel_spec *spec = codec->spec;
328 	bool mute;
329 
330 	if (!ucontrol)
331 		return;
332 
333 	mute = !(ucontrol->value.integer.value[0] ||
334 		 ucontrol->value.integer.value[1]);
335 	if (spec->mic_mute_led_on != mute) {
336 		spec->mic_mute_led_on = mute;
337 		if (mute)
338 			spec->gpio_data |= spec->mic_mute_led_gpio;
339 		else
340 			spec->gpio_data &= ~spec->mic_mute_led_gpio;
341 		stac_gpio_set(codec, spec->gpio_mask,
342 			      spec->gpio_dir, spec->gpio_data);
343 	}
344 }
345 
346 static int stac_vrefout_set(struct hda_codec *codec,
347 					hda_nid_t nid, unsigned int new_vref)
348 {
349 	int error, pinctl;
350 
351 	snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
352 	pinctl = snd_hda_codec_read(codec, nid, 0,
353 				AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
354 
355 	if (pinctl < 0)
356 		return pinctl;
357 
358 	pinctl &= 0xff;
359 	pinctl &= ~AC_PINCTL_VREFEN;
360 	pinctl |= (new_vref & AC_PINCTL_VREFEN);
361 
362 	error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
363 	if (error < 0)
364 		return error;
365 
366 	return 1;
367 }
368 
369 /* update mute-LED accoring to the master switch */
370 static void stac_update_led_status(struct hda_codec *codec, int enabled)
371 {
372 	struct sigmatel_spec *spec = codec->spec;
373 	int muted = !enabled;
374 
375 	if (!spec->gpio_led)
376 		return;
377 
378 	/* LED state is inverted on these systems */
379 	if (spec->gpio_led_polarity)
380 		muted = !muted;
381 
382 	if (!spec->vref_mute_led_nid) {
383 		if (muted)
384 			spec->gpio_data |= spec->gpio_led;
385 		else
386 			spec->gpio_data &= ~spec->gpio_led;
387 		stac_gpio_set(codec, spec->gpio_mask,
388 				spec->gpio_dir, spec->gpio_data);
389 	} else {
390 		spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
391 		stac_vrefout_set(codec,	spec->vref_mute_led_nid,
392 				 spec->vref_led);
393 	}
394 }
395 
396 /* vmaster hook to update mute LED */
397 static void stac_vmaster_hook(void *private_data, int val)
398 {
399 	stac_update_led_status(private_data, val);
400 }
401 
402 /* automute hook to handle GPIO mute and EAPD updates */
403 static void stac_update_outputs(struct hda_codec *codec)
404 {
405 	struct sigmatel_spec *spec = codec->spec;
406 
407 	if (spec->gpio_mute)
408 		spec->gen.master_mute =
409 			!(snd_hda_codec_read(codec, codec->afg, 0,
410 				AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
411 
412 	snd_hda_gen_update_outputs(codec);
413 
414 	if (spec->eapd_mask && spec->eapd_switch) {
415 		unsigned int val = spec->gpio_data;
416 		if (spec->gen.speaker_muted)
417 			val &= ~spec->eapd_mask;
418 		else
419 			val |= spec->eapd_mask;
420 		if (spec->gpio_data != val)
421 			stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
422 				      val);
423 	}
424 }
425 
426 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
427 				  bool enable, bool do_write)
428 {
429 	struct sigmatel_spec *spec = codec->spec;
430 	unsigned int idx, val;
431 
432 	for (idx = 0; idx < spec->num_pwrs; idx++) {
433 		if (spec->pwr_nids[idx] == nid)
434 			break;
435 	}
436 	if (idx >= spec->num_pwrs)
437 		return;
438 
439 	idx = 1 << idx;
440 
441 	val = spec->power_map_bits;
442 	if (enable)
443 		val &= ~idx;
444 	else
445 		val |= idx;
446 
447 	/* power down unused output ports */
448 	if (val != spec->power_map_bits) {
449 		spec->power_map_bits = val;
450 		if (do_write)
451 			snd_hda_codec_write(codec, codec->afg, 0,
452 					    AC_VERB_IDT_SET_POWER_MAP, val);
453 	}
454 }
455 
456 /* update power bit per jack plug/unplug */
457 static void jack_update_power(struct hda_codec *codec,
458 			      struct hda_jack_tbl *jack)
459 {
460 	struct sigmatel_spec *spec = codec->spec;
461 	int i;
462 
463 	if (!spec->num_pwrs)
464 		return;
465 
466 	if (jack && jack->nid) {
467 		stac_toggle_power_map(codec, jack->nid,
468 				      snd_hda_jack_detect(codec, jack->nid),
469 				      true);
470 		return;
471 	}
472 
473 	/* update all jacks */
474 	for (i = 0; i < spec->num_pwrs; i++) {
475 		hda_nid_t nid = spec->pwr_nids[i];
476 		jack = snd_hda_jack_tbl_get(codec, nid);
477 		if (!jack || !jack->action)
478 			continue;
479 		if (jack->action == STAC_PWR_EVENT ||
480 		    jack->action <= HDA_GEN_LAST_EVENT)
481 			stac_toggle_power_map(codec, nid,
482 					      snd_hda_jack_detect(codec, nid),
483 					      false);
484 	}
485 
486 	snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
487 			    spec->power_map_bits);
488 }
489 
490 static void stac_hp_automute(struct hda_codec *codec,
491 				 struct hda_jack_tbl *jack)
492 {
493 	snd_hda_gen_hp_automute(codec, jack);
494 	jack_update_power(codec, jack);
495 }
496 
497 static void stac_line_automute(struct hda_codec *codec,
498 				   struct hda_jack_tbl *jack)
499 {
500 	snd_hda_gen_line_automute(codec, jack);
501 	jack_update_power(codec, jack);
502 }
503 
504 static void stac_mic_autoswitch(struct hda_codec *codec,
505 				struct hda_jack_tbl *jack)
506 {
507 	snd_hda_gen_mic_autoswitch(codec, jack);
508 	jack_update_power(codec, jack);
509 }
510 
511 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
512 {
513 	unsigned int data;
514 
515 	data = snd_hda_codec_read(codec, codec->afg, 0,
516 				  AC_VERB_GET_GPIO_DATA, 0);
517 	/* toggle VREF state based on GPIOx status */
518 	snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
519 			    !!(data & (1 << event->private_data)));
520 }
521 
522 /* initialize the power map and enable the power event to jacks that
523  * haven't been assigned to automute
524  */
525 static void stac_init_power_map(struct hda_codec *codec)
526 {
527 	struct sigmatel_spec *spec = codec->spec;
528 	int i;
529 
530 	for (i = 0; i < spec->num_pwrs; i++)  {
531 		hda_nid_t nid = spec->pwr_nids[i];
532 		unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
533 		def_conf = get_defcfg_connect(def_conf);
534 		if (snd_hda_jack_tbl_get(codec, nid))
535 			continue;
536 		if (def_conf == AC_JACK_PORT_COMPLEX &&
537 		    !(spec->vref_mute_led_nid == nid ||
538 		      is_jack_detectable(codec, nid))) {
539 			snd_hda_jack_detect_enable_callback(codec, nid,
540 							    STAC_PWR_EVENT,
541 							    jack_update_power);
542 		} else {
543 			if (def_conf == AC_JACK_PORT_NONE)
544 				stac_toggle_power_map(codec, nid, false, false);
545 			else
546 				stac_toggle_power_map(codec, nid, true, false);
547 		}
548 	}
549 }
550 
551 /*
552  */
553 
554 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
555 				int *valp)
556 {
557 	return !snd_hda_get_int_hint(codec, key, valp);
558 }
559 
560 /* override some hints from the hwdep entry */
561 static void stac_store_hints(struct hda_codec *codec)
562 {
563 	struct sigmatel_spec *spec = codec->spec;
564 	int val;
565 
566 	if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
567 		spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
568 			spec->gpio_mask;
569 	}
570 	if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
571 		spec->gpio_mask &= spec->gpio_mask;
572 	if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
573 		spec->gpio_dir &= spec->gpio_mask;
574 	if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
575 		spec->eapd_mask &= spec->gpio_mask;
576 	if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
577 		spec->gpio_mute &= spec->gpio_mask;
578 	val = snd_hda_get_bool_hint(codec, "eapd_switch");
579 	if (val >= 0)
580 		spec->eapd_switch = val;
581 }
582 
583 /*
584  * loopback controls
585  */
586 
587 #define stac_aloopback_info snd_ctl_boolean_mono_info
588 
589 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
590 			      struct snd_ctl_elem_value *ucontrol)
591 {
592 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
593 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
594 	struct sigmatel_spec *spec = codec->spec;
595 
596 	ucontrol->value.integer.value[0] = !!(spec->aloopback &
597 					      (spec->aloopback_mask << idx));
598 	return 0;
599 }
600 
601 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
602 			      struct snd_ctl_elem_value *ucontrol)
603 {
604 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
605 	struct sigmatel_spec *spec = codec->spec;
606 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
607 	unsigned int dac_mode;
608 	unsigned int val, idx_val;
609 
610 	idx_val = spec->aloopback_mask << idx;
611 	if (ucontrol->value.integer.value[0])
612 		val = spec->aloopback | idx_val;
613 	else
614 		val = spec->aloopback & ~idx_val;
615 	if (spec->aloopback == val)
616 		return 0;
617 
618 	spec->aloopback = val;
619 
620 	/* Only return the bits defined by the shift value of the
621 	 * first two bytes of the mask
622 	 */
623 	dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
624 				      kcontrol->private_value & 0xFFFF, 0x0);
625 	dac_mode >>= spec->aloopback_shift;
626 
627 	if (spec->aloopback & idx_val) {
628 		snd_hda_power_up(codec);
629 		dac_mode |= idx_val;
630 	} else {
631 		snd_hda_power_down(codec);
632 		dac_mode &= ~idx_val;
633 	}
634 
635 	snd_hda_codec_write_cache(codec, codec->afg, 0,
636 		kcontrol->private_value >> 16, dac_mode);
637 
638 	return 1;
639 }
640 
641 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
642 	{ \
643 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
644 		.name  = "Analog Loopback", \
645 		.count = cnt, \
646 		.info  = stac_aloopback_info, \
647 		.get   = stac_aloopback_get, \
648 		.put   = stac_aloopback_put, \
649 		.private_value = verb_read | (verb_write << 16), \
650 	}
651 
652 /*
653  * Mute LED handling on HP laptops
654  */
655 
656 /* check whether it's a HP laptop with a docking port */
657 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
658 {
659 	if (codec->vendor_id != 0x111d7605 &&
660 	    codec->vendor_id != 0x111d76d1)
661 		return false;
662 
663 	switch (codec->subsystem_id) {
664 	case 0x103c1618:
665 	case 0x103c1619:
666 	case 0x103c161a:
667 	case 0x103c161b:
668 	case 0x103c161c:
669 	case 0x103c161d:
670 	case 0x103c161e:
671 	case 0x103c161f:
672 
673 	case 0x103c162a:
674 	case 0x103c162b:
675 
676 	case 0x103c1630:
677 	case 0x103c1631:
678 
679 	case 0x103c1633:
680 	case 0x103c1634:
681 	case 0x103c1635:
682 
683 	case 0x103c3587:
684 	case 0x103c3588:
685 	case 0x103c3589:
686 	case 0x103c358a:
687 
688 	case 0x103c3667:
689 	case 0x103c3668:
690 	case 0x103c3669:
691 
692 		return true;
693 	}
694 	return false;
695 }
696 
697 static bool hp_blike_system(u32 subsystem_id)
698 {
699 	switch (subsystem_id) {
700 	case 0x103c1520:
701 	case 0x103c1521:
702 	case 0x103c1523:
703 	case 0x103c1524:
704 	case 0x103c1525:
705 	case 0x103c1722:
706 	case 0x103c1723:
707 	case 0x103c1724:
708 	case 0x103c1725:
709 	case 0x103c1726:
710 	case 0x103c1727:
711 	case 0x103c1728:
712 	case 0x103c1729:
713 	case 0x103c172a:
714 	case 0x103c172b:
715 	case 0x103c307e:
716 	case 0x103c307f:
717 	case 0x103c3080:
718 	case 0x103c3081:
719 	case 0x103c7007:
720 	case 0x103c7008:
721 		return true;
722 	}
723 	return false;
724 }
725 
726 static void set_hp_led_gpio(struct hda_codec *codec)
727 {
728 	struct sigmatel_spec *spec = codec->spec;
729 	unsigned int gpio;
730 
731 	if (spec->gpio_led)
732 		return;
733 
734 	gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
735 	gpio &= AC_GPIO_IO_COUNT;
736 	if (gpio > 3)
737 		spec->gpio_led = 0x08; /* GPIO 3 */
738 	else
739 		spec->gpio_led = 0x01; /* GPIO 0 */
740 }
741 
742 /*
743  * This method searches for the mute LED GPIO configuration
744  * provided as OEM string in SMBIOS. The format of that string
745  * is HP_Mute_LED_P_G or HP_Mute_LED_P
746  * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
747  * that corresponds to the NOT muted state of the master volume
748  * and G is the index of the GPIO to use as the mute LED control (0..9)
749  * If _G portion is missing it is assigned based on the codec ID
750  *
751  * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
752  * or  HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
753  *
754  *
755  * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
756  * SMBIOS - at least the ones I have seen do not have them - which include
757  * my own system (HP Pavilion dv6-1110ax) and my cousin's
758  * HP Pavilion dv9500t CTO.
759  * Need more information on whether it is true across the entire series.
760  * -- kunal
761  */
762 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
763 {
764 	struct sigmatel_spec *spec = codec->spec;
765 	const struct dmi_device *dev = NULL;
766 
767 	if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
768 		get_int_hint(codec, "gpio_led_polarity",
769 			     &spec->gpio_led_polarity);
770 		return 1;
771 	}
772 
773 	while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
774 		if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
775 			   &spec->gpio_led_polarity,
776 			   &spec->gpio_led) == 2) {
777 			unsigned int max_gpio;
778 			max_gpio = snd_hda_param_read(codec, codec->afg,
779 						      AC_PAR_GPIO_CAP);
780 			max_gpio &= AC_GPIO_IO_COUNT;
781 			if (spec->gpio_led < max_gpio)
782 				spec->gpio_led = 1 << spec->gpio_led;
783 			else
784 				spec->vref_mute_led_nid = spec->gpio_led;
785 			return 1;
786 		}
787 		if (sscanf(dev->name, "HP_Mute_LED_%d",
788 			   &spec->gpio_led_polarity) == 1) {
789 			set_hp_led_gpio(codec);
790 			return 1;
791 		}
792 		/* BIOS bug: unfilled OEM string */
793 		if (strstr(dev->name, "HP_Mute_LED_P_G")) {
794 			set_hp_led_gpio(codec);
795 			if (default_polarity >= 0)
796 				spec->gpio_led_polarity = default_polarity;
797 			else
798 				spec->gpio_led_polarity = 1;
799 			return 1;
800 		}
801 	}
802 
803 	/*
804 	 * Fallback case - if we don't find the DMI strings,
805 	 * we statically set the GPIO - if not a B-series system
806 	 * and default polarity is provided
807 	 */
808 	if (!hp_blike_system(codec->subsystem_id) &&
809 	    (default_polarity == 0 || default_polarity == 1)) {
810 		set_hp_led_gpio(codec);
811 		spec->gpio_led_polarity = default_polarity;
812 		return 1;
813 	}
814 	return 0;
815 }
816 
817 /* check whether a built-in speaker is included in parsed pins */
818 static bool has_builtin_speaker(struct hda_codec *codec)
819 {
820 	struct sigmatel_spec *spec = codec->spec;
821 	hda_nid_t *nid_pin;
822 	int nids, i;
823 
824 	if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
825 		nid_pin = spec->gen.autocfg.line_out_pins;
826 		nids = spec->gen.autocfg.line_outs;
827 	} else {
828 		nid_pin = spec->gen.autocfg.speaker_pins;
829 		nids = spec->gen.autocfg.speaker_outs;
830 	}
831 
832 	for (i = 0; i < nids; i++) {
833 		unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
834 		if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
835 			return true;
836 	}
837 	return false;
838 }
839 
840 /*
841  * PC beep controls
842  */
843 
844 /* create PC beep volume controls */
845 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
846 						hda_nid_t nid)
847 {
848 	struct sigmatel_spec *spec = codec->spec;
849 	u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
850 	struct snd_kcontrol_new *knew;
851 	static struct snd_kcontrol_new abeep_mute_ctl =
852 		HDA_CODEC_MUTE(NULL, 0, 0, 0);
853 	static struct snd_kcontrol_new dbeep_mute_ctl =
854 		HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
855 	static struct snd_kcontrol_new beep_vol_ctl =
856 		HDA_CODEC_VOLUME(NULL, 0, 0, 0);
857 
858 	/* check for mute support for the the amp */
859 	if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
860 		const struct snd_kcontrol_new *temp;
861 		if (spec->anabeep_nid == nid)
862 			temp = &abeep_mute_ctl;
863 		else
864 			temp = &dbeep_mute_ctl;
865 		knew = snd_hda_gen_add_kctl(&spec->gen,
866 					    "Beep Playback Switch", temp);
867 		if (!knew)
868 			return -ENOMEM;
869 		knew->private_value =
870 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
871 	}
872 
873 	/* check to see if there is volume support for the amp */
874 	if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
875 		knew = snd_hda_gen_add_kctl(&spec->gen,
876 					    "Beep Playback Volume",
877 					    &beep_vol_ctl);
878 		if (!knew)
879 			return -ENOMEM;
880 		knew->private_value =
881 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
882 	}
883 	return 0;
884 }
885 
886 #ifdef CONFIG_SND_HDA_INPUT_BEEP
887 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
888 
889 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
890 				    struct snd_ctl_elem_value *ucontrol)
891 {
892 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
893 	ucontrol->value.integer.value[0] = codec->beep->enabled;
894 	return 0;
895 }
896 
897 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
898 				    struct snd_ctl_elem_value *ucontrol)
899 {
900 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
901 	return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
902 }
903 
904 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
905 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
906 	.name = "Beep Playback Switch",
907 	.info = stac_dig_beep_switch_info,
908 	.get = stac_dig_beep_switch_get,
909 	.put = stac_dig_beep_switch_put,
910 };
911 
912 static int stac_beep_switch_ctl(struct hda_codec *codec)
913 {
914 	struct sigmatel_spec *spec = codec->spec;
915 
916 	if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
917 		return -ENOMEM;
918 	return 0;
919 }
920 #endif
921 
922 /*
923  * SPDIF-out mux controls
924  */
925 
926 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
927 			       struct snd_ctl_elem_info *uinfo)
928 {
929 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
930 	struct sigmatel_spec *spec = codec->spec;
931 	return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
932 }
933 
934 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
935 			      struct snd_ctl_elem_value *ucontrol)
936 {
937 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
938 	struct sigmatel_spec *spec = codec->spec;
939 	unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
940 
941 	ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
942 	return 0;
943 }
944 
945 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
946 			      struct snd_ctl_elem_value *ucontrol)
947 {
948 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
949 	struct sigmatel_spec *spec = codec->spec;
950 	unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
951 
952 	return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
953 				     spec->gen.autocfg.dig_out_pins[smux_idx],
954 				     &spec->cur_smux[smux_idx]);
955 }
956 
957 static struct snd_kcontrol_new stac_smux_mixer = {
958 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
959 	.name = "IEC958 Playback Source",
960 	/* count set later */
961 	.info = stac_smux_enum_info,
962 	.get = stac_smux_enum_get,
963 	.put = stac_smux_enum_put,
964 };
965 
966 static const char * const stac_spdif_labels[] = {
967 	"Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
968 };
969 
970 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
971 {
972 	struct sigmatel_spec *spec = codec->spec;
973 	struct auto_pin_cfg *cfg = &spec->gen.autocfg;
974 	const char * const *labels = spec->spdif_labels;
975 	struct snd_kcontrol_new *kctl;
976 	int i, num_cons;
977 
978 	if (cfg->dig_outs < 1)
979 		return 0;
980 
981 	num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
982 	if (num_cons <= 1)
983 		return 0;
984 
985 	if (!labels)
986 		labels = stac_spdif_labels;
987 	for (i = 0; i < num_cons; i++) {
988 		if (snd_BUG_ON(!labels[i]))
989 			return -EINVAL;
990 		snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
991 	}
992 
993 	kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
994 	if (!kctl)
995 		return -ENOMEM;
996 	kctl->count = cfg->dig_outs;
997 
998 	return 0;
999 }
1000 
1001 /*
1002  */
1003 
1004 static const struct hda_verb stac9200_core_init[] = {
1005 	/* set dac0mux for dac converter */
1006 	{ 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1007 	{}
1008 };
1009 
1010 static const struct hda_verb stac9200_eapd_init[] = {
1011 	/* set dac0mux for dac converter */
1012 	{0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1013 	{0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1014 	{}
1015 };
1016 
1017 static const struct hda_verb dell_eq_core_init[] = {
1018 	/* set master volume to max value without distortion
1019 	 * and direct control */
1020 	{ 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1021 	{}
1022 };
1023 
1024 static const struct hda_verb stac92hd73xx_core_init[] = {
1025 	/* set master volume and direct control */
1026 	{ 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1027 	{}
1028 };
1029 
1030 static const struct hda_verb stac92hd83xxx_core_init[] = {
1031 	/* power state controls amps */
1032 	{ 0x01, AC_VERB_SET_EAPD, 1 << 2},
1033 	{}
1034 };
1035 
1036 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1037 	{ 0x22, 0x785, 0x43 },
1038 	{ 0x22, 0x782, 0xe0 },
1039 	{ 0x22, 0x795, 0x00 },
1040 	{}
1041 };
1042 
1043 static const struct hda_verb stac92hd71bxx_core_init[] = {
1044 	/* set master volume and direct control */
1045 	{ 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1046 	{}
1047 };
1048 
1049 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
1050 	/* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1051 	{ 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1052 	{ 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1053 	{ 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
1054 	{}
1055 };
1056 
1057 static const struct hda_verb stac925x_core_init[] = {
1058 	/* set dac0mux for dac converter */
1059 	{ 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1060 	/* mute the master volume */
1061 	{ 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1062 	{}
1063 };
1064 
1065 static const struct hda_verb stac922x_core_init[] = {
1066 	/* set master volume and direct control */
1067 	{ 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1068 	{}
1069 };
1070 
1071 static const struct hda_verb d965_core_init[] = {
1072 	/* unmute node 0x1b */
1073 	{ 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1074 	/* select node 0x03 as DAC */
1075 	{ 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1076 	{}
1077 };
1078 
1079 static const struct hda_verb dell_3st_core_init[] = {
1080 	/* don't set delta bit */
1081 	{0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1082 	/* unmute node 0x1b */
1083 	{0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1084 	/* select node 0x03 as DAC */
1085 	{0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1086 	{}
1087 };
1088 
1089 static const struct hda_verb stac927x_core_init[] = {
1090 	/* set master volume and direct control */
1091 	{ 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1092 	/* enable analog pc beep path */
1093 	{ 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1094 	{}
1095 };
1096 
1097 static const struct hda_verb stac927x_volknob_core_init[] = {
1098 	/* don't set delta bit */
1099 	{0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1100 	/* enable analog pc beep path */
1101 	{0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1102 	{}
1103 };
1104 
1105 static const struct hda_verb stac9205_core_init[] = {
1106 	/* set master volume and direct control */
1107 	{ 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1108 	/* enable analog pc beep path */
1109 	{ 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1110 	{}
1111 };
1112 
1113 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1114 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1115 
1116 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1117 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1118 
1119 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1120 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1121 
1122 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1123 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1124 
1125 static const struct snd_kcontrol_new stac9205_loopback =
1126 	STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1127 
1128 static const struct snd_kcontrol_new stac927x_loopback =
1129 	STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1130 
1131 static const struct hda_pintbl ref9200_pin_configs[] = {
1132 	{ 0x08, 0x01c47010 },
1133 	{ 0x09, 0x01447010 },
1134 	{ 0x0d, 0x0221401f },
1135 	{ 0x0e, 0x01114010 },
1136 	{ 0x0f, 0x02a19020 },
1137 	{ 0x10, 0x01a19021 },
1138 	{ 0x11, 0x90100140 },
1139 	{ 0x12, 0x01813122 },
1140 	{}
1141 };
1142 
1143 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1144 	{ 0x08, 0x400000fe },
1145 	{ 0x09, 0x404500f4 },
1146 	{ 0x0d, 0x400100f0 },
1147 	{ 0x0e, 0x90110010 },
1148 	{ 0x0f, 0x400100f1 },
1149 	{ 0x10, 0x02a1902e },
1150 	{ 0x11, 0x500000f2 },
1151 	{ 0x12, 0x500000f3 },
1152 	{}
1153 };
1154 
1155 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1156 	{ 0x08, 0x400000fe },
1157 	{ 0x09, 0x404500f4 },
1158 	{ 0x0d, 0x400100f0 },
1159 	{ 0x0e, 0x90110010 },
1160 	{ 0x0f, 0x400100f1 },
1161 	{ 0x10, 0x02a1902e },
1162 	{ 0x11, 0x500000f2 },
1163 	{ 0x12, 0x500000f3 },
1164 	{}
1165 };
1166 
1167 /*
1168     STAC 9200 pin configs for
1169     102801A8
1170     102801DE
1171     102801E8
1172 */
1173 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1174 	{ 0x08, 0x400001f0 },
1175 	{ 0x09, 0x400001f1 },
1176 	{ 0x0d, 0x02214030 },
1177 	{ 0x0e, 0x01014010 },
1178 	{ 0x0f, 0x02a19020 },
1179 	{ 0x10, 0x01a19021 },
1180 	{ 0x11, 0x90100140 },
1181 	{ 0x12, 0x01813122 },
1182 	{}
1183 };
1184 
1185 /*
1186     STAC 9200 pin configs for
1187     102801C0
1188     102801C1
1189 */
1190 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1191 	{ 0x08, 0x400001f0 },
1192 	{ 0x09, 0x400001f1 },
1193 	{ 0x0d, 0x0221401f },
1194 	{ 0x0e, 0x01014010 },
1195 	{ 0x0f, 0x01813020 },
1196 	{ 0x10, 0x02a19021 },
1197 	{ 0x11, 0x90100140 },
1198 	{ 0x12, 0x400001f2 },
1199 	{}
1200 };
1201 
1202 /*
1203     STAC 9200 pin configs for
1204     102801C4 (Dell Dimension E310)
1205     102801C5
1206     102801C7
1207     102801D9
1208     102801DA
1209     102801E3
1210 */
1211 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1212 	{ 0x08, 0x400001f0 },
1213 	{ 0x09, 0x400001f1 },
1214 	{ 0x0d, 0x0221401f },
1215 	{ 0x0e, 0x01014010 },
1216 	{ 0x0f, 0x01813020 },
1217 	{ 0x10, 0x01a19021 },
1218 	{ 0x11, 0x90100140 },
1219 	{ 0x12, 0x400001f2 },
1220 	{}
1221 };
1222 
1223 
1224 /*
1225     STAC 9200-32 pin configs for
1226     102801B5 (Dell Inspiron 630m)
1227     102801D8 (Dell Inspiron 640m)
1228 */
1229 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1230 	{ 0x08, 0x40c003fa },
1231 	{ 0x09, 0x03441340 },
1232 	{ 0x0d, 0x0321121f },
1233 	{ 0x0e, 0x90170310 },
1234 	{ 0x0f, 0x408003fb },
1235 	{ 0x10, 0x03a11020 },
1236 	{ 0x11, 0x401003fc },
1237 	{ 0x12, 0x403003fd },
1238 	{}
1239 };
1240 
1241 /*
1242     STAC 9200-32 pin configs for
1243     102801C2 (Dell Latitude D620)
1244     102801C8
1245     102801CC (Dell Latitude D820)
1246     102801D4
1247     102801D6
1248 */
1249 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1250 	{ 0x08, 0x40c003fa },
1251 	{ 0x09, 0x0144131f },
1252 	{ 0x0d, 0x0321121f },
1253 	{ 0x0e, 0x90170310 },
1254 	{ 0x0f, 0x90a70321 },
1255 	{ 0x10, 0x03a11020 },
1256 	{ 0x11, 0x401003fb },
1257 	{ 0x12, 0x40f000fc },
1258 	{}
1259 };
1260 
1261 /*
1262     STAC 9200-32 pin configs for
1263     102801CE (Dell XPS M1710)
1264     102801CF (Dell Precision M90)
1265 */
1266 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1267 	{ 0x08, 0x40c003fa },
1268 	{ 0x09, 0x01441340 },
1269 	{ 0x0d, 0x0421421f },
1270 	{ 0x0e, 0x90170310 },
1271 	{ 0x0f, 0x408003fb },
1272 	{ 0x10, 0x04a1102e },
1273 	{ 0x11, 0x90170311 },
1274 	{ 0x12, 0x403003fc },
1275 	{}
1276 };
1277 
1278 /*
1279     STAC 9200-32 pin configs for
1280     102801C9
1281     102801CA
1282     102801CB (Dell Latitude 120L)
1283     102801D3
1284 */
1285 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1286 	{ 0x08, 0x40c003fa },
1287 	{ 0x09, 0x404003fb },
1288 	{ 0x0d, 0x0321121f },
1289 	{ 0x0e, 0x90170310 },
1290 	{ 0x0f, 0x408003fc },
1291 	{ 0x10, 0x03a11020 },
1292 	{ 0x11, 0x401003fd },
1293 	{ 0x12, 0x403003fe },
1294 	{}
1295 };
1296 
1297 /*
1298     STAC 9200-32 pin configs for
1299     102801BD (Dell Inspiron E1505n)
1300     102801EE
1301     102801EF
1302 */
1303 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1304 	{ 0x08, 0x40c003fa },
1305 	{ 0x09, 0x01441340 },
1306 	{ 0x0d, 0x0421121f },
1307 	{ 0x0e, 0x90170310 },
1308 	{ 0x0f, 0x408003fb },
1309 	{ 0x10, 0x04a11020 },
1310 	{ 0x11, 0x401003fc },
1311 	{ 0x12, 0x403003fd },
1312 	{}
1313 };
1314 
1315 /*
1316     STAC 9200-32 pin configs for
1317     102801F5 (Dell Inspiron 1501)
1318     102801F6
1319 */
1320 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1321 	{ 0x08, 0x40c003fa },
1322 	{ 0x09, 0x404003fb },
1323 	{ 0x0d, 0x0421121f },
1324 	{ 0x0e, 0x90170310 },
1325 	{ 0x0f, 0x408003fc },
1326 	{ 0x10, 0x04a11020 },
1327 	{ 0x11, 0x401003fd },
1328 	{ 0x12, 0x403003fe },
1329 	{}
1330 };
1331 
1332 /*
1333     STAC 9200-32
1334     102801CD (Dell Inspiron E1705/9400)
1335 */
1336 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1337 	{ 0x08, 0x40c003fa },
1338 	{ 0x09, 0x01441340 },
1339 	{ 0x0d, 0x0421121f },
1340 	{ 0x0e, 0x90170310 },
1341 	{ 0x0f, 0x90170310 },
1342 	{ 0x10, 0x04a11020 },
1343 	{ 0x11, 0x90170310 },
1344 	{ 0x12, 0x40f003fc },
1345 	{}
1346 };
1347 
1348 static const struct hda_pintbl oqo9200_pin_configs[] = {
1349 	{ 0x08, 0x40c000f0 },
1350 	{ 0x09, 0x404000f1 },
1351 	{ 0x0d, 0x0221121f },
1352 	{ 0x0e, 0x02211210 },
1353 	{ 0x0f, 0x90170111 },
1354 	{ 0x10, 0x90a70120 },
1355 	{ 0x11, 0x400000f2 },
1356 	{ 0x12, 0x400000f3 },
1357 	{}
1358 };
1359 
1360 
1361 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1362 				     const struct hda_fixup *fix, int action)
1363 {
1364 	struct sigmatel_spec *spec = codec->spec;
1365 
1366 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1367 		spec->gpio_mask = spec->gpio_dir = 0x09;
1368 		spec->gpio_data = 0x00;
1369 		/* CF-74 has no headphone detection, and the driver should *NOT*
1370 		 * do detection and HP/speaker toggle because the hardware does it.
1371 		 */
1372 		spec->gen.suppress_auto_mute = 1;
1373 	}
1374 }
1375 
1376 
1377 static const struct hda_fixup stac9200_fixups[] = {
1378 	[STAC_REF] = {
1379 		.type = HDA_FIXUP_PINS,
1380 		.v.pins = ref9200_pin_configs,
1381 	},
1382 	[STAC_9200_OQO] = {
1383 		.type = HDA_FIXUP_PINS,
1384 		.v.pins = oqo9200_pin_configs,
1385 		.chained = true,
1386 		.chain_id = STAC_9200_EAPD_INIT,
1387 	},
1388 	[STAC_9200_DELL_D21] = {
1389 		.type = HDA_FIXUP_PINS,
1390 		.v.pins = dell9200_d21_pin_configs,
1391 	},
1392 	[STAC_9200_DELL_D22] = {
1393 		.type = HDA_FIXUP_PINS,
1394 		.v.pins = dell9200_d22_pin_configs,
1395 	},
1396 	[STAC_9200_DELL_D23] = {
1397 		.type = HDA_FIXUP_PINS,
1398 		.v.pins = dell9200_d23_pin_configs,
1399 	},
1400 	[STAC_9200_DELL_M21] = {
1401 		.type = HDA_FIXUP_PINS,
1402 		.v.pins = dell9200_m21_pin_configs,
1403 	},
1404 	[STAC_9200_DELL_M22] = {
1405 		.type = HDA_FIXUP_PINS,
1406 		.v.pins = dell9200_m22_pin_configs,
1407 	},
1408 	[STAC_9200_DELL_M23] = {
1409 		.type = HDA_FIXUP_PINS,
1410 		.v.pins = dell9200_m23_pin_configs,
1411 	},
1412 	[STAC_9200_DELL_M24] = {
1413 		.type = HDA_FIXUP_PINS,
1414 		.v.pins = dell9200_m24_pin_configs,
1415 	},
1416 	[STAC_9200_DELL_M25] = {
1417 		.type = HDA_FIXUP_PINS,
1418 		.v.pins = dell9200_m25_pin_configs,
1419 	},
1420 	[STAC_9200_DELL_M26] = {
1421 		.type = HDA_FIXUP_PINS,
1422 		.v.pins = dell9200_m26_pin_configs,
1423 	},
1424 	[STAC_9200_DELL_M27] = {
1425 		.type = HDA_FIXUP_PINS,
1426 		.v.pins = dell9200_m27_pin_configs,
1427 	},
1428 	[STAC_9200_M4] = {
1429 		.type = HDA_FIXUP_PINS,
1430 		.v.pins = gateway9200_m4_pin_configs,
1431 		.chained = true,
1432 		.chain_id = STAC_9200_EAPD_INIT,
1433 	},
1434 	[STAC_9200_M4_2] = {
1435 		.type = HDA_FIXUP_PINS,
1436 		.v.pins = gateway9200_m4_2_pin_configs,
1437 		.chained = true,
1438 		.chain_id = STAC_9200_EAPD_INIT,
1439 	},
1440 	[STAC_9200_PANASONIC] = {
1441 		.type = HDA_FIXUP_FUNC,
1442 		.v.func = stac9200_fixup_panasonic,
1443 	},
1444 	[STAC_9200_EAPD_INIT] = {
1445 		.type = HDA_FIXUP_VERBS,
1446 		.v.verbs = (const struct hda_verb[]) {
1447 			{0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1448 			{}
1449 		},
1450 	},
1451 };
1452 
1453 static const struct hda_model_fixup stac9200_models[] = {
1454 	{ .id = STAC_REF, .name = "ref" },
1455 	{ .id = STAC_9200_OQO, .name = "oqo" },
1456 	{ .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1457 	{ .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1458 	{ .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1459 	{ .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1460 	{ .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1461 	{ .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1462 	{ .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1463 	{ .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1464 	{ .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1465 	{ .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1466 	{ .id = STAC_9200_M4, .name = "gateway-m4" },
1467 	{ .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1468 	{ .id = STAC_9200_PANASONIC, .name = "panasonic" },
1469 	{}
1470 };
1471 
1472 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1473 	/* SigmaTel reference board */
1474 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1475 		      "DFI LanParty", STAC_REF),
1476 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1477 		      "DFI LanParty", STAC_REF),
1478 	/* Dell laptops have BIOS problem */
1479 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1480 		      "unknown Dell", STAC_9200_DELL_D21),
1481 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1482 		      "Dell Inspiron 630m", STAC_9200_DELL_M21),
1483 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1484 		      "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1485 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1486 		      "unknown Dell", STAC_9200_DELL_D22),
1487 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1488 		      "unknown Dell", STAC_9200_DELL_D22),
1489 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1490 		      "Dell Latitude D620", STAC_9200_DELL_M22),
1491 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1492 		      "unknown Dell", STAC_9200_DELL_D23),
1493 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1494 		      "unknown Dell", STAC_9200_DELL_D23),
1495 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1496 		      "unknown Dell", STAC_9200_DELL_M22),
1497 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1498 		      "unknown Dell", STAC_9200_DELL_M24),
1499 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1500 		      "unknown Dell", STAC_9200_DELL_M24),
1501 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1502 		      "Dell Latitude 120L", STAC_9200_DELL_M24),
1503 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1504 		      "Dell Latitude D820", STAC_9200_DELL_M22),
1505 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1506 		      "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1507 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1508 		      "Dell XPS M1710", STAC_9200_DELL_M23),
1509 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1510 		      "Dell Precision M90", STAC_9200_DELL_M23),
1511 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1512 		      "unknown Dell", STAC_9200_DELL_M22),
1513 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1514 		      "unknown Dell", STAC_9200_DELL_M22),
1515 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1516 		      "unknown Dell", STAC_9200_DELL_M22),
1517 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1518 		      "Dell Inspiron 640m", STAC_9200_DELL_M21),
1519 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1520 		      "unknown Dell", STAC_9200_DELL_D23),
1521 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1522 		      "unknown Dell", STAC_9200_DELL_D23),
1523 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1524 		      "unknown Dell", STAC_9200_DELL_D21),
1525 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1526 		      "unknown Dell", STAC_9200_DELL_D23),
1527 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1528 		      "unknown Dell", STAC_9200_DELL_D21),
1529 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1530 		      "unknown Dell", STAC_9200_DELL_M25),
1531 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1532 		      "unknown Dell", STAC_9200_DELL_M25),
1533 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1534 		      "Dell Inspiron 1501", STAC_9200_DELL_M26),
1535 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1536 		      "unknown Dell", STAC_9200_DELL_M26),
1537 	/* Panasonic */
1538 	SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1539 	/* Gateway machines needs EAPD to be set on resume */
1540 	SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1541 	SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1542 	SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1543 	/* OQO Mobile */
1544 	SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1545 	{} /* terminator */
1546 };
1547 
1548 static const struct hda_pintbl ref925x_pin_configs[] = {
1549 	{ 0x07, 0x40c003f0 },
1550 	{ 0x08, 0x424503f2 },
1551 	{ 0x0a, 0x01813022 },
1552 	{ 0x0b, 0x02a19021 },
1553 	{ 0x0c, 0x90a70320 },
1554 	{ 0x0d, 0x02214210 },
1555 	{ 0x10, 0x01019020 },
1556 	{ 0x11, 0x9033032e },
1557 	{}
1558 };
1559 
1560 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1561 	{ 0x07, 0x40c003f4 },
1562 	{ 0x08, 0x424503f2 },
1563 	{ 0x0a, 0x400000f3 },
1564 	{ 0x0b, 0x02a19020 },
1565 	{ 0x0c, 0x40a000f0 },
1566 	{ 0x0d, 0x90100210 },
1567 	{ 0x10, 0x400003f1 },
1568 	{ 0x11, 0x9033032e },
1569 	{}
1570 };
1571 
1572 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1573 	{ 0x07, 0x40c003f4 },
1574 	{ 0x08, 0x424503f2 },
1575 	{ 0x0a, 0x400000f3 },
1576 	{ 0x0b, 0x02a19020 },
1577 	{ 0x0c, 0x40a000f0 },
1578 	{ 0x0d, 0x90100210 },
1579 	{ 0x10, 0x400003f1 },
1580 	{ 0x11, 0x9033032e },
1581 	{}
1582 };
1583 
1584 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1585 	{ 0x07, 0x40c003f4 },
1586 	{ 0x08, 0x424503f2 },
1587 	{ 0x0a, 0x400000f3 },
1588 	{ 0x0b, 0x02a19020 },
1589 	{ 0x0c, 0x40a000f0 },
1590 	{ 0x0d, 0x90100210 },
1591 	{ 0x10, 0x400003f1 },
1592 	{ 0x11, 0x9033032e },
1593 	{}
1594 };
1595 
1596 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1597 	{ 0x07, 0x40c003f4 },
1598 	{ 0x08, 0x424503f2 },
1599 	{ 0x0a, 0x400000f3 },
1600 	{ 0x0b, 0x02a19020 },
1601 	{ 0x0c, 0x40a000f0 },
1602 	{ 0x0d, 0x90100210 },
1603 	{ 0x10, 0x400003f1 },
1604 	{ 0x11, 0x9033032e },
1605 	{}
1606 };
1607 
1608 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1609 	{ 0x07, 0x40c003f4 },
1610 	{ 0x08, 0x424503f2 },
1611 	{ 0x0a, 0x400000f3 },
1612 	{ 0x0b, 0x02a19020 },
1613 	{ 0x0c, 0x40a000f0 },
1614 	{ 0x0d, 0x90100210 },
1615 	{ 0x10, 0x400003f1 },
1616 	{ 0x11, 0x503303f3 },
1617 	{}
1618 };
1619 
1620 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1621 	{ 0x07, 0x40c003f4 },
1622 	{ 0x08, 0x424503f2 },
1623 	{ 0x0a, 0x400000f3 },
1624 	{ 0x0b, 0x02a19020 },
1625 	{ 0x0c, 0x40a000f0 },
1626 	{ 0x0d, 0x90100210 },
1627 	{ 0x10, 0x400003f1 },
1628 	{ 0x11, 0x9033032e },
1629 	{}
1630 };
1631 
1632 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1633 	{ 0x07, 0x40c003f4 },
1634 	{ 0x08, 0x424503f2 },
1635 	{ 0x0a, 0x400000f3 },
1636 	{ 0x0b, 0x02a19020 },
1637 	{ 0x0c, 0x40a000f0 },
1638 	{ 0x0d, 0x90100210 },
1639 	{ 0x10, 0x400003f1 },
1640 	{ 0x11, 0x90330320 },
1641 	{}
1642 };
1643 
1644 static const struct hda_fixup stac925x_fixups[] = {
1645 	[STAC_REF] = {
1646 		.type = HDA_FIXUP_PINS,
1647 		.v.pins = ref925x_pin_configs,
1648 	},
1649 	[STAC_M1] = {
1650 		.type = HDA_FIXUP_PINS,
1651 		.v.pins = stac925xM1_pin_configs,
1652 	},
1653 	[STAC_M1_2] = {
1654 		.type = HDA_FIXUP_PINS,
1655 		.v.pins = stac925xM1_2_pin_configs,
1656 	},
1657 	[STAC_M2] = {
1658 		.type = HDA_FIXUP_PINS,
1659 		.v.pins = stac925xM2_pin_configs,
1660 	},
1661 	[STAC_M2_2] = {
1662 		.type = HDA_FIXUP_PINS,
1663 		.v.pins = stac925xM2_2_pin_configs,
1664 	},
1665 	[STAC_M3] = {
1666 		.type = HDA_FIXUP_PINS,
1667 		.v.pins = stac925xM3_pin_configs,
1668 	},
1669 	[STAC_M5] = {
1670 		.type = HDA_FIXUP_PINS,
1671 		.v.pins = stac925xM5_pin_configs,
1672 	},
1673 	[STAC_M6] = {
1674 		.type = HDA_FIXUP_PINS,
1675 		.v.pins = stac925xM6_pin_configs,
1676 	},
1677 };
1678 
1679 static const struct hda_model_fixup stac925x_models[] = {
1680 	{ .id = STAC_REF, .name = "ref" },
1681 	{ .id = STAC_M1, .name = "m1" },
1682 	{ .id = STAC_M1_2, .name = "m1-2" },
1683 	{ .id = STAC_M2, .name = "m2" },
1684 	{ .id = STAC_M2_2, .name = "m2-2" },
1685 	{ .id = STAC_M3, .name = "m3" },
1686 	{ .id = STAC_M5, .name = "m5" },
1687 	{ .id = STAC_M6, .name = "m6" },
1688 	{}
1689 };
1690 
1691 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1692 	/* SigmaTel reference board */
1693 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1694 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1695 	SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1696 
1697 	/* Default table for unknown ID */
1698 	SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1699 
1700 	/* gateway machines are checked via codec ssid */
1701 	SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1702 	SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1703 	SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1704 	SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1705 	SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1706 	/* Not sure about the brand name for those */
1707 	SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1708 	SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1709 	SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1710 	SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1711 	{} /* terminator */
1712 };
1713 
1714 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1715 	{ 0x0a, 0x02214030 },
1716 	{ 0x0b, 0x02a19040 },
1717 	{ 0x0c, 0x01a19020 },
1718 	{ 0x0d, 0x02214030 },
1719 	{ 0x0e, 0x0181302e },
1720 	{ 0x0f, 0x01014010 },
1721 	{ 0x10, 0x01014020 },
1722 	{ 0x11, 0x01014030 },
1723 	{ 0x12, 0x02319040 },
1724 	{ 0x13, 0x90a000f0 },
1725 	{ 0x14, 0x90a000f0 },
1726 	{ 0x22, 0x01452050 },
1727 	{ 0x23, 0x01452050 },
1728 	{}
1729 };
1730 
1731 static const struct hda_pintbl dell_m6_pin_configs[] = {
1732 	{ 0x0a, 0x0321101f },
1733 	{ 0x0b, 0x4f00000f },
1734 	{ 0x0c, 0x4f0000f0 },
1735 	{ 0x0d, 0x90170110 },
1736 	{ 0x0e, 0x03a11020 },
1737 	{ 0x0f, 0x0321101f },
1738 	{ 0x10, 0x4f0000f0 },
1739 	{ 0x11, 0x4f0000f0 },
1740 	{ 0x12, 0x4f0000f0 },
1741 	{ 0x13, 0x90a60160 },
1742 	{ 0x14, 0x4f0000f0 },
1743 	{ 0x22, 0x4f0000f0 },
1744 	{ 0x23, 0x4f0000f0 },
1745 	{}
1746 };
1747 
1748 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1749 	{ 0x0a, 0x0321101f },
1750 	{ 0x0b, 0x0321101f },
1751 	{ 0x0c, 0x03a11020 },
1752 	{ 0x0d, 0x03014020 },
1753 	{ 0x0e, 0x90170110 },
1754 	{ 0x0f, 0x4f0000f0 },
1755 	{ 0x10, 0x4f0000f0 },
1756 	{ 0x11, 0x4f0000f0 },
1757 	{ 0x12, 0x4f0000f0 },
1758 	{ 0x13, 0x90a60160 },
1759 	{ 0x14, 0x4f0000f0 },
1760 	{ 0x22, 0x4f0000f0 },
1761 	{ 0x23, 0x904601b0 },
1762 	{}
1763 };
1764 
1765 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1766 	{ 0x0a, 0x02214230 },
1767 	{ 0x0b, 0x02A19240 },
1768 	{ 0x0c, 0x01013214 },
1769 	{ 0x0d, 0x01014210 },
1770 	{ 0x0e, 0x01A19250 },
1771 	{ 0x0f, 0x01011212 },
1772 	{ 0x10, 0x01016211 },
1773 	{}
1774 };
1775 
1776 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1777 				   const struct hda_fixup *fix, int action)
1778 {
1779 	struct sigmatel_spec *spec = codec->spec;
1780 
1781 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1782 		return;
1783 
1784 	snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1785 	spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1786 }
1787 
1788 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1789 {
1790 	struct sigmatel_spec *spec = codec->spec;
1791 
1792 	snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1793 	spec->eapd_switch = 0;
1794 }
1795 
1796 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1797 				       const struct hda_fixup *fix, int action)
1798 {
1799 	struct sigmatel_spec *spec = codec->spec;
1800 
1801 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1802 		return;
1803 
1804 	stac92hd73xx_fixup_dell(codec);
1805 	snd_hda_add_verbs(codec, dell_eq_core_init);
1806 	spec->volknob_init = 1;
1807 }
1808 
1809 /* Analog Mics */
1810 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1811 				    const struct hda_fixup *fix, int action)
1812 {
1813 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1814 		return;
1815 
1816 	stac92hd73xx_fixup_dell(codec);
1817 	snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1818 }
1819 
1820 /* Digital Mics */
1821 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1822 				    const struct hda_fixup *fix, int action)
1823 {
1824 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1825 		return;
1826 
1827 	stac92hd73xx_fixup_dell(codec);
1828 	snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1829 }
1830 
1831 /* Both */
1832 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1833 				    const struct hda_fixup *fix, int action)
1834 {
1835 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1836 		return;
1837 
1838 	stac92hd73xx_fixup_dell(codec);
1839 	snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1840 	snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1841 }
1842 
1843 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1844 				    const struct hda_fixup *fix, int action)
1845 {
1846 	struct sigmatel_spec *spec = codec->spec;
1847 
1848 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1849 		return;
1850 
1851 	snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1852 	spec->eapd_switch = 0;
1853 }
1854 
1855 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1856 				     const struct hda_fixup *fix, int action)
1857 {
1858 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
1859 		codec->no_jack_detect = 1;
1860 }
1861 
1862 static const struct hda_fixup stac92hd73xx_fixups[] = {
1863 	[STAC_92HD73XX_REF] = {
1864 		.type = HDA_FIXUP_FUNC,
1865 		.v.func = stac92hd73xx_fixup_ref,
1866 	},
1867 	[STAC_DELL_M6_AMIC] = {
1868 		.type = HDA_FIXUP_FUNC,
1869 		.v.func = stac92hd73xx_fixup_dell_m6_amic,
1870 	},
1871 	[STAC_DELL_M6_DMIC] = {
1872 		.type = HDA_FIXUP_FUNC,
1873 		.v.func = stac92hd73xx_fixup_dell_m6_dmic,
1874 	},
1875 	[STAC_DELL_M6_BOTH] = {
1876 		.type = HDA_FIXUP_FUNC,
1877 		.v.func = stac92hd73xx_fixup_dell_m6_both,
1878 	},
1879 	[STAC_DELL_EQ]	= {
1880 		.type = HDA_FIXUP_FUNC,
1881 		.v.func = stac92hd73xx_fixup_dell_eq,
1882 	},
1883 	[STAC_ALIENWARE_M17X] = {
1884 		.type = HDA_FIXUP_FUNC,
1885 		.v.func = stac92hd73xx_fixup_alienware_m17x,
1886 	},
1887 	[STAC_92HD73XX_INTEL] = {
1888 		.type = HDA_FIXUP_PINS,
1889 		.v.pins = intel_dg45id_pin_configs,
1890 	},
1891 	[STAC_92HD73XX_NO_JD] = {
1892 		.type = HDA_FIXUP_FUNC,
1893 		.v.func = stac92hd73xx_fixup_no_jd,
1894 	}
1895 };
1896 
1897 static const struct hda_model_fixup stac92hd73xx_models[] = {
1898 	{ .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1899 	{ .id = STAC_92HD73XX_REF, .name = "ref" },
1900 	{ .id = STAC_92HD73XX_INTEL, .name = "intel" },
1901 	{ .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1902 	{ .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1903 	{ .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1904 	{ .id = STAC_DELL_EQ, .name = "dell-eq" },
1905 	{ .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1906 	{}
1907 };
1908 
1909 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1910 	/* SigmaTel reference board */
1911 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1912 				"DFI LanParty", STAC_92HD73XX_REF),
1913 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1914 				"DFI LanParty", STAC_92HD73XX_REF),
1915 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1916 				"Intel DG45ID", STAC_92HD73XX_INTEL),
1917 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1918 				"Intel DG45FC", STAC_92HD73XX_INTEL),
1919 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1920 				"Dell Studio 1535", STAC_DELL_M6_DMIC),
1921 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1922 				"unknown Dell", STAC_DELL_M6_DMIC),
1923 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1924 				"unknown Dell", STAC_DELL_M6_BOTH),
1925 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1926 				"unknown Dell", STAC_DELL_M6_BOTH),
1927 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1928 				"unknown Dell", STAC_DELL_M6_AMIC),
1929 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1930 				"unknown Dell", STAC_DELL_M6_AMIC),
1931 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1932 				"unknown Dell", STAC_DELL_M6_DMIC),
1933 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1934 				"unknown Dell", STAC_DELL_M6_DMIC),
1935 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1936 				"Dell Studio 1537", STAC_DELL_M6_DMIC),
1937 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1938 				"Dell Studio 17", STAC_DELL_M6_DMIC),
1939 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1940 				"Dell Studio 1555", STAC_DELL_M6_DMIC),
1941 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1942 				"Dell Studio 1557", STAC_DELL_M6_DMIC),
1943 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1944 				"Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1945 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1946 				"Dell Studio 1558", STAC_DELL_M6_DMIC),
1947 	/* codec SSID matching */
1948 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1949 		      "Alienware M17x", STAC_ALIENWARE_M17X),
1950 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1951 		      "Alienware M17x", STAC_ALIENWARE_M17X),
1952 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1953 		      "Alienware M17x R3", STAC_DELL_EQ),
1954 	{} /* terminator */
1955 };
1956 
1957 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1958 	{ 0x0a, 0x02214030 },
1959 	{ 0x0b, 0x02211010 },
1960 	{ 0x0c, 0x02a19020 },
1961 	{ 0x0d, 0x02170130 },
1962 	{ 0x0e, 0x01014050 },
1963 	{ 0x0f, 0x01819040 },
1964 	{ 0x10, 0x01014020 },
1965 	{ 0x11, 0x90a3014e },
1966 	{ 0x1f, 0x01451160 },
1967 	{ 0x20, 0x98560170 },
1968 	{}
1969 };
1970 
1971 static const struct hda_pintbl dell_s14_pin_configs[] = {
1972 	{ 0x0a, 0x0221403f },
1973 	{ 0x0b, 0x0221101f },
1974 	{ 0x0c, 0x02a19020 },
1975 	{ 0x0d, 0x90170110 },
1976 	{ 0x0e, 0x40f000f0 },
1977 	{ 0x0f, 0x40f000f0 },
1978 	{ 0x10, 0x40f000f0 },
1979 	{ 0x11, 0x90a60160 },
1980 	{ 0x1f, 0x40f000f0 },
1981 	{ 0x20, 0x40f000f0 },
1982 	{}
1983 };
1984 
1985 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
1986 	{ 0x0a, 0x02a11020 },
1987 	{ 0x0b, 0x0221101f },
1988 	{ 0x0c, 0x400000f0 },
1989 	{ 0x0d, 0x90170110 },
1990 	{ 0x0e, 0x400000f1 },
1991 	{ 0x0f, 0x400000f2 },
1992 	{ 0x10, 0x400000f3 },
1993 	{ 0x11, 0x90a60160 },
1994 	{ 0x1f, 0x400000f4 },
1995 	{ 0x20, 0x400000f5 },
1996 	{}
1997 };
1998 
1999 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2000 	{ 0x0a, 0x03a12050 },
2001 	{ 0x0b, 0x0321201f },
2002 	{ 0x0c, 0x40f000f0 },
2003 	{ 0x0d, 0x90170110 },
2004 	{ 0x0e, 0x40f000f0 },
2005 	{ 0x0f, 0x40f000f0 },
2006 	{ 0x10, 0x90170110 },
2007 	{ 0x11, 0xd5a30140 },
2008 	{ 0x1f, 0x40f000f0 },
2009 	{ 0x20, 0x40f000f0 },
2010 	{}
2011 };
2012 
2013 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2014 	{ 0x0a, 0x01813050 },
2015 	{ 0x0b, 0x0421201f },
2016 	{ 0x0c, 0x04a1205e },
2017 	{ 0x0d, 0x96130310 },
2018 	{ 0x0e, 0x96130310 },
2019 	{ 0x0f, 0x0101401f },
2020 	{ 0x10, 0x1111611f },
2021 	{ 0x11, 0xd5a30130 },
2022 	{}
2023 };
2024 
2025 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2026 	{ 0x0a, 0x40f000f0 },
2027 	{ 0x0b, 0x0221101f },
2028 	{ 0x0c, 0x02a11020 },
2029 	{ 0x0d, 0x92170110 },
2030 	{ 0x0e, 0x40f000f0 },
2031 	{ 0x0f, 0x92170110 },
2032 	{ 0x10, 0x40f000f0 },
2033 	{ 0x11, 0xd5a30130 },
2034 	{ 0x1f, 0x40f000f0 },
2035 	{ 0x20, 0x40f000f0 },
2036 	{}
2037 };
2038 
2039 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2040 				   const struct hda_fixup *fix, int action)
2041 {
2042 	struct sigmatel_spec *spec = codec->spec;
2043 
2044 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2045 		return;
2046 
2047 	if (hp_bnb2011_with_dock(codec)) {
2048 		snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2049 		snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2050 	}
2051 
2052 	if (find_mute_led_cfg(codec, spec->default_polarity))
2053 		snd_printd("mute LED gpio %d polarity %d\n",
2054 				spec->gpio_led,
2055 				spec->gpio_led_polarity);
2056 }
2057 
2058 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2059 				   const struct hda_fixup *fix, int action)
2060 {
2061 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2062 		return;
2063 
2064 	snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2065 	snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2066 }
2067 
2068 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2069 				   const struct hda_fixup *fix, int action)
2070 {
2071 	struct sigmatel_spec *spec = codec->spec;
2072 
2073 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2074 		spec->default_polarity = 0;
2075 }
2076 
2077 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2078 				   const struct hda_fixup *fix, int action)
2079 {
2080 	struct sigmatel_spec *spec = codec->spec;
2081 
2082 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2083 		spec->default_polarity = 1;
2084 }
2085 
2086 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2087 				   const struct hda_fixup *fix, int action)
2088 {
2089 	struct sigmatel_spec *spec = codec->spec;
2090 
2091 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2092 		spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2093 }
2094 
2095 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2096 				   const struct hda_fixup *fix, int action)
2097 {
2098 	struct sigmatel_spec *spec = codec->spec;
2099 
2100 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2101 		spec->headset_jack = 1;
2102 }
2103 
2104 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2105 	[STAC_92HD83XXX_REF] = {
2106 		.type = HDA_FIXUP_PINS,
2107 		.v.pins = ref92hd83xxx_pin_configs,
2108 	},
2109 	[STAC_92HD83XXX_PWR_REF] = {
2110 		.type = HDA_FIXUP_PINS,
2111 		.v.pins = ref92hd83xxx_pin_configs,
2112 	},
2113 	[STAC_DELL_S14] = {
2114 		.type = HDA_FIXUP_PINS,
2115 		.v.pins = dell_s14_pin_configs,
2116 	},
2117 	[STAC_DELL_VOSTRO_3500] = {
2118 		.type = HDA_FIXUP_PINS,
2119 		.v.pins = dell_vostro_3500_pin_configs,
2120 	},
2121 	[STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2122 		.type = HDA_FIXUP_PINS,
2123 		.v.pins = hp_cNB11_intquad_pin_configs,
2124 		.chained = true,
2125 		.chain_id = STAC_92HD83XXX_HP,
2126 	},
2127 	[STAC_92HD83XXX_HP] = {
2128 		.type = HDA_FIXUP_FUNC,
2129 		.v.func = stac92hd83xxx_fixup_hp,
2130 	},
2131 	[STAC_HP_DV7_4000] = {
2132 		.type = HDA_FIXUP_PINS,
2133 		.v.pins = hp_dv7_4000_pin_configs,
2134 		.chained = true,
2135 		.chain_id = STAC_92HD83XXX_HP,
2136 	},
2137 	[STAC_HP_ZEPHYR] = {
2138 		.type = HDA_FIXUP_FUNC,
2139 		.v.func = stac92hd83xxx_fixup_hp_zephyr,
2140 		.chained = true,
2141 		.chain_id = STAC_92HD83XXX_HP,
2142 	},
2143 	[STAC_92HD83XXX_HP_LED] = {
2144 		.type = HDA_FIXUP_FUNC,
2145 		.v.func = stac92hd83xxx_fixup_hp_led,
2146 		.chained = true,
2147 		.chain_id = STAC_92HD83XXX_HP,
2148 	},
2149 	[STAC_92HD83XXX_HP_INV_LED] = {
2150 		.type = HDA_FIXUP_FUNC,
2151 		.v.func = stac92hd83xxx_fixup_hp_inv_led,
2152 		.chained = true,
2153 		.chain_id = STAC_92HD83XXX_HP,
2154 	},
2155 	[STAC_92HD83XXX_HP_MIC_LED] = {
2156 		.type = HDA_FIXUP_FUNC,
2157 		.v.func = stac92hd83xxx_fixup_hp_mic_led,
2158 		.chained = true,
2159 		.chain_id = STAC_92HD83XXX_HP,
2160 	},
2161 	[STAC_92HD83XXX_HEADSET_JACK] = {
2162 		.type = HDA_FIXUP_FUNC,
2163 		.v.func = stac92hd83xxx_fixup_headset_jack,
2164 	},
2165 	[STAC_HP_ENVY_BASS] = {
2166 		.type = HDA_FIXUP_PINS,
2167 		.v.pins = (const struct hda_pintbl[]) {
2168 			{ 0x0f, 0x90170111 },
2169 			{}
2170 		},
2171 	},
2172 };
2173 
2174 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2175 	{ .id = STAC_92HD83XXX_REF, .name = "ref" },
2176 	{ .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2177 	{ .id = STAC_DELL_S14, .name = "dell-s14" },
2178 	{ .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2179 	{ .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2180 	{ .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2181 	{ .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2182 	{ .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2183 	{ .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2184 	{ .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2185 	{ .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2186 	{ .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2187 	{}
2188 };
2189 
2190 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2191 	/* SigmaTel reference board */
2192 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2193 		      "DFI LanParty", STAC_92HD83XXX_REF),
2194 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2195 		      "DFI LanParty", STAC_92HD83XXX_REF),
2196 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2197 		      "unknown Dell", STAC_DELL_S14),
2198 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2199 		      "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2200 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2201 		      "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2202 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2203 		      "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2204 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2205 		      "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2206 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2207 		      "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2208 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2209 		      "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2210 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2211 		      "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2212 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2213 		      "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2214 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2215 		      "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2216 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2217 		      "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2218 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2219 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2220 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2221 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2222 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2223 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2224 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2225 			  "HP Pavilion dv7", STAC_HP_DV7_4000),
2226 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2227 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2228 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2229 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2230 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2231 			  "HP Envy Spectre", STAC_HP_ENVY_BASS),
2232 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2233 			  "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
2234 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2235 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2236 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2237 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2238 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2239 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2240 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2241 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2242 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2243 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2244 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2245 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2246 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2247 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2248 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2249 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2250 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2251 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2252 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2253 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2254 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2255 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2256 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2257 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2258 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2259 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2260 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2261 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2262 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2263 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2264 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2265 			  "HP", STAC_HP_ZEPHYR),
2266 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2267 			  "HP Mini", STAC_92HD83XXX_HP_LED),
2268 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2269 			  "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2270 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2271 		      "HP Mini", STAC_92HD83XXX_HP_LED),
2272 	SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2273 	{} /* terminator */
2274 };
2275 
2276 /* HP dv7 bass switch - GPIO5 */
2277 #define stac_hp_bass_gpio_info	snd_ctl_boolean_mono_info
2278 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2279 				 struct snd_ctl_elem_value *ucontrol)
2280 {
2281 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2282 	struct sigmatel_spec *spec = codec->spec;
2283 	ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2284 	return 0;
2285 }
2286 
2287 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2288 				 struct snd_ctl_elem_value *ucontrol)
2289 {
2290 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2291 	struct sigmatel_spec *spec = codec->spec;
2292 	unsigned int gpio_data;
2293 
2294 	gpio_data = (spec->gpio_data & ~0x20) |
2295 		(ucontrol->value.integer.value[0] ? 0x20 : 0);
2296 	if (gpio_data == spec->gpio_data)
2297 		return 0;
2298 	spec->gpio_data = gpio_data;
2299 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2300 	return 1;
2301 }
2302 
2303 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2304 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2305 	.info = stac_hp_bass_gpio_info,
2306 	.get = stac_hp_bass_gpio_get,
2307 	.put = stac_hp_bass_gpio_put,
2308 };
2309 
2310 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2311 {
2312 	struct sigmatel_spec *spec = codec->spec;
2313 
2314 	if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2315 				  &stac_hp_bass_sw_ctrl))
2316 		return -ENOMEM;
2317 
2318 	spec->gpio_mask |= 0x20;
2319 	spec->gpio_dir |= 0x20;
2320 	spec->gpio_data |= 0x20;
2321 	return 0;
2322 }
2323 
2324 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2325 	{ 0x0a, 0x02214030 },
2326 	{ 0x0b, 0x02a19040 },
2327 	{ 0x0c, 0x01a19020 },
2328 	{ 0x0d, 0x01014010 },
2329 	{ 0x0e, 0x0181302e },
2330 	{ 0x0f, 0x01014010 },
2331 	{ 0x14, 0x01019020 },
2332 	{ 0x18, 0x90a000f0 },
2333 	{ 0x19, 0x90a000f0 },
2334 	{ 0x1e, 0x01452050 },
2335 	{ 0x1f, 0x01452050 },
2336 	{}
2337 };
2338 
2339 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2340 	{ 0x0a, 0x0421101f },
2341 	{ 0x0b, 0x04a11221 },
2342 	{ 0x0c, 0x40f000f0 },
2343 	{ 0x0d, 0x90170110 },
2344 	{ 0x0e, 0x23a1902e },
2345 	{ 0x0f, 0x23014250 },
2346 	{ 0x14, 0x40f000f0 },
2347 	{ 0x18, 0x90a000f0 },
2348 	{ 0x19, 0x40f000f0 },
2349 	{ 0x1e, 0x4f0000f0 },
2350 	{ 0x1f, 0x4f0000f0 },
2351 	{}
2352 };
2353 
2354 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2355 	{ 0x0a, 0x0421101f },
2356 	{ 0x0b, 0x04a11221 },
2357 	{ 0x0c, 0x90a70330 },
2358 	{ 0x0d, 0x90170110 },
2359 	{ 0x0e, 0x23a1902e },
2360 	{ 0x0f, 0x23014250 },
2361 	{ 0x14, 0x40f000f0 },
2362 	{ 0x18, 0x40f000f0 },
2363 	{ 0x19, 0x40f000f0 },
2364 	{ 0x1e, 0x044413b0 },
2365 	{ 0x1f, 0x044413b0 },
2366 	{}
2367 };
2368 
2369 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2370 	{ 0x0a, 0x0421101f },
2371 	{ 0x0b, 0x04a11221 },
2372 	{ 0x0c, 0x90a70330 },
2373 	{ 0x0d, 0x90170110 },
2374 	{ 0x0e, 0x40f000f0 },
2375 	{ 0x0f, 0x40f000f0 },
2376 	{ 0x14, 0x40f000f0 },
2377 	{ 0x18, 0x90a000f0 },
2378 	{ 0x19, 0x40f000f0 },
2379 	{ 0x1e, 0x044413b0 },
2380 	{ 0x1f, 0x044413b0 },
2381 	{}
2382 };
2383 
2384 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2385 				    const struct hda_fixup *fix, int action)
2386 {
2387 	struct sigmatel_spec *spec = codec->spec;
2388 
2389 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2390 		return;
2391 
2392 	snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2393 	spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2394 }
2395 
2396 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2397 				      const struct hda_fixup *fix, int action)
2398 {
2399 	struct sigmatel_spec *spec = codec->spec;
2400 	struct hda_jack_tbl *jack;
2401 
2402 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2403 		return;
2404 
2405 	/* Enable VREF power saving on GPIO1 detect */
2406 	snd_hda_codec_write_cache(codec, codec->afg, 0,
2407 				  AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
2408 	snd_hda_jack_detect_enable_callback(codec, codec->afg,
2409 					    STAC_VREF_EVENT,
2410 					    stac_vref_event);
2411 	jack = snd_hda_jack_tbl_get(codec, codec->afg);
2412 	if (jack)
2413 		jack->private_data = 0x02;
2414 
2415 	spec->gpio_mask |= 0x02;
2416 
2417 	/* enable internal microphone */
2418 	snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
2419 }
2420 
2421 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
2422 				       const struct hda_fixup *fix, int action)
2423 {
2424 	struct sigmatel_spec *spec = codec->spec;
2425 
2426 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2427 		return;
2428 	spec->gpio_led = 0x01;
2429 }
2430 
2431 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
2432 				       const struct hda_fixup *fix, int action)
2433 {
2434 	unsigned int cap;
2435 
2436 	switch (action) {
2437 	case HDA_FIXUP_ACT_PRE_PROBE:
2438 		snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
2439 		break;
2440 
2441 	case HDA_FIXUP_ACT_PROBE:
2442 		/* enable bass on HP dv7 */
2443 		cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
2444 		cap &= AC_GPIO_IO_COUNT;
2445 		if (cap >= 6)
2446 			stac_add_hp_bass_switch(codec);
2447 		break;
2448 	}
2449 }
2450 
2451 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
2452 				       const struct hda_fixup *fix, int action)
2453 {
2454 	struct sigmatel_spec *spec = codec->spec;
2455 
2456 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2457 		return;
2458 	spec->gpio_led = 0x08;
2459 }
2460 
2461 
2462 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
2463 				   const struct hda_fixup *fix, int action)
2464 {
2465 	struct sigmatel_spec *spec = codec->spec;
2466 
2467 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2468 		return;
2469 
2470 	if (hp_blike_system(codec->subsystem_id)) {
2471 		unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
2472 		if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
2473 			get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER  ||
2474 			get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
2475 			/* It was changed in the BIOS to just satisfy MS DTM.
2476 			 * Lets turn it back into slaved HP
2477 			 */
2478 			pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
2479 					| (AC_JACK_HP_OUT <<
2480 						AC_DEFCFG_DEVICE_SHIFT);
2481 			pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
2482 							| AC_DEFCFG_SEQUENCE)))
2483 								| 0x1f;
2484 			snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
2485 		}
2486 	}
2487 
2488 	if (find_mute_led_cfg(codec, 1))
2489 		snd_printd("mute LED gpio %d polarity %d\n",
2490 				spec->gpio_led,
2491 				spec->gpio_led_polarity);
2492 
2493 }
2494 
2495 static const struct hda_fixup stac92hd71bxx_fixups[] = {
2496 	[STAC_92HD71BXX_REF] = {
2497 		.type = HDA_FIXUP_FUNC,
2498 		.v.func = stac92hd71bxx_fixup_ref,
2499 	},
2500 	[STAC_DELL_M4_1] = {
2501 		.type = HDA_FIXUP_PINS,
2502 		.v.pins = dell_m4_1_pin_configs,
2503 	},
2504 	[STAC_DELL_M4_2] = {
2505 		.type = HDA_FIXUP_PINS,
2506 		.v.pins = dell_m4_2_pin_configs,
2507 	},
2508 	[STAC_DELL_M4_3] = {
2509 		.type = HDA_FIXUP_PINS,
2510 		.v.pins = dell_m4_3_pin_configs,
2511 	},
2512 	[STAC_HP_M4] = {
2513 		.type = HDA_FIXUP_FUNC,
2514 		.v.func = stac92hd71bxx_fixup_hp_m4,
2515 		.chained = true,
2516 		.chain_id = STAC_92HD71BXX_HP,
2517 	},
2518 	[STAC_HP_DV4] = {
2519 		.type = HDA_FIXUP_FUNC,
2520 		.v.func = stac92hd71bxx_fixup_hp_dv4,
2521 		.chained = true,
2522 		.chain_id = STAC_HP_DV5,
2523 	},
2524 	[STAC_HP_DV5] = {
2525 		.type = HDA_FIXUP_FUNC,
2526 		.v.func = stac92hd71bxx_fixup_hp_dv5,
2527 		.chained = true,
2528 		.chain_id = STAC_92HD71BXX_HP,
2529 	},
2530 	[STAC_HP_HDX] = {
2531 		.type = HDA_FIXUP_FUNC,
2532 		.v.func = stac92hd71bxx_fixup_hp_hdx,
2533 		.chained = true,
2534 		.chain_id = STAC_92HD71BXX_HP,
2535 	},
2536 	[STAC_92HD71BXX_HP] = {
2537 		.type = HDA_FIXUP_FUNC,
2538 		.v.func = stac92hd71bxx_fixup_hp,
2539 	},
2540 };
2541 
2542 static const struct hda_model_fixup stac92hd71bxx_models[] = {
2543 	{ .id = STAC_92HD71BXX_REF, .name = "ref" },
2544 	{ .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
2545 	{ .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
2546 	{ .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
2547 	{ .id = STAC_HP_M4, .name = "hp-m4" },
2548 	{ .id = STAC_HP_DV4, .name = "hp-dv4" },
2549 	{ .id = STAC_HP_DV5, .name = "hp-dv5" },
2550 	{ .id = STAC_HP_HDX, .name = "hp-hdx" },
2551 	{ .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
2552 	{}
2553 };
2554 
2555 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
2556 	/* SigmaTel reference board */
2557 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2558 		      "DFI LanParty", STAC_92HD71BXX_REF),
2559 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2560 		      "DFI LanParty", STAC_92HD71BXX_REF),
2561 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
2562 			  "HP", STAC_HP_DV5),
2563 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
2564 		      "HP", STAC_HP_DV5),
2565 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2566 		      "HP dv4-7", STAC_HP_DV4),
2567 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
2568 		      "HP dv4-7", STAC_HP_DV5),
2569 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
2570 		      "HP HDX", STAC_HP_HDX),  /* HDX18 */
2571 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2572 		      "HP mini 1000", STAC_HP_M4),
2573 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
2574 		      "HP HDX", STAC_HP_HDX),  /* HDX16 */
2575 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
2576 		      "HP dv6", STAC_HP_DV5),
2577 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
2578 		      "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
2579 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
2580 		      "HP DV6", STAC_HP_DV5),
2581 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
2582 		      "HP", STAC_HP_DV5),
2583 	SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
2584 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
2585 				"unknown Dell", STAC_DELL_M4_1),
2586 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
2587 				"unknown Dell", STAC_DELL_M4_1),
2588 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
2589 				"unknown Dell", STAC_DELL_M4_1),
2590 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
2591 				"unknown Dell", STAC_DELL_M4_1),
2592 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
2593 				"unknown Dell", STAC_DELL_M4_1),
2594 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
2595 				"unknown Dell", STAC_DELL_M4_1),
2596 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
2597 				"unknown Dell", STAC_DELL_M4_1),
2598 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
2599 				"unknown Dell", STAC_DELL_M4_2),
2600 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
2601 				"unknown Dell", STAC_DELL_M4_2),
2602 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
2603 				"unknown Dell", STAC_DELL_M4_2),
2604 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
2605 				"unknown Dell", STAC_DELL_M4_2),
2606 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
2607 				"unknown Dell", STAC_DELL_M4_3),
2608 	{} /* terminator */
2609 };
2610 
2611 static const struct hda_pintbl ref922x_pin_configs[] = {
2612 	{ 0x0a, 0x01014010 },
2613 	{ 0x0b, 0x01016011 },
2614 	{ 0x0c, 0x01012012 },
2615 	{ 0x0d, 0x0221401f },
2616 	{ 0x0e, 0x01813122 },
2617 	{ 0x0f, 0x01011014 },
2618 	{ 0x10, 0x01441030 },
2619 	{ 0x11, 0x01c41030 },
2620 	{ 0x15, 0x40000100 },
2621 	{ 0x1b, 0x40000100 },
2622 	{}
2623 };
2624 
2625 /*
2626     STAC 922X pin configs for
2627     102801A7
2628     102801AB
2629     102801A9
2630     102801D1
2631     102801D2
2632 */
2633 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
2634 	{ 0x0a, 0x02214030 },
2635 	{ 0x0b, 0x01a19021 },
2636 	{ 0x0c, 0x01111012 },
2637 	{ 0x0d, 0x01114010 },
2638 	{ 0x0e, 0x02a19020 },
2639 	{ 0x0f, 0x01117011 },
2640 	{ 0x10, 0x400001f0 },
2641 	{ 0x11, 0x400001f1 },
2642 	{ 0x15, 0x01813122 },
2643 	{ 0x1b, 0x400001f2 },
2644 	{}
2645 };
2646 
2647 /*
2648     STAC 922X pin configs for
2649     102801AC
2650     102801D0
2651 */
2652 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
2653 	{ 0x0a, 0x02214030 },
2654 	{ 0x0b, 0x01a19021 },
2655 	{ 0x0c, 0x01111012 },
2656 	{ 0x0d, 0x01114010 },
2657 	{ 0x0e, 0x02a19020 },
2658 	{ 0x0f, 0x01117011 },
2659 	{ 0x10, 0x01451140 },
2660 	{ 0x11, 0x400001f0 },
2661 	{ 0x15, 0x01813122 },
2662 	{ 0x1b, 0x400001f1 },
2663 	{}
2664 };
2665 
2666 /*
2667     STAC 922X pin configs for
2668     102801BF
2669 */
2670 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
2671 	{ 0x0a, 0x0321101f },
2672 	{ 0x0b, 0x01112024 },
2673 	{ 0x0c, 0x01111222 },
2674 	{ 0x0d, 0x91174220 },
2675 	{ 0x0e, 0x03a11050 },
2676 	{ 0x0f, 0x01116221 },
2677 	{ 0x10, 0x90a70330 },
2678 	{ 0x11, 0x01452340 },
2679 	{ 0x15, 0x40C003f1 },
2680 	{ 0x1b, 0x405003f0 },
2681 	{}
2682 };
2683 
2684 /*
2685     STAC 9221 A1 pin configs for
2686     102801D7 (Dell XPS M1210)
2687 */
2688 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
2689 	{ 0x0a, 0x02211211 },
2690 	{ 0x0b, 0x408103ff },
2691 	{ 0x0c, 0x02a1123e },
2692 	{ 0x0d, 0x90100310 },
2693 	{ 0x0e, 0x408003f1 },
2694 	{ 0x0f, 0x0221121f },
2695 	{ 0x10, 0x03451340 },
2696 	{ 0x11, 0x40c003f2 },
2697 	{ 0x15, 0x508003f3 },
2698 	{ 0x1b, 0x405003f4 },
2699 	{}
2700 };
2701 
2702 static const struct hda_pintbl d945gtp3_pin_configs[] = {
2703 	{ 0x0a, 0x0221401f },
2704 	{ 0x0b, 0x01a19022 },
2705 	{ 0x0c, 0x01813021 },
2706 	{ 0x0d, 0x01014010 },
2707 	{ 0x0e, 0x40000100 },
2708 	{ 0x0f, 0x40000100 },
2709 	{ 0x10, 0x40000100 },
2710 	{ 0x11, 0x40000100 },
2711 	{ 0x15, 0x02a19120 },
2712 	{ 0x1b, 0x40000100 },
2713 	{}
2714 };
2715 
2716 static const struct hda_pintbl d945gtp5_pin_configs[] = {
2717 	{ 0x0a, 0x0221401f },
2718 	{ 0x0b, 0x01011012 },
2719 	{ 0x0c, 0x01813024 },
2720 	{ 0x0d, 0x01014010 },
2721 	{ 0x0e, 0x01a19021 },
2722 	{ 0x0f, 0x01016011 },
2723 	{ 0x10, 0x01452130 },
2724 	{ 0x11, 0x40000100 },
2725 	{ 0x15, 0x02a19320 },
2726 	{ 0x1b, 0x40000100 },
2727 	{}
2728 };
2729 
2730 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
2731 	{ 0x0a, 0x0121e21f },
2732 	{ 0x0b, 0x400000ff },
2733 	{ 0x0c, 0x9017e110 },
2734 	{ 0x0d, 0x400000fd },
2735 	{ 0x0e, 0x400000fe },
2736 	{ 0x0f, 0x0181e020 },
2737 	{ 0x10, 0x1145e030 },
2738 	{ 0x11, 0x11c5e240 },
2739 	{ 0x15, 0x400000fc },
2740 	{ 0x1b, 0x400000fb },
2741 	{}
2742 };
2743 
2744 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
2745 	{ 0x0a, 0x0121e21f },
2746 	{ 0x0b, 0x90a7012e },
2747 	{ 0x0c, 0x9017e110 },
2748 	{ 0x0d, 0x400000fd },
2749 	{ 0x0e, 0x400000fe },
2750 	{ 0x0f, 0x0181e020 },
2751 	{ 0x10, 0x1145e230 },
2752 	{ 0x11, 0x500000fa },
2753 	{ 0x15, 0x400000fc },
2754 	{ 0x1b, 0x400000fb },
2755 	{}
2756 };
2757 
2758 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
2759 	{ 0x0a, 0x0121e21f },
2760 	{ 0x0b, 0x90a7012e },
2761 	{ 0x0c, 0x9017e110 },
2762 	{ 0x0d, 0x400000fd },
2763 	{ 0x0e, 0x400000fe },
2764 	{ 0x0f, 0x0181e020 },
2765 	{ 0x10, 0x1145e230 },
2766 	{ 0x11, 0x11c5e240 },
2767 	{ 0x15, 0x400000fc },
2768 	{ 0x1b, 0x400000fb },
2769 	{}
2770 };
2771 
2772 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
2773 	{ 0x0a, 0x0321e21f },
2774 	{ 0x0b, 0x03a1e02e },
2775 	{ 0x0c, 0x9017e110 },
2776 	{ 0x0d, 0x9017e11f },
2777 	{ 0x0e, 0x400000fe },
2778 	{ 0x0f, 0x0381e020 },
2779 	{ 0x10, 0x1345e230 },
2780 	{ 0x11, 0x13c5e240 },
2781 	{ 0x15, 0x400000fc },
2782 	{ 0x1b, 0x400000fb },
2783 	{}
2784 };
2785 
2786 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
2787 	{ 0x0a, 0x0321e21f },
2788 	{ 0x0b, 0x03a1e02e },
2789 	{ 0x0c, 0x9017e110 },
2790 	{ 0x0d, 0x9017e11f },
2791 	{ 0x0e, 0x400000fe },
2792 	{ 0x0f, 0x0381e020 },
2793 	{ 0x10, 0x1345e230 },
2794 	{ 0x11, 0x13c5e240 },
2795 	{ 0x15, 0x400000fc },
2796 	{ 0x1b, 0x400000fb },
2797 	{}
2798 };
2799 
2800 static const struct hda_pintbl ecs202_pin_configs[] = {
2801 	{ 0x0a, 0x0221401f },
2802 	{ 0x0b, 0x02a19020 },
2803 	{ 0x0c, 0x01a19020 },
2804 	{ 0x0d, 0x01114010 },
2805 	{ 0x0e, 0x408000f0 },
2806 	{ 0x0f, 0x01813022 },
2807 	{ 0x10, 0x074510a0 },
2808 	{ 0x11, 0x40c400f1 },
2809 	{ 0x15, 0x9037012e },
2810 	{ 0x1b, 0x40e000f2 },
2811 	{}
2812 };
2813 
2814 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
2815 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
2816 	SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
2817 	SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
2818 	SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
2819 	SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
2820 	SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
2821 	SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
2822 	SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
2823 	SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
2824 	SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
2825 	SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
2826 	SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
2827 	SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
2828 	{}
2829 };
2830 
2831 static const struct hda_fixup stac922x_fixups[];
2832 
2833 /* remap the fixup from codec SSID and apply it */
2834 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
2835 					  const struct hda_fixup *fix,
2836 					  int action)
2837 {
2838 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2839 		return;
2840 	snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
2841 			   stac922x_fixups);
2842 	if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
2843 		snd_hda_apply_fixup(codec, action);
2844 }
2845 
2846 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
2847 					  const struct hda_fixup *fix,
2848 					  int action)
2849 {
2850 	struct sigmatel_spec *spec = codec->spec;
2851 
2852 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2853 		spec->gpio_mask = spec->gpio_dir = 0x03;
2854 		spec->gpio_data = 0x03;
2855 	}
2856 }
2857 
2858 static const struct hda_fixup stac922x_fixups[] = {
2859 	[STAC_D945_REF] = {
2860 		.type = HDA_FIXUP_PINS,
2861 		.v.pins = ref922x_pin_configs,
2862 	},
2863 	[STAC_D945GTP3] = {
2864 		.type = HDA_FIXUP_PINS,
2865 		.v.pins = d945gtp3_pin_configs,
2866 	},
2867 	[STAC_D945GTP5] = {
2868 		.type = HDA_FIXUP_PINS,
2869 		.v.pins = d945gtp5_pin_configs,
2870 	},
2871 	[STAC_INTEL_MAC_AUTO] = {
2872 		.type = HDA_FIXUP_FUNC,
2873 		.v.func = stac922x_fixup_intel_mac_auto,
2874 	},
2875 	[STAC_INTEL_MAC_V1] = {
2876 		.type = HDA_FIXUP_PINS,
2877 		.v.pins = intel_mac_v1_pin_configs,
2878 		.chained = true,
2879 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
2880 	},
2881 	[STAC_INTEL_MAC_V2] = {
2882 		.type = HDA_FIXUP_PINS,
2883 		.v.pins = intel_mac_v2_pin_configs,
2884 		.chained = true,
2885 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
2886 	},
2887 	[STAC_INTEL_MAC_V3] = {
2888 		.type = HDA_FIXUP_PINS,
2889 		.v.pins = intel_mac_v3_pin_configs,
2890 		.chained = true,
2891 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
2892 	},
2893 	[STAC_INTEL_MAC_V4] = {
2894 		.type = HDA_FIXUP_PINS,
2895 		.v.pins = intel_mac_v4_pin_configs,
2896 		.chained = true,
2897 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
2898 	},
2899 	[STAC_INTEL_MAC_V5] = {
2900 		.type = HDA_FIXUP_PINS,
2901 		.v.pins = intel_mac_v5_pin_configs,
2902 		.chained = true,
2903 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
2904 	},
2905 	[STAC_922X_INTEL_MAC_GPIO] = {
2906 		.type = HDA_FIXUP_FUNC,
2907 		.v.func = stac922x_fixup_intel_mac_gpio,
2908 	},
2909 	[STAC_ECS_202] = {
2910 		.type = HDA_FIXUP_PINS,
2911 		.v.pins = ecs202_pin_configs,
2912 	},
2913 	[STAC_922X_DELL_D81] = {
2914 		.type = HDA_FIXUP_PINS,
2915 		.v.pins = dell_922x_d81_pin_configs,
2916 	},
2917 	[STAC_922X_DELL_D82] = {
2918 		.type = HDA_FIXUP_PINS,
2919 		.v.pins = dell_922x_d82_pin_configs,
2920 	},
2921 	[STAC_922X_DELL_M81] = {
2922 		.type = HDA_FIXUP_PINS,
2923 		.v.pins = dell_922x_m81_pin_configs,
2924 	},
2925 	[STAC_922X_DELL_M82] = {
2926 		.type = HDA_FIXUP_PINS,
2927 		.v.pins = dell_922x_m82_pin_configs,
2928 	},
2929 };
2930 
2931 static const struct hda_model_fixup stac922x_models[] = {
2932 	{ .id = STAC_D945_REF, .name = "ref" },
2933 	{ .id = STAC_D945GTP5, .name = "5stack" },
2934 	{ .id = STAC_D945GTP3, .name = "3stack" },
2935 	{ .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
2936 	{ .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
2937 	{ .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
2938 	{ .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
2939 	{ .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
2940 	{ .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
2941 	{ .id = STAC_ECS_202, .name = "ecs202" },
2942 	{ .id = STAC_922X_DELL_D81, .name = "dell-d81" },
2943 	{ .id = STAC_922X_DELL_D82, .name = "dell-d82" },
2944 	{ .id = STAC_922X_DELL_M81, .name = "dell-m81" },
2945 	{ .id = STAC_922X_DELL_M82, .name = "dell-m82" },
2946 	/* for backward compatibility */
2947 	{ .id = STAC_INTEL_MAC_V3, .name = "macmini" },
2948 	{ .id = STAC_INTEL_MAC_V5, .name = "macbook" },
2949 	{ .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
2950 	{ .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
2951 	{ .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
2952 	{ .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
2953 	{}
2954 };
2955 
2956 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
2957 	/* SigmaTel reference board */
2958 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2959 		      "DFI LanParty", STAC_D945_REF),
2960 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2961 		      "DFI LanParty", STAC_D945_REF),
2962 	/* Intel 945G based systems */
2963 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2964 		      "Intel D945G", STAC_D945GTP3),
2965 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2966 		      "Intel D945G", STAC_D945GTP3),
2967 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2968 		      "Intel D945G", STAC_D945GTP3),
2969 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2970 		      "Intel D945G", STAC_D945GTP3),
2971 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2972 		      "Intel D945G", STAC_D945GTP3),
2973 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2974 		      "Intel D945G", STAC_D945GTP3),
2975 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2976 		      "Intel D945G", STAC_D945GTP3),
2977 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2978 		      "Intel D945G", STAC_D945GTP3),
2979 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2980 		      "Intel D945G", STAC_D945GTP3),
2981 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2982 		      "Intel D945G", STAC_D945GTP3),
2983 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2984 		      "Intel D945G", STAC_D945GTP3),
2985 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2986 		      "Intel D945G", STAC_D945GTP3),
2987 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2988 		      "Intel D945G", STAC_D945GTP3),
2989 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2990 		      "Intel D945G", STAC_D945GTP3),
2991 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2992 		      "Intel D945G", STAC_D945GTP3),
2993 	/* Intel D945G 5-stack systems */
2994 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2995 		      "Intel D945G", STAC_D945GTP5),
2996 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2997 		      "Intel D945G", STAC_D945GTP5),
2998 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2999 		      "Intel D945G", STAC_D945GTP5),
3000 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3001 		      "Intel D945G", STAC_D945GTP5),
3002 	/* Intel 945P based systems */
3003 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3004 		      "Intel D945P", STAC_D945GTP3),
3005 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3006 		      "Intel D945P", STAC_D945GTP3),
3007 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3008 		      "Intel D945P", STAC_D945GTP3),
3009 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3010 		      "Intel D945P", STAC_D945GTP3),
3011 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3012 		      "Intel D945P", STAC_D945GTP3),
3013 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3014 		      "Intel D945P", STAC_D945GTP5),
3015 	/* other intel */
3016 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3017 		      "Intel D945", STAC_D945_REF),
3018 	/* other systems  */
3019 
3020 	/* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3021 	SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3022 
3023 	/* Dell systems  */
3024 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3025 		      "unknown Dell", STAC_922X_DELL_D81),
3026 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3027 		      "unknown Dell", STAC_922X_DELL_D81),
3028 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3029 		      "unknown Dell", STAC_922X_DELL_D81),
3030 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3031 		      "unknown Dell", STAC_922X_DELL_D82),
3032 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3033 		      "unknown Dell", STAC_922X_DELL_M81),
3034 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3035 		      "unknown Dell", STAC_922X_DELL_D82),
3036 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3037 		      "unknown Dell", STAC_922X_DELL_D81),
3038 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3039 		      "unknown Dell", STAC_922X_DELL_D81),
3040 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3041 		      "Dell XPS M1210", STAC_922X_DELL_M82),
3042 	/* ECS/PC Chips boards */
3043 	SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3044 		      "ECS/PC chips", STAC_ECS_202),
3045 	{} /* terminator */
3046 };
3047 
3048 static const struct hda_pintbl ref927x_pin_configs[] = {
3049 	{ 0x0a, 0x02214020 },
3050 	{ 0x0b, 0x02a19080 },
3051 	{ 0x0c, 0x0181304e },
3052 	{ 0x0d, 0x01014010 },
3053 	{ 0x0e, 0x01a19040 },
3054 	{ 0x0f, 0x01011012 },
3055 	{ 0x10, 0x01016011 },
3056 	{ 0x11, 0x0101201f },
3057 	{ 0x12, 0x183301f0 },
3058 	{ 0x13, 0x18a001f0 },
3059 	{ 0x14, 0x18a001f0 },
3060 	{ 0x21, 0x01442070 },
3061 	{ 0x22, 0x01c42190 },
3062 	{ 0x23, 0x40000100 },
3063 	{}
3064 };
3065 
3066 static const struct hda_pintbl d965_3st_pin_configs[] = {
3067 	{ 0x0a, 0x0221401f },
3068 	{ 0x0b, 0x02a19120 },
3069 	{ 0x0c, 0x40000100 },
3070 	{ 0x0d, 0x01014011 },
3071 	{ 0x0e, 0x01a19021 },
3072 	{ 0x0f, 0x01813024 },
3073 	{ 0x10, 0x40000100 },
3074 	{ 0x11, 0x40000100 },
3075 	{ 0x12, 0x40000100 },
3076 	{ 0x13, 0x40000100 },
3077 	{ 0x14, 0x40000100 },
3078 	{ 0x21, 0x40000100 },
3079 	{ 0x22, 0x40000100 },
3080 	{ 0x23, 0x40000100 },
3081 	{}
3082 };
3083 
3084 static const struct hda_pintbl d965_5st_pin_configs[] = {
3085 	{ 0x0a, 0x02214020 },
3086 	{ 0x0b, 0x02a19080 },
3087 	{ 0x0c, 0x0181304e },
3088 	{ 0x0d, 0x01014010 },
3089 	{ 0x0e, 0x01a19040 },
3090 	{ 0x0f, 0x01011012 },
3091 	{ 0x10, 0x01016011 },
3092 	{ 0x11, 0x40000100 },
3093 	{ 0x12, 0x40000100 },
3094 	{ 0x13, 0x40000100 },
3095 	{ 0x14, 0x40000100 },
3096 	{ 0x21, 0x01442070 },
3097 	{ 0x22, 0x40000100 },
3098 	{ 0x23, 0x40000100 },
3099 	{}
3100 };
3101 
3102 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3103 	{ 0x0a, 0x40000100 },
3104 	{ 0x0b, 0x40000100 },
3105 	{ 0x0c, 0x0181304e },
3106 	{ 0x0d, 0x01014010 },
3107 	{ 0x0e, 0x01a19040 },
3108 	{ 0x0f, 0x01011012 },
3109 	{ 0x10, 0x01016011 },
3110 	{ 0x11, 0x40000100 },
3111 	{ 0x12, 0x40000100 },
3112 	{ 0x13, 0x40000100 },
3113 	{ 0x14, 0x40000100 },
3114 	{ 0x21, 0x01442070 },
3115 	{ 0x22, 0x40000100 },
3116 	{ 0x23, 0x40000100 },
3117 	{}
3118 };
3119 
3120 static const struct hda_pintbl dell_3st_pin_configs[] = {
3121 	{ 0x0a, 0x02211230 },
3122 	{ 0x0b, 0x02a11220 },
3123 	{ 0x0c, 0x01a19040 },
3124 	{ 0x0d, 0x01114210 },
3125 	{ 0x0e, 0x01111212 },
3126 	{ 0x0f, 0x01116211 },
3127 	{ 0x10, 0x01813050 },
3128 	{ 0x11, 0x01112214 },
3129 	{ 0x12, 0x403003fa },
3130 	{ 0x13, 0x90a60040 },
3131 	{ 0x14, 0x90a60040 },
3132 	{ 0x21, 0x404003fb },
3133 	{ 0x22, 0x40c003fc },
3134 	{ 0x23, 0x40000100 },
3135 	{}
3136 };
3137 
3138 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3139 				     const struct hda_fixup *fix, int action)
3140 {
3141 	/* no jack detecion for ref-no-jd model */
3142 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
3143 		codec->no_jack_detect = 1;
3144 }
3145 
3146 static void stac927x_fixup_ref(struct hda_codec *codec,
3147 			       const struct hda_fixup *fix, int action)
3148 {
3149 	struct sigmatel_spec *spec = codec->spec;
3150 
3151 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3152 		snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3153 		spec->eapd_mask = spec->gpio_mask = 0;
3154 		spec->gpio_dir = spec->gpio_data = 0;
3155 	}
3156 }
3157 
3158 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3159 				     const struct hda_fixup *fix, int action)
3160 {
3161 	struct sigmatel_spec *spec = codec->spec;
3162 
3163 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3164 		return;
3165 
3166 	if (codec->subsystem_id != 0x1028022f) {
3167 		/* GPIO2 High = Enable EAPD */
3168 		spec->eapd_mask = spec->gpio_mask = 0x04;
3169 		spec->gpio_dir = spec->gpio_data = 0x04;
3170 	}
3171 
3172 	snd_hda_add_verbs(codec, dell_3st_core_init);
3173 	spec->volknob_init = 1;
3174 }
3175 
3176 static void stac927x_fixup_volknob(struct hda_codec *codec,
3177 				   const struct hda_fixup *fix, int action)
3178 {
3179 	struct sigmatel_spec *spec = codec->spec;
3180 
3181 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3182 		snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3183 		spec->volknob_init = 1;
3184 	}
3185 }
3186 
3187 static const struct hda_fixup stac927x_fixups[] = {
3188 	[STAC_D965_REF_NO_JD] = {
3189 		.type = HDA_FIXUP_FUNC,
3190 		.v.func = stac927x_fixup_ref_no_jd,
3191 		.chained = true,
3192 		.chain_id = STAC_D965_REF,
3193 	},
3194 	[STAC_D965_REF] = {
3195 		.type = HDA_FIXUP_FUNC,
3196 		.v.func = stac927x_fixup_ref,
3197 	},
3198 	[STAC_D965_3ST] = {
3199 		.type = HDA_FIXUP_PINS,
3200 		.v.pins = d965_3st_pin_configs,
3201 		.chained = true,
3202 		.chain_id = STAC_D965_VERBS,
3203 	},
3204 	[STAC_D965_5ST] = {
3205 		.type = HDA_FIXUP_PINS,
3206 		.v.pins = d965_5st_pin_configs,
3207 		.chained = true,
3208 		.chain_id = STAC_D965_VERBS,
3209 	},
3210 	[STAC_D965_VERBS] = {
3211 		.type = HDA_FIXUP_VERBS,
3212 		.v.verbs = d965_core_init,
3213 	},
3214 	[STAC_D965_5ST_NO_FP] = {
3215 		.type = HDA_FIXUP_PINS,
3216 		.v.pins = d965_5st_no_fp_pin_configs,
3217 	},
3218 	[STAC_DELL_3ST] = {
3219 		.type = HDA_FIXUP_PINS,
3220 		.v.pins = dell_3st_pin_configs,
3221 		.chained = true,
3222 		.chain_id = STAC_927X_DELL_DMIC,
3223 	},
3224 	[STAC_DELL_BIOS] = {
3225 		.type = HDA_FIXUP_PINS,
3226 		.v.pins = (const struct hda_pintbl[]) {
3227 			/* configure the analog microphone on some laptops */
3228 			{ 0x0c, 0x90a79130 },
3229 			/* correct the front output jack as a hp out */
3230 			{ 0x0f, 0x0227011f },
3231 			/* correct the front input jack as a mic */
3232 			{ 0x0e, 0x02a79130 },
3233 			{}
3234 		},
3235 		.chained = true,
3236 		.chain_id = STAC_927X_DELL_DMIC,
3237 	},
3238 	[STAC_DELL_BIOS_SPDIF] = {
3239 		.type = HDA_FIXUP_PINS,
3240 		.v.pins = (const struct hda_pintbl[]) {
3241 			/* correct the device field to SPDIF out */
3242 			{ 0x21, 0x01442070 },
3243 			{}
3244 		},
3245 		.chained = true,
3246 		.chain_id = STAC_DELL_BIOS,
3247 	},
3248 	[STAC_927X_DELL_DMIC] = {
3249 		.type = HDA_FIXUP_FUNC,
3250 		.v.func = stac927x_fixup_dell_dmic,
3251 	},
3252 	[STAC_927X_VOLKNOB] = {
3253 		.type = HDA_FIXUP_FUNC,
3254 		.v.func = stac927x_fixup_volknob,
3255 	},
3256 };
3257 
3258 static const struct hda_model_fixup stac927x_models[] = {
3259 	{ .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3260 	{ .id = STAC_D965_REF, .name = "ref" },
3261 	{ .id = STAC_D965_3ST, .name = "3stack" },
3262 	{ .id = STAC_D965_5ST, .name = "5stack" },
3263 	{ .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3264 	{ .id = STAC_DELL_3ST, .name = "dell-3stack" },
3265 	{ .id = STAC_DELL_BIOS, .name = "dell-bios" },
3266 	{ .id = STAC_927X_VOLKNOB, .name = "volknob" },
3267 	{}
3268 };
3269 
3270 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3271 	/* SigmaTel reference board */
3272 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3273 		      "DFI LanParty", STAC_D965_REF),
3274 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3275 		      "DFI LanParty", STAC_D965_REF),
3276 	 /* Intel 946 based systems */
3277 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3278 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3279 	/* 965 based 3 stack systems */
3280 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3281 			   "Intel D965", STAC_D965_3ST),
3282 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3283 			   "Intel D965", STAC_D965_3ST),
3284 	/* Dell 3 stack systems */
3285 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3286 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01ed, "Dell     ", STAC_DELL_3ST),
3287 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f4, "Dell     ", STAC_DELL_3ST),
3288 	/* Dell 3 stack systems with verb table in BIOS */
3289 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3290 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3291 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0227, "Dell Vostro 1400  ", STAC_DELL_BIOS),
3292 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022e, "Dell     ", STAC_DELL_BIOS_SPDIF),
3293 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3294 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0242, "Dell     ", STAC_DELL_BIOS),
3295 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0243, "Dell     ", STAC_DELL_BIOS),
3296 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x02ff, "Dell     ", STAC_DELL_BIOS),
3297 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3298 	/* 965 based 5 stack systems */
3299 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3300 			   "Intel D965", STAC_D965_5ST),
3301 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3302 			   "Intel D965", STAC_D965_5ST),
3303 	/* volume-knob fixes */
3304 	SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3305 	{} /* terminator */
3306 };
3307 
3308 static const struct hda_pintbl ref9205_pin_configs[] = {
3309 	{ 0x0a, 0x40000100 },
3310 	{ 0x0b, 0x40000100 },
3311 	{ 0x0c, 0x01016011 },
3312 	{ 0x0d, 0x01014010 },
3313 	{ 0x0e, 0x01813122 },
3314 	{ 0x0f, 0x01a19021 },
3315 	{ 0x14, 0x01019020 },
3316 	{ 0x16, 0x40000100 },
3317 	{ 0x17, 0x90a000f0 },
3318 	{ 0x18, 0x90a000f0 },
3319 	{ 0x21, 0x01441030 },
3320 	{ 0x22, 0x01c41030 },
3321 	{}
3322 };
3323 
3324 /*
3325     STAC 9205 pin configs for
3326     102801F1
3327     102801F2
3328     102801FC
3329     102801FD
3330     10280204
3331     1028021F
3332     10280228 (Dell Vostro 1500)
3333     10280229 (Dell Vostro 1700)
3334 */
3335 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3336 	{ 0x0a, 0x0321101F },
3337 	{ 0x0b, 0x03A11020 },
3338 	{ 0x0c, 0x400003FA },
3339 	{ 0x0d, 0x90170310 },
3340 	{ 0x0e, 0x400003FB },
3341 	{ 0x0f, 0x400003FC },
3342 	{ 0x14, 0x400003FD },
3343 	{ 0x16, 0x40F000F9 },
3344 	{ 0x17, 0x90A60330 },
3345 	{ 0x18, 0x400003FF },
3346 	{ 0x21, 0x0144131F },
3347 	{ 0x22, 0x40C003FE },
3348 	{}
3349 };
3350 
3351 /*
3352     STAC 9205 pin configs for
3353     102801F9
3354     102801FA
3355     102801FE
3356     102801FF (Dell Precision M4300)
3357     10280206
3358     10280200
3359     10280201
3360 */
3361 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3362 	{ 0x0a, 0x0321101f },
3363 	{ 0x0b, 0x03a11020 },
3364 	{ 0x0c, 0x90a70330 },
3365 	{ 0x0d, 0x90170310 },
3366 	{ 0x0e, 0x400000fe },
3367 	{ 0x0f, 0x400000ff },
3368 	{ 0x14, 0x400000fd },
3369 	{ 0x16, 0x40f000f9 },
3370 	{ 0x17, 0x400000fa },
3371 	{ 0x18, 0x400000fc },
3372 	{ 0x21, 0x0144131f },
3373 	{ 0x22, 0x40c003f8 },
3374 	/* Enable SPDIF in/out */
3375 	{ 0x1f, 0x01441030 },
3376 	{ 0x20, 0x1c410030 },
3377 	{}
3378 };
3379 
3380 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3381 	{ 0x0a, 0x0421101f },
3382 	{ 0x0b, 0x04a11020 },
3383 	{ 0x0c, 0x400003fa },
3384 	{ 0x0d, 0x90170310 },
3385 	{ 0x0e, 0x400003fb },
3386 	{ 0x0f, 0x400003fc },
3387 	{ 0x14, 0x400003fd },
3388 	{ 0x16, 0x400003f9 },
3389 	{ 0x17, 0x90a60330 },
3390 	{ 0x18, 0x400003ff },
3391 	{ 0x21, 0x01441340 },
3392 	{ 0x22, 0x40c003fe },
3393 	{}
3394 };
3395 
3396 static void stac9205_fixup_ref(struct hda_codec *codec,
3397 			       const struct hda_fixup *fix, int action)
3398 {
3399 	struct sigmatel_spec *spec = codec->spec;
3400 
3401 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3402 		snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
3403 		/* SPDIF-In enabled */
3404 		spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
3405 	}
3406 }
3407 
3408 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
3409 				    const struct hda_fixup *fix, int action)
3410 {
3411 	struct sigmatel_spec *spec = codec->spec;
3412 	struct hda_jack_tbl *jack;
3413 
3414 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3415 		snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
3416 
3417 		/* Enable unsol response for GPIO4/Dock HP connection */
3418 		snd_hda_codec_write_cache(codec, codec->afg, 0,
3419 			AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3420 		snd_hda_jack_detect_enable_callback(codec, codec->afg,
3421 						    STAC_VREF_EVENT,
3422 						    stac_vref_event);
3423 		jack = snd_hda_jack_tbl_get(codec, codec->afg);
3424 		if (jack)
3425 			jack->private_data = 0x01;
3426 
3427 		spec->gpio_dir = 0x0b;
3428 		spec->eapd_mask = 0x01;
3429 		spec->gpio_mask = 0x1b;
3430 		spec->gpio_mute = 0x10;
3431 		/* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3432 		 * GPIO3 Low = DRM
3433 		 */
3434 		spec->gpio_data = 0x01;
3435 	}
3436 }
3437 
3438 static void stac9205_fixup_eapd(struct hda_codec *codec,
3439 				const struct hda_fixup *fix, int action)
3440 {
3441 	struct sigmatel_spec *spec = codec->spec;
3442 
3443 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
3444 		spec->eapd_switch = 0;
3445 }
3446 
3447 static const struct hda_fixup stac9205_fixups[] = {
3448 	[STAC_9205_REF] = {
3449 		.type = HDA_FIXUP_FUNC,
3450 		.v.func = stac9205_fixup_ref,
3451 	},
3452 	[STAC_9205_DELL_M42] = {
3453 		.type = HDA_FIXUP_PINS,
3454 		.v.pins = dell_9205_m42_pin_configs,
3455 	},
3456 	[STAC_9205_DELL_M43] = {
3457 		.type = HDA_FIXUP_FUNC,
3458 		.v.func = stac9205_fixup_dell_m43,
3459 	},
3460 	[STAC_9205_DELL_M44] = {
3461 		.type = HDA_FIXUP_PINS,
3462 		.v.pins = dell_9205_m44_pin_configs,
3463 	},
3464 	[STAC_9205_EAPD] = {
3465 		.type = HDA_FIXUP_FUNC,
3466 		.v.func = stac9205_fixup_eapd,
3467 	},
3468 	{}
3469 };
3470 
3471 static const struct hda_model_fixup stac9205_models[] = {
3472 	{ .id = STAC_9205_REF, .name = "ref" },
3473 	{ .id = STAC_9205_DELL_M42, .name = "dell-m42" },
3474 	{ .id = STAC_9205_DELL_M43, .name = "dell-m43" },
3475 	{ .id = STAC_9205_DELL_M44, .name = "dell-m44" },
3476 	{ .id = STAC_9205_EAPD, .name = "eapd" },
3477 	{}
3478 };
3479 
3480 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
3481 	/* SigmaTel reference board */
3482 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3483 		      "DFI LanParty", STAC_9205_REF),
3484 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
3485 		      "SigmaTel", STAC_9205_REF),
3486 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3487 		      "DFI LanParty", STAC_9205_REF),
3488 	/* Dell */
3489 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
3490 		      "unknown Dell", STAC_9205_DELL_M42),
3491 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
3492 		      "unknown Dell", STAC_9205_DELL_M42),
3493 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
3494 		      "Dell Precision", STAC_9205_DELL_M43),
3495 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
3496 		      "Dell Precision", STAC_9205_DELL_M43),
3497 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
3498 		      "Dell Precision", STAC_9205_DELL_M43),
3499 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
3500 		      "unknown Dell", STAC_9205_DELL_M42),
3501 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
3502 		      "unknown Dell", STAC_9205_DELL_M42),
3503 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
3504 		      "Dell Precision", STAC_9205_DELL_M43),
3505 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
3506 		      "Dell Precision M4300", STAC_9205_DELL_M43),
3507 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
3508 		      "unknown Dell", STAC_9205_DELL_M42),
3509 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
3510 		      "Dell Precision", STAC_9205_DELL_M43),
3511 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
3512 		      "Dell Precision", STAC_9205_DELL_M43),
3513 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
3514 		      "Dell Precision", STAC_9205_DELL_M43),
3515 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
3516 		      "Dell Inspiron", STAC_9205_DELL_M44),
3517 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
3518 		      "Dell Vostro 1500", STAC_9205_DELL_M42),
3519 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
3520 		      "Dell Vostro 1700", STAC_9205_DELL_M42),
3521 	/* Gateway */
3522 	SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
3523 	SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
3524 	{} /* terminator */
3525 };
3526 
3527 static int stac_parse_auto_config(struct hda_codec *codec)
3528 {
3529 	struct sigmatel_spec *spec = codec->spec;
3530 	int err;
3531 	int flags = 0;
3532 
3533 	if (spec->headset_jack)
3534 		flags |= HDA_PINCFG_HEADSET_MIC;
3535 
3536 	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
3537 	if (err < 0)
3538 		return err;
3539 
3540 	/* add hooks */
3541 	spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
3542 	spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
3543 
3544 	spec->gen.automute_hook = stac_update_outputs;
3545 	spec->gen.hp_automute_hook = stac_hp_automute;
3546 	spec->gen.line_automute_hook = stac_line_automute;
3547 	spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
3548 
3549 	err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
3550 	if (err < 0)
3551 		return err;
3552 
3553 	/* minimum value is actually mute */
3554 	spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
3555 
3556 	/* setup analog beep controls */
3557 	if (spec->anabeep_nid > 0) {
3558 		err = stac_auto_create_beep_ctls(codec,
3559 						 spec->anabeep_nid);
3560 		if (err < 0)
3561 			return err;
3562 	}
3563 
3564 	/* setup digital beep controls and input device */
3565 #ifdef CONFIG_SND_HDA_INPUT_BEEP
3566 	if (spec->gen.beep_nid) {
3567 		hda_nid_t nid = spec->gen.beep_nid;
3568 		unsigned int caps;
3569 
3570 		err = stac_auto_create_beep_ctls(codec, nid);
3571 		if (err < 0)
3572 			return err;
3573 		if (codec->beep) {
3574 			/* IDT/STAC codecs have linear beep tone parameter */
3575 			codec->beep->linear_tone = spec->linear_tone_beep;
3576 			/* if no beep switch is available, make its own one */
3577 			caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3578 			if (!(caps & AC_AMPCAP_MUTE)) {
3579 				err = stac_beep_switch_ctl(codec);
3580 				if (err < 0)
3581 					return err;
3582 			}
3583 		}
3584 	}
3585 #endif
3586 
3587 	if (spec->gpio_led)
3588 		spec->gen.vmaster_mute.hook = stac_vmaster_hook;
3589 
3590 	if (spec->aloopback_ctl &&
3591 	    snd_hda_get_bool_hint(codec, "loopback") == 1) {
3592 		if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
3593 			return -ENOMEM;
3594 	}
3595 
3596 	if (spec->have_spdif_mux) {
3597 		err = stac_create_spdif_mux_ctls(codec);
3598 		if (err < 0)
3599 			return err;
3600 	}
3601 
3602 	stac_init_power_map(codec);
3603 
3604 	return 0;
3605 }
3606 
3607 
3608 static int stac_init(struct hda_codec *codec)
3609 {
3610 	struct sigmatel_spec *spec = codec->spec;
3611 	unsigned int gpio;
3612 	int i;
3613 
3614 	/* override some hints */
3615 	stac_store_hints(codec);
3616 
3617 	/* set up GPIO */
3618 	gpio = spec->gpio_data;
3619 	/* turn on EAPD statically when spec->eapd_switch isn't set.
3620 	 * otherwise, unsol event will turn it on/off dynamically
3621 	 */
3622 	if (!spec->eapd_switch)
3623 		gpio |= spec->eapd_mask;
3624 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3625 
3626 	snd_hda_gen_init(codec);
3627 
3628 	/* sync the power-map */
3629 	if (spec->num_pwrs)
3630 		snd_hda_codec_write(codec, codec->afg, 0,
3631 				    AC_VERB_IDT_SET_POWER_MAP,
3632 				    spec->power_map_bits);
3633 
3634 	/* power down inactive ADCs */
3635 	if (spec->powerdown_adcs) {
3636 		for (i = 0; i < spec->gen.num_all_adcs; i++) {
3637 			if (spec->active_adcs & (1 << i))
3638 				continue;
3639 			snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
3640 					    AC_VERB_SET_POWER_STATE,
3641 					    AC_PWRST_D3);
3642 		}
3643 	}
3644 
3645 	return 0;
3646 }
3647 
3648 static void stac_shutup(struct hda_codec *codec)
3649 {
3650 	struct sigmatel_spec *spec = codec->spec;
3651 
3652 	snd_hda_shutup_pins(codec);
3653 
3654 	if (spec->eapd_mask)
3655 		stac_gpio_set(codec, spec->gpio_mask,
3656 				spec->gpio_dir, spec->gpio_data &
3657 				~spec->eapd_mask);
3658 }
3659 
3660 #define stac_free	snd_hda_gen_free
3661 
3662 #ifdef CONFIG_PROC_FS
3663 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
3664 			       struct hda_codec *codec, hda_nid_t nid)
3665 {
3666 	if (nid == codec->afg)
3667 		snd_iprintf(buffer, "Power-Map: 0x%02x\n",
3668 			    snd_hda_codec_read(codec, nid, 0,
3669 					       AC_VERB_IDT_GET_POWER_MAP, 0));
3670 }
3671 
3672 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
3673 				  struct hda_codec *codec,
3674 				  unsigned int verb)
3675 {
3676 	snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
3677 		    snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
3678 }
3679 
3680 /* stac92hd71bxx, stac92hd73xx */
3681 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
3682 				 struct hda_codec *codec, hda_nid_t nid)
3683 {
3684 	stac92hd_proc_hook(buffer, codec, nid);
3685 	if (nid == codec->afg)
3686 		analog_loop_proc_hook(buffer, codec, 0xfa0);
3687 }
3688 
3689 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
3690 			       struct hda_codec *codec, hda_nid_t nid)
3691 {
3692 	if (nid == codec->afg)
3693 		analog_loop_proc_hook(buffer, codec, 0xfe0);
3694 }
3695 
3696 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
3697 			       struct hda_codec *codec, hda_nid_t nid)
3698 {
3699 	if (nid == codec->afg)
3700 		analog_loop_proc_hook(buffer, codec, 0xfeb);
3701 }
3702 #else
3703 #define stac92hd_proc_hook	NULL
3704 #define stac92hd7x_proc_hook	NULL
3705 #define stac9205_proc_hook	NULL
3706 #define stac927x_proc_hook	NULL
3707 #endif
3708 
3709 #ifdef CONFIG_PM
3710 static int stac_resume(struct hda_codec *codec)
3711 {
3712 	codec->patch_ops.init(codec);
3713 	snd_hda_codec_resume_amp(codec);
3714 	snd_hda_codec_resume_cache(codec);
3715 	return 0;
3716 }
3717 
3718 static int stac_suspend(struct hda_codec *codec)
3719 {
3720 	stac_shutup(codec);
3721 	return 0;
3722 }
3723 
3724 static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
3725 				 unsigned int power_state)
3726 {
3727 	unsigned int afg_power_state = power_state;
3728 	struct sigmatel_spec *spec = codec->spec;
3729 
3730 	if (power_state == AC_PWRST_D3) {
3731 		if (spec->vref_mute_led_nid) {
3732 			/* with vref-out pin used for mute led control
3733 			 * codec AFG is prevented from D3 state
3734 			 */
3735 			afg_power_state = AC_PWRST_D1;
3736 		}
3737 		/* this delay seems necessary to avoid click noise at power-down */
3738 		msleep(100);
3739 	}
3740 	snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
3741 			afg_power_state);
3742 	snd_hda_codec_set_power_to_all(codec, fg, power_state);
3743 }
3744 #else
3745 #define stac_suspend		NULL
3746 #define stac_resume		NULL
3747 #define stac_set_power_state	NULL
3748 #endif /* CONFIG_PM */
3749 
3750 static const struct hda_codec_ops stac_patch_ops = {
3751 	.build_controls = snd_hda_gen_build_controls,
3752 	.build_pcms = snd_hda_gen_build_pcms,
3753 	.init = stac_init,
3754 	.free = stac_free,
3755 	.unsol_event = snd_hda_jack_unsol_event,
3756 #ifdef CONFIG_PM
3757 	.suspend = stac_suspend,
3758 	.resume = stac_resume,
3759 #endif
3760 	.reboot_notify = stac_shutup,
3761 };
3762 
3763 static int alloc_stac_spec(struct hda_codec *codec)
3764 {
3765 	struct sigmatel_spec *spec;
3766 
3767 	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3768 	if (!spec)
3769 		return -ENOMEM;
3770 	snd_hda_gen_spec_init(&spec->gen);
3771 	codec->spec = spec;
3772 	codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
3773 	return 0;
3774 }
3775 
3776 static int patch_stac9200(struct hda_codec *codec)
3777 {
3778 	struct sigmatel_spec *spec;
3779 	int err;
3780 
3781 	err = alloc_stac_spec(codec);
3782 	if (err < 0)
3783 		return err;
3784 
3785 	spec = codec->spec;
3786 	spec->linear_tone_beep = 1;
3787 	spec->gen.own_eapd_ctl = 1;
3788 
3789 	codec->patch_ops = stac_patch_ops;
3790 	codec->power_filter = snd_hda_codec_eapd_power_filter;
3791 
3792 	snd_hda_add_verbs(codec, stac9200_eapd_init);
3793 
3794 	snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
3795 			   stac9200_fixups);
3796 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3797 
3798 	err = stac_parse_auto_config(codec);
3799 	if (err < 0) {
3800 		stac_free(codec);
3801 		return err;
3802 	}
3803 
3804 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3805 
3806 	return 0;
3807 }
3808 
3809 static int patch_stac925x(struct hda_codec *codec)
3810 {
3811 	struct sigmatel_spec *spec;
3812 	int err;
3813 
3814 	err = alloc_stac_spec(codec);
3815 	if (err < 0)
3816 		return err;
3817 
3818 	spec = codec->spec;
3819 	spec->linear_tone_beep = 1;
3820 	spec->gen.own_eapd_ctl = 1;
3821 
3822 	codec->patch_ops = stac_patch_ops;
3823 
3824 	snd_hda_add_verbs(codec, stac925x_core_init);
3825 
3826 	snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
3827 			   stac925x_fixups);
3828 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3829 
3830 	err = stac_parse_auto_config(codec);
3831 	if (err < 0) {
3832 		stac_free(codec);
3833 		return err;
3834 	}
3835 
3836 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3837 
3838 	return 0;
3839 }
3840 
3841 static int patch_stac92hd73xx(struct hda_codec *codec)
3842 {
3843 	struct sigmatel_spec *spec;
3844 	int err;
3845 	int num_dacs;
3846 
3847 	err = alloc_stac_spec(codec);
3848 	if (err < 0)
3849 		return err;
3850 
3851 	spec = codec->spec;
3852 	spec->linear_tone_beep = 0;
3853 	spec->gen.mixer_nid = 0x1d;
3854 	spec->have_spdif_mux = 1;
3855 
3856 	num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
3857 	if (num_dacs < 3 || num_dacs > 5) {
3858 		printk(KERN_WARNING "hda_codec: Could not determine "
3859 		       "number of channels defaulting to DAC count\n");
3860 		num_dacs = 5;
3861 	}
3862 
3863 	switch (num_dacs) {
3864 	case 0x3: /* 6 Channel */
3865 		spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
3866 		break;
3867 	case 0x4: /* 8 Channel */
3868 		spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
3869 		break;
3870 	case 0x5: /* 10 Channel */
3871 		spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
3872 		break;
3873 	}
3874 
3875 	spec->aloopback_mask = 0x01;
3876 	spec->aloopback_shift = 8;
3877 
3878 	spec->gen.beep_nid = 0x1c; /* digital beep */
3879 
3880 	/* GPIO0 High = Enable EAPD */
3881 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3882 	spec->gpio_data = 0x01;
3883 
3884 	spec->eapd_switch = 1;
3885 
3886 	spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3887 	spec->pwr_nids = stac92hd73xx_pwr_nids;
3888 
3889 	spec->gen.own_eapd_ctl = 1;
3890 	spec->gen.power_down_unused = 1;
3891 
3892 	codec->patch_ops = stac_patch_ops;
3893 
3894 	snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
3895 			   stac92hd73xx_fixups);
3896 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3897 
3898 	if (!spec->volknob_init)
3899 		snd_hda_add_verbs(codec, stac92hd73xx_core_init);
3900 
3901 	err = stac_parse_auto_config(codec);
3902 	if (err < 0) {
3903 		stac_free(codec);
3904 		return err;
3905 	}
3906 
3907 	/* Don't GPIO-mute speakers if there are no internal speakers, because
3908 	 * the GPIO might be necessary for Headphone
3909 	 */
3910 	if (spec->eapd_switch && !has_builtin_speaker(codec))
3911 		spec->eapd_switch = 0;
3912 
3913 	codec->proc_widget_hook = stac92hd7x_proc_hook;
3914 
3915 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3916 
3917 	return 0;
3918 }
3919 
3920 static void stac_setup_gpio(struct hda_codec *codec)
3921 {
3922 	struct sigmatel_spec *spec = codec->spec;
3923 
3924 	if (spec->gpio_led) {
3925 		if (!spec->vref_mute_led_nid) {
3926 			spec->gpio_mask |= spec->gpio_led;
3927 			spec->gpio_dir |= spec->gpio_led;
3928 			spec->gpio_data |= spec->gpio_led;
3929 		} else {
3930 			codec->patch_ops.set_power_state =
3931 					stac_set_power_state;
3932 		}
3933 	}
3934 
3935 	if (spec->mic_mute_led_gpio) {
3936 		spec->gpio_mask |= spec->mic_mute_led_gpio;
3937 		spec->gpio_dir |= spec->mic_mute_led_gpio;
3938 		spec->mic_mute_led_on = true;
3939 		spec->gpio_data |= spec->mic_mute_led_gpio;
3940 
3941 		spec->gen.cap_sync_hook = stac_capture_led_hook;
3942 	}
3943 }
3944 
3945 static int patch_stac92hd83xxx(struct hda_codec *codec)
3946 {
3947 	struct sigmatel_spec *spec;
3948 	int err;
3949 
3950 	err = alloc_stac_spec(codec);
3951 	if (err < 0)
3952 		return err;
3953 
3954 	codec->epss = 0; /* longer delay needed for D3 */
3955 
3956 	spec = codec->spec;
3957 	spec->linear_tone_beep = 0;
3958 	spec->gen.own_eapd_ctl = 1;
3959 	spec->gen.power_down_unused = 1;
3960 	spec->gen.mixer_nid = 0x1b;
3961 
3962 	spec->gen.beep_nid = 0x21; /* digital beep */
3963 	spec->pwr_nids = stac92hd83xxx_pwr_nids;
3964 	spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
3965 	spec->default_polarity = -1; /* no default cfg */
3966 
3967 	codec->patch_ops = stac_patch_ops;
3968 
3969 	snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
3970 
3971 	snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
3972 			   stac92hd83xxx_fixups);
3973 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3974 
3975 	stac_setup_gpio(codec);
3976 
3977 	err = stac_parse_auto_config(codec);
3978 	if (err < 0) {
3979 		stac_free(codec);
3980 		return err;
3981 	}
3982 
3983 	codec->proc_widget_hook = stac92hd_proc_hook;
3984 
3985 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3986 
3987 	return 0;
3988 }
3989 
3990 static const hda_nid_t stac92hd95_pwr_nids[] = {
3991 	0x0a, 0x0b, 0x0c, 0x0d
3992 };
3993 
3994 static int patch_stac92hd95(struct hda_codec *codec)
3995 {
3996 	struct sigmatel_spec *spec;
3997 	int err;
3998 
3999 	err = alloc_stac_spec(codec);
4000 	if (err < 0)
4001 		return err;
4002 
4003 	codec->epss = 0; /* longer delay needed for D3 */
4004 
4005 	spec = codec->spec;
4006 	spec->linear_tone_beep = 0;
4007 	spec->gen.own_eapd_ctl = 1;
4008 	spec->gen.power_down_unused = 1;
4009 
4010 	spec->gen.beep_nid = 0x19; /* digital beep */
4011 	spec->pwr_nids = stac92hd95_pwr_nids;
4012 	spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4013 	spec->default_polarity = -1; /* no default cfg */
4014 
4015 	codec->patch_ops = stac_patch_ops;
4016 
4017 	err = stac_parse_auto_config(codec);
4018 	if (err < 0) {
4019 		stac_free(codec);
4020 		return err;
4021 	}
4022 
4023 	codec->proc_widget_hook = stac92hd_proc_hook;
4024 
4025 	return 0;
4026 }
4027 
4028 static int patch_stac92hd71bxx(struct hda_codec *codec)
4029 {
4030 	struct sigmatel_spec *spec;
4031 	const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
4032 	int err;
4033 
4034 	err = alloc_stac_spec(codec);
4035 	if (err < 0)
4036 		return err;
4037 
4038 	spec = codec->spec;
4039 	spec->linear_tone_beep = 0;
4040 	spec->gen.own_eapd_ctl = 1;
4041 	spec->gen.power_down_unused = 1;
4042 	spec->gen.mixer_nid = 0x17;
4043 	spec->have_spdif_mux = 1;
4044 
4045 	codec->patch_ops = stac_patch_ops;
4046 
4047 	/* GPIO0 = EAPD */
4048 	spec->gpio_mask = 0x01;
4049 	spec->gpio_dir = 0x01;
4050 	spec->gpio_data = 0x01;
4051 
4052 	switch (codec->vendor_id) {
4053 	case 0x111d76b6: /* 4 Port without Analog Mixer */
4054 	case 0x111d76b7:
4055 		unmute_init++;
4056 		break;
4057 	case 0x111d7608: /* 5 Port with Analog Mixer */
4058 		if ((codec->revision_id & 0xf) == 0 ||
4059 		    (codec->revision_id & 0xf) == 1)
4060 			spec->stream_delay = 40; /* 40 milliseconds */
4061 
4062 		/* disable VSW */
4063 		unmute_init++;
4064 		snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4065 		snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4066 		break;
4067 	case 0x111d7603: /* 6 Port with Analog Mixer */
4068 		if ((codec->revision_id & 0xf) == 1)
4069 			spec->stream_delay = 40; /* 40 milliseconds */
4070 
4071 		break;
4072 	}
4073 
4074 	if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4075 		snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4076 
4077 	if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
4078 		snd_hda_sequence_write_cache(codec, unmute_init);
4079 
4080 	spec->aloopback_ctl = &stac92hd71bxx_loopback;
4081 	spec->aloopback_mask = 0x50;
4082 	spec->aloopback_shift = 0;
4083 
4084 	spec->powerdown_adcs = 1;
4085 	spec->gen.beep_nid = 0x26; /* digital beep */
4086 	spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4087 	spec->pwr_nids = stac92hd71bxx_pwr_nids;
4088 
4089 	snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4090 			   stac92hd71bxx_fixups);
4091 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4092 
4093 	stac_setup_gpio(codec);
4094 
4095 	err = stac_parse_auto_config(codec);
4096 	if (err < 0) {
4097 		stac_free(codec);
4098 		return err;
4099 	}
4100 
4101 	codec->proc_widget_hook = stac92hd7x_proc_hook;
4102 
4103 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4104 
4105 	return 0;
4106 }
4107 
4108 static int patch_stac922x(struct hda_codec *codec)
4109 {
4110 	struct sigmatel_spec *spec;
4111 	int err;
4112 
4113 	err = alloc_stac_spec(codec);
4114 	if (err < 0)
4115 		return err;
4116 
4117 	spec = codec->spec;
4118 	spec->linear_tone_beep = 1;
4119 	spec->gen.own_eapd_ctl = 1;
4120 
4121 	codec->patch_ops = stac_patch_ops;
4122 
4123 	snd_hda_add_verbs(codec, stac922x_core_init);
4124 
4125 	/* Fix Mux capture level; max to 2 */
4126 	snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4127 				  (0 << AC_AMPCAP_OFFSET_SHIFT) |
4128 				  (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4129 				  (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4130 				  (0 << AC_AMPCAP_MUTE_SHIFT));
4131 
4132 	snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4133 			   stac922x_fixups);
4134 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4135 
4136 	err = stac_parse_auto_config(codec);
4137 	if (err < 0) {
4138 		stac_free(codec);
4139 		return err;
4140 	}
4141 
4142 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4143 
4144 	return 0;
4145 }
4146 
4147 static const char * const stac927x_spdif_labels[] = {
4148 	"Digital Playback", "ADAT", "Analog Mux 1",
4149 	"Analog Mux 2", "Analog Mux 3", NULL
4150 };
4151 
4152 static int patch_stac927x(struct hda_codec *codec)
4153 {
4154 	struct sigmatel_spec *spec;
4155 	int err;
4156 
4157 	err = alloc_stac_spec(codec);
4158 	if (err < 0)
4159 		return err;
4160 
4161 	spec = codec->spec;
4162 	spec->linear_tone_beep = 1;
4163 	spec->gen.own_eapd_ctl = 1;
4164 	spec->have_spdif_mux = 1;
4165 	spec->spdif_labels = stac927x_spdif_labels;
4166 
4167 	spec->gen.beep_nid = 0x23; /* digital beep */
4168 
4169 	/* GPIO0 High = Enable EAPD */
4170 	spec->eapd_mask = spec->gpio_mask = 0x01;
4171 	spec->gpio_dir = spec->gpio_data = 0x01;
4172 
4173 	spec->aloopback_ctl = &stac927x_loopback;
4174 	spec->aloopback_mask = 0x40;
4175 	spec->aloopback_shift = 0;
4176 	spec->eapd_switch = 1;
4177 
4178 	codec->patch_ops = stac_patch_ops;
4179 
4180 	snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4181 			   stac927x_fixups);
4182 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4183 
4184 	if (!spec->volknob_init)
4185 		snd_hda_add_verbs(codec, stac927x_core_init);
4186 
4187 	err = stac_parse_auto_config(codec);
4188 	if (err < 0) {
4189 		stac_free(codec);
4190 		return err;
4191 	}
4192 
4193 	codec->proc_widget_hook = stac927x_proc_hook;
4194 
4195 	/*
4196 	 * !!FIXME!!
4197 	 * The STAC927x seem to require fairly long delays for certain
4198 	 * command sequences.  With too short delays (even if the answer
4199 	 * is set to RIRB properly), it results in the silence output
4200 	 * on some hardwares like Dell.
4201 	 *
4202 	 * The below flag enables the longer delay (see get_response
4203 	 * in hda_intel.c).
4204 	 */
4205 	codec->bus->needs_damn_long_delay = 1;
4206 
4207 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4208 
4209 	return 0;
4210 }
4211 
4212 static int patch_stac9205(struct hda_codec *codec)
4213 {
4214 	struct sigmatel_spec *spec;
4215 	int err;
4216 
4217 	err = alloc_stac_spec(codec);
4218 	if (err < 0)
4219 		return err;
4220 
4221 	spec = codec->spec;
4222 	spec->linear_tone_beep = 1;
4223 	spec->gen.own_eapd_ctl = 1;
4224 	spec->have_spdif_mux = 1;
4225 
4226 	spec->gen.beep_nid = 0x23; /* digital beep */
4227 
4228 	snd_hda_add_verbs(codec, stac9205_core_init);
4229 	spec->aloopback_ctl = &stac9205_loopback;
4230 
4231 	spec->aloopback_mask = 0x40;
4232 	spec->aloopback_shift = 0;
4233 
4234 	/* GPIO0 High = EAPD */
4235 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4236 	spec->gpio_data = 0x01;
4237 
4238 	/* Turn on/off EAPD per HP plugging */
4239 	spec->eapd_switch = 1;
4240 
4241 	codec->patch_ops = stac_patch_ops;
4242 
4243 	snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4244 			   stac9205_fixups);
4245 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4246 
4247 	err = stac_parse_auto_config(codec);
4248 	if (err < 0) {
4249 		stac_free(codec);
4250 		return err;
4251 	}
4252 
4253 	codec->proc_widget_hook = stac9205_proc_hook;
4254 
4255 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4256 
4257 	return 0;
4258 }
4259 
4260 /*
4261  * STAC9872 hack
4262  */
4263 
4264 static const struct hda_verb stac9872_core_init[] = {
4265 	{0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4266 	{0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4267 	{}
4268 };
4269 
4270 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4271 	{ 0x0a, 0x03211020 },
4272 	{ 0x0b, 0x411111f0 },
4273 	{ 0x0c, 0x411111f0 },
4274 	{ 0x0d, 0x03a15030 },
4275 	{ 0x0e, 0x411111f0 },
4276 	{ 0x0f, 0x90170110 },
4277 	{ 0x11, 0x411111f0 },
4278 	{ 0x13, 0x411111f0 },
4279 	{ 0x14, 0x90a7013e },
4280 	{}
4281 };
4282 
4283 static const struct hda_model_fixup stac9872_models[] = {
4284 	{ .id = STAC_9872_VAIO, .name = "vaio" },
4285 	{}
4286 };
4287 
4288 static const struct hda_fixup stac9872_fixups[] = {
4289 	[STAC_9872_VAIO] = {
4290 		.type = HDA_FIXUP_PINS,
4291 		.v.pins = stac9872_vaio_pin_configs,
4292 	},
4293 };
4294 
4295 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4296 	SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4297 			   "Sony VAIO F/S", STAC_9872_VAIO),
4298 	{} /* terminator */
4299 };
4300 
4301 static int patch_stac9872(struct hda_codec *codec)
4302 {
4303 	struct sigmatel_spec *spec;
4304 	int err;
4305 
4306 	err = alloc_stac_spec(codec);
4307 	if (err < 0)
4308 		return err;
4309 
4310 	spec = codec->spec;
4311 	spec->linear_tone_beep = 1;
4312 	spec->gen.own_eapd_ctl = 1;
4313 
4314 	codec->patch_ops = stac_patch_ops;
4315 
4316 	snd_hda_add_verbs(codec, stac9872_core_init);
4317 
4318 	snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4319 			   stac9872_fixups);
4320 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4321 
4322 	err = stac_parse_auto_config(codec);
4323 	if (err < 0) {
4324 		stac_free(codec);
4325 		return -EINVAL;
4326 	}
4327 
4328 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4329 
4330 	return 0;
4331 }
4332 
4333 
4334 /*
4335  * patch entries
4336  */
4337 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4338  	{ .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4339  	{ .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4340  	{ .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4341  	{ .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4342  	{ .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4343  	{ .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4344  	{ .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4345  	{ .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4346  	{ .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4347  	{ .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4348  	{ .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4349  	{ .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4350  	{ .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4351  	{ .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4352  	{ .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4353  	{ .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4354  	{ .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4355  	{ .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4356  	{ .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4357  	{ .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4358  	{ .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4359  	{ .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4360  	{ .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4361 	{ .id = 0x83847632, .name = "STAC9202",  .patch = patch_stac925x },
4362 	{ .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4363 	{ .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4364 	{ .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4365 	{ .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4366 	{ .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4367 	{ .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4368 	{ .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4369  	/* The following does not take into account .id=0x83847661 when subsys =
4370  	 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4371  	 * currently not fully supported.
4372  	 */
4373  	{ .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4374  	{ .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4375  	{ .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4376 	{ .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4377  	{ .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4378  	{ .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4379  	{ .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4380  	{ .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4381  	{ .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4382  	{ .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4383  	{ .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4384  	{ .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4385 	{ .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4386 	{ .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4387 	{ .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4388 	{ .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4389 	{ .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
4390 	{ .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4391 	{ .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
4392 	{ .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4393 	{ .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4394 	{ .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4395 	{ .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
4396 	{ .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4397 	{ .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4398 	{ .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4399 	{ .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4400 	{ .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
4401 	{ .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4402 	{ .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4403 	{ .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4404 	{ .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4405 	{ .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4406 	{ .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4407 	{ .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4408 	{ .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4409 	{ .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4410 	{ .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4411 	{ .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4412 	{ .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4413 	{ .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4414 	{ .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4415 	{ .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4416 	{ .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4417 	{ .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4418 	{ .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4419 	{ .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4420 	{ .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4421 	{ .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4422 	{ .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4423 	{ .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
4424 	{ .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
4425 	{ .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4426 	{ .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4427 	{ .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
4428 	{ .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
4429 	{ .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4430 	{ .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4431 	{ .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4432 	{ .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
4433 	{ .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
4434 	{ .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
4435 	{ .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
4436 	{ .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
4437 	{ .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
4438 	{ .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
4439 	{ .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
4440 	{ .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
4441 	{} /* terminator */
4442 };
4443 
4444 MODULE_ALIAS("snd-hda-codec-id:8384*");
4445 MODULE_ALIAS("snd-hda-codec-id:111d*");
4446 
4447 MODULE_LICENSE("GPL");
4448 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
4449 
4450 static struct hda_codec_preset_list sigmatel_list = {
4451 	.preset = snd_hda_preset_sigmatel,
4452 	.owner = THIS_MODULE,
4453 };
4454 
4455 static int __init patch_sigmatel_init(void)
4456 {
4457 	return snd_hda_add_codec_preset(&sigmatel_list);
4458 }
4459 
4460 static void __exit patch_sigmatel_exit(void)
4461 {
4462 	snd_hda_delete_codec_preset(&sigmatel_list);
4463 }
4464 
4465 module_init(patch_sigmatel_init)
4466 module_exit(patch_sigmatel_exit)
4467