xref: /openbmc/linux/sound/pci/hda/patch_sigmatel.c (revision 2e6ae11dd0d1c37f44cec51a58fb2092e55ed0f5)
1 /*
2  * Universal Interface for Intel High Definition Audio Codec
3  *
4  * HD audio interface patch for SigmaTel STAC92xx
5  *
6  * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7  * Matt Porter <mporter@embeddedalley.com>
8  *
9  * Based on patch_cmedia.c and patch_realtek.c
10  * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11  *
12  *  This driver is free software; you can redistribute it and/or modify
13  *  it under the terms of the GNU General Public License as published by
14  *  the Free Software Foundation; either version 2 of the License, or
15  *  (at your option) any later version.
16  *
17  *  This driver is distributed in the hope that it will be useful,
18  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
19  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
20  *  GNU General Public License for more details.
21  *
22  *  You should have received a copy of the GNU General Public License
23  *  along with this program; if not, write to the Free Software
24  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
25  */
26 
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include "hda_codec.h"
36 #include "hda_local.h"
37 #include "hda_auto_parser.h"
38 #include "hda_beep.h"
39 #include "hda_jack.h"
40 #include "hda_generic.h"
41 
42 enum {
43 	STAC_REF,
44 	STAC_9200_OQO,
45 	STAC_9200_DELL_D21,
46 	STAC_9200_DELL_D22,
47 	STAC_9200_DELL_D23,
48 	STAC_9200_DELL_M21,
49 	STAC_9200_DELL_M22,
50 	STAC_9200_DELL_M23,
51 	STAC_9200_DELL_M24,
52 	STAC_9200_DELL_M25,
53 	STAC_9200_DELL_M26,
54 	STAC_9200_DELL_M27,
55 	STAC_9200_M4,
56 	STAC_9200_M4_2,
57 	STAC_9200_PANASONIC,
58 	STAC_9200_EAPD_INIT,
59 	STAC_9200_MODELS
60 };
61 
62 enum {
63 	STAC_9205_REF,
64 	STAC_9205_DELL_M42,
65 	STAC_9205_DELL_M43,
66 	STAC_9205_DELL_M44,
67 	STAC_9205_EAPD,
68 	STAC_9205_MODELS
69 };
70 
71 enum {
72 	STAC_92HD73XX_NO_JD, /* no jack-detection */
73 	STAC_92HD73XX_REF,
74 	STAC_92HD73XX_INTEL,
75 	STAC_DELL_M6_AMIC,
76 	STAC_DELL_M6_DMIC,
77 	STAC_DELL_M6_BOTH,
78 	STAC_DELL_EQ,
79 	STAC_ALIENWARE_M17X,
80 	STAC_92HD89XX_HP_FRONT_JACK,
81 	STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
82 	STAC_92HD73XX_ASUS_MOBO,
83 	STAC_92HD73XX_MODELS
84 };
85 
86 enum {
87 	STAC_92HD83XXX_REF,
88 	STAC_92HD83XXX_PWR_REF,
89 	STAC_DELL_S14,
90 	STAC_DELL_VOSTRO_3500,
91 	STAC_92HD83XXX_HP_cNB11_INTQUAD,
92 	STAC_HP_DV7_4000,
93 	STAC_HP_ZEPHYR,
94 	STAC_92HD83XXX_HP_LED,
95 	STAC_92HD83XXX_HP_INV_LED,
96 	STAC_92HD83XXX_HP_MIC_LED,
97 	STAC_HP_LED_GPIO10,
98 	STAC_92HD83XXX_HEADSET_JACK,
99 	STAC_92HD83XXX_HP,
100 	STAC_HP_ENVY_BASS,
101 	STAC_HP_BNB13_EQ,
102 	STAC_HP_ENVY_TS_BASS,
103 	STAC_HP_ENVY_TS_DAC_BIND,
104 	STAC_92HD83XXX_GPIO10_EAPD,
105 	STAC_92HD83XXX_MODELS
106 };
107 
108 enum {
109 	STAC_92HD71BXX_REF,
110 	STAC_DELL_M4_1,
111 	STAC_DELL_M4_2,
112 	STAC_DELL_M4_3,
113 	STAC_HP_M4,
114 	STAC_HP_DV4,
115 	STAC_HP_DV5,
116 	STAC_HP_HDX,
117 	STAC_92HD71BXX_HP,
118 	STAC_92HD71BXX_NO_DMIC,
119 	STAC_92HD71BXX_NO_SMUX,
120 	STAC_92HD71BXX_MODELS
121 };
122 
123 enum {
124 	STAC_92HD95_HP_LED,
125 	STAC_92HD95_HP_BASS,
126 	STAC_92HD95_MODELS
127 };
128 
129 enum {
130 	STAC_925x_REF,
131 	STAC_M1,
132 	STAC_M1_2,
133 	STAC_M2,
134 	STAC_M2_2,
135 	STAC_M3,
136 	STAC_M5,
137 	STAC_M6,
138 	STAC_925x_MODELS
139 };
140 
141 enum {
142 	STAC_D945_REF,
143 	STAC_D945GTP3,
144 	STAC_D945GTP5,
145 	STAC_INTEL_MAC_V1,
146 	STAC_INTEL_MAC_V2,
147 	STAC_INTEL_MAC_V3,
148 	STAC_INTEL_MAC_V4,
149 	STAC_INTEL_MAC_V5,
150 	STAC_INTEL_MAC_AUTO,
151 	STAC_ECS_202,
152 	STAC_922X_DELL_D81,
153 	STAC_922X_DELL_D82,
154 	STAC_922X_DELL_M81,
155 	STAC_922X_DELL_M82,
156 	STAC_922X_INTEL_MAC_GPIO,
157 	STAC_922X_MODELS
158 };
159 
160 enum {
161 	STAC_D965_REF_NO_JD, /* no jack-detection */
162 	STAC_D965_REF,
163 	STAC_D965_3ST,
164 	STAC_D965_5ST,
165 	STAC_D965_5ST_NO_FP,
166 	STAC_D965_VERBS,
167 	STAC_DELL_3ST,
168 	STAC_DELL_BIOS,
169 	STAC_NEMO_DEFAULT,
170 	STAC_DELL_BIOS_AMIC,
171 	STAC_DELL_BIOS_SPDIF,
172 	STAC_927X_DELL_DMIC,
173 	STAC_927X_VOLKNOB,
174 	STAC_927X_MODELS
175 };
176 
177 enum {
178 	STAC_9872_VAIO,
179 	STAC_9872_MODELS
180 };
181 
182 struct sigmatel_spec {
183 	struct hda_gen_spec gen;
184 
185 	unsigned int eapd_switch: 1;
186 	unsigned int linear_tone_beep:1;
187 	unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
188 	unsigned int volknob_init:1; /* special volume-knob initialization */
189 	unsigned int powerdown_adcs:1;
190 	unsigned int have_spdif_mux:1;
191 
192 	/* gpio lines */
193 	unsigned int eapd_mask;
194 	unsigned int gpio_mask;
195 	unsigned int gpio_dir;
196 	unsigned int gpio_data;
197 	unsigned int gpio_mute;
198 	unsigned int gpio_led;
199 	unsigned int gpio_led_polarity;
200 	unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
201 	unsigned int vref_led;
202 	int default_polarity;
203 
204 	unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
205 	unsigned int mic_enabled; /* current mic mute state (bitmask) */
206 
207 	/* stream */
208 	unsigned int stream_delay;
209 
210 	/* analog loopback */
211 	const struct snd_kcontrol_new *aloopback_ctl;
212 	unsigned int aloopback;
213 	unsigned char aloopback_mask;
214 	unsigned char aloopback_shift;
215 
216 	/* power management */
217 	unsigned int power_map_bits;
218 	unsigned int num_pwrs;
219 	const hda_nid_t *pwr_nids;
220 	unsigned int active_adcs;
221 
222 	/* beep widgets */
223 	hda_nid_t anabeep_nid;
224 
225 	/* SPDIF-out mux */
226 	const char * const *spdif_labels;
227 	struct hda_input_mux spdif_mux;
228 	unsigned int cur_smux[2];
229 };
230 
231 #define AC_VERB_IDT_SET_POWER_MAP	0x7ec
232 #define AC_VERB_IDT_GET_POWER_MAP	0xfec
233 
234 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
235 	0x0a, 0x0b, 0x0c, 0xd, 0x0e,
236 	0x0f, 0x10, 0x11
237 };
238 
239 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
240 	0x0a, 0x0b, 0x0c, 0xd, 0x0e,
241 	0x0f, 0x10
242 };
243 
244 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
245 	0x0a, 0x0d, 0x0f
246 };
247 
248 
249 /*
250  * PCM hooks
251  */
252 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
253 				   struct hda_codec *codec,
254 				   struct snd_pcm_substream *substream,
255 				   int action)
256 {
257 	struct sigmatel_spec *spec = codec->spec;
258 	if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
259 		msleep(spec->stream_delay);
260 }
261 
262 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
263 				  struct hda_codec *codec,
264 				  struct snd_pcm_substream *substream,
265 				  int action)
266 {
267 	struct sigmatel_spec *spec = codec->spec;
268 	int i, idx = 0;
269 
270 	if (!spec->powerdown_adcs)
271 		return;
272 
273 	for (i = 0; i < spec->gen.num_all_adcs; i++) {
274 		if (spec->gen.all_adcs[i] == hinfo->nid) {
275 			idx = i;
276 			break;
277 		}
278 	}
279 
280 	switch (action) {
281 	case HDA_GEN_PCM_ACT_OPEN:
282 		msleep(40);
283 		snd_hda_codec_write(codec, hinfo->nid, 0,
284 				    AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
285 		spec->active_adcs |= (1 << idx);
286 		break;
287 	case HDA_GEN_PCM_ACT_CLOSE:
288 		snd_hda_codec_write(codec, hinfo->nid, 0,
289 				    AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
290 		spec->active_adcs &= ~(1 << idx);
291 		break;
292 	}
293 }
294 
295 /*
296  * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
297  * funky external mute control using GPIO pins.
298  */
299 
300 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
301 			  unsigned int dir_mask, unsigned int data)
302 {
303 	unsigned int gpiostate, gpiomask, gpiodir;
304 	hda_nid_t fg = codec->core.afg;
305 
306 	codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
307 
308 	gpiostate = snd_hda_codec_read(codec, fg, 0,
309 				       AC_VERB_GET_GPIO_DATA, 0);
310 	gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
311 
312 	gpiomask = snd_hda_codec_read(codec, fg, 0,
313 				      AC_VERB_GET_GPIO_MASK, 0);
314 	gpiomask |= mask;
315 
316 	gpiodir = snd_hda_codec_read(codec, fg, 0,
317 				     AC_VERB_GET_GPIO_DIRECTION, 0);
318 	gpiodir |= dir_mask;
319 
320 	/* Configure GPIOx as CMOS */
321 	snd_hda_codec_write(codec, fg, 0, 0x7e7, 0);
322 
323 	snd_hda_codec_write(codec, fg, 0,
324 			    AC_VERB_SET_GPIO_MASK, gpiomask);
325 	snd_hda_codec_read(codec, fg, 0,
326 			   AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
327 
328 	msleep(1);
329 
330 	snd_hda_codec_read(codec, fg, 0,
331 			   AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
332 }
333 
334 /* hook for controlling mic-mute LED GPIO */
335 static void stac_capture_led_update(struct hda_codec *codec)
336 {
337 	struct sigmatel_spec *spec = codec->spec;
338 
339 	if (spec->gen.micmute_led.led_value)
340 		spec->gpio_data |= spec->mic_mute_led_gpio;
341 	else
342 		spec->gpio_data &= ~spec->mic_mute_led_gpio;
343 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
344 }
345 
346 static int stac_vrefout_set(struct hda_codec *codec,
347 					hda_nid_t nid, unsigned int new_vref)
348 {
349 	int error, pinctl;
350 
351 	codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref);
352 	pinctl = snd_hda_codec_read(codec, nid, 0,
353 				AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
354 
355 	if (pinctl < 0)
356 		return pinctl;
357 
358 	pinctl &= 0xff;
359 	pinctl &= ~AC_PINCTL_VREFEN;
360 	pinctl |= (new_vref & AC_PINCTL_VREFEN);
361 
362 	error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
363 	if (error < 0)
364 		return error;
365 
366 	return 1;
367 }
368 
369 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */
370 /* this hook is set in stac_setup_gpio() */
371 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec,
372 					       hda_nid_t nid,
373 					       unsigned int power_state)
374 {
375 	if (nid == codec->core.afg && power_state == AC_PWRST_D3)
376 		return AC_PWRST_D1;
377 	return snd_hda_gen_path_power_filter(codec, nid, power_state);
378 }
379 
380 /* update mute-LED accoring to the master switch */
381 static void stac_update_led_status(struct hda_codec *codec, int enabled)
382 {
383 	struct sigmatel_spec *spec = codec->spec;
384 	int muted = !enabled;
385 
386 	if (!spec->gpio_led)
387 		return;
388 
389 	/* LED state is inverted on these systems */
390 	if (spec->gpio_led_polarity)
391 		muted = !muted;
392 
393 	if (!spec->vref_mute_led_nid) {
394 		if (muted)
395 			spec->gpio_data |= spec->gpio_led;
396 		else
397 			spec->gpio_data &= ~spec->gpio_led;
398 		stac_gpio_set(codec, spec->gpio_mask,
399 				spec->gpio_dir, spec->gpio_data);
400 	} else {
401 		spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
402 		stac_vrefout_set(codec,	spec->vref_mute_led_nid,
403 				 spec->vref_led);
404 	}
405 }
406 
407 /* vmaster hook to update mute LED */
408 static void stac_vmaster_hook(void *private_data, int val)
409 {
410 	stac_update_led_status(private_data, val);
411 }
412 
413 /* automute hook to handle GPIO mute and EAPD updates */
414 static void stac_update_outputs(struct hda_codec *codec)
415 {
416 	struct sigmatel_spec *spec = codec->spec;
417 
418 	if (spec->gpio_mute)
419 		spec->gen.master_mute =
420 			!(snd_hda_codec_read(codec, codec->core.afg, 0,
421 				AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
422 
423 	snd_hda_gen_update_outputs(codec);
424 
425 	if (spec->eapd_mask && spec->eapd_switch) {
426 		unsigned int val = spec->gpio_data;
427 		if (spec->gen.speaker_muted)
428 			val &= ~spec->eapd_mask;
429 		else
430 			val |= spec->eapd_mask;
431 		if (spec->gpio_data != val) {
432 			spec->gpio_data = val;
433 			stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
434 				      val);
435 		}
436 	}
437 }
438 
439 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
440 				  bool enable, bool do_write)
441 {
442 	struct sigmatel_spec *spec = codec->spec;
443 	unsigned int idx, val;
444 
445 	for (idx = 0; idx < spec->num_pwrs; idx++) {
446 		if (spec->pwr_nids[idx] == nid)
447 			break;
448 	}
449 	if (idx >= spec->num_pwrs)
450 		return;
451 
452 	idx = 1 << idx;
453 
454 	val = spec->power_map_bits;
455 	if (enable)
456 		val &= ~idx;
457 	else
458 		val |= idx;
459 
460 	/* power down unused output ports */
461 	if (val != spec->power_map_bits) {
462 		spec->power_map_bits = val;
463 		if (do_write)
464 			snd_hda_codec_write(codec, codec->core.afg, 0,
465 					    AC_VERB_IDT_SET_POWER_MAP, val);
466 	}
467 }
468 
469 /* update power bit per jack plug/unplug */
470 static void jack_update_power(struct hda_codec *codec,
471 			      struct hda_jack_callback *jack)
472 {
473 	struct sigmatel_spec *spec = codec->spec;
474 	int i;
475 
476 	if (!spec->num_pwrs)
477 		return;
478 
479 	if (jack && jack->nid) {
480 		stac_toggle_power_map(codec, jack->nid,
481 				      snd_hda_jack_detect(codec, jack->nid),
482 				      true);
483 		return;
484 	}
485 
486 	/* update all jacks */
487 	for (i = 0; i < spec->num_pwrs; i++) {
488 		hda_nid_t nid = spec->pwr_nids[i];
489 		if (!snd_hda_jack_tbl_get(codec, nid))
490 			continue;
491 		stac_toggle_power_map(codec, nid,
492 				      snd_hda_jack_detect(codec, nid),
493 				      false);
494 	}
495 
496 	snd_hda_codec_write(codec, codec->core.afg, 0,
497 			    AC_VERB_IDT_SET_POWER_MAP,
498 			    spec->power_map_bits);
499 }
500 
501 static void stac_vref_event(struct hda_codec *codec,
502 			    struct hda_jack_callback *event)
503 {
504 	unsigned int data;
505 
506 	data = snd_hda_codec_read(codec, codec->core.afg, 0,
507 				  AC_VERB_GET_GPIO_DATA, 0);
508 	/* toggle VREF state based on GPIOx status */
509 	snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0,
510 			    !!(data & (1 << event->private_data)));
511 }
512 
513 /* initialize the power map and enable the power event to jacks that
514  * haven't been assigned to automute
515  */
516 static void stac_init_power_map(struct hda_codec *codec)
517 {
518 	struct sigmatel_spec *spec = codec->spec;
519 	int i;
520 
521 	for (i = 0; i < spec->num_pwrs; i++)  {
522 		hda_nid_t nid = spec->pwr_nids[i];
523 		unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
524 		def_conf = get_defcfg_connect(def_conf);
525 		if (def_conf == AC_JACK_PORT_COMPLEX &&
526 		    spec->vref_mute_led_nid != nid &&
527 		    is_jack_detectable(codec, nid)) {
528 			snd_hda_jack_detect_enable_callback(codec, nid,
529 							    jack_update_power);
530 		} else {
531 			if (def_conf == AC_JACK_PORT_NONE)
532 				stac_toggle_power_map(codec, nid, false, false);
533 			else
534 				stac_toggle_power_map(codec, nid, true, false);
535 		}
536 	}
537 }
538 
539 /*
540  */
541 
542 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
543 				int *valp)
544 {
545 	return !snd_hda_get_int_hint(codec, key, valp);
546 }
547 
548 /* override some hints from the hwdep entry */
549 static void stac_store_hints(struct hda_codec *codec)
550 {
551 	struct sigmatel_spec *spec = codec->spec;
552 	int val;
553 
554 	if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
555 		spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
556 			spec->gpio_mask;
557 	}
558 	if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
559 		spec->gpio_dir &= spec->gpio_mask;
560 	if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
561 		spec->gpio_data &= spec->gpio_mask;
562 	if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
563 		spec->eapd_mask &= spec->gpio_mask;
564 	if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
565 		spec->gpio_mute &= spec->gpio_mask;
566 	val = snd_hda_get_bool_hint(codec, "eapd_switch");
567 	if (val >= 0)
568 		spec->eapd_switch = val;
569 }
570 
571 /*
572  * loopback controls
573  */
574 
575 #define stac_aloopback_info snd_ctl_boolean_mono_info
576 
577 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
578 			      struct snd_ctl_elem_value *ucontrol)
579 {
580 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
582 	struct sigmatel_spec *spec = codec->spec;
583 
584 	ucontrol->value.integer.value[0] = !!(spec->aloopback &
585 					      (spec->aloopback_mask << idx));
586 	return 0;
587 }
588 
589 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
590 			      struct snd_ctl_elem_value *ucontrol)
591 {
592 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
593 	struct sigmatel_spec *spec = codec->spec;
594 	unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
595 	unsigned int dac_mode;
596 	unsigned int val, idx_val;
597 
598 	idx_val = spec->aloopback_mask << idx;
599 	if (ucontrol->value.integer.value[0])
600 		val = spec->aloopback | idx_val;
601 	else
602 		val = spec->aloopback & ~idx_val;
603 	if (spec->aloopback == val)
604 		return 0;
605 
606 	spec->aloopback = val;
607 
608 	/* Only return the bits defined by the shift value of the
609 	 * first two bytes of the mask
610 	 */
611 	dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0,
612 				      kcontrol->private_value & 0xFFFF, 0x0);
613 	dac_mode >>= spec->aloopback_shift;
614 
615 	if (spec->aloopback & idx_val) {
616 		snd_hda_power_up(codec);
617 		dac_mode |= idx_val;
618 	} else {
619 		snd_hda_power_down(codec);
620 		dac_mode &= ~idx_val;
621 	}
622 
623 	snd_hda_codec_write_cache(codec, codec->core.afg, 0,
624 		kcontrol->private_value >> 16, dac_mode);
625 
626 	return 1;
627 }
628 
629 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
630 	{ \
631 		.iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
632 		.name  = "Analog Loopback", \
633 		.count = cnt, \
634 		.info  = stac_aloopback_info, \
635 		.get   = stac_aloopback_get, \
636 		.put   = stac_aloopback_put, \
637 		.private_value = verb_read | (verb_write << 16), \
638 	}
639 
640 /*
641  * Mute LED handling on HP laptops
642  */
643 
644 /* check whether it's a HP laptop with a docking port */
645 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
646 {
647 	if (codec->core.vendor_id != 0x111d7605 &&
648 	    codec->core.vendor_id != 0x111d76d1)
649 		return false;
650 
651 	switch (codec->core.subsystem_id) {
652 	case 0x103c1618:
653 	case 0x103c1619:
654 	case 0x103c161a:
655 	case 0x103c161b:
656 	case 0x103c161c:
657 	case 0x103c161d:
658 	case 0x103c161e:
659 	case 0x103c161f:
660 
661 	case 0x103c162a:
662 	case 0x103c162b:
663 
664 	case 0x103c1630:
665 	case 0x103c1631:
666 
667 	case 0x103c1633:
668 	case 0x103c1634:
669 	case 0x103c1635:
670 
671 	case 0x103c3587:
672 	case 0x103c3588:
673 	case 0x103c3589:
674 	case 0x103c358a:
675 
676 	case 0x103c3667:
677 	case 0x103c3668:
678 	case 0x103c3669:
679 
680 		return true;
681 	}
682 	return false;
683 }
684 
685 static bool hp_blike_system(u32 subsystem_id)
686 {
687 	switch (subsystem_id) {
688 	case 0x103c1473: /* HP ProBook 6550b */
689 	case 0x103c1520:
690 	case 0x103c1521:
691 	case 0x103c1523:
692 	case 0x103c1524:
693 	case 0x103c1525:
694 	case 0x103c1722:
695 	case 0x103c1723:
696 	case 0x103c1724:
697 	case 0x103c1725:
698 	case 0x103c1726:
699 	case 0x103c1727:
700 	case 0x103c1728:
701 	case 0x103c1729:
702 	case 0x103c172a:
703 	case 0x103c172b:
704 	case 0x103c307e:
705 	case 0x103c307f:
706 	case 0x103c3080:
707 	case 0x103c3081:
708 	case 0x103c7007:
709 	case 0x103c7008:
710 		return true;
711 	}
712 	return false;
713 }
714 
715 static void set_hp_led_gpio(struct hda_codec *codec)
716 {
717 	struct sigmatel_spec *spec = codec->spec;
718 	unsigned int gpio;
719 
720 	if (spec->gpio_led)
721 		return;
722 
723 	gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP);
724 	gpio &= AC_GPIO_IO_COUNT;
725 	if (gpio > 3)
726 		spec->gpio_led = 0x08; /* GPIO 3 */
727 	else
728 		spec->gpio_led = 0x01; /* GPIO 0 */
729 }
730 
731 /*
732  * This method searches for the mute LED GPIO configuration
733  * provided as OEM string in SMBIOS. The format of that string
734  * is HP_Mute_LED_P_G or HP_Mute_LED_P
735  * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
736  * that corresponds to the NOT muted state of the master volume
737  * and G is the index of the GPIO to use as the mute LED control (0..9)
738  * If _G portion is missing it is assigned based on the codec ID
739  *
740  * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
741  * or  HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
742  *
743  *
744  * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
745  * SMBIOS - at least the ones I have seen do not have them - which include
746  * my own system (HP Pavilion dv6-1110ax) and my cousin's
747  * HP Pavilion dv9500t CTO.
748  * Need more information on whether it is true across the entire series.
749  * -- kunal
750  */
751 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
752 {
753 	struct sigmatel_spec *spec = codec->spec;
754 	const struct dmi_device *dev = NULL;
755 
756 	if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
757 		get_int_hint(codec, "gpio_led_polarity",
758 			     &spec->gpio_led_polarity);
759 		return 1;
760 	}
761 
762 	while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
763 		if (sscanf(dev->name, "HP_Mute_LED_%u_%x",
764 			   &spec->gpio_led_polarity,
765 			   &spec->gpio_led) == 2) {
766 			unsigned int max_gpio;
767 			max_gpio = snd_hda_param_read(codec, codec->core.afg,
768 						      AC_PAR_GPIO_CAP);
769 			max_gpio &= AC_GPIO_IO_COUNT;
770 			if (spec->gpio_led < max_gpio)
771 				spec->gpio_led = 1 << spec->gpio_led;
772 			else
773 				spec->vref_mute_led_nid = spec->gpio_led;
774 			return 1;
775 		}
776 		if (sscanf(dev->name, "HP_Mute_LED_%u",
777 			   &spec->gpio_led_polarity) == 1) {
778 			set_hp_led_gpio(codec);
779 			return 1;
780 		}
781 		/* BIOS bug: unfilled OEM string */
782 		if (strstr(dev->name, "HP_Mute_LED_P_G")) {
783 			set_hp_led_gpio(codec);
784 			if (default_polarity >= 0)
785 				spec->gpio_led_polarity = default_polarity;
786 			else
787 				spec->gpio_led_polarity = 1;
788 			return 1;
789 		}
790 	}
791 
792 	/*
793 	 * Fallback case - if we don't find the DMI strings,
794 	 * we statically set the GPIO - if not a B-series system
795 	 * and default polarity is provided
796 	 */
797 	if (!hp_blike_system(codec->core.subsystem_id) &&
798 	    (default_polarity == 0 || default_polarity == 1)) {
799 		set_hp_led_gpio(codec);
800 		spec->gpio_led_polarity = default_polarity;
801 		return 1;
802 	}
803 	return 0;
804 }
805 
806 /* check whether a built-in speaker is included in parsed pins */
807 static bool has_builtin_speaker(struct hda_codec *codec)
808 {
809 	struct sigmatel_spec *spec = codec->spec;
810 	hda_nid_t *nid_pin;
811 	int nids, i;
812 
813 	if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
814 		nid_pin = spec->gen.autocfg.line_out_pins;
815 		nids = spec->gen.autocfg.line_outs;
816 	} else {
817 		nid_pin = spec->gen.autocfg.speaker_pins;
818 		nids = spec->gen.autocfg.speaker_outs;
819 	}
820 
821 	for (i = 0; i < nids; i++) {
822 		unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
823 		if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
824 			return true;
825 	}
826 	return false;
827 }
828 
829 /*
830  * PC beep controls
831  */
832 
833 /* create PC beep volume controls */
834 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
835 						hda_nid_t nid)
836 {
837 	struct sigmatel_spec *spec = codec->spec;
838 	u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
839 	struct snd_kcontrol_new *knew;
840 	static struct snd_kcontrol_new abeep_mute_ctl =
841 		HDA_CODEC_MUTE(NULL, 0, 0, 0);
842 	static struct snd_kcontrol_new dbeep_mute_ctl =
843 		HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
844 	static struct snd_kcontrol_new beep_vol_ctl =
845 		HDA_CODEC_VOLUME(NULL, 0, 0, 0);
846 
847 	/* check for mute support for the the amp */
848 	if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
849 		const struct snd_kcontrol_new *temp;
850 		if (spec->anabeep_nid == nid)
851 			temp = &abeep_mute_ctl;
852 		else
853 			temp = &dbeep_mute_ctl;
854 		knew = snd_hda_gen_add_kctl(&spec->gen,
855 					    "Beep Playback Switch", temp);
856 		if (!knew)
857 			return -ENOMEM;
858 		knew->private_value =
859 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
860 	}
861 
862 	/* check to see if there is volume support for the amp */
863 	if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
864 		knew = snd_hda_gen_add_kctl(&spec->gen,
865 					    "Beep Playback Volume",
866 					    &beep_vol_ctl);
867 		if (!knew)
868 			return -ENOMEM;
869 		knew->private_value =
870 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
871 	}
872 	return 0;
873 }
874 
875 #ifdef CONFIG_SND_HDA_INPUT_BEEP
876 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
877 
878 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
879 				    struct snd_ctl_elem_value *ucontrol)
880 {
881 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
882 	ucontrol->value.integer.value[0] = codec->beep->enabled;
883 	return 0;
884 }
885 
886 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
887 				    struct snd_ctl_elem_value *ucontrol)
888 {
889 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
890 	return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
891 }
892 
893 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
894 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
895 	.name = "Beep Playback Switch",
896 	.info = stac_dig_beep_switch_info,
897 	.get = stac_dig_beep_switch_get,
898 	.put = stac_dig_beep_switch_put,
899 };
900 
901 static int stac_beep_switch_ctl(struct hda_codec *codec)
902 {
903 	struct sigmatel_spec *spec = codec->spec;
904 
905 	if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
906 		return -ENOMEM;
907 	return 0;
908 }
909 #endif
910 
911 /*
912  * SPDIF-out mux controls
913  */
914 
915 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
916 			       struct snd_ctl_elem_info *uinfo)
917 {
918 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
919 	struct sigmatel_spec *spec = codec->spec;
920 	return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
921 }
922 
923 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
924 			      struct snd_ctl_elem_value *ucontrol)
925 {
926 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
927 	struct sigmatel_spec *spec = codec->spec;
928 	unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
929 
930 	ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
931 	return 0;
932 }
933 
934 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
935 			      struct snd_ctl_elem_value *ucontrol)
936 {
937 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
938 	struct sigmatel_spec *spec = codec->spec;
939 	unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
940 
941 	return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
942 				     spec->gen.autocfg.dig_out_pins[smux_idx],
943 				     &spec->cur_smux[smux_idx]);
944 }
945 
946 static const struct snd_kcontrol_new stac_smux_mixer = {
947 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
948 	.name = "IEC958 Playback Source",
949 	/* count set later */
950 	.info = stac_smux_enum_info,
951 	.get = stac_smux_enum_get,
952 	.put = stac_smux_enum_put,
953 };
954 
955 static const char * const stac_spdif_labels[] = {
956 	"Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
957 };
958 
959 static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
960 {
961 	struct sigmatel_spec *spec = codec->spec;
962 	struct auto_pin_cfg *cfg = &spec->gen.autocfg;
963 	const char * const *labels = spec->spdif_labels;
964 	struct snd_kcontrol_new *kctl;
965 	int i, num_cons;
966 
967 	if (cfg->dig_outs < 1)
968 		return 0;
969 
970 	num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
971 	if (num_cons <= 1)
972 		return 0;
973 
974 	if (!labels)
975 		labels = stac_spdif_labels;
976 	for (i = 0; i < num_cons; i++) {
977 		if (snd_BUG_ON(!labels[i]))
978 			return -EINVAL;
979 		snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL);
980 	}
981 
982 	kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
983 	if (!kctl)
984 		return -ENOMEM;
985 	kctl->count = cfg->dig_outs;
986 
987 	return 0;
988 }
989 
990 /*
991  */
992 
993 static const struct hda_verb stac9200_core_init[] = {
994 	/* set dac0mux for dac converter */
995 	{ 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
996 	{}
997 };
998 
999 static const struct hda_verb stac9200_eapd_init[] = {
1000 	/* set dac0mux for dac converter */
1001 	{0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
1002 	{0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1003 	{}
1004 };
1005 
1006 static const struct hda_verb dell_eq_core_init[] = {
1007 	/* set master volume to max value without distortion
1008 	 * and direct control */
1009 	{ 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
1010 	{}
1011 };
1012 
1013 static const struct hda_verb stac92hd73xx_core_init[] = {
1014 	/* set master volume and direct control */
1015 	{ 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1016 	{}
1017 };
1018 
1019 static const struct hda_verb stac92hd83xxx_core_init[] = {
1020 	/* power state controls amps */
1021 	{ 0x01, AC_VERB_SET_EAPD, 1 << 2},
1022 	{}
1023 };
1024 
1025 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
1026 	{ 0x22, 0x785, 0x43 },
1027 	{ 0x22, 0x782, 0xe0 },
1028 	{ 0x22, 0x795, 0x00 },
1029 	{}
1030 };
1031 
1032 static const struct hda_verb stac92hd71bxx_core_init[] = {
1033 	/* set master volume and direct control */
1034 	{ 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1035 	{}
1036 };
1037 
1038 static const hda_nid_t stac92hd71bxx_unmute_nids[] = {
1039 	/* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
1040 	0x0f, 0x0a, 0x0d, 0
1041 };
1042 
1043 static const struct hda_verb stac925x_core_init[] = {
1044 	/* set dac0mux for dac converter */
1045 	{ 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
1046 	/* mute the master volume */
1047 	{ 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
1048 	{}
1049 };
1050 
1051 static const struct hda_verb stac922x_core_init[] = {
1052 	/* set master volume and direct control */
1053 	{ 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1054 	{}
1055 };
1056 
1057 static const struct hda_verb d965_core_init[] = {
1058 	/* unmute node 0x1b */
1059 	{ 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1060 	/* select node 0x03 as DAC */
1061 	{ 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1062 	{}
1063 };
1064 
1065 static const struct hda_verb dell_3st_core_init[] = {
1066 	/* don't set delta bit */
1067 	{0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1068 	/* unmute node 0x1b */
1069 	{0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
1070 	/* select node 0x03 as DAC */
1071 	{0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
1072 	{}
1073 };
1074 
1075 static const struct hda_verb stac927x_core_init[] = {
1076 	/* set master volume and direct control */
1077 	{ 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1078 	/* enable analog pc beep path */
1079 	{ 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1080 	{}
1081 };
1082 
1083 static const struct hda_verb stac927x_volknob_core_init[] = {
1084 	/* don't set delta bit */
1085 	{0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
1086 	/* enable analog pc beep path */
1087 	{0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1088 	{}
1089 };
1090 
1091 static const struct hda_verb stac9205_core_init[] = {
1092 	/* set master volume and direct control */
1093 	{ 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
1094 	/* enable analog pc beep path */
1095 	{ 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
1096 	{}
1097 };
1098 
1099 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1100 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1101 
1102 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1103 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1104 
1105 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1106 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1107 
1108 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1109 	STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1110 
1111 static const struct snd_kcontrol_new stac9205_loopback =
1112 	STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1113 
1114 static const struct snd_kcontrol_new stac927x_loopback =
1115 	STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1116 
1117 static const struct hda_pintbl ref9200_pin_configs[] = {
1118 	{ 0x08, 0x01c47010 },
1119 	{ 0x09, 0x01447010 },
1120 	{ 0x0d, 0x0221401f },
1121 	{ 0x0e, 0x01114010 },
1122 	{ 0x0f, 0x02a19020 },
1123 	{ 0x10, 0x01a19021 },
1124 	{ 0x11, 0x90100140 },
1125 	{ 0x12, 0x01813122 },
1126 	{}
1127 };
1128 
1129 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1130 	{ 0x08, 0x400000fe },
1131 	{ 0x09, 0x404500f4 },
1132 	{ 0x0d, 0x400100f0 },
1133 	{ 0x0e, 0x90110010 },
1134 	{ 0x0f, 0x400100f1 },
1135 	{ 0x10, 0x02a1902e },
1136 	{ 0x11, 0x500000f2 },
1137 	{ 0x12, 0x500000f3 },
1138 	{}
1139 };
1140 
1141 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1142 	{ 0x08, 0x400000fe },
1143 	{ 0x09, 0x404500f4 },
1144 	{ 0x0d, 0x400100f0 },
1145 	{ 0x0e, 0x90110010 },
1146 	{ 0x0f, 0x400100f1 },
1147 	{ 0x10, 0x02a1902e },
1148 	{ 0x11, 0x500000f2 },
1149 	{ 0x12, 0x500000f3 },
1150 	{}
1151 };
1152 
1153 /*
1154     STAC 9200 pin configs for
1155     102801A8
1156     102801DE
1157     102801E8
1158 */
1159 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1160 	{ 0x08, 0x400001f0 },
1161 	{ 0x09, 0x400001f1 },
1162 	{ 0x0d, 0x02214030 },
1163 	{ 0x0e, 0x01014010 },
1164 	{ 0x0f, 0x02a19020 },
1165 	{ 0x10, 0x01a19021 },
1166 	{ 0x11, 0x90100140 },
1167 	{ 0x12, 0x01813122 },
1168 	{}
1169 };
1170 
1171 /*
1172     STAC 9200 pin configs for
1173     102801C0
1174     102801C1
1175 */
1176 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1177 	{ 0x08, 0x400001f0 },
1178 	{ 0x09, 0x400001f1 },
1179 	{ 0x0d, 0x0221401f },
1180 	{ 0x0e, 0x01014010 },
1181 	{ 0x0f, 0x01813020 },
1182 	{ 0x10, 0x02a19021 },
1183 	{ 0x11, 0x90100140 },
1184 	{ 0x12, 0x400001f2 },
1185 	{}
1186 };
1187 
1188 /*
1189     STAC 9200 pin configs for
1190     102801C4 (Dell Dimension E310)
1191     102801C5
1192     102801C7
1193     102801D9
1194     102801DA
1195     102801E3
1196 */
1197 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1198 	{ 0x08, 0x400001f0 },
1199 	{ 0x09, 0x400001f1 },
1200 	{ 0x0d, 0x0221401f },
1201 	{ 0x0e, 0x01014010 },
1202 	{ 0x0f, 0x01813020 },
1203 	{ 0x10, 0x01a19021 },
1204 	{ 0x11, 0x90100140 },
1205 	{ 0x12, 0x400001f2 },
1206 	{}
1207 };
1208 
1209 
1210 /*
1211     STAC 9200-32 pin configs for
1212     102801B5 (Dell Inspiron 630m)
1213     102801D8 (Dell Inspiron 640m)
1214 */
1215 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1216 	{ 0x08, 0x40c003fa },
1217 	{ 0x09, 0x03441340 },
1218 	{ 0x0d, 0x0321121f },
1219 	{ 0x0e, 0x90170310 },
1220 	{ 0x0f, 0x408003fb },
1221 	{ 0x10, 0x03a11020 },
1222 	{ 0x11, 0x401003fc },
1223 	{ 0x12, 0x403003fd },
1224 	{}
1225 };
1226 
1227 /*
1228     STAC 9200-32 pin configs for
1229     102801C2 (Dell Latitude D620)
1230     102801C8
1231     102801CC (Dell Latitude D820)
1232     102801D4
1233     102801D6
1234 */
1235 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1236 	{ 0x08, 0x40c003fa },
1237 	{ 0x09, 0x0144131f },
1238 	{ 0x0d, 0x0321121f },
1239 	{ 0x0e, 0x90170310 },
1240 	{ 0x0f, 0x90a70321 },
1241 	{ 0x10, 0x03a11020 },
1242 	{ 0x11, 0x401003fb },
1243 	{ 0x12, 0x40f000fc },
1244 	{}
1245 };
1246 
1247 /*
1248     STAC 9200-32 pin configs for
1249     102801CE (Dell XPS M1710)
1250     102801CF (Dell Precision M90)
1251 */
1252 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1253 	{ 0x08, 0x40c003fa },
1254 	{ 0x09, 0x01441340 },
1255 	{ 0x0d, 0x0421421f },
1256 	{ 0x0e, 0x90170310 },
1257 	{ 0x0f, 0x408003fb },
1258 	{ 0x10, 0x04a1102e },
1259 	{ 0x11, 0x90170311 },
1260 	{ 0x12, 0x403003fc },
1261 	{}
1262 };
1263 
1264 /*
1265     STAC 9200-32 pin configs for
1266     102801C9
1267     102801CA
1268     102801CB (Dell Latitude 120L)
1269     102801D3
1270 */
1271 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1272 	{ 0x08, 0x40c003fa },
1273 	{ 0x09, 0x404003fb },
1274 	{ 0x0d, 0x0321121f },
1275 	{ 0x0e, 0x90170310 },
1276 	{ 0x0f, 0x408003fc },
1277 	{ 0x10, 0x03a11020 },
1278 	{ 0x11, 0x401003fd },
1279 	{ 0x12, 0x403003fe },
1280 	{}
1281 };
1282 
1283 /*
1284     STAC 9200-32 pin configs for
1285     102801BD (Dell Inspiron E1505n)
1286     102801EE
1287     102801EF
1288 */
1289 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1290 	{ 0x08, 0x40c003fa },
1291 	{ 0x09, 0x01441340 },
1292 	{ 0x0d, 0x0421121f },
1293 	{ 0x0e, 0x90170310 },
1294 	{ 0x0f, 0x408003fb },
1295 	{ 0x10, 0x04a11020 },
1296 	{ 0x11, 0x401003fc },
1297 	{ 0x12, 0x403003fd },
1298 	{}
1299 };
1300 
1301 /*
1302     STAC 9200-32 pin configs for
1303     102801F5 (Dell Inspiron 1501)
1304     102801F6
1305 */
1306 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1307 	{ 0x08, 0x40c003fa },
1308 	{ 0x09, 0x404003fb },
1309 	{ 0x0d, 0x0421121f },
1310 	{ 0x0e, 0x90170310 },
1311 	{ 0x0f, 0x408003fc },
1312 	{ 0x10, 0x04a11020 },
1313 	{ 0x11, 0x401003fd },
1314 	{ 0x12, 0x403003fe },
1315 	{}
1316 };
1317 
1318 /*
1319     STAC 9200-32
1320     102801CD (Dell Inspiron E1705/9400)
1321 */
1322 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1323 	{ 0x08, 0x40c003fa },
1324 	{ 0x09, 0x01441340 },
1325 	{ 0x0d, 0x0421121f },
1326 	{ 0x0e, 0x90170310 },
1327 	{ 0x0f, 0x90170310 },
1328 	{ 0x10, 0x04a11020 },
1329 	{ 0x11, 0x90170310 },
1330 	{ 0x12, 0x40f003fc },
1331 	{}
1332 };
1333 
1334 static const struct hda_pintbl oqo9200_pin_configs[] = {
1335 	{ 0x08, 0x40c000f0 },
1336 	{ 0x09, 0x404000f1 },
1337 	{ 0x0d, 0x0221121f },
1338 	{ 0x0e, 0x02211210 },
1339 	{ 0x0f, 0x90170111 },
1340 	{ 0x10, 0x90a70120 },
1341 	{ 0x11, 0x400000f2 },
1342 	{ 0x12, 0x400000f3 },
1343 	{}
1344 };
1345 
1346 /*
1347  *  STAC 92HD700
1348  *  18881000 Amigaone X1000
1349  */
1350 static const struct hda_pintbl nemo_pin_configs[] = {
1351 	{ 0x0a, 0x02214020 },	/* Front panel HP socket */
1352 	{ 0x0b, 0x02a19080 },	/* Front Mic */
1353 	{ 0x0c, 0x0181304e },	/* Line in */
1354 	{ 0x0d, 0x01014010 },	/* Line out */
1355 	{ 0x0e, 0x01a19040 },	/* Rear Mic */
1356 	{ 0x0f, 0x01011012 },	/* Rear speakers */
1357 	{ 0x10, 0x01016011 },	/* Center speaker */
1358 	{ 0x11, 0x01012014 },	/* Side speakers (7.1) */
1359 	{ 0x12, 0x103301f0 },	/* Motherboard CD line in connector */
1360 	{ 0x13, 0x411111f0 },	/* Unused */
1361 	{ 0x14, 0x411111f0 },	/* Unused */
1362 	{ 0x21, 0x01442170 },	/* S/PDIF line out */
1363 	{ 0x22, 0x411111f0 },	/* Unused */
1364 	{ 0x23, 0x411111f0 },	/* Unused */
1365 	{}
1366 };
1367 
1368 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1369 				     const struct hda_fixup *fix, int action)
1370 {
1371 	struct sigmatel_spec *spec = codec->spec;
1372 
1373 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1374 		spec->gpio_mask = spec->gpio_dir = 0x09;
1375 		spec->gpio_data = 0x00;
1376 		/* CF-74 has no headphone detection, and the driver should *NOT*
1377 		 * do detection and HP/speaker toggle because the hardware does it.
1378 		 */
1379 		spec->gen.suppress_auto_mute = 1;
1380 	}
1381 }
1382 
1383 
1384 static const struct hda_fixup stac9200_fixups[] = {
1385 	[STAC_REF] = {
1386 		.type = HDA_FIXUP_PINS,
1387 		.v.pins = ref9200_pin_configs,
1388 	},
1389 	[STAC_9200_OQO] = {
1390 		.type = HDA_FIXUP_PINS,
1391 		.v.pins = oqo9200_pin_configs,
1392 		.chained = true,
1393 		.chain_id = STAC_9200_EAPD_INIT,
1394 	},
1395 	[STAC_9200_DELL_D21] = {
1396 		.type = HDA_FIXUP_PINS,
1397 		.v.pins = dell9200_d21_pin_configs,
1398 	},
1399 	[STAC_9200_DELL_D22] = {
1400 		.type = HDA_FIXUP_PINS,
1401 		.v.pins = dell9200_d22_pin_configs,
1402 	},
1403 	[STAC_9200_DELL_D23] = {
1404 		.type = HDA_FIXUP_PINS,
1405 		.v.pins = dell9200_d23_pin_configs,
1406 	},
1407 	[STAC_9200_DELL_M21] = {
1408 		.type = HDA_FIXUP_PINS,
1409 		.v.pins = dell9200_m21_pin_configs,
1410 	},
1411 	[STAC_9200_DELL_M22] = {
1412 		.type = HDA_FIXUP_PINS,
1413 		.v.pins = dell9200_m22_pin_configs,
1414 	},
1415 	[STAC_9200_DELL_M23] = {
1416 		.type = HDA_FIXUP_PINS,
1417 		.v.pins = dell9200_m23_pin_configs,
1418 	},
1419 	[STAC_9200_DELL_M24] = {
1420 		.type = HDA_FIXUP_PINS,
1421 		.v.pins = dell9200_m24_pin_configs,
1422 	},
1423 	[STAC_9200_DELL_M25] = {
1424 		.type = HDA_FIXUP_PINS,
1425 		.v.pins = dell9200_m25_pin_configs,
1426 	},
1427 	[STAC_9200_DELL_M26] = {
1428 		.type = HDA_FIXUP_PINS,
1429 		.v.pins = dell9200_m26_pin_configs,
1430 	},
1431 	[STAC_9200_DELL_M27] = {
1432 		.type = HDA_FIXUP_PINS,
1433 		.v.pins = dell9200_m27_pin_configs,
1434 	},
1435 	[STAC_9200_M4] = {
1436 		.type = HDA_FIXUP_PINS,
1437 		.v.pins = gateway9200_m4_pin_configs,
1438 		.chained = true,
1439 		.chain_id = STAC_9200_EAPD_INIT,
1440 	},
1441 	[STAC_9200_M4_2] = {
1442 		.type = HDA_FIXUP_PINS,
1443 		.v.pins = gateway9200_m4_2_pin_configs,
1444 		.chained = true,
1445 		.chain_id = STAC_9200_EAPD_INIT,
1446 	},
1447 	[STAC_9200_PANASONIC] = {
1448 		.type = HDA_FIXUP_FUNC,
1449 		.v.func = stac9200_fixup_panasonic,
1450 	},
1451 	[STAC_9200_EAPD_INIT] = {
1452 		.type = HDA_FIXUP_VERBS,
1453 		.v.verbs = (const struct hda_verb[]) {
1454 			{0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1455 			{}
1456 		},
1457 	},
1458 };
1459 
1460 static const struct hda_model_fixup stac9200_models[] = {
1461 	{ .id = STAC_REF, .name = "ref" },
1462 	{ .id = STAC_9200_OQO, .name = "oqo" },
1463 	{ .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1464 	{ .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1465 	{ .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1466 	{ .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1467 	{ .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1468 	{ .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1469 	{ .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1470 	{ .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1471 	{ .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1472 	{ .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1473 	{ .id = STAC_9200_M4, .name = "gateway-m4" },
1474 	{ .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1475 	{ .id = STAC_9200_PANASONIC, .name = "panasonic" },
1476 	{}
1477 };
1478 
1479 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1480 	/* SigmaTel reference board */
1481 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1482 		      "DFI LanParty", STAC_REF),
1483 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1484 		      "DFI LanParty", STAC_REF),
1485 	/* Dell laptops have BIOS problem */
1486 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1487 		      "unknown Dell", STAC_9200_DELL_D21),
1488 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1489 		      "Dell Inspiron 630m", STAC_9200_DELL_M21),
1490 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1491 		      "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1492 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1493 		      "unknown Dell", STAC_9200_DELL_D22),
1494 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1495 		      "unknown Dell", STAC_9200_DELL_D22),
1496 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1497 		      "Dell Latitude D620", STAC_9200_DELL_M22),
1498 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1499 		      "unknown Dell", STAC_9200_DELL_D23),
1500 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1501 		      "unknown Dell", STAC_9200_DELL_D23),
1502 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1503 		      "unknown Dell", STAC_9200_DELL_M22),
1504 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1505 		      "unknown Dell", STAC_9200_DELL_M24),
1506 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1507 		      "unknown Dell", STAC_9200_DELL_M24),
1508 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1509 		      "Dell Latitude 120L", STAC_9200_DELL_M24),
1510 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1511 		      "Dell Latitude D820", STAC_9200_DELL_M22),
1512 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1513 		      "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1514 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1515 		      "Dell XPS M1710", STAC_9200_DELL_M23),
1516 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1517 		      "Dell Precision M90", STAC_9200_DELL_M23),
1518 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1519 		      "unknown Dell", STAC_9200_DELL_M22),
1520 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1521 		      "unknown Dell", STAC_9200_DELL_M22),
1522 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1523 		      "unknown Dell", STAC_9200_DELL_M22),
1524 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1525 		      "Dell Inspiron 640m", STAC_9200_DELL_M21),
1526 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1527 		      "unknown Dell", STAC_9200_DELL_D23),
1528 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1529 		      "unknown Dell", STAC_9200_DELL_D23),
1530 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1531 		      "unknown Dell", STAC_9200_DELL_D21),
1532 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1533 		      "unknown Dell", STAC_9200_DELL_D23),
1534 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1535 		      "unknown Dell", STAC_9200_DELL_D21),
1536 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1537 		      "unknown Dell", STAC_9200_DELL_M25),
1538 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1539 		      "unknown Dell", STAC_9200_DELL_M25),
1540 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1541 		      "Dell Inspiron 1501", STAC_9200_DELL_M26),
1542 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1543 		      "unknown Dell", STAC_9200_DELL_M26),
1544 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0201,
1545 		      "Dell Latitude D430", STAC_9200_DELL_M22),
1546 	/* Panasonic */
1547 	SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1548 	/* Gateway machines needs EAPD to be set on resume */
1549 	SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1550 	SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1551 	SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1552 	/* OQO Mobile */
1553 	SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1554 	{} /* terminator */
1555 };
1556 
1557 static const struct hda_pintbl ref925x_pin_configs[] = {
1558 	{ 0x07, 0x40c003f0 },
1559 	{ 0x08, 0x424503f2 },
1560 	{ 0x0a, 0x01813022 },
1561 	{ 0x0b, 0x02a19021 },
1562 	{ 0x0c, 0x90a70320 },
1563 	{ 0x0d, 0x02214210 },
1564 	{ 0x10, 0x01019020 },
1565 	{ 0x11, 0x9033032e },
1566 	{}
1567 };
1568 
1569 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1570 	{ 0x07, 0x40c003f4 },
1571 	{ 0x08, 0x424503f2 },
1572 	{ 0x0a, 0x400000f3 },
1573 	{ 0x0b, 0x02a19020 },
1574 	{ 0x0c, 0x40a000f0 },
1575 	{ 0x0d, 0x90100210 },
1576 	{ 0x10, 0x400003f1 },
1577 	{ 0x11, 0x9033032e },
1578 	{}
1579 };
1580 
1581 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1582 	{ 0x07, 0x40c003f4 },
1583 	{ 0x08, 0x424503f2 },
1584 	{ 0x0a, 0x400000f3 },
1585 	{ 0x0b, 0x02a19020 },
1586 	{ 0x0c, 0x40a000f0 },
1587 	{ 0x0d, 0x90100210 },
1588 	{ 0x10, 0x400003f1 },
1589 	{ 0x11, 0x9033032e },
1590 	{}
1591 };
1592 
1593 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1594 	{ 0x07, 0x40c003f4 },
1595 	{ 0x08, 0x424503f2 },
1596 	{ 0x0a, 0x400000f3 },
1597 	{ 0x0b, 0x02a19020 },
1598 	{ 0x0c, 0x40a000f0 },
1599 	{ 0x0d, 0x90100210 },
1600 	{ 0x10, 0x400003f1 },
1601 	{ 0x11, 0x9033032e },
1602 	{}
1603 };
1604 
1605 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1606 	{ 0x07, 0x40c003f4 },
1607 	{ 0x08, 0x424503f2 },
1608 	{ 0x0a, 0x400000f3 },
1609 	{ 0x0b, 0x02a19020 },
1610 	{ 0x0c, 0x40a000f0 },
1611 	{ 0x0d, 0x90100210 },
1612 	{ 0x10, 0x400003f1 },
1613 	{ 0x11, 0x9033032e },
1614 	{}
1615 };
1616 
1617 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1618 	{ 0x07, 0x40c003f4 },
1619 	{ 0x08, 0x424503f2 },
1620 	{ 0x0a, 0x400000f3 },
1621 	{ 0x0b, 0x02a19020 },
1622 	{ 0x0c, 0x40a000f0 },
1623 	{ 0x0d, 0x90100210 },
1624 	{ 0x10, 0x400003f1 },
1625 	{ 0x11, 0x503303f3 },
1626 	{}
1627 };
1628 
1629 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1630 	{ 0x07, 0x40c003f4 },
1631 	{ 0x08, 0x424503f2 },
1632 	{ 0x0a, 0x400000f3 },
1633 	{ 0x0b, 0x02a19020 },
1634 	{ 0x0c, 0x40a000f0 },
1635 	{ 0x0d, 0x90100210 },
1636 	{ 0x10, 0x400003f1 },
1637 	{ 0x11, 0x9033032e },
1638 	{}
1639 };
1640 
1641 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1642 	{ 0x07, 0x40c003f4 },
1643 	{ 0x08, 0x424503f2 },
1644 	{ 0x0a, 0x400000f3 },
1645 	{ 0x0b, 0x02a19020 },
1646 	{ 0x0c, 0x40a000f0 },
1647 	{ 0x0d, 0x90100210 },
1648 	{ 0x10, 0x400003f1 },
1649 	{ 0x11, 0x90330320 },
1650 	{}
1651 };
1652 
1653 static const struct hda_fixup stac925x_fixups[] = {
1654 	[STAC_REF] = {
1655 		.type = HDA_FIXUP_PINS,
1656 		.v.pins = ref925x_pin_configs,
1657 	},
1658 	[STAC_M1] = {
1659 		.type = HDA_FIXUP_PINS,
1660 		.v.pins = stac925xM1_pin_configs,
1661 	},
1662 	[STAC_M1_2] = {
1663 		.type = HDA_FIXUP_PINS,
1664 		.v.pins = stac925xM1_2_pin_configs,
1665 	},
1666 	[STAC_M2] = {
1667 		.type = HDA_FIXUP_PINS,
1668 		.v.pins = stac925xM2_pin_configs,
1669 	},
1670 	[STAC_M2_2] = {
1671 		.type = HDA_FIXUP_PINS,
1672 		.v.pins = stac925xM2_2_pin_configs,
1673 	},
1674 	[STAC_M3] = {
1675 		.type = HDA_FIXUP_PINS,
1676 		.v.pins = stac925xM3_pin_configs,
1677 	},
1678 	[STAC_M5] = {
1679 		.type = HDA_FIXUP_PINS,
1680 		.v.pins = stac925xM5_pin_configs,
1681 	},
1682 	[STAC_M6] = {
1683 		.type = HDA_FIXUP_PINS,
1684 		.v.pins = stac925xM6_pin_configs,
1685 	},
1686 };
1687 
1688 static const struct hda_model_fixup stac925x_models[] = {
1689 	{ .id = STAC_REF, .name = "ref" },
1690 	{ .id = STAC_M1, .name = "m1" },
1691 	{ .id = STAC_M1_2, .name = "m1-2" },
1692 	{ .id = STAC_M2, .name = "m2" },
1693 	{ .id = STAC_M2_2, .name = "m2-2" },
1694 	{ .id = STAC_M3, .name = "m3" },
1695 	{ .id = STAC_M5, .name = "m5" },
1696 	{ .id = STAC_M6, .name = "m6" },
1697 	{}
1698 };
1699 
1700 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1701 	/* SigmaTel reference board */
1702 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1703 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1704 	SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1705 
1706 	/* Default table for unknown ID */
1707 	SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1708 
1709 	/* gateway machines are checked via codec ssid */
1710 	SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1711 	SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1712 	SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1713 	SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1714 	SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1715 	/* Not sure about the brand name for those */
1716 	SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1717 	SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1718 	SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1719 	SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1720 	{} /* terminator */
1721 };
1722 
1723 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1724 	{ 0x0a, 0x02214030 },
1725 	{ 0x0b, 0x02a19040 },
1726 	{ 0x0c, 0x01a19020 },
1727 	{ 0x0d, 0x02214030 },
1728 	{ 0x0e, 0x0181302e },
1729 	{ 0x0f, 0x01014010 },
1730 	{ 0x10, 0x01014020 },
1731 	{ 0x11, 0x01014030 },
1732 	{ 0x12, 0x02319040 },
1733 	{ 0x13, 0x90a000f0 },
1734 	{ 0x14, 0x90a000f0 },
1735 	{ 0x22, 0x01452050 },
1736 	{ 0x23, 0x01452050 },
1737 	{}
1738 };
1739 
1740 static const struct hda_pintbl dell_m6_pin_configs[] = {
1741 	{ 0x0a, 0x0321101f },
1742 	{ 0x0b, 0x4f00000f },
1743 	{ 0x0c, 0x4f0000f0 },
1744 	{ 0x0d, 0x90170110 },
1745 	{ 0x0e, 0x03a11020 },
1746 	{ 0x0f, 0x0321101f },
1747 	{ 0x10, 0x4f0000f0 },
1748 	{ 0x11, 0x4f0000f0 },
1749 	{ 0x12, 0x4f0000f0 },
1750 	{ 0x13, 0x90a60160 },
1751 	{ 0x14, 0x4f0000f0 },
1752 	{ 0x22, 0x4f0000f0 },
1753 	{ 0x23, 0x4f0000f0 },
1754 	{}
1755 };
1756 
1757 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1758 	{ 0x0a, 0x0321101f },
1759 	{ 0x0b, 0x0321101f },
1760 	{ 0x0c, 0x03a11020 },
1761 	{ 0x0d, 0x03014020 },
1762 	{ 0x0e, 0x90170110 },
1763 	{ 0x0f, 0x4f0000f0 },
1764 	{ 0x10, 0x4f0000f0 },
1765 	{ 0x11, 0x4f0000f0 },
1766 	{ 0x12, 0x4f0000f0 },
1767 	{ 0x13, 0x90a60160 },
1768 	{ 0x14, 0x4f0000f0 },
1769 	{ 0x22, 0x4f0000f0 },
1770 	{ 0x23, 0x904601b0 },
1771 	{}
1772 };
1773 
1774 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1775 	{ 0x0a, 0x02214230 },
1776 	{ 0x0b, 0x02A19240 },
1777 	{ 0x0c, 0x01013214 },
1778 	{ 0x0d, 0x01014210 },
1779 	{ 0x0e, 0x01A19250 },
1780 	{ 0x0f, 0x01011212 },
1781 	{ 0x10, 0x01016211 },
1782 	{}
1783 };
1784 
1785 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = {
1786 	{ 0x0a, 0x02214030 },
1787 	{ 0x0b, 0x02A19010 },
1788 	{}
1789 };
1790 
1791 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = {
1792 	{ 0x0e, 0x400000f0 },
1793 	{}
1794 };
1795 
1796 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1797 				   const struct hda_fixup *fix, int action)
1798 {
1799 	struct sigmatel_spec *spec = codec->spec;
1800 
1801 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1802 		return;
1803 
1804 	snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1805 	spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1806 }
1807 
1808 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1809 {
1810 	struct sigmatel_spec *spec = codec->spec;
1811 
1812 	snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1813 	spec->eapd_switch = 0;
1814 }
1815 
1816 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1817 				       const struct hda_fixup *fix, int action)
1818 {
1819 	struct sigmatel_spec *spec = codec->spec;
1820 
1821 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1822 		return;
1823 
1824 	stac92hd73xx_fixup_dell(codec);
1825 	snd_hda_add_verbs(codec, dell_eq_core_init);
1826 	spec->volknob_init = 1;
1827 }
1828 
1829 /* Analog Mics */
1830 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1831 				    const struct hda_fixup *fix, int action)
1832 {
1833 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1834 		return;
1835 
1836 	stac92hd73xx_fixup_dell(codec);
1837 	snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1838 }
1839 
1840 /* Digital Mics */
1841 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1842 				    const struct hda_fixup *fix, int action)
1843 {
1844 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1845 		return;
1846 
1847 	stac92hd73xx_fixup_dell(codec);
1848 	snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1849 }
1850 
1851 /* Both */
1852 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1853 				    const struct hda_fixup *fix, int action)
1854 {
1855 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1856 		return;
1857 
1858 	stac92hd73xx_fixup_dell(codec);
1859 	snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1860 	snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1861 }
1862 
1863 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1864 				    const struct hda_fixup *fix, int action)
1865 {
1866 	struct sigmatel_spec *spec = codec->spec;
1867 
1868 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
1869 		return;
1870 
1871 	snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1872 	spec->eapd_switch = 0;
1873 }
1874 
1875 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1876 				     const struct hda_fixup *fix, int action)
1877 {
1878 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
1879 		codec->no_jack_detect = 1;
1880 }
1881 
1882 static const struct hda_fixup stac92hd73xx_fixups[] = {
1883 	[STAC_92HD73XX_REF] = {
1884 		.type = HDA_FIXUP_FUNC,
1885 		.v.func = stac92hd73xx_fixup_ref,
1886 	},
1887 	[STAC_DELL_M6_AMIC] = {
1888 		.type = HDA_FIXUP_FUNC,
1889 		.v.func = stac92hd73xx_fixup_dell_m6_amic,
1890 	},
1891 	[STAC_DELL_M6_DMIC] = {
1892 		.type = HDA_FIXUP_FUNC,
1893 		.v.func = stac92hd73xx_fixup_dell_m6_dmic,
1894 	},
1895 	[STAC_DELL_M6_BOTH] = {
1896 		.type = HDA_FIXUP_FUNC,
1897 		.v.func = stac92hd73xx_fixup_dell_m6_both,
1898 	},
1899 	[STAC_DELL_EQ]	= {
1900 		.type = HDA_FIXUP_FUNC,
1901 		.v.func = stac92hd73xx_fixup_dell_eq,
1902 	},
1903 	[STAC_ALIENWARE_M17X] = {
1904 		.type = HDA_FIXUP_FUNC,
1905 		.v.func = stac92hd73xx_fixup_alienware_m17x,
1906 	},
1907 	[STAC_92HD73XX_INTEL] = {
1908 		.type = HDA_FIXUP_PINS,
1909 		.v.pins = intel_dg45id_pin_configs,
1910 	},
1911 	[STAC_92HD73XX_NO_JD] = {
1912 		.type = HDA_FIXUP_FUNC,
1913 		.v.func = stac92hd73xx_fixup_no_jd,
1914 	},
1915 	[STAC_92HD89XX_HP_FRONT_JACK] = {
1916 		.type = HDA_FIXUP_PINS,
1917 		.v.pins = stac92hd89xx_hp_front_jack_pin_configs,
1918 	},
1919 	[STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1920 		.type = HDA_FIXUP_PINS,
1921 		.v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1922 	},
1923 	[STAC_92HD73XX_ASUS_MOBO] = {
1924 		.type = HDA_FIXUP_PINS,
1925 		.v.pins = (const struct hda_pintbl[]) {
1926 			/* enable 5.1 and SPDIF out */
1927 			{ 0x0c, 0x01014411 },
1928 			{ 0x0d, 0x01014410 },
1929 			{ 0x0e, 0x01014412 },
1930 			{ 0x22, 0x014b1180 },
1931 			{ }
1932 		}
1933 	},
1934 };
1935 
1936 static const struct hda_model_fixup stac92hd73xx_models[] = {
1937 	{ .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1938 	{ .id = STAC_92HD73XX_REF, .name = "ref" },
1939 	{ .id = STAC_92HD73XX_INTEL, .name = "intel" },
1940 	{ .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1941 	{ .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1942 	{ .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1943 	{ .id = STAC_DELL_EQ, .name = "dell-eq" },
1944 	{ .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1945 	{ .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1946 	{}
1947 };
1948 
1949 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1950 	/* SigmaTel reference board */
1951 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1952 				"DFI LanParty", STAC_92HD73XX_REF),
1953 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1954 				"DFI LanParty", STAC_92HD73XX_REF),
1955 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1956 				"Intel DG45ID", STAC_92HD73XX_INTEL),
1957 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1958 				"Intel DG45FC", STAC_92HD73XX_INTEL),
1959 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1960 				"Dell Studio 1535", STAC_DELL_M6_DMIC),
1961 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1962 				"unknown Dell", STAC_DELL_M6_DMIC),
1963 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1964 				"unknown Dell", STAC_DELL_M6_BOTH),
1965 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1966 				"unknown Dell", STAC_DELL_M6_BOTH),
1967 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1968 				"unknown Dell", STAC_DELL_M6_AMIC),
1969 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1970 				"unknown Dell", STAC_DELL_M6_AMIC),
1971 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1972 				"unknown Dell", STAC_DELL_M6_DMIC),
1973 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1974 				"unknown Dell", STAC_DELL_M6_DMIC),
1975 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1976 				"Dell Studio 1537", STAC_DELL_M6_DMIC),
1977 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1978 				"Dell Studio 17", STAC_DELL_M6_DMIC),
1979 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1980 				"Dell Studio 1555", STAC_DELL_M6_DMIC),
1981 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1982 				"Dell Studio 1557", STAC_DELL_M6_DMIC),
1983 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1984 				"Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1985 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1986 				"Dell Studio 1558", STAC_DELL_M6_DMIC),
1987 	/* codec SSID matching */
1988 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1989 		      "Alienware M17x", STAC_ALIENWARE_M17X),
1990 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1991 		      "Alienware M17x", STAC_ALIENWARE_M17X),
1992 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1993 		      "Alienware M17x R3", STAC_DELL_EQ),
1994 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927,
1995 				"HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
1996 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
1997 				"unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
1998 	SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
1999 		      STAC_92HD73XX_ASUS_MOBO),
2000 	{} /* terminator */
2001 };
2002 
2003 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
2004 	{ 0x0a, 0x02214030 },
2005 	{ 0x0b, 0x02211010 },
2006 	{ 0x0c, 0x02a19020 },
2007 	{ 0x0d, 0x02170130 },
2008 	{ 0x0e, 0x01014050 },
2009 	{ 0x0f, 0x01819040 },
2010 	{ 0x10, 0x01014020 },
2011 	{ 0x11, 0x90a3014e },
2012 	{ 0x1f, 0x01451160 },
2013 	{ 0x20, 0x98560170 },
2014 	{}
2015 };
2016 
2017 static const struct hda_pintbl dell_s14_pin_configs[] = {
2018 	{ 0x0a, 0x0221403f },
2019 	{ 0x0b, 0x0221101f },
2020 	{ 0x0c, 0x02a19020 },
2021 	{ 0x0d, 0x90170110 },
2022 	{ 0x0e, 0x40f000f0 },
2023 	{ 0x0f, 0x40f000f0 },
2024 	{ 0x10, 0x40f000f0 },
2025 	{ 0x11, 0x90a60160 },
2026 	{ 0x1f, 0x40f000f0 },
2027 	{ 0x20, 0x40f000f0 },
2028 	{}
2029 };
2030 
2031 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
2032 	{ 0x0a, 0x02a11020 },
2033 	{ 0x0b, 0x0221101f },
2034 	{ 0x0c, 0x400000f0 },
2035 	{ 0x0d, 0x90170110 },
2036 	{ 0x0e, 0x400000f1 },
2037 	{ 0x0f, 0x400000f2 },
2038 	{ 0x10, 0x400000f3 },
2039 	{ 0x11, 0x90a60160 },
2040 	{ 0x1f, 0x400000f4 },
2041 	{ 0x20, 0x400000f5 },
2042 	{}
2043 };
2044 
2045 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
2046 	{ 0x0a, 0x03a12050 },
2047 	{ 0x0b, 0x0321201f },
2048 	{ 0x0c, 0x40f000f0 },
2049 	{ 0x0d, 0x90170110 },
2050 	{ 0x0e, 0x40f000f0 },
2051 	{ 0x0f, 0x40f000f0 },
2052 	{ 0x10, 0x90170110 },
2053 	{ 0x11, 0xd5a30140 },
2054 	{ 0x1f, 0x40f000f0 },
2055 	{ 0x20, 0x40f000f0 },
2056 	{}
2057 };
2058 
2059 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
2060 	{ 0x0a, 0x01813050 },
2061 	{ 0x0b, 0x0421201f },
2062 	{ 0x0c, 0x04a1205e },
2063 	{ 0x0d, 0x96130310 },
2064 	{ 0x0e, 0x96130310 },
2065 	{ 0x0f, 0x0101401f },
2066 	{ 0x10, 0x1111611f },
2067 	{ 0x11, 0xd5a30130 },
2068 	{}
2069 };
2070 
2071 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
2072 	{ 0x0a, 0x40f000f0 },
2073 	{ 0x0b, 0x0221101f },
2074 	{ 0x0c, 0x02a11020 },
2075 	{ 0x0d, 0x92170110 },
2076 	{ 0x0e, 0x40f000f0 },
2077 	{ 0x0f, 0x92170110 },
2078 	{ 0x10, 0x40f000f0 },
2079 	{ 0x11, 0xd5a30130 },
2080 	{ 0x1f, 0x40f000f0 },
2081 	{ 0x20, 0x40f000f0 },
2082 	{}
2083 };
2084 
2085 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
2086 				   const struct hda_fixup *fix, int action)
2087 {
2088 	struct sigmatel_spec *spec = codec->spec;
2089 
2090 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2091 		return;
2092 
2093 	if (hp_bnb2011_with_dock(codec)) {
2094 		snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
2095 		snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
2096 	}
2097 
2098 	if (find_mute_led_cfg(codec, spec->default_polarity))
2099 		codec_dbg(codec, "mute LED gpio %d polarity %d\n",
2100 				spec->gpio_led,
2101 				spec->gpio_led_polarity);
2102 
2103 	/* allow auto-switching of dock line-in */
2104 	spec->gen.line_in_auto_switch = true;
2105 }
2106 
2107 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
2108 				   const struct hda_fixup *fix, int action)
2109 {
2110 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2111 		return;
2112 
2113 	snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
2114 	snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
2115 }
2116 
2117 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
2118 				   const struct hda_fixup *fix, int action)
2119 {
2120 	struct sigmatel_spec *spec = codec->spec;
2121 
2122 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2123 		spec->default_polarity = 0;
2124 }
2125 
2126 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
2127 				   const struct hda_fixup *fix, int action)
2128 {
2129 	struct sigmatel_spec *spec = codec->spec;
2130 
2131 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2132 		spec->default_polarity = 1;
2133 }
2134 
2135 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
2136 				   const struct hda_fixup *fix, int action)
2137 {
2138 	struct sigmatel_spec *spec = codec->spec;
2139 
2140 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2141 		spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
2142 #ifdef CONFIG_PM
2143 		/* resetting controller clears GPIO, so we need to keep on */
2144 		codec->core.power_caps &= ~AC_PWRST_CLKSTOP;
2145 #endif
2146 	}
2147 }
2148 
2149 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec,
2150 				   const struct hda_fixup *fix, int action)
2151 {
2152 	struct sigmatel_spec *spec = codec->spec;
2153 
2154 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2155 		spec->gpio_led = 0x10; /* GPIO4 */
2156 		spec->default_polarity = 0;
2157 	}
2158 }
2159 
2160 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
2161 				   const struct hda_fixup *fix, int action)
2162 {
2163 	struct sigmatel_spec *spec = codec->spec;
2164 
2165 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
2166 		spec->headset_jack = 1;
2167 }
2168 
2169 static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec,
2170 					    const struct hda_fixup *fix,
2171 					    int action)
2172 {
2173 	struct sigmatel_spec *spec = codec->spec;
2174 
2175 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2176 		return;
2177 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir =
2178 		spec->gpio_data = 0x10;
2179 	spec->eapd_switch = 0;
2180 }
2181 
2182 static void hp_envy_ts_fixup_dac_bind(struct hda_codec *codec,
2183 					    const struct hda_fixup *fix,
2184 					    int action)
2185 {
2186 	struct sigmatel_spec *spec = codec->spec;
2187 	static hda_nid_t preferred_pairs[] = {
2188 		0xd, 0x13,
2189 		0
2190 	};
2191 
2192 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
2193 		return;
2194 
2195 	spec->gen.preferred_dacs = preferred_pairs;
2196 }
2197 
2198 static const struct hda_verb hp_bnb13_eq_verbs[] = {
2199 	/* 44.1KHz base */
2200 	{ 0x22, 0x7A6, 0x3E },
2201 	{ 0x22, 0x7A7, 0x68 },
2202 	{ 0x22, 0x7A8, 0x17 },
2203 	{ 0x22, 0x7A9, 0x3E },
2204 	{ 0x22, 0x7AA, 0x68 },
2205 	{ 0x22, 0x7AB, 0x17 },
2206 	{ 0x22, 0x7AC, 0x00 },
2207 	{ 0x22, 0x7AD, 0x80 },
2208 	{ 0x22, 0x7A6, 0x83 },
2209 	{ 0x22, 0x7A7, 0x2F },
2210 	{ 0x22, 0x7A8, 0xD1 },
2211 	{ 0x22, 0x7A9, 0x83 },
2212 	{ 0x22, 0x7AA, 0x2F },
2213 	{ 0x22, 0x7AB, 0xD1 },
2214 	{ 0x22, 0x7AC, 0x01 },
2215 	{ 0x22, 0x7AD, 0x80 },
2216 	{ 0x22, 0x7A6, 0x3E },
2217 	{ 0x22, 0x7A7, 0x68 },
2218 	{ 0x22, 0x7A8, 0x17 },
2219 	{ 0x22, 0x7A9, 0x3E },
2220 	{ 0x22, 0x7AA, 0x68 },
2221 	{ 0x22, 0x7AB, 0x17 },
2222 	{ 0x22, 0x7AC, 0x02 },
2223 	{ 0x22, 0x7AD, 0x80 },
2224 	{ 0x22, 0x7A6, 0x7C },
2225 	{ 0x22, 0x7A7, 0xC6 },
2226 	{ 0x22, 0x7A8, 0x0C },
2227 	{ 0x22, 0x7A9, 0x7C },
2228 	{ 0x22, 0x7AA, 0xC6 },
2229 	{ 0x22, 0x7AB, 0x0C },
2230 	{ 0x22, 0x7AC, 0x03 },
2231 	{ 0x22, 0x7AD, 0x80 },
2232 	{ 0x22, 0x7A6, 0xC3 },
2233 	{ 0x22, 0x7A7, 0x25 },
2234 	{ 0x22, 0x7A8, 0xAF },
2235 	{ 0x22, 0x7A9, 0xC3 },
2236 	{ 0x22, 0x7AA, 0x25 },
2237 	{ 0x22, 0x7AB, 0xAF },
2238 	{ 0x22, 0x7AC, 0x04 },
2239 	{ 0x22, 0x7AD, 0x80 },
2240 	{ 0x22, 0x7A6, 0x3E },
2241 	{ 0x22, 0x7A7, 0x85 },
2242 	{ 0x22, 0x7A8, 0x73 },
2243 	{ 0x22, 0x7A9, 0x3E },
2244 	{ 0x22, 0x7AA, 0x85 },
2245 	{ 0x22, 0x7AB, 0x73 },
2246 	{ 0x22, 0x7AC, 0x05 },
2247 	{ 0x22, 0x7AD, 0x80 },
2248 	{ 0x22, 0x7A6, 0x85 },
2249 	{ 0x22, 0x7A7, 0x39 },
2250 	{ 0x22, 0x7A8, 0xC7 },
2251 	{ 0x22, 0x7A9, 0x85 },
2252 	{ 0x22, 0x7AA, 0x39 },
2253 	{ 0x22, 0x7AB, 0xC7 },
2254 	{ 0x22, 0x7AC, 0x06 },
2255 	{ 0x22, 0x7AD, 0x80 },
2256 	{ 0x22, 0x7A6, 0x3C },
2257 	{ 0x22, 0x7A7, 0x90 },
2258 	{ 0x22, 0x7A8, 0xB0 },
2259 	{ 0x22, 0x7A9, 0x3C },
2260 	{ 0x22, 0x7AA, 0x90 },
2261 	{ 0x22, 0x7AB, 0xB0 },
2262 	{ 0x22, 0x7AC, 0x07 },
2263 	{ 0x22, 0x7AD, 0x80 },
2264 	{ 0x22, 0x7A6, 0x7A },
2265 	{ 0x22, 0x7A7, 0xC6 },
2266 	{ 0x22, 0x7A8, 0x39 },
2267 	{ 0x22, 0x7A9, 0x7A },
2268 	{ 0x22, 0x7AA, 0xC6 },
2269 	{ 0x22, 0x7AB, 0x39 },
2270 	{ 0x22, 0x7AC, 0x08 },
2271 	{ 0x22, 0x7AD, 0x80 },
2272 	{ 0x22, 0x7A6, 0xC4 },
2273 	{ 0x22, 0x7A7, 0xE9 },
2274 	{ 0x22, 0x7A8, 0xDC },
2275 	{ 0x22, 0x7A9, 0xC4 },
2276 	{ 0x22, 0x7AA, 0xE9 },
2277 	{ 0x22, 0x7AB, 0xDC },
2278 	{ 0x22, 0x7AC, 0x09 },
2279 	{ 0x22, 0x7AD, 0x80 },
2280 	{ 0x22, 0x7A6, 0x3D },
2281 	{ 0x22, 0x7A7, 0xE1 },
2282 	{ 0x22, 0x7A8, 0x0D },
2283 	{ 0x22, 0x7A9, 0x3D },
2284 	{ 0x22, 0x7AA, 0xE1 },
2285 	{ 0x22, 0x7AB, 0x0D },
2286 	{ 0x22, 0x7AC, 0x0A },
2287 	{ 0x22, 0x7AD, 0x80 },
2288 	{ 0x22, 0x7A6, 0x89 },
2289 	{ 0x22, 0x7A7, 0xB6 },
2290 	{ 0x22, 0x7A8, 0xEB },
2291 	{ 0x22, 0x7A9, 0x89 },
2292 	{ 0x22, 0x7AA, 0xB6 },
2293 	{ 0x22, 0x7AB, 0xEB },
2294 	{ 0x22, 0x7AC, 0x0B },
2295 	{ 0x22, 0x7AD, 0x80 },
2296 	{ 0x22, 0x7A6, 0x39 },
2297 	{ 0x22, 0x7A7, 0x9D },
2298 	{ 0x22, 0x7A8, 0xFE },
2299 	{ 0x22, 0x7A9, 0x39 },
2300 	{ 0x22, 0x7AA, 0x9D },
2301 	{ 0x22, 0x7AB, 0xFE },
2302 	{ 0x22, 0x7AC, 0x0C },
2303 	{ 0x22, 0x7AD, 0x80 },
2304 	{ 0x22, 0x7A6, 0x76 },
2305 	{ 0x22, 0x7A7, 0x49 },
2306 	{ 0x22, 0x7A8, 0x15 },
2307 	{ 0x22, 0x7A9, 0x76 },
2308 	{ 0x22, 0x7AA, 0x49 },
2309 	{ 0x22, 0x7AB, 0x15 },
2310 	{ 0x22, 0x7AC, 0x0D },
2311 	{ 0x22, 0x7AD, 0x80 },
2312 	{ 0x22, 0x7A6, 0xC8 },
2313 	{ 0x22, 0x7A7, 0x80 },
2314 	{ 0x22, 0x7A8, 0xF5 },
2315 	{ 0x22, 0x7A9, 0xC8 },
2316 	{ 0x22, 0x7AA, 0x80 },
2317 	{ 0x22, 0x7AB, 0xF5 },
2318 	{ 0x22, 0x7AC, 0x0E },
2319 	{ 0x22, 0x7AD, 0x80 },
2320 	{ 0x22, 0x7A6, 0x40 },
2321 	{ 0x22, 0x7A7, 0x00 },
2322 	{ 0x22, 0x7A8, 0x00 },
2323 	{ 0x22, 0x7A9, 0x40 },
2324 	{ 0x22, 0x7AA, 0x00 },
2325 	{ 0x22, 0x7AB, 0x00 },
2326 	{ 0x22, 0x7AC, 0x0F },
2327 	{ 0x22, 0x7AD, 0x80 },
2328 	{ 0x22, 0x7A6, 0x90 },
2329 	{ 0x22, 0x7A7, 0x68 },
2330 	{ 0x22, 0x7A8, 0xF1 },
2331 	{ 0x22, 0x7A9, 0x90 },
2332 	{ 0x22, 0x7AA, 0x68 },
2333 	{ 0x22, 0x7AB, 0xF1 },
2334 	{ 0x22, 0x7AC, 0x10 },
2335 	{ 0x22, 0x7AD, 0x80 },
2336 	{ 0x22, 0x7A6, 0x34 },
2337 	{ 0x22, 0x7A7, 0x47 },
2338 	{ 0x22, 0x7A8, 0x6C },
2339 	{ 0x22, 0x7A9, 0x34 },
2340 	{ 0x22, 0x7AA, 0x47 },
2341 	{ 0x22, 0x7AB, 0x6C },
2342 	{ 0x22, 0x7AC, 0x11 },
2343 	{ 0x22, 0x7AD, 0x80 },
2344 	{ 0x22, 0x7A6, 0x6F },
2345 	{ 0x22, 0x7A7, 0x97 },
2346 	{ 0x22, 0x7A8, 0x0F },
2347 	{ 0x22, 0x7A9, 0x6F },
2348 	{ 0x22, 0x7AA, 0x97 },
2349 	{ 0x22, 0x7AB, 0x0F },
2350 	{ 0x22, 0x7AC, 0x12 },
2351 	{ 0x22, 0x7AD, 0x80 },
2352 	{ 0x22, 0x7A6, 0xCB },
2353 	{ 0x22, 0x7A7, 0xB8 },
2354 	{ 0x22, 0x7A8, 0x94 },
2355 	{ 0x22, 0x7A9, 0xCB },
2356 	{ 0x22, 0x7AA, 0xB8 },
2357 	{ 0x22, 0x7AB, 0x94 },
2358 	{ 0x22, 0x7AC, 0x13 },
2359 	{ 0x22, 0x7AD, 0x80 },
2360 	{ 0x22, 0x7A6, 0x40 },
2361 	{ 0x22, 0x7A7, 0x00 },
2362 	{ 0x22, 0x7A8, 0x00 },
2363 	{ 0x22, 0x7A9, 0x40 },
2364 	{ 0x22, 0x7AA, 0x00 },
2365 	{ 0x22, 0x7AB, 0x00 },
2366 	{ 0x22, 0x7AC, 0x14 },
2367 	{ 0x22, 0x7AD, 0x80 },
2368 	{ 0x22, 0x7A6, 0x95 },
2369 	{ 0x22, 0x7A7, 0x76 },
2370 	{ 0x22, 0x7A8, 0x5B },
2371 	{ 0x22, 0x7A9, 0x95 },
2372 	{ 0x22, 0x7AA, 0x76 },
2373 	{ 0x22, 0x7AB, 0x5B },
2374 	{ 0x22, 0x7AC, 0x15 },
2375 	{ 0x22, 0x7AD, 0x80 },
2376 	{ 0x22, 0x7A6, 0x31 },
2377 	{ 0x22, 0x7A7, 0xAC },
2378 	{ 0x22, 0x7A8, 0x31 },
2379 	{ 0x22, 0x7A9, 0x31 },
2380 	{ 0x22, 0x7AA, 0xAC },
2381 	{ 0x22, 0x7AB, 0x31 },
2382 	{ 0x22, 0x7AC, 0x16 },
2383 	{ 0x22, 0x7AD, 0x80 },
2384 	{ 0x22, 0x7A6, 0x6A },
2385 	{ 0x22, 0x7A7, 0x89 },
2386 	{ 0x22, 0x7A8, 0xA5 },
2387 	{ 0x22, 0x7A9, 0x6A },
2388 	{ 0x22, 0x7AA, 0x89 },
2389 	{ 0x22, 0x7AB, 0xA5 },
2390 	{ 0x22, 0x7AC, 0x17 },
2391 	{ 0x22, 0x7AD, 0x80 },
2392 	{ 0x22, 0x7A6, 0xCE },
2393 	{ 0x22, 0x7A7, 0x53 },
2394 	{ 0x22, 0x7A8, 0xCF },
2395 	{ 0x22, 0x7A9, 0xCE },
2396 	{ 0x22, 0x7AA, 0x53 },
2397 	{ 0x22, 0x7AB, 0xCF },
2398 	{ 0x22, 0x7AC, 0x18 },
2399 	{ 0x22, 0x7AD, 0x80 },
2400 	{ 0x22, 0x7A6, 0x40 },
2401 	{ 0x22, 0x7A7, 0x00 },
2402 	{ 0x22, 0x7A8, 0x00 },
2403 	{ 0x22, 0x7A9, 0x40 },
2404 	{ 0x22, 0x7AA, 0x00 },
2405 	{ 0x22, 0x7AB, 0x00 },
2406 	{ 0x22, 0x7AC, 0x19 },
2407 	{ 0x22, 0x7AD, 0x80 },
2408 	/* 48KHz base */
2409 	{ 0x22, 0x7A6, 0x3E },
2410 	{ 0x22, 0x7A7, 0x88 },
2411 	{ 0x22, 0x7A8, 0xDC },
2412 	{ 0x22, 0x7A9, 0x3E },
2413 	{ 0x22, 0x7AA, 0x88 },
2414 	{ 0x22, 0x7AB, 0xDC },
2415 	{ 0x22, 0x7AC, 0x1A },
2416 	{ 0x22, 0x7AD, 0x80 },
2417 	{ 0x22, 0x7A6, 0x82 },
2418 	{ 0x22, 0x7A7, 0xEE },
2419 	{ 0x22, 0x7A8, 0x46 },
2420 	{ 0x22, 0x7A9, 0x82 },
2421 	{ 0x22, 0x7AA, 0xEE },
2422 	{ 0x22, 0x7AB, 0x46 },
2423 	{ 0x22, 0x7AC, 0x1B },
2424 	{ 0x22, 0x7AD, 0x80 },
2425 	{ 0x22, 0x7A6, 0x3E },
2426 	{ 0x22, 0x7A7, 0x88 },
2427 	{ 0x22, 0x7A8, 0xDC },
2428 	{ 0x22, 0x7A9, 0x3E },
2429 	{ 0x22, 0x7AA, 0x88 },
2430 	{ 0x22, 0x7AB, 0xDC },
2431 	{ 0x22, 0x7AC, 0x1C },
2432 	{ 0x22, 0x7AD, 0x80 },
2433 	{ 0x22, 0x7A6, 0x7D },
2434 	{ 0x22, 0x7A7, 0x09 },
2435 	{ 0x22, 0x7A8, 0x28 },
2436 	{ 0x22, 0x7A9, 0x7D },
2437 	{ 0x22, 0x7AA, 0x09 },
2438 	{ 0x22, 0x7AB, 0x28 },
2439 	{ 0x22, 0x7AC, 0x1D },
2440 	{ 0x22, 0x7AD, 0x80 },
2441 	{ 0x22, 0x7A6, 0xC2 },
2442 	{ 0x22, 0x7A7, 0xE5 },
2443 	{ 0x22, 0x7A8, 0xB4 },
2444 	{ 0x22, 0x7A9, 0xC2 },
2445 	{ 0x22, 0x7AA, 0xE5 },
2446 	{ 0x22, 0x7AB, 0xB4 },
2447 	{ 0x22, 0x7AC, 0x1E },
2448 	{ 0x22, 0x7AD, 0x80 },
2449 	{ 0x22, 0x7A6, 0x3E },
2450 	{ 0x22, 0x7A7, 0xA3 },
2451 	{ 0x22, 0x7A8, 0x1F },
2452 	{ 0x22, 0x7A9, 0x3E },
2453 	{ 0x22, 0x7AA, 0xA3 },
2454 	{ 0x22, 0x7AB, 0x1F },
2455 	{ 0x22, 0x7AC, 0x1F },
2456 	{ 0x22, 0x7AD, 0x80 },
2457 	{ 0x22, 0x7A6, 0x84 },
2458 	{ 0x22, 0x7A7, 0xCA },
2459 	{ 0x22, 0x7A8, 0xF1 },
2460 	{ 0x22, 0x7A9, 0x84 },
2461 	{ 0x22, 0x7AA, 0xCA },
2462 	{ 0x22, 0x7AB, 0xF1 },
2463 	{ 0x22, 0x7AC, 0x20 },
2464 	{ 0x22, 0x7AD, 0x80 },
2465 	{ 0x22, 0x7A6, 0x3C },
2466 	{ 0x22, 0x7A7, 0xD5 },
2467 	{ 0x22, 0x7A8, 0x9C },
2468 	{ 0x22, 0x7A9, 0x3C },
2469 	{ 0x22, 0x7AA, 0xD5 },
2470 	{ 0x22, 0x7AB, 0x9C },
2471 	{ 0x22, 0x7AC, 0x21 },
2472 	{ 0x22, 0x7AD, 0x80 },
2473 	{ 0x22, 0x7A6, 0x7B },
2474 	{ 0x22, 0x7A7, 0x35 },
2475 	{ 0x22, 0x7A8, 0x0F },
2476 	{ 0x22, 0x7A9, 0x7B },
2477 	{ 0x22, 0x7AA, 0x35 },
2478 	{ 0x22, 0x7AB, 0x0F },
2479 	{ 0x22, 0x7AC, 0x22 },
2480 	{ 0x22, 0x7AD, 0x80 },
2481 	{ 0x22, 0x7A6, 0xC4 },
2482 	{ 0x22, 0x7A7, 0x87 },
2483 	{ 0x22, 0x7A8, 0x45 },
2484 	{ 0x22, 0x7A9, 0xC4 },
2485 	{ 0x22, 0x7AA, 0x87 },
2486 	{ 0x22, 0x7AB, 0x45 },
2487 	{ 0x22, 0x7AC, 0x23 },
2488 	{ 0x22, 0x7AD, 0x80 },
2489 	{ 0x22, 0x7A6, 0x3E },
2490 	{ 0x22, 0x7A7, 0x0A },
2491 	{ 0x22, 0x7A8, 0x78 },
2492 	{ 0x22, 0x7A9, 0x3E },
2493 	{ 0x22, 0x7AA, 0x0A },
2494 	{ 0x22, 0x7AB, 0x78 },
2495 	{ 0x22, 0x7AC, 0x24 },
2496 	{ 0x22, 0x7AD, 0x80 },
2497 	{ 0x22, 0x7A6, 0x88 },
2498 	{ 0x22, 0x7A7, 0xE2 },
2499 	{ 0x22, 0x7A8, 0x05 },
2500 	{ 0x22, 0x7A9, 0x88 },
2501 	{ 0x22, 0x7AA, 0xE2 },
2502 	{ 0x22, 0x7AB, 0x05 },
2503 	{ 0x22, 0x7AC, 0x25 },
2504 	{ 0x22, 0x7AD, 0x80 },
2505 	{ 0x22, 0x7A6, 0x3A },
2506 	{ 0x22, 0x7A7, 0x1A },
2507 	{ 0x22, 0x7A8, 0xA3 },
2508 	{ 0x22, 0x7A9, 0x3A },
2509 	{ 0x22, 0x7AA, 0x1A },
2510 	{ 0x22, 0x7AB, 0xA3 },
2511 	{ 0x22, 0x7AC, 0x26 },
2512 	{ 0x22, 0x7AD, 0x80 },
2513 	{ 0x22, 0x7A6, 0x77 },
2514 	{ 0x22, 0x7A7, 0x1D },
2515 	{ 0x22, 0x7A8, 0xFB },
2516 	{ 0x22, 0x7A9, 0x77 },
2517 	{ 0x22, 0x7AA, 0x1D },
2518 	{ 0x22, 0x7AB, 0xFB },
2519 	{ 0x22, 0x7AC, 0x27 },
2520 	{ 0x22, 0x7AD, 0x80 },
2521 	{ 0x22, 0x7A6, 0xC7 },
2522 	{ 0x22, 0x7A7, 0xDA },
2523 	{ 0x22, 0x7A8, 0xE5 },
2524 	{ 0x22, 0x7A9, 0xC7 },
2525 	{ 0x22, 0x7AA, 0xDA },
2526 	{ 0x22, 0x7AB, 0xE5 },
2527 	{ 0x22, 0x7AC, 0x28 },
2528 	{ 0x22, 0x7AD, 0x80 },
2529 	{ 0x22, 0x7A6, 0x40 },
2530 	{ 0x22, 0x7A7, 0x00 },
2531 	{ 0x22, 0x7A8, 0x00 },
2532 	{ 0x22, 0x7A9, 0x40 },
2533 	{ 0x22, 0x7AA, 0x00 },
2534 	{ 0x22, 0x7AB, 0x00 },
2535 	{ 0x22, 0x7AC, 0x29 },
2536 	{ 0x22, 0x7AD, 0x80 },
2537 	{ 0x22, 0x7A6, 0x8E },
2538 	{ 0x22, 0x7A7, 0xD7 },
2539 	{ 0x22, 0x7A8, 0x22 },
2540 	{ 0x22, 0x7A9, 0x8E },
2541 	{ 0x22, 0x7AA, 0xD7 },
2542 	{ 0x22, 0x7AB, 0x22 },
2543 	{ 0x22, 0x7AC, 0x2A },
2544 	{ 0x22, 0x7AD, 0x80 },
2545 	{ 0x22, 0x7A6, 0x35 },
2546 	{ 0x22, 0x7A7, 0x26 },
2547 	{ 0x22, 0x7A8, 0xC6 },
2548 	{ 0x22, 0x7A9, 0x35 },
2549 	{ 0x22, 0x7AA, 0x26 },
2550 	{ 0x22, 0x7AB, 0xC6 },
2551 	{ 0x22, 0x7AC, 0x2B },
2552 	{ 0x22, 0x7AD, 0x80 },
2553 	{ 0x22, 0x7A6, 0x71 },
2554 	{ 0x22, 0x7A7, 0x28 },
2555 	{ 0x22, 0x7A8, 0xDE },
2556 	{ 0x22, 0x7A9, 0x71 },
2557 	{ 0x22, 0x7AA, 0x28 },
2558 	{ 0x22, 0x7AB, 0xDE },
2559 	{ 0x22, 0x7AC, 0x2C },
2560 	{ 0x22, 0x7AD, 0x80 },
2561 	{ 0x22, 0x7A6, 0xCA },
2562 	{ 0x22, 0x7A7, 0xD9 },
2563 	{ 0x22, 0x7A8, 0x3A },
2564 	{ 0x22, 0x7A9, 0xCA },
2565 	{ 0x22, 0x7AA, 0xD9 },
2566 	{ 0x22, 0x7AB, 0x3A },
2567 	{ 0x22, 0x7AC, 0x2D },
2568 	{ 0x22, 0x7AD, 0x80 },
2569 	{ 0x22, 0x7A6, 0x40 },
2570 	{ 0x22, 0x7A7, 0x00 },
2571 	{ 0x22, 0x7A8, 0x00 },
2572 	{ 0x22, 0x7A9, 0x40 },
2573 	{ 0x22, 0x7AA, 0x00 },
2574 	{ 0x22, 0x7AB, 0x00 },
2575 	{ 0x22, 0x7AC, 0x2E },
2576 	{ 0x22, 0x7AD, 0x80 },
2577 	{ 0x22, 0x7A6, 0x93 },
2578 	{ 0x22, 0x7A7, 0x5E },
2579 	{ 0x22, 0x7A8, 0xD8 },
2580 	{ 0x22, 0x7A9, 0x93 },
2581 	{ 0x22, 0x7AA, 0x5E },
2582 	{ 0x22, 0x7AB, 0xD8 },
2583 	{ 0x22, 0x7AC, 0x2F },
2584 	{ 0x22, 0x7AD, 0x80 },
2585 	{ 0x22, 0x7A6, 0x32 },
2586 	{ 0x22, 0x7A7, 0xB7 },
2587 	{ 0x22, 0x7A8, 0xB1 },
2588 	{ 0x22, 0x7A9, 0x32 },
2589 	{ 0x22, 0x7AA, 0xB7 },
2590 	{ 0x22, 0x7AB, 0xB1 },
2591 	{ 0x22, 0x7AC, 0x30 },
2592 	{ 0x22, 0x7AD, 0x80 },
2593 	{ 0x22, 0x7A6, 0x6C },
2594 	{ 0x22, 0x7A7, 0xA1 },
2595 	{ 0x22, 0x7A8, 0x28 },
2596 	{ 0x22, 0x7A9, 0x6C },
2597 	{ 0x22, 0x7AA, 0xA1 },
2598 	{ 0x22, 0x7AB, 0x28 },
2599 	{ 0x22, 0x7AC, 0x31 },
2600 	{ 0x22, 0x7AD, 0x80 },
2601 	{ 0x22, 0x7A6, 0xCD },
2602 	{ 0x22, 0x7A7, 0x48 },
2603 	{ 0x22, 0x7A8, 0x4F },
2604 	{ 0x22, 0x7A9, 0xCD },
2605 	{ 0x22, 0x7AA, 0x48 },
2606 	{ 0x22, 0x7AB, 0x4F },
2607 	{ 0x22, 0x7AC, 0x32 },
2608 	{ 0x22, 0x7AD, 0x80 },
2609 	{ 0x22, 0x7A6, 0x40 },
2610 	{ 0x22, 0x7A7, 0x00 },
2611 	{ 0x22, 0x7A8, 0x00 },
2612 	{ 0x22, 0x7A9, 0x40 },
2613 	{ 0x22, 0x7AA, 0x00 },
2614 	{ 0x22, 0x7AB, 0x00 },
2615 	{ 0x22, 0x7AC, 0x33 },
2616 	{ 0x22, 0x7AD, 0x80 },
2617 	/* common */
2618 	{ 0x22, 0x782, 0xC1 },
2619 	{ 0x22, 0x771, 0x2C },
2620 	{ 0x22, 0x772, 0x2C },
2621 	{ 0x22, 0x788, 0x04 },
2622 	{ 0x01, 0x7B0, 0x08 },
2623 	{}
2624 };
2625 
2626 static const struct hda_fixup stac92hd83xxx_fixups[] = {
2627 	[STAC_92HD83XXX_REF] = {
2628 		.type = HDA_FIXUP_PINS,
2629 		.v.pins = ref92hd83xxx_pin_configs,
2630 	},
2631 	[STAC_92HD83XXX_PWR_REF] = {
2632 		.type = HDA_FIXUP_PINS,
2633 		.v.pins = ref92hd83xxx_pin_configs,
2634 	},
2635 	[STAC_DELL_S14] = {
2636 		.type = HDA_FIXUP_PINS,
2637 		.v.pins = dell_s14_pin_configs,
2638 	},
2639 	[STAC_DELL_VOSTRO_3500] = {
2640 		.type = HDA_FIXUP_PINS,
2641 		.v.pins = dell_vostro_3500_pin_configs,
2642 	},
2643 	[STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2644 		.type = HDA_FIXUP_PINS,
2645 		.v.pins = hp_cNB11_intquad_pin_configs,
2646 		.chained = true,
2647 		.chain_id = STAC_92HD83XXX_HP,
2648 	},
2649 	[STAC_92HD83XXX_HP] = {
2650 		.type = HDA_FIXUP_FUNC,
2651 		.v.func = stac92hd83xxx_fixup_hp,
2652 	},
2653 	[STAC_HP_DV7_4000] = {
2654 		.type = HDA_FIXUP_PINS,
2655 		.v.pins = hp_dv7_4000_pin_configs,
2656 		.chained = true,
2657 		.chain_id = STAC_92HD83XXX_HP,
2658 	},
2659 	[STAC_HP_ZEPHYR] = {
2660 		.type = HDA_FIXUP_FUNC,
2661 		.v.func = stac92hd83xxx_fixup_hp_zephyr,
2662 		.chained = true,
2663 		.chain_id = STAC_92HD83XXX_HP,
2664 	},
2665 	[STAC_92HD83XXX_HP_LED] = {
2666 		.type = HDA_FIXUP_FUNC,
2667 		.v.func = stac92hd83xxx_fixup_hp_led,
2668 		.chained = true,
2669 		.chain_id = STAC_92HD83XXX_HP,
2670 	},
2671 	[STAC_92HD83XXX_HP_INV_LED] = {
2672 		.type = HDA_FIXUP_FUNC,
2673 		.v.func = stac92hd83xxx_fixup_hp_inv_led,
2674 		.chained = true,
2675 		.chain_id = STAC_92HD83XXX_HP,
2676 	},
2677 	[STAC_92HD83XXX_HP_MIC_LED] = {
2678 		.type = HDA_FIXUP_FUNC,
2679 		.v.func = stac92hd83xxx_fixup_hp_mic_led,
2680 		.chained = true,
2681 		.chain_id = STAC_92HD83XXX_HP,
2682 	},
2683 	[STAC_HP_LED_GPIO10] = {
2684 		.type = HDA_FIXUP_FUNC,
2685 		.v.func = stac92hd83xxx_fixup_hp_led_gpio10,
2686 		.chained = true,
2687 		.chain_id = STAC_92HD83XXX_HP,
2688 	},
2689 	[STAC_92HD83XXX_HEADSET_JACK] = {
2690 		.type = HDA_FIXUP_FUNC,
2691 		.v.func = stac92hd83xxx_fixup_headset_jack,
2692 	},
2693 	[STAC_HP_ENVY_BASS] = {
2694 		.type = HDA_FIXUP_PINS,
2695 		.v.pins = (const struct hda_pintbl[]) {
2696 			{ 0x0f, 0x90170111 },
2697 			{}
2698 		},
2699 	},
2700 	[STAC_HP_BNB13_EQ] = {
2701 		.type = HDA_FIXUP_VERBS,
2702 		.v.verbs = hp_bnb13_eq_verbs,
2703 		.chained = true,
2704 		.chain_id = STAC_92HD83XXX_HP_MIC_LED,
2705 	},
2706 	[STAC_HP_ENVY_TS_BASS] = {
2707 		.type = HDA_FIXUP_PINS,
2708 		.v.pins = (const struct hda_pintbl[]) {
2709 			{ 0x10, 0x92170111 },
2710 			{}
2711 		},
2712 	},
2713 	[STAC_HP_ENVY_TS_DAC_BIND] = {
2714 		.type = HDA_FIXUP_FUNC,
2715 		.v.func = hp_envy_ts_fixup_dac_bind,
2716 		.chained = true,
2717 		.chain_id = STAC_HP_ENVY_TS_BASS,
2718 	},
2719 	[STAC_92HD83XXX_GPIO10_EAPD] = {
2720 		.type = HDA_FIXUP_FUNC,
2721 		.v.func = stac92hd83xxx_fixup_gpio10_eapd,
2722 	},
2723 };
2724 
2725 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2726 	{ .id = STAC_92HD83XXX_REF, .name = "ref" },
2727 	{ .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2728 	{ .id = STAC_DELL_S14, .name = "dell-s14" },
2729 	{ .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2730 	{ .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2731 	{ .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2732 	{ .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2733 	{ .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2734 	{ .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2735 	{ .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2736 	{ .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2737 	{ .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2738 	{ .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
2739 	{ .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" },
2740 	{}
2741 };
2742 
2743 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2744 	/* SigmaTel reference board */
2745 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2746 		      "DFI LanParty", STAC_92HD83XXX_REF),
2747 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2748 		      "DFI LanParty", STAC_92HD83XXX_REF),
2749 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2750 		      "unknown Dell", STAC_DELL_S14),
2751 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2752 		      "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2753 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2754 		      "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2755 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2756 		      "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2757 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2758 		      "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2759 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2760 		      "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2761 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2762 		      "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2763 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2764 		      "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2765 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2766 		      "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2767 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2768 		      "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2769 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2770 		      "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2771 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2772 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2773 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2774 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2775 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2776 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2777 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2778 			  "HP Pavilion dv7", STAC_HP_DV7_4000),
2779 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2780 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2781 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2782 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2783 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2784 			  "HP Envy Spectre", STAC_HP_ENVY_BASS),
2785 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899,
2786 			  "HP Folio 13", STAC_HP_LED_GPIO10),
2787 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2788 			  "HP Folio", STAC_HP_BNB13_EQ),
2789 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
2790 			  "HP bNB13", STAC_HP_BNB13_EQ),
2791 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
2792 			  "HP bNB13", STAC_HP_BNB13_EQ),
2793 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
2794 			  "HP bNB13", STAC_HP_BNB13_EQ),
2795 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e,
2796 			  "HP ENVY TS", STAC_HP_ENVY_TS_BASS),
2797 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1967,
2798 			  "HP ENVY TS", STAC_HP_ENVY_TS_DAC_BIND),
2799 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
2800 			  "HP bNB13", STAC_HP_BNB13_EQ),
2801 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
2802 			  "HP bNB13", STAC_HP_BNB13_EQ),
2803 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
2804 			  "HP bNB13", STAC_HP_BNB13_EQ),
2805 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
2806 			  "HP bNB13", STAC_HP_BNB13_EQ),
2807 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
2808 			  "HP bNB13", STAC_HP_BNB13_EQ),
2809 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
2810 			  "HP bNB13", STAC_HP_BNB13_EQ),
2811 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
2812 			  "HP bNB13", STAC_HP_BNB13_EQ),
2813 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
2814 			  "HP bNB13", STAC_HP_BNB13_EQ),
2815 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
2816 			  "HP bNB13", STAC_HP_BNB13_EQ),
2817 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
2818 			  "HP bNB13", STAC_HP_BNB13_EQ),
2819 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
2820 			  "HP bNB13", STAC_HP_BNB13_EQ),
2821 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
2822 			  "HP bNB13", STAC_HP_BNB13_EQ),
2823 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
2824 			  "HP bNB13", STAC_HP_BNB13_EQ),
2825 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
2826 			  "HP bNB13", STAC_HP_BNB13_EQ),
2827 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
2828 			  "HP bNB13", STAC_HP_BNB13_EQ),
2829 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
2830 			  "HP bNB13", STAC_HP_BNB13_EQ),
2831 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
2832 			  "HP bNB13", STAC_HP_BNB13_EQ),
2833 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
2834 			  "HP bNB13", STAC_HP_BNB13_EQ),
2835 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
2836 			  "HP bNB13", STAC_HP_BNB13_EQ),
2837 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
2838 			  "HP bNB13", STAC_HP_BNB13_EQ),
2839 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
2840 			  "HP bNB13", STAC_HP_BNB13_EQ),
2841 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
2842 			  "HP bNB13", STAC_HP_BNB13_EQ),
2843 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
2844 			  "HP bNB13", STAC_HP_BNB13_EQ),
2845 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
2846 			  "HP bNB13", STAC_HP_BNB13_EQ),
2847 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
2848 			  "HP bNB13", STAC_HP_BNB13_EQ),
2849 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
2850 			  "HP bNB13", STAC_HP_BNB13_EQ),
2851 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
2852 			  "HP bNB13", STAC_HP_BNB13_EQ),
2853 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
2854 			  "HP bNB13", STAC_HP_BNB13_EQ),
2855 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
2856 			  "HP bNB13", STAC_HP_BNB13_EQ),
2857 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
2858 			  "HP bNB13", STAC_HP_BNB13_EQ),
2859 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
2860 			  "HP bNB13", STAC_HP_BNB13_EQ),
2861 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
2862 			  "HP bNB13", STAC_HP_BNB13_EQ),
2863 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
2864 			  "HP bNB13", STAC_HP_BNB13_EQ),
2865 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
2866 			  "HP bNB13", STAC_HP_BNB13_EQ),
2867 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
2868 			  "HP bNB13", STAC_HP_BNB13_EQ),
2869 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
2870 			  "HP bNB13", STAC_HP_BNB13_EQ),
2871 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
2872 			  "HP bNB13", STAC_HP_BNB13_EQ),
2873 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
2874 			  "HP bNB13", STAC_HP_BNB13_EQ),
2875 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
2876 			  "HP bNB13", STAC_HP_BNB13_EQ),
2877 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
2878 			  "HP bNB13", STAC_HP_BNB13_EQ),
2879 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
2880 			  "HP bNB13", STAC_HP_BNB13_EQ),
2881 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
2882 			  "HP bNB13", STAC_HP_BNB13_EQ),
2883 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
2884 			  "HP bNB13", STAC_HP_BNB13_EQ),
2885 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
2886 			  "HP bNB13", STAC_HP_BNB13_EQ),
2887 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
2888 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2889 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
2890 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2891 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
2892 			  "HP", STAC_92HD83XXX_HP_MIC_LED),
2893 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2894 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2895 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2896 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2897 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2898 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2899 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2900 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2901 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2902 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2903 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2904 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2905 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2906 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2907 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2908 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2909 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2910 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2911 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2912 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2913 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2914 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2915 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2916 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2917 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2918 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2919 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2920 			  "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2921 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2922 			  "HP", STAC_HP_ZEPHYR),
2923 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2924 			  "HP Mini", STAC_92HD83XXX_HP_LED),
2925 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2926 			  "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2927 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2928 		      "HP Mini", STAC_92HD83XXX_HP_LED),
2929 	SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2930 	/* match both for 0xfa91 and 0xfa93 */
2931 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_TOSHIBA, 0xfffd, 0xfa91,
2932 		      "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD),
2933 	{} /* terminator */
2934 };
2935 
2936 /* HP dv7 bass switch - GPIO5 */
2937 #define stac_hp_bass_gpio_info	snd_ctl_boolean_mono_info
2938 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2939 				 struct snd_ctl_elem_value *ucontrol)
2940 {
2941 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2942 	struct sigmatel_spec *spec = codec->spec;
2943 	ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2944 	return 0;
2945 }
2946 
2947 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2948 				 struct snd_ctl_elem_value *ucontrol)
2949 {
2950 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2951 	struct sigmatel_spec *spec = codec->spec;
2952 	unsigned int gpio_data;
2953 
2954 	gpio_data = (spec->gpio_data & ~0x20) |
2955 		(ucontrol->value.integer.value[0] ? 0x20 : 0);
2956 	if (gpio_data == spec->gpio_data)
2957 		return 0;
2958 	spec->gpio_data = gpio_data;
2959 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2960 	return 1;
2961 }
2962 
2963 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2964 	.iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2965 	.info = stac_hp_bass_gpio_info,
2966 	.get = stac_hp_bass_gpio_get,
2967 	.put = stac_hp_bass_gpio_put,
2968 };
2969 
2970 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2971 {
2972 	struct sigmatel_spec *spec = codec->spec;
2973 
2974 	if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2975 				  &stac_hp_bass_sw_ctrl))
2976 		return -ENOMEM;
2977 
2978 	spec->gpio_mask |= 0x20;
2979 	spec->gpio_dir |= 0x20;
2980 	spec->gpio_data |= 0x20;
2981 	return 0;
2982 }
2983 
2984 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2985 	{ 0x0a, 0x02214030 },
2986 	{ 0x0b, 0x02a19040 },
2987 	{ 0x0c, 0x01a19020 },
2988 	{ 0x0d, 0x01014010 },
2989 	{ 0x0e, 0x0181302e },
2990 	{ 0x0f, 0x01014010 },
2991 	{ 0x14, 0x01019020 },
2992 	{ 0x18, 0x90a000f0 },
2993 	{ 0x19, 0x90a000f0 },
2994 	{ 0x1e, 0x01452050 },
2995 	{ 0x1f, 0x01452050 },
2996 	{}
2997 };
2998 
2999 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
3000 	{ 0x0a, 0x0421101f },
3001 	{ 0x0b, 0x04a11221 },
3002 	{ 0x0c, 0x40f000f0 },
3003 	{ 0x0d, 0x90170110 },
3004 	{ 0x0e, 0x23a1902e },
3005 	{ 0x0f, 0x23014250 },
3006 	{ 0x14, 0x40f000f0 },
3007 	{ 0x18, 0x90a000f0 },
3008 	{ 0x19, 0x40f000f0 },
3009 	{ 0x1e, 0x4f0000f0 },
3010 	{ 0x1f, 0x4f0000f0 },
3011 	{}
3012 };
3013 
3014 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
3015 	{ 0x0a, 0x0421101f },
3016 	{ 0x0b, 0x04a11221 },
3017 	{ 0x0c, 0x90a70330 },
3018 	{ 0x0d, 0x90170110 },
3019 	{ 0x0e, 0x23a1902e },
3020 	{ 0x0f, 0x23014250 },
3021 	{ 0x14, 0x40f000f0 },
3022 	{ 0x18, 0x40f000f0 },
3023 	{ 0x19, 0x40f000f0 },
3024 	{ 0x1e, 0x044413b0 },
3025 	{ 0x1f, 0x044413b0 },
3026 	{}
3027 };
3028 
3029 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
3030 	{ 0x0a, 0x0421101f },
3031 	{ 0x0b, 0x04a11221 },
3032 	{ 0x0c, 0x90a70330 },
3033 	{ 0x0d, 0x90170110 },
3034 	{ 0x0e, 0x40f000f0 },
3035 	{ 0x0f, 0x40f000f0 },
3036 	{ 0x14, 0x40f000f0 },
3037 	{ 0x18, 0x90a000f0 },
3038 	{ 0x19, 0x40f000f0 },
3039 	{ 0x1e, 0x044413b0 },
3040 	{ 0x1f, 0x044413b0 },
3041 	{}
3042 };
3043 
3044 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
3045 				    const struct hda_fixup *fix, int action)
3046 {
3047 	struct sigmatel_spec *spec = codec->spec;
3048 
3049 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3050 		return;
3051 
3052 	snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
3053 	spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
3054 }
3055 
3056 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
3057 				      const struct hda_fixup *fix, int action)
3058 {
3059 	struct sigmatel_spec *spec = codec->spec;
3060 	struct hda_jack_callback *jack;
3061 
3062 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3063 		return;
3064 
3065 	/* Enable VREF power saving on GPIO1 detect */
3066 	snd_hda_codec_write_cache(codec, codec->core.afg, 0,
3067 				  AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
3068 	jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
3069 						   stac_vref_event);
3070 	if (!IS_ERR(jack))
3071 		jack->private_data = 0x02;
3072 
3073 	spec->gpio_mask |= 0x02;
3074 
3075 	/* enable internal microphone */
3076 	snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
3077 }
3078 
3079 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
3080 				       const struct hda_fixup *fix, int action)
3081 {
3082 	struct sigmatel_spec *spec = codec->spec;
3083 
3084 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3085 		return;
3086 	spec->gpio_led = 0x01;
3087 }
3088 
3089 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
3090 				       const struct hda_fixup *fix, int action)
3091 {
3092 	unsigned int cap;
3093 
3094 	switch (action) {
3095 	case HDA_FIXUP_ACT_PRE_PROBE:
3096 		snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
3097 		break;
3098 
3099 	case HDA_FIXUP_ACT_PROBE:
3100 		/* enable bass on HP dv7 */
3101 		cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
3102 		cap &= AC_GPIO_IO_COUNT;
3103 		if (cap >= 6)
3104 			stac_add_hp_bass_switch(codec);
3105 		break;
3106 	}
3107 }
3108 
3109 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
3110 				       const struct hda_fixup *fix, int action)
3111 {
3112 	struct sigmatel_spec *spec = codec->spec;
3113 
3114 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3115 		return;
3116 	spec->gpio_led = 0x08;
3117 }
3118 
3119 static bool is_hp_output(struct hda_codec *codec, hda_nid_t pin)
3120 {
3121 	unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3122 
3123 	/* count line-out, too, as BIOS sets often so */
3124 	return get_defcfg_connect(pin_cfg) != AC_JACK_PORT_NONE &&
3125 		(get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
3126 		 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT);
3127 }
3128 
3129 static void fixup_hp_headphone(struct hda_codec *codec, hda_nid_t pin)
3130 {
3131 	unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, pin);
3132 
3133 	/* It was changed in the BIOS to just satisfy MS DTM.
3134 	 * Lets turn it back into slaved HP
3135 	 */
3136 	pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) |
3137 		(AC_JACK_HP_OUT << AC_DEFCFG_DEVICE_SHIFT);
3138 	pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC | AC_DEFCFG_SEQUENCE))) |
3139 		0x1f;
3140 	snd_hda_codec_set_pincfg(codec, pin, pin_cfg);
3141 }
3142 
3143 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
3144 				   const struct hda_fixup *fix, int action)
3145 {
3146 	struct sigmatel_spec *spec = codec->spec;
3147 
3148 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3149 		return;
3150 
3151 	/* when both output A and F are assigned, these are supposedly
3152 	 * dock and built-in headphones; fix both pin configs
3153 	 */
3154 	if (is_hp_output(codec, 0x0a) && is_hp_output(codec, 0x0f)) {
3155 		fixup_hp_headphone(codec, 0x0a);
3156 		fixup_hp_headphone(codec, 0x0f);
3157 	}
3158 
3159 	if (find_mute_led_cfg(codec, 1))
3160 		codec_dbg(codec, "mute LED gpio %d polarity %d\n",
3161 				spec->gpio_led,
3162 				spec->gpio_led_polarity);
3163 
3164 }
3165 
3166 static const struct hda_fixup stac92hd71bxx_fixups[] = {
3167 	[STAC_92HD71BXX_REF] = {
3168 		.type = HDA_FIXUP_FUNC,
3169 		.v.func = stac92hd71bxx_fixup_ref,
3170 	},
3171 	[STAC_DELL_M4_1] = {
3172 		.type = HDA_FIXUP_PINS,
3173 		.v.pins = dell_m4_1_pin_configs,
3174 	},
3175 	[STAC_DELL_M4_2] = {
3176 		.type = HDA_FIXUP_PINS,
3177 		.v.pins = dell_m4_2_pin_configs,
3178 	},
3179 	[STAC_DELL_M4_3] = {
3180 		.type = HDA_FIXUP_PINS,
3181 		.v.pins = dell_m4_3_pin_configs,
3182 	},
3183 	[STAC_HP_M4] = {
3184 		.type = HDA_FIXUP_FUNC,
3185 		.v.func = stac92hd71bxx_fixup_hp_m4,
3186 		.chained = true,
3187 		.chain_id = STAC_92HD71BXX_HP,
3188 	},
3189 	[STAC_HP_DV4] = {
3190 		.type = HDA_FIXUP_FUNC,
3191 		.v.func = stac92hd71bxx_fixup_hp_dv4,
3192 		.chained = true,
3193 		.chain_id = STAC_HP_DV5,
3194 	},
3195 	[STAC_HP_DV5] = {
3196 		.type = HDA_FIXUP_FUNC,
3197 		.v.func = stac92hd71bxx_fixup_hp_dv5,
3198 		.chained = true,
3199 		.chain_id = STAC_92HD71BXX_HP,
3200 	},
3201 	[STAC_HP_HDX] = {
3202 		.type = HDA_FIXUP_FUNC,
3203 		.v.func = stac92hd71bxx_fixup_hp_hdx,
3204 		.chained = true,
3205 		.chain_id = STAC_92HD71BXX_HP,
3206 	},
3207 	[STAC_92HD71BXX_HP] = {
3208 		.type = HDA_FIXUP_FUNC,
3209 		.v.func = stac92hd71bxx_fixup_hp,
3210 	},
3211 };
3212 
3213 static const struct hda_model_fixup stac92hd71bxx_models[] = {
3214 	{ .id = STAC_92HD71BXX_REF, .name = "ref" },
3215 	{ .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
3216 	{ .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
3217 	{ .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
3218 	{ .id = STAC_HP_M4, .name = "hp-m4" },
3219 	{ .id = STAC_HP_DV4, .name = "hp-dv4" },
3220 	{ .id = STAC_HP_DV5, .name = "hp-dv5" },
3221 	{ .id = STAC_HP_HDX, .name = "hp-hdx" },
3222 	{ .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
3223 	{}
3224 };
3225 
3226 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
3227 	/* SigmaTel reference board */
3228 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3229 		      "DFI LanParty", STAC_92HD71BXX_REF),
3230 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3231 		      "DFI LanParty", STAC_92HD71BXX_REF),
3232 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
3233 			  "HP", STAC_HP_DV5),
3234 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
3235 		      "HP", STAC_HP_DV5),
3236 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
3237 		      "HP dv4-7", STAC_HP_DV4),
3238 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
3239 		      "HP dv4-7", STAC_HP_DV5),
3240 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
3241 		      "HP HDX", STAC_HP_HDX),  /* HDX18 */
3242 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
3243 		      "HP mini 1000", STAC_HP_M4),
3244 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
3245 		      "HP HDX", STAC_HP_HDX),  /* HDX16 */
3246 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
3247 		      "HP dv6", STAC_HP_DV5),
3248 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
3249 		      "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
3250 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
3251 		      "HP DV6", STAC_HP_DV5),
3252 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
3253 		      "HP", STAC_HP_DV5),
3254 	SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
3255 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
3256 				"unknown Dell", STAC_DELL_M4_1),
3257 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
3258 				"unknown Dell", STAC_DELL_M4_1),
3259 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
3260 				"unknown Dell", STAC_DELL_M4_1),
3261 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
3262 				"unknown Dell", STAC_DELL_M4_1),
3263 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
3264 				"unknown Dell", STAC_DELL_M4_1),
3265 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
3266 				"unknown Dell", STAC_DELL_M4_1),
3267 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
3268 				"unknown Dell", STAC_DELL_M4_1),
3269 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
3270 				"unknown Dell", STAC_DELL_M4_2),
3271 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
3272 				"unknown Dell", STAC_DELL_M4_2),
3273 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
3274 				"unknown Dell", STAC_DELL_M4_2),
3275 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
3276 				"unknown Dell", STAC_DELL_M4_2),
3277 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
3278 				"unknown Dell", STAC_DELL_M4_3),
3279 	{} /* terminator */
3280 };
3281 
3282 static const struct hda_pintbl ref922x_pin_configs[] = {
3283 	{ 0x0a, 0x01014010 },
3284 	{ 0x0b, 0x01016011 },
3285 	{ 0x0c, 0x01012012 },
3286 	{ 0x0d, 0x0221401f },
3287 	{ 0x0e, 0x01813122 },
3288 	{ 0x0f, 0x01011014 },
3289 	{ 0x10, 0x01441030 },
3290 	{ 0x11, 0x01c41030 },
3291 	{ 0x15, 0x40000100 },
3292 	{ 0x1b, 0x40000100 },
3293 	{}
3294 };
3295 
3296 /*
3297     STAC 922X pin configs for
3298     102801A7
3299     102801AB
3300     102801A9
3301     102801D1
3302     102801D2
3303 */
3304 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
3305 	{ 0x0a, 0x02214030 },
3306 	{ 0x0b, 0x01a19021 },
3307 	{ 0x0c, 0x01111012 },
3308 	{ 0x0d, 0x01114010 },
3309 	{ 0x0e, 0x02a19020 },
3310 	{ 0x0f, 0x01117011 },
3311 	{ 0x10, 0x400001f0 },
3312 	{ 0x11, 0x400001f1 },
3313 	{ 0x15, 0x01813122 },
3314 	{ 0x1b, 0x400001f2 },
3315 	{}
3316 };
3317 
3318 /*
3319     STAC 922X pin configs for
3320     102801AC
3321     102801D0
3322 */
3323 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
3324 	{ 0x0a, 0x02214030 },
3325 	{ 0x0b, 0x01a19021 },
3326 	{ 0x0c, 0x01111012 },
3327 	{ 0x0d, 0x01114010 },
3328 	{ 0x0e, 0x02a19020 },
3329 	{ 0x0f, 0x01117011 },
3330 	{ 0x10, 0x01451140 },
3331 	{ 0x11, 0x400001f0 },
3332 	{ 0x15, 0x01813122 },
3333 	{ 0x1b, 0x400001f1 },
3334 	{}
3335 };
3336 
3337 /*
3338     STAC 922X pin configs for
3339     102801BF
3340 */
3341 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
3342 	{ 0x0a, 0x0321101f },
3343 	{ 0x0b, 0x01112024 },
3344 	{ 0x0c, 0x01111222 },
3345 	{ 0x0d, 0x91174220 },
3346 	{ 0x0e, 0x03a11050 },
3347 	{ 0x0f, 0x01116221 },
3348 	{ 0x10, 0x90a70330 },
3349 	{ 0x11, 0x01452340 },
3350 	{ 0x15, 0x40C003f1 },
3351 	{ 0x1b, 0x405003f0 },
3352 	{}
3353 };
3354 
3355 /*
3356     STAC 9221 A1 pin configs for
3357     102801D7 (Dell XPS M1210)
3358 */
3359 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
3360 	{ 0x0a, 0x02211211 },
3361 	{ 0x0b, 0x408103ff },
3362 	{ 0x0c, 0x02a1123e },
3363 	{ 0x0d, 0x90100310 },
3364 	{ 0x0e, 0x408003f1 },
3365 	{ 0x0f, 0x0221121f },
3366 	{ 0x10, 0x03451340 },
3367 	{ 0x11, 0x40c003f2 },
3368 	{ 0x15, 0x508003f3 },
3369 	{ 0x1b, 0x405003f4 },
3370 	{}
3371 };
3372 
3373 static const struct hda_pintbl d945gtp3_pin_configs[] = {
3374 	{ 0x0a, 0x0221401f },
3375 	{ 0x0b, 0x01a19022 },
3376 	{ 0x0c, 0x01813021 },
3377 	{ 0x0d, 0x01014010 },
3378 	{ 0x0e, 0x40000100 },
3379 	{ 0x0f, 0x40000100 },
3380 	{ 0x10, 0x40000100 },
3381 	{ 0x11, 0x40000100 },
3382 	{ 0x15, 0x02a19120 },
3383 	{ 0x1b, 0x40000100 },
3384 	{}
3385 };
3386 
3387 static const struct hda_pintbl d945gtp5_pin_configs[] = {
3388 	{ 0x0a, 0x0221401f },
3389 	{ 0x0b, 0x01011012 },
3390 	{ 0x0c, 0x01813024 },
3391 	{ 0x0d, 0x01014010 },
3392 	{ 0x0e, 0x01a19021 },
3393 	{ 0x0f, 0x01016011 },
3394 	{ 0x10, 0x01452130 },
3395 	{ 0x11, 0x40000100 },
3396 	{ 0x15, 0x02a19320 },
3397 	{ 0x1b, 0x40000100 },
3398 	{}
3399 };
3400 
3401 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
3402 	{ 0x0a, 0x0121e21f },
3403 	{ 0x0b, 0x400000ff },
3404 	{ 0x0c, 0x9017e110 },
3405 	{ 0x0d, 0x400000fd },
3406 	{ 0x0e, 0x400000fe },
3407 	{ 0x0f, 0x0181e020 },
3408 	{ 0x10, 0x1145e030 },
3409 	{ 0x11, 0x11c5e240 },
3410 	{ 0x15, 0x400000fc },
3411 	{ 0x1b, 0x400000fb },
3412 	{}
3413 };
3414 
3415 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
3416 	{ 0x0a, 0x0121e21f },
3417 	{ 0x0b, 0x90a7012e },
3418 	{ 0x0c, 0x9017e110 },
3419 	{ 0x0d, 0x400000fd },
3420 	{ 0x0e, 0x400000fe },
3421 	{ 0x0f, 0x0181e020 },
3422 	{ 0x10, 0x1145e230 },
3423 	{ 0x11, 0x500000fa },
3424 	{ 0x15, 0x400000fc },
3425 	{ 0x1b, 0x400000fb },
3426 	{}
3427 };
3428 
3429 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
3430 	{ 0x0a, 0x0121e21f },
3431 	{ 0x0b, 0x90a7012e },
3432 	{ 0x0c, 0x9017e110 },
3433 	{ 0x0d, 0x400000fd },
3434 	{ 0x0e, 0x400000fe },
3435 	{ 0x0f, 0x0181e020 },
3436 	{ 0x10, 0x1145e230 },
3437 	{ 0x11, 0x11c5e240 },
3438 	{ 0x15, 0x400000fc },
3439 	{ 0x1b, 0x400000fb },
3440 	{}
3441 };
3442 
3443 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
3444 	{ 0x0a, 0x0321e21f },
3445 	{ 0x0b, 0x03a1e02e },
3446 	{ 0x0c, 0x9017e110 },
3447 	{ 0x0d, 0x9017e11f },
3448 	{ 0x0e, 0x400000fe },
3449 	{ 0x0f, 0x0381e020 },
3450 	{ 0x10, 0x1345e230 },
3451 	{ 0x11, 0x13c5e240 },
3452 	{ 0x15, 0x400000fc },
3453 	{ 0x1b, 0x400000fb },
3454 	{}
3455 };
3456 
3457 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
3458 	{ 0x0a, 0x0321e21f },
3459 	{ 0x0b, 0x03a1e02e },
3460 	{ 0x0c, 0x9017e110 },
3461 	{ 0x0d, 0x9017e11f },
3462 	{ 0x0e, 0x400000fe },
3463 	{ 0x0f, 0x0381e020 },
3464 	{ 0x10, 0x1345e230 },
3465 	{ 0x11, 0x13c5e240 },
3466 	{ 0x15, 0x400000fc },
3467 	{ 0x1b, 0x400000fb },
3468 	{}
3469 };
3470 
3471 static const struct hda_pintbl ecs202_pin_configs[] = {
3472 	{ 0x0a, 0x0221401f },
3473 	{ 0x0b, 0x02a19020 },
3474 	{ 0x0c, 0x01a19020 },
3475 	{ 0x0d, 0x01114010 },
3476 	{ 0x0e, 0x408000f0 },
3477 	{ 0x0f, 0x01813022 },
3478 	{ 0x10, 0x074510a0 },
3479 	{ 0x11, 0x40c400f1 },
3480 	{ 0x15, 0x9037012e },
3481 	{ 0x1b, 0x40e000f2 },
3482 	{}
3483 };
3484 
3485 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
3486 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
3487 	SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
3488 	SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
3489 	SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
3490 	SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
3491 	SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
3492 	SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
3493 	SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
3494 	SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
3495 	SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
3496 	SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
3497 	SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
3498 	SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
3499 	SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
3500 	{}
3501 };
3502 
3503 static const struct hda_fixup stac922x_fixups[];
3504 
3505 /* remap the fixup from codec SSID and apply it */
3506 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
3507 					  const struct hda_fixup *fix,
3508 					  int action)
3509 {
3510 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3511 		return;
3512 
3513 	codec->fixup_id = HDA_FIXUP_ID_NOT_SET;
3514 	snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
3515 			   stac922x_fixups);
3516 	if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET)
3517 		snd_hda_apply_fixup(codec, action);
3518 }
3519 
3520 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
3521 					  const struct hda_fixup *fix,
3522 					  int action)
3523 {
3524 	struct sigmatel_spec *spec = codec->spec;
3525 
3526 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3527 		spec->gpio_mask = spec->gpio_dir = 0x03;
3528 		spec->gpio_data = 0x03;
3529 	}
3530 }
3531 
3532 static const struct hda_fixup stac922x_fixups[] = {
3533 	[STAC_D945_REF] = {
3534 		.type = HDA_FIXUP_PINS,
3535 		.v.pins = ref922x_pin_configs,
3536 	},
3537 	[STAC_D945GTP3] = {
3538 		.type = HDA_FIXUP_PINS,
3539 		.v.pins = d945gtp3_pin_configs,
3540 	},
3541 	[STAC_D945GTP5] = {
3542 		.type = HDA_FIXUP_PINS,
3543 		.v.pins = d945gtp5_pin_configs,
3544 	},
3545 	[STAC_INTEL_MAC_AUTO] = {
3546 		.type = HDA_FIXUP_FUNC,
3547 		.v.func = stac922x_fixup_intel_mac_auto,
3548 	},
3549 	[STAC_INTEL_MAC_V1] = {
3550 		.type = HDA_FIXUP_PINS,
3551 		.v.pins = intel_mac_v1_pin_configs,
3552 		.chained = true,
3553 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3554 	},
3555 	[STAC_INTEL_MAC_V2] = {
3556 		.type = HDA_FIXUP_PINS,
3557 		.v.pins = intel_mac_v2_pin_configs,
3558 		.chained = true,
3559 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3560 	},
3561 	[STAC_INTEL_MAC_V3] = {
3562 		.type = HDA_FIXUP_PINS,
3563 		.v.pins = intel_mac_v3_pin_configs,
3564 		.chained = true,
3565 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3566 	},
3567 	[STAC_INTEL_MAC_V4] = {
3568 		.type = HDA_FIXUP_PINS,
3569 		.v.pins = intel_mac_v4_pin_configs,
3570 		.chained = true,
3571 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3572 	},
3573 	[STAC_INTEL_MAC_V5] = {
3574 		.type = HDA_FIXUP_PINS,
3575 		.v.pins = intel_mac_v5_pin_configs,
3576 		.chained = true,
3577 		.chain_id = STAC_922X_INTEL_MAC_GPIO,
3578 	},
3579 	[STAC_922X_INTEL_MAC_GPIO] = {
3580 		.type = HDA_FIXUP_FUNC,
3581 		.v.func = stac922x_fixup_intel_mac_gpio,
3582 	},
3583 	[STAC_ECS_202] = {
3584 		.type = HDA_FIXUP_PINS,
3585 		.v.pins = ecs202_pin_configs,
3586 	},
3587 	[STAC_922X_DELL_D81] = {
3588 		.type = HDA_FIXUP_PINS,
3589 		.v.pins = dell_922x_d81_pin_configs,
3590 	},
3591 	[STAC_922X_DELL_D82] = {
3592 		.type = HDA_FIXUP_PINS,
3593 		.v.pins = dell_922x_d82_pin_configs,
3594 	},
3595 	[STAC_922X_DELL_M81] = {
3596 		.type = HDA_FIXUP_PINS,
3597 		.v.pins = dell_922x_m81_pin_configs,
3598 	},
3599 	[STAC_922X_DELL_M82] = {
3600 		.type = HDA_FIXUP_PINS,
3601 		.v.pins = dell_922x_m82_pin_configs,
3602 	},
3603 };
3604 
3605 static const struct hda_model_fixup stac922x_models[] = {
3606 	{ .id = STAC_D945_REF, .name = "ref" },
3607 	{ .id = STAC_D945GTP5, .name = "5stack" },
3608 	{ .id = STAC_D945GTP3, .name = "3stack" },
3609 	{ .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
3610 	{ .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
3611 	{ .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
3612 	{ .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
3613 	{ .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
3614 	{ .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
3615 	{ .id = STAC_ECS_202, .name = "ecs202" },
3616 	{ .id = STAC_922X_DELL_D81, .name = "dell-d81" },
3617 	{ .id = STAC_922X_DELL_D82, .name = "dell-d82" },
3618 	{ .id = STAC_922X_DELL_M81, .name = "dell-m81" },
3619 	{ .id = STAC_922X_DELL_M82, .name = "dell-m82" },
3620 	/* for backward compatibility */
3621 	{ .id = STAC_INTEL_MAC_V3, .name = "macmini" },
3622 	{ .id = STAC_INTEL_MAC_V5, .name = "macbook" },
3623 	{ .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
3624 	{ .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
3625 	{ .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
3626 	{ .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
3627 	{}
3628 };
3629 
3630 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
3631 	/* SigmaTel reference board */
3632 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3633 		      "DFI LanParty", STAC_D945_REF),
3634 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3635 		      "DFI LanParty", STAC_D945_REF),
3636 	/* Intel 945G based systems */
3637 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
3638 		      "Intel D945G", STAC_D945GTP3),
3639 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
3640 		      "Intel D945G", STAC_D945GTP3),
3641 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
3642 		      "Intel D945G", STAC_D945GTP3),
3643 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
3644 		      "Intel D945G", STAC_D945GTP3),
3645 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
3646 		      "Intel D945G", STAC_D945GTP3),
3647 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
3648 		      "Intel D945G", STAC_D945GTP3),
3649 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
3650 		      "Intel D945G", STAC_D945GTP3),
3651 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
3652 		      "Intel D945G", STAC_D945GTP3),
3653 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
3654 		      "Intel D945G", STAC_D945GTP3),
3655 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
3656 		      "Intel D945G", STAC_D945GTP3),
3657 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
3658 		      "Intel D945G", STAC_D945GTP3),
3659 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
3660 		      "Intel D945G", STAC_D945GTP3),
3661 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
3662 		      "Intel D945G", STAC_D945GTP3),
3663 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
3664 		      "Intel D945G", STAC_D945GTP3),
3665 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
3666 		      "Intel D945G", STAC_D945GTP3),
3667 	/* Intel D945G 5-stack systems */
3668 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
3669 		      "Intel D945G", STAC_D945GTP5),
3670 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
3671 		      "Intel D945G", STAC_D945GTP5),
3672 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
3673 		      "Intel D945G", STAC_D945GTP5),
3674 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
3675 		      "Intel D945G", STAC_D945GTP5),
3676 	/* Intel 945P based systems */
3677 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
3678 		      "Intel D945P", STAC_D945GTP3),
3679 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
3680 		      "Intel D945P", STAC_D945GTP3),
3681 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
3682 		      "Intel D945P", STAC_D945GTP3),
3683 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
3684 		      "Intel D945P", STAC_D945GTP3),
3685 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
3686 		      "Intel D945P", STAC_D945GTP3),
3687 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
3688 		      "Intel D945P", STAC_D945GTP5),
3689 	/* other intel */
3690 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
3691 		      "Intel D945", STAC_D945_REF),
3692 	/* other systems  */
3693 
3694 	/* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
3695 	SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
3696 
3697 	/* Dell systems  */
3698 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
3699 		      "unknown Dell", STAC_922X_DELL_D81),
3700 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
3701 		      "unknown Dell", STAC_922X_DELL_D81),
3702 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
3703 		      "unknown Dell", STAC_922X_DELL_D81),
3704 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
3705 		      "unknown Dell", STAC_922X_DELL_D82),
3706 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
3707 		      "unknown Dell", STAC_922X_DELL_M81),
3708 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
3709 		      "unknown Dell", STAC_922X_DELL_D82),
3710 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
3711 		      "unknown Dell", STAC_922X_DELL_D81),
3712 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
3713 		      "unknown Dell", STAC_922X_DELL_D81),
3714 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
3715 		      "Dell XPS M1210", STAC_922X_DELL_M82),
3716 	/* ECS/PC Chips boards */
3717 	SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
3718 		      "ECS/PC chips", STAC_ECS_202),
3719 	{} /* terminator */
3720 };
3721 
3722 static const struct hda_pintbl ref927x_pin_configs[] = {
3723 	{ 0x0a, 0x02214020 },
3724 	{ 0x0b, 0x02a19080 },
3725 	{ 0x0c, 0x0181304e },
3726 	{ 0x0d, 0x01014010 },
3727 	{ 0x0e, 0x01a19040 },
3728 	{ 0x0f, 0x01011012 },
3729 	{ 0x10, 0x01016011 },
3730 	{ 0x11, 0x0101201f },
3731 	{ 0x12, 0x183301f0 },
3732 	{ 0x13, 0x18a001f0 },
3733 	{ 0x14, 0x18a001f0 },
3734 	{ 0x21, 0x01442070 },
3735 	{ 0x22, 0x01c42190 },
3736 	{ 0x23, 0x40000100 },
3737 	{}
3738 };
3739 
3740 static const struct hda_pintbl d965_3st_pin_configs[] = {
3741 	{ 0x0a, 0x0221401f },
3742 	{ 0x0b, 0x02a19120 },
3743 	{ 0x0c, 0x40000100 },
3744 	{ 0x0d, 0x01014011 },
3745 	{ 0x0e, 0x01a19021 },
3746 	{ 0x0f, 0x01813024 },
3747 	{ 0x10, 0x40000100 },
3748 	{ 0x11, 0x40000100 },
3749 	{ 0x12, 0x40000100 },
3750 	{ 0x13, 0x40000100 },
3751 	{ 0x14, 0x40000100 },
3752 	{ 0x21, 0x40000100 },
3753 	{ 0x22, 0x40000100 },
3754 	{ 0x23, 0x40000100 },
3755 	{}
3756 };
3757 
3758 static const struct hda_pintbl d965_5st_pin_configs[] = {
3759 	{ 0x0a, 0x02214020 },
3760 	{ 0x0b, 0x02a19080 },
3761 	{ 0x0c, 0x0181304e },
3762 	{ 0x0d, 0x01014010 },
3763 	{ 0x0e, 0x01a19040 },
3764 	{ 0x0f, 0x01011012 },
3765 	{ 0x10, 0x01016011 },
3766 	{ 0x11, 0x40000100 },
3767 	{ 0x12, 0x40000100 },
3768 	{ 0x13, 0x40000100 },
3769 	{ 0x14, 0x40000100 },
3770 	{ 0x21, 0x01442070 },
3771 	{ 0x22, 0x40000100 },
3772 	{ 0x23, 0x40000100 },
3773 	{}
3774 };
3775 
3776 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
3777 	{ 0x0a, 0x40000100 },
3778 	{ 0x0b, 0x40000100 },
3779 	{ 0x0c, 0x0181304e },
3780 	{ 0x0d, 0x01014010 },
3781 	{ 0x0e, 0x01a19040 },
3782 	{ 0x0f, 0x01011012 },
3783 	{ 0x10, 0x01016011 },
3784 	{ 0x11, 0x40000100 },
3785 	{ 0x12, 0x40000100 },
3786 	{ 0x13, 0x40000100 },
3787 	{ 0x14, 0x40000100 },
3788 	{ 0x21, 0x01442070 },
3789 	{ 0x22, 0x40000100 },
3790 	{ 0x23, 0x40000100 },
3791 	{}
3792 };
3793 
3794 static const struct hda_pintbl dell_3st_pin_configs[] = {
3795 	{ 0x0a, 0x02211230 },
3796 	{ 0x0b, 0x02a11220 },
3797 	{ 0x0c, 0x01a19040 },
3798 	{ 0x0d, 0x01114210 },
3799 	{ 0x0e, 0x01111212 },
3800 	{ 0x0f, 0x01116211 },
3801 	{ 0x10, 0x01813050 },
3802 	{ 0x11, 0x01112214 },
3803 	{ 0x12, 0x403003fa },
3804 	{ 0x13, 0x90a60040 },
3805 	{ 0x14, 0x90a60040 },
3806 	{ 0x21, 0x404003fb },
3807 	{ 0x22, 0x40c003fc },
3808 	{ 0x23, 0x40000100 },
3809 	{}
3810 };
3811 
3812 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3813 				     const struct hda_fixup *fix, int action)
3814 {
3815 	/* no jack detecion for ref-no-jd model */
3816 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
3817 		codec->no_jack_detect = 1;
3818 }
3819 
3820 static void stac927x_fixup_ref(struct hda_codec *codec,
3821 			       const struct hda_fixup *fix, int action)
3822 {
3823 	struct sigmatel_spec *spec = codec->spec;
3824 
3825 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3826 		snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3827 		spec->eapd_mask = spec->gpio_mask = 0;
3828 		spec->gpio_dir = spec->gpio_data = 0;
3829 	}
3830 }
3831 
3832 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3833 				     const struct hda_fixup *fix, int action)
3834 {
3835 	struct sigmatel_spec *spec = codec->spec;
3836 
3837 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
3838 		return;
3839 
3840 	if (codec->core.subsystem_id != 0x1028022f) {
3841 		/* GPIO2 High = Enable EAPD */
3842 		spec->eapd_mask = spec->gpio_mask = 0x04;
3843 		spec->gpio_dir = spec->gpio_data = 0x04;
3844 	}
3845 
3846 	snd_hda_add_verbs(codec, dell_3st_core_init);
3847 	spec->volknob_init = 1;
3848 }
3849 
3850 static void stac927x_fixup_volknob(struct hda_codec *codec,
3851 				   const struct hda_fixup *fix, int action)
3852 {
3853 	struct sigmatel_spec *spec = codec->spec;
3854 
3855 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3856 		snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3857 		spec->volknob_init = 1;
3858 	}
3859 }
3860 
3861 static const struct hda_fixup stac927x_fixups[] = {
3862 	[STAC_D965_REF_NO_JD] = {
3863 		.type = HDA_FIXUP_FUNC,
3864 		.v.func = stac927x_fixup_ref_no_jd,
3865 		.chained = true,
3866 		.chain_id = STAC_D965_REF,
3867 	},
3868 	[STAC_D965_REF] = {
3869 		.type = HDA_FIXUP_FUNC,
3870 		.v.func = stac927x_fixup_ref,
3871 	},
3872 	[STAC_D965_3ST] = {
3873 		.type = HDA_FIXUP_PINS,
3874 		.v.pins = d965_3st_pin_configs,
3875 		.chained = true,
3876 		.chain_id = STAC_D965_VERBS,
3877 	},
3878 	[STAC_D965_5ST] = {
3879 		.type = HDA_FIXUP_PINS,
3880 		.v.pins = d965_5st_pin_configs,
3881 		.chained = true,
3882 		.chain_id = STAC_D965_VERBS,
3883 	},
3884 	[STAC_D965_VERBS] = {
3885 		.type = HDA_FIXUP_VERBS,
3886 		.v.verbs = d965_core_init,
3887 	},
3888 	[STAC_D965_5ST_NO_FP] = {
3889 		.type = HDA_FIXUP_PINS,
3890 		.v.pins = d965_5st_no_fp_pin_configs,
3891 	},
3892 	[STAC_NEMO_DEFAULT] = {
3893 		.type = HDA_FIXUP_PINS,
3894 		.v.pins = nemo_pin_configs,
3895 	},
3896 	[STAC_DELL_3ST] = {
3897 		.type = HDA_FIXUP_PINS,
3898 		.v.pins = dell_3st_pin_configs,
3899 		.chained = true,
3900 		.chain_id = STAC_927X_DELL_DMIC,
3901 	},
3902 	[STAC_DELL_BIOS] = {
3903 		.type = HDA_FIXUP_PINS,
3904 		.v.pins = (const struct hda_pintbl[]) {
3905 			/* correct the front output jack as a hp out */
3906 			{ 0x0f, 0x0221101f },
3907 			/* correct the front input jack as a mic */
3908 			{ 0x0e, 0x02a79130 },
3909 			{}
3910 		},
3911 		.chained = true,
3912 		.chain_id = STAC_927X_DELL_DMIC,
3913 	},
3914 	[STAC_DELL_BIOS_AMIC] = {
3915 		.type = HDA_FIXUP_PINS,
3916 		.v.pins = (const struct hda_pintbl[]) {
3917 			/* configure the analog microphone on some laptops */
3918 			{ 0x0c, 0x90a79130 },
3919 			{}
3920 		},
3921 		.chained = true,
3922 		.chain_id = STAC_DELL_BIOS,
3923 	},
3924 	[STAC_DELL_BIOS_SPDIF] = {
3925 		.type = HDA_FIXUP_PINS,
3926 		.v.pins = (const struct hda_pintbl[]) {
3927 			/* correct the device field to SPDIF out */
3928 			{ 0x21, 0x01442070 },
3929 			{}
3930 		},
3931 		.chained = true,
3932 		.chain_id = STAC_DELL_BIOS,
3933 	},
3934 	[STAC_927X_DELL_DMIC] = {
3935 		.type = HDA_FIXUP_FUNC,
3936 		.v.func = stac927x_fixup_dell_dmic,
3937 	},
3938 	[STAC_927X_VOLKNOB] = {
3939 		.type = HDA_FIXUP_FUNC,
3940 		.v.func = stac927x_fixup_volknob,
3941 	},
3942 };
3943 
3944 static const struct hda_model_fixup stac927x_models[] = {
3945 	{ .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3946 	{ .id = STAC_D965_REF, .name = "ref" },
3947 	{ .id = STAC_D965_3ST, .name = "3stack" },
3948 	{ .id = STAC_D965_5ST, .name = "5stack" },
3949 	{ .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3950 	{ .id = STAC_DELL_3ST, .name = "dell-3stack" },
3951 	{ .id = STAC_DELL_BIOS, .name = "dell-bios" },
3952 	{ .id = STAC_NEMO_DEFAULT, .name = "nemo-default" },
3953 	{ .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
3954 	{ .id = STAC_927X_VOLKNOB, .name = "volknob" },
3955 	{}
3956 };
3957 
3958 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3959 	/* SigmaTel reference board */
3960 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3961 		      "DFI LanParty", STAC_D965_REF),
3962 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3963 		      "DFI LanParty", STAC_D965_REF),
3964 	 /* Intel 946 based systems */
3965 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3966 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3967 	/* 965 based 3 stack systems */
3968 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3969 			   "Intel D965", STAC_D965_3ST),
3970 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3971 			   "Intel D965", STAC_D965_3ST),
3972 	/* Dell 3 stack systems */
3973 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3974 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01ed, "Dell     ", STAC_DELL_3ST),
3975 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f4, "Dell     ", STAC_DELL_3ST),
3976 	/* Dell 3 stack systems with verb table in BIOS */
3977 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3978 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3979 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0227, "Dell Vostro 1400  ", STAC_DELL_BIOS),
3980 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022e, "Dell     ", STAC_DELL_BIOS_SPDIF),
3981 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3982 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0242, "Dell     ", STAC_DELL_BIOS),
3983 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0243, "Dell     ", STAC_DELL_BIOS),
3984 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x02ff, "Dell     ", STAC_DELL_BIOS),
3985 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL,  0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3986 	/* 965 based 5 stack systems */
3987 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3988 			   "Intel D965", STAC_D965_5ST),
3989 	SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3990 			   "Intel D965", STAC_D965_5ST),
3991 	/* Nemo */
3992 	SND_PCI_QUIRK(0x1888, 0x1000, "AmigaOne X1000", STAC_NEMO_DEFAULT),
3993 	/* volume-knob fixes */
3994 	SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3995 	{} /* terminator */
3996 };
3997 
3998 static const struct hda_pintbl ref9205_pin_configs[] = {
3999 	{ 0x0a, 0x40000100 },
4000 	{ 0x0b, 0x40000100 },
4001 	{ 0x0c, 0x01016011 },
4002 	{ 0x0d, 0x01014010 },
4003 	{ 0x0e, 0x01813122 },
4004 	{ 0x0f, 0x01a19021 },
4005 	{ 0x14, 0x01019020 },
4006 	{ 0x16, 0x40000100 },
4007 	{ 0x17, 0x90a000f0 },
4008 	{ 0x18, 0x90a000f0 },
4009 	{ 0x21, 0x01441030 },
4010 	{ 0x22, 0x01c41030 },
4011 	{}
4012 };
4013 
4014 /*
4015     STAC 9205 pin configs for
4016     102801F1
4017     102801F2
4018     102801FC
4019     102801FD
4020     10280204
4021     1028021F
4022     10280228 (Dell Vostro 1500)
4023     10280229 (Dell Vostro 1700)
4024 */
4025 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
4026 	{ 0x0a, 0x0321101F },
4027 	{ 0x0b, 0x03A11020 },
4028 	{ 0x0c, 0x400003FA },
4029 	{ 0x0d, 0x90170310 },
4030 	{ 0x0e, 0x400003FB },
4031 	{ 0x0f, 0x400003FC },
4032 	{ 0x14, 0x400003FD },
4033 	{ 0x16, 0x40F000F9 },
4034 	{ 0x17, 0x90A60330 },
4035 	{ 0x18, 0x400003FF },
4036 	{ 0x21, 0x0144131F },
4037 	{ 0x22, 0x40C003FE },
4038 	{}
4039 };
4040 
4041 /*
4042     STAC 9205 pin configs for
4043     102801F9
4044     102801FA
4045     102801FE
4046     102801FF (Dell Precision M4300)
4047     10280206
4048     10280200
4049     10280201
4050 */
4051 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
4052 	{ 0x0a, 0x0321101f },
4053 	{ 0x0b, 0x03a11020 },
4054 	{ 0x0c, 0x90a70330 },
4055 	{ 0x0d, 0x90170310 },
4056 	{ 0x0e, 0x400000fe },
4057 	{ 0x0f, 0x400000ff },
4058 	{ 0x14, 0x400000fd },
4059 	{ 0x16, 0x40f000f9 },
4060 	{ 0x17, 0x400000fa },
4061 	{ 0x18, 0x400000fc },
4062 	{ 0x21, 0x0144131f },
4063 	{ 0x22, 0x40c003f8 },
4064 	/* Enable SPDIF in/out */
4065 	{ 0x1f, 0x01441030 },
4066 	{ 0x20, 0x1c410030 },
4067 	{}
4068 };
4069 
4070 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
4071 	{ 0x0a, 0x0421101f },
4072 	{ 0x0b, 0x04a11020 },
4073 	{ 0x0c, 0x400003fa },
4074 	{ 0x0d, 0x90170310 },
4075 	{ 0x0e, 0x400003fb },
4076 	{ 0x0f, 0x400003fc },
4077 	{ 0x14, 0x400003fd },
4078 	{ 0x16, 0x400003f9 },
4079 	{ 0x17, 0x90a60330 },
4080 	{ 0x18, 0x400003ff },
4081 	{ 0x21, 0x01441340 },
4082 	{ 0x22, 0x40c003fe },
4083 	{}
4084 };
4085 
4086 static void stac9205_fixup_ref(struct hda_codec *codec,
4087 			       const struct hda_fixup *fix, int action)
4088 {
4089 	struct sigmatel_spec *spec = codec->spec;
4090 
4091 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4092 		snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
4093 		/* SPDIF-In enabled */
4094 		spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
4095 	}
4096 }
4097 
4098 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
4099 				    const struct hda_fixup *fix, int action)
4100 {
4101 	struct sigmatel_spec *spec = codec->spec;
4102 	struct hda_jack_callback *jack;
4103 
4104 	if (action == HDA_FIXUP_ACT_PRE_PROBE) {
4105 		snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
4106 
4107 		/* Enable unsol response for GPIO4/Dock HP connection */
4108 		snd_hda_codec_write_cache(codec, codec->core.afg, 0,
4109 			AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
4110 		jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg,
4111 							   stac_vref_event);
4112 		if (!IS_ERR(jack))
4113 			jack->private_data = 0x01;
4114 
4115 		spec->gpio_dir = 0x0b;
4116 		spec->eapd_mask = 0x01;
4117 		spec->gpio_mask = 0x1b;
4118 		spec->gpio_mute = 0x10;
4119 		/* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
4120 		 * GPIO3 Low = DRM
4121 		 */
4122 		spec->gpio_data = 0x01;
4123 	}
4124 }
4125 
4126 static void stac9205_fixup_eapd(struct hda_codec *codec,
4127 				const struct hda_fixup *fix, int action)
4128 {
4129 	struct sigmatel_spec *spec = codec->spec;
4130 
4131 	if (action == HDA_FIXUP_ACT_PRE_PROBE)
4132 		spec->eapd_switch = 0;
4133 }
4134 
4135 static const struct hda_fixup stac9205_fixups[] = {
4136 	[STAC_9205_REF] = {
4137 		.type = HDA_FIXUP_FUNC,
4138 		.v.func = stac9205_fixup_ref,
4139 	},
4140 	[STAC_9205_DELL_M42] = {
4141 		.type = HDA_FIXUP_PINS,
4142 		.v.pins = dell_9205_m42_pin_configs,
4143 	},
4144 	[STAC_9205_DELL_M43] = {
4145 		.type = HDA_FIXUP_FUNC,
4146 		.v.func = stac9205_fixup_dell_m43,
4147 	},
4148 	[STAC_9205_DELL_M44] = {
4149 		.type = HDA_FIXUP_PINS,
4150 		.v.pins = dell_9205_m44_pin_configs,
4151 	},
4152 	[STAC_9205_EAPD] = {
4153 		.type = HDA_FIXUP_FUNC,
4154 		.v.func = stac9205_fixup_eapd,
4155 	},
4156 	{}
4157 };
4158 
4159 static const struct hda_model_fixup stac9205_models[] = {
4160 	{ .id = STAC_9205_REF, .name = "ref" },
4161 	{ .id = STAC_9205_DELL_M42, .name = "dell-m42" },
4162 	{ .id = STAC_9205_DELL_M43, .name = "dell-m43" },
4163 	{ .id = STAC_9205_DELL_M44, .name = "dell-m44" },
4164 	{ .id = STAC_9205_EAPD, .name = "eapd" },
4165 	{}
4166 };
4167 
4168 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
4169 	/* SigmaTel reference board */
4170 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
4171 		      "DFI LanParty", STAC_9205_REF),
4172 	SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
4173 		      "SigmaTel", STAC_9205_REF),
4174 	SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
4175 		      "DFI LanParty", STAC_9205_REF),
4176 	/* Dell */
4177 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
4178 		      "unknown Dell", STAC_9205_DELL_M42),
4179 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
4180 		      "unknown Dell", STAC_9205_DELL_M42),
4181 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
4182 		      "Dell Precision", STAC_9205_DELL_M43),
4183 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
4184 		      "Dell Precision", STAC_9205_DELL_M43),
4185 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
4186 		      "Dell Precision", STAC_9205_DELL_M43),
4187 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
4188 		      "unknown Dell", STAC_9205_DELL_M42),
4189 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
4190 		      "unknown Dell", STAC_9205_DELL_M42),
4191 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
4192 		      "Dell Precision", STAC_9205_DELL_M43),
4193 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
4194 		      "Dell Precision M4300", STAC_9205_DELL_M43),
4195 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
4196 		      "unknown Dell", STAC_9205_DELL_M42),
4197 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
4198 		      "Dell Precision", STAC_9205_DELL_M43),
4199 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
4200 		      "Dell Precision", STAC_9205_DELL_M43),
4201 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
4202 		      "Dell Precision", STAC_9205_DELL_M43),
4203 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
4204 		      "Dell Inspiron", STAC_9205_DELL_M44),
4205 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
4206 		      "Dell Vostro 1500", STAC_9205_DELL_M42),
4207 	SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
4208 		      "Dell Vostro 1700", STAC_9205_DELL_M42),
4209 	/* Gateway */
4210 	SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
4211 	SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
4212 	{} /* terminator */
4213 };
4214 
4215 static void stac92hd95_fixup_hp_led(struct hda_codec *codec,
4216 				    const struct hda_fixup *fix, int action)
4217 {
4218 	struct sigmatel_spec *spec = codec->spec;
4219 
4220 	if (action != HDA_FIXUP_ACT_PRE_PROBE)
4221 		return;
4222 
4223 	if (find_mute_led_cfg(codec, spec->default_polarity))
4224 		codec_dbg(codec, "mute LED gpio %d polarity %d\n",
4225 				spec->gpio_led,
4226 				spec->gpio_led_polarity);
4227 }
4228 
4229 static const struct hda_fixup stac92hd95_fixups[] = {
4230 	[STAC_92HD95_HP_LED] = {
4231 		.type = HDA_FIXUP_FUNC,
4232 		.v.func = stac92hd95_fixup_hp_led,
4233 	},
4234 	[STAC_92HD95_HP_BASS] = {
4235 		.type = HDA_FIXUP_VERBS,
4236 		.v.verbs = (const struct hda_verb[]) {
4237 			{0x1a, 0x795, 0x00}, /* HPF to 100Hz */
4238 			{}
4239 		},
4240 		.chained = true,
4241 		.chain_id = STAC_92HD95_HP_LED,
4242 	},
4243 };
4244 
4245 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = {
4246 	SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS),
4247 	{} /* terminator */
4248 };
4249 
4250 static const struct hda_model_fixup stac92hd95_models[] = {
4251 	{ .id = STAC_92HD95_HP_LED, .name = "hp-led" },
4252 	{ .id = STAC_92HD95_HP_BASS, .name = "hp-bass" },
4253 	{}
4254 };
4255 
4256 
4257 static int stac_parse_auto_config(struct hda_codec *codec)
4258 {
4259 	struct sigmatel_spec *spec = codec->spec;
4260 	int err;
4261 	int flags = 0;
4262 
4263 	if (spec->headset_jack)
4264 		flags |= HDA_PINCFG_HEADSET_MIC;
4265 
4266 	err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
4267 	if (err < 0)
4268 		return err;
4269 
4270 	/* add hooks */
4271 	spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
4272 	spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
4273 
4274 	spec->gen.automute_hook = stac_update_outputs;
4275 
4276 	err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
4277 	if (err < 0)
4278 		return err;
4279 
4280 	if (spec->vref_mute_led_nid) {
4281 		err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid);
4282 		if (err < 0)
4283 			return err;
4284 	}
4285 
4286 	/* setup analog beep controls */
4287 	if (spec->anabeep_nid > 0) {
4288 		err = stac_auto_create_beep_ctls(codec,
4289 						 spec->anabeep_nid);
4290 		if (err < 0)
4291 			return err;
4292 	}
4293 
4294 	/* setup digital beep controls and input device */
4295 #ifdef CONFIG_SND_HDA_INPUT_BEEP
4296 	if (spec->gen.beep_nid) {
4297 		hda_nid_t nid = spec->gen.beep_nid;
4298 		unsigned int caps;
4299 
4300 		err = stac_auto_create_beep_ctls(codec, nid);
4301 		if (err < 0)
4302 			return err;
4303 		if (codec->beep) {
4304 			/* IDT/STAC codecs have linear beep tone parameter */
4305 			codec->beep->linear_tone = spec->linear_tone_beep;
4306 			/* if no beep switch is available, make its own one */
4307 			caps = query_amp_caps(codec, nid, HDA_OUTPUT);
4308 			if (!(caps & AC_AMPCAP_MUTE)) {
4309 				err = stac_beep_switch_ctl(codec);
4310 				if (err < 0)
4311 					return err;
4312 			}
4313 		}
4314 	}
4315 #endif
4316 
4317 	if (spec->gpio_led)
4318 		spec->gen.vmaster_mute.hook = stac_vmaster_hook;
4319 
4320 	if (spec->aloopback_ctl &&
4321 	    snd_hda_get_bool_hint(codec, "loopback") == 1) {
4322 		unsigned int wr_verb =
4323 			spec->aloopback_ctl->private_value >> 16;
4324 		if (snd_hdac_regmap_add_vendor_verb(&codec->core, wr_verb))
4325 			return -ENOMEM;
4326 		if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
4327 			return -ENOMEM;
4328 	}
4329 
4330 	if (spec->have_spdif_mux) {
4331 		err = stac_create_spdif_mux_ctls(codec);
4332 		if (err < 0)
4333 			return err;
4334 	}
4335 
4336 	stac_init_power_map(codec);
4337 
4338 	return 0;
4339 }
4340 
4341 static int stac_init(struct hda_codec *codec)
4342 {
4343 	struct sigmatel_spec *spec = codec->spec;
4344 	int i;
4345 
4346 	/* override some hints */
4347 	stac_store_hints(codec);
4348 
4349 	/* set up GPIO */
4350 	/* turn on EAPD statically when spec->eapd_switch isn't set.
4351 	 * otherwise, unsol event will turn it on/off dynamically
4352 	 */
4353 	if (!spec->eapd_switch)
4354 		spec->gpio_data |= spec->eapd_mask;
4355 	stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
4356 
4357 	snd_hda_gen_init(codec);
4358 
4359 	/* sync the power-map */
4360 	if (spec->num_pwrs)
4361 		snd_hda_codec_write(codec, codec->core.afg, 0,
4362 				    AC_VERB_IDT_SET_POWER_MAP,
4363 				    spec->power_map_bits);
4364 
4365 	/* power down inactive ADCs */
4366 	if (spec->powerdown_adcs) {
4367 		for (i = 0; i < spec->gen.num_all_adcs; i++) {
4368 			if (spec->active_adcs & (1 << i))
4369 				continue;
4370 			snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
4371 					    AC_VERB_SET_POWER_STATE,
4372 					    AC_PWRST_D3);
4373 		}
4374 	}
4375 
4376 	return 0;
4377 }
4378 
4379 static void stac_shutup(struct hda_codec *codec)
4380 {
4381 	struct sigmatel_spec *spec = codec->spec;
4382 
4383 	snd_hda_shutup_pins(codec);
4384 
4385 	if (spec->eapd_mask)
4386 		stac_gpio_set(codec, spec->gpio_mask,
4387 				spec->gpio_dir, spec->gpio_data &
4388 				~spec->eapd_mask);
4389 }
4390 
4391 #define stac_free	snd_hda_gen_free
4392 
4393 #ifdef CONFIG_SND_PROC_FS
4394 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
4395 			       struct hda_codec *codec, hda_nid_t nid)
4396 {
4397 	if (nid == codec->core.afg)
4398 		snd_iprintf(buffer, "Power-Map: 0x%02x\n",
4399 			    snd_hda_codec_read(codec, nid, 0,
4400 					       AC_VERB_IDT_GET_POWER_MAP, 0));
4401 }
4402 
4403 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
4404 				  struct hda_codec *codec,
4405 				  unsigned int verb)
4406 {
4407 	snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
4408 		    snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0));
4409 }
4410 
4411 /* stac92hd71bxx, stac92hd73xx */
4412 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
4413 				 struct hda_codec *codec, hda_nid_t nid)
4414 {
4415 	stac92hd_proc_hook(buffer, codec, nid);
4416 	if (nid == codec->core.afg)
4417 		analog_loop_proc_hook(buffer, codec, 0xfa0);
4418 }
4419 
4420 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
4421 			       struct hda_codec *codec, hda_nid_t nid)
4422 {
4423 	if (nid == codec->core.afg)
4424 		analog_loop_proc_hook(buffer, codec, 0xfe0);
4425 }
4426 
4427 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
4428 			       struct hda_codec *codec, hda_nid_t nid)
4429 {
4430 	if (nid == codec->core.afg)
4431 		analog_loop_proc_hook(buffer, codec, 0xfeb);
4432 }
4433 #else
4434 #define stac92hd_proc_hook	NULL
4435 #define stac92hd7x_proc_hook	NULL
4436 #define stac9205_proc_hook	NULL
4437 #define stac927x_proc_hook	NULL
4438 #endif
4439 
4440 #ifdef CONFIG_PM
4441 static int stac_suspend(struct hda_codec *codec)
4442 {
4443 	stac_shutup(codec);
4444 	return 0;
4445 }
4446 #else
4447 #define stac_suspend		NULL
4448 #endif /* CONFIG_PM */
4449 
4450 static const struct hda_codec_ops stac_patch_ops = {
4451 	.build_controls = snd_hda_gen_build_controls,
4452 	.build_pcms = snd_hda_gen_build_pcms,
4453 	.init = stac_init,
4454 	.free = stac_free,
4455 	.unsol_event = snd_hda_jack_unsol_event,
4456 #ifdef CONFIG_PM
4457 	.suspend = stac_suspend,
4458 #endif
4459 	.reboot_notify = stac_shutup,
4460 };
4461 
4462 static int alloc_stac_spec(struct hda_codec *codec)
4463 {
4464 	struct sigmatel_spec *spec;
4465 
4466 	spec = kzalloc(sizeof(*spec), GFP_KERNEL);
4467 	if (!spec)
4468 		return -ENOMEM;
4469 	snd_hda_gen_spec_init(&spec->gen);
4470 	codec->spec = spec;
4471 	codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
4472 	spec->gen.dac_min_mute = true;
4473 	codec->patch_ops = stac_patch_ops;
4474 	return 0;
4475 }
4476 
4477 static int patch_stac9200(struct hda_codec *codec)
4478 {
4479 	struct sigmatel_spec *spec;
4480 	int err;
4481 
4482 	err = alloc_stac_spec(codec);
4483 	if (err < 0)
4484 		return err;
4485 
4486 	spec = codec->spec;
4487 	spec->linear_tone_beep = 1;
4488 	spec->gen.own_eapd_ctl = 1;
4489 
4490 	codec->power_filter = snd_hda_codec_eapd_power_filter;
4491 
4492 	snd_hda_add_verbs(codec, stac9200_eapd_init);
4493 
4494 	snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
4495 			   stac9200_fixups);
4496 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4497 
4498 	err = stac_parse_auto_config(codec);
4499 	if (err < 0) {
4500 		stac_free(codec);
4501 		return err;
4502 	}
4503 
4504 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4505 
4506 	return 0;
4507 }
4508 
4509 static int patch_stac925x(struct hda_codec *codec)
4510 {
4511 	struct sigmatel_spec *spec;
4512 	int err;
4513 
4514 	err = alloc_stac_spec(codec);
4515 	if (err < 0)
4516 		return err;
4517 
4518 	spec = codec->spec;
4519 	spec->linear_tone_beep = 1;
4520 	spec->gen.own_eapd_ctl = 1;
4521 
4522 	snd_hda_add_verbs(codec, stac925x_core_init);
4523 
4524 	snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
4525 			   stac925x_fixups);
4526 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4527 
4528 	err = stac_parse_auto_config(codec);
4529 	if (err < 0) {
4530 		stac_free(codec);
4531 		return err;
4532 	}
4533 
4534 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4535 
4536 	return 0;
4537 }
4538 
4539 static int patch_stac92hd73xx(struct hda_codec *codec)
4540 {
4541 	struct sigmatel_spec *spec;
4542 	int err;
4543 	int num_dacs;
4544 
4545 	err = alloc_stac_spec(codec);
4546 	if (err < 0)
4547 		return err;
4548 
4549 	spec = codec->spec;
4550 	/* enable power_save_node only for new 92HD89xx chips, as it causes
4551 	 * click noises on old 92HD73xx chips.
4552 	 */
4553 	if ((codec->core.vendor_id & 0xfffffff0) != 0x111d7670)
4554 		codec->power_save_node = 1;
4555 	spec->linear_tone_beep = 0;
4556 	spec->gen.mixer_nid = 0x1d;
4557 	spec->have_spdif_mux = 1;
4558 
4559 	num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
4560 	if (num_dacs < 3 || num_dacs > 5) {
4561 		codec_warn(codec,
4562 			   "Could not determine number of channels defaulting to DAC count\n");
4563 		num_dacs = 5;
4564 	}
4565 
4566 	switch (num_dacs) {
4567 	case 0x3: /* 6 Channel */
4568 		spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
4569 		break;
4570 	case 0x4: /* 8 Channel */
4571 		spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
4572 		break;
4573 	case 0x5: /* 10 Channel */
4574 		spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
4575 		break;
4576 	}
4577 
4578 	spec->aloopback_mask = 0x01;
4579 	spec->aloopback_shift = 8;
4580 
4581 	spec->gen.beep_nid = 0x1c; /* digital beep */
4582 
4583 	/* GPIO0 High = Enable EAPD */
4584 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4585 	spec->gpio_data = 0x01;
4586 
4587 	spec->eapd_switch = 1;
4588 
4589 	spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
4590 	spec->pwr_nids = stac92hd73xx_pwr_nids;
4591 
4592 	spec->gen.own_eapd_ctl = 1;
4593 	spec->gen.power_down_unused = 1;
4594 
4595 	snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
4596 			   stac92hd73xx_fixups);
4597 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4598 
4599 	if (!spec->volknob_init)
4600 		snd_hda_add_verbs(codec, stac92hd73xx_core_init);
4601 
4602 	err = stac_parse_auto_config(codec);
4603 	if (err < 0) {
4604 		stac_free(codec);
4605 		return err;
4606 	}
4607 
4608 	/* Don't GPIO-mute speakers if there are no internal speakers, because
4609 	 * the GPIO might be necessary for Headphone
4610 	 */
4611 	if (spec->eapd_switch && !has_builtin_speaker(codec))
4612 		spec->eapd_switch = 0;
4613 
4614 	codec->proc_widget_hook = stac92hd7x_proc_hook;
4615 
4616 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4617 
4618 	return 0;
4619 }
4620 
4621 static void stac_setup_gpio(struct hda_codec *codec)
4622 {
4623 	struct sigmatel_spec *spec = codec->spec;
4624 
4625 	spec->gpio_mask |= spec->eapd_mask;
4626 	if (spec->gpio_led) {
4627 		if (!spec->vref_mute_led_nid) {
4628 			spec->gpio_mask |= spec->gpio_led;
4629 			spec->gpio_dir |= spec->gpio_led;
4630 			spec->gpio_data |= spec->gpio_led;
4631 		} else {
4632 			codec->power_filter = stac_vref_led_power_filter;
4633 		}
4634 	}
4635 
4636 	if (spec->mic_mute_led_gpio) {
4637 		spec->gpio_mask |= spec->mic_mute_led_gpio;
4638 		spec->gpio_dir |= spec->mic_mute_led_gpio;
4639 		spec->mic_enabled = 0;
4640 		spec->gpio_data |= spec->mic_mute_led_gpio;
4641 		snd_hda_gen_add_micmute_led(codec, stac_capture_led_update);
4642 	}
4643 }
4644 
4645 static int patch_stac92hd83xxx(struct hda_codec *codec)
4646 {
4647 	struct sigmatel_spec *spec;
4648 	int err;
4649 
4650 	err = alloc_stac_spec(codec);
4651 	if (err < 0)
4652 		return err;
4653 
4654 	/* longer delay needed for D3 */
4655 	codec->core.power_caps &= ~AC_PWRST_EPSS;
4656 
4657 	spec = codec->spec;
4658 	codec->power_save_node = 1;
4659 	spec->linear_tone_beep = 0;
4660 	spec->gen.own_eapd_ctl = 1;
4661 	spec->gen.power_down_unused = 1;
4662 	spec->gen.mixer_nid = 0x1b;
4663 
4664 	spec->gen.beep_nid = 0x21; /* digital beep */
4665 	spec->pwr_nids = stac92hd83xxx_pwr_nids;
4666 	spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
4667 	spec->default_polarity = -1; /* no default cfg */
4668 
4669 	snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
4670 
4671 	snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
4672 			   stac92hd83xxx_fixups);
4673 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4674 
4675 	stac_setup_gpio(codec);
4676 
4677 	err = stac_parse_auto_config(codec);
4678 	if (err < 0) {
4679 		stac_free(codec);
4680 		return err;
4681 	}
4682 
4683 	codec->proc_widget_hook = stac92hd_proc_hook;
4684 
4685 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4686 
4687 	return 0;
4688 }
4689 
4690 static const hda_nid_t stac92hd95_pwr_nids[] = {
4691 	0x0a, 0x0b, 0x0c, 0x0d
4692 };
4693 
4694 static int patch_stac92hd95(struct hda_codec *codec)
4695 {
4696 	struct sigmatel_spec *spec;
4697 	int err;
4698 
4699 	err = alloc_stac_spec(codec);
4700 	if (err < 0)
4701 		return err;
4702 
4703 	/* longer delay needed for D3 */
4704 	codec->core.power_caps &= ~AC_PWRST_EPSS;
4705 
4706 	spec = codec->spec;
4707 	codec->power_save_node = 1;
4708 	spec->linear_tone_beep = 0;
4709 	spec->gen.own_eapd_ctl = 1;
4710 	spec->gen.power_down_unused = 1;
4711 
4712 	spec->gen.beep_nid = 0x19; /* digital beep */
4713 	spec->pwr_nids = stac92hd95_pwr_nids;
4714 	spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
4715 	spec->default_polarity = 0;
4716 
4717 	snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl,
4718 			   stac92hd95_fixups);
4719 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4720 
4721 	stac_setup_gpio(codec);
4722 
4723 	err = stac_parse_auto_config(codec);
4724 	if (err < 0) {
4725 		stac_free(codec);
4726 		return err;
4727 	}
4728 
4729 	codec->proc_widget_hook = stac92hd_proc_hook;
4730 
4731 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4732 
4733 	return 0;
4734 }
4735 
4736 static int patch_stac92hd71bxx(struct hda_codec *codec)
4737 {
4738 	struct sigmatel_spec *spec;
4739 	const hda_nid_t *unmute_nids = stac92hd71bxx_unmute_nids;
4740 	int err;
4741 
4742 	err = alloc_stac_spec(codec);
4743 	if (err < 0)
4744 		return err;
4745 
4746 	spec = codec->spec;
4747 	/* disabled power_save_node since it causes noises on a Dell machine */
4748 	/* codec->power_save_node = 1; */
4749 	spec->linear_tone_beep = 0;
4750 	spec->gen.own_eapd_ctl = 1;
4751 	spec->gen.power_down_unused = 1;
4752 	spec->gen.mixer_nid = 0x17;
4753 	spec->have_spdif_mux = 1;
4754 
4755 	/* GPIO0 = EAPD */
4756 	spec->gpio_mask = 0x01;
4757 	spec->gpio_dir = 0x01;
4758 	spec->gpio_data = 0x01;
4759 
4760 	switch (codec->core.vendor_id) {
4761 	case 0x111d76b6: /* 4 Port without Analog Mixer */
4762 	case 0x111d76b7:
4763 		unmute_nids++;
4764 		break;
4765 	case 0x111d7608: /* 5 Port with Analog Mixer */
4766 		if ((codec->core.revision_id & 0xf) == 0 ||
4767 		    (codec->core.revision_id & 0xf) == 1)
4768 			spec->stream_delay = 40; /* 40 milliseconds */
4769 
4770 		/* disable VSW */
4771 		unmute_nids++;
4772 		snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
4773 		snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
4774 		break;
4775 	case 0x111d7603: /* 6 Port with Analog Mixer */
4776 		if ((codec->core.revision_id & 0xf) == 1)
4777 			spec->stream_delay = 40; /* 40 milliseconds */
4778 
4779 		break;
4780 	}
4781 
4782 	if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
4783 		snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
4784 
4785 	if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) {
4786 		const hda_nid_t *p;
4787 		for (p = unmute_nids; *p; p++)
4788 			snd_hda_codec_amp_init_stereo(codec, *p, HDA_INPUT, 0,
4789 						      0xff, 0x00);
4790 	}
4791 
4792 	spec->aloopback_ctl = &stac92hd71bxx_loopback;
4793 	spec->aloopback_mask = 0x50;
4794 	spec->aloopback_shift = 0;
4795 
4796 	spec->powerdown_adcs = 1;
4797 	spec->gen.beep_nid = 0x26; /* digital beep */
4798 	spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
4799 	spec->pwr_nids = stac92hd71bxx_pwr_nids;
4800 
4801 	snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
4802 			   stac92hd71bxx_fixups);
4803 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4804 
4805 	stac_setup_gpio(codec);
4806 
4807 	err = stac_parse_auto_config(codec);
4808 	if (err < 0) {
4809 		stac_free(codec);
4810 		return err;
4811 	}
4812 
4813 	codec->proc_widget_hook = stac92hd7x_proc_hook;
4814 
4815 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4816 
4817 	return 0;
4818 }
4819 
4820 static int patch_stac922x(struct hda_codec *codec)
4821 {
4822 	struct sigmatel_spec *spec;
4823 	int err;
4824 
4825 	err = alloc_stac_spec(codec);
4826 	if (err < 0)
4827 		return err;
4828 
4829 	spec = codec->spec;
4830 	spec->linear_tone_beep = 1;
4831 	spec->gen.own_eapd_ctl = 1;
4832 
4833 	snd_hda_add_verbs(codec, stac922x_core_init);
4834 
4835 	/* Fix Mux capture level; max to 2 */
4836 	snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
4837 				  (0 << AC_AMPCAP_OFFSET_SHIFT) |
4838 				  (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
4839 				  (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
4840 				  (0 << AC_AMPCAP_MUTE_SHIFT));
4841 
4842 	snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
4843 			   stac922x_fixups);
4844 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4845 
4846 	err = stac_parse_auto_config(codec);
4847 	if (err < 0) {
4848 		stac_free(codec);
4849 		return err;
4850 	}
4851 
4852 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4853 
4854 	return 0;
4855 }
4856 
4857 static const char * const stac927x_spdif_labels[] = {
4858 	"Digital Playback", "ADAT", "Analog Mux 1",
4859 	"Analog Mux 2", "Analog Mux 3", NULL
4860 };
4861 
4862 static int patch_stac927x(struct hda_codec *codec)
4863 {
4864 	struct sigmatel_spec *spec;
4865 	int err;
4866 
4867 	err = alloc_stac_spec(codec);
4868 	if (err < 0)
4869 		return err;
4870 
4871 	spec = codec->spec;
4872 	spec->linear_tone_beep = 1;
4873 	spec->gen.own_eapd_ctl = 1;
4874 	spec->have_spdif_mux = 1;
4875 	spec->spdif_labels = stac927x_spdif_labels;
4876 
4877 	spec->gen.beep_nid = 0x23; /* digital beep */
4878 
4879 	/* GPIO0 High = Enable EAPD */
4880 	spec->eapd_mask = spec->gpio_mask = 0x01;
4881 	spec->gpio_dir = spec->gpio_data = 0x01;
4882 
4883 	spec->aloopback_ctl = &stac927x_loopback;
4884 	spec->aloopback_mask = 0x40;
4885 	spec->aloopback_shift = 0;
4886 	spec->eapd_switch = 1;
4887 
4888 	snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4889 			   stac927x_fixups);
4890 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4891 
4892 	if (!spec->volknob_init)
4893 		snd_hda_add_verbs(codec, stac927x_core_init);
4894 
4895 	err = stac_parse_auto_config(codec);
4896 	if (err < 0) {
4897 		stac_free(codec);
4898 		return err;
4899 	}
4900 
4901 	codec->proc_widget_hook = stac927x_proc_hook;
4902 
4903 	/*
4904 	 * !!FIXME!!
4905 	 * The STAC927x seem to require fairly long delays for certain
4906 	 * command sequences.  With too short delays (even if the answer
4907 	 * is set to RIRB properly), it results in the silence output
4908 	 * on some hardwares like Dell.
4909 	 *
4910 	 * The below flag enables the longer delay (see get_response
4911 	 * in hda_intel.c).
4912 	 */
4913 	codec->bus->needs_damn_long_delay = 1;
4914 
4915 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4916 
4917 	return 0;
4918 }
4919 
4920 static int patch_stac9205(struct hda_codec *codec)
4921 {
4922 	struct sigmatel_spec *spec;
4923 	int err;
4924 
4925 	err = alloc_stac_spec(codec);
4926 	if (err < 0)
4927 		return err;
4928 
4929 	spec = codec->spec;
4930 	spec->linear_tone_beep = 1;
4931 	spec->gen.own_eapd_ctl = 1;
4932 	spec->have_spdif_mux = 1;
4933 
4934 	spec->gen.beep_nid = 0x23; /* digital beep */
4935 
4936 	snd_hda_add_verbs(codec, stac9205_core_init);
4937 	spec->aloopback_ctl = &stac9205_loopback;
4938 
4939 	spec->aloopback_mask = 0x40;
4940 	spec->aloopback_shift = 0;
4941 
4942 	/* GPIO0 High = EAPD */
4943 	spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4944 	spec->gpio_data = 0x01;
4945 
4946 	/* Turn on/off EAPD per HP plugging */
4947 	spec->eapd_switch = 1;
4948 
4949 	snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4950 			   stac9205_fixups);
4951 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4952 
4953 	err = stac_parse_auto_config(codec);
4954 	if (err < 0) {
4955 		stac_free(codec);
4956 		return err;
4957 	}
4958 
4959 	codec->proc_widget_hook = stac9205_proc_hook;
4960 
4961 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4962 
4963 	return 0;
4964 }
4965 
4966 /*
4967  * STAC9872 hack
4968  */
4969 
4970 static const struct hda_verb stac9872_core_init[] = {
4971 	{0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4972 	{0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4973 	{}
4974 };
4975 
4976 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4977 	{ 0x0a, 0x03211020 },
4978 	{ 0x0b, 0x411111f0 },
4979 	{ 0x0c, 0x411111f0 },
4980 	{ 0x0d, 0x03a15030 },
4981 	{ 0x0e, 0x411111f0 },
4982 	{ 0x0f, 0x90170110 },
4983 	{ 0x11, 0x411111f0 },
4984 	{ 0x13, 0x411111f0 },
4985 	{ 0x14, 0x90a7013e },
4986 	{}
4987 };
4988 
4989 static const struct hda_model_fixup stac9872_models[] = {
4990 	{ .id = STAC_9872_VAIO, .name = "vaio" },
4991 	{}
4992 };
4993 
4994 static const struct hda_fixup stac9872_fixups[] = {
4995 	[STAC_9872_VAIO] = {
4996 		.type = HDA_FIXUP_PINS,
4997 		.v.pins = stac9872_vaio_pin_configs,
4998 	},
4999 };
5000 
5001 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
5002 	SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
5003 			   "Sony VAIO F/S", STAC_9872_VAIO),
5004 	{} /* terminator */
5005 };
5006 
5007 static int patch_stac9872(struct hda_codec *codec)
5008 {
5009 	struct sigmatel_spec *spec;
5010 	int err;
5011 
5012 	err = alloc_stac_spec(codec);
5013 	if (err < 0)
5014 		return err;
5015 
5016 	spec = codec->spec;
5017 	spec->linear_tone_beep = 1;
5018 	spec->gen.own_eapd_ctl = 1;
5019 
5020 	snd_hda_add_verbs(codec, stac9872_core_init);
5021 
5022 	snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
5023 			   stac9872_fixups);
5024 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
5025 
5026 	err = stac_parse_auto_config(codec);
5027 	if (err < 0) {
5028 		stac_free(codec);
5029 		return -EINVAL;
5030 	}
5031 
5032 	snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
5033 
5034 	return 0;
5035 }
5036 
5037 
5038 /*
5039  * patch entries
5040  */
5041 static const struct hda_device_id snd_hda_id_sigmatel[] = {
5042 	HDA_CODEC_ENTRY(0x83847690, "STAC9200", patch_stac9200),
5043 	HDA_CODEC_ENTRY(0x83847882, "STAC9220 A1", patch_stac922x),
5044 	HDA_CODEC_ENTRY(0x83847680, "STAC9221 A1", patch_stac922x),
5045 	HDA_CODEC_ENTRY(0x83847880, "STAC9220 A2", patch_stac922x),
5046 	HDA_CODEC_ENTRY(0x83847681, "STAC9220D/9223D A2", patch_stac922x),
5047 	HDA_CODEC_ENTRY(0x83847682, "STAC9221 A2", patch_stac922x),
5048 	HDA_CODEC_ENTRY(0x83847683, "STAC9221D A2", patch_stac922x),
5049 	HDA_CODEC_ENTRY(0x83847618, "STAC9227", patch_stac927x),
5050 	HDA_CODEC_ENTRY(0x83847619, "STAC9227", patch_stac927x),
5051 	HDA_CODEC_ENTRY(0x83847638, "STAC92HD700", patch_stac927x),
5052 	HDA_CODEC_ENTRY(0x83847616, "STAC9228", patch_stac927x),
5053 	HDA_CODEC_ENTRY(0x83847617, "STAC9228", patch_stac927x),
5054 	HDA_CODEC_ENTRY(0x83847614, "STAC9229", patch_stac927x),
5055 	HDA_CODEC_ENTRY(0x83847615, "STAC9229", patch_stac927x),
5056 	HDA_CODEC_ENTRY(0x83847620, "STAC9274", patch_stac927x),
5057 	HDA_CODEC_ENTRY(0x83847621, "STAC9274D", patch_stac927x),
5058 	HDA_CODEC_ENTRY(0x83847622, "STAC9273X", patch_stac927x),
5059 	HDA_CODEC_ENTRY(0x83847623, "STAC9273D", patch_stac927x),
5060 	HDA_CODEC_ENTRY(0x83847624, "STAC9272X", patch_stac927x),
5061 	HDA_CODEC_ENTRY(0x83847625, "STAC9272D", patch_stac927x),
5062 	HDA_CODEC_ENTRY(0x83847626, "STAC9271X", patch_stac927x),
5063 	HDA_CODEC_ENTRY(0x83847627, "STAC9271D", patch_stac927x),
5064 	HDA_CODEC_ENTRY(0x83847628, "STAC9274X5NH", patch_stac927x),
5065 	HDA_CODEC_ENTRY(0x83847629, "STAC9274D5NH", patch_stac927x),
5066 	HDA_CODEC_ENTRY(0x83847632, "STAC9202",  patch_stac925x),
5067 	HDA_CODEC_ENTRY(0x83847633, "STAC9202D", patch_stac925x),
5068 	HDA_CODEC_ENTRY(0x83847634, "STAC9250", patch_stac925x),
5069 	HDA_CODEC_ENTRY(0x83847635, "STAC9250D", patch_stac925x),
5070 	HDA_CODEC_ENTRY(0x83847636, "STAC9251", patch_stac925x),
5071 	HDA_CODEC_ENTRY(0x83847637, "STAC9250D", patch_stac925x),
5072 	HDA_CODEC_ENTRY(0x83847645, "92HD206X", patch_stac927x),
5073 	HDA_CODEC_ENTRY(0x83847646, "92HD206D", patch_stac927x),
5074 	/* The following does not take into account .id=0x83847661 when subsys =
5075 	 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
5076 	 * currently not fully supported.
5077 	 */
5078 	HDA_CODEC_ENTRY(0x83847661, "CXD9872RD/K", patch_stac9872),
5079 	HDA_CODEC_ENTRY(0x83847662, "STAC9872AK", patch_stac9872),
5080 	HDA_CODEC_ENTRY(0x83847664, "CXD9872AKD", patch_stac9872),
5081 	HDA_CODEC_ENTRY(0x83847698, "STAC9205", patch_stac9205),
5082 	HDA_CODEC_ENTRY(0x838476a0, "STAC9205", patch_stac9205),
5083 	HDA_CODEC_ENTRY(0x838476a1, "STAC9205D", patch_stac9205),
5084 	HDA_CODEC_ENTRY(0x838476a2, "STAC9204", patch_stac9205),
5085 	HDA_CODEC_ENTRY(0x838476a3, "STAC9204D", patch_stac9205),
5086 	HDA_CODEC_ENTRY(0x838476a4, "STAC9255", patch_stac9205),
5087 	HDA_CODEC_ENTRY(0x838476a5, "STAC9255D", patch_stac9205),
5088 	HDA_CODEC_ENTRY(0x838476a6, "STAC9254", patch_stac9205),
5089 	HDA_CODEC_ENTRY(0x838476a7, "STAC9254D", patch_stac9205),
5090 	HDA_CODEC_ENTRY(0x111d7603, "92HD75B3X5", patch_stac92hd71bxx),
5091 	HDA_CODEC_ENTRY(0x111d7604, "92HD83C1X5", patch_stac92hd83xxx),
5092 	HDA_CODEC_ENTRY(0x111d76d4, "92HD83C1C5", patch_stac92hd83xxx),
5093 	HDA_CODEC_ENTRY(0x111d7605, "92HD81B1X5", patch_stac92hd83xxx),
5094 	HDA_CODEC_ENTRY(0x111d76d5, "92HD81B1C5", patch_stac92hd83xxx),
5095 	HDA_CODEC_ENTRY(0x111d76d1, "92HD87B1/3", patch_stac92hd83xxx),
5096 	HDA_CODEC_ENTRY(0x111d76d9, "92HD87B2/4", patch_stac92hd83xxx),
5097 	HDA_CODEC_ENTRY(0x111d7666, "92HD88B3", patch_stac92hd83xxx),
5098 	HDA_CODEC_ENTRY(0x111d7667, "92HD88B1", patch_stac92hd83xxx),
5099 	HDA_CODEC_ENTRY(0x111d7668, "92HD88B2", patch_stac92hd83xxx),
5100 	HDA_CODEC_ENTRY(0x111d7669, "92HD88B4", patch_stac92hd83xxx),
5101 	HDA_CODEC_ENTRY(0x111d7608, "92HD75B2X5", patch_stac92hd71bxx),
5102 	HDA_CODEC_ENTRY(0x111d7674, "92HD73D1X5", patch_stac92hd73xx),
5103 	HDA_CODEC_ENTRY(0x111d7675, "92HD73C1X5", patch_stac92hd73xx),
5104 	HDA_CODEC_ENTRY(0x111d7676, "92HD73E1X5", patch_stac92hd73xx),
5105 	HDA_CODEC_ENTRY(0x111d7695, "92HD95", patch_stac92hd95),
5106 	HDA_CODEC_ENTRY(0x111d76b0, "92HD71B8X", patch_stac92hd71bxx),
5107 	HDA_CODEC_ENTRY(0x111d76b1, "92HD71B8X", patch_stac92hd71bxx),
5108 	HDA_CODEC_ENTRY(0x111d76b2, "92HD71B7X", patch_stac92hd71bxx),
5109 	HDA_CODEC_ENTRY(0x111d76b3, "92HD71B7X", patch_stac92hd71bxx),
5110 	HDA_CODEC_ENTRY(0x111d76b4, "92HD71B6X", patch_stac92hd71bxx),
5111 	HDA_CODEC_ENTRY(0x111d76b5, "92HD71B6X", patch_stac92hd71bxx),
5112 	HDA_CODEC_ENTRY(0x111d76b6, "92HD71B5X", patch_stac92hd71bxx),
5113 	HDA_CODEC_ENTRY(0x111d76b7, "92HD71B5X", patch_stac92hd71bxx),
5114 	HDA_CODEC_ENTRY(0x111d76c0, "92HD89C3", patch_stac92hd73xx),
5115 	HDA_CODEC_ENTRY(0x111d76c1, "92HD89C2", patch_stac92hd73xx),
5116 	HDA_CODEC_ENTRY(0x111d76c2, "92HD89C1", patch_stac92hd73xx),
5117 	HDA_CODEC_ENTRY(0x111d76c3, "92HD89B3", patch_stac92hd73xx),
5118 	HDA_CODEC_ENTRY(0x111d76c4, "92HD89B2", patch_stac92hd73xx),
5119 	HDA_CODEC_ENTRY(0x111d76c5, "92HD89B1", patch_stac92hd73xx),
5120 	HDA_CODEC_ENTRY(0x111d76c6, "92HD89E3", patch_stac92hd73xx),
5121 	HDA_CODEC_ENTRY(0x111d76c7, "92HD89E2", patch_stac92hd73xx),
5122 	HDA_CODEC_ENTRY(0x111d76c8, "92HD89E1", patch_stac92hd73xx),
5123 	HDA_CODEC_ENTRY(0x111d76c9, "92HD89D3", patch_stac92hd73xx),
5124 	HDA_CODEC_ENTRY(0x111d76ca, "92HD89D2", patch_stac92hd73xx),
5125 	HDA_CODEC_ENTRY(0x111d76cb, "92HD89D1", patch_stac92hd73xx),
5126 	HDA_CODEC_ENTRY(0x111d76cc, "92HD89F3", patch_stac92hd73xx),
5127 	HDA_CODEC_ENTRY(0x111d76cd, "92HD89F2", patch_stac92hd73xx),
5128 	HDA_CODEC_ENTRY(0x111d76ce, "92HD89F1", patch_stac92hd73xx),
5129 	HDA_CODEC_ENTRY(0x111d76df, "92HD93BXX", patch_stac92hd83xxx),
5130 	HDA_CODEC_ENTRY(0x111d76e0, "92HD91BXX", patch_stac92hd83xxx),
5131 	HDA_CODEC_ENTRY(0x111d76e3, "92HD98BXX", patch_stac92hd83xxx),
5132 	HDA_CODEC_ENTRY(0x111d76e5, "92HD99BXX", patch_stac92hd83xxx),
5133 	HDA_CODEC_ENTRY(0x111d76e7, "92HD90BXX", patch_stac92hd83xxx),
5134 	HDA_CODEC_ENTRY(0x111d76e8, "92HD66B1X5", patch_stac92hd83xxx),
5135 	HDA_CODEC_ENTRY(0x111d76e9, "92HD66B2X5", patch_stac92hd83xxx),
5136 	HDA_CODEC_ENTRY(0x111d76ea, "92HD66B3X5", patch_stac92hd83xxx),
5137 	HDA_CODEC_ENTRY(0x111d76eb, "92HD66C1X5", patch_stac92hd83xxx),
5138 	HDA_CODEC_ENTRY(0x111d76ec, "92HD66C2X5", patch_stac92hd83xxx),
5139 	HDA_CODEC_ENTRY(0x111d76ed, "92HD66C3X5", patch_stac92hd83xxx),
5140 	HDA_CODEC_ENTRY(0x111d76ee, "92HD66B1X3", patch_stac92hd83xxx),
5141 	HDA_CODEC_ENTRY(0x111d76ef, "92HD66B2X3", patch_stac92hd83xxx),
5142 	HDA_CODEC_ENTRY(0x111d76f0, "92HD66B3X3", patch_stac92hd83xxx),
5143 	HDA_CODEC_ENTRY(0x111d76f1, "92HD66C1X3", patch_stac92hd83xxx),
5144 	HDA_CODEC_ENTRY(0x111d76f2, "92HD66C2X3", patch_stac92hd83xxx),
5145 	HDA_CODEC_ENTRY(0x111d76f3, "92HD66C3/65", patch_stac92hd83xxx),
5146 	{} /* terminator */
5147 };
5148 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_sigmatel);
5149 
5150 MODULE_LICENSE("GPL");
5151 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
5152 
5153 static struct hda_codec_driver sigmatel_driver = {
5154 	.id = snd_hda_id_sigmatel,
5155 };
5156 
5157 module_hda_codec_driver(sigmatel_driver);
5158