1 /* 2 * Universal Interface for Intel High Definition Audio Codec 3 * 4 * HD audio interface patch for SigmaTel STAC92xx 5 * 6 * Copyright (c) 2005 Embedded Alley Solutions, Inc. 7 * Matt Porter <mporter@embeddedalley.com> 8 * 9 * Based on patch_cmedia.c and patch_realtek.c 10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 11 * 12 * This driver is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This driver is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/init.h> 28 #include <linux/delay.h> 29 #include <linux/slab.h> 30 #include <linux/pci.h> 31 #include <linux/dmi.h> 32 #include <linux/module.h> 33 #include <sound/core.h> 34 #include <sound/jack.h> 35 #include "hda_codec.h" 36 #include "hda_local.h" 37 #include "hda_auto_parser.h" 38 #include "hda_beep.h" 39 #include "hda_jack.h" 40 #include "hda_generic.h" 41 42 enum { 43 STAC_REF, 44 STAC_9200_OQO, 45 STAC_9200_DELL_D21, 46 STAC_9200_DELL_D22, 47 STAC_9200_DELL_D23, 48 STAC_9200_DELL_M21, 49 STAC_9200_DELL_M22, 50 STAC_9200_DELL_M23, 51 STAC_9200_DELL_M24, 52 STAC_9200_DELL_M25, 53 STAC_9200_DELL_M26, 54 STAC_9200_DELL_M27, 55 STAC_9200_M4, 56 STAC_9200_M4_2, 57 STAC_9200_PANASONIC, 58 STAC_9200_EAPD_INIT, 59 STAC_9200_MODELS 60 }; 61 62 enum { 63 STAC_9205_REF, 64 STAC_9205_DELL_M42, 65 STAC_9205_DELL_M43, 66 STAC_9205_DELL_M44, 67 STAC_9205_EAPD, 68 STAC_9205_MODELS 69 }; 70 71 enum { 72 STAC_92HD73XX_NO_JD, /* no jack-detection */ 73 STAC_92HD73XX_REF, 74 STAC_92HD73XX_INTEL, 75 STAC_DELL_M6_AMIC, 76 STAC_DELL_M6_DMIC, 77 STAC_DELL_M6_BOTH, 78 STAC_DELL_EQ, 79 STAC_ALIENWARE_M17X, 80 STAC_92HD89XX_HP_FRONT_JACK, 81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK, 82 STAC_92HD73XX_ASUS_MOBO, 83 STAC_92HD73XX_MODELS 84 }; 85 86 enum { 87 STAC_92HD83XXX_REF, 88 STAC_92HD83XXX_PWR_REF, 89 STAC_DELL_S14, 90 STAC_DELL_VOSTRO_3500, 91 STAC_92HD83XXX_HP_cNB11_INTQUAD, 92 STAC_HP_DV7_4000, 93 STAC_HP_ZEPHYR, 94 STAC_92HD83XXX_HP_LED, 95 STAC_92HD83XXX_HP_INV_LED, 96 STAC_92HD83XXX_HP_MIC_LED, 97 STAC_HP_LED_GPIO10, 98 STAC_92HD83XXX_HEADSET_JACK, 99 STAC_92HD83XXX_HP, 100 STAC_HP_ENVY_BASS, 101 STAC_HP_BNB13_EQ, 102 STAC_HP_ENVY_TS_BASS, 103 STAC_92HD83XXX_GPIO10_EAPD, 104 STAC_92HD83XXX_MODELS 105 }; 106 107 enum { 108 STAC_92HD71BXX_REF, 109 STAC_DELL_M4_1, 110 STAC_DELL_M4_2, 111 STAC_DELL_M4_3, 112 STAC_HP_M4, 113 STAC_HP_DV4, 114 STAC_HP_DV5, 115 STAC_HP_HDX, 116 STAC_92HD71BXX_HP, 117 STAC_92HD71BXX_NO_DMIC, 118 STAC_92HD71BXX_NO_SMUX, 119 STAC_92HD71BXX_MODELS 120 }; 121 122 enum { 123 STAC_92HD95_HP_LED, 124 STAC_92HD95_HP_BASS, 125 STAC_92HD95_MODELS 126 }; 127 128 enum { 129 STAC_925x_REF, 130 STAC_M1, 131 STAC_M1_2, 132 STAC_M2, 133 STAC_M2_2, 134 STAC_M3, 135 STAC_M5, 136 STAC_M6, 137 STAC_925x_MODELS 138 }; 139 140 enum { 141 STAC_D945_REF, 142 STAC_D945GTP3, 143 STAC_D945GTP5, 144 STAC_INTEL_MAC_V1, 145 STAC_INTEL_MAC_V2, 146 STAC_INTEL_MAC_V3, 147 STAC_INTEL_MAC_V4, 148 STAC_INTEL_MAC_V5, 149 STAC_INTEL_MAC_AUTO, 150 STAC_ECS_202, 151 STAC_922X_DELL_D81, 152 STAC_922X_DELL_D82, 153 STAC_922X_DELL_M81, 154 STAC_922X_DELL_M82, 155 STAC_922X_INTEL_MAC_GPIO, 156 STAC_922X_MODELS 157 }; 158 159 enum { 160 STAC_D965_REF_NO_JD, /* no jack-detection */ 161 STAC_D965_REF, 162 STAC_D965_3ST, 163 STAC_D965_5ST, 164 STAC_D965_5ST_NO_FP, 165 STAC_D965_VERBS, 166 STAC_DELL_3ST, 167 STAC_DELL_BIOS, 168 STAC_DELL_BIOS_AMIC, 169 STAC_DELL_BIOS_SPDIF, 170 STAC_927X_DELL_DMIC, 171 STAC_927X_VOLKNOB, 172 STAC_927X_MODELS 173 }; 174 175 enum { 176 STAC_9872_VAIO, 177 STAC_9872_MODELS 178 }; 179 180 struct sigmatel_spec { 181 struct hda_gen_spec gen; 182 183 unsigned int eapd_switch: 1; 184 unsigned int linear_tone_beep:1; 185 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */ 186 unsigned int volknob_init:1; /* special volume-knob initialization */ 187 unsigned int powerdown_adcs:1; 188 unsigned int have_spdif_mux:1; 189 190 /* gpio lines */ 191 unsigned int eapd_mask; 192 unsigned int gpio_mask; 193 unsigned int gpio_dir; 194 unsigned int gpio_data; 195 unsigned int gpio_mute; 196 unsigned int gpio_led; 197 unsigned int gpio_led_polarity; 198 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */ 199 unsigned int vref_led; 200 int default_polarity; 201 202 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */ 203 unsigned int mic_enabled; /* current mic mute state (bitmask) */ 204 205 /* stream */ 206 unsigned int stream_delay; 207 208 /* analog loopback */ 209 const struct snd_kcontrol_new *aloopback_ctl; 210 unsigned int aloopback; 211 unsigned char aloopback_mask; 212 unsigned char aloopback_shift; 213 214 /* power management */ 215 unsigned int power_map_bits; 216 unsigned int num_pwrs; 217 const hda_nid_t *pwr_nids; 218 unsigned int active_adcs; 219 220 /* beep widgets */ 221 hda_nid_t anabeep_nid; 222 223 /* SPDIF-out mux */ 224 const char * const *spdif_labels; 225 struct hda_input_mux spdif_mux; 226 unsigned int cur_smux[2]; 227 }; 228 229 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec 230 #define AC_VERB_IDT_GET_POWER_MAP 0xfec 231 232 static const hda_nid_t stac92hd73xx_pwr_nids[8] = { 233 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 234 0x0f, 0x10, 0x11 235 }; 236 237 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = { 238 0x0a, 0x0b, 0x0c, 0xd, 0x0e, 239 0x0f, 0x10 240 }; 241 242 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = { 243 0x0a, 0x0d, 0x0f 244 }; 245 246 247 /* 248 * PCM hooks 249 */ 250 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo, 251 struct hda_codec *codec, 252 struct snd_pcm_substream *substream, 253 int action) 254 { 255 struct sigmatel_spec *spec = codec->spec; 256 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay) 257 msleep(spec->stream_delay); 258 } 259 260 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo, 261 struct hda_codec *codec, 262 struct snd_pcm_substream *substream, 263 int action) 264 { 265 struct sigmatel_spec *spec = codec->spec; 266 int i, idx = 0; 267 268 if (!spec->powerdown_adcs) 269 return; 270 271 for (i = 0; i < spec->gen.num_all_adcs; i++) { 272 if (spec->gen.all_adcs[i] == hinfo->nid) { 273 idx = i; 274 break; 275 } 276 } 277 278 switch (action) { 279 case HDA_GEN_PCM_ACT_OPEN: 280 msleep(40); 281 snd_hda_codec_write(codec, hinfo->nid, 0, 282 AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 283 spec->active_adcs |= (1 << idx); 284 break; 285 case HDA_GEN_PCM_ACT_CLOSE: 286 snd_hda_codec_write(codec, hinfo->nid, 0, 287 AC_VERB_SET_POWER_STATE, AC_PWRST_D3); 288 spec->active_adcs &= ~(1 << idx); 289 break; 290 } 291 } 292 293 /* 294 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a 295 * funky external mute control using GPIO pins. 296 */ 297 298 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask, 299 unsigned int dir_mask, unsigned int data) 300 { 301 unsigned int gpiostate, gpiomask, gpiodir; 302 hda_nid_t fg = codec->core.afg; 303 304 codec_dbg(codec, "%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data); 305 306 gpiostate = snd_hda_codec_read(codec, fg, 0, 307 AC_VERB_GET_GPIO_DATA, 0); 308 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask); 309 310 gpiomask = snd_hda_codec_read(codec, fg, 0, 311 AC_VERB_GET_GPIO_MASK, 0); 312 gpiomask |= mask; 313 314 gpiodir = snd_hda_codec_read(codec, fg, 0, 315 AC_VERB_GET_GPIO_DIRECTION, 0); 316 gpiodir |= dir_mask; 317 318 /* Configure GPIOx as CMOS */ 319 snd_hda_codec_write(codec, fg, 0, 0x7e7, 0); 320 321 snd_hda_codec_write(codec, fg, 0, 322 AC_VERB_SET_GPIO_MASK, gpiomask); 323 snd_hda_codec_read(codec, fg, 0, 324 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */ 325 326 msleep(1); 327 328 snd_hda_codec_read(codec, fg, 0, 329 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */ 330 } 331 332 /* hook for controlling mic-mute LED GPIO */ 333 static void stac_capture_led_hook(struct hda_codec *codec, 334 struct snd_kcontrol *kcontrol, 335 struct snd_ctl_elem_value *ucontrol) 336 { 337 struct sigmatel_spec *spec = codec->spec; 338 unsigned int mask; 339 bool cur_mute, prev_mute; 340 341 if (!kcontrol || !ucontrol) 342 return; 343 344 mask = 1U << snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 345 prev_mute = !spec->mic_enabled; 346 if (ucontrol->value.integer.value[0] || 347 ucontrol->value.integer.value[1]) 348 spec->mic_enabled |= mask; 349 else 350 spec->mic_enabled &= ~mask; 351 cur_mute = !spec->mic_enabled; 352 if (cur_mute != prev_mute) { 353 if (cur_mute) 354 spec->gpio_data |= spec->mic_mute_led_gpio; 355 else 356 spec->gpio_data &= ~spec->mic_mute_led_gpio; 357 stac_gpio_set(codec, spec->gpio_mask, 358 spec->gpio_dir, spec->gpio_data); 359 } 360 } 361 362 static int stac_vrefout_set(struct hda_codec *codec, 363 hda_nid_t nid, unsigned int new_vref) 364 { 365 int error, pinctl; 366 367 codec_dbg(codec, "%s, nid %x ctl %x\n", __func__, nid, new_vref); 368 pinctl = snd_hda_codec_read(codec, nid, 0, 369 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 370 371 if (pinctl < 0) 372 return pinctl; 373 374 pinctl &= 0xff; 375 pinctl &= ~AC_PINCTL_VREFEN; 376 pinctl |= (new_vref & AC_PINCTL_VREFEN); 377 378 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl); 379 if (error < 0) 380 return error; 381 382 return 1; 383 } 384 385 /* prevent codec AFG to D3 state when vref-out pin is used for mute LED */ 386 /* this hook is set in stac_setup_gpio() */ 387 static unsigned int stac_vref_led_power_filter(struct hda_codec *codec, 388 hda_nid_t nid, 389 unsigned int power_state) 390 { 391 if (nid == codec->core.afg && power_state == AC_PWRST_D3) 392 return AC_PWRST_D1; 393 return snd_hda_gen_path_power_filter(codec, nid, power_state); 394 } 395 396 /* update mute-LED accoring to the master switch */ 397 static void stac_update_led_status(struct hda_codec *codec, int enabled) 398 { 399 struct sigmatel_spec *spec = codec->spec; 400 int muted = !enabled; 401 402 if (!spec->gpio_led) 403 return; 404 405 /* LED state is inverted on these systems */ 406 if (spec->gpio_led_polarity) 407 muted = !muted; 408 409 if (!spec->vref_mute_led_nid) { 410 if (muted) 411 spec->gpio_data |= spec->gpio_led; 412 else 413 spec->gpio_data &= ~spec->gpio_led; 414 stac_gpio_set(codec, spec->gpio_mask, 415 spec->gpio_dir, spec->gpio_data); 416 } else { 417 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD; 418 stac_vrefout_set(codec, spec->vref_mute_led_nid, 419 spec->vref_led); 420 } 421 } 422 423 /* vmaster hook to update mute LED */ 424 static void stac_vmaster_hook(void *private_data, int val) 425 { 426 stac_update_led_status(private_data, val); 427 } 428 429 /* automute hook to handle GPIO mute and EAPD updates */ 430 static void stac_update_outputs(struct hda_codec *codec) 431 { 432 struct sigmatel_spec *spec = codec->spec; 433 434 if (spec->gpio_mute) 435 spec->gen.master_mute = 436 !(snd_hda_codec_read(codec, codec->core.afg, 0, 437 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute); 438 439 snd_hda_gen_update_outputs(codec); 440 441 if (spec->eapd_mask && spec->eapd_switch) { 442 unsigned int val = spec->gpio_data; 443 if (spec->gen.speaker_muted) 444 val &= ~spec->eapd_mask; 445 else 446 val |= spec->eapd_mask; 447 if (spec->gpio_data != val) { 448 spec->gpio_data = val; 449 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, 450 val); 451 } 452 } 453 } 454 455 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid, 456 bool enable, bool do_write) 457 { 458 struct sigmatel_spec *spec = codec->spec; 459 unsigned int idx, val; 460 461 for (idx = 0; idx < spec->num_pwrs; idx++) { 462 if (spec->pwr_nids[idx] == nid) 463 break; 464 } 465 if (idx >= spec->num_pwrs) 466 return; 467 468 idx = 1 << idx; 469 470 val = spec->power_map_bits; 471 if (enable) 472 val &= ~idx; 473 else 474 val |= idx; 475 476 /* power down unused output ports */ 477 if (val != spec->power_map_bits) { 478 spec->power_map_bits = val; 479 if (do_write) 480 snd_hda_codec_write(codec, codec->core.afg, 0, 481 AC_VERB_IDT_SET_POWER_MAP, val); 482 } 483 } 484 485 /* update power bit per jack plug/unplug */ 486 static void jack_update_power(struct hda_codec *codec, 487 struct hda_jack_callback *jack) 488 { 489 struct sigmatel_spec *spec = codec->spec; 490 int i; 491 492 if (!spec->num_pwrs) 493 return; 494 495 if (jack && jack->tbl->nid) { 496 stac_toggle_power_map(codec, jack->tbl->nid, 497 snd_hda_jack_detect(codec, jack->tbl->nid), 498 true); 499 return; 500 } 501 502 /* update all jacks */ 503 for (i = 0; i < spec->num_pwrs; i++) { 504 hda_nid_t nid = spec->pwr_nids[i]; 505 if (!snd_hda_jack_tbl_get(codec, nid)) 506 continue; 507 stac_toggle_power_map(codec, nid, 508 snd_hda_jack_detect(codec, nid), 509 false); 510 } 511 512 snd_hda_codec_write(codec, codec->core.afg, 0, 513 AC_VERB_IDT_SET_POWER_MAP, 514 spec->power_map_bits); 515 } 516 517 static void stac_vref_event(struct hda_codec *codec, 518 struct hda_jack_callback *event) 519 { 520 unsigned int data; 521 522 data = snd_hda_codec_read(codec, codec->core.afg, 0, 523 AC_VERB_GET_GPIO_DATA, 0); 524 /* toggle VREF state based on GPIOx status */ 525 snd_hda_codec_write(codec, codec->core.afg, 0, 0x7e0, 526 !!(data & (1 << event->private_data))); 527 } 528 529 /* initialize the power map and enable the power event to jacks that 530 * haven't been assigned to automute 531 */ 532 static void stac_init_power_map(struct hda_codec *codec) 533 { 534 struct sigmatel_spec *spec = codec->spec; 535 int i; 536 537 for (i = 0; i < spec->num_pwrs; i++) { 538 hda_nid_t nid = spec->pwr_nids[i]; 539 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid); 540 def_conf = get_defcfg_connect(def_conf); 541 if (def_conf == AC_JACK_PORT_COMPLEX && 542 spec->vref_mute_led_nid != nid && 543 is_jack_detectable(codec, nid)) { 544 snd_hda_jack_detect_enable_callback(codec, nid, 545 jack_update_power); 546 } else { 547 if (def_conf == AC_JACK_PORT_NONE) 548 stac_toggle_power_map(codec, nid, false, false); 549 else 550 stac_toggle_power_map(codec, nid, true, false); 551 } 552 } 553 } 554 555 /* 556 */ 557 558 static inline bool get_int_hint(struct hda_codec *codec, const char *key, 559 int *valp) 560 { 561 return !snd_hda_get_int_hint(codec, key, valp); 562 } 563 564 /* override some hints from the hwdep entry */ 565 static void stac_store_hints(struct hda_codec *codec) 566 { 567 struct sigmatel_spec *spec = codec->spec; 568 int val; 569 570 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) { 571 spec->eapd_mask = spec->gpio_dir = spec->gpio_data = 572 spec->gpio_mask; 573 } 574 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir)) 575 spec->gpio_dir &= spec->gpio_mask; 576 if (get_int_hint(codec, "gpio_data", &spec->gpio_data)) 577 spec->gpio_data &= spec->gpio_mask; 578 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask)) 579 spec->eapd_mask &= spec->gpio_mask; 580 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute)) 581 spec->gpio_mute &= spec->gpio_mask; 582 val = snd_hda_get_bool_hint(codec, "eapd_switch"); 583 if (val >= 0) 584 spec->eapd_switch = val; 585 } 586 587 /* 588 * loopback controls 589 */ 590 591 #define stac_aloopback_info snd_ctl_boolean_mono_info 592 593 static int stac_aloopback_get(struct snd_kcontrol *kcontrol, 594 struct snd_ctl_elem_value *ucontrol) 595 { 596 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 597 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 598 struct sigmatel_spec *spec = codec->spec; 599 600 ucontrol->value.integer.value[0] = !!(spec->aloopback & 601 (spec->aloopback_mask << idx)); 602 return 0; 603 } 604 605 static int stac_aloopback_put(struct snd_kcontrol *kcontrol, 606 struct snd_ctl_elem_value *ucontrol) 607 { 608 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 609 struct sigmatel_spec *spec = codec->spec; 610 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 611 unsigned int dac_mode; 612 unsigned int val, idx_val; 613 614 idx_val = spec->aloopback_mask << idx; 615 if (ucontrol->value.integer.value[0]) 616 val = spec->aloopback | idx_val; 617 else 618 val = spec->aloopback & ~idx_val; 619 if (spec->aloopback == val) 620 return 0; 621 622 spec->aloopback = val; 623 624 /* Only return the bits defined by the shift value of the 625 * first two bytes of the mask 626 */ 627 dac_mode = snd_hda_codec_read(codec, codec->core.afg, 0, 628 kcontrol->private_value & 0xFFFF, 0x0); 629 dac_mode >>= spec->aloopback_shift; 630 631 if (spec->aloopback & idx_val) { 632 snd_hda_power_up(codec); 633 dac_mode |= idx_val; 634 } else { 635 snd_hda_power_down(codec); 636 dac_mode &= ~idx_val; 637 } 638 639 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 640 kcontrol->private_value >> 16, dac_mode); 641 642 return 1; 643 } 644 645 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \ 646 { \ 647 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 648 .name = "Analog Loopback", \ 649 .count = cnt, \ 650 .info = stac_aloopback_info, \ 651 .get = stac_aloopback_get, \ 652 .put = stac_aloopback_put, \ 653 .private_value = verb_read | (verb_write << 16), \ 654 } 655 656 /* 657 * Mute LED handling on HP laptops 658 */ 659 660 /* check whether it's a HP laptop with a docking port */ 661 static bool hp_bnb2011_with_dock(struct hda_codec *codec) 662 { 663 if (codec->core.vendor_id != 0x111d7605 && 664 codec->core.vendor_id != 0x111d76d1) 665 return false; 666 667 switch (codec->core.subsystem_id) { 668 case 0x103c1618: 669 case 0x103c1619: 670 case 0x103c161a: 671 case 0x103c161b: 672 case 0x103c161c: 673 case 0x103c161d: 674 case 0x103c161e: 675 case 0x103c161f: 676 677 case 0x103c162a: 678 case 0x103c162b: 679 680 case 0x103c1630: 681 case 0x103c1631: 682 683 case 0x103c1633: 684 case 0x103c1634: 685 case 0x103c1635: 686 687 case 0x103c3587: 688 case 0x103c3588: 689 case 0x103c3589: 690 case 0x103c358a: 691 692 case 0x103c3667: 693 case 0x103c3668: 694 case 0x103c3669: 695 696 return true; 697 } 698 return false; 699 } 700 701 static bool hp_blike_system(u32 subsystem_id) 702 { 703 switch (subsystem_id) { 704 case 0x103c1520: 705 case 0x103c1521: 706 case 0x103c1523: 707 case 0x103c1524: 708 case 0x103c1525: 709 case 0x103c1722: 710 case 0x103c1723: 711 case 0x103c1724: 712 case 0x103c1725: 713 case 0x103c1726: 714 case 0x103c1727: 715 case 0x103c1728: 716 case 0x103c1729: 717 case 0x103c172a: 718 case 0x103c172b: 719 case 0x103c307e: 720 case 0x103c307f: 721 case 0x103c3080: 722 case 0x103c3081: 723 case 0x103c7007: 724 case 0x103c7008: 725 return true; 726 } 727 return false; 728 } 729 730 static void set_hp_led_gpio(struct hda_codec *codec) 731 { 732 struct sigmatel_spec *spec = codec->spec; 733 unsigned int gpio; 734 735 if (spec->gpio_led) 736 return; 737 738 gpio = snd_hda_param_read(codec, codec->core.afg, AC_PAR_GPIO_CAP); 739 gpio &= AC_GPIO_IO_COUNT; 740 if (gpio > 3) 741 spec->gpio_led = 0x08; /* GPIO 3 */ 742 else 743 spec->gpio_led = 0x01; /* GPIO 0 */ 744 } 745 746 /* 747 * This method searches for the mute LED GPIO configuration 748 * provided as OEM string in SMBIOS. The format of that string 749 * is HP_Mute_LED_P_G or HP_Mute_LED_P 750 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high) 751 * that corresponds to the NOT muted state of the master volume 752 * and G is the index of the GPIO to use as the mute LED control (0..9) 753 * If _G portion is missing it is assigned based on the codec ID 754 * 755 * So, HP B-series like systems may have HP_Mute_LED_0 (current models) 756 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings 757 * 758 * 759 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in 760 * SMBIOS - at least the ones I have seen do not have them - which include 761 * my own system (HP Pavilion dv6-1110ax) and my cousin's 762 * HP Pavilion dv9500t CTO. 763 * Need more information on whether it is true across the entire series. 764 * -- kunal 765 */ 766 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity) 767 { 768 struct sigmatel_spec *spec = codec->spec; 769 const struct dmi_device *dev = NULL; 770 771 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) { 772 get_int_hint(codec, "gpio_led_polarity", 773 &spec->gpio_led_polarity); 774 return 1; 775 } 776 777 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) { 778 if (sscanf(dev->name, "HP_Mute_LED_%u_%x", 779 &spec->gpio_led_polarity, 780 &spec->gpio_led) == 2) { 781 unsigned int max_gpio; 782 max_gpio = snd_hda_param_read(codec, codec->core.afg, 783 AC_PAR_GPIO_CAP); 784 max_gpio &= AC_GPIO_IO_COUNT; 785 if (spec->gpio_led < max_gpio) 786 spec->gpio_led = 1 << spec->gpio_led; 787 else 788 spec->vref_mute_led_nid = spec->gpio_led; 789 return 1; 790 } 791 if (sscanf(dev->name, "HP_Mute_LED_%u", 792 &spec->gpio_led_polarity) == 1) { 793 set_hp_led_gpio(codec); 794 return 1; 795 } 796 /* BIOS bug: unfilled OEM string */ 797 if (strstr(dev->name, "HP_Mute_LED_P_G")) { 798 set_hp_led_gpio(codec); 799 if (default_polarity >= 0) 800 spec->gpio_led_polarity = default_polarity; 801 else 802 spec->gpio_led_polarity = 1; 803 return 1; 804 } 805 } 806 807 /* 808 * Fallback case - if we don't find the DMI strings, 809 * we statically set the GPIO - if not a B-series system 810 * and default polarity is provided 811 */ 812 if (!hp_blike_system(codec->core.subsystem_id) && 813 (default_polarity == 0 || default_polarity == 1)) { 814 set_hp_led_gpio(codec); 815 spec->gpio_led_polarity = default_polarity; 816 return 1; 817 } 818 return 0; 819 } 820 821 /* check whether a built-in speaker is included in parsed pins */ 822 static bool has_builtin_speaker(struct hda_codec *codec) 823 { 824 struct sigmatel_spec *spec = codec->spec; 825 hda_nid_t *nid_pin; 826 int nids, i; 827 828 if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) { 829 nid_pin = spec->gen.autocfg.line_out_pins; 830 nids = spec->gen.autocfg.line_outs; 831 } else { 832 nid_pin = spec->gen.autocfg.speaker_pins; 833 nids = spec->gen.autocfg.speaker_outs; 834 } 835 836 for (i = 0; i < nids; i++) { 837 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]); 838 if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT) 839 return true; 840 } 841 return false; 842 } 843 844 /* 845 * PC beep controls 846 */ 847 848 /* create PC beep volume controls */ 849 static int stac_auto_create_beep_ctls(struct hda_codec *codec, 850 hda_nid_t nid) 851 { 852 struct sigmatel_spec *spec = codec->spec; 853 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 854 struct snd_kcontrol_new *knew; 855 static struct snd_kcontrol_new abeep_mute_ctl = 856 HDA_CODEC_MUTE(NULL, 0, 0, 0); 857 static struct snd_kcontrol_new dbeep_mute_ctl = 858 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0); 859 static struct snd_kcontrol_new beep_vol_ctl = 860 HDA_CODEC_VOLUME(NULL, 0, 0, 0); 861 862 /* check for mute support for the the amp */ 863 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) { 864 const struct snd_kcontrol_new *temp; 865 if (spec->anabeep_nid == nid) 866 temp = &abeep_mute_ctl; 867 else 868 temp = &dbeep_mute_ctl; 869 knew = snd_hda_gen_add_kctl(&spec->gen, 870 "Beep Playback Switch", temp); 871 if (!knew) 872 return -ENOMEM; 873 knew->private_value = 874 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 875 } 876 877 /* check to see if there is volume support for the amp */ 878 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) { 879 knew = snd_hda_gen_add_kctl(&spec->gen, 880 "Beep Playback Volume", 881 &beep_vol_ctl); 882 if (!knew) 883 return -ENOMEM; 884 knew->private_value = 885 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT); 886 } 887 return 0; 888 } 889 890 #ifdef CONFIG_SND_HDA_INPUT_BEEP 891 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info 892 893 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol, 894 struct snd_ctl_elem_value *ucontrol) 895 { 896 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 897 ucontrol->value.integer.value[0] = codec->beep->enabled; 898 return 0; 899 } 900 901 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol, 902 struct snd_ctl_elem_value *ucontrol) 903 { 904 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 905 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]); 906 } 907 908 static const struct snd_kcontrol_new stac_dig_beep_ctrl = { 909 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 910 .name = "Beep Playback Switch", 911 .info = stac_dig_beep_switch_info, 912 .get = stac_dig_beep_switch_get, 913 .put = stac_dig_beep_switch_put, 914 }; 915 916 static int stac_beep_switch_ctl(struct hda_codec *codec) 917 { 918 struct sigmatel_spec *spec = codec->spec; 919 920 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl)) 921 return -ENOMEM; 922 return 0; 923 } 924 #endif 925 926 /* 927 * SPDIF-out mux controls 928 */ 929 930 static int stac_smux_enum_info(struct snd_kcontrol *kcontrol, 931 struct snd_ctl_elem_info *uinfo) 932 { 933 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 934 struct sigmatel_spec *spec = codec->spec; 935 return snd_hda_input_mux_info(&spec->spdif_mux, uinfo); 936 } 937 938 static int stac_smux_enum_get(struct snd_kcontrol *kcontrol, 939 struct snd_ctl_elem_value *ucontrol) 940 { 941 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 942 struct sigmatel_spec *spec = codec->spec; 943 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 944 945 ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx]; 946 return 0; 947 } 948 949 static int stac_smux_enum_put(struct snd_kcontrol *kcontrol, 950 struct snd_ctl_elem_value *ucontrol) 951 { 952 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 953 struct sigmatel_spec *spec = codec->spec; 954 unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 955 956 return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol, 957 spec->gen.autocfg.dig_out_pins[smux_idx], 958 &spec->cur_smux[smux_idx]); 959 } 960 961 static struct snd_kcontrol_new stac_smux_mixer = { 962 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 963 .name = "IEC958 Playback Source", 964 /* count set later */ 965 .info = stac_smux_enum_info, 966 .get = stac_smux_enum_get, 967 .put = stac_smux_enum_put, 968 }; 969 970 static const char * const stac_spdif_labels[] = { 971 "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL 972 }; 973 974 static int stac_create_spdif_mux_ctls(struct hda_codec *codec) 975 { 976 struct sigmatel_spec *spec = codec->spec; 977 struct auto_pin_cfg *cfg = &spec->gen.autocfg; 978 const char * const *labels = spec->spdif_labels; 979 struct snd_kcontrol_new *kctl; 980 int i, num_cons; 981 982 if (cfg->dig_outs < 1) 983 return 0; 984 985 num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]); 986 if (num_cons <= 1) 987 return 0; 988 989 if (!labels) 990 labels = stac_spdif_labels; 991 for (i = 0; i < num_cons; i++) { 992 if (snd_BUG_ON(!labels[i])) 993 return -EINVAL; 994 snd_hda_add_imux_item(codec, &spec->spdif_mux, labels[i], i, NULL); 995 } 996 997 kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer); 998 if (!kctl) 999 return -ENOMEM; 1000 kctl->count = cfg->dig_outs; 1001 1002 return 0; 1003 } 1004 1005 /* 1006 */ 1007 1008 static const struct hda_verb stac9200_core_init[] = { 1009 /* set dac0mux for dac converter */ 1010 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1011 {} 1012 }; 1013 1014 static const struct hda_verb stac9200_eapd_init[] = { 1015 /* set dac0mux for dac converter */ 1016 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00}, 1017 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1018 {} 1019 }; 1020 1021 static const struct hda_verb dell_eq_core_init[] = { 1022 /* set master volume to max value without distortion 1023 * and direct control */ 1024 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec}, 1025 {} 1026 }; 1027 1028 static const struct hda_verb stac92hd73xx_core_init[] = { 1029 /* set master volume and direct control */ 1030 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1031 {} 1032 }; 1033 1034 static const struct hda_verb stac92hd83xxx_core_init[] = { 1035 /* power state controls amps */ 1036 { 0x01, AC_VERB_SET_EAPD, 1 << 2}, 1037 {} 1038 }; 1039 1040 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = { 1041 { 0x22, 0x785, 0x43 }, 1042 { 0x22, 0x782, 0xe0 }, 1043 { 0x22, 0x795, 0x00 }, 1044 {} 1045 }; 1046 1047 static const struct hda_verb stac92hd71bxx_core_init[] = { 1048 /* set master volume and direct control */ 1049 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1050 {} 1051 }; 1052 1053 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = { 1054 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */ 1055 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1056 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1057 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, 1058 {} 1059 }; 1060 1061 static const struct hda_verb stac925x_core_init[] = { 1062 /* set dac0mux for dac converter */ 1063 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00}, 1064 /* mute the master volume */ 1065 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE }, 1066 {} 1067 }; 1068 1069 static const struct hda_verb stac922x_core_init[] = { 1070 /* set master volume and direct control */ 1071 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1072 {} 1073 }; 1074 1075 static const struct hda_verb d965_core_init[] = { 1076 /* unmute node 0x1b */ 1077 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1078 /* select node 0x03 as DAC */ 1079 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1080 {} 1081 }; 1082 1083 static const struct hda_verb dell_3st_core_init[] = { 1084 /* don't set delta bit */ 1085 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1086 /* unmute node 0x1b */ 1087 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000}, 1088 /* select node 0x03 as DAC */ 1089 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01}, 1090 {} 1091 }; 1092 1093 static const struct hda_verb stac927x_core_init[] = { 1094 /* set master volume and direct control */ 1095 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1096 /* enable analog pc beep path */ 1097 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1098 {} 1099 }; 1100 1101 static const struct hda_verb stac927x_volknob_core_init[] = { 1102 /* don't set delta bit */ 1103 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f}, 1104 /* enable analog pc beep path */ 1105 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1106 {} 1107 }; 1108 1109 static const struct hda_verb stac9205_core_init[] = { 1110 /* set master volume and direct control */ 1111 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff}, 1112 /* enable analog pc beep path */ 1113 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5}, 1114 {} 1115 }; 1116 1117 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback = 1118 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3); 1119 1120 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback = 1121 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4); 1122 1123 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback = 1124 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5); 1125 1126 static const struct snd_kcontrol_new stac92hd71bxx_loopback = 1127 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2); 1128 1129 static const struct snd_kcontrol_new stac9205_loopback = 1130 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1); 1131 1132 static const struct snd_kcontrol_new stac927x_loopback = 1133 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1); 1134 1135 static const struct hda_pintbl ref9200_pin_configs[] = { 1136 { 0x08, 0x01c47010 }, 1137 { 0x09, 0x01447010 }, 1138 { 0x0d, 0x0221401f }, 1139 { 0x0e, 0x01114010 }, 1140 { 0x0f, 0x02a19020 }, 1141 { 0x10, 0x01a19021 }, 1142 { 0x11, 0x90100140 }, 1143 { 0x12, 0x01813122 }, 1144 {} 1145 }; 1146 1147 static const struct hda_pintbl gateway9200_m4_pin_configs[] = { 1148 { 0x08, 0x400000fe }, 1149 { 0x09, 0x404500f4 }, 1150 { 0x0d, 0x400100f0 }, 1151 { 0x0e, 0x90110010 }, 1152 { 0x0f, 0x400100f1 }, 1153 { 0x10, 0x02a1902e }, 1154 { 0x11, 0x500000f2 }, 1155 { 0x12, 0x500000f3 }, 1156 {} 1157 }; 1158 1159 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = { 1160 { 0x08, 0x400000fe }, 1161 { 0x09, 0x404500f4 }, 1162 { 0x0d, 0x400100f0 }, 1163 { 0x0e, 0x90110010 }, 1164 { 0x0f, 0x400100f1 }, 1165 { 0x10, 0x02a1902e }, 1166 { 0x11, 0x500000f2 }, 1167 { 0x12, 0x500000f3 }, 1168 {} 1169 }; 1170 1171 /* 1172 STAC 9200 pin configs for 1173 102801A8 1174 102801DE 1175 102801E8 1176 */ 1177 static const struct hda_pintbl dell9200_d21_pin_configs[] = { 1178 { 0x08, 0x400001f0 }, 1179 { 0x09, 0x400001f1 }, 1180 { 0x0d, 0x02214030 }, 1181 { 0x0e, 0x01014010 }, 1182 { 0x0f, 0x02a19020 }, 1183 { 0x10, 0x01a19021 }, 1184 { 0x11, 0x90100140 }, 1185 { 0x12, 0x01813122 }, 1186 {} 1187 }; 1188 1189 /* 1190 STAC 9200 pin configs for 1191 102801C0 1192 102801C1 1193 */ 1194 static const struct hda_pintbl dell9200_d22_pin_configs[] = { 1195 { 0x08, 0x400001f0 }, 1196 { 0x09, 0x400001f1 }, 1197 { 0x0d, 0x0221401f }, 1198 { 0x0e, 0x01014010 }, 1199 { 0x0f, 0x01813020 }, 1200 { 0x10, 0x02a19021 }, 1201 { 0x11, 0x90100140 }, 1202 { 0x12, 0x400001f2 }, 1203 {} 1204 }; 1205 1206 /* 1207 STAC 9200 pin configs for 1208 102801C4 (Dell Dimension E310) 1209 102801C5 1210 102801C7 1211 102801D9 1212 102801DA 1213 102801E3 1214 */ 1215 static const struct hda_pintbl dell9200_d23_pin_configs[] = { 1216 { 0x08, 0x400001f0 }, 1217 { 0x09, 0x400001f1 }, 1218 { 0x0d, 0x0221401f }, 1219 { 0x0e, 0x01014010 }, 1220 { 0x0f, 0x01813020 }, 1221 { 0x10, 0x01a19021 }, 1222 { 0x11, 0x90100140 }, 1223 { 0x12, 0x400001f2 }, 1224 {} 1225 }; 1226 1227 1228 /* 1229 STAC 9200-32 pin configs for 1230 102801B5 (Dell Inspiron 630m) 1231 102801D8 (Dell Inspiron 640m) 1232 */ 1233 static const struct hda_pintbl dell9200_m21_pin_configs[] = { 1234 { 0x08, 0x40c003fa }, 1235 { 0x09, 0x03441340 }, 1236 { 0x0d, 0x0321121f }, 1237 { 0x0e, 0x90170310 }, 1238 { 0x0f, 0x408003fb }, 1239 { 0x10, 0x03a11020 }, 1240 { 0x11, 0x401003fc }, 1241 { 0x12, 0x403003fd }, 1242 {} 1243 }; 1244 1245 /* 1246 STAC 9200-32 pin configs for 1247 102801C2 (Dell Latitude D620) 1248 102801C8 1249 102801CC (Dell Latitude D820) 1250 102801D4 1251 102801D6 1252 */ 1253 static const struct hda_pintbl dell9200_m22_pin_configs[] = { 1254 { 0x08, 0x40c003fa }, 1255 { 0x09, 0x0144131f }, 1256 { 0x0d, 0x0321121f }, 1257 { 0x0e, 0x90170310 }, 1258 { 0x0f, 0x90a70321 }, 1259 { 0x10, 0x03a11020 }, 1260 { 0x11, 0x401003fb }, 1261 { 0x12, 0x40f000fc }, 1262 {} 1263 }; 1264 1265 /* 1266 STAC 9200-32 pin configs for 1267 102801CE (Dell XPS M1710) 1268 102801CF (Dell Precision M90) 1269 */ 1270 static const struct hda_pintbl dell9200_m23_pin_configs[] = { 1271 { 0x08, 0x40c003fa }, 1272 { 0x09, 0x01441340 }, 1273 { 0x0d, 0x0421421f }, 1274 { 0x0e, 0x90170310 }, 1275 { 0x0f, 0x408003fb }, 1276 { 0x10, 0x04a1102e }, 1277 { 0x11, 0x90170311 }, 1278 { 0x12, 0x403003fc }, 1279 {} 1280 }; 1281 1282 /* 1283 STAC 9200-32 pin configs for 1284 102801C9 1285 102801CA 1286 102801CB (Dell Latitude 120L) 1287 102801D3 1288 */ 1289 static const struct hda_pintbl dell9200_m24_pin_configs[] = { 1290 { 0x08, 0x40c003fa }, 1291 { 0x09, 0x404003fb }, 1292 { 0x0d, 0x0321121f }, 1293 { 0x0e, 0x90170310 }, 1294 { 0x0f, 0x408003fc }, 1295 { 0x10, 0x03a11020 }, 1296 { 0x11, 0x401003fd }, 1297 { 0x12, 0x403003fe }, 1298 {} 1299 }; 1300 1301 /* 1302 STAC 9200-32 pin configs for 1303 102801BD (Dell Inspiron E1505n) 1304 102801EE 1305 102801EF 1306 */ 1307 static const struct hda_pintbl dell9200_m25_pin_configs[] = { 1308 { 0x08, 0x40c003fa }, 1309 { 0x09, 0x01441340 }, 1310 { 0x0d, 0x0421121f }, 1311 { 0x0e, 0x90170310 }, 1312 { 0x0f, 0x408003fb }, 1313 { 0x10, 0x04a11020 }, 1314 { 0x11, 0x401003fc }, 1315 { 0x12, 0x403003fd }, 1316 {} 1317 }; 1318 1319 /* 1320 STAC 9200-32 pin configs for 1321 102801F5 (Dell Inspiron 1501) 1322 102801F6 1323 */ 1324 static const struct hda_pintbl dell9200_m26_pin_configs[] = { 1325 { 0x08, 0x40c003fa }, 1326 { 0x09, 0x404003fb }, 1327 { 0x0d, 0x0421121f }, 1328 { 0x0e, 0x90170310 }, 1329 { 0x0f, 0x408003fc }, 1330 { 0x10, 0x04a11020 }, 1331 { 0x11, 0x401003fd }, 1332 { 0x12, 0x403003fe }, 1333 {} 1334 }; 1335 1336 /* 1337 STAC 9200-32 1338 102801CD (Dell Inspiron E1705/9400) 1339 */ 1340 static const struct hda_pintbl dell9200_m27_pin_configs[] = { 1341 { 0x08, 0x40c003fa }, 1342 { 0x09, 0x01441340 }, 1343 { 0x0d, 0x0421121f }, 1344 { 0x0e, 0x90170310 }, 1345 { 0x0f, 0x90170310 }, 1346 { 0x10, 0x04a11020 }, 1347 { 0x11, 0x90170310 }, 1348 { 0x12, 0x40f003fc }, 1349 {} 1350 }; 1351 1352 static const struct hda_pintbl oqo9200_pin_configs[] = { 1353 { 0x08, 0x40c000f0 }, 1354 { 0x09, 0x404000f1 }, 1355 { 0x0d, 0x0221121f }, 1356 { 0x0e, 0x02211210 }, 1357 { 0x0f, 0x90170111 }, 1358 { 0x10, 0x90a70120 }, 1359 { 0x11, 0x400000f2 }, 1360 { 0x12, 0x400000f3 }, 1361 {} 1362 }; 1363 1364 1365 static void stac9200_fixup_panasonic(struct hda_codec *codec, 1366 const struct hda_fixup *fix, int action) 1367 { 1368 struct sigmatel_spec *spec = codec->spec; 1369 1370 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 1371 spec->gpio_mask = spec->gpio_dir = 0x09; 1372 spec->gpio_data = 0x00; 1373 /* CF-74 has no headphone detection, and the driver should *NOT* 1374 * do detection and HP/speaker toggle because the hardware does it. 1375 */ 1376 spec->gen.suppress_auto_mute = 1; 1377 } 1378 } 1379 1380 1381 static const struct hda_fixup stac9200_fixups[] = { 1382 [STAC_REF] = { 1383 .type = HDA_FIXUP_PINS, 1384 .v.pins = ref9200_pin_configs, 1385 }, 1386 [STAC_9200_OQO] = { 1387 .type = HDA_FIXUP_PINS, 1388 .v.pins = oqo9200_pin_configs, 1389 .chained = true, 1390 .chain_id = STAC_9200_EAPD_INIT, 1391 }, 1392 [STAC_9200_DELL_D21] = { 1393 .type = HDA_FIXUP_PINS, 1394 .v.pins = dell9200_d21_pin_configs, 1395 }, 1396 [STAC_9200_DELL_D22] = { 1397 .type = HDA_FIXUP_PINS, 1398 .v.pins = dell9200_d22_pin_configs, 1399 }, 1400 [STAC_9200_DELL_D23] = { 1401 .type = HDA_FIXUP_PINS, 1402 .v.pins = dell9200_d23_pin_configs, 1403 }, 1404 [STAC_9200_DELL_M21] = { 1405 .type = HDA_FIXUP_PINS, 1406 .v.pins = dell9200_m21_pin_configs, 1407 }, 1408 [STAC_9200_DELL_M22] = { 1409 .type = HDA_FIXUP_PINS, 1410 .v.pins = dell9200_m22_pin_configs, 1411 }, 1412 [STAC_9200_DELL_M23] = { 1413 .type = HDA_FIXUP_PINS, 1414 .v.pins = dell9200_m23_pin_configs, 1415 }, 1416 [STAC_9200_DELL_M24] = { 1417 .type = HDA_FIXUP_PINS, 1418 .v.pins = dell9200_m24_pin_configs, 1419 }, 1420 [STAC_9200_DELL_M25] = { 1421 .type = HDA_FIXUP_PINS, 1422 .v.pins = dell9200_m25_pin_configs, 1423 }, 1424 [STAC_9200_DELL_M26] = { 1425 .type = HDA_FIXUP_PINS, 1426 .v.pins = dell9200_m26_pin_configs, 1427 }, 1428 [STAC_9200_DELL_M27] = { 1429 .type = HDA_FIXUP_PINS, 1430 .v.pins = dell9200_m27_pin_configs, 1431 }, 1432 [STAC_9200_M4] = { 1433 .type = HDA_FIXUP_PINS, 1434 .v.pins = gateway9200_m4_pin_configs, 1435 .chained = true, 1436 .chain_id = STAC_9200_EAPD_INIT, 1437 }, 1438 [STAC_9200_M4_2] = { 1439 .type = HDA_FIXUP_PINS, 1440 .v.pins = gateway9200_m4_2_pin_configs, 1441 .chained = true, 1442 .chain_id = STAC_9200_EAPD_INIT, 1443 }, 1444 [STAC_9200_PANASONIC] = { 1445 .type = HDA_FIXUP_FUNC, 1446 .v.func = stac9200_fixup_panasonic, 1447 }, 1448 [STAC_9200_EAPD_INIT] = { 1449 .type = HDA_FIXUP_VERBS, 1450 .v.verbs = (const struct hda_verb[]) { 1451 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02}, 1452 {} 1453 }, 1454 }, 1455 }; 1456 1457 static const struct hda_model_fixup stac9200_models[] = { 1458 { .id = STAC_REF, .name = "ref" }, 1459 { .id = STAC_9200_OQO, .name = "oqo" }, 1460 { .id = STAC_9200_DELL_D21, .name = "dell-d21" }, 1461 { .id = STAC_9200_DELL_D22, .name = "dell-d22" }, 1462 { .id = STAC_9200_DELL_D23, .name = "dell-d23" }, 1463 { .id = STAC_9200_DELL_M21, .name = "dell-m21" }, 1464 { .id = STAC_9200_DELL_M22, .name = "dell-m22" }, 1465 { .id = STAC_9200_DELL_M23, .name = "dell-m23" }, 1466 { .id = STAC_9200_DELL_M24, .name = "dell-m24" }, 1467 { .id = STAC_9200_DELL_M25, .name = "dell-m25" }, 1468 { .id = STAC_9200_DELL_M26, .name = "dell-m26" }, 1469 { .id = STAC_9200_DELL_M27, .name = "dell-m27" }, 1470 { .id = STAC_9200_M4, .name = "gateway-m4" }, 1471 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" }, 1472 { .id = STAC_9200_PANASONIC, .name = "panasonic" }, 1473 {} 1474 }; 1475 1476 static const struct snd_pci_quirk stac9200_fixup_tbl[] = { 1477 /* SigmaTel reference board */ 1478 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1479 "DFI LanParty", STAC_REF), 1480 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1481 "DFI LanParty", STAC_REF), 1482 /* Dell laptops have BIOS problem */ 1483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8, 1484 "unknown Dell", STAC_9200_DELL_D21), 1485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5, 1486 "Dell Inspiron 630m", STAC_9200_DELL_M21), 1487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd, 1488 "Dell Inspiron E1505n", STAC_9200_DELL_M25), 1489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0, 1490 "unknown Dell", STAC_9200_DELL_D22), 1491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1, 1492 "unknown Dell", STAC_9200_DELL_D22), 1493 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2, 1494 "Dell Latitude D620", STAC_9200_DELL_M22), 1495 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5, 1496 "unknown Dell", STAC_9200_DELL_D23), 1497 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7, 1498 "unknown Dell", STAC_9200_DELL_D23), 1499 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8, 1500 "unknown Dell", STAC_9200_DELL_M22), 1501 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9, 1502 "unknown Dell", STAC_9200_DELL_M24), 1503 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca, 1504 "unknown Dell", STAC_9200_DELL_M24), 1505 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb, 1506 "Dell Latitude 120L", STAC_9200_DELL_M24), 1507 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc, 1508 "Dell Latitude D820", STAC_9200_DELL_M22), 1509 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd, 1510 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27), 1511 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce, 1512 "Dell XPS M1710", STAC_9200_DELL_M23), 1513 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf, 1514 "Dell Precision M90", STAC_9200_DELL_M23), 1515 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3, 1516 "unknown Dell", STAC_9200_DELL_M22), 1517 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4, 1518 "unknown Dell", STAC_9200_DELL_M22), 1519 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6, 1520 "unknown Dell", STAC_9200_DELL_M22), 1521 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8, 1522 "Dell Inspiron 640m", STAC_9200_DELL_M21), 1523 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9, 1524 "unknown Dell", STAC_9200_DELL_D23), 1525 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da, 1526 "unknown Dell", STAC_9200_DELL_D23), 1527 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de, 1528 "unknown Dell", STAC_9200_DELL_D21), 1529 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3, 1530 "unknown Dell", STAC_9200_DELL_D23), 1531 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8, 1532 "unknown Dell", STAC_9200_DELL_D21), 1533 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee, 1534 "unknown Dell", STAC_9200_DELL_M25), 1535 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef, 1536 "unknown Dell", STAC_9200_DELL_M25), 1537 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5, 1538 "Dell Inspiron 1501", STAC_9200_DELL_M26), 1539 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6, 1540 "unknown Dell", STAC_9200_DELL_M26), 1541 /* Panasonic */ 1542 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC), 1543 /* Gateway machines needs EAPD to be set on resume */ 1544 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4), 1545 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2), 1546 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2), 1547 /* OQO Mobile */ 1548 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO), 1549 {} /* terminator */ 1550 }; 1551 1552 static const struct hda_pintbl ref925x_pin_configs[] = { 1553 { 0x07, 0x40c003f0 }, 1554 { 0x08, 0x424503f2 }, 1555 { 0x0a, 0x01813022 }, 1556 { 0x0b, 0x02a19021 }, 1557 { 0x0c, 0x90a70320 }, 1558 { 0x0d, 0x02214210 }, 1559 { 0x10, 0x01019020 }, 1560 { 0x11, 0x9033032e }, 1561 {} 1562 }; 1563 1564 static const struct hda_pintbl stac925xM1_pin_configs[] = { 1565 { 0x07, 0x40c003f4 }, 1566 { 0x08, 0x424503f2 }, 1567 { 0x0a, 0x400000f3 }, 1568 { 0x0b, 0x02a19020 }, 1569 { 0x0c, 0x40a000f0 }, 1570 { 0x0d, 0x90100210 }, 1571 { 0x10, 0x400003f1 }, 1572 { 0x11, 0x9033032e }, 1573 {} 1574 }; 1575 1576 static const struct hda_pintbl stac925xM1_2_pin_configs[] = { 1577 { 0x07, 0x40c003f4 }, 1578 { 0x08, 0x424503f2 }, 1579 { 0x0a, 0x400000f3 }, 1580 { 0x0b, 0x02a19020 }, 1581 { 0x0c, 0x40a000f0 }, 1582 { 0x0d, 0x90100210 }, 1583 { 0x10, 0x400003f1 }, 1584 { 0x11, 0x9033032e }, 1585 {} 1586 }; 1587 1588 static const struct hda_pintbl stac925xM2_pin_configs[] = { 1589 { 0x07, 0x40c003f4 }, 1590 { 0x08, 0x424503f2 }, 1591 { 0x0a, 0x400000f3 }, 1592 { 0x0b, 0x02a19020 }, 1593 { 0x0c, 0x40a000f0 }, 1594 { 0x0d, 0x90100210 }, 1595 { 0x10, 0x400003f1 }, 1596 { 0x11, 0x9033032e }, 1597 {} 1598 }; 1599 1600 static const struct hda_pintbl stac925xM2_2_pin_configs[] = { 1601 { 0x07, 0x40c003f4 }, 1602 { 0x08, 0x424503f2 }, 1603 { 0x0a, 0x400000f3 }, 1604 { 0x0b, 0x02a19020 }, 1605 { 0x0c, 0x40a000f0 }, 1606 { 0x0d, 0x90100210 }, 1607 { 0x10, 0x400003f1 }, 1608 { 0x11, 0x9033032e }, 1609 {} 1610 }; 1611 1612 static const struct hda_pintbl stac925xM3_pin_configs[] = { 1613 { 0x07, 0x40c003f4 }, 1614 { 0x08, 0x424503f2 }, 1615 { 0x0a, 0x400000f3 }, 1616 { 0x0b, 0x02a19020 }, 1617 { 0x0c, 0x40a000f0 }, 1618 { 0x0d, 0x90100210 }, 1619 { 0x10, 0x400003f1 }, 1620 { 0x11, 0x503303f3 }, 1621 {} 1622 }; 1623 1624 static const struct hda_pintbl stac925xM5_pin_configs[] = { 1625 { 0x07, 0x40c003f4 }, 1626 { 0x08, 0x424503f2 }, 1627 { 0x0a, 0x400000f3 }, 1628 { 0x0b, 0x02a19020 }, 1629 { 0x0c, 0x40a000f0 }, 1630 { 0x0d, 0x90100210 }, 1631 { 0x10, 0x400003f1 }, 1632 { 0x11, 0x9033032e }, 1633 {} 1634 }; 1635 1636 static const struct hda_pintbl stac925xM6_pin_configs[] = { 1637 { 0x07, 0x40c003f4 }, 1638 { 0x08, 0x424503f2 }, 1639 { 0x0a, 0x400000f3 }, 1640 { 0x0b, 0x02a19020 }, 1641 { 0x0c, 0x40a000f0 }, 1642 { 0x0d, 0x90100210 }, 1643 { 0x10, 0x400003f1 }, 1644 { 0x11, 0x90330320 }, 1645 {} 1646 }; 1647 1648 static const struct hda_fixup stac925x_fixups[] = { 1649 [STAC_REF] = { 1650 .type = HDA_FIXUP_PINS, 1651 .v.pins = ref925x_pin_configs, 1652 }, 1653 [STAC_M1] = { 1654 .type = HDA_FIXUP_PINS, 1655 .v.pins = stac925xM1_pin_configs, 1656 }, 1657 [STAC_M1_2] = { 1658 .type = HDA_FIXUP_PINS, 1659 .v.pins = stac925xM1_2_pin_configs, 1660 }, 1661 [STAC_M2] = { 1662 .type = HDA_FIXUP_PINS, 1663 .v.pins = stac925xM2_pin_configs, 1664 }, 1665 [STAC_M2_2] = { 1666 .type = HDA_FIXUP_PINS, 1667 .v.pins = stac925xM2_2_pin_configs, 1668 }, 1669 [STAC_M3] = { 1670 .type = HDA_FIXUP_PINS, 1671 .v.pins = stac925xM3_pin_configs, 1672 }, 1673 [STAC_M5] = { 1674 .type = HDA_FIXUP_PINS, 1675 .v.pins = stac925xM5_pin_configs, 1676 }, 1677 [STAC_M6] = { 1678 .type = HDA_FIXUP_PINS, 1679 .v.pins = stac925xM6_pin_configs, 1680 }, 1681 }; 1682 1683 static const struct hda_model_fixup stac925x_models[] = { 1684 { .id = STAC_REF, .name = "ref" }, 1685 { .id = STAC_M1, .name = "m1" }, 1686 { .id = STAC_M1_2, .name = "m1-2" }, 1687 { .id = STAC_M2, .name = "m2" }, 1688 { .id = STAC_M2_2, .name = "m2-2" }, 1689 { .id = STAC_M3, .name = "m3" }, 1690 { .id = STAC_M5, .name = "m5" }, 1691 { .id = STAC_M6, .name = "m6" }, 1692 {} 1693 }; 1694 1695 static const struct snd_pci_quirk stac925x_fixup_tbl[] = { 1696 /* SigmaTel reference board */ 1697 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF), 1698 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF), 1699 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF), 1700 1701 /* Default table for unknown ID */ 1702 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2), 1703 1704 /* gateway machines are checked via codec ssid */ 1705 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2), 1706 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5), 1707 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1), 1708 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2), 1709 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2), 1710 /* Not sure about the brand name for those */ 1711 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1), 1712 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3), 1713 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6), 1714 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2), 1715 {} /* terminator */ 1716 }; 1717 1718 static const struct hda_pintbl ref92hd73xx_pin_configs[] = { 1719 { 0x0a, 0x02214030 }, 1720 { 0x0b, 0x02a19040 }, 1721 { 0x0c, 0x01a19020 }, 1722 { 0x0d, 0x02214030 }, 1723 { 0x0e, 0x0181302e }, 1724 { 0x0f, 0x01014010 }, 1725 { 0x10, 0x01014020 }, 1726 { 0x11, 0x01014030 }, 1727 { 0x12, 0x02319040 }, 1728 { 0x13, 0x90a000f0 }, 1729 { 0x14, 0x90a000f0 }, 1730 { 0x22, 0x01452050 }, 1731 { 0x23, 0x01452050 }, 1732 {} 1733 }; 1734 1735 static const struct hda_pintbl dell_m6_pin_configs[] = { 1736 { 0x0a, 0x0321101f }, 1737 { 0x0b, 0x4f00000f }, 1738 { 0x0c, 0x4f0000f0 }, 1739 { 0x0d, 0x90170110 }, 1740 { 0x0e, 0x03a11020 }, 1741 { 0x0f, 0x0321101f }, 1742 { 0x10, 0x4f0000f0 }, 1743 { 0x11, 0x4f0000f0 }, 1744 { 0x12, 0x4f0000f0 }, 1745 { 0x13, 0x90a60160 }, 1746 { 0x14, 0x4f0000f0 }, 1747 { 0x22, 0x4f0000f0 }, 1748 { 0x23, 0x4f0000f0 }, 1749 {} 1750 }; 1751 1752 static const struct hda_pintbl alienware_m17x_pin_configs[] = { 1753 { 0x0a, 0x0321101f }, 1754 { 0x0b, 0x0321101f }, 1755 { 0x0c, 0x03a11020 }, 1756 { 0x0d, 0x03014020 }, 1757 { 0x0e, 0x90170110 }, 1758 { 0x0f, 0x4f0000f0 }, 1759 { 0x10, 0x4f0000f0 }, 1760 { 0x11, 0x4f0000f0 }, 1761 { 0x12, 0x4f0000f0 }, 1762 { 0x13, 0x90a60160 }, 1763 { 0x14, 0x4f0000f0 }, 1764 { 0x22, 0x4f0000f0 }, 1765 { 0x23, 0x904601b0 }, 1766 {} 1767 }; 1768 1769 static const struct hda_pintbl intel_dg45id_pin_configs[] = { 1770 { 0x0a, 0x02214230 }, 1771 { 0x0b, 0x02A19240 }, 1772 { 0x0c, 0x01013214 }, 1773 { 0x0d, 0x01014210 }, 1774 { 0x0e, 0x01A19250 }, 1775 { 0x0f, 0x01011212 }, 1776 { 0x10, 0x01016211 }, 1777 {} 1778 }; 1779 1780 static const struct hda_pintbl stac92hd89xx_hp_front_jack_pin_configs[] = { 1781 { 0x0a, 0x02214030 }, 1782 { 0x0b, 0x02A19010 }, 1783 {} 1784 }; 1785 1786 static const struct hda_pintbl stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs[] = { 1787 { 0x0e, 0x400000f0 }, 1788 {} 1789 }; 1790 1791 static void stac92hd73xx_fixup_ref(struct hda_codec *codec, 1792 const struct hda_fixup *fix, int action) 1793 { 1794 struct sigmatel_spec *spec = codec->spec; 1795 1796 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1797 return; 1798 1799 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs); 1800 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 1801 } 1802 1803 static void stac92hd73xx_fixup_dell(struct hda_codec *codec) 1804 { 1805 struct sigmatel_spec *spec = codec->spec; 1806 1807 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs); 1808 spec->eapd_switch = 0; 1809 } 1810 1811 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec, 1812 const struct hda_fixup *fix, int action) 1813 { 1814 struct sigmatel_spec *spec = codec->spec; 1815 1816 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1817 return; 1818 1819 stac92hd73xx_fixup_dell(codec); 1820 snd_hda_add_verbs(codec, dell_eq_core_init); 1821 spec->volknob_init = 1; 1822 } 1823 1824 /* Analog Mics */ 1825 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec, 1826 const struct hda_fixup *fix, int action) 1827 { 1828 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1829 return; 1830 1831 stac92hd73xx_fixup_dell(codec); 1832 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1833 } 1834 1835 /* Digital Mics */ 1836 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec, 1837 const struct hda_fixup *fix, int action) 1838 { 1839 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1840 return; 1841 1842 stac92hd73xx_fixup_dell(codec); 1843 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1844 } 1845 1846 /* Both */ 1847 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec, 1848 const struct hda_fixup *fix, int action) 1849 { 1850 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1851 return; 1852 1853 stac92hd73xx_fixup_dell(codec); 1854 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170); 1855 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160); 1856 } 1857 1858 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec, 1859 const struct hda_fixup *fix, int action) 1860 { 1861 struct sigmatel_spec *spec = codec->spec; 1862 1863 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1864 return; 1865 1866 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs); 1867 spec->eapd_switch = 0; 1868 } 1869 1870 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec, 1871 const struct hda_fixup *fix, int action) 1872 { 1873 if (action == HDA_FIXUP_ACT_PRE_PROBE) 1874 codec->no_jack_detect = 1; 1875 } 1876 1877 static const struct hda_fixup stac92hd73xx_fixups[] = { 1878 [STAC_92HD73XX_REF] = { 1879 .type = HDA_FIXUP_FUNC, 1880 .v.func = stac92hd73xx_fixup_ref, 1881 }, 1882 [STAC_DELL_M6_AMIC] = { 1883 .type = HDA_FIXUP_FUNC, 1884 .v.func = stac92hd73xx_fixup_dell_m6_amic, 1885 }, 1886 [STAC_DELL_M6_DMIC] = { 1887 .type = HDA_FIXUP_FUNC, 1888 .v.func = stac92hd73xx_fixup_dell_m6_dmic, 1889 }, 1890 [STAC_DELL_M6_BOTH] = { 1891 .type = HDA_FIXUP_FUNC, 1892 .v.func = stac92hd73xx_fixup_dell_m6_both, 1893 }, 1894 [STAC_DELL_EQ] = { 1895 .type = HDA_FIXUP_FUNC, 1896 .v.func = stac92hd73xx_fixup_dell_eq, 1897 }, 1898 [STAC_ALIENWARE_M17X] = { 1899 .type = HDA_FIXUP_FUNC, 1900 .v.func = stac92hd73xx_fixup_alienware_m17x, 1901 }, 1902 [STAC_92HD73XX_INTEL] = { 1903 .type = HDA_FIXUP_PINS, 1904 .v.pins = intel_dg45id_pin_configs, 1905 }, 1906 [STAC_92HD73XX_NO_JD] = { 1907 .type = HDA_FIXUP_FUNC, 1908 .v.func = stac92hd73xx_fixup_no_jd, 1909 }, 1910 [STAC_92HD89XX_HP_FRONT_JACK] = { 1911 .type = HDA_FIXUP_PINS, 1912 .v.pins = stac92hd89xx_hp_front_jack_pin_configs, 1913 }, 1914 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = { 1915 .type = HDA_FIXUP_PINS, 1916 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, 1917 }, 1918 [STAC_92HD73XX_ASUS_MOBO] = { 1919 .type = HDA_FIXUP_PINS, 1920 .v.pins = (const struct hda_pintbl[]) { 1921 /* enable 5.1 and SPDIF out */ 1922 { 0x0c, 0x01014411 }, 1923 { 0x0d, 0x01014410 }, 1924 { 0x0e, 0x01014412 }, 1925 { 0x22, 0x014b1180 }, 1926 { } 1927 } 1928 }, 1929 }; 1930 1931 static const struct hda_model_fixup stac92hd73xx_models[] = { 1932 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" }, 1933 { .id = STAC_92HD73XX_REF, .name = "ref" }, 1934 { .id = STAC_92HD73XX_INTEL, .name = "intel" }, 1935 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" }, 1936 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" }, 1937 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1938 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1939 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1940 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" }, 1941 {} 1942 }; 1943 1944 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = { 1945 /* SigmaTel reference board */ 1946 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 1947 "DFI LanParty", STAC_92HD73XX_REF), 1948 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 1949 "DFI LanParty", STAC_92HD73XX_REF), 1950 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002, 1951 "Intel DG45ID", STAC_92HD73XX_INTEL), 1952 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003, 1953 "Intel DG45FC", STAC_92HD73XX_INTEL), 1954 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254, 1955 "Dell Studio 1535", STAC_DELL_M6_DMIC), 1956 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255, 1957 "unknown Dell", STAC_DELL_M6_DMIC), 1958 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256, 1959 "unknown Dell", STAC_DELL_M6_BOTH), 1960 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257, 1961 "unknown Dell", STAC_DELL_M6_BOTH), 1962 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e, 1963 "unknown Dell", STAC_DELL_M6_AMIC), 1964 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f, 1965 "unknown Dell", STAC_DELL_M6_AMIC), 1966 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271, 1967 "unknown Dell", STAC_DELL_M6_DMIC), 1968 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272, 1969 "unknown Dell", STAC_DELL_M6_DMIC), 1970 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f, 1971 "Dell Studio 1537", STAC_DELL_M6_DMIC), 1972 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0, 1973 "Dell Studio 17", STAC_DELL_M6_DMIC), 1974 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be, 1975 "Dell Studio 1555", STAC_DELL_M6_DMIC), 1976 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd, 1977 "Dell Studio 1557", STAC_DELL_M6_DMIC), 1978 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe, 1979 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC), 1980 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413, 1981 "Dell Studio 1558", STAC_DELL_M6_DMIC), 1982 /* codec SSID matching */ 1983 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1, 1984 "Alienware M17x", STAC_ALIENWARE_M17X), 1985 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a, 1986 "Alienware M17x", STAC_ALIENWARE_M17X), 1987 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490, 1988 "Alienware M17x R3", STAC_DELL_EQ), 1989 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1927, 1990 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK), 1991 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 1992 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 1993 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10", 1994 STAC_92HD73XX_ASUS_MOBO), 1995 {} /* terminator */ 1996 }; 1997 1998 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = { 1999 { 0x0a, 0x02214030 }, 2000 { 0x0b, 0x02211010 }, 2001 { 0x0c, 0x02a19020 }, 2002 { 0x0d, 0x02170130 }, 2003 { 0x0e, 0x01014050 }, 2004 { 0x0f, 0x01819040 }, 2005 { 0x10, 0x01014020 }, 2006 { 0x11, 0x90a3014e }, 2007 { 0x1f, 0x01451160 }, 2008 { 0x20, 0x98560170 }, 2009 {} 2010 }; 2011 2012 static const struct hda_pintbl dell_s14_pin_configs[] = { 2013 { 0x0a, 0x0221403f }, 2014 { 0x0b, 0x0221101f }, 2015 { 0x0c, 0x02a19020 }, 2016 { 0x0d, 0x90170110 }, 2017 { 0x0e, 0x40f000f0 }, 2018 { 0x0f, 0x40f000f0 }, 2019 { 0x10, 0x40f000f0 }, 2020 { 0x11, 0x90a60160 }, 2021 { 0x1f, 0x40f000f0 }, 2022 { 0x20, 0x40f000f0 }, 2023 {} 2024 }; 2025 2026 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = { 2027 { 0x0a, 0x02a11020 }, 2028 { 0x0b, 0x0221101f }, 2029 { 0x0c, 0x400000f0 }, 2030 { 0x0d, 0x90170110 }, 2031 { 0x0e, 0x400000f1 }, 2032 { 0x0f, 0x400000f2 }, 2033 { 0x10, 0x400000f3 }, 2034 { 0x11, 0x90a60160 }, 2035 { 0x1f, 0x400000f4 }, 2036 { 0x20, 0x400000f5 }, 2037 {} 2038 }; 2039 2040 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = { 2041 { 0x0a, 0x03a12050 }, 2042 { 0x0b, 0x0321201f }, 2043 { 0x0c, 0x40f000f0 }, 2044 { 0x0d, 0x90170110 }, 2045 { 0x0e, 0x40f000f0 }, 2046 { 0x0f, 0x40f000f0 }, 2047 { 0x10, 0x90170110 }, 2048 { 0x11, 0xd5a30140 }, 2049 { 0x1f, 0x40f000f0 }, 2050 { 0x20, 0x40f000f0 }, 2051 {} 2052 }; 2053 2054 static const struct hda_pintbl hp_zephyr_pin_configs[] = { 2055 { 0x0a, 0x01813050 }, 2056 { 0x0b, 0x0421201f }, 2057 { 0x0c, 0x04a1205e }, 2058 { 0x0d, 0x96130310 }, 2059 { 0x0e, 0x96130310 }, 2060 { 0x0f, 0x0101401f }, 2061 { 0x10, 0x1111611f }, 2062 { 0x11, 0xd5a30130 }, 2063 {} 2064 }; 2065 2066 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = { 2067 { 0x0a, 0x40f000f0 }, 2068 { 0x0b, 0x0221101f }, 2069 { 0x0c, 0x02a11020 }, 2070 { 0x0d, 0x92170110 }, 2071 { 0x0e, 0x40f000f0 }, 2072 { 0x0f, 0x92170110 }, 2073 { 0x10, 0x40f000f0 }, 2074 { 0x11, 0xd5a30130 }, 2075 { 0x1f, 0x40f000f0 }, 2076 { 0x20, 0x40f000f0 }, 2077 {} 2078 }; 2079 2080 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec, 2081 const struct hda_fixup *fix, int action) 2082 { 2083 struct sigmatel_spec *spec = codec->spec; 2084 2085 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2086 return; 2087 2088 if (hp_bnb2011_with_dock(codec)) { 2089 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f); 2090 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e); 2091 } 2092 2093 if (find_mute_led_cfg(codec, spec->default_polarity)) 2094 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 2095 spec->gpio_led, 2096 spec->gpio_led_polarity); 2097 2098 /* allow auto-switching of dock line-in */ 2099 spec->gen.line_in_auto_switch = true; 2100 } 2101 2102 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec, 2103 const struct hda_fixup *fix, int action) 2104 { 2105 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2106 return; 2107 2108 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs); 2109 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init); 2110 } 2111 2112 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec, 2113 const struct hda_fixup *fix, int action) 2114 { 2115 struct sigmatel_spec *spec = codec->spec; 2116 2117 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2118 spec->default_polarity = 0; 2119 } 2120 2121 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec, 2122 const struct hda_fixup *fix, int action) 2123 { 2124 struct sigmatel_spec *spec = codec->spec; 2125 2126 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2127 spec->default_polarity = 1; 2128 } 2129 2130 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec, 2131 const struct hda_fixup *fix, int action) 2132 { 2133 struct sigmatel_spec *spec = codec->spec; 2134 2135 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2136 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */ 2137 #ifdef CONFIG_PM 2138 /* resetting controller clears GPIO, so we need to keep on */ 2139 codec->core.power_caps &= ~AC_PWRST_CLKSTOP; 2140 #endif 2141 } 2142 } 2143 2144 static void stac92hd83xxx_fixup_hp_led_gpio10(struct hda_codec *codec, 2145 const struct hda_fixup *fix, int action) 2146 { 2147 struct sigmatel_spec *spec = codec->spec; 2148 2149 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 2150 spec->gpio_led = 0x10; /* GPIO4 */ 2151 spec->default_polarity = 0; 2152 } 2153 } 2154 2155 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec, 2156 const struct hda_fixup *fix, int action) 2157 { 2158 struct sigmatel_spec *spec = codec->spec; 2159 2160 if (action == HDA_FIXUP_ACT_PRE_PROBE) 2161 spec->headset_jack = 1; 2162 } 2163 2164 static void stac92hd83xxx_fixup_gpio10_eapd(struct hda_codec *codec, 2165 const struct hda_fixup *fix, 2166 int action) 2167 { 2168 struct sigmatel_spec *spec = codec->spec; 2169 2170 if (action != HDA_FIXUP_ACT_PRE_PROBE) 2171 return; 2172 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 2173 spec->gpio_data = 0x10; 2174 spec->eapd_switch = 0; 2175 } 2176 2177 static const struct hda_verb hp_bnb13_eq_verbs[] = { 2178 /* 44.1KHz base */ 2179 { 0x22, 0x7A6, 0x3E }, 2180 { 0x22, 0x7A7, 0x68 }, 2181 { 0x22, 0x7A8, 0x17 }, 2182 { 0x22, 0x7A9, 0x3E }, 2183 { 0x22, 0x7AA, 0x68 }, 2184 { 0x22, 0x7AB, 0x17 }, 2185 { 0x22, 0x7AC, 0x00 }, 2186 { 0x22, 0x7AD, 0x80 }, 2187 { 0x22, 0x7A6, 0x83 }, 2188 { 0x22, 0x7A7, 0x2F }, 2189 { 0x22, 0x7A8, 0xD1 }, 2190 { 0x22, 0x7A9, 0x83 }, 2191 { 0x22, 0x7AA, 0x2F }, 2192 { 0x22, 0x7AB, 0xD1 }, 2193 { 0x22, 0x7AC, 0x01 }, 2194 { 0x22, 0x7AD, 0x80 }, 2195 { 0x22, 0x7A6, 0x3E }, 2196 { 0x22, 0x7A7, 0x68 }, 2197 { 0x22, 0x7A8, 0x17 }, 2198 { 0x22, 0x7A9, 0x3E }, 2199 { 0x22, 0x7AA, 0x68 }, 2200 { 0x22, 0x7AB, 0x17 }, 2201 { 0x22, 0x7AC, 0x02 }, 2202 { 0x22, 0x7AD, 0x80 }, 2203 { 0x22, 0x7A6, 0x7C }, 2204 { 0x22, 0x7A7, 0xC6 }, 2205 { 0x22, 0x7A8, 0x0C }, 2206 { 0x22, 0x7A9, 0x7C }, 2207 { 0x22, 0x7AA, 0xC6 }, 2208 { 0x22, 0x7AB, 0x0C }, 2209 { 0x22, 0x7AC, 0x03 }, 2210 { 0x22, 0x7AD, 0x80 }, 2211 { 0x22, 0x7A6, 0xC3 }, 2212 { 0x22, 0x7A7, 0x25 }, 2213 { 0x22, 0x7A8, 0xAF }, 2214 { 0x22, 0x7A9, 0xC3 }, 2215 { 0x22, 0x7AA, 0x25 }, 2216 { 0x22, 0x7AB, 0xAF }, 2217 { 0x22, 0x7AC, 0x04 }, 2218 { 0x22, 0x7AD, 0x80 }, 2219 { 0x22, 0x7A6, 0x3E }, 2220 { 0x22, 0x7A7, 0x85 }, 2221 { 0x22, 0x7A8, 0x73 }, 2222 { 0x22, 0x7A9, 0x3E }, 2223 { 0x22, 0x7AA, 0x85 }, 2224 { 0x22, 0x7AB, 0x73 }, 2225 { 0x22, 0x7AC, 0x05 }, 2226 { 0x22, 0x7AD, 0x80 }, 2227 { 0x22, 0x7A6, 0x85 }, 2228 { 0x22, 0x7A7, 0x39 }, 2229 { 0x22, 0x7A8, 0xC7 }, 2230 { 0x22, 0x7A9, 0x85 }, 2231 { 0x22, 0x7AA, 0x39 }, 2232 { 0x22, 0x7AB, 0xC7 }, 2233 { 0x22, 0x7AC, 0x06 }, 2234 { 0x22, 0x7AD, 0x80 }, 2235 { 0x22, 0x7A6, 0x3C }, 2236 { 0x22, 0x7A7, 0x90 }, 2237 { 0x22, 0x7A8, 0xB0 }, 2238 { 0x22, 0x7A9, 0x3C }, 2239 { 0x22, 0x7AA, 0x90 }, 2240 { 0x22, 0x7AB, 0xB0 }, 2241 { 0x22, 0x7AC, 0x07 }, 2242 { 0x22, 0x7AD, 0x80 }, 2243 { 0x22, 0x7A6, 0x7A }, 2244 { 0x22, 0x7A7, 0xC6 }, 2245 { 0x22, 0x7A8, 0x39 }, 2246 { 0x22, 0x7A9, 0x7A }, 2247 { 0x22, 0x7AA, 0xC6 }, 2248 { 0x22, 0x7AB, 0x39 }, 2249 { 0x22, 0x7AC, 0x08 }, 2250 { 0x22, 0x7AD, 0x80 }, 2251 { 0x22, 0x7A6, 0xC4 }, 2252 { 0x22, 0x7A7, 0xE9 }, 2253 { 0x22, 0x7A8, 0xDC }, 2254 { 0x22, 0x7A9, 0xC4 }, 2255 { 0x22, 0x7AA, 0xE9 }, 2256 { 0x22, 0x7AB, 0xDC }, 2257 { 0x22, 0x7AC, 0x09 }, 2258 { 0x22, 0x7AD, 0x80 }, 2259 { 0x22, 0x7A6, 0x3D }, 2260 { 0x22, 0x7A7, 0xE1 }, 2261 { 0x22, 0x7A8, 0x0D }, 2262 { 0x22, 0x7A9, 0x3D }, 2263 { 0x22, 0x7AA, 0xE1 }, 2264 { 0x22, 0x7AB, 0x0D }, 2265 { 0x22, 0x7AC, 0x0A }, 2266 { 0x22, 0x7AD, 0x80 }, 2267 { 0x22, 0x7A6, 0x89 }, 2268 { 0x22, 0x7A7, 0xB6 }, 2269 { 0x22, 0x7A8, 0xEB }, 2270 { 0x22, 0x7A9, 0x89 }, 2271 { 0x22, 0x7AA, 0xB6 }, 2272 { 0x22, 0x7AB, 0xEB }, 2273 { 0x22, 0x7AC, 0x0B }, 2274 { 0x22, 0x7AD, 0x80 }, 2275 { 0x22, 0x7A6, 0x39 }, 2276 { 0x22, 0x7A7, 0x9D }, 2277 { 0x22, 0x7A8, 0xFE }, 2278 { 0x22, 0x7A9, 0x39 }, 2279 { 0x22, 0x7AA, 0x9D }, 2280 { 0x22, 0x7AB, 0xFE }, 2281 { 0x22, 0x7AC, 0x0C }, 2282 { 0x22, 0x7AD, 0x80 }, 2283 { 0x22, 0x7A6, 0x76 }, 2284 { 0x22, 0x7A7, 0x49 }, 2285 { 0x22, 0x7A8, 0x15 }, 2286 { 0x22, 0x7A9, 0x76 }, 2287 { 0x22, 0x7AA, 0x49 }, 2288 { 0x22, 0x7AB, 0x15 }, 2289 { 0x22, 0x7AC, 0x0D }, 2290 { 0x22, 0x7AD, 0x80 }, 2291 { 0x22, 0x7A6, 0xC8 }, 2292 { 0x22, 0x7A7, 0x80 }, 2293 { 0x22, 0x7A8, 0xF5 }, 2294 { 0x22, 0x7A9, 0xC8 }, 2295 { 0x22, 0x7AA, 0x80 }, 2296 { 0x22, 0x7AB, 0xF5 }, 2297 { 0x22, 0x7AC, 0x0E }, 2298 { 0x22, 0x7AD, 0x80 }, 2299 { 0x22, 0x7A6, 0x40 }, 2300 { 0x22, 0x7A7, 0x00 }, 2301 { 0x22, 0x7A8, 0x00 }, 2302 { 0x22, 0x7A9, 0x40 }, 2303 { 0x22, 0x7AA, 0x00 }, 2304 { 0x22, 0x7AB, 0x00 }, 2305 { 0x22, 0x7AC, 0x0F }, 2306 { 0x22, 0x7AD, 0x80 }, 2307 { 0x22, 0x7A6, 0x90 }, 2308 { 0x22, 0x7A7, 0x68 }, 2309 { 0x22, 0x7A8, 0xF1 }, 2310 { 0x22, 0x7A9, 0x90 }, 2311 { 0x22, 0x7AA, 0x68 }, 2312 { 0x22, 0x7AB, 0xF1 }, 2313 { 0x22, 0x7AC, 0x10 }, 2314 { 0x22, 0x7AD, 0x80 }, 2315 { 0x22, 0x7A6, 0x34 }, 2316 { 0x22, 0x7A7, 0x47 }, 2317 { 0x22, 0x7A8, 0x6C }, 2318 { 0x22, 0x7A9, 0x34 }, 2319 { 0x22, 0x7AA, 0x47 }, 2320 { 0x22, 0x7AB, 0x6C }, 2321 { 0x22, 0x7AC, 0x11 }, 2322 { 0x22, 0x7AD, 0x80 }, 2323 { 0x22, 0x7A6, 0x6F }, 2324 { 0x22, 0x7A7, 0x97 }, 2325 { 0x22, 0x7A8, 0x0F }, 2326 { 0x22, 0x7A9, 0x6F }, 2327 { 0x22, 0x7AA, 0x97 }, 2328 { 0x22, 0x7AB, 0x0F }, 2329 { 0x22, 0x7AC, 0x12 }, 2330 { 0x22, 0x7AD, 0x80 }, 2331 { 0x22, 0x7A6, 0xCB }, 2332 { 0x22, 0x7A7, 0xB8 }, 2333 { 0x22, 0x7A8, 0x94 }, 2334 { 0x22, 0x7A9, 0xCB }, 2335 { 0x22, 0x7AA, 0xB8 }, 2336 { 0x22, 0x7AB, 0x94 }, 2337 { 0x22, 0x7AC, 0x13 }, 2338 { 0x22, 0x7AD, 0x80 }, 2339 { 0x22, 0x7A6, 0x40 }, 2340 { 0x22, 0x7A7, 0x00 }, 2341 { 0x22, 0x7A8, 0x00 }, 2342 { 0x22, 0x7A9, 0x40 }, 2343 { 0x22, 0x7AA, 0x00 }, 2344 { 0x22, 0x7AB, 0x00 }, 2345 { 0x22, 0x7AC, 0x14 }, 2346 { 0x22, 0x7AD, 0x80 }, 2347 { 0x22, 0x7A6, 0x95 }, 2348 { 0x22, 0x7A7, 0x76 }, 2349 { 0x22, 0x7A8, 0x5B }, 2350 { 0x22, 0x7A9, 0x95 }, 2351 { 0x22, 0x7AA, 0x76 }, 2352 { 0x22, 0x7AB, 0x5B }, 2353 { 0x22, 0x7AC, 0x15 }, 2354 { 0x22, 0x7AD, 0x80 }, 2355 { 0x22, 0x7A6, 0x31 }, 2356 { 0x22, 0x7A7, 0xAC }, 2357 { 0x22, 0x7A8, 0x31 }, 2358 { 0x22, 0x7A9, 0x31 }, 2359 { 0x22, 0x7AA, 0xAC }, 2360 { 0x22, 0x7AB, 0x31 }, 2361 { 0x22, 0x7AC, 0x16 }, 2362 { 0x22, 0x7AD, 0x80 }, 2363 { 0x22, 0x7A6, 0x6A }, 2364 { 0x22, 0x7A7, 0x89 }, 2365 { 0x22, 0x7A8, 0xA5 }, 2366 { 0x22, 0x7A9, 0x6A }, 2367 { 0x22, 0x7AA, 0x89 }, 2368 { 0x22, 0x7AB, 0xA5 }, 2369 { 0x22, 0x7AC, 0x17 }, 2370 { 0x22, 0x7AD, 0x80 }, 2371 { 0x22, 0x7A6, 0xCE }, 2372 { 0x22, 0x7A7, 0x53 }, 2373 { 0x22, 0x7A8, 0xCF }, 2374 { 0x22, 0x7A9, 0xCE }, 2375 { 0x22, 0x7AA, 0x53 }, 2376 { 0x22, 0x7AB, 0xCF }, 2377 { 0x22, 0x7AC, 0x18 }, 2378 { 0x22, 0x7AD, 0x80 }, 2379 { 0x22, 0x7A6, 0x40 }, 2380 { 0x22, 0x7A7, 0x00 }, 2381 { 0x22, 0x7A8, 0x00 }, 2382 { 0x22, 0x7A9, 0x40 }, 2383 { 0x22, 0x7AA, 0x00 }, 2384 { 0x22, 0x7AB, 0x00 }, 2385 { 0x22, 0x7AC, 0x19 }, 2386 { 0x22, 0x7AD, 0x80 }, 2387 /* 48KHz base */ 2388 { 0x22, 0x7A6, 0x3E }, 2389 { 0x22, 0x7A7, 0x88 }, 2390 { 0x22, 0x7A8, 0xDC }, 2391 { 0x22, 0x7A9, 0x3E }, 2392 { 0x22, 0x7AA, 0x88 }, 2393 { 0x22, 0x7AB, 0xDC }, 2394 { 0x22, 0x7AC, 0x1A }, 2395 { 0x22, 0x7AD, 0x80 }, 2396 { 0x22, 0x7A6, 0x82 }, 2397 { 0x22, 0x7A7, 0xEE }, 2398 { 0x22, 0x7A8, 0x46 }, 2399 { 0x22, 0x7A9, 0x82 }, 2400 { 0x22, 0x7AA, 0xEE }, 2401 { 0x22, 0x7AB, 0x46 }, 2402 { 0x22, 0x7AC, 0x1B }, 2403 { 0x22, 0x7AD, 0x80 }, 2404 { 0x22, 0x7A6, 0x3E }, 2405 { 0x22, 0x7A7, 0x88 }, 2406 { 0x22, 0x7A8, 0xDC }, 2407 { 0x22, 0x7A9, 0x3E }, 2408 { 0x22, 0x7AA, 0x88 }, 2409 { 0x22, 0x7AB, 0xDC }, 2410 { 0x22, 0x7AC, 0x1C }, 2411 { 0x22, 0x7AD, 0x80 }, 2412 { 0x22, 0x7A6, 0x7D }, 2413 { 0x22, 0x7A7, 0x09 }, 2414 { 0x22, 0x7A8, 0x28 }, 2415 { 0x22, 0x7A9, 0x7D }, 2416 { 0x22, 0x7AA, 0x09 }, 2417 { 0x22, 0x7AB, 0x28 }, 2418 { 0x22, 0x7AC, 0x1D }, 2419 { 0x22, 0x7AD, 0x80 }, 2420 { 0x22, 0x7A6, 0xC2 }, 2421 { 0x22, 0x7A7, 0xE5 }, 2422 { 0x22, 0x7A8, 0xB4 }, 2423 { 0x22, 0x7A9, 0xC2 }, 2424 { 0x22, 0x7AA, 0xE5 }, 2425 { 0x22, 0x7AB, 0xB4 }, 2426 { 0x22, 0x7AC, 0x1E }, 2427 { 0x22, 0x7AD, 0x80 }, 2428 { 0x22, 0x7A6, 0x3E }, 2429 { 0x22, 0x7A7, 0xA3 }, 2430 { 0x22, 0x7A8, 0x1F }, 2431 { 0x22, 0x7A9, 0x3E }, 2432 { 0x22, 0x7AA, 0xA3 }, 2433 { 0x22, 0x7AB, 0x1F }, 2434 { 0x22, 0x7AC, 0x1F }, 2435 { 0x22, 0x7AD, 0x80 }, 2436 { 0x22, 0x7A6, 0x84 }, 2437 { 0x22, 0x7A7, 0xCA }, 2438 { 0x22, 0x7A8, 0xF1 }, 2439 { 0x22, 0x7A9, 0x84 }, 2440 { 0x22, 0x7AA, 0xCA }, 2441 { 0x22, 0x7AB, 0xF1 }, 2442 { 0x22, 0x7AC, 0x20 }, 2443 { 0x22, 0x7AD, 0x80 }, 2444 { 0x22, 0x7A6, 0x3C }, 2445 { 0x22, 0x7A7, 0xD5 }, 2446 { 0x22, 0x7A8, 0x9C }, 2447 { 0x22, 0x7A9, 0x3C }, 2448 { 0x22, 0x7AA, 0xD5 }, 2449 { 0x22, 0x7AB, 0x9C }, 2450 { 0x22, 0x7AC, 0x21 }, 2451 { 0x22, 0x7AD, 0x80 }, 2452 { 0x22, 0x7A6, 0x7B }, 2453 { 0x22, 0x7A7, 0x35 }, 2454 { 0x22, 0x7A8, 0x0F }, 2455 { 0x22, 0x7A9, 0x7B }, 2456 { 0x22, 0x7AA, 0x35 }, 2457 { 0x22, 0x7AB, 0x0F }, 2458 { 0x22, 0x7AC, 0x22 }, 2459 { 0x22, 0x7AD, 0x80 }, 2460 { 0x22, 0x7A6, 0xC4 }, 2461 { 0x22, 0x7A7, 0x87 }, 2462 { 0x22, 0x7A8, 0x45 }, 2463 { 0x22, 0x7A9, 0xC4 }, 2464 { 0x22, 0x7AA, 0x87 }, 2465 { 0x22, 0x7AB, 0x45 }, 2466 { 0x22, 0x7AC, 0x23 }, 2467 { 0x22, 0x7AD, 0x80 }, 2468 { 0x22, 0x7A6, 0x3E }, 2469 { 0x22, 0x7A7, 0x0A }, 2470 { 0x22, 0x7A8, 0x78 }, 2471 { 0x22, 0x7A9, 0x3E }, 2472 { 0x22, 0x7AA, 0x0A }, 2473 { 0x22, 0x7AB, 0x78 }, 2474 { 0x22, 0x7AC, 0x24 }, 2475 { 0x22, 0x7AD, 0x80 }, 2476 { 0x22, 0x7A6, 0x88 }, 2477 { 0x22, 0x7A7, 0xE2 }, 2478 { 0x22, 0x7A8, 0x05 }, 2479 { 0x22, 0x7A9, 0x88 }, 2480 { 0x22, 0x7AA, 0xE2 }, 2481 { 0x22, 0x7AB, 0x05 }, 2482 { 0x22, 0x7AC, 0x25 }, 2483 { 0x22, 0x7AD, 0x80 }, 2484 { 0x22, 0x7A6, 0x3A }, 2485 { 0x22, 0x7A7, 0x1A }, 2486 { 0x22, 0x7A8, 0xA3 }, 2487 { 0x22, 0x7A9, 0x3A }, 2488 { 0x22, 0x7AA, 0x1A }, 2489 { 0x22, 0x7AB, 0xA3 }, 2490 { 0x22, 0x7AC, 0x26 }, 2491 { 0x22, 0x7AD, 0x80 }, 2492 { 0x22, 0x7A6, 0x77 }, 2493 { 0x22, 0x7A7, 0x1D }, 2494 { 0x22, 0x7A8, 0xFB }, 2495 { 0x22, 0x7A9, 0x77 }, 2496 { 0x22, 0x7AA, 0x1D }, 2497 { 0x22, 0x7AB, 0xFB }, 2498 { 0x22, 0x7AC, 0x27 }, 2499 { 0x22, 0x7AD, 0x80 }, 2500 { 0x22, 0x7A6, 0xC7 }, 2501 { 0x22, 0x7A7, 0xDA }, 2502 { 0x22, 0x7A8, 0xE5 }, 2503 { 0x22, 0x7A9, 0xC7 }, 2504 { 0x22, 0x7AA, 0xDA }, 2505 { 0x22, 0x7AB, 0xE5 }, 2506 { 0x22, 0x7AC, 0x28 }, 2507 { 0x22, 0x7AD, 0x80 }, 2508 { 0x22, 0x7A6, 0x40 }, 2509 { 0x22, 0x7A7, 0x00 }, 2510 { 0x22, 0x7A8, 0x00 }, 2511 { 0x22, 0x7A9, 0x40 }, 2512 { 0x22, 0x7AA, 0x00 }, 2513 { 0x22, 0x7AB, 0x00 }, 2514 { 0x22, 0x7AC, 0x29 }, 2515 { 0x22, 0x7AD, 0x80 }, 2516 { 0x22, 0x7A6, 0x8E }, 2517 { 0x22, 0x7A7, 0xD7 }, 2518 { 0x22, 0x7A8, 0x22 }, 2519 { 0x22, 0x7A9, 0x8E }, 2520 { 0x22, 0x7AA, 0xD7 }, 2521 { 0x22, 0x7AB, 0x22 }, 2522 { 0x22, 0x7AC, 0x2A }, 2523 { 0x22, 0x7AD, 0x80 }, 2524 { 0x22, 0x7A6, 0x35 }, 2525 { 0x22, 0x7A7, 0x26 }, 2526 { 0x22, 0x7A8, 0xC6 }, 2527 { 0x22, 0x7A9, 0x35 }, 2528 { 0x22, 0x7AA, 0x26 }, 2529 { 0x22, 0x7AB, 0xC6 }, 2530 { 0x22, 0x7AC, 0x2B }, 2531 { 0x22, 0x7AD, 0x80 }, 2532 { 0x22, 0x7A6, 0x71 }, 2533 { 0x22, 0x7A7, 0x28 }, 2534 { 0x22, 0x7A8, 0xDE }, 2535 { 0x22, 0x7A9, 0x71 }, 2536 { 0x22, 0x7AA, 0x28 }, 2537 { 0x22, 0x7AB, 0xDE }, 2538 { 0x22, 0x7AC, 0x2C }, 2539 { 0x22, 0x7AD, 0x80 }, 2540 { 0x22, 0x7A6, 0xCA }, 2541 { 0x22, 0x7A7, 0xD9 }, 2542 { 0x22, 0x7A8, 0x3A }, 2543 { 0x22, 0x7A9, 0xCA }, 2544 { 0x22, 0x7AA, 0xD9 }, 2545 { 0x22, 0x7AB, 0x3A }, 2546 { 0x22, 0x7AC, 0x2D }, 2547 { 0x22, 0x7AD, 0x80 }, 2548 { 0x22, 0x7A6, 0x40 }, 2549 { 0x22, 0x7A7, 0x00 }, 2550 { 0x22, 0x7A8, 0x00 }, 2551 { 0x22, 0x7A9, 0x40 }, 2552 { 0x22, 0x7AA, 0x00 }, 2553 { 0x22, 0x7AB, 0x00 }, 2554 { 0x22, 0x7AC, 0x2E }, 2555 { 0x22, 0x7AD, 0x80 }, 2556 { 0x22, 0x7A6, 0x93 }, 2557 { 0x22, 0x7A7, 0x5E }, 2558 { 0x22, 0x7A8, 0xD8 }, 2559 { 0x22, 0x7A9, 0x93 }, 2560 { 0x22, 0x7AA, 0x5E }, 2561 { 0x22, 0x7AB, 0xD8 }, 2562 { 0x22, 0x7AC, 0x2F }, 2563 { 0x22, 0x7AD, 0x80 }, 2564 { 0x22, 0x7A6, 0x32 }, 2565 { 0x22, 0x7A7, 0xB7 }, 2566 { 0x22, 0x7A8, 0xB1 }, 2567 { 0x22, 0x7A9, 0x32 }, 2568 { 0x22, 0x7AA, 0xB7 }, 2569 { 0x22, 0x7AB, 0xB1 }, 2570 { 0x22, 0x7AC, 0x30 }, 2571 { 0x22, 0x7AD, 0x80 }, 2572 { 0x22, 0x7A6, 0x6C }, 2573 { 0x22, 0x7A7, 0xA1 }, 2574 { 0x22, 0x7A8, 0x28 }, 2575 { 0x22, 0x7A9, 0x6C }, 2576 { 0x22, 0x7AA, 0xA1 }, 2577 { 0x22, 0x7AB, 0x28 }, 2578 { 0x22, 0x7AC, 0x31 }, 2579 { 0x22, 0x7AD, 0x80 }, 2580 { 0x22, 0x7A6, 0xCD }, 2581 { 0x22, 0x7A7, 0x48 }, 2582 { 0x22, 0x7A8, 0x4F }, 2583 { 0x22, 0x7A9, 0xCD }, 2584 { 0x22, 0x7AA, 0x48 }, 2585 { 0x22, 0x7AB, 0x4F }, 2586 { 0x22, 0x7AC, 0x32 }, 2587 { 0x22, 0x7AD, 0x80 }, 2588 { 0x22, 0x7A6, 0x40 }, 2589 { 0x22, 0x7A7, 0x00 }, 2590 { 0x22, 0x7A8, 0x00 }, 2591 { 0x22, 0x7A9, 0x40 }, 2592 { 0x22, 0x7AA, 0x00 }, 2593 { 0x22, 0x7AB, 0x00 }, 2594 { 0x22, 0x7AC, 0x33 }, 2595 { 0x22, 0x7AD, 0x80 }, 2596 /* common */ 2597 { 0x22, 0x782, 0xC1 }, 2598 { 0x22, 0x771, 0x2C }, 2599 { 0x22, 0x772, 0x2C }, 2600 { 0x22, 0x788, 0x04 }, 2601 { 0x01, 0x7B0, 0x08 }, 2602 {} 2603 }; 2604 2605 static const struct hda_fixup stac92hd83xxx_fixups[] = { 2606 [STAC_92HD83XXX_REF] = { 2607 .type = HDA_FIXUP_PINS, 2608 .v.pins = ref92hd83xxx_pin_configs, 2609 }, 2610 [STAC_92HD83XXX_PWR_REF] = { 2611 .type = HDA_FIXUP_PINS, 2612 .v.pins = ref92hd83xxx_pin_configs, 2613 }, 2614 [STAC_DELL_S14] = { 2615 .type = HDA_FIXUP_PINS, 2616 .v.pins = dell_s14_pin_configs, 2617 }, 2618 [STAC_DELL_VOSTRO_3500] = { 2619 .type = HDA_FIXUP_PINS, 2620 .v.pins = dell_vostro_3500_pin_configs, 2621 }, 2622 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = { 2623 .type = HDA_FIXUP_PINS, 2624 .v.pins = hp_cNB11_intquad_pin_configs, 2625 .chained = true, 2626 .chain_id = STAC_92HD83XXX_HP, 2627 }, 2628 [STAC_92HD83XXX_HP] = { 2629 .type = HDA_FIXUP_FUNC, 2630 .v.func = stac92hd83xxx_fixup_hp, 2631 }, 2632 [STAC_HP_DV7_4000] = { 2633 .type = HDA_FIXUP_PINS, 2634 .v.pins = hp_dv7_4000_pin_configs, 2635 .chained = true, 2636 .chain_id = STAC_92HD83XXX_HP, 2637 }, 2638 [STAC_HP_ZEPHYR] = { 2639 .type = HDA_FIXUP_FUNC, 2640 .v.func = stac92hd83xxx_fixup_hp_zephyr, 2641 .chained = true, 2642 .chain_id = STAC_92HD83XXX_HP, 2643 }, 2644 [STAC_92HD83XXX_HP_LED] = { 2645 .type = HDA_FIXUP_FUNC, 2646 .v.func = stac92hd83xxx_fixup_hp_led, 2647 .chained = true, 2648 .chain_id = STAC_92HD83XXX_HP, 2649 }, 2650 [STAC_92HD83XXX_HP_INV_LED] = { 2651 .type = HDA_FIXUP_FUNC, 2652 .v.func = stac92hd83xxx_fixup_hp_inv_led, 2653 .chained = true, 2654 .chain_id = STAC_92HD83XXX_HP, 2655 }, 2656 [STAC_92HD83XXX_HP_MIC_LED] = { 2657 .type = HDA_FIXUP_FUNC, 2658 .v.func = stac92hd83xxx_fixup_hp_mic_led, 2659 .chained = true, 2660 .chain_id = STAC_92HD83XXX_HP, 2661 }, 2662 [STAC_HP_LED_GPIO10] = { 2663 .type = HDA_FIXUP_FUNC, 2664 .v.func = stac92hd83xxx_fixup_hp_led_gpio10, 2665 .chained = true, 2666 .chain_id = STAC_92HD83XXX_HP, 2667 }, 2668 [STAC_92HD83XXX_HEADSET_JACK] = { 2669 .type = HDA_FIXUP_FUNC, 2670 .v.func = stac92hd83xxx_fixup_headset_jack, 2671 }, 2672 [STAC_HP_ENVY_BASS] = { 2673 .type = HDA_FIXUP_PINS, 2674 .v.pins = (const struct hda_pintbl[]) { 2675 { 0x0f, 0x90170111 }, 2676 {} 2677 }, 2678 }, 2679 [STAC_HP_BNB13_EQ] = { 2680 .type = HDA_FIXUP_VERBS, 2681 .v.verbs = hp_bnb13_eq_verbs, 2682 .chained = true, 2683 .chain_id = STAC_92HD83XXX_HP_MIC_LED, 2684 }, 2685 [STAC_HP_ENVY_TS_BASS] = { 2686 .type = HDA_FIXUP_PINS, 2687 .v.pins = (const struct hda_pintbl[]) { 2688 { 0x10, 0x92170111 }, 2689 {} 2690 }, 2691 }, 2692 [STAC_92HD83XXX_GPIO10_EAPD] = { 2693 .type = HDA_FIXUP_FUNC, 2694 .v.func = stac92hd83xxx_fixup_gpio10_eapd, 2695 }, 2696 }; 2697 2698 static const struct hda_model_fixup stac92hd83xxx_models[] = { 2699 { .id = STAC_92HD83XXX_REF, .name = "ref" }, 2700 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" }, 2701 { .id = STAC_DELL_S14, .name = "dell-s14" }, 2702 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" }, 2703 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" }, 2704 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" }, 2705 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" }, 2706 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" }, 2707 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" }, 2708 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" }, 2709 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" }, 2710 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" }, 2711 { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" }, 2712 { .id = STAC_HP_ENVY_TS_BASS, .name = "hp-envy-ts-bass" }, 2713 {} 2714 }; 2715 2716 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = { 2717 /* SigmaTel reference board */ 2718 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 2719 "DFI LanParty", STAC_92HD83XXX_REF), 2720 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 2721 "DFI LanParty", STAC_92HD83XXX_REF), 2722 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba, 2723 "unknown Dell", STAC_DELL_S14), 2724 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532, 2725 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK), 2726 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533, 2727 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK), 2728 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534, 2729 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK), 2730 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535, 2731 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK), 2732 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c, 2733 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2734 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d, 2735 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK), 2736 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549, 2737 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK), 2738 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d, 2739 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK), 2740 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584, 2741 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK), 2742 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028, 2743 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500), 2744 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656, 2745 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2746 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657, 2747 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2748 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658, 2749 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2750 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659, 2751 "HP Pavilion dv7", STAC_HP_DV7_4000), 2752 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A, 2753 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2754 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B, 2755 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2756 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888, 2757 "HP Envy Spectre", STAC_HP_ENVY_BASS), 2758 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1899, 2759 "HP Folio 13", STAC_HP_LED_GPIO10), 2760 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df, 2761 "HP Folio", STAC_HP_BNB13_EQ), 2762 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8, 2763 "HP bNB13", STAC_HP_BNB13_EQ), 2764 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909, 2765 "HP bNB13", STAC_HP_BNB13_EQ), 2766 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A, 2767 "HP bNB13", STAC_HP_BNB13_EQ), 2768 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190e, 2769 "HP ENVY TS", STAC_HP_ENVY_TS_BASS), 2770 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940, 2771 "HP bNB13", STAC_HP_BNB13_EQ), 2772 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941, 2773 "HP bNB13", STAC_HP_BNB13_EQ), 2774 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942, 2775 "HP bNB13", STAC_HP_BNB13_EQ), 2776 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943, 2777 "HP bNB13", STAC_HP_BNB13_EQ), 2778 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944, 2779 "HP bNB13", STAC_HP_BNB13_EQ), 2780 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945, 2781 "HP bNB13", STAC_HP_BNB13_EQ), 2782 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946, 2783 "HP bNB13", STAC_HP_BNB13_EQ), 2784 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948, 2785 "HP bNB13", STAC_HP_BNB13_EQ), 2786 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949, 2787 "HP bNB13", STAC_HP_BNB13_EQ), 2788 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A, 2789 "HP bNB13", STAC_HP_BNB13_EQ), 2790 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B, 2791 "HP bNB13", STAC_HP_BNB13_EQ), 2792 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C, 2793 "HP bNB13", STAC_HP_BNB13_EQ), 2794 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E, 2795 "HP bNB13", STAC_HP_BNB13_EQ), 2796 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F, 2797 "HP bNB13", STAC_HP_BNB13_EQ), 2798 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950, 2799 "HP bNB13", STAC_HP_BNB13_EQ), 2800 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951, 2801 "HP bNB13", STAC_HP_BNB13_EQ), 2802 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A, 2803 "HP bNB13", STAC_HP_BNB13_EQ), 2804 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B, 2805 "HP bNB13", STAC_HP_BNB13_EQ), 2806 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C, 2807 "HP bNB13", STAC_HP_BNB13_EQ), 2808 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991, 2809 "HP bNB13", STAC_HP_BNB13_EQ), 2810 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103, 2811 "HP bNB13", STAC_HP_BNB13_EQ), 2812 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104, 2813 "HP bNB13", STAC_HP_BNB13_EQ), 2814 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105, 2815 "HP bNB13", STAC_HP_BNB13_EQ), 2816 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106, 2817 "HP bNB13", STAC_HP_BNB13_EQ), 2818 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107, 2819 "HP bNB13", STAC_HP_BNB13_EQ), 2820 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108, 2821 "HP bNB13", STAC_HP_BNB13_EQ), 2822 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109, 2823 "HP bNB13", STAC_HP_BNB13_EQ), 2824 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A, 2825 "HP bNB13", STAC_HP_BNB13_EQ), 2826 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B, 2827 "HP bNB13", STAC_HP_BNB13_EQ), 2828 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C, 2829 "HP bNB13", STAC_HP_BNB13_EQ), 2830 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D, 2831 "HP bNB13", STAC_HP_BNB13_EQ), 2832 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E, 2833 "HP bNB13", STAC_HP_BNB13_EQ), 2834 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F, 2835 "HP bNB13", STAC_HP_BNB13_EQ), 2836 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120, 2837 "HP bNB13", STAC_HP_BNB13_EQ), 2838 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121, 2839 "HP bNB13", STAC_HP_BNB13_EQ), 2840 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122, 2841 "HP bNB13", STAC_HP_BNB13_EQ), 2842 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123, 2843 "HP bNB13", STAC_HP_BNB13_EQ), 2844 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E, 2845 "HP bNB13", STAC_HP_BNB13_EQ), 2846 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F, 2847 "HP bNB13", STAC_HP_BNB13_EQ), 2848 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140, 2849 "HP bNB13", STAC_HP_BNB13_EQ), 2850 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2, 2851 "HP bNB13", STAC_HP_BNB13_EQ), 2852 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3, 2853 "HP bNB13", STAC_HP_BNB13_EQ), 2854 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5, 2855 "HP bNB13", STAC_HP_BNB13_EQ), 2856 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6, 2857 "HP bNB13", STAC_HP_BNB13_EQ), 2858 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900, 2859 "HP", STAC_92HD83XXX_HP_MIC_LED), 2860 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000, 2861 "HP", STAC_92HD83XXX_HP_MIC_LED), 2862 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100, 2863 "HP", STAC_92HD83XXX_HP_MIC_LED), 2864 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388, 2865 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2866 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389, 2867 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2868 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B, 2869 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2870 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C, 2871 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2872 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D, 2873 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2874 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E, 2875 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2876 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F, 2877 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2878 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560, 2879 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2880 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B, 2881 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2882 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C, 2883 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2884 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D, 2885 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2886 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591, 2887 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2888 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592, 2889 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2890 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593, 2891 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD), 2892 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561, 2893 "HP", STAC_HP_ZEPHYR), 2894 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660, 2895 "HP Mini", STAC_92HD83XXX_HP_LED), 2896 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E, 2897 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED), 2898 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a, 2899 "HP Mini", STAC_92HD83XXX_HP_LED), 2900 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP), 2901 SND_PCI_QUIRK(PCI_VENDOR_ID_TOSHIBA, 0xfa91, 2902 "Toshiba Satellite S50D", STAC_92HD83XXX_GPIO10_EAPD), 2903 {} /* terminator */ 2904 }; 2905 2906 /* HP dv7 bass switch - GPIO5 */ 2907 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info 2908 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol, 2909 struct snd_ctl_elem_value *ucontrol) 2910 { 2911 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2912 struct sigmatel_spec *spec = codec->spec; 2913 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20); 2914 return 0; 2915 } 2916 2917 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol, 2918 struct snd_ctl_elem_value *ucontrol) 2919 { 2920 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 2921 struct sigmatel_spec *spec = codec->spec; 2922 unsigned int gpio_data; 2923 2924 gpio_data = (spec->gpio_data & ~0x20) | 2925 (ucontrol->value.integer.value[0] ? 0x20 : 0); 2926 if (gpio_data == spec->gpio_data) 2927 return 0; 2928 spec->gpio_data = gpio_data; 2929 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 2930 return 1; 2931 } 2932 2933 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = { 2934 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 2935 .info = stac_hp_bass_gpio_info, 2936 .get = stac_hp_bass_gpio_get, 2937 .put = stac_hp_bass_gpio_put, 2938 }; 2939 2940 static int stac_add_hp_bass_switch(struct hda_codec *codec) 2941 { 2942 struct sigmatel_spec *spec = codec->spec; 2943 2944 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch", 2945 &stac_hp_bass_sw_ctrl)) 2946 return -ENOMEM; 2947 2948 spec->gpio_mask |= 0x20; 2949 spec->gpio_dir |= 0x20; 2950 spec->gpio_data |= 0x20; 2951 return 0; 2952 } 2953 2954 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = { 2955 { 0x0a, 0x02214030 }, 2956 { 0x0b, 0x02a19040 }, 2957 { 0x0c, 0x01a19020 }, 2958 { 0x0d, 0x01014010 }, 2959 { 0x0e, 0x0181302e }, 2960 { 0x0f, 0x01014010 }, 2961 { 0x14, 0x01019020 }, 2962 { 0x18, 0x90a000f0 }, 2963 { 0x19, 0x90a000f0 }, 2964 { 0x1e, 0x01452050 }, 2965 { 0x1f, 0x01452050 }, 2966 {} 2967 }; 2968 2969 static const struct hda_pintbl dell_m4_1_pin_configs[] = { 2970 { 0x0a, 0x0421101f }, 2971 { 0x0b, 0x04a11221 }, 2972 { 0x0c, 0x40f000f0 }, 2973 { 0x0d, 0x90170110 }, 2974 { 0x0e, 0x23a1902e }, 2975 { 0x0f, 0x23014250 }, 2976 { 0x14, 0x40f000f0 }, 2977 { 0x18, 0x90a000f0 }, 2978 { 0x19, 0x40f000f0 }, 2979 { 0x1e, 0x4f0000f0 }, 2980 { 0x1f, 0x4f0000f0 }, 2981 {} 2982 }; 2983 2984 static const struct hda_pintbl dell_m4_2_pin_configs[] = { 2985 { 0x0a, 0x0421101f }, 2986 { 0x0b, 0x04a11221 }, 2987 { 0x0c, 0x90a70330 }, 2988 { 0x0d, 0x90170110 }, 2989 { 0x0e, 0x23a1902e }, 2990 { 0x0f, 0x23014250 }, 2991 { 0x14, 0x40f000f0 }, 2992 { 0x18, 0x40f000f0 }, 2993 { 0x19, 0x40f000f0 }, 2994 { 0x1e, 0x044413b0 }, 2995 { 0x1f, 0x044413b0 }, 2996 {} 2997 }; 2998 2999 static const struct hda_pintbl dell_m4_3_pin_configs[] = { 3000 { 0x0a, 0x0421101f }, 3001 { 0x0b, 0x04a11221 }, 3002 { 0x0c, 0x90a70330 }, 3003 { 0x0d, 0x90170110 }, 3004 { 0x0e, 0x40f000f0 }, 3005 { 0x0f, 0x40f000f0 }, 3006 { 0x14, 0x40f000f0 }, 3007 { 0x18, 0x90a000f0 }, 3008 { 0x19, 0x40f000f0 }, 3009 { 0x1e, 0x044413b0 }, 3010 { 0x1f, 0x044413b0 }, 3011 {} 3012 }; 3013 3014 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec, 3015 const struct hda_fixup *fix, int action) 3016 { 3017 struct sigmatel_spec *spec = codec->spec; 3018 3019 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3020 return; 3021 3022 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs); 3023 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0; 3024 } 3025 3026 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec, 3027 const struct hda_fixup *fix, int action) 3028 { 3029 struct sigmatel_spec *spec = codec->spec; 3030 struct hda_jack_callback *jack; 3031 3032 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3033 return; 3034 3035 /* Enable VREF power saving on GPIO1 detect */ 3036 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 3037 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02); 3038 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg, 3039 stac_vref_event); 3040 if (!IS_ERR(jack)) 3041 jack->private_data = 0x02; 3042 3043 spec->gpio_mask |= 0x02; 3044 3045 /* enable internal microphone */ 3046 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040); 3047 } 3048 3049 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec, 3050 const struct hda_fixup *fix, int action) 3051 { 3052 struct sigmatel_spec *spec = codec->spec; 3053 3054 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3055 return; 3056 spec->gpio_led = 0x01; 3057 } 3058 3059 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec, 3060 const struct hda_fixup *fix, int action) 3061 { 3062 unsigned int cap; 3063 3064 switch (action) { 3065 case HDA_FIXUP_ACT_PRE_PROBE: 3066 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010); 3067 break; 3068 3069 case HDA_FIXUP_ACT_PROBE: 3070 /* enable bass on HP dv7 */ 3071 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP); 3072 cap &= AC_GPIO_IO_COUNT; 3073 if (cap >= 6) 3074 stac_add_hp_bass_switch(codec); 3075 break; 3076 } 3077 } 3078 3079 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec, 3080 const struct hda_fixup *fix, int action) 3081 { 3082 struct sigmatel_spec *spec = codec->spec; 3083 3084 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3085 return; 3086 spec->gpio_led = 0x08; 3087 } 3088 3089 3090 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec, 3091 const struct hda_fixup *fix, int action) 3092 { 3093 struct sigmatel_spec *spec = codec->spec; 3094 3095 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3096 return; 3097 3098 if (hp_blike_system(codec->core.subsystem_id)) { 3099 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f); 3100 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT || 3101 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER || 3102 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) { 3103 /* It was changed in the BIOS to just satisfy MS DTM. 3104 * Lets turn it back into slaved HP 3105 */ 3106 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE)) 3107 | (AC_JACK_HP_OUT << 3108 AC_DEFCFG_DEVICE_SHIFT); 3109 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC 3110 | AC_DEFCFG_SEQUENCE))) 3111 | 0x1f; 3112 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg); 3113 } 3114 } 3115 3116 if (find_mute_led_cfg(codec, 1)) 3117 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 3118 spec->gpio_led, 3119 spec->gpio_led_polarity); 3120 3121 } 3122 3123 static const struct hda_fixup stac92hd71bxx_fixups[] = { 3124 [STAC_92HD71BXX_REF] = { 3125 .type = HDA_FIXUP_FUNC, 3126 .v.func = stac92hd71bxx_fixup_ref, 3127 }, 3128 [STAC_DELL_M4_1] = { 3129 .type = HDA_FIXUP_PINS, 3130 .v.pins = dell_m4_1_pin_configs, 3131 }, 3132 [STAC_DELL_M4_2] = { 3133 .type = HDA_FIXUP_PINS, 3134 .v.pins = dell_m4_2_pin_configs, 3135 }, 3136 [STAC_DELL_M4_3] = { 3137 .type = HDA_FIXUP_PINS, 3138 .v.pins = dell_m4_3_pin_configs, 3139 }, 3140 [STAC_HP_M4] = { 3141 .type = HDA_FIXUP_FUNC, 3142 .v.func = stac92hd71bxx_fixup_hp_m4, 3143 .chained = true, 3144 .chain_id = STAC_92HD71BXX_HP, 3145 }, 3146 [STAC_HP_DV4] = { 3147 .type = HDA_FIXUP_FUNC, 3148 .v.func = stac92hd71bxx_fixup_hp_dv4, 3149 .chained = true, 3150 .chain_id = STAC_HP_DV5, 3151 }, 3152 [STAC_HP_DV5] = { 3153 .type = HDA_FIXUP_FUNC, 3154 .v.func = stac92hd71bxx_fixup_hp_dv5, 3155 .chained = true, 3156 .chain_id = STAC_92HD71BXX_HP, 3157 }, 3158 [STAC_HP_HDX] = { 3159 .type = HDA_FIXUP_FUNC, 3160 .v.func = stac92hd71bxx_fixup_hp_hdx, 3161 .chained = true, 3162 .chain_id = STAC_92HD71BXX_HP, 3163 }, 3164 [STAC_92HD71BXX_HP] = { 3165 .type = HDA_FIXUP_FUNC, 3166 .v.func = stac92hd71bxx_fixup_hp, 3167 }, 3168 }; 3169 3170 static const struct hda_model_fixup stac92hd71bxx_models[] = { 3171 { .id = STAC_92HD71BXX_REF, .name = "ref" }, 3172 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" }, 3173 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" }, 3174 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" }, 3175 { .id = STAC_HP_M4, .name = "hp-m4" }, 3176 { .id = STAC_HP_DV4, .name = "hp-dv4" }, 3177 { .id = STAC_HP_DV5, .name = "hp-dv5" }, 3178 { .id = STAC_HP_HDX, .name = "hp-hdx" }, 3179 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" }, 3180 {} 3181 }; 3182 3183 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = { 3184 /* SigmaTel reference board */ 3185 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3186 "DFI LanParty", STAC_92HD71BXX_REF), 3187 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3188 "DFI LanParty", STAC_92HD71BXX_REF), 3189 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720, 3190 "HP", STAC_HP_DV5), 3191 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080, 3192 "HP", STAC_HP_DV5), 3193 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0, 3194 "HP dv4-7", STAC_HP_DV4), 3195 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600, 3196 "HP dv4-7", STAC_HP_DV5), 3197 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610, 3198 "HP HDX", STAC_HP_HDX), /* HDX18 */ 3199 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a, 3200 "HP mini 1000", STAC_HP_M4), 3201 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b, 3202 "HP HDX", STAC_HP_HDX), /* HDX16 */ 3203 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620, 3204 "HP dv6", STAC_HP_DV5), 3205 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061, 3206 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */ 3207 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e, 3208 "HP DV6", STAC_HP_DV5), 3209 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010, 3210 "HP", STAC_HP_DV5), 3211 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP), 3212 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233, 3213 "unknown Dell", STAC_DELL_M4_1), 3214 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234, 3215 "unknown Dell", STAC_DELL_M4_1), 3216 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250, 3217 "unknown Dell", STAC_DELL_M4_1), 3218 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f, 3219 "unknown Dell", STAC_DELL_M4_1), 3220 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d, 3221 "unknown Dell", STAC_DELL_M4_1), 3222 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251, 3223 "unknown Dell", STAC_DELL_M4_1), 3224 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277, 3225 "unknown Dell", STAC_DELL_M4_1), 3226 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263, 3227 "unknown Dell", STAC_DELL_M4_2), 3228 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265, 3229 "unknown Dell", STAC_DELL_M4_2), 3230 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262, 3231 "unknown Dell", STAC_DELL_M4_2), 3232 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264, 3233 "unknown Dell", STAC_DELL_M4_2), 3234 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa, 3235 "unknown Dell", STAC_DELL_M4_3), 3236 {} /* terminator */ 3237 }; 3238 3239 static const struct hda_pintbl ref922x_pin_configs[] = { 3240 { 0x0a, 0x01014010 }, 3241 { 0x0b, 0x01016011 }, 3242 { 0x0c, 0x01012012 }, 3243 { 0x0d, 0x0221401f }, 3244 { 0x0e, 0x01813122 }, 3245 { 0x0f, 0x01011014 }, 3246 { 0x10, 0x01441030 }, 3247 { 0x11, 0x01c41030 }, 3248 { 0x15, 0x40000100 }, 3249 { 0x1b, 0x40000100 }, 3250 {} 3251 }; 3252 3253 /* 3254 STAC 922X pin configs for 3255 102801A7 3256 102801AB 3257 102801A9 3258 102801D1 3259 102801D2 3260 */ 3261 static const struct hda_pintbl dell_922x_d81_pin_configs[] = { 3262 { 0x0a, 0x02214030 }, 3263 { 0x0b, 0x01a19021 }, 3264 { 0x0c, 0x01111012 }, 3265 { 0x0d, 0x01114010 }, 3266 { 0x0e, 0x02a19020 }, 3267 { 0x0f, 0x01117011 }, 3268 { 0x10, 0x400001f0 }, 3269 { 0x11, 0x400001f1 }, 3270 { 0x15, 0x01813122 }, 3271 { 0x1b, 0x400001f2 }, 3272 {} 3273 }; 3274 3275 /* 3276 STAC 922X pin configs for 3277 102801AC 3278 102801D0 3279 */ 3280 static const struct hda_pintbl dell_922x_d82_pin_configs[] = { 3281 { 0x0a, 0x02214030 }, 3282 { 0x0b, 0x01a19021 }, 3283 { 0x0c, 0x01111012 }, 3284 { 0x0d, 0x01114010 }, 3285 { 0x0e, 0x02a19020 }, 3286 { 0x0f, 0x01117011 }, 3287 { 0x10, 0x01451140 }, 3288 { 0x11, 0x400001f0 }, 3289 { 0x15, 0x01813122 }, 3290 { 0x1b, 0x400001f1 }, 3291 {} 3292 }; 3293 3294 /* 3295 STAC 922X pin configs for 3296 102801BF 3297 */ 3298 static const struct hda_pintbl dell_922x_m81_pin_configs[] = { 3299 { 0x0a, 0x0321101f }, 3300 { 0x0b, 0x01112024 }, 3301 { 0x0c, 0x01111222 }, 3302 { 0x0d, 0x91174220 }, 3303 { 0x0e, 0x03a11050 }, 3304 { 0x0f, 0x01116221 }, 3305 { 0x10, 0x90a70330 }, 3306 { 0x11, 0x01452340 }, 3307 { 0x15, 0x40C003f1 }, 3308 { 0x1b, 0x405003f0 }, 3309 {} 3310 }; 3311 3312 /* 3313 STAC 9221 A1 pin configs for 3314 102801D7 (Dell XPS M1210) 3315 */ 3316 static const struct hda_pintbl dell_922x_m82_pin_configs[] = { 3317 { 0x0a, 0x02211211 }, 3318 { 0x0b, 0x408103ff }, 3319 { 0x0c, 0x02a1123e }, 3320 { 0x0d, 0x90100310 }, 3321 { 0x0e, 0x408003f1 }, 3322 { 0x0f, 0x0221121f }, 3323 { 0x10, 0x03451340 }, 3324 { 0x11, 0x40c003f2 }, 3325 { 0x15, 0x508003f3 }, 3326 { 0x1b, 0x405003f4 }, 3327 {} 3328 }; 3329 3330 static const struct hda_pintbl d945gtp3_pin_configs[] = { 3331 { 0x0a, 0x0221401f }, 3332 { 0x0b, 0x01a19022 }, 3333 { 0x0c, 0x01813021 }, 3334 { 0x0d, 0x01014010 }, 3335 { 0x0e, 0x40000100 }, 3336 { 0x0f, 0x40000100 }, 3337 { 0x10, 0x40000100 }, 3338 { 0x11, 0x40000100 }, 3339 { 0x15, 0x02a19120 }, 3340 { 0x1b, 0x40000100 }, 3341 {} 3342 }; 3343 3344 static const struct hda_pintbl d945gtp5_pin_configs[] = { 3345 { 0x0a, 0x0221401f }, 3346 { 0x0b, 0x01011012 }, 3347 { 0x0c, 0x01813024 }, 3348 { 0x0d, 0x01014010 }, 3349 { 0x0e, 0x01a19021 }, 3350 { 0x0f, 0x01016011 }, 3351 { 0x10, 0x01452130 }, 3352 { 0x11, 0x40000100 }, 3353 { 0x15, 0x02a19320 }, 3354 { 0x1b, 0x40000100 }, 3355 {} 3356 }; 3357 3358 static const struct hda_pintbl intel_mac_v1_pin_configs[] = { 3359 { 0x0a, 0x0121e21f }, 3360 { 0x0b, 0x400000ff }, 3361 { 0x0c, 0x9017e110 }, 3362 { 0x0d, 0x400000fd }, 3363 { 0x0e, 0x400000fe }, 3364 { 0x0f, 0x0181e020 }, 3365 { 0x10, 0x1145e030 }, 3366 { 0x11, 0x11c5e240 }, 3367 { 0x15, 0x400000fc }, 3368 { 0x1b, 0x400000fb }, 3369 {} 3370 }; 3371 3372 static const struct hda_pintbl intel_mac_v2_pin_configs[] = { 3373 { 0x0a, 0x0121e21f }, 3374 { 0x0b, 0x90a7012e }, 3375 { 0x0c, 0x9017e110 }, 3376 { 0x0d, 0x400000fd }, 3377 { 0x0e, 0x400000fe }, 3378 { 0x0f, 0x0181e020 }, 3379 { 0x10, 0x1145e230 }, 3380 { 0x11, 0x500000fa }, 3381 { 0x15, 0x400000fc }, 3382 { 0x1b, 0x400000fb }, 3383 {} 3384 }; 3385 3386 static const struct hda_pintbl intel_mac_v3_pin_configs[] = { 3387 { 0x0a, 0x0121e21f }, 3388 { 0x0b, 0x90a7012e }, 3389 { 0x0c, 0x9017e110 }, 3390 { 0x0d, 0x400000fd }, 3391 { 0x0e, 0x400000fe }, 3392 { 0x0f, 0x0181e020 }, 3393 { 0x10, 0x1145e230 }, 3394 { 0x11, 0x11c5e240 }, 3395 { 0x15, 0x400000fc }, 3396 { 0x1b, 0x400000fb }, 3397 {} 3398 }; 3399 3400 static const struct hda_pintbl intel_mac_v4_pin_configs[] = { 3401 { 0x0a, 0x0321e21f }, 3402 { 0x0b, 0x03a1e02e }, 3403 { 0x0c, 0x9017e110 }, 3404 { 0x0d, 0x9017e11f }, 3405 { 0x0e, 0x400000fe }, 3406 { 0x0f, 0x0381e020 }, 3407 { 0x10, 0x1345e230 }, 3408 { 0x11, 0x13c5e240 }, 3409 { 0x15, 0x400000fc }, 3410 { 0x1b, 0x400000fb }, 3411 {} 3412 }; 3413 3414 static const struct hda_pintbl intel_mac_v5_pin_configs[] = { 3415 { 0x0a, 0x0321e21f }, 3416 { 0x0b, 0x03a1e02e }, 3417 { 0x0c, 0x9017e110 }, 3418 { 0x0d, 0x9017e11f }, 3419 { 0x0e, 0x400000fe }, 3420 { 0x0f, 0x0381e020 }, 3421 { 0x10, 0x1345e230 }, 3422 { 0x11, 0x13c5e240 }, 3423 { 0x15, 0x400000fc }, 3424 { 0x1b, 0x400000fb }, 3425 {} 3426 }; 3427 3428 static const struct hda_pintbl ecs202_pin_configs[] = { 3429 { 0x0a, 0x0221401f }, 3430 { 0x0b, 0x02a19020 }, 3431 { 0x0c, 0x01a19020 }, 3432 { 0x0d, 0x01114010 }, 3433 { 0x0e, 0x408000f0 }, 3434 { 0x0f, 0x01813022 }, 3435 { 0x10, 0x074510a0 }, 3436 { 0x11, 0x40c400f1 }, 3437 { 0x15, 0x9037012e }, 3438 { 0x1b, 0x40e000f2 }, 3439 {} 3440 }; 3441 3442 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */ 3443 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = { 3444 SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3), 3445 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1), 3446 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2), 3447 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2), 3448 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3), 3449 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3), 3450 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3), 3451 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3), 3452 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3), 3453 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3), 3454 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4), 3455 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5), 3456 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5), 3457 {} 3458 }; 3459 3460 static const struct hda_fixup stac922x_fixups[]; 3461 3462 /* remap the fixup from codec SSID and apply it */ 3463 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec, 3464 const struct hda_fixup *fix, 3465 int action) 3466 { 3467 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3468 return; 3469 3470 codec->fixup_id = HDA_FIXUP_ID_NOT_SET; 3471 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl, 3472 stac922x_fixups); 3473 if (codec->fixup_id != HDA_FIXUP_ID_NOT_SET) 3474 snd_hda_apply_fixup(codec, action); 3475 } 3476 3477 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec, 3478 const struct hda_fixup *fix, 3479 int action) 3480 { 3481 struct sigmatel_spec *spec = codec->spec; 3482 3483 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3484 spec->gpio_mask = spec->gpio_dir = 0x03; 3485 spec->gpio_data = 0x03; 3486 } 3487 } 3488 3489 static const struct hda_fixup stac922x_fixups[] = { 3490 [STAC_D945_REF] = { 3491 .type = HDA_FIXUP_PINS, 3492 .v.pins = ref922x_pin_configs, 3493 }, 3494 [STAC_D945GTP3] = { 3495 .type = HDA_FIXUP_PINS, 3496 .v.pins = d945gtp3_pin_configs, 3497 }, 3498 [STAC_D945GTP5] = { 3499 .type = HDA_FIXUP_PINS, 3500 .v.pins = d945gtp5_pin_configs, 3501 }, 3502 [STAC_INTEL_MAC_AUTO] = { 3503 .type = HDA_FIXUP_FUNC, 3504 .v.func = stac922x_fixup_intel_mac_auto, 3505 }, 3506 [STAC_INTEL_MAC_V1] = { 3507 .type = HDA_FIXUP_PINS, 3508 .v.pins = intel_mac_v1_pin_configs, 3509 .chained = true, 3510 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3511 }, 3512 [STAC_INTEL_MAC_V2] = { 3513 .type = HDA_FIXUP_PINS, 3514 .v.pins = intel_mac_v2_pin_configs, 3515 .chained = true, 3516 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3517 }, 3518 [STAC_INTEL_MAC_V3] = { 3519 .type = HDA_FIXUP_PINS, 3520 .v.pins = intel_mac_v3_pin_configs, 3521 .chained = true, 3522 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3523 }, 3524 [STAC_INTEL_MAC_V4] = { 3525 .type = HDA_FIXUP_PINS, 3526 .v.pins = intel_mac_v4_pin_configs, 3527 .chained = true, 3528 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3529 }, 3530 [STAC_INTEL_MAC_V5] = { 3531 .type = HDA_FIXUP_PINS, 3532 .v.pins = intel_mac_v5_pin_configs, 3533 .chained = true, 3534 .chain_id = STAC_922X_INTEL_MAC_GPIO, 3535 }, 3536 [STAC_922X_INTEL_MAC_GPIO] = { 3537 .type = HDA_FIXUP_FUNC, 3538 .v.func = stac922x_fixup_intel_mac_gpio, 3539 }, 3540 [STAC_ECS_202] = { 3541 .type = HDA_FIXUP_PINS, 3542 .v.pins = ecs202_pin_configs, 3543 }, 3544 [STAC_922X_DELL_D81] = { 3545 .type = HDA_FIXUP_PINS, 3546 .v.pins = dell_922x_d81_pin_configs, 3547 }, 3548 [STAC_922X_DELL_D82] = { 3549 .type = HDA_FIXUP_PINS, 3550 .v.pins = dell_922x_d82_pin_configs, 3551 }, 3552 [STAC_922X_DELL_M81] = { 3553 .type = HDA_FIXUP_PINS, 3554 .v.pins = dell_922x_m81_pin_configs, 3555 }, 3556 [STAC_922X_DELL_M82] = { 3557 .type = HDA_FIXUP_PINS, 3558 .v.pins = dell_922x_m82_pin_configs, 3559 }, 3560 }; 3561 3562 static const struct hda_model_fixup stac922x_models[] = { 3563 { .id = STAC_D945_REF, .name = "ref" }, 3564 { .id = STAC_D945GTP5, .name = "5stack" }, 3565 { .id = STAC_D945GTP3, .name = "3stack" }, 3566 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" }, 3567 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" }, 3568 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" }, 3569 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" }, 3570 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" }, 3571 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" }, 3572 { .id = STAC_ECS_202, .name = "ecs202" }, 3573 { .id = STAC_922X_DELL_D81, .name = "dell-d81" }, 3574 { .id = STAC_922X_DELL_D82, .name = "dell-d82" }, 3575 { .id = STAC_922X_DELL_M81, .name = "dell-m81" }, 3576 { .id = STAC_922X_DELL_M82, .name = "dell-m82" }, 3577 /* for backward compatibility */ 3578 { .id = STAC_INTEL_MAC_V3, .name = "macmini" }, 3579 { .id = STAC_INTEL_MAC_V5, .name = "macbook" }, 3580 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" }, 3581 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" }, 3582 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" }, 3583 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" }, 3584 {} 3585 }; 3586 3587 static const struct snd_pci_quirk stac922x_fixup_tbl[] = { 3588 /* SigmaTel reference board */ 3589 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3590 "DFI LanParty", STAC_D945_REF), 3591 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3592 "DFI LanParty", STAC_D945_REF), 3593 /* Intel 945G based systems */ 3594 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101, 3595 "Intel D945G", STAC_D945GTP3), 3596 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202, 3597 "Intel D945G", STAC_D945GTP3), 3598 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606, 3599 "Intel D945G", STAC_D945GTP3), 3600 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601, 3601 "Intel D945G", STAC_D945GTP3), 3602 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111, 3603 "Intel D945G", STAC_D945GTP3), 3604 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115, 3605 "Intel D945G", STAC_D945GTP3), 3606 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116, 3607 "Intel D945G", STAC_D945GTP3), 3608 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117, 3609 "Intel D945G", STAC_D945GTP3), 3610 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118, 3611 "Intel D945G", STAC_D945GTP3), 3612 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119, 3613 "Intel D945G", STAC_D945GTP3), 3614 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826, 3615 "Intel D945G", STAC_D945GTP3), 3616 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049, 3617 "Intel D945G", STAC_D945GTP3), 3618 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055, 3619 "Intel D945G", STAC_D945GTP3), 3620 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048, 3621 "Intel D945G", STAC_D945GTP3), 3622 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110, 3623 "Intel D945G", STAC_D945GTP3), 3624 /* Intel D945G 5-stack systems */ 3625 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404, 3626 "Intel D945G", STAC_D945GTP5), 3627 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303, 3628 "Intel D945G", STAC_D945GTP5), 3629 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013, 3630 "Intel D945G", STAC_D945GTP5), 3631 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417, 3632 "Intel D945G", STAC_D945GTP5), 3633 /* Intel 945P based systems */ 3634 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b, 3635 "Intel D945P", STAC_D945GTP3), 3636 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112, 3637 "Intel D945P", STAC_D945GTP3), 3638 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d, 3639 "Intel D945P", STAC_D945GTP3), 3640 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909, 3641 "Intel D945P", STAC_D945GTP3), 3642 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505, 3643 "Intel D945P", STAC_D945GTP3), 3644 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707, 3645 "Intel D945P", STAC_D945GTP5), 3646 /* other intel */ 3647 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204, 3648 "Intel D945", STAC_D945_REF), 3649 /* other systems */ 3650 3651 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */ 3652 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO), 3653 3654 /* Dell systems */ 3655 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7, 3656 "unknown Dell", STAC_922X_DELL_D81), 3657 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9, 3658 "unknown Dell", STAC_922X_DELL_D81), 3659 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab, 3660 "unknown Dell", STAC_922X_DELL_D81), 3661 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac, 3662 "unknown Dell", STAC_922X_DELL_D82), 3663 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf, 3664 "unknown Dell", STAC_922X_DELL_M81), 3665 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0, 3666 "unknown Dell", STAC_922X_DELL_D82), 3667 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1, 3668 "unknown Dell", STAC_922X_DELL_D81), 3669 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2, 3670 "unknown Dell", STAC_922X_DELL_D81), 3671 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7, 3672 "Dell XPS M1210", STAC_922X_DELL_M82), 3673 /* ECS/PC Chips boards */ 3674 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000, 3675 "ECS/PC chips", STAC_ECS_202), 3676 {} /* terminator */ 3677 }; 3678 3679 static const struct hda_pintbl ref927x_pin_configs[] = { 3680 { 0x0a, 0x02214020 }, 3681 { 0x0b, 0x02a19080 }, 3682 { 0x0c, 0x0181304e }, 3683 { 0x0d, 0x01014010 }, 3684 { 0x0e, 0x01a19040 }, 3685 { 0x0f, 0x01011012 }, 3686 { 0x10, 0x01016011 }, 3687 { 0x11, 0x0101201f }, 3688 { 0x12, 0x183301f0 }, 3689 { 0x13, 0x18a001f0 }, 3690 { 0x14, 0x18a001f0 }, 3691 { 0x21, 0x01442070 }, 3692 { 0x22, 0x01c42190 }, 3693 { 0x23, 0x40000100 }, 3694 {} 3695 }; 3696 3697 static const struct hda_pintbl d965_3st_pin_configs[] = { 3698 { 0x0a, 0x0221401f }, 3699 { 0x0b, 0x02a19120 }, 3700 { 0x0c, 0x40000100 }, 3701 { 0x0d, 0x01014011 }, 3702 { 0x0e, 0x01a19021 }, 3703 { 0x0f, 0x01813024 }, 3704 { 0x10, 0x40000100 }, 3705 { 0x11, 0x40000100 }, 3706 { 0x12, 0x40000100 }, 3707 { 0x13, 0x40000100 }, 3708 { 0x14, 0x40000100 }, 3709 { 0x21, 0x40000100 }, 3710 { 0x22, 0x40000100 }, 3711 { 0x23, 0x40000100 }, 3712 {} 3713 }; 3714 3715 static const struct hda_pintbl d965_5st_pin_configs[] = { 3716 { 0x0a, 0x02214020 }, 3717 { 0x0b, 0x02a19080 }, 3718 { 0x0c, 0x0181304e }, 3719 { 0x0d, 0x01014010 }, 3720 { 0x0e, 0x01a19040 }, 3721 { 0x0f, 0x01011012 }, 3722 { 0x10, 0x01016011 }, 3723 { 0x11, 0x40000100 }, 3724 { 0x12, 0x40000100 }, 3725 { 0x13, 0x40000100 }, 3726 { 0x14, 0x40000100 }, 3727 { 0x21, 0x01442070 }, 3728 { 0x22, 0x40000100 }, 3729 { 0x23, 0x40000100 }, 3730 {} 3731 }; 3732 3733 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = { 3734 { 0x0a, 0x40000100 }, 3735 { 0x0b, 0x40000100 }, 3736 { 0x0c, 0x0181304e }, 3737 { 0x0d, 0x01014010 }, 3738 { 0x0e, 0x01a19040 }, 3739 { 0x0f, 0x01011012 }, 3740 { 0x10, 0x01016011 }, 3741 { 0x11, 0x40000100 }, 3742 { 0x12, 0x40000100 }, 3743 { 0x13, 0x40000100 }, 3744 { 0x14, 0x40000100 }, 3745 { 0x21, 0x01442070 }, 3746 { 0x22, 0x40000100 }, 3747 { 0x23, 0x40000100 }, 3748 {} 3749 }; 3750 3751 static const struct hda_pintbl dell_3st_pin_configs[] = { 3752 { 0x0a, 0x02211230 }, 3753 { 0x0b, 0x02a11220 }, 3754 { 0x0c, 0x01a19040 }, 3755 { 0x0d, 0x01114210 }, 3756 { 0x0e, 0x01111212 }, 3757 { 0x0f, 0x01116211 }, 3758 { 0x10, 0x01813050 }, 3759 { 0x11, 0x01112214 }, 3760 { 0x12, 0x403003fa }, 3761 { 0x13, 0x90a60040 }, 3762 { 0x14, 0x90a60040 }, 3763 { 0x21, 0x404003fb }, 3764 { 0x22, 0x40c003fc }, 3765 { 0x23, 0x40000100 }, 3766 {} 3767 }; 3768 3769 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec, 3770 const struct hda_fixup *fix, int action) 3771 { 3772 /* no jack detecion for ref-no-jd model */ 3773 if (action == HDA_FIXUP_ACT_PRE_PROBE) 3774 codec->no_jack_detect = 1; 3775 } 3776 3777 static void stac927x_fixup_ref(struct hda_codec *codec, 3778 const struct hda_fixup *fix, int action) 3779 { 3780 struct sigmatel_spec *spec = codec->spec; 3781 3782 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3783 snd_hda_apply_pincfgs(codec, ref927x_pin_configs); 3784 spec->eapd_mask = spec->gpio_mask = 0; 3785 spec->gpio_dir = spec->gpio_data = 0; 3786 } 3787 } 3788 3789 static void stac927x_fixup_dell_dmic(struct hda_codec *codec, 3790 const struct hda_fixup *fix, int action) 3791 { 3792 struct sigmatel_spec *spec = codec->spec; 3793 3794 if (action != HDA_FIXUP_ACT_PRE_PROBE) 3795 return; 3796 3797 if (codec->core.subsystem_id != 0x1028022f) { 3798 /* GPIO2 High = Enable EAPD */ 3799 spec->eapd_mask = spec->gpio_mask = 0x04; 3800 spec->gpio_dir = spec->gpio_data = 0x04; 3801 } 3802 3803 snd_hda_add_verbs(codec, dell_3st_core_init); 3804 spec->volknob_init = 1; 3805 } 3806 3807 static void stac927x_fixup_volknob(struct hda_codec *codec, 3808 const struct hda_fixup *fix, int action) 3809 { 3810 struct sigmatel_spec *spec = codec->spec; 3811 3812 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 3813 snd_hda_add_verbs(codec, stac927x_volknob_core_init); 3814 spec->volknob_init = 1; 3815 } 3816 } 3817 3818 static const struct hda_fixup stac927x_fixups[] = { 3819 [STAC_D965_REF_NO_JD] = { 3820 .type = HDA_FIXUP_FUNC, 3821 .v.func = stac927x_fixup_ref_no_jd, 3822 .chained = true, 3823 .chain_id = STAC_D965_REF, 3824 }, 3825 [STAC_D965_REF] = { 3826 .type = HDA_FIXUP_FUNC, 3827 .v.func = stac927x_fixup_ref, 3828 }, 3829 [STAC_D965_3ST] = { 3830 .type = HDA_FIXUP_PINS, 3831 .v.pins = d965_3st_pin_configs, 3832 .chained = true, 3833 .chain_id = STAC_D965_VERBS, 3834 }, 3835 [STAC_D965_5ST] = { 3836 .type = HDA_FIXUP_PINS, 3837 .v.pins = d965_5st_pin_configs, 3838 .chained = true, 3839 .chain_id = STAC_D965_VERBS, 3840 }, 3841 [STAC_D965_VERBS] = { 3842 .type = HDA_FIXUP_VERBS, 3843 .v.verbs = d965_core_init, 3844 }, 3845 [STAC_D965_5ST_NO_FP] = { 3846 .type = HDA_FIXUP_PINS, 3847 .v.pins = d965_5st_no_fp_pin_configs, 3848 }, 3849 [STAC_DELL_3ST] = { 3850 .type = HDA_FIXUP_PINS, 3851 .v.pins = dell_3st_pin_configs, 3852 .chained = true, 3853 .chain_id = STAC_927X_DELL_DMIC, 3854 }, 3855 [STAC_DELL_BIOS] = { 3856 .type = HDA_FIXUP_PINS, 3857 .v.pins = (const struct hda_pintbl[]) { 3858 /* correct the front output jack as a hp out */ 3859 { 0x0f, 0x0221101f }, 3860 /* correct the front input jack as a mic */ 3861 { 0x0e, 0x02a79130 }, 3862 {} 3863 }, 3864 .chained = true, 3865 .chain_id = STAC_927X_DELL_DMIC, 3866 }, 3867 [STAC_DELL_BIOS_AMIC] = { 3868 .type = HDA_FIXUP_PINS, 3869 .v.pins = (const struct hda_pintbl[]) { 3870 /* configure the analog microphone on some laptops */ 3871 { 0x0c, 0x90a79130 }, 3872 {} 3873 }, 3874 .chained = true, 3875 .chain_id = STAC_DELL_BIOS, 3876 }, 3877 [STAC_DELL_BIOS_SPDIF] = { 3878 .type = HDA_FIXUP_PINS, 3879 .v.pins = (const struct hda_pintbl[]) { 3880 /* correct the device field to SPDIF out */ 3881 { 0x21, 0x01442070 }, 3882 {} 3883 }, 3884 .chained = true, 3885 .chain_id = STAC_DELL_BIOS, 3886 }, 3887 [STAC_927X_DELL_DMIC] = { 3888 .type = HDA_FIXUP_FUNC, 3889 .v.func = stac927x_fixup_dell_dmic, 3890 }, 3891 [STAC_927X_VOLKNOB] = { 3892 .type = HDA_FIXUP_FUNC, 3893 .v.func = stac927x_fixup_volknob, 3894 }, 3895 }; 3896 3897 static const struct hda_model_fixup stac927x_models[] = { 3898 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" }, 3899 { .id = STAC_D965_REF, .name = "ref" }, 3900 { .id = STAC_D965_3ST, .name = "3stack" }, 3901 { .id = STAC_D965_5ST, .name = "5stack" }, 3902 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" }, 3903 { .id = STAC_DELL_3ST, .name = "dell-3stack" }, 3904 { .id = STAC_DELL_BIOS, .name = "dell-bios" }, 3905 { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" }, 3906 { .id = STAC_927X_VOLKNOB, .name = "volknob" }, 3907 {} 3908 }; 3909 3910 static const struct snd_pci_quirk stac927x_fixup_tbl[] = { 3911 /* SigmaTel reference board */ 3912 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 3913 "DFI LanParty", STAC_D965_REF), 3914 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 3915 "DFI LanParty", STAC_D965_REF), 3916 /* Intel 946 based systems */ 3917 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST), 3918 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST), 3919 /* 965 based 3 stack systems */ 3920 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100, 3921 "Intel D965", STAC_D965_3ST), 3922 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000, 3923 "Intel D965", STAC_D965_3ST), 3924 /* Dell 3 stack systems */ 3925 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST), 3926 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST), 3927 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST), 3928 /* Dell 3 stack systems with verb table in BIOS */ 3929 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS), 3930 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS), 3931 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS), 3932 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF), 3933 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS), 3934 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS), 3935 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS), 3936 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS), 3937 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF), 3938 /* 965 based 5 stack systems */ 3939 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300, 3940 "Intel D965", STAC_D965_5ST), 3941 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500, 3942 "Intel D965", STAC_D965_5ST), 3943 /* volume-knob fixes */ 3944 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB), 3945 {} /* terminator */ 3946 }; 3947 3948 static const struct hda_pintbl ref9205_pin_configs[] = { 3949 { 0x0a, 0x40000100 }, 3950 { 0x0b, 0x40000100 }, 3951 { 0x0c, 0x01016011 }, 3952 { 0x0d, 0x01014010 }, 3953 { 0x0e, 0x01813122 }, 3954 { 0x0f, 0x01a19021 }, 3955 { 0x14, 0x01019020 }, 3956 { 0x16, 0x40000100 }, 3957 { 0x17, 0x90a000f0 }, 3958 { 0x18, 0x90a000f0 }, 3959 { 0x21, 0x01441030 }, 3960 { 0x22, 0x01c41030 }, 3961 {} 3962 }; 3963 3964 /* 3965 STAC 9205 pin configs for 3966 102801F1 3967 102801F2 3968 102801FC 3969 102801FD 3970 10280204 3971 1028021F 3972 10280228 (Dell Vostro 1500) 3973 10280229 (Dell Vostro 1700) 3974 */ 3975 static const struct hda_pintbl dell_9205_m42_pin_configs[] = { 3976 { 0x0a, 0x0321101F }, 3977 { 0x0b, 0x03A11020 }, 3978 { 0x0c, 0x400003FA }, 3979 { 0x0d, 0x90170310 }, 3980 { 0x0e, 0x400003FB }, 3981 { 0x0f, 0x400003FC }, 3982 { 0x14, 0x400003FD }, 3983 { 0x16, 0x40F000F9 }, 3984 { 0x17, 0x90A60330 }, 3985 { 0x18, 0x400003FF }, 3986 { 0x21, 0x0144131F }, 3987 { 0x22, 0x40C003FE }, 3988 {} 3989 }; 3990 3991 /* 3992 STAC 9205 pin configs for 3993 102801F9 3994 102801FA 3995 102801FE 3996 102801FF (Dell Precision M4300) 3997 10280206 3998 10280200 3999 10280201 4000 */ 4001 static const struct hda_pintbl dell_9205_m43_pin_configs[] = { 4002 { 0x0a, 0x0321101f }, 4003 { 0x0b, 0x03a11020 }, 4004 { 0x0c, 0x90a70330 }, 4005 { 0x0d, 0x90170310 }, 4006 { 0x0e, 0x400000fe }, 4007 { 0x0f, 0x400000ff }, 4008 { 0x14, 0x400000fd }, 4009 { 0x16, 0x40f000f9 }, 4010 { 0x17, 0x400000fa }, 4011 { 0x18, 0x400000fc }, 4012 { 0x21, 0x0144131f }, 4013 { 0x22, 0x40c003f8 }, 4014 /* Enable SPDIF in/out */ 4015 { 0x1f, 0x01441030 }, 4016 { 0x20, 0x1c410030 }, 4017 {} 4018 }; 4019 4020 static const struct hda_pintbl dell_9205_m44_pin_configs[] = { 4021 { 0x0a, 0x0421101f }, 4022 { 0x0b, 0x04a11020 }, 4023 { 0x0c, 0x400003fa }, 4024 { 0x0d, 0x90170310 }, 4025 { 0x0e, 0x400003fb }, 4026 { 0x0f, 0x400003fc }, 4027 { 0x14, 0x400003fd }, 4028 { 0x16, 0x400003f9 }, 4029 { 0x17, 0x90a60330 }, 4030 { 0x18, 0x400003ff }, 4031 { 0x21, 0x01441340 }, 4032 { 0x22, 0x40c003fe }, 4033 {} 4034 }; 4035 4036 static void stac9205_fixup_ref(struct hda_codec *codec, 4037 const struct hda_fixup *fix, int action) 4038 { 4039 struct sigmatel_spec *spec = codec->spec; 4040 4041 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4042 snd_hda_apply_pincfgs(codec, ref9205_pin_configs); 4043 /* SPDIF-In enabled */ 4044 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0; 4045 } 4046 } 4047 4048 static void stac9205_fixup_dell_m43(struct hda_codec *codec, 4049 const struct hda_fixup *fix, int action) 4050 { 4051 struct sigmatel_spec *spec = codec->spec; 4052 struct hda_jack_callback *jack; 4053 4054 if (action == HDA_FIXUP_ACT_PRE_PROBE) { 4055 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs); 4056 4057 /* Enable unsol response for GPIO4/Dock HP connection */ 4058 snd_hda_codec_write_cache(codec, codec->core.afg, 0, 4059 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10); 4060 jack = snd_hda_jack_detect_enable_callback(codec, codec->core.afg, 4061 stac_vref_event); 4062 if (!IS_ERR(jack)) 4063 jack->private_data = 0x01; 4064 4065 spec->gpio_dir = 0x0b; 4066 spec->eapd_mask = 0x01; 4067 spec->gpio_mask = 0x1b; 4068 spec->gpio_mute = 0x10; 4069 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute, 4070 * GPIO3 Low = DRM 4071 */ 4072 spec->gpio_data = 0x01; 4073 } 4074 } 4075 4076 static void stac9205_fixup_eapd(struct hda_codec *codec, 4077 const struct hda_fixup *fix, int action) 4078 { 4079 struct sigmatel_spec *spec = codec->spec; 4080 4081 if (action == HDA_FIXUP_ACT_PRE_PROBE) 4082 spec->eapd_switch = 0; 4083 } 4084 4085 static const struct hda_fixup stac9205_fixups[] = { 4086 [STAC_9205_REF] = { 4087 .type = HDA_FIXUP_FUNC, 4088 .v.func = stac9205_fixup_ref, 4089 }, 4090 [STAC_9205_DELL_M42] = { 4091 .type = HDA_FIXUP_PINS, 4092 .v.pins = dell_9205_m42_pin_configs, 4093 }, 4094 [STAC_9205_DELL_M43] = { 4095 .type = HDA_FIXUP_FUNC, 4096 .v.func = stac9205_fixup_dell_m43, 4097 }, 4098 [STAC_9205_DELL_M44] = { 4099 .type = HDA_FIXUP_PINS, 4100 .v.pins = dell_9205_m44_pin_configs, 4101 }, 4102 [STAC_9205_EAPD] = { 4103 .type = HDA_FIXUP_FUNC, 4104 .v.func = stac9205_fixup_eapd, 4105 }, 4106 {} 4107 }; 4108 4109 static const struct hda_model_fixup stac9205_models[] = { 4110 { .id = STAC_9205_REF, .name = "ref" }, 4111 { .id = STAC_9205_DELL_M42, .name = "dell-m42" }, 4112 { .id = STAC_9205_DELL_M43, .name = "dell-m43" }, 4113 { .id = STAC_9205_DELL_M44, .name = "dell-m44" }, 4114 { .id = STAC_9205_EAPD, .name = "eapd" }, 4115 {} 4116 }; 4117 4118 static const struct snd_pci_quirk stac9205_fixup_tbl[] = { 4119 /* SigmaTel reference board */ 4120 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, 4121 "DFI LanParty", STAC_9205_REF), 4122 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30, 4123 "SigmaTel", STAC_9205_REF), 4124 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, 4125 "DFI LanParty", STAC_9205_REF), 4126 /* Dell */ 4127 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1, 4128 "unknown Dell", STAC_9205_DELL_M42), 4129 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2, 4130 "unknown Dell", STAC_9205_DELL_M42), 4131 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8, 4132 "Dell Precision", STAC_9205_DELL_M43), 4133 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9, 4134 "Dell Precision", STAC_9205_DELL_M43), 4135 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa, 4136 "Dell Precision", STAC_9205_DELL_M43), 4137 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc, 4138 "unknown Dell", STAC_9205_DELL_M42), 4139 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd, 4140 "unknown Dell", STAC_9205_DELL_M42), 4141 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe, 4142 "Dell Precision", STAC_9205_DELL_M43), 4143 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff, 4144 "Dell Precision M4300", STAC_9205_DELL_M43), 4145 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204, 4146 "unknown Dell", STAC_9205_DELL_M42), 4147 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206, 4148 "Dell Precision", STAC_9205_DELL_M43), 4149 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b, 4150 "Dell Precision", STAC_9205_DELL_M43), 4151 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c, 4152 "Dell Precision", STAC_9205_DELL_M43), 4153 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f, 4154 "Dell Inspiron", STAC_9205_DELL_M44), 4155 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228, 4156 "Dell Vostro 1500", STAC_9205_DELL_M42), 4157 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229, 4158 "Dell Vostro 1700", STAC_9205_DELL_M42), 4159 /* Gateway */ 4160 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD), 4161 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD), 4162 {} /* terminator */ 4163 }; 4164 4165 static void stac92hd95_fixup_hp_led(struct hda_codec *codec, 4166 const struct hda_fixup *fix, int action) 4167 { 4168 struct sigmatel_spec *spec = codec->spec; 4169 4170 if (action != HDA_FIXUP_ACT_PRE_PROBE) 4171 return; 4172 4173 if (find_mute_led_cfg(codec, spec->default_polarity)) 4174 codec_dbg(codec, "mute LED gpio %d polarity %d\n", 4175 spec->gpio_led, 4176 spec->gpio_led_polarity); 4177 } 4178 4179 static const struct hda_fixup stac92hd95_fixups[] = { 4180 [STAC_92HD95_HP_LED] = { 4181 .type = HDA_FIXUP_FUNC, 4182 .v.func = stac92hd95_fixup_hp_led, 4183 }, 4184 [STAC_92HD95_HP_BASS] = { 4185 .type = HDA_FIXUP_VERBS, 4186 .v.verbs = (const struct hda_verb[]) { 4187 {0x1a, 0x795, 0x00}, /* HPF to 100Hz */ 4188 {} 4189 }, 4190 .chained = true, 4191 .chain_id = STAC_92HD95_HP_LED, 4192 }, 4193 }; 4194 4195 static const struct snd_pci_quirk stac92hd95_fixup_tbl[] = { 4196 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1911, "HP Spectre 13", STAC_92HD95_HP_BASS), 4197 {} /* terminator */ 4198 }; 4199 4200 static const struct hda_model_fixup stac92hd95_models[] = { 4201 { .id = STAC_92HD95_HP_LED, .name = "hp-led" }, 4202 { .id = STAC_92HD95_HP_BASS, .name = "hp-bass" }, 4203 {} 4204 }; 4205 4206 4207 static int stac_parse_auto_config(struct hda_codec *codec) 4208 { 4209 struct sigmatel_spec *spec = codec->spec; 4210 int err; 4211 int flags = 0; 4212 4213 if (spec->headset_jack) 4214 flags |= HDA_PINCFG_HEADSET_MIC; 4215 4216 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags); 4217 if (err < 0) 4218 return err; 4219 4220 /* add hooks */ 4221 spec->gen.pcm_playback_hook = stac_playback_pcm_hook; 4222 spec->gen.pcm_capture_hook = stac_capture_pcm_hook; 4223 4224 spec->gen.automute_hook = stac_update_outputs; 4225 4226 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg); 4227 if (err < 0) 4228 return err; 4229 4230 if (spec->vref_mute_led_nid) { 4231 err = snd_hda_gen_fix_pin_power(codec, spec->vref_mute_led_nid); 4232 if (err < 0) 4233 return err; 4234 } 4235 4236 /* setup analog beep controls */ 4237 if (spec->anabeep_nid > 0) { 4238 err = stac_auto_create_beep_ctls(codec, 4239 spec->anabeep_nid); 4240 if (err < 0) 4241 return err; 4242 } 4243 4244 /* setup digital beep controls and input device */ 4245 #ifdef CONFIG_SND_HDA_INPUT_BEEP 4246 if (spec->gen.beep_nid) { 4247 hda_nid_t nid = spec->gen.beep_nid; 4248 unsigned int caps; 4249 4250 err = stac_auto_create_beep_ctls(codec, nid); 4251 if (err < 0) 4252 return err; 4253 if (codec->beep) { 4254 /* IDT/STAC codecs have linear beep tone parameter */ 4255 codec->beep->linear_tone = spec->linear_tone_beep; 4256 /* if no beep switch is available, make its own one */ 4257 caps = query_amp_caps(codec, nid, HDA_OUTPUT); 4258 if (!(caps & AC_AMPCAP_MUTE)) { 4259 err = stac_beep_switch_ctl(codec); 4260 if (err < 0) 4261 return err; 4262 } 4263 } 4264 } 4265 #endif 4266 4267 if (spec->gpio_led) 4268 spec->gen.vmaster_mute.hook = stac_vmaster_hook; 4269 4270 if (spec->aloopback_ctl && 4271 snd_hda_get_bool_hint(codec, "loopback") == 1) { 4272 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl)) 4273 return -ENOMEM; 4274 } 4275 4276 if (spec->have_spdif_mux) { 4277 err = stac_create_spdif_mux_ctls(codec); 4278 if (err < 0) 4279 return err; 4280 } 4281 4282 stac_init_power_map(codec); 4283 4284 return 0; 4285 } 4286 4287 static int stac_init(struct hda_codec *codec) 4288 { 4289 struct sigmatel_spec *spec = codec->spec; 4290 int i; 4291 4292 /* override some hints */ 4293 stac_store_hints(codec); 4294 4295 /* set up GPIO */ 4296 /* turn on EAPD statically when spec->eapd_switch isn't set. 4297 * otherwise, unsol event will turn it on/off dynamically 4298 */ 4299 if (!spec->eapd_switch) 4300 spec->gpio_data |= spec->eapd_mask; 4301 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data); 4302 4303 snd_hda_gen_init(codec); 4304 4305 /* sync the power-map */ 4306 if (spec->num_pwrs) 4307 snd_hda_codec_write(codec, codec->core.afg, 0, 4308 AC_VERB_IDT_SET_POWER_MAP, 4309 spec->power_map_bits); 4310 4311 /* power down inactive ADCs */ 4312 if (spec->powerdown_adcs) { 4313 for (i = 0; i < spec->gen.num_all_adcs; i++) { 4314 if (spec->active_adcs & (1 << i)) 4315 continue; 4316 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0, 4317 AC_VERB_SET_POWER_STATE, 4318 AC_PWRST_D3); 4319 } 4320 } 4321 4322 return 0; 4323 } 4324 4325 static void stac_shutup(struct hda_codec *codec) 4326 { 4327 struct sigmatel_spec *spec = codec->spec; 4328 4329 snd_hda_shutup_pins(codec); 4330 4331 if (spec->eapd_mask) 4332 stac_gpio_set(codec, spec->gpio_mask, 4333 spec->gpio_dir, spec->gpio_data & 4334 ~spec->eapd_mask); 4335 } 4336 4337 #define stac_free snd_hda_gen_free 4338 4339 #ifdef CONFIG_PROC_FS 4340 static void stac92hd_proc_hook(struct snd_info_buffer *buffer, 4341 struct hda_codec *codec, hda_nid_t nid) 4342 { 4343 if (nid == codec->core.afg) 4344 snd_iprintf(buffer, "Power-Map: 0x%02x\n", 4345 snd_hda_codec_read(codec, nid, 0, 4346 AC_VERB_IDT_GET_POWER_MAP, 0)); 4347 } 4348 4349 static void analog_loop_proc_hook(struct snd_info_buffer *buffer, 4350 struct hda_codec *codec, 4351 unsigned int verb) 4352 { 4353 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n", 4354 snd_hda_codec_read(codec, codec->core.afg, 0, verb, 0)); 4355 } 4356 4357 /* stac92hd71bxx, stac92hd73xx */ 4358 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer, 4359 struct hda_codec *codec, hda_nid_t nid) 4360 { 4361 stac92hd_proc_hook(buffer, codec, nid); 4362 if (nid == codec->core.afg) 4363 analog_loop_proc_hook(buffer, codec, 0xfa0); 4364 } 4365 4366 static void stac9205_proc_hook(struct snd_info_buffer *buffer, 4367 struct hda_codec *codec, hda_nid_t nid) 4368 { 4369 if (nid == codec->core.afg) 4370 analog_loop_proc_hook(buffer, codec, 0xfe0); 4371 } 4372 4373 static void stac927x_proc_hook(struct snd_info_buffer *buffer, 4374 struct hda_codec *codec, hda_nid_t nid) 4375 { 4376 if (nid == codec->core.afg) 4377 analog_loop_proc_hook(buffer, codec, 0xfeb); 4378 } 4379 #else 4380 #define stac92hd_proc_hook NULL 4381 #define stac92hd7x_proc_hook NULL 4382 #define stac9205_proc_hook NULL 4383 #define stac927x_proc_hook NULL 4384 #endif 4385 4386 #ifdef CONFIG_PM 4387 static int stac_suspend(struct hda_codec *codec) 4388 { 4389 stac_shutup(codec); 4390 return 0; 4391 } 4392 #else 4393 #define stac_suspend NULL 4394 #endif /* CONFIG_PM */ 4395 4396 static const struct hda_codec_ops stac_patch_ops = { 4397 .build_controls = snd_hda_gen_build_controls, 4398 .build_pcms = snd_hda_gen_build_pcms, 4399 .init = stac_init, 4400 .free = stac_free, 4401 .unsol_event = snd_hda_jack_unsol_event, 4402 #ifdef CONFIG_PM 4403 .suspend = stac_suspend, 4404 #endif 4405 .stream_pm = snd_hda_gen_stream_pm, 4406 .reboot_notify = stac_shutup, 4407 }; 4408 4409 static int alloc_stac_spec(struct hda_codec *codec) 4410 { 4411 struct sigmatel_spec *spec; 4412 4413 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 4414 if (!spec) 4415 return -ENOMEM; 4416 snd_hda_gen_spec_init(&spec->gen); 4417 codec->spec = spec; 4418 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */ 4419 spec->gen.dac_min_mute = true; 4420 return 0; 4421 } 4422 4423 static int patch_stac9200(struct hda_codec *codec) 4424 { 4425 struct sigmatel_spec *spec; 4426 int err; 4427 4428 err = alloc_stac_spec(codec); 4429 if (err < 0) 4430 return err; 4431 4432 spec = codec->spec; 4433 spec->linear_tone_beep = 1; 4434 spec->gen.own_eapd_ctl = 1; 4435 4436 codec->patch_ops = stac_patch_ops; 4437 codec->power_filter = snd_hda_codec_eapd_power_filter; 4438 4439 snd_hda_add_verbs(codec, stac9200_eapd_init); 4440 4441 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl, 4442 stac9200_fixups); 4443 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4444 4445 err = stac_parse_auto_config(codec); 4446 if (err < 0) { 4447 stac_free(codec); 4448 return err; 4449 } 4450 4451 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4452 4453 return 0; 4454 } 4455 4456 static int patch_stac925x(struct hda_codec *codec) 4457 { 4458 struct sigmatel_spec *spec; 4459 int err; 4460 4461 err = alloc_stac_spec(codec); 4462 if (err < 0) 4463 return err; 4464 4465 spec = codec->spec; 4466 spec->linear_tone_beep = 1; 4467 spec->gen.own_eapd_ctl = 1; 4468 4469 codec->patch_ops = stac_patch_ops; 4470 4471 snd_hda_add_verbs(codec, stac925x_core_init); 4472 4473 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl, 4474 stac925x_fixups); 4475 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4476 4477 err = stac_parse_auto_config(codec); 4478 if (err < 0) { 4479 stac_free(codec); 4480 return err; 4481 } 4482 4483 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4484 4485 return 0; 4486 } 4487 4488 static int patch_stac92hd73xx(struct hda_codec *codec) 4489 { 4490 struct sigmatel_spec *spec; 4491 int err; 4492 int num_dacs; 4493 4494 err = alloc_stac_spec(codec); 4495 if (err < 0) 4496 return err; 4497 4498 spec = codec->spec; 4499 codec->power_save_node = 1; 4500 spec->linear_tone_beep = 0; 4501 spec->gen.mixer_nid = 0x1d; 4502 spec->have_spdif_mux = 1; 4503 4504 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1; 4505 if (num_dacs < 3 || num_dacs > 5) { 4506 codec_warn(codec, 4507 "Could not determine number of channels defaulting to DAC count\n"); 4508 num_dacs = 5; 4509 } 4510 4511 switch (num_dacs) { 4512 case 0x3: /* 6 Channel */ 4513 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback; 4514 break; 4515 case 0x4: /* 8 Channel */ 4516 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback; 4517 break; 4518 case 0x5: /* 10 Channel */ 4519 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback; 4520 break; 4521 } 4522 4523 spec->aloopback_mask = 0x01; 4524 spec->aloopback_shift = 8; 4525 4526 spec->gen.beep_nid = 0x1c; /* digital beep */ 4527 4528 /* GPIO0 High = Enable EAPD */ 4529 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4530 spec->gpio_data = 0x01; 4531 4532 spec->eapd_switch = 1; 4533 4534 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids); 4535 spec->pwr_nids = stac92hd73xx_pwr_nids; 4536 4537 spec->gen.own_eapd_ctl = 1; 4538 spec->gen.power_down_unused = 1; 4539 4540 codec->patch_ops = stac_patch_ops; 4541 4542 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl, 4543 stac92hd73xx_fixups); 4544 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4545 4546 if (!spec->volknob_init) 4547 snd_hda_add_verbs(codec, stac92hd73xx_core_init); 4548 4549 err = stac_parse_auto_config(codec); 4550 if (err < 0) { 4551 stac_free(codec); 4552 return err; 4553 } 4554 4555 /* Don't GPIO-mute speakers if there are no internal speakers, because 4556 * the GPIO might be necessary for Headphone 4557 */ 4558 if (spec->eapd_switch && !has_builtin_speaker(codec)) 4559 spec->eapd_switch = 0; 4560 4561 codec->proc_widget_hook = stac92hd7x_proc_hook; 4562 4563 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4564 4565 return 0; 4566 } 4567 4568 static void stac_setup_gpio(struct hda_codec *codec) 4569 { 4570 struct sigmatel_spec *spec = codec->spec; 4571 4572 spec->gpio_mask |= spec->eapd_mask; 4573 if (spec->gpio_led) { 4574 if (!spec->vref_mute_led_nid) { 4575 spec->gpio_mask |= spec->gpio_led; 4576 spec->gpio_dir |= spec->gpio_led; 4577 spec->gpio_data |= spec->gpio_led; 4578 } else { 4579 codec->power_filter = stac_vref_led_power_filter; 4580 } 4581 } 4582 4583 if (spec->mic_mute_led_gpio) { 4584 spec->gpio_mask |= spec->mic_mute_led_gpio; 4585 spec->gpio_dir |= spec->mic_mute_led_gpio; 4586 spec->mic_enabled = 0; 4587 spec->gpio_data |= spec->mic_mute_led_gpio; 4588 4589 spec->gen.cap_sync_hook = stac_capture_led_hook; 4590 } 4591 } 4592 4593 static int patch_stac92hd83xxx(struct hda_codec *codec) 4594 { 4595 struct sigmatel_spec *spec; 4596 int err; 4597 4598 err = alloc_stac_spec(codec); 4599 if (err < 0) 4600 return err; 4601 4602 /* longer delay needed for D3 */ 4603 codec->core.power_caps &= ~AC_PWRST_EPSS; 4604 4605 spec = codec->spec; 4606 codec->power_save_node = 1; 4607 spec->linear_tone_beep = 0; 4608 spec->gen.own_eapd_ctl = 1; 4609 spec->gen.power_down_unused = 1; 4610 spec->gen.mixer_nid = 0x1b; 4611 4612 spec->gen.beep_nid = 0x21; /* digital beep */ 4613 spec->pwr_nids = stac92hd83xxx_pwr_nids; 4614 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids); 4615 spec->default_polarity = -1; /* no default cfg */ 4616 4617 codec->patch_ops = stac_patch_ops; 4618 4619 snd_hda_add_verbs(codec, stac92hd83xxx_core_init); 4620 4621 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl, 4622 stac92hd83xxx_fixups); 4623 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4624 4625 stac_setup_gpio(codec); 4626 4627 err = stac_parse_auto_config(codec); 4628 if (err < 0) { 4629 stac_free(codec); 4630 return err; 4631 } 4632 4633 codec->proc_widget_hook = stac92hd_proc_hook; 4634 4635 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4636 4637 return 0; 4638 } 4639 4640 static const hda_nid_t stac92hd95_pwr_nids[] = { 4641 0x0a, 0x0b, 0x0c, 0x0d 4642 }; 4643 4644 static int patch_stac92hd95(struct hda_codec *codec) 4645 { 4646 struct sigmatel_spec *spec; 4647 int err; 4648 4649 err = alloc_stac_spec(codec); 4650 if (err < 0) 4651 return err; 4652 4653 /* longer delay needed for D3 */ 4654 codec->core.power_caps &= ~AC_PWRST_EPSS; 4655 4656 spec = codec->spec; 4657 codec->power_save_node = 1; 4658 spec->linear_tone_beep = 0; 4659 spec->gen.own_eapd_ctl = 1; 4660 spec->gen.power_down_unused = 1; 4661 4662 spec->gen.beep_nid = 0x19; /* digital beep */ 4663 spec->pwr_nids = stac92hd95_pwr_nids; 4664 spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids); 4665 spec->default_polarity = 0; 4666 4667 codec->patch_ops = stac_patch_ops; 4668 4669 snd_hda_pick_fixup(codec, stac92hd95_models, stac92hd95_fixup_tbl, 4670 stac92hd95_fixups); 4671 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4672 4673 stac_setup_gpio(codec); 4674 4675 err = stac_parse_auto_config(codec); 4676 if (err < 0) { 4677 stac_free(codec); 4678 return err; 4679 } 4680 4681 codec->proc_widget_hook = stac92hd_proc_hook; 4682 4683 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4684 4685 return 0; 4686 } 4687 4688 static int patch_stac92hd71bxx(struct hda_codec *codec) 4689 { 4690 struct sigmatel_spec *spec; 4691 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init; 4692 int err; 4693 4694 err = alloc_stac_spec(codec); 4695 if (err < 0) 4696 return err; 4697 4698 spec = codec->spec; 4699 codec->power_save_node = 1; 4700 spec->linear_tone_beep = 0; 4701 spec->gen.own_eapd_ctl = 1; 4702 spec->gen.power_down_unused = 1; 4703 spec->gen.mixer_nid = 0x17; 4704 spec->have_spdif_mux = 1; 4705 4706 codec->patch_ops = stac_patch_ops; 4707 4708 /* GPIO0 = EAPD */ 4709 spec->gpio_mask = 0x01; 4710 spec->gpio_dir = 0x01; 4711 spec->gpio_data = 0x01; 4712 4713 switch (codec->core.vendor_id) { 4714 case 0x111d76b6: /* 4 Port without Analog Mixer */ 4715 case 0x111d76b7: 4716 unmute_init++; 4717 break; 4718 case 0x111d7608: /* 5 Port with Analog Mixer */ 4719 if ((codec->core.revision_id & 0xf) == 0 || 4720 (codec->core.revision_id & 0xf) == 1) 4721 spec->stream_delay = 40; /* 40 milliseconds */ 4722 4723 /* disable VSW */ 4724 unmute_init++; 4725 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0); 4726 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3); 4727 break; 4728 case 0x111d7603: /* 6 Port with Analog Mixer */ 4729 if ((codec->core.revision_id & 0xf) == 1) 4730 spec->stream_delay = 40; /* 40 milliseconds */ 4731 4732 break; 4733 } 4734 4735 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB) 4736 snd_hda_add_verbs(codec, stac92hd71bxx_core_init); 4737 4738 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP) 4739 snd_hda_sequence_write_cache(codec, unmute_init); 4740 4741 spec->aloopback_ctl = &stac92hd71bxx_loopback; 4742 spec->aloopback_mask = 0x50; 4743 spec->aloopback_shift = 0; 4744 4745 spec->powerdown_adcs = 1; 4746 spec->gen.beep_nid = 0x26; /* digital beep */ 4747 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids); 4748 spec->pwr_nids = stac92hd71bxx_pwr_nids; 4749 4750 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl, 4751 stac92hd71bxx_fixups); 4752 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4753 4754 stac_setup_gpio(codec); 4755 4756 err = stac_parse_auto_config(codec); 4757 if (err < 0) { 4758 stac_free(codec); 4759 return err; 4760 } 4761 4762 codec->proc_widget_hook = stac92hd7x_proc_hook; 4763 4764 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4765 4766 return 0; 4767 } 4768 4769 static int patch_stac922x(struct hda_codec *codec) 4770 { 4771 struct sigmatel_spec *spec; 4772 int err; 4773 4774 err = alloc_stac_spec(codec); 4775 if (err < 0) 4776 return err; 4777 4778 spec = codec->spec; 4779 spec->linear_tone_beep = 1; 4780 spec->gen.own_eapd_ctl = 1; 4781 4782 codec->patch_ops = stac_patch_ops; 4783 4784 snd_hda_add_verbs(codec, stac922x_core_init); 4785 4786 /* Fix Mux capture level; max to 2 */ 4787 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT, 4788 (0 << AC_AMPCAP_OFFSET_SHIFT) | 4789 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) | 4790 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) | 4791 (0 << AC_AMPCAP_MUTE_SHIFT)); 4792 4793 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl, 4794 stac922x_fixups); 4795 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4796 4797 err = stac_parse_auto_config(codec); 4798 if (err < 0) { 4799 stac_free(codec); 4800 return err; 4801 } 4802 4803 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4804 4805 return 0; 4806 } 4807 4808 static const char * const stac927x_spdif_labels[] = { 4809 "Digital Playback", "ADAT", "Analog Mux 1", 4810 "Analog Mux 2", "Analog Mux 3", NULL 4811 }; 4812 4813 static int patch_stac927x(struct hda_codec *codec) 4814 { 4815 struct sigmatel_spec *spec; 4816 int err; 4817 4818 err = alloc_stac_spec(codec); 4819 if (err < 0) 4820 return err; 4821 4822 spec = codec->spec; 4823 spec->linear_tone_beep = 1; 4824 spec->gen.own_eapd_ctl = 1; 4825 spec->have_spdif_mux = 1; 4826 spec->spdif_labels = stac927x_spdif_labels; 4827 4828 spec->gen.beep_nid = 0x23; /* digital beep */ 4829 4830 /* GPIO0 High = Enable EAPD */ 4831 spec->eapd_mask = spec->gpio_mask = 0x01; 4832 spec->gpio_dir = spec->gpio_data = 0x01; 4833 4834 spec->aloopback_ctl = &stac927x_loopback; 4835 spec->aloopback_mask = 0x40; 4836 spec->aloopback_shift = 0; 4837 spec->eapd_switch = 1; 4838 4839 codec->patch_ops = stac_patch_ops; 4840 4841 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl, 4842 stac927x_fixups); 4843 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4844 4845 if (!spec->volknob_init) 4846 snd_hda_add_verbs(codec, stac927x_core_init); 4847 4848 err = stac_parse_auto_config(codec); 4849 if (err < 0) { 4850 stac_free(codec); 4851 return err; 4852 } 4853 4854 codec->proc_widget_hook = stac927x_proc_hook; 4855 4856 /* 4857 * !!FIXME!! 4858 * The STAC927x seem to require fairly long delays for certain 4859 * command sequences. With too short delays (even if the answer 4860 * is set to RIRB properly), it results in the silence output 4861 * on some hardwares like Dell. 4862 * 4863 * The below flag enables the longer delay (see get_response 4864 * in hda_intel.c). 4865 */ 4866 codec->bus->needs_damn_long_delay = 1; 4867 4868 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4869 4870 return 0; 4871 } 4872 4873 static int patch_stac9205(struct hda_codec *codec) 4874 { 4875 struct sigmatel_spec *spec; 4876 int err; 4877 4878 err = alloc_stac_spec(codec); 4879 if (err < 0) 4880 return err; 4881 4882 spec = codec->spec; 4883 spec->linear_tone_beep = 1; 4884 spec->gen.own_eapd_ctl = 1; 4885 spec->have_spdif_mux = 1; 4886 4887 spec->gen.beep_nid = 0x23; /* digital beep */ 4888 4889 snd_hda_add_verbs(codec, stac9205_core_init); 4890 spec->aloopback_ctl = &stac9205_loopback; 4891 4892 spec->aloopback_mask = 0x40; 4893 spec->aloopback_shift = 0; 4894 4895 /* GPIO0 High = EAPD */ 4896 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1; 4897 spec->gpio_data = 0x01; 4898 4899 /* Turn on/off EAPD per HP plugging */ 4900 spec->eapd_switch = 1; 4901 4902 codec->patch_ops = stac_patch_ops; 4903 4904 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl, 4905 stac9205_fixups); 4906 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4907 4908 err = stac_parse_auto_config(codec); 4909 if (err < 0) { 4910 stac_free(codec); 4911 return err; 4912 } 4913 4914 codec->proc_widget_hook = stac9205_proc_hook; 4915 4916 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4917 4918 return 0; 4919 } 4920 4921 /* 4922 * STAC9872 hack 4923 */ 4924 4925 static const struct hda_verb stac9872_core_init[] = { 4926 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */ 4927 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */ 4928 {} 4929 }; 4930 4931 static const struct hda_pintbl stac9872_vaio_pin_configs[] = { 4932 { 0x0a, 0x03211020 }, 4933 { 0x0b, 0x411111f0 }, 4934 { 0x0c, 0x411111f0 }, 4935 { 0x0d, 0x03a15030 }, 4936 { 0x0e, 0x411111f0 }, 4937 { 0x0f, 0x90170110 }, 4938 { 0x11, 0x411111f0 }, 4939 { 0x13, 0x411111f0 }, 4940 { 0x14, 0x90a7013e }, 4941 {} 4942 }; 4943 4944 static const struct hda_model_fixup stac9872_models[] = { 4945 { .id = STAC_9872_VAIO, .name = "vaio" }, 4946 {} 4947 }; 4948 4949 static const struct hda_fixup stac9872_fixups[] = { 4950 [STAC_9872_VAIO] = { 4951 .type = HDA_FIXUP_PINS, 4952 .v.pins = stac9872_vaio_pin_configs, 4953 }, 4954 }; 4955 4956 static const struct snd_pci_quirk stac9872_fixup_tbl[] = { 4957 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0, 4958 "Sony VAIO F/S", STAC_9872_VAIO), 4959 {} /* terminator */ 4960 }; 4961 4962 static int patch_stac9872(struct hda_codec *codec) 4963 { 4964 struct sigmatel_spec *spec; 4965 int err; 4966 4967 err = alloc_stac_spec(codec); 4968 if (err < 0) 4969 return err; 4970 4971 spec = codec->spec; 4972 spec->linear_tone_beep = 1; 4973 spec->gen.own_eapd_ctl = 1; 4974 4975 codec->patch_ops = stac_patch_ops; 4976 4977 snd_hda_add_verbs(codec, stac9872_core_init); 4978 4979 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl, 4980 stac9872_fixups); 4981 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 4982 4983 err = stac_parse_auto_config(codec); 4984 if (err < 0) { 4985 stac_free(codec); 4986 return -EINVAL; 4987 } 4988 4989 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE); 4990 4991 return 0; 4992 } 4993 4994 4995 /* 4996 * patch entries 4997 */ 4998 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = { 4999 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 }, 5000 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x }, 5001 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x }, 5002 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x }, 5003 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x }, 5004 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x }, 5005 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x }, 5006 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x }, 5007 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x }, 5008 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x }, 5009 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x }, 5010 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x }, 5011 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x }, 5012 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x }, 5013 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x }, 5014 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x }, 5015 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x }, 5016 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x }, 5017 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x }, 5018 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x }, 5019 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x }, 5020 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x }, 5021 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x }, 5022 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x }, 5023 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x }, 5024 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x }, 5025 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x }, 5026 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x }, 5027 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x }, 5028 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x }, 5029 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x }, 5030 /* The following does not take into account .id=0x83847661 when subsys = 5031 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are 5032 * currently not fully supported. 5033 */ 5034 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 }, 5035 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 }, 5036 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 }, 5037 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 }, 5038 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 }, 5039 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 }, 5040 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 }, 5041 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 }, 5042 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 }, 5043 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 }, 5044 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 }, 5045 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 }, 5046 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx}, 5047 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx}, 5048 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx}, 5049 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx}, 5050 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx}, 5051 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx}, 5052 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx}, 5053 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx}, 5054 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx}, 5055 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx}, 5056 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx}, 5057 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx}, 5058 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx }, 5059 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx }, 5060 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx }, 5061 { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 }, 5062 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5063 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx }, 5064 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5065 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx }, 5066 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5067 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx }, 5068 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5069 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx }, 5070 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx }, 5071 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx }, 5072 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx }, 5073 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx }, 5074 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx }, 5075 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx }, 5076 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx }, 5077 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx }, 5078 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx }, 5079 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx }, 5080 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx }, 5081 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx }, 5082 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx }, 5083 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx }, 5084 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx }, 5085 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx}, 5086 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx}, 5087 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx}, 5088 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx}, 5089 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx}, 5090 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx}, 5091 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx}, 5092 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx}, 5093 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx}, 5094 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx}, 5095 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx}, 5096 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx}, 5097 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx}, 5098 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx}, 5099 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx}, 5100 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx}, 5101 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx}, 5102 {} /* terminator */ 5103 }; 5104 5105 MODULE_ALIAS("snd-hda-codec-id:8384*"); 5106 MODULE_ALIAS("snd-hda-codec-id:111d*"); 5107 5108 MODULE_LICENSE("GPL"); 5109 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec"); 5110 5111 static struct hda_codec_driver sigmatel_driver = { 5112 .preset = snd_hda_preset_sigmatel, 5113 }; 5114 5115 module_hda_codec_driver(sigmatel_driver); 5116