1 /* 2 * 3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs 4 * 5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved. 6 * Copyright (c) 2006 ATI Technologies Inc. 7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved. 8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com> 9 * 10 * Authors: 11 * Wu Fengguang <wfg@linux.intel.com> 12 * 13 * Maintained by: 14 * Wu Fengguang <wfg@linux.intel.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the Free 18 * Software Foundation; either version 2 of the License, or (at your option) 19 * any later version. 20 * 21 * This program is distributed in the hope that it will be useful, but 22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 * for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software Foundation, 28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 */ 30 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/module.h> 35 #include <sound/core.h> 36 #include <sound/jack.h> 37 #include "hda_codec.h" 38 #include "hda_local.h" 39 #include "hda_jack.h" 40 41 static bool static_hdmi_pcm; 42 module_param(static_hdmi_pcm, bool, 0644); 43 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); 44 45 /* 46 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device 47 * could support N independent pipes, each of them can be connected to one or 48 * more ports (DVI, HDMI or DisplayPort). 49 * 50 * The HDA correspondence of pipes/ports are converter/pin nodes. 51 */ 52 #define MAX_HDMI_CVTS 8 53 #define MAX_HDMI_PINS 8 54 55 struct hdmi_spec_per_cvt { 56 hda_nid_t cvt_nid; 57 int assigned; 58 unsigned int channels_min; 59 unsigned int channels_max; 60 u32 rates; 61 u64 formats; 62 unsigned int maxbps; 63 }; 64 65 struct hdmi_spec_per_pin { 66 hda_nid_t pin_nid; 67 int num_mux_nids; 68 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; 69 70 struct hda_codec *codec; 71 struct hdmi_eld sink_eld; 72 struct delayed_work work; 73 int repoll_count; 74 }; 75 76 struct hdmi_spec { 77 int num_cvts; 78 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS]; 79 80 int num_pins; 81 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS]; 82 struct hda_pcm pcm_rec[MAX_HDMI_PINS]; 83 84 /* 85 * Non-generic ATI/NVIDIA specific 86 */ 87 struct hda_multi_out multiout; 88 const struct hda_pcm_stream *pcm_playback; 89 }; 90 91 92 struct hdmi_audio_infoframe { 93 u8 type; /* 0x84 */ 94 u8 ver; /* 0x01 */ 95 u8 len; /* 0x0a */ 96 97 u8 checksum; 98 99 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ 100 u8 SS01_SF24; 101 u8 CXT04; 102 u8 CA; 103 u8 LFEPBL01_LSV36_DM_INH7; 104 }; 105 106 struct dp_audio_infoframe { 107 u8 type; /* 0x84 */ 108 u8 len; /* 0x1b */ 109 u8 ver; /* 0x11 << 2 */ 110 111 u8 CC02_CT47; /* match with HDMI infoframe from this on */ 112 u8 SS01_SF24; 113 u8 CXT04; 114 u8 CA; 115 u8 LFEPBL01_LSV36_DM_INH7; 116 }; 117 118 union audio_infoframe { 119 struct hdmi_audio_infoframe hdmi; 120 struct dp_audio_infoframe dp; 121 u8 bytes[0]; 122 }; 123 124 /* 125 * CEA speaker placement: 126 * 127 * FLH FCH FRH 128 * FLW FL FLC FC FRC FR FRW 129 * 130 * LFE 131 * TC 132 * 133 * RL RLC RC RRC RR 134 * 135 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to 136 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. 137 */ 138 enum cea_speaker_placement { 139 FL = (1 << 0), /* Front Left */ 140 FC = (1 << 1), /* Front Center */ 141 FR = (1 << 2), /* Front Right */ 142 FLC = (1 << 3), /* Front Left Center */ 143 FRC = (1 << 4), /* Front Right Center */ 144 RL = (1 << 5), /* Rear Left */ 145 RC = (1 << 6), /* Rear Center */ 146 RR = (1 << 7), /* Rear Right */ 147 RLC = (1 << 8), /* Rear Left Center */ 148 RRC = (1 << 9), /* Rear Right Center */ 149 LFE = (1 << 10), /* Low Frequency Effect */ 150 FLW = (1 << 11), /* Front Left Wide */ 151 FRW = (1 << 12), /* Front Right Wide */ 152 FLH = (1 << 13), /* Front Left High */ 153 FCH = (1 << 14), /* Front Center High */ 154 FRH = (1 << 15), /* Front Right High */ 155 TC = (1 << 16), /* Top Center */ 156 }; 157 158 /* 159 * ELD SA bits in the CEA Speaker Allocation data block 160 */ 161 static int eld_speaker_allocation_bits[] = { 162 [0] = FL | FR, 163 [1] = LFE, 164 [2] = FC, 165 [3] = RL | RR, 166 [4] = RC, 167 [5] = FLC | FRC, 168 [6] = RLC | RRC, 169 /* the following are not defined in ELD yet */ 170 [7] = FLW | FRW, 171 [8] = FLH | FRH, 172 [9] = TC, 173 [10] = FCH, 174 }; 175 176 struct cea_channel_speaker_allocation { 177 int ca_index; 178 int speakers[8]; 179 180 /* derived values, just for convenience */ 181 int channels; 182 int spk_mask; 183 }; 184 185 /* 186 * ALSA sequence is: 187 * 188 * surround40 surround41 surround50 surround51 surround71 189 * ch0 front left = = = = 190 * ch1 front right = = = = 191 * ch2 rear left = = = = 192 * ch3 rear right = = = = 193 * ch4 LFE center center center 194 * ch5 LFE LFE 195 * ch6 side left 196 * ch7 side right 197 * 198 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR} 199 */ 200 static int hdmi_channel_mapping[0x32][8] = { 201 /* stereo */ 202 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 203 /* 2.1 */ 204 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 205 /* Dolby Surround */ 206 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 }, 207 /* surround40 */ 208 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 }, 209 /* 4ch */ 210 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 }, 211 /* surround41 */ 212 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 }, 213 /* surround50 */ 214 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 }, 215 /* surround51 */ 216 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 }, 217 /* 7.1 */ 218 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 }, 219 }; 220 221 /* 222 * This is an ordered list! 223 * 224 * The preceding ones have better chances to be selected by 225 * hdmi_channel_allocation(). 226 */ 227 static struct cea_channel_speaker_allocation channel_allocations[] = { 228 /* channel: 7 6 5 4 3 2 1 0 */ 229 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, 230 /* 2.1 */ 231 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, 232 /* Dolby Surround */ 233 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, 234 /* surround40 */ 235 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, 236 /* surround41 */ 237 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, 238 /* surround50 */ 239 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, 240 /* surround51 */ 241 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, 242 /* 6.1 */ 243 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, 244 /* surround71 */ 245 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, 246 247 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, 248 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, 249 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, 250 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, 251 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, 252 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, 253 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, 254 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, 255 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, 256 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, 257 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, 258 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, 259 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, 260 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, 261 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, 262 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, 263 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, 264 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, 265 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, 266 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, 267 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, 268 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, 269 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, 270 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, 271 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, 272 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, 273 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, 274 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, 275 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, 276 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, 277 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, 278 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, 279 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, 280 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, 281 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, 282 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, 283 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, 284 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, 285 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, 286 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, 287 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, 288 }; 289 290 291 /* 292 * HDMI routines 293 */ 294 295 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid) 296 { 297 int pin_idx; 298 299 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 300 if (spec->pins[pin_idx].pin_nid == pin_nid) 301 return pin_idx; 302 303 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid); 304 return -EINVAL; 305 } 306 307 static int hinfo_to_pin_index(struct hdmi_spec *spec, 308 struct hda_pcm_stream *hinfo) 309 { 310 int pin_idx; 311 312 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 313 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo) 314 return pin_idx; 315 316 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo); 317 return -EINVAL; 318 } 319 320 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid) 321 { 322 int cvt_idx; 323 324 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) 325 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid) 326 return cvt_idx; 327 328 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid); 329 return -EINVAL; 330 } 331 332 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 333 struct snd_ctl_elem_info *uinfo) 334 { 335 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 336 struct hdmi_spec *spec; 337 int pin_idx; 338 339 spec = codec->spec; 340 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 341 342 pin_idx = kcontrol->private_value; 343 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size; 344 345 return 0; 346 } 347 348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 349 struct snd_ctl_elem_value *ucontrol) 350 { 351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 352 struct hdmi_spec *spec; 353 int pin_idx; 354 355 spec = codec->spec; 356 pin_idx = kcontrol->private_value; 357 358 memcpy(ucontrol->value.bytes.data, 359 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE); 360 361 return 0; 362 } 363 364 static struct snd_kcontrol_new eld_bytes_ctl = { 365 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 366 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 367 .name = "ELD", 368 .info = hdmi_eld_ctl_info, 369 .get = hdmi_eld_ctl_get, 370 }; 371 372 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx, 373 int device) 374 { 375 struct snd_kcontrol *kctl; 376 struct hdmi_spec *spec = codec->spec; 377 int err; 378 379 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); 380 if (!kctl) 381 return -ENOMEM; 382 kctl->private_value = pin_idx; 383 kctl->id.device = device; 384 385 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl); 386 if (err < 0) 387 return err; 388 389 return 0; 390 } 391 392 #ifdef BE_PARANOID 393 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 394 int *packet_index, int *byte_index) 395 { 396 int val; 397 398 val = snd_hda_codec_read(codec, pin_nid, 0, 399 AC_VERB_GET_HDMI_DIP_INDEX, 0); 400 401 *packet_index = val >> 5; 402 *byte_index = val & 0x1f; 403 } 404 #endif 405 406 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 407 int packet_index, int byte_index) 408 { 409 int val; 410 411 val = (packet_index << 5) | (byte_index & 0x1f); 412 413 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); 414 } 415 416 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, 417 unsigned char val) 418 { 419 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); 420 } 421 422 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) 423 { 424 /* Unmute */ 425 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) 426 snd_hda_codec_write(codec, pin_nid, 0, 427 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); 428 /* Disable pin out until stream is active*/ 429 snd_hda_codec_write(codec, pin_nid, 0, 430 AC_VERB_SET_PIN_WIDGET_CONTROL, 0); 431 } 432 433 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid) 434 { 435 return 1 + snd_hda_codec_read(codec, cvt_nid, 0, 436 AC_VERB_GET_CVT_CHAN_COUNT, 0); 437 } 438 439 static void hdmi_set_channel_count(struct hda_codec *codec, 440 hda_nid_t cvt_nid, int chs) 441 { 442 if (chs != hdmi_get_channel_count(codec, cvt_nid)) 443 snd_hda_codec_write(codec, cvt_nid, 0, 444 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); 445 } 446 447 448 /* 449 * Channel mapping routines 450 */ 451 452 /* 453 * Compute derived values in channel_allocations[]. 454 */ 455 static void init_channel_allocations(void) 456 { 457 int i, j; 458 struct cea_channel_speaker_allocation *p; 459 460 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 461 p = channel_allocations + i; 462 p->channels = 0; 463 p->spk_mask = 0; 464 for (j = 0; j < ARRAY_SIZE(p->speakers); j++) 465 if (p->speakers[j]) { 466 p->channels++; 467 p->spk_mask |= p->speakers[j]; 468 } 469 } 470 } 471 472 /* 473 * The transformation takes two steps: 474 * 475 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask 476 * spk_mask => (channel_allocations[]) => ai->CA 477 * 478 * TODO: it could select the wrong CA from multiple candidates. 479 */ 480 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels) 481 { 482 int i; 483 int ca = 0; 484 int spk_mask = 0; 485 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; 486 487 /* 488 * CA defaults to 0 for basic stereo audio 489 */ 490 if (channels <= 2) 491 return 0; 492 493 /* 494 * expand ELD's speaker allocation mask 495 * 496 * ELD tells the speaker mask in a compact(paired) form, 497 * expand ELD's notions to match the ones used by Audio InfoFrame. 498 */ 499 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { 500 if (eld->spk_alloc & (1 << i)) 501 spk_mask |= eld_speaker_allocation_bits[i]; 502 } 503 504 /* search for the first working match in the CA table */ 505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 506 if (channels == channel_allocations[i].channels && 507 (spk_mask & channel_allocations[i].spk_mask) == 508 channel_allocations[i].spk_mask) { 509 ca = channel_allocations[i].ca_index; 510 break; 511 } 512 } 513 514 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf)); 515 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", 516 ca, channels, buf); 517 518 return ca; 519 } 520 521 static void hdmi_debug_channel_mapping(struct hda_codec *codec, 522 hda_nid_t pin_nid) 523 { 524 #ifdef CONFIG_SND_DEBUG_VERBOSE 525 int i; 526 int slot; 527 528 for (i = 0; i < 8; i++) { 529 slot = snd_hda_codec_read(codec, pin_nid, 0, 530 AC_VERB_GET_HDMI_CHAN_SLOT, i); 531 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", 532 slot >> 4, slot & 0xf); 533 } 534 #endif 535 } 536 537 538 static void hdmi_setup_channel_mapping(struct hda_codec *codec, 539 hda_nid_t pin_nid, 540 int ca) 541 { 542 int i; 543 int err; 544 545 if (hdmi_channel_mapping[ca][1] == 0) { 546 for (i = 0; i < channel_allocations[ca].channels; i++) 547 hdmi_channel_mapping[ca][i] = i | (i << 4); 548 for (; i < 8; i++) 549 hdmi_channel_mapping[ca][i] = 0xf | (i << 4); 550 } 551 552 for (i = 0; i < 8; i++) { 553 err = snd_hda_codec_write(codec, pin_nid, 0, 554 AC_VERB_SET_HDMI_CHAN_SLOT, 555 hdmi_channel_mapping[ca][i]); 556 if (err) { 557 snd_printdd(KERN_NOTICE 558 "HDMI: channel mapping failed\n"); 559 break; 560 } 561 } 562 563 hdmi_debug_channel_mapping(codec, pin_nid); 564 } 565 566 567 /* 568 * Audio InfoFrame routines 569 */ 570 571 /* 572 * Enable Audio InfoFrame Transmission 573 */ 574 static void hdmi_start_infoframe_trans(struct hda_codec *codec, 575 hda_nid_t pin_nid) 576 { 577 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 578 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 579 AC_DIPXMIT_BEST); 580 } 581 582 /* 583 * Disable Audio InfoFrame Transmission 584 */ 585 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, 586 hda_nid_t pin_nid) 587 { 588 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 589 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 590 AC_DIPXMIT_DISABLE); 591 } 592 593 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) 594 { 595 #ifdef CONFIG_SND_DEBUG_VERBOSE 596 int i; 597 int size; 598 599 size = snd_hdmi_get_eld_size(codec, pin_nid); 600 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); 601 602 for (i = 0; i < 8; i++) { 603 size = snd_hda_codec_read(codec, pin_nid, 0, 604 AC_VERB_GET_HDMI_DIP_SIZE, i); 605 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); 606 } 607 #endif 608 } 609 610 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) 611 { 612 #ifdef BE_PARANOID 613 int i, j; 614 int size; 615 int pi, bi; 616 for (i = 0; i < 8; i++) { 617 size = snd_hda_codec_read(codec, pin_nid, 0, 618 AC_VERB_GET_HDMI_DIP_SIZE, i); 619 if (size == 0) 620 continue; 621 622 hdmi_set_dip_index(codec, pin_nid, i, 0x0); 623 for (j = 1; j < 1000; j++) { 624 hdmi_write_dip_byte(codec, pin_nid, 0x0); 625 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); 626 if (pi != i) 627 snd_printd(KERN_INFO "dip index %d: %d != %d\n", 628 bi, pi, i); 629 if (bi == 0) /* byte index wrapped around */ 630 break; 631 } 632 snd_printd(KERN_INFO 633 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", 634 i, size, j); 635 } 636 #endif 637 } 638 639 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai) 640 { 641 u8 *bytes = (u8 *)hdmi_ai; 642 u8 sum = 0; 643 int i; 644 645 hdmi_ai->checksum = 0; 646 647 for (i = 0; i < sizeof(*hdmi_ai); i++) 648 sum += bytes[i]; 649 650 hdmi_ai->checksum = -sum; 651 } 652 653 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, 654 hda_nid_t pin_nid, 655 u8 *dip, int size) 656 { 657 int i; 658 659 hdmi_debug_dip_size(codec, pin_nid); 660 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ 661 662 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 663 for (i = 0; i < size; i++) 664 hdmi_write_dip_byte(codec, pin_nid, dip[i]); 665 } 666 667 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, 668 u8 *dip, int size) 669 { 670 u8 val; 671 int i; 672 673 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) 674 != AC_DIPXMIT_BEST) 675 return false; 676 677 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 678 for (i = 0; i < size; i++) { 679 val = snd_hda_codec_read(codec, pin_nid, 0, 680 AC_VERB_GET_HDMI_DIP_DATA, 0); 681 if (val != dip[i]) 682 return false; 683 } 684 685 return true; 686 } 687 688 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx, 689 struct snd_pcm_substream *substream) 690 { 691 struct hdmi_spec *spec = codec->spec; 692 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 693 hda_nid_t pin_nid = per_pin->pin_nid; 694 int channels = substream->runtime->channels; 695 struct hdmi_eld *eld; 696 int ca; 697 union audio_infoframe ai; 698 699 eld = &spec->pins[pin_idx].sink_eld; 700 if (!eld->monitor_present) 701 return; 702 703 ca = hdmi_channel_allocation(eld, channels); 704 705 memset(&ai, 0, sizeof(ai)); 706 if (eld->conn_type == 0) { /* HDMI */ 707 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; 708 709 hdmi_ai->type = 0x84; 710 hdmi_ai->ver = 0x01; 711 hdmi_ai->len = 0x0a; 712 hdmi_ai->CC02_CT47 = channels - 1; 713 hdmi_ai->CA = ca; 714 hdmi_checksum_audio_infoframe(hdmi_ai); 715 } else if (eld->conn_type == 1) { /* DisplayPort */ 716 struct dp_audio_infoframe *dp_ai = &ai.dp; 717 718 dp_ai->type = 0x84; 719 dp_ai->len = 0x1b; 720 dp_ai->ver = 0x11 << 2; 721 dp_ai->CC02_CT47 = channels - 1; 722 dp_ai->CA = ca; 723 } else { 724 snd_printd("HDMI: unknown connection type at pin %d\n", 725 pin_nid); 726 return; 727 } 728 729 /* 730 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or 731 * sizeof(*dp_ai) to avoid partial match/update problems when 732 * the user switches between HDMI/DP monitors. 733 */ 734 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, 735 sizeof(ai))) { 736 snd_printdd("hdmi_setup_audio_infoframe: " 737 "pin=%d channels=%d\n", 738 pin_nid, 739 channels); 740 hdmi_setup_channel_mapping(codec, pin_nid, ca); 741 hdmi_stop_infoframe_trans(codec, pin_nid); 742 hdmi_fill_audio_infoframe(codec, pin_nid, 743 ai.bytes, sizeof(ai)); 744 hdmi_start_infoframe_trans(codec, pin_nid); 745 } 746 } 747 748 749 /* 750 * Unsolicited events 751 */ 752 753 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); 754 755 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 756 { 757 struct hdmi_spec *spec = codec->spec; 758 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 759 int pin_nid; 760 int pin_idx; 761 struct hda_jack_tbl *jack; 762 763 jack = snd_hda_jack_tbl_get_from_tag(codec, tag); 764 if (!jack) 765 return; 766 pin_nid = jack->nid; 767 jack->jack_dirty = 1; 768 769 _snd_printd(SND_PR_VERBOSE, 770 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 771 codec->addr, pin_nid, 772 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV)); 773 774 pin_idx = pin_nid_to_pin_index(spec, pin_nid); 775 if (pin_idx < 0) 776 return; 777 778 hdmi_present_sense(&spec->pins[pin_idx], 1); 779 snd_hda_jack_report_sync(codec); 780 } 781 782 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 783 { 784 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 785 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 786 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); 787 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); 788 789 printk(KERN_INFO 790 "HDMI CP event: CODEC=%d PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", 791 codec->addr, 792 tag, 793 subtag, 794 cp_state, 795 cp_ready); 796 797 /* TODO */ 798 if (cp_state) 799 ; 800 if (cp_ready) 801 ; 802 } 803 804 805 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) 806 { 807 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 808 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 809 810 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) { 811 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); 812 return; 813 } 814 815 if (subtag == 0) 816 hdmi_intrinsic_event(codec, res); 817 else 818 hdmi_non_intrinsic_event(codec, res); 819 } 820 821 /* 822 * Callbacks 823 */ 824 825 /* HBR should be Non-PCM, 8 channels */ 826 #define is_hbr_format(format) \ 827 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) 828 829 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, 830 hda_nid_t pin_nid, u32 stream_tag, int format) 831 { 832 int pinctl; 833 int new_pinctl = 0; 834 835 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 836 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 837 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 838 839 new_pinctl = pinctl & ~AC_PINCTL_EPT; 840 if (is_hbr_format(format)) 841 new_pinctl |= AC_PINCTL_EPT_HBR; 842 else 843 new_pinctl |= AC_PINCTL_EPT_NATIVE; 844 845 snd_printdd("hdmi_setup_stream: " 846 "NID=0x%x, %spinctl=0x%x\n", 847 pin_nid, 848 pinctl == new_pinctl ? "" : "new-", 849 new_pinctl); 850 851 if (pinctl != new_pinctl) 852 snd_hda_codec_write(codec, pin_nid, 0, 853 AC_VERB_SET_PIN_WIDGET_CONTROL, 854 new_pinctl); 855 856 } 857 if (is_hbr_format(format) && !new_pinctl) { 858 snd_printdd("hdmi_setup_stream: HBR is not supported\n"); 859 return -EINVAL; 860 } 861 862 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); 863 return 0; 864 } 865 866 /* 867 * HDA PCM callbacks 868 */ 869 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, 870 struct hda_codec *codec, 871 struct snd_pcm_substream *substream) 872 { 873 struct hdmi_spec *spec = codec->spec; 874 struct snd_pcm_runtime *runtime = substream->runtime; 875 int pin_idx, cvt_idx, mux_idx = 0; 876 struct hdmi_spec_per_pin *per_pin; 877 struct hdmi_eld *eld; 878 struct hdmi_spec_per_cvt *per_cvt = NULL; 879 int pinctl; 880 881 /* Validate hinfo */ 882 pin_idx = hinfo_to_pin_index(spec, hinfo); 883 if (snd_BUG_ON(pin_idx < 0)) 884 return -EINVAL; 885 per_pin = &spec->pins[pin_idx]; 886 eld = &per_pin->sink_eld; 887 888 /* Dynamically assign converter to stream */ 889 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { 890 per_cvt = &spec->cvts[cvt_idx]; 891 892 /* Must not already be assigned */ 893 if (per_cvt->assigned) 894 continue; 895 /* Must be in pin's mux's list of converters */ 896 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) 897 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) 898 break; 899 /* Not in mux list */ 900 if (mux_idx == per_pin->num_mux_nids) 901 continue; 902 break; 903 } 904 /* No free converters */ 905 if (cvt_idx == spec->num_cvts) 906 return -ENODEV; 907 908 /* Claim converter */ 909 per_cvt->assigned = 1; 910 hinfo->nid = per_cvt->cvt_nid; 911 912 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 913 AC_VERB_SET_CONNECT_SEL, 914 mux_idx); 915 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 916 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 917 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 918 AC_VERB_SET_PIN_WIDGET_CONTROL, 919 pinctl | PIN_OUT); 920 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); 921 922 /* Initially set the converter's capabilities */ 923 hinfo->channels_min = per_cvt->channels_min; 924 hinfo->channels_max = per_cvt->channels_max; 925 hinfo->rates = per_cvt->rates; 926 hinfo->formats = per_cvt->formats; 927 hinfo->maxbps = per_cvt->maxbps; 928 929 /* Restrict capabilities by ELD if this isn't disabled */ 930 if (!static_hdmi_pcm && eld->eld_valid) { 931 snd_hdmi_eld_update_pcm_info(eld, hinfo); 932 if (hinfo->channels_min > hinfo->channels_max || 933 !hinfo->rates || !hinfo->formats) 934 return -ENODEV; 935 } 936 937 /* Store the updated parameters */ 938 runtime->hw.channels_min = hinfo->channels_min; 939 runtime->hw.channels_max = hinfo->channels_max; 940 runtime->hw.formats = hinfo->formats; 941 runtime->hw.rates = hinfo->rates; 942 943 snd_pcm_hw_constraint_step(substream->runtime, 0, 944 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 945 return 0; 946 } 947 948 /* 949 * HDA/HDMI auto parsing 950 */ 951 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) 952 { 953 struct hdmi_spec *spec = codec->spec; 954 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 955 hda_nid_t pin_nid = per_pin->pin_nid; 956 957 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { 958 snd_printk(KERN_WARNING 959 "HDMI: pin %d wcaps %#x " 960 "does not support connection list\n", 961 pin_nid, get_wcaps(codec, pin_nid)); 962 return -EINVAL; 963 } 964 965 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid, 966 per_pin->mux_nids, 967 HDA_MAX_CONNECTIONS); 968 969 return 0; 970 } 971 972 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) 973 { 974 struct hda_codec *codec = per_pin->codec; 975 struct hdmi_eld *eld = &per_pin->sink_eld; 976 hda_nid_t pin_nid = per_pin->pin_nid; 977 /* 978 * Always execute a GetPinSense verb here, even when called from 979 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited 980 * response's PD bit is not the real PD value, but indicates that 981 * the real PD value changed. An older version of the HD-audio 982 * specification worked this way. Hence, we just ignore the data in 983 * the unsolicited response to avoid custom WARs. 984 */ 985 int present = snd_hda_pin_sense(codec, pin_nid); 986 bool eld_valid = false; 987 988 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer)); 989 990 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); 991 if (eld->monitor_present) 992 eld_valid = !!(present & AC_PINSENSE_ELDV); 993 994 _snd_printd(SND_PR_VERBOSE, 995 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 996 codec->addr, pin_nid, eld->monitor_present, eld_valid); 997 998 if (eld_valid) { 999 if (!snd_hdmi_get_eld(eld, codec, pin_nid)) 1000 snd_hdmi_show_eld(eld); 1001 else if (repoll) { 1002 queue_delayed_work(codec->bus->workq, 1003 &per_pin->work, 1004 msecs_to_jiffies(300)); 1005 } 1006 } 1007 } 1008 1009 static void hdmi_repoll_eld(struct work_struct *work) 1010 { 1011 struct hdmi_spec_per_pin *per_pin = 1012 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work); 1013 1014 if (per_pin->repoll_count++ > 6) 1015 per_pin->repoll_count = 0; 1016 1017 hdmi_present_sense(per_pin, per_pin->repoll_count); 1018 } 1019 1020 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1021 { 1022 struct hdmi_spec *spec = codec->spec; 1023 unsigned int caps, config; 1024 int pin_idx; 1025 struct hdmi_spec_per_pin *per_pin; 1026 int err; 1027 1028 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP); 1029 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP))) 1030 return 0; 1031 1032 config = snd_hda_codec_read(codec, pin_nid, 0, 1033 AC_VERB_GET_CONFIG_DEFAULT, 0); 1034 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) 1035 return 0; 1036 1037 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS)) 1038 return -E2BIG; 1039 1040 pin_idx = spec->num_pins; 1041 per_pin = &spec->pins[pin_idx]; 1042 1043 per_pin->pin_nid = pin_nid; 1044 1045 err = hdmi_read_pin_conn(codec, pin_idx); 1046 if (err < 0) 1047 return err; 1048 1049 spec->num_pins++; 1050 1051 return 0; 1052 } 1053 1054 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1055 { 1056 struct hdmi_spec *spec = codec->spec; 1057 int cvt_idx; 1058 struct hdmi_spec_per_cvt *per_cvt; 1059 unsigned int chans; 1060 int err; 1061 1062 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS)) 1063 return -E2BIG; 1064 1065 chans = get_wcaps(codec, cvt_nid); 1066 chans = get_wcaps_channels(chans); 1067 1068 cvt_idx = spec->num_cvts; 1069 per_cvt = &spec->cvts[cvt_idx]; 1070 1071 per_cvt->cvt_nid = cvt_nid; 1072 per_cvt->channels_min = 2; 1073 if (chans <= 16) 1074 per_cvt->channels_max = chans; 1075 1076 err = snd_hda_query_supported_pcm(codec, cvt_nid, 1077 &per_cvt->rates, 1078 &per_cvt->formats, 1079 &per_cvt->maxbps); 1080 if (err < 0) 1081 return err; 1082 1083 spec->num_cvts++; 1084 1085 return 0; 1086 } 1087 1088 static int hdmi_parse_codec(struct hda_codec *codec) 1089 { 1090 hda_nid_t nid; 1091 int i, nodes; 1092 1093 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid); 1094 if (!nid || nodes < 0) { 1095 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n"); 1096 return -EINVAL; 1097 } 1098 1099 for (i = 0; i < nodes; i++, nid++) { 1100 unsigned int caps; 1101 unsigned int type; 1102 1103 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP); 1104 type = get_wcaps_type(caps); 1105 1106 if (!(caps & AC_WCAP_DIGITAL)) 1107 continue; 1108 1109 switch (type) { 1110 case AC_WID_AUD_OUT: 1111 hdmi_add_cvt(codec, nid); 1112 break; 1113 case AC_WID_PIN: 1114 hdmi_add_pin(codec, nid); 1115 break; 1116 } 1117 } 1118 1119 /* 1120 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event 1121 * can be lost and presence sense verb will become inaccurate if the 1122 * HDA link is powered off at hot plug or hw initialization time. 1123 */ 1124 #ifdef CONFIG_SND_HDA_POWER_SAVE 1125 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & 1126 AC_PWRST_EPSS)) 1127 codec->bus->power_keep_link_on = 1; 1128 #endif 1129 1130 return 0; 1131 } 1132 1133 /* 1134 */ 1135 static char *get_hdmi_pcm_name(int idx) 1136 { 1137 static char names[MAX_HDMI_PINS][8]; 1138 sprintf(&names[idx][0], "HDMI %d", idx); 1139 return &names[idx][0]; 1140 } 1141 1142 /* 1143 * HDMI callbacks 1144 */ 1145 1146 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1147 struct hda_codec *codec, 1148 unsigned int stream_tag, 1149 unsigned int format, 1150 struct snd_pcm_substream *substream) 1151 { 1152 hda_nid_t cvt_nid = hinfo->nid; 1153 struct hdmi_spec *spec = codec->spec; 1154 int pin_idx = hinfo_to_pin_index(spec, hinfo); 1155 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid; 1156 1157 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); 1158 1159 hdmi_setup_audio_infoframe(codec, pin_idx, substream); 1160 1161 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); 1162 } 1163 1164 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, 1165 struct hda_codec *codec, 1166 struct snd_pcm_substream *substream) 1167 { 1168 struct hdmi_spec *spec = codec->spec; 1169 int cvt_idx, pin_idx; 1170 struct hdmi_spec_per_cvt *per_cvt; 1171 struct hdmi_spec_per_pin *per_pin; 1172 int pinctl; 1173 1174 snd_hda_codec_cleanup_stream(codec, hinfo->nid); 1175 1176 if (hinfo->nid) { 1177 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid); 1178 if (snd_BUG_ON(cvt_idx < 0)) 1179 return -EINVAL; 1180 per_cvt = &spec->cvts[cvt_idx]; 1181 1182 snd_BUG_ON(!per_cvt->assigned); 1183 per_cvt->assigned = 0; 1184 hinfo->nid = 0; 1185 1186 pin_idx = hinfo_to_pin_index(spec, hinfo); 1187 if (snd_BUG_ON(pin_idx < 0)) 1188 return -EINVAL; 1189 per_pin = &spec->pins[pin_idx]; 1190 1191 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 1192 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1193 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 1194 AC_VERB_SET_PIN_WIDGET_CONTROL, 1195 pinctl & ~PIN_OUT); 1196 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1197 } 1198 1199 return 0; 1200 } 1201 1202 static const struct hda_pcm_ops generic_ops = { 1203 .open = hdmi_pcm_open, 1204 .prepare = generic_hdmi_playback_pcm_prepare, 1205 .cleanup = generic_hdmi_playback_pcm_cleanup, 1206 }; 1207 1208 static int generic_hdmi_build_pcms(struct hda_codec *codec) 1209 { 1210 struct hdmi_spec *spec = codec->spec; 1211 int pin_idx; 1212 1213 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1214 struct hda_pcm *info; 1215 struct hda_pcm_stream *pstr; 1216 1217 info = &spec->pcm_rec[pin_idx]; 1218 info->name = get_hdmi_pcm_name(pin_idx); 1219 info->pcm_type = HDA_PCM_TYPE_HDMI; 1220 1221 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1222 pstr->substreams = 1; 1223 pstr->ops = generic_ops; 1224 /* other pstr fields are set in open */ 1225 } 1226 1227 codec->num_pcms = spec->num_pins; 1228 codec->pcm_info = spec->pcm_rec; 1229 1230 return 0; 1231 } 1232 1233 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx) 1234 { 1235 char hdmi_str[32] = "HDMI/DP"; 1236 struct hdmi_spec *spec = codec->spec; 1237 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1238 int pcmdev = spec->pcm_rec[pin_idx].device; 1239 1240 if (pcmdev > 0) 1241 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev); 1242 1243 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0); 1244 } 1245 1246 static int generic_hdmi_build_controls(struct hda_codec *codec) 1247 { 1248 struct hdmi_spec *spec = codec->spec; 1249 int err; 1250 int pin_idx; 1251 1252 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1253 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1254 1255 err = generic_hdmi_build_jack(codec, pin_idx); 1256 if (err < 0) 1257 return err; 1258 1259 err = snd_hda_create_spdif_out_ctls(codec, 1260 per_pin->pin_nid, 1261 per_pin->mux_nids[0]); 1262 if (err < 0) 1263 return err; 1264 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1265 1266 /* add control for ELD Bytes */ 1267 err = hdmi_create_eld_ctl(codec, 1268 pin_idx, 1269 spec->pcm_rec[pin_idx].device); 1270 1271 if (err < 0) 1272 return err; 1273 1274 hdmi_present_sense(per_pin, 0); 1275 } 1276 1277 return 0; 1278 } 1279 1280 static int generic_hdmi_init(struct hda_codec *codec) 1281 { 1282 struct hdmi_spec *spec = codec->spec; 1283 int pin_idx; 1284 1285 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1286 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1287 hda_nid_t pin_nid = per_pin->pin_nid; 1288 struct hdmi_eld *eld = &per_pin->sink_eld; 1289 1290 hdmi_init_pin(codec, pin_nid); 1291 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid); 1292 1293 per_pin->codec = codec; 1294 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); 1295 snd_hda_eld_proc_new(codec, eld, pin_idx); 1296 } 1297 snd_hda_jack_report_sync(codec); 1298 return 0; 1299 } 1300 1301 static void generic_hdmi_free(struct hda_codec *codec) 1302 { 1303 struct hdmi_spec *spec = codec->spec; 1304 int pin_idx; 1305 1306 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1307 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1308 struct hdmi_eld *eld = &per_pin->sink_eld; 1309 1310 cancel_delayed_work(&per_pin->work); 1311 snd_hda_eld_proc_free(codec, eld); 1312 } 1313 1314 flush_workqueue(codec->bus->workq); 1315 kfree(spec); 1316 } 1317 1318 static const struct hda_codec_ops generic_hdmi_patch_ops = { 1319 .init = generic_hdmi_init, 1320 .free = generic_hdmi_free, 1321 .build_pcms = generic_hdmi_build_pcms, 1322 .build_controls = generic_hdmi_build_controls, 1323 .unsol_event = hdmi_unsol_event, 1324 }; 1325 1326 static int patch_generic_hdmi(struct hda_codec *codec) 1327 { 1328 struct hdmi_spec *spec; 1329 1330 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1331 if (spec == NULL) 1332 return -ENOMEM; 1333 1334 codec->spec = spec; 1335 if (hdmi_parse_codec(codec) < 0) { 1336 codec->spec = NULL; 1337 kfree(spec); 1338 return -EINVAL; 1339 } 1340 codec->patch_ops = generic_hdmi_patch_ops; 1341 1342 init_channel_allocations(); 1343 1344 return 0; 1345 } 1346 1347 /* 1348 * Shared non-generic implementations 1349 */ 1350 1351 static int simple_playback_build_pcms(struct hda_codec *codec) 1352 { 1353 struct hdmi_spec *spec = codec->spec; 1354 struct hda_pcm *info = spec->pcm_rec; 1355 int i; 1356 1357 codec->num_pcms = spec->num_cvts; 1358 codec->pcm_info = info; 1359 1360 for (i = 0; i < codec->num_pcms; i++, info++) { 1361 unsigned int chans; 1362 struct hda_pcm_stream *pstr; 1363 1364 chans = get_wcaps(codec, spec->cvts[i].cvt_nid); 1365 chans = get_wcaps_channels(chans); 1366 1367 info->name = get_hdmi_pcm_name(i); 1368 info->pcm_type = HDA_PCM_TYPE_HDMI; 1369 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1370 snd_BUG_ON(!spec->pcm_playback); 1371 *pstr = *spec->pcm_playback; 1372 pstr->nid = spec->cvts[i].cvt_nid; 1373 if (pstr->channels_max <= 2 && chans && chans <= 16) 1374 pstr->channels_max = chans; 1375 } 1376 1377 return 0; 1378 } 1379 1380 static int simple_playback_build_controls(struct hda_codec *codec) 1381 { 1382 struct hdmi_spec *spec = codec->spec; 1383 int err; 1384 int i; 1385 1386 for (i = 0; i < codec->num_pcms; i++) { 1387 err = snd_hda_create_spdif_out_ctls(codec, 1388 spec->cvts[i].cvt_nid, 1389 spec->cvts[i].cvt_nid); 1390 if (err < 0) 1391 return err; 1392 } 1393 1394 return 0; 1395 } 1396 1397 static void simple_playback_free(struct hda_codec *codec) 1398 { 1399 struct hdmi_spec *spec = codec->spec; 1400 1401 kfree(spec); 1402 } 1403 1404 /* 1405 * Nvidia specific implementations 1406 */ 1407 1408 #define Nv_VERB_SET_Channel_Allocation 0xF79 1409 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A 1410 #define Nv_VERB_SET_Audio_Protection_On 0xF98 1411 #define Nv_VERB_SET_Audio_Protection_Off 0xF99 1412 1413 #define nvhdmi_master_con_nid_7x 0x04 1414 #define nvhdmi_master_pin_nid_7x 0x05 1415 1416 static const hda_nid_t nvhdmi_con_nids_7x[4] = { 1417 /*front, rear, clfe, rear_surr */ 1418 0x6, 0x8, 0xa, 0xc, 1419 }; 1420 1421 static const struct hda_verb nvhdmi_basic_init_7x[] = { 1422 /* set audio protect on */ 1423 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1424 /* enable digital output on pin widget */ 1425 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1426 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1427 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1428 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1429 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1430 {} /* terminator */ 1431 }; 1432 1433 #ifdef LIMITED_RATE_FMT_SUPPORT 1434 /* support only the safe format and rate */ 1435 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000 1436 #define SUPPORTED_MAXBPS 16 1437 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1438 #else 1439 /* support all rates and formats */ 1440 #define SUPPORTED_RATES \ 1441 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ 1442 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 1443 SNDRV_PCM_RATE_192000) 1444 #define SUPPORTED_MAXBPS 24 1445 #define SUPPORTED_FORMATS \ 1446 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 1447 #endif 1448 1449 static int nvhdmi_7x_init(struct hda_codec *codec) 1450 { 1451 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x); 1452 return 0; 1453 } 1454 1455 static unsigned int channels_2_6_8[] = { 1456 2, 6, 8 1457 }; 1458 1459 static unsigned int channels_2_8[] = { 1460 2, 8 1461 }; 1462 1463 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = { 1464 .count = ARRAY_SIZE(channels_2_6_8), 1465 .list = channels_2_6_8, 1466 .mask = 0, 1467 }; 1468 1469 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = { 1470 .count = ARRAY_SIZE(channels_2_8), 1471 .list = channels_2_8, 1472 .mask = 0, 1473 }; 1474 1475 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, 1476 struct hda_codec *codec, 1477 struct snd_pcm_substream *substream) 1478 { 1479 struct hdmi_spec *spec = codec->spec; 1480 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL; 1481 1482 switch (codec->preset->id) { 1483 case 0x10de0002: 1484 case 0x10de0003: 1485 case 0x10de0005: 1486 case 0x10de0006: 1487 hw_constraints_channels = &hw_constraints_2_8_channels; 1488 break; 1489 case 0x10de0007: 1490 hw_constraints_channels = &hw_constraints_2_6_8_channels; 1491 break; 1492 default: 1493 break; 1494 } 1495 1496 if (hw_constraints_channels != NULL) { 1497 snd_pcm_hw_constraint_list(substream->runtime, 0, 1498 SNDRV_PCM_HW_PARAM_CHANNELS, 1499 hw_constraints_channels); 1500 } else { 1501 snd_pcm_hw_constraint_step(substream->runtime, 0, 1502 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1503 } 1504 1505 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 1506 } 1507 1508 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo, 1509 struct hda_codec *codec, 1510 struct snd_pcm_substream *substream) 1511 { 1512 struct hdmi_spec *spec = codec->spec; 1513 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1514 } 1515 1516 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1517 struct hda_codec *codec, 1518 unsigned int stream_tag, 1519 unsigned int format, 1520 struct snd_pcm_substream *substream) 1521 { 1522 struct hdmi_spec *spec = codec->spec; 1523 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, 1524 stream_tag, format, substream); 1525 } 1526 1527 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, 1528 int channels) 1529 { 1530 unsigned int chanmask; 1531 int chan = channels ? (channels - 1) : 1; 1532 1533 switch (channels) { 1534 default: 1535 case 0: 1536 case 2: 1537 chanmask = 0x00; 1538 break; 1539 case 4: 1540 chanmask = 0x08; 1541 break; 1542 case 6: 1543 chanmask = 0x0b; 1544 break; 1545 case 8: 1546 chanmask = 0x13; 1547 break; 1548 } 1549 1550 /* Set the audio infoframe channel allocation and checksum fields. The 1551 * channel count is computed implicitly by the hardware. */ 1552 snd_hda_codec_write(codec, 0x1, 0, 1553 Nv_VERB_SET_Channel_Allocation, chanmask); 1554 1555 snd_hda_codec_write(codec, 0x1, 0, 1556 Nv_VERB_SET_Info_Frame_Checksum, 1557 (0x71 - chan - chanmask)); 1558 } 1559 1560 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo, 1561 struct hda_codec *codec, 1562 struct snd_pcm_substream *substream) 1563 { 1564 struct hdmi_spec *spec = codec->spec; 1565 int i; 1566 1567 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 1568 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 1569 for (i = 0; i < 4; i++) { 1570 /* set the stream id */ 1571 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1572 AC_VERB_SET_CHANNEL_STREAMID, 0); 1573 /* set the stream format */ 1574 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1575 AC_VERB_SET_STREAM_FORMAT, 0); 1576 } 1577 1578 /* The audio hardware sends a channel count of 0x7 (8ch) when all the 1579 * streams are disabled. */ 1580 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1581 1582 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1583 } 1584 1585 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo, 1586 struct hda_codec *codec, 1587 unsigned int stream_tag, 1588 unsigned int format, 1589 struct snd_pcm_substream *substream) 1590 { 1591 int chs; 1592 unsigned int dataDCC2, channel_id; 1593 int i; 1594 struct hdmi_spec *spec = codec->spec; 1595 struct hda_spdif_out *spdif = 1596 snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid); 1597 1598 mutex_lock(&codec->spdif_mutex); 1599 1600 chs = substream->runtime->channels; 1601 1602 dataDCC2 = 0x2; 1603 1604 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 1605 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) 1606 snd_hda_codec_write(codec, 1607 nvhdmi_master_con_nid_7x, 1608 0, 1609 AC_VERB_SET_DIGI_CONVERT_1, 1610 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1611 1612 /* set the stream id */ 1613 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1614 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 1615 1616 /* set the stream format */ 1617 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1618 AC_VERB_SET_STREAM_FORMAT, format); 1619 1620 /* turn on again (if needed) */ 1621 /* enable and set the channel status audio/data flag */ 1622 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { 1623 snd_hda_codec_write(codec, 1624 nvhdmi_master_con_nid_7x, 1625 0, 1626 AC_VERB_SET_DIGI_CONVERT_1, 1627 spdif->ctls & 0xff); 1628 snd_hda_codec_write(codec, 1629 nvhdmi_master_con_nid_7x, 1630 0, 1631 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1632 } 1633 1634 for (i = 0; i < 4; i++) { 1635 if (chs == 2) 1636 channel_id = 0; 1637 else 1638 channel_id = i * 2; 1639 1640 /* turn off SPDIF once; 1641 *otherwise the IEC958 bits won't be updated 1642 */ 1643 if (codec->spdif_status_reset && 1644 (spdif->ctls & AC_DIG1_ENABLE)) 1645 snd_hda_codec_write(codec, 1646 nvhdmi_con_nids_7x[i], 1647 0, 1648 AC_VERB_SET_DIGI_CONVERT_1, 1649 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1650 /* set the stream id */ 1651 snd_hda_codec_write(codec, 1652 nvhdmi_con_nids_7x[i], 1653 0, 1654 AC_VERB_SET_CHANNEL_STREAMID, 1655 (stream_tag << 4) | channel_id); 1656 /* set the stream format */ 1657 snd_hda_codec_write(codec, 1658 nvhdmi_con_nids_7x[i], 1659 0, 1660 AC_VERB_SET_STREAM_FORMAT, 1661 format); 1662 /* turn on again (if needed) */ 1663 /* enable and set the channel status audio/data flag */ 1664 if (codec->spdif_status_reset && 1665 (spdif->ctls & AC_DIG1_ENABLE)) { 1666 snd_hda_codec_write(codec, 1667 nvhdmi_con_nids_7x[i], 1668 0, 1669 AC_VERB_SET_DIGI_CONVERT_1, 1670 spdif->ctls & 0xff); 1671 snd_hda_codec_write(codec, 1672 nvhdmi_con_nids_7x[i], 1673 0, 1674 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1675 } 1676 } 1677 1678 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); 1679 1680 mutex_unlock(&codec->spdif_mutex); 1681 return 0; 1682 } 1683 1684 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = { 1685 .substreams = 1, 1686 .channels_min = 2, 1687 .channels_max = 8, 1688 .nid = nvhdmi_master_con_nid_7x, 1689 .rates = SUPPORTED_RATES, 1690 .maxbps = SUPPORTED_MAXBPS, 1691 .formats = SUPPORTED_FORMATS, 1692 .ops = { 1693 .open = simple_playback_pcm_open, 1694 .close = nvhdmi_8ch_7x_pcm_close, 1695 .prepare = nvhdmi_8ch_7x_pcm_prepare 1696 }, 1697 }; 1698 1699 static const struct hda_pcm_stream nvhdmi_pcm_playback_2ch = { 1700 .substreams = 1, 1701 .channels_min = 2, 1702 .channels_max = 2, 1703 .nid = nvhdmi_master_con_nid_7x, 1704 .rates = SUPPORTED_RATES, 1705 .maxbps = SUPPORTED_MAXBPS, 1706 .formats = SUPPORTED_FORMATS, 1707 .ops = { 1708 .open = simple_playback_pcm_open, 1709 .close = simple_playback_pcm_close, 1710 .prepare = simple_playback_pcm_prepare 1711 }, 1712 }; 1713 1714 static const struct hda_codec_ops nvhdmi_patch_ops_8ch_7x = { 1715 .build_controls = simple_playback_build_controls, 1716 .build_pcms = simple_playback_build_pcms, 1717 .init = nvhdmi_7x_init, 1718 .free = simple_playback_free, 1719 }; 1720 1721 static const struct hda_codec_ops nvhdmi_patch_ops_2ch = { 1722 .build_controls = simple_playback_build_controls, 1723 .build_pcms = simple_playback_build_pcms, 1724 .init = nvhdmi_7x_init, 1725 .free = simple_playback_free, 1726 }; 1727 1728 static int patch_nvhdmi_2ch(struct hda_codec *codec) 1729 { 1730 struct hdmi_spec *spec; 1731 1732 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1733 if (spec == NULL) 1734 return -ENOMEM; 1735 1736 codec->spec = spec; 1737 1738 spec->multiout.num_dacs = 0; /* no analog */ 1739 spec->multiout.max_channels = 2; 1740 spec->multiout.dig_out_nid = nvhdmi_master_con_nid_7x; 1741 spec->num_cvts = 1; 1742 spec->cvts[0].cvt_nid = nvhdmi_master_con_nid_7x; 1743 spec->pcm_playback = &nvhdmi_pcm_playback_2ch; 1744 1745 codec->patch_ops = nvhdmi_patch_ops_2ch; 1746 1747 return 0; 1748 } 1749 1750 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) 1751 { 1752 struct hdmi_spec *spec; 1753 int err = patch_nvhdmi_2ch(codec); 1754 1755 if (err < 0) 1756 return err; 1757 spec = codec->spec; 1758 spec->multiout.max_channels = 8; 1759 spec->pcm_playback = &nvhdmi_pcm_playback_8ch_7x; 1760 codec->patch_ops = nvhdmi_patch_ops_8ch_7x; 1761 1762 /* Initialize the audio infoframe channel mask and checksum to something 1763 * valid */ 1764 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1765 1766 return 0; 1767 } 1768 1769 /* 1770 * ATI-specific implementations 1771 * 1772 * FIXME: we may omit the whole this and use the generic code once after 1773 * it's confirmed to work. 1774 */ 1775 1776 #define ATIHDMI_CVT_NID 0x02 /* audio converter */ 1777 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ 1778 1779 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1780 struct hda_codec *codec, 1781 unsigned int stream_tag, 1782 unsigned int format, 1783 struct snd_pcm_substream *substream) 1784 { 1785 struct hdmi_spec *spec = codec->spec; 1786 int chans = substream->runtime->channels; 1787 int i, err; 1788 1789 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, 1790 substream); 1791 if (err < 0) 1792 return err; 1793 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1794 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); 1795 /* FIXME: XXX */ 1796 for (i = 0; i < chans; i++) { 1797 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1798 AC_VERB_SET_HDMI_CHAN_SLOT, 1799 (i << 4) | i); 1800 } 1801 return 0; 1802 } 1803 1804 static const struct hda_pcm_stream atihdmi_pcm_digital_playback = { 1805 .substreams = 1, 1806 .channels_min = 2, 1807 .channels_max = 2, 1808 .nid = ATIHDMI_CVT_NID, 1809 .ops = { 1810 .open = simple_playback_pcm_open, 1811 .close = simple_playback_pcm_close, 1812 .prepare = atihdmi_playback_pcm_prepare 1813 }, 1814 }; 1815 1816 static const struct hda_verb atihdmi_basic_init[] = { 1817 /* enable digital output on pin widget */ 1818 { 0x03, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, 1819 {} /* terminator */ 1820 }; 1821 1822 static int atihdmi_init(struct hda_codec *codec) 1823 { 1824 struct hdmi_spec *spec = codec->spec; 1825 1826 snd_hda_sequence_write(codec, atihdmi_basic_init); 1827 /* SI codec requires to unmute the pin */ 1828 if (get_wcaps(codec, spec->pins[0].pin_nid) & AC_WCAP_OUT_AMP) 1829 snd_hda_codec_write(codec, spec->pins[0].pin_nid, 0, 1830 AC_VERB_SET_AMP_GAIN_MUTE, 1831 AMP_OUT_UNMUTE); 1832 return 0; 1833 } 1834 1835 static const struct hda_codec_ops atihdmi_patch_ops = { 1836 .build_controls = simple_playback_build_controls, 1837 .build_pcms = simple_playback_build_pcms, 1838 .init = atihdmi_init, 1839 .free = simple_playback_free, 1840 }; 1841 1842 1843 static int patch_atihdmi(struct hda_codec *codec) 1844 { 1845 struct hdmi_spec *spec; 1846 1847 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1848 if (spec == NULL) 1849 return -ENOMEM; 1850 1851 codec->spec = spec; 1852 1853 spec->multiout.num_dacs = 0; /* no analog */ 1854 spec->multiout.max_channels = 2; 1855 spec->multiout.dig_out_nid = ATIHDMI_CVT_NID; 1856 spec->num_cvts = 1; 1857 spec->cvts[0].cvt_nid = ATIHDMI_CVT_NID; 1858 spec->pins[0].pin_nid = ATIHDMI_PIN_NID; 1859 spec->pcm_playback = &atihdmi_pcm_digital_playback; 1860 1861 codec->patch_ops = atihdmi_patch_ops; 1862 1863 return 0; 1864 } 1865 1866 1867 /* 1868 * patch entries 1869 */ 1870 static const struct hda_codec_preset snd_hda_preset_hdmi[] = { 1871 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1872 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1873 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, 1874 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, 1875 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, 1876 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, 1877 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, 1878 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1879 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1880 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1881 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1882 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, 1883 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, 1884 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, 1885 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, 1886 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, 1887 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, 1888 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, 1889 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, 1890 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, 1891 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, 1892 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, 1893 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, 1894 /* 17 is known to be absent */ 1895 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, 1896 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, 1897 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, 1898 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, 1899 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, 1900 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, 1901 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, 1902 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, 1903 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, 1904 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, 1905 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 1906 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 1907 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1908 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi }, 1909 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi }, 1910 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi }, 1911 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1912 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, 1913 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, 1914 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, 1915 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, 1916 {} /* terminator */ 1917 }; 1918 1919 MODULE_ALIAS("snd-hda-codec-id:1002793c"); 1920 MODULE_ALIAS("snd-hda-codec-id:10027919"); 1921 MODULE_ALIAS("snd-hda-codec-id:1002791a"); 1922 MODULE_ALIAS("snd-hda-codec-id:1002aa01"); 1923 MODULE_ALIAS("snd-hda-codec-id:10951390"); 1924 MODULE_ALIAS("snd-hda-codec-id:10951392"); 1925 MODULE_ALIAS("snd-hda-codec-id:10de0002"); 1926 MODULE_ALIAS("snd-hda-codec-id:10de0003"); 1927 MODULE_ALIAS("snd-hda-codec-id:10de0005"); 1928 MODULE_ALIAS("snd-hda-codec-id:10de0006"); 1929 MODULE_ALIAS("snd-hda-codec-id:10de0007"); 1930 MODULE_ALIAS("snd-hda-codec-id:10de000a"); 1931 MODULE_ALIAS("snd-hda-codec-id:10de000b"); 1932 MODULE_ALIAS("snd-hda-codec-id:10de000c"); 1933 MODULE_ALIAS("snd-hda-codec-id:10de000d"); 1934 MODULE_ALIAS("snd-hda-codec-id:10de0010"); 1935 MODULE_ALIAS("snd-hda-codec-id:10de0011"); 1936 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 1937 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 1938 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 1939 MODULE_ALIAS("snd-hda-codec-id:10de0015"); 1940 MODULE_ALIAS("snd-hda-codec-id:10de0016"); 1941 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 1942 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 1943 MODULE_ALIAS("snd-hda-codec-id:10de001a"); 1944 MODULE_ALIAS("snd-hda-codec-id:10de001b"); 1945 MODULE_ALIAS("snd-hda-codec-id:10de001c"); 1946 MODULE_ALIAS("snd-hda-codec-id:10de0040"); 1947 MODULE_ALIAS("snd-hda-codec-id:10de0041"); 1948 MODULE_ALIAS("snd-hda-codec-id:10de0042"); 1949 MODULE_ALIAS("snd-hda-codec-id:10de0043"); 1950 MODULE_ALIAS("snd-hda-codec-id:10de0044"); 1951 MODULE_ALIAS("snd-hda-codec-id:10de0067"); 1952 MODULE_ALIAS("snd-hda-codec-id:10de8001"); 1953 MODULE_ALIAS("snd-hda-codec-id:17e80047"); 1954 MODULE_ALIAS("snd-hda-codec-id:80860054"); 1955 MODULE_ALIAS("snd-hda-codec-id:80862801"); 1956 MODULE_ALIAS("snd-hda-codec-id:80862802"); 1957 MODULE_ALIAS("snd-hda-codec-id:80862803"); 1958 MODULE_ALIAS("snd-hda-codec-id:80862804"); 1959 MODULE_ALIAS("snd-hda-codec-id:80862805"); 1960 MODULE_ALIAS("snd-hda-codec-id:80862806"); 1961 MODULE_ALIAS("snd-hda-codec-id:80862880"); 1962 MODULE_ALIAS("snd-hda-codec-id:808629fb"); 1963 1964 MODULE_LICENSE("GPL"); 1965 MODULE_DESCRIPTION("HDMI HD-audio codec"); 1966 MODULE_ALIAS("snd-hda-codec-intelhdmi"); 1967 MODULE_ALIAS("snd-hda-codec-nvhdmi"); 1968 MODULE_ALIAS("snd-hda-codec-atihdmi"); 1969 1970 static struct hda_codec_preset_list intel_list = { 1971 .preset = snd_hda_preset_hdmi, 1972 .owner = THIS_MODULE, 1973 }; 1974 1975 static int __init patch_hdmi_init(void) 1976 { 1977 return snd_hda_add_codec_preset(&intel_list); 1978 } 1979 1980 static void __exit patch_hdmi_exit(void) 1981 { 1982 snd_hda_delete_codec_preset(&intel_list); 1983 } 1984 1985 module_init(patch_hdmi_init) 1986 module_exit(patch_hdmi_exit) 1987