1 /* 2 * 3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs 4 * 5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved. 6 * Copyright (c) 2006 ATI Technologies Inc. 7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved. 8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com> 9 * 10 * Authors: 11 * Wu Fengguang <wfg@linux.intel.com> 12 * 13 * Maintained by: 14 * Wu Fengguang <wfg@linux.intel.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the Free 18 * Software Foundation; either version 2 of the License, or (at your option) 19 * any later version. 20 * 21 * This program is distributed in the hope that it will be useful, but 22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 * for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software Foundation, 28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 */ 30 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/module.h> 35 #include <sound/core.h> 36 #include <sound/jack.h> 37 #include <sound/asoundef.h> 38 #include <sound/tlv.h> 39 #include "hda_codec.h" 40 #include "hda_local.h" 41 #include "hda_jack.h" 42 43 static bool static_hdmi_pcm; 44 module_param(static_hdmi_pcm, bool, 0644); 45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); 46 47 /* 48 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device 49 * could support N independent pipes, each of them can be connected to one or 50 * more ports (DVI, HDMI or DisplayPort). 51 * 52 * The HDA correspondence of pipes/ports are converter/pin nodes. 53 */ 54 #define MAX_HDMI_CVTS 8 55 #define MAX_HDMI_PINS 8 56 57 struct hdmi_spec_per_cvt { 58 hda_nid_t cvt_nid; 59 int assigned; 60 unsigned int channels_min; 61 unsigned int channels_max; 62 u32 rates; 63 u64 formats; 64 unsigned int maxbps; 65 }; 66 67 /* max. connections to a widget */ 68 #define HDA_MAX_CONNECTIONS 32 69 70 struct hdmi_spec_per_pin { 71 hda_nid_t pin_nid; 72 int num_mux_nids; 73 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; 74 75 struct hda_codec *codec; 76 struct hdmi_eld sink_eld; 77 struct delayed_work work; 78 struct snd_kcontrol *eld_ctl; 79 int repoll_count; 80 bool non_pcm; 81 bool chmap_set; /* channel-map override by ALSA API? */ 82 unsigned char chmap[8]; /* ALSA API channel-map */ 83 }; 84 85 struct hdmi_spec { 86 int num_cvts; 87 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS]; 88 hda_nid_t cvt_nids[MAX_HDMI_CVTS]; 89 90 int num_pins; 91 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS]; 92 struct hda_pcm pcm_rec[MAX_HDMI_PINS]; 93 unsigned int channels_max; /* max over all cvts */ 94 95 struct hdmi_eld temp_eld; 96 /* 97 * Non-generic ATI/NVIDIA specific 98 */ 99 struct hda_multi_out multiout; 100 struct hda_pcm_stream pcm_playback; 101 }; 102 103 104 struct hdmi_audio_infoframe { 105 u8 type; /* 0x84 */ 106 u8 ver; /* 0x01 */ 107 u8 len; /* 0x0a */ 108 109 u8 checksum; 110 111 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ 112 u8 SS01_SF24; 113 u8 CXT04; 114 u8 CA; 115 u8 LFEPBL01_LSV36_DM_INH7; 116 }; 117 118 struct dp_audio_infoframe { 119 u8 type; /* 0x84 */ 120 u8 len; /* 0x1b */ 121 u8 ver; /* 0x11 << 2 */ 122 123 u8 CC02_CT47; /* match with HDMI infoframe from this on */ 124 u8 SS01_SF24; 125 u8 CXT04; 126 u8 CA; 127 u8 LFEPBL01_LSV36_DM_INH7; 128 }; 129 130 union audio_infoframe { 131 struct hdmi_audio_infoframe hdmi; 132 struct dp_audio_infoframe dp; 133 u8 bytes[0]; 134 }; 135 136 /* 137 * CEA speaker placement: 138 * 139 * FLH FCH FRH 140 * FLW FL FLC FC FRC FR FRW 141 * 142 * LFE 143 * TC 144 * 145 * RL RLC RC RRC RR 146 * 147 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to 148 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. 149 */ 150 enum cea_speaker_placement { 151 FL = (1 << 0), /* Front Left */ 152 FC = (1 << 1), /* Front Center */ 153 FR = (1 << 2), /* Front Right */ 154 FLC = (1 << 3), /* Front Left Center */ 155 FRC = (1 << 4), /* Front Right Center */ 156 RL = (1 << 5), /* Rear Left */ 157 RC = (1 << 6), /* Rear Center */ 158 RR = (1 << 7), /* Rear Right */ 159 RLC = (1 << 8), /* Rear Left Center */ 160 RRC = (1 << 9), /* Rear Right Center */ 161 LFE = (1 << 10), /* Low Frequency Effect */ 162 FLW = (1 << 11), /* Front Left Wide */ 163 FRW = (1 << 12), /* Front Right Wide */ 164 FLH = (1 << 13), /* Front Left High */ 165 FCH = (1 << 14), /* Front Center High */ 166 FRH = (1 << 15), /* Front Right High */ 167 TC = (1 << 16), /* Top Center */ 168 }; 169 170 /* 171 * ELD SA bits in the CEA Speaker Allocation data block 172 */ 173 static int eld_speaker_allocation_bits[] = { 174 [0] = FL | FR, 175 [1] = LFE, 176 [2] = FC, 177 [3] = RL | RR, 178 [4] = RC, 179 [5] = FLC | FRC, 180 [6] = RLC | RRC, 181 /* the following are not defined in ELD yet */ 182 [7] = FLW | FRW, 183 [8] = FLH | FRH, 184 [9] = TC, 185 [10] = FCH, 186 }; 187 188 struct cea_channel_speaker_allocation { 189 int ca_index; 190 int speakers[8]; 191 192 /* derived values, just for convenience */ 193 int channels; 194 int spk_mask; 195 }; 196 197 /* 198 * ALSA sequence is: 199 * 200 * surround40 surround41 surround50 surround51 surround71 201 * ch0 front left = = = = 202 * ch1 front right = = = = 203 * ch2 rear left = = = = 204 * ch3 rear right = = = = 205 * ch4 LFE center center center 206 * ch5 LFE LFE 207 * ch6 side left 208 * ch7 side right 209 * 210 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR} 211 */ 212 static int hdmi_channel_mapping[0x32][8] = { 213 /* stereo */ 214 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 215 /* 2.1 */ 216 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 217 /* Dolby Surround */ 218 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 }, 219 /* surround40 */ 220 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 }, 221 /* 4ch */ 222 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 }, 223 /* surround41 */ 224 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 }, 225 /* surround50 */ 226 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 }, 227 /* surround51 */ 228 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 }, 229 /* 7.1 */ 230 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 }, 231 }; 232 233 /* 234 * This is an ordered list! 235 * 236 * The preceding ones have better chances to be selected by 237 * hdmi_channel_allocation(). 238 */ 239 static struct cea_channel_speaker_allocation channel_allocations[] = { 240 /* channel: 7 6 5 4 3 2 1 0 */ 241 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, 242 /* 2.1 */ 243 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, 244 /* Dolby Surround */ 245 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, 246 /* surround40 */ 247 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, 248 /* surround41 */ 249 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, 250 /* surround50 */ 251 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, 252 /* surround51 */ 253 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, 254 /* 6.1 */ 255 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, 256 /* surround71 */ 257 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, 258 259 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, 260 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, 261 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, 262 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, 263 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, 264 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, 265 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, 266 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, 267 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, 268 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, 269 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, 270 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, 271 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, 272 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, 273 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, 274 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, 275 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, 276 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, 277 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, 278 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, 279 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, 280 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, 281 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, 282 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, 283 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, 284 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, 285 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, 286 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, 287 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, 288 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, 289 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, 290 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, 291 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, 292 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, 293 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, 294 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, 295 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, 296 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, 297 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, 298 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, 299 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, 300 }; 301 302 303 /* 304 * HDMI routines 305 */ 306 307 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid) 308 { 309 int pin_idx; 310 311 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 312 if (spec->pins[pin_idx].pin_nid == pin_nid) 313 return pin_idx; 314 315 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid); 316 return -EINVAL; 317 } 318 319 static int hinfo_to_pin_index(struct hdmi_spec *spec, 320 struct hda_pcm_stream *hinfo) 321 { 322 int pin_idx; 323 324 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 325 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo) 326 return pin_idx; 327 328 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo); 329 return -EINVAL; 330 } 331 332 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid) 333 { 334 int cvt_idx; 335 336 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) 337 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid) 338 return cvt_idx; 339 340 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid); 341 return -EINVAL; 342 } 343 344 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 345 struct snd_ctl_elem_info *uinfo) 346 { 347 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 348 struct hdmi_spec *spec = codec->spec; 349 struct hdmi_eld *eld; 350 int pin_idx; 351 352 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 353 354 pin_idx = kcontrol->private_value; 355 eld = &spec->pins[pin_idx].sink_eld; 356 357 mutex_lock(&eld->lock); 358 uinfo->count = eld->eld_valid ? eld->eld_size : 0; 359 mutex_unlock(&eld->lock); 360 361 return 0; 362 } 363 364 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 365 struct snd_ctl_elem_value *ucontrol) 366 { 367 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 368 struct hdmi_spec *spec = codec->spec; 369 struct hdmi_eld *eld; 370 int pin_idx; 371 372 pin_idx = kcontrol->private_value; 373 eld = &spec->pins[pin_idx].sink_eld; 374 375 mutex_lock(&eld->lock); 376 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) { 377 mutex_unlock(&eld->lock); 378 snd_BUG(); 379 return -EINVAL; 380 } 381 382 memset(ucontrol->value.bytes.data, 0, 383 ARRAY_SIZE(ucontrol->value.bytes.data)); 384 if (eld->eld_valid) 385 memcpy(ucontrol->value.bytes.data, eld->eld_buffer, 386 eld->eld_size); 387 mutex_unlock(&eld->lock); 388 389 return 0; 390 } 391 392 static struct snd_kcontrol_new eld_bytes_ctl = { 393 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 394 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 395 .name = "ELD", 396 .info = hdmi_eld_ctl_info, 397 .get = hdmi_eld_ctl_get, 398 }; 399 400 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx, 401 int device) 402 { 403 struct snd_kcontrol *kctl; 404 struct hdmi_spec *spec = codec->spec; 405 int err; 406 407 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); 408 if (!kctl) 409 return -ENOMEM; 410 kctl->private_value = pin_idx; 411 kctl->id.device = device; 412 413 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl); 414 if (err < 0) 415 return err; 416 417 spec->pins[pin_idx].eld_ctl = kctl; 418 return 0; 419 } 420 421 #ifdef BE_PARANOID 422 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 423 int *packet_index, int *byte_index) 424 { 425 int val; 426 427 val = snd_hda_codec_read(codec, pin_nid, 0, 428 AC_VERB_GET_HDMI_DIP_INDEX, 0); 429 430 *packet_index = val >> 5; 431 *byte_index = val & 0x1f; 432 } 433 #endif 434 435 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 436 int packet_index, int byte_index) 437 { 438 int val; 439 440 val = (packet_index << 5) | (byte_index & 0x1f); 441 442 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); 443 } 444 445 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, 446 unsigned char val) 447 { 448 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); 449 } 450 451 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) 452 { 453 /* Unmute */ 454 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) 455 snd_hda_codec_write(codec, pin_nid, 0, 456 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); 457 /* Enable pin out: some machines with GM965 gets broken output when 458 * the pin is disabled or changed while using with HDMI 459 */ 460 snd_hda_codec_write(codec, pin_nid, 0, 461 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); 462 } 463 464 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid) 465 { 466 return 1 + snd_hda_codec_read(codec, cvt_nid, 0, 467 AC_VERB_GET_CVT_CHAN_COUNT, 0); 468 } 469 470 static void hdmi_set_channel_count(struct hda_codec *codec, 471 hda_nid_t cvt_nid, int chs) 472 { 473 if (chs != hdmi_get_channel_count(codec, cvt_nid)) 474 snd_hda_codec_write(codec, cvt_nid, 0, 475 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); 476 } 477 478 479 /* 480 * Channel mapping routines 481 */ 482 483 /* 484 * Compute derived values in channel_allocations[]. 485 */ 486 static void init_channel_allocations(void) 487 { 488 int i, j; 489 struct cea_channel_speaker_allocation *p; 490 491 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 492 p = channel_allocations + i; 493 p->channels = 0; 494 p->spk_mask = 0; 495 for (j = 0; j < ARRAY_SIZE(p->speakers); j++) 496 if (p->speakers[j]) { 497 p->channels++; 498 p->spk_mask |= p->speakers[j]; 499 } 500 } 501 } 502 503 static int get_channel_allocation_order(int ca) 504 { 505 int i; 506 507 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 508 if (channel_allocations[i].ca_index == ca) 509 break; 510 } 511 return i; 512 } 513 514 /* 515 * The transformation takes two steps: 516 * 517 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask 518 * spk_mask => (channel_allocations[]) => ai->CA 519 * 520 * TODO: it could select the wrong CA from multiple candidates. 521 */ 522 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels) 523 { 524 int i; 525 int ca = 0; 526 int spk_mask = 0; 527 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; 528 529 /* 530 * CA defaults to 0 for basic stereo audio 531 */ 532 if (channels <= 2) 533 return 0; 534 535 /* 536 * expand ELD's speaker allocation mask 537 * 538 * ELD tells the speaker mask in a compact(paired) form, 539 * expand ELD's notions to match the ones used by Audio InfoFrame. 540 */ 541 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { 542 if (eld->info.spk_alloc & (1 << i)) 543 spk_mask |= eld_speaker_allocation_bits[i]; 544 } 545 546 /* search for the first working match in the CA table */ 547 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 548 if (channels == channel_allocations[i].channels && 549 (spk_mask & channel_allocations[i].spk_mask) == 550 channel_allocations[i].spk_mask) { 551 ca = channel_allocations[i].ca_index; 552 break; 553 } 554 } 555 556 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf)); 557 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", 558 ca, channels, buf); 559 560 return ca; 561 } 562 563 static void hdmi_debug_channel_mapping(struct hda_codec *codec, 564 hda_nid_t pin_nid) 565 { 566 #ifdef CONFIG_SND_DEBUG_VERBOSE 567 int i; 568 int slot; 569 570 for (i = 0; i < 8; i++) { 571 slot = snd_hda_codec_read(codec, pin_nid, 0, 572 AC_VERB_GET_HDMI_CHAN_SLOT, i); 573 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", 574 slot >> 4, slot & 0xf); 575 } 576 #endif 577 } 578 579 580 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec, 581 hda_nid_t pin_nid, 582 bool non_pcm, 583 int ca) 584 { 585 int i; 586 int err; 587 int order; 588 int non_pcm_mapping[8]; 589 590 order = get_channel_allocation_order(ca); 591 592 if (hdmi_channel_mapping[ca][1] == 0) { 593 for (i = 0; i < channel_allocations[order].channels; i++) 594 hdmi_channel_mapping[ca][i] = i | (i << 4); 595 for (; i < 8; i++) 596 hdmi_channel_mapping[ca][i] = 0xf | (i << 4); 597 } 598 599 if (non_pcm) { 600 for (i = 0; i < channel_allocations[order].channels; i++) 601 non_pcm_mapping[i] = i | (i << 4); 602 for (; i < 8; i++) 603 non_pcm_mapping[i] = 0xf | (i << 4); 604 } 605 606 for (i = 0; i < 8; i++) { 607 err = snd_hda_codec_write(codec, pin_nid, 0, 608 AC_VERB_SET_HDMI_CHAN_SLOT, 609 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]); 610 if (err) { 611 snd_printdd(KERN_NOTICE 612 "HDMI: channel mapping failed\n"); 613 break; 614 } 615 } 616 617 hdmi_debug_channel_mapping(codec, pin_nid); 618 } 619 620 struct channel_map_table { 621 unsigned char map; /* ALSA API channel map position */ 622 unsigned char cea_slot; /* CEA slot value */ 623 int spk_mask; /* speaker position bit mask */ 624 }; 625 626 static struct channel_map_table map_tables[] = { 627 { SNDRV_CHMAP_FL, 0x00, FL }, 628 { SNDRV_CHMAP_FR, 0x01, FR }, 629 { SNDRV_CHMAP_RL, 0x04, RL }, 630 { SNDRV_CHMAP_RR, 0x05, RR }, 631 { SNDRV_CHMAP_LFE, 0x02, LFE }, 632 { SNDRV_CHMAP_FC, 0x03, FC }, 633 { SNDRV_CHMAP_RLC, 0x06, RLC }, 634 { SNDRV_CHMAP_RRC, 0x07, RRC }, 635 {} /* terminator */ 636 }; 637 638 /* from ALSA API channel position to speaker bit mask */ 639 static int to_spk_mask(unsigned char c) 640 { 641 struct channel_map_table *t = map_tables; 642 for (; t->map; t++) { 643 if (t->map == c) 644 return t->spk_mask; 645 } 646 return 0; 647 } 648 649 /* from ALSA API channel position to CEA slot */ 650 static int to_cea_slot(unsigned char c) 651 { 652 struct channel_map_table *t = map_tables; 653 for (; t->map; t++) { 654 if (t->map == c) 655 return t->cea_slot; 656 } 657 return 0x0f; 658 } 659 660 /* from CEA slot to ALSA API channel position */ 661 static int from_cea_slot(unsigned char c) 662 { 663 struct channel_map_table *t = map_tables; 664 for (; t->map; t++) { 665 if (t->cea_slot == c) 666 return t->map; 667 } 668 return 0; 669 } 670 671 /* from speaker bit mask to ALSA API channel position */ 672 static int spk_to_chmap(int spk) 673 { 674 struct channel_map_table *t = map_tables; 675 for (; t->map; t++) { 676 if (t->spk_mask == spk) 677 return t->map; 678 } 679 return 0; 680 } 681 682 /* get the CA index corresponding to the given ALSA API channel map */ 683 static int hdmi_manual_channel_allocation(int chs, unsigned char *map) 684 { 685 int i, spks = 0, spk_mask = 0; 686 687 for (i = 0; i < chs; i++) { 688 int mask = to_spk_mask(map[i]); 689 if (mask) { 690 spk_mask |= mask; 691 spks++; 692 } 693 } 694 695 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 696 if ((chs == channel_allocations[i].channels || 697 spks == channel_allocations[i].channels) && 698 (spk_mask & channel_allocations[i].spk_mask) == 699 channel_allocations[i].spk_mask) 700 return channel_allocations[i].ca_index; 701 } 702 return -1; 703 } 704 705 /* set up the channel slots for the given ALSA API channel map */ 706 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec, 707 hda_nid_t pin_nid, 708 int chs, unsigned char *map) 709 { 710 int i; 711 for (i = 0; i < 8; i++) { 712 int val, err; 713 if (i < chs) 714 val = to_cea_slot(map[i]); 715 else 716 val = 0xf; 717 val |= (i << 4); 718 err = snd_hda_codec_write(codec, pin_nid, 0, 719 AC_VERB_SET_HDMI_CHAN_SLOT, val); 720 if (err) 721 return -EINVAL; 722 } 723 return 0; 724 } 725 726 /* store ALSA API channel map from the current default map */ 727 static void hdmi_setup_fake_chmap(unsigned char *map, int ca) 728 { 729 int i; 730 for (i = 0; i < 8; i++) { 731 if (i < channel_allocations[ca].channels) 732 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f); 733 else 734 map[i] = 0; 735 } 736 } 737 738 static void hdmi_setup_channel_mapping(struct hda_codec *codec, 739 hda_nid_t pin_nid, bool non_pcm, int ca, 740 int channels, unsigned char *map, 741 bool chmap_set) 742 { 743 if (!non_pcm && chmap_set) { 744 hdmi_manual_setup_channel_mapping(codec, pin_nid, 745 channels, map); 746 } else { 747 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca); 748 hdmi_setup_fake_chmap(map, ca); 749 } 750 } 751 752 /* 753 * Audio InfoFrame routines 754 */ 755 756 /* 757 * Enable Audio InfoFrame Transmission 758 */ 759 static void hdmi_start_infoframe_trans(struct hda_codec *codec, 760 hda_nid_t pin_nid) 761 { 762 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 763 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 764 AC_DIPXMIT_BEST); 765 } 766 767 /* 768 * Disable Audio InfoFrame Transmission 769 */ 770 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, 771 hda_nid_t pin_nid) 772 { 773 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 774 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 775 AC_DIPXMIT_DISABLE); 776 } 777 778 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) 779 { 780 #ifdef CONFIG_SND_DEBUG_VERBOSE 781 int i; 782 int size; 783 784 size = snd_hdmi_get_eld_size(codec, pin_nid); 785 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); 786 787 for (i = 0; i < 8; i++) { 788 size = snd_hda_codec_read(codec, pin_nid, 0, 789 AC_VERB_GET_HDMI_DIP_SIZE, i); 790 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); 791 } 792 #endif 793 } 794 795 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) 796 { 797 #ifdef BE_PARANOID 798 int i, j; 799 int size; 800 int pi, bi; 801 for (i = 0; i < 8; i++) { 802 size = snd_hda_codec_read(codec, pin_nid, 0, 803 AC_VERB_GET_HDMI_DIP_SIZE, i); 804 if (size == 0) 805 continue; 806 807 hdmi_set_dip_index(codec, pin_nid, i, 0x0); 808 for (j = 1; j < 1000; j++) { 809 hdmi_write_dip_byte(codec, pin_nid, 0x0); 810 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); 811 if (pi != i) 812 snd_printd(KERN_INFO "dip index %d: %d != %d\n", 813 bi, pi, i); 814 if (bi == 0) /* byte index wrapped around */ 815 break; 816 } 817 snd_printd(KERN_INFO 818 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", 819 i, size, j); 820 } 821 #endif 822 } 823 824 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai) 825 { 826 u8 *bytes = (u8 *)hdmi_ai; 827 u8 sum = 0; 828 int i; 829 830 hdmi_ai->checksum = 0; 831 832 for (i = 0; i < sizeof(*hdmi_ai); i++) 833 sum += bytes[i]; 834 835 hdmi_ai->checksum = -sum; 836 } 837 838 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, 839 hda_nid_t pin_nid, 840 u8 *dip, int size) 841 { 842 int i; 843 844 hdmi_debug_dip_size(codec, pin_nid); 845 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ 846 847 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 848 for (i = 0; i < size; i++) 849 hdmi_write_dip_byte(codec, pin_nid, dip[i]); 850 } 851 852 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, 853 u8 *dip, int size) 854 { 855 u8 val; 856 int i; 857 858 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) 859 != AC_DIPXMIT_BEST) 860 return false; 861 862 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 863 for (i = 0; i < size; i++) { 864 val = snd_hda_codec_read(codec, pin_nid, 0, 865 AC_VERB_GET_HDMI_DIP_DATA, 0); 866 if (val != dip[i]) 867 return false; 868 } 869 870 return true; 871 } 872 873 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx, 874 bool non_pcm, 875 struct snd_pcm_substream *substream) 876 { 877 struct hdmi_spec *spec = codec->spec; 878 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 879 hda_nid_t pin_nid = per_pin->pin_nid; 880 int channels = substream->runtime->channels; 881 struct hdmi_eld *eld; 882 int ca; 883 union audio_infoframe ai; 884 885 eld = &spec->pins[pin_idx].sink_eld; 886 if (!eld->monitor_present) 887 return; 888 889 if (!non_pcm && per_pin->chmap_set) 890 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap); 891 else 892 ca = hdmi_channel_allocation(eld, channels); 893 if (ca < 0) 894 ca = 0; 895 896 memset(&ai, 0, sizeof(ai)); 897 if (eld->info.conn_type == 0) { /* HDMI */ 898 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; 899 900 hdmi_ai->type = 0x84; 901 hdmi_ai->ver = 0x01; 902 hdmi_ai->len = 0x0a; 903 hdmi_ai->CC02_CT47 = channels - 1; 904 hdmi_ai->CA = ca; 905 hdmi_checksum_audio_infoframe(hdmi_ai); 906 } else if (eld->info.conn_type == 1) { /* DisplayPort */ 907 struct dp_audio_infoframe *dp_ai = &ai.dp; 908 909 dp_ai->type = 0x84; 910 dp_ai->len = 0x1b; 911 dp_ai->ver = 0x11 << 2; 912 dp_ai->CC02_CT47 = channels - 1; 913 dp_ai->CA = ca; 914 } else { 915 snd_printd("HDMI: unknown connection type at pin %d\n", 916 pin_nid); 917 return; 918 } 919 920 /* 921 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or 922 * sizeof(*dp_ai) to avoid partial match/update problems when 923 * the user switches between HDMI/DP monitors. 924 */ 925 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, 926 sizeof(ai))) { 927 snd_printdd("hdmi_setup_audio_infoframe: " 928 "pin=%d channels=%d\n", 929 pin_nid, 930 channels); 931 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, 932 channels, per_pin->chmap, 933 per_pin->chmap_set); 934 hdmi_stop_infoframe_trans(codec, pin_nid); 935 hdmi_fill_audio_infoframe(codec, pin_nid, 936 ai.bytes, sizeof(ai)); 937 hdmi_start_infoframe_trans(codec, pin_nid); 938 } else { 939 /* For non-pcm audio switch, setup new channel mapping 940 * accordingly */ 941 if (per_pin->non_pcm != non_pcm) 942 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, 943 channels, per_pin->chmap, 944 per_pin->chmap_set); 945 } 946 947 per_pin->non_pcm = non_pcm; 948 } 949 950 951 /* 952 * Unsolicited events 953 */ 954 955 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); 956 957 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 958 { 959 struct hdmi_spec *spec = codec->spec; 960 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 961 int pin_nid; 962 int pin_idx; 963 struct hda_jack_tbl *jack; 964 965 jack = snd_hda_jack_tbl_get_from_tag(codec, tag); 966 if (!jack) 967 return; 968 pin_nid = jack->nid; 969 jack->jack_dirty = 1; 970 971 _snd_printd(SND_PR_VERBOSE, 972 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 973 codec->addr, pin_nid, 974 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV)); 975 976 pin_idx = pin_nid_to_pin_index(spec, pin_nid); 977 if (pin_idx < 0) 978 return; 979 980 hdmi_present_sense(&spec->pins[pin_idx], 1); 981 snd_hda_jack_report_sync(codec); 982 } 983 984 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 985 { 986 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 987 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 988 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); 989 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); 990 991 printk(KERN_INFO 992 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", 993 codec->addr, 994 tag, 995 subtag, 996 cp_state, 997 cp_ready); 998 999 /* TODO */ 1000 if (cp_state) 1001 ; 1002 if (cp_ready) 1003 ; 1004 } 1005 1006 1007 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) 1008 { 1009 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 1010 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 1011 1012 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) { 1013 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); 1014 return; 1015 } 1016 1017 if (subtag == 0) 1018 hdmi_intrinsic_event(codec, res); 1019 else 1020 hdmi_non_intrinsic_event(codec, res); 1021 } 1022 1023 /* 1024 * Callbacks 1025 */ 1026 1027 /* HBR should be Non-PCM, 8 channels */ 1028 #define is_hbr_format(format) \ 1029 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) 1030 1031 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, 1032 hda_nid_t pin_nid, u32 stream_tag, int format) 1033 { 1034 int pinctl; 1035 int new_pinctl = 0; 1036 1037 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 1038 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 1039 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1040 1041 new_pinctl = pinctl & ~AC_PINCTL_EPT; 1042 if (is_hbr_format(format)) 1043 new_pinctl |= AC_PINCTL_EPT_HBR; 1044 else 1045 new_pinctl |= AC_PINCTL_EPT_NATIVE; 1046 1047 snd_printdd("hdmi_setup_stream: " 1048 "NID=0x%x, %spinctl=0x%x\n", 1049 pin_nid, 1050 pinctl == new_pinctl ? "" : "new-", 1051 new_pinctl); 1052 1053 if (pinctl != new_pinctl) 1054 snd_hda_codec_write(codec, pin_nid, 0, 1055 AC_VERB_SET_PIN_WIDGET_CONTROL, 1056 new_pinctl); 1057 1058 } 1059 if (is_hbr_format(format) && !new_pinctl) { 1060 snd_printdd("hdmi_setup_stream: HBR is not supported\n"); 1061 return -EINVAL; 1062 } 1063 1064 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); 1065 return 0; 1066 } 1067 1068 /* 1069 * HDA PCM callbacks 1070 */ 1071 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, 1072 struct hda_codec *codec, 1073 struct snd_pcm_substream *substream) 1074 { 1075 struct hdmi_spec *spec = codec->spec; 1076 struct snd_pcm_runtime *runtime = substream->runtime; 1077 int pin_idx, cvt_idx, mux_idx = 0; 1078 struct hdmi_spec_per_pin *per_pin; 1079 struct hdmi_eld *eld; 1080 struct hdmi_spec_per_cvt *per_cvt = NULL; 1081 1082 /* Validate hinfo */ 1083 pin_idx = hinfo_to_pin_index(spec, hinfo); 1084 if (snd_BUG_ON(pin_idx < 0)) 1085 return -EINVAL; 1086 per_pin = &spec->pins[pin_idx]; 1087 eld = &per_pin->sink_eld; 1088 1089 /* Dynamically assign converter to stream */ 1090 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { 1091 per_cvt = &spec->cvts[cvt_idx]; 1092 1093 /* Must not already be assigned */ 1094 if (per_cvt->assigned) 1095 continue; 1096 /* Must be in pin's mux's list of converters */ 1097 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) 1098 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) 1099 break; 1100 /* Not in mux list */ 1101 if (mux_idx == per_pin->num_mux_nids) 1102 continue; 1103 break; 1104 } 1105 /* No free converters */ 1106 if (cvt_idx == spec->num_cvts) 1107 return -ENODEV; 1108 1109 /* Claim converter */ 1110 per_cvt->assigned = 1; 1111 hinfo->nid = per_cvt->cvt_nid; 1112 1113 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 1114 AC_VERB_SET_CONNECT_SEL, 1115 mux_idx); 1116 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); 1117 1118 /* Initially set the converter's capabilities */ 1119 hinfo->channels_min = per_cvt->channels_min; 1120 hinfo->channels_max = per_cvt->channels_max; 1121 hinfo->rates = per_cvt->rates; 1122 hinfo->formats = per_cvt->formats; 1123 hinfo->maxbps = per_cvt->maxbps; 1124 1125 /* Restrict capabilities by ELD if this isn't disabled */ 1126 if (!static_hdmi_pcm && eld->eld_valid) { 1127 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo); 1128 if (hinfo->channels_min > hinfo->channels_max || 1129 !hinfo->rates || !hinfo->formats) { 1130 per_cvt->assigned = 0; 1131 hinfo->nid = 0; 1132 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1133 return -ENODEV; 1134 } 1135 } 1136 1137 /* Store the updated parameters */ 1138 runtime->hw.channels_min = hinfo->channels_min; 1139 runtime->hw.channels_max = hinfo->channels_max; 1140 runtime->hw.formats = hinfo->formats; 1141 runtime->hw.rates = hinfo->rates; 1142 1143 snd_pcm_hw_constraint_step(substream->runtime, 0, 1144 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1145 return 0; 1146 } 1147 1148 /* 1149 * HDA/HDMI auto parsing 1150 */ 1151 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) 1152 { 1153 struct hdmi_spec *spec = codec->spec; 1154 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1155 hda_nid_t pin_nid = per_pin->pin_nid; 1156 1157 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { 1158 snd_printk(KERN_WARNING 1159 "HDMI: pin %d wcaps %#x " 1160 "does not support connection list\n", 1161 pin_nid, get_wcaps(codec, pin_nid)); 1162 return -EINVAL; 1163 } 1164 1165 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid, 1166 per_pin->mux_nids, 1167 HDA_MAX_CONNECTIONS); 1168 1169 return 0; 1170 } 1171 1172 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) 1173 { 1174 struct hda_codec *codec = per_pin->codec; 1175 struct hdmi_spec *spec = codec->spec; 1176 struct hdmi_eld *eld = &spec->temp_eld; 1177 struct hdmi_eld *pin_eld = &per_pin->sink_eld; 1178 hda_nid_t pin_nid = per_pin->pin_nid; 1179 /* 1180 * Always execute a GetPinSense verb here, even when called from 1181 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited 1182 * response's PD bit is not the real PD value, but indicates that 1183 * the real PD value changed. An older version of the HD-audio 1184 * specification worked this way. Hence, we just ignore the data in 1185 * the unsolicited response to avoid custom WARs. 1186 */ 1187 int present = snd_hda_pin_sense(codec, pin_nid); 1188 bool update_eld = false; 1189 bool eld_changed = false; 1190 1191 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); 1192 if (pin_eld->monitor_present) 1193 eld->eld_valid = !!(present & AC_PINSENSE_ELDV); 1194 else 1195 eld->eld_valid = false; 1196 1197 _snd_printd(SND_PR_VERBOSE, 1198 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 1199 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid); 1200 1201 if (eld->eld_valid) { 1202 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer, 1203 &eld->eld_size) < 0) 1204 eld->eld_valid = false; 1205 else { 1206 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld)); 1207 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer, 1208 eld->eld_size) < 0) 1209 eld->eld_valid = false; 1210 } 1211 1212 if (eld->eld_valid) { 1213 snd_hdmi_show_eld(&eld->info); 1214 update_eld = true; 1215 } 1216 else if (repoll) { 1217 queue_delayed_work(codec->bus->workq, 1218 &per_pin->work, 1219 msecs_to_jiffies(300)); 1220 return; 1221 } 1222 } 1223 1224 mutex_lock(&pin_eld->lock); 1225 if (pin_eld->eld_valid && !eld->eld_valid) { 1226 update_eld = true; 1227 eld_changed = true; 1228 } 1229 if (update_eld) { 1230 pin_eld->eld_valid = eld->eld_valid; 1231 eld_changed = pin_eld->eld_size != eld->eld_size || 1232 memcmp(pin_eld->eld_buffer, eld->eld_buffer, 1233 eld->eld_size) != 0; 1234 if (eld_changed) 1235 memcpy(pin_eld->eld_buffer, eld->eld_buffer, 1236 eld->eld_size); 1237 pin_eld->eld_size = eld->eld_size; 1238 pin_eld->info = eld->info; 1239 } 1240 mutex_unlock(&pin_eld->lock); 1241 1242 if (eld_changed) 1243 snd_ctl_notify(codec->bus->card, 1244 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, 1245 &per_pin->eld_ctl->id); 1246 } 1247 1248 static void hdmi_repoll_eld(struct work_struct *work) 1249 { 1250 struct hdmi_spec_per_pin *per_pin = 1251 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work); 1252 1253 if (per_pin->repoll_count++ > 6) 1254 per_pin->repoll_count = 0; 1255 1256 hdmi_present_sense(per_pin, per_pin->repoll_count); 1257 } 1258 1259 static void intel_haswell_fixup_connect_list(struct hda_codec *codec, 1260 hda_nid_t nid); 1261 1262 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1263 { 1264 struct hdmi_spec *spec = codec->spec; 1265 unsigned int caps, config; 1266 int pin_idx; 1267 struct hdmi_spec_per_pin *per_pin; 1268 int err; 1269 1270 caps = snd_hda_query_pin_caps(codec, pin_nid); 1271 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP))) 1272 return 0; 1273 1274 config = snd_hda_codec_get_pincfg(codec, pin_nid); 1275 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) 1276 return 0; 1277 1278 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS)) 1279 return -E2BIG; 1280 1281 if (codec->vendor_id == 0x80862807) 1282 intel_haswell_fixup_connect_list(codec, pin_nid); 1283 1284 pin_idx = spec->num_pins; 1285 per_pin = &spec->pins[pin_idx]; 1286 1287 per_pin->pin_nid = pin_nid; 1288 per_pin->non_pcm = false; 1289 1290 err = hdmi_read_pin_conn(codec, pin_idx); 1291 if (err < 0) 1292 return err; 1293 1294 spec->num_pins++; 1295 1296 return 0; 1297 } 1298 1299 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1300 { 1301 struct hdmi_spec *spec = codec->spec; 1302 int cvt_idx; 1303 struct hdmi_spec_per_cvt *per_cvt; 1304 unsigned int chans; 1305 int err; 1306 1307 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS)) 1308 return -E2BIG; 1309 1310 chans = get_wcaps(codec, cvt_nid); 1311 chans = get_wcaps_channels(chans); 1312 1313 cvt_idx = spec->num_cvts; 1314 per_cvt = &spec->cvts[cvt_idx]; 1315 1316 per_cvt->cvt_nid = cvt_nid; 1317 per_cvt->channels_min = 2; 1318 if (chans <= 16) { 1319 per_cvt->channels_max = chans; 1320 if (chans > spec->channels_max) 1321 spec->channels_max = chans; 1322 } 1323 1324 err = snd_hda_query_supported_pcm(codec, cvt_nid, 1325 &per_cvt->rates, 1326 &per_cvt->formats, 1327 &per_cvt->maxbps); 1328 if (err < 0) 1329 return err; 1330 1331 spec->cvt_nids[spec->num_cvts++] = cvt_nid; 1332 1333 return 0; 1334 } 1335 1336 static int hdmi_parse_codec(struct hda_codec *codec) 1337 { 1338 hda_nid_t nid; 1339 int i, nodes; 1340 1341 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid); 1342 if (!nid || nodes < 0) { 1343 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n"); 1344 return -EINVAL; 1345 } 1346 1347 for (i = 0; i < nodes; i++, nid++) { 1348 unsigned int caps; 1349 unsigned int type; 1350 1351 caps = get_wcaps(codec, nid); 1352 type = get_wcaps_type(caps); 1353 1354 if (!(caps & AC_WCAP_DIGITAL)) 1355 continue; 1356 1357 switch (type) { 1358 case AC_WID_AUD_OUT: 1359 hdmi_add_cvt(codec, nid); 1360 break; 1361 case AC_WID_PIN: 1362 hdmi_add_pin(codec, nid); 1363 break; 1364 } 1365 } 1366 1367 #ifdef CONFIG_PM 1368 /* We're seeing some problems with unsolicited hot plug events on 1369 * PantherPoint after S3, if this is not enabled */ 1370 if (codec->vendor_id == 0x80862806) 1371 codec->bus->power_keep_link_on = 1; 1372 /* 1373 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event 1374 * can be lost and presence sense verb will become inaccurate if the 1375 * HDA link is powered off at hot plug or hw initialization time. 1376 */ 1377 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & 1378 AC_PWRST_EPSS)) 1379 codec->bus->power_keep_link_on = 1; 1380 #endif 1381 1382 return 0; 1383 } 1384 1385 /* 1386 */ 1387 static char *get_hdmi_pcm_name(int idx) 1388 { 1389 static char names[MAX_HDMI_PINS][8]; 1390 sprintf(&names[idx][0], "HDMI %d", idx); 1391 return &names[idx][0]; 1392 } 1393 1394 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1395 { 1396 struct hda_spdif_out *spdif; 1397 bool non_pcm; 1398 1399 mutex_lock(&codec->spdif_mutex); 1400 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid); 1401 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO); 1402 mutex_unlock(&codec->spdif_mutex); 1403 return non_pcm; 1404 } 1405 1406 1407 /* 1408 * HDMI callbacks 1409 */ 1410 1411 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1412 struct hda_codec *codec, 1413 unsigned int stream_tag, 1414 unsigned int format, 1415 struct snd_pcm_substream *substream) 1416 { 1417 hda_nid_t cvt_nid = hinfo->nid; 1418 struct hdmi_spec *spec = codec->spec; 1419 int pin_idx = hinfo_to_pin_index(spec, hinfo); 1420 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid; 1421 bool non_pcm; 1422 1423 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid); 1424 1425 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); 1426 1427 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream); 1428 1429 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); 1430 } 1431 1432 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, 1433 struct hda_codec *codec, 1434 struct snd_pcm_substream *substream) 1435 { 1436 snd_hda_codec_cleanup_stream(codec, hinfo->nid); 1437 return 0; 1438 } 1439 1440 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo, 1441 struct hda_codec *codec, 1442 struct snd_pcm_substream *substream) 1443 { 1444 struct hdmi_spec *spec = codec->spec; 1445 int cvt_idx, pin_idx; 1446 struct hdmi_spec_per_cvt *per_cvt; 1447 struct hdmi_spec_per_pin *per_pin; 1448 1449 if (hinfo->nid) { 1450 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid); 1451 if (snd_BUG_ON(cvt_idx < 0)) 1452 return -EINVAL; 1453 per_cvt = &spec->cvts[cvt_idx]; 1454 1455 snd_BUG_ON(!per_cvt->assigned); 1456 per_cvt->assigned = 0; 1457 hinfo->nid = 0; 1458 1459 pin_idx = hinfo_to_pin_index(spec, hinfo); 1460 if (snd_BUG_ON(pin_idx < 0)) 1461 return -EINVAL; 1462 per_pin = &spec->pins[pin_idx]; 1463 1464 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1465 per_pin->chmap_set = false; 1466 memset(per_pin->chmap, 0, sizeof(per_pin->chmap)); 1467 } 1468 1469 return 0; 1470 } 1471 1472 static const struct hda_pcm_ops generic_ops = { 1473 .open = hdmi_pcm_open, 1474 .close = hdmi_pcm_close, 1475 .prepare = generic_hdmi_playback_pcm_prepare, 1476 .cleanup = generic_hdmi_playback_pcm_cleanup, 1477 }; 1478 1479 /* 1480 * ALSA API channel-map control callbacks 1481 */ 1482 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol, 1483 struct snd_ctl_elem_info *uinfo) 1484 { 1485 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1486 struct hda_codec *codec = info->private_data; 1487 struct hdmi_spec *spec = codec->spec; 1488 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1489 uinfo->count = spec->channels_max; 1490 uinfo->value.integer.min = 0; 1491 uinfo->value.integer.max = SNDRV_CHMAP_LAST; 1492 return 0; 1493 } 1494 1495 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag, 1496 unsigned int size, unsigned int __user *tlv) 1497 { 1498 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1499 struct hda_codec *codec = info->private_data; 1500 struct hdmi_spec *spec = codec->spec; 1501 const unsigned int valid_mask = 1502 FL | FR | RL | RR | LFE | FC | RLC | RRC; 1503 unsigned int __user *dst; 1504 int chs, count = 0; 1505 1506 if (size < 8) 1507 return -ENOMEM; 1508 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv)) 1509 return -EFAULT; 1510 size -= 8; 1511 dst = tlv + 2; 1512 for (chs = 2; chs <= spec->channels_max; chs++) { 1513 int i, c; 1514 struct cea_channel_speaker_allocation *cap; 1515 cap = channel_allocations; 1516 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) { 1517 int chs_bytes = chs * 4; 1518 if (cap->channels != chs) 1519 continue; 1520 if (cap->spk_mask & ~valid_mask) 1521 continue; 1522 if (size < 8) 1523 return -ENOMEM; 1524 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) || 1525 put_user(chs_bytes, dst + 1)) 1526 return -EFAULT; 1527 dst += 2; 1528 size -= 8; 1529 count += 8; 1530 if (size < chs_bytes) 1531 return -ENOMEM; 1532 size -= chs_bytes; 1533 count += chs_bytes; 1534 for (c = 7; c >= 0; c--) { 1535 int spk = cap->speakers[c]; 1536 if (!spk) 1537 continue; 1538 if (put_user(spk_to_chmap(spk), dst)) 1539 return -EFAULT; 1540 dst++; 1541 } 1542 } 1543 } 1544 if (put_user(count, tlv + 1)) 1545 return -EFAULT; 1546 return 0; 1547 } 1548 1549 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol, 1550 struct snd_ctl_elem_value *ucontrol) 1551 { 1552 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1553 struct hda_codec *codec = info->private_data; 1554 struct hdmi_spec *spec = codec->spec; 1555 int pin_idx = kcontrol->private_value; 1556 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1557 int i; 1558 1559 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++) 1560 ucontrol->value.integer.value[i] = per_pin->chmap[i]; 1561 return 0; 1562 } 1563 1564 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol, 1565 struct snd_ctl_elem_value *ucontrol) 1566 { 1567 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1568 struct hda_codec *codec = info->private_data; 1569 struct hdmi_spec *spec = codec->spec; 1570 int pin_idx = kcontrol->private_value; 1571 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1572 unsigned int ctl_idx; 1573 struct snd_pcm_substream *substream; 1574 unsigned char chmap[8]; 1575 int i, ca, prepared = 0; 1576 1577 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 1578 substream = snd_pcm_chmap_substream(info, ctl_idx); 1579 if (!substream || !substream->runtime) 1580 return 0; /* just for avoiding error from alsactl restore */ 1581 switch (substream->runtime->status->state) { 1582 case SNDRV_PCM_STATE_OPEN: 1583 case SNDRV_PCM_STATE_SETUP: 1584 break; 1585 case SNDRV_PCM_STATE_PREPARED: 1586 prepared = 1; 1587 break; 1588 default: 1589 return -EBUSY; 1590 } 1591 memset(chmap, 0, sizeof(chmap)); 1592 for (i = 0; i < ARRAY_SIZE(chmap); i++) 1593 chmap[i] = ucontrol->value.integer.value[i]; 1594 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap))) 1595 return 0; 1596 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap); 1597 if (ca < 0) 1598 return -EINVAL; 1599 per_pin->chmap_set = true; 1600 memcpy(per_pin->chmap, chmap, sizeof(chmap)); 1601 if (prepared) 1602 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm, 1603 substream); 1604 1605 return 0; 1606 } 1607 1608 static int generic_hdmi_build_pcms(struct hda_codec *codec) 1609 { 1610 struct hdmi_spec *spec = codec->spec; 1611 int pin_idx; 1612 1613 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1614 struct hda_pcm *info; 1615 struct hda_pcm_stream *pstr; 1616 1617 info = &spec->pcm_rec[pin_idx]; 1618 info->name = get_hdmi_pcm_name(pin_idx); 1619 info->pcm_type = HDA_PCM_TYPE_HDMI; 1620 info->own_chmap = true; 1621 1622 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1623 pstr->substreams = 1; 1624 pstr->ops = generic_ops; 1625 /* other pstr fields are set in open */ 1626 } 1627 1628 codec->num_pcms = spec->num_pins; 1629 codec->pcm_info = spec->pcm_rec; 1630 1631 return 0; 1632 } 1633 1634 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx) 1635 { 1636 char hdmi_str[32] = "HDMI/DP"; 1637 struct hdmi_spec *spec = codec->spec; 1638 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1639 int pcmdev = spec->pcm_rec[pin_idx].device; 1640 1641 if (pcmdev > 0) 1642 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev); 1643 if (!is_jack_detectable(codec, per_pin->pin_nid)) 1644 strncat(hdmi_str, " Phantom", 1645 sizeof(hdmi_str) - strlen(hdmi_str) - 1); 1646 1647 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0); 1648 } 1649 1650 static int generic_hdmi_build_controls(struct hda_codec *codec) 1651 { 1652 struct hdmi_spec *spec = codec->spec; 1653 int err; 1654 int pin_idx; 1655 1656 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1657 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1658 1659 err = generic_hdmi_build_jack(codec, pin_idx); 1660 if (err < 0) 1661 return err; 1662 1663 err = snd_hda_create_dig_out_ctls(codec, 1664 per_pin->pin_nid, 1665 per_pin->mux_nids[0], 1666 HDA_PCM_TYPE_HDMI); 1667 if (err < 0) 1668 return err; 1669 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1670 1671 /* add control for ELD Bytes */ 1672 err = hdmi_create_eld_ctl(codec, 1673 pin_idx, 1674 spec->pcm_rec[pin_idx].device); 1675 1676 if (err < 0) 1677 return err; 1678 1679 hdmi_present_sense(per_pin, 0); 1680 } 1681 1682 /* add channel maps */ 1683 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1684 struct snd_pcm_chmap *chmap; 1685 struct snd_kcontrol *kctl; 1686 int i; 1687 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm, 1688 SNDRV_PCM_STREAM_PLAYBACK, 1689 NULL, 0, pin_idx, &chmap); 1690 if (err < 0) 1691 return err; 1692 /* override handlers */ 1693 chmap->private_data = codec; 1694 kctl = chmap->kctl; 1695 for (i = 0; i < kctl->count; i++) 1696 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE; 1697 kctl->info = hdmi_chmap_ctl_info; 1698 kctl->get = hdmi_chmap_ctl_get; 1699 kctl->put = hdmi_chmap_ctl_put; 1700 kctl->tlv.c = hdmi_chmap_ctl_tlv; 1701 } 1702 1703 return 0; 1704 } 1705 1706 static int generic_hdmi_init_per_pins(struct hda_codec *codec) 1707 { 1708 struct hdmi_spec *spec = codec->spec; 1709 int pin_idx; 1710 1711 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1712 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1713 struct hdmi_eld *eld = &per_pin->sink_eld; 1714 1715 per_pin->codec = codec; 1716 mutex_init(&eld->lock); 1717 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); 1718 snd_hda_eld_proc_new(codec, eld, pin_idx); 1719 } 1720 return 0; 1721 } 1722 1723 static int generic_hdmi_init(struct hda_codec *codec) 1724 { 1725 struct hdmi_spec *spec = codec->spec; 1726 int pin_idx; 1727 1728 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1729 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1730 hda_nid_t pin_nid = per_pin->pin_nid; 1731 1732 hdmi_init_pin(codec, pin_nid); 1733 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid); 1734 } 1735 return 0; 1736 } 1737 1738 static void generic_hdmi_free(struct hda_codec *codec) 1739 { 1740 struct hdmi_spec *spec = codec->spec; 1741 int pin_idx; 1742 1743 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1744 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1745 struct hdmi_eld *eld = &per_pin->sink_eld; 1746 1747 cancel_delayed_work(&per_pin->work); 1748 snd_hda_eld_proc_free(codec, eld); 1749 } 1750 1751 flush_workqueue(codec->bus->workq); 1752 kfree(spec); 1753 } 1754 1755 static const struct hda_codec_ops generic_hdmi_patch_ops = { 1756 .init = generic_hdmi_init, 1757 .free = generic_hdmi_free, 1758 .build_pcms = generic_hdmi_build_pcms, 1759 .build_controls = generic_hdmi_build_controls, 1760 .unsol_event = hdmi_unsol_event, 1761 }; 1762 1763 1764 static void intel_haswell_fixup_connect_list(struct hda_codec *codec, 1765 hda_nid_t nid) 1766 { 1767 struct hdmi_spec *spec = codec->spec; 1768 hda_nid_t conns[4]; 1769 int nconns; 1770 1771 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns)); 1772 if (nconns == spec->num_cvts && 1773 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t))) 1774 return; 1775 1776 /* override pins connection list */ 1777 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid); 1778 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids); 1779 } 1780 1781 #define INTEL_VENDOR_NID 0x08 1782 #define INTEL_GET_VENDOR_VERB 0xf81 1783 #define INTEL_SET_VENDOR_VERB 0x781 1784 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */ 1785 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */ 1786 1787 static void intel_haswell_enable_all_pins(struct hda_codec *codec, 1788 const struct hda_fixup *fix, int action) 1789 { 1790 unsigned int vendor_param; 1791 1792 if (action != HDA_FIXUP_ACT_PRE_PROBE) 1793 return; 1794 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0, 1795 INTEL_GET_VENDOR_VERB, 0); 1796 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS) 1797 return; 1798 1799 vendor_param |= INTEL_EN_ALL_PIN_CVTS; 1800 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0, 1801 INTEL_SET_VENDOR_VERB, vendor_param); 1802 if (vendor_param == -1) 1803 return; 1804 1805 snd_hda_codec_update_widgets(codec); 1806 return; 1807 } 1808 1809 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec) 1810 { 1811 unsigned int vendor_param; 1812 1813 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0, 1814 INTEL_GET_VENDOR_VERB, 0); 1815 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12) 1816 return; 1817 1818 /* enable DP1.2 mode */ 1819 vendor_param |= INTEL_EN_DP12; 1820 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0, 1821 INTEL_SET_VENDOR_VERB, vendor_param); 1822 } 1823 1824 1825 1826 /* available models for fixup */ 1827 enum { 1828 INTEL_HASWELL, 1829 }; 1830 1831 static const struct hda_model_fixup hdmi_models[] = { 1832 {.id = INTEL_HASWELL, .name = "Haswell"}, 1833 {} 1834 }; 1835 1836 static const struct snd_pci_quirk hdmi_fixup_tbl[] = { 1837 SND_PCI_QUIRK(0x8086, 0x2010, "Haswell", INTEL_HASWELL), 1838 {} /* terminator */ 1839 }; 1840 1841 static const struct hda_fixup hdmi_fixups[] = { 1842 [INTEL_HASWELL] = { 1843 .type = HDA_FIXUP_FUNC, 1844 .v.func = intel_haswell_enable_all_pins, 1845 }, 1846 }; 1847 1848 1849 static int patch_generic_hdmi(struct hda_codec *codec) 1850 { 1851 struct hdmi_spec *spec; 1852 1853 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1854 if (spec == NULL) 1855 return -ENOMEM; 1856 1857 codec->spec = spec; 1858 1859 snd_hda_pick_fixup(codec, hdmi_models, hdmi_fixup_tbl, hdmi_fixups); 1860 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE); 1861 1862 if (codec->vendor_id == 0x80862807) 1863 intel_haswell_fixup_enable_dp12(codec); 1864 1865 if (hdmi_parse_codec(codec) < 0) { 1866 codec->spec = NULL; 1867 kfree(spec); 1868 return -EINVAL; 1869 } 1870 codec->patch_ops = generic_hdmi_patch_ops; 1871 generic_hdmi_init_per_pins(codec); 1872 1873 init_channel_allocations(); 1874 1875 return 0; 1876 } 1877 1878 /* 1879 * Shared non-generic implementations 1880 */ 1881 1882 static int simple_playback_build_pcms(struct hda_codec *codec) 1883 { 1884 struct hdmi_spec *spec = codec->spec; 1885 struct hda_pcm *info = spec->pcm_rec; 1886 unsigned int chans; 1887 struct hda_pcm_stream *pstr; 1888 1889 codec->num_pcms = 1; 1890 codec->pcm_info = info; 1891 1892 chans = get_wcaps(codec, spec->cvts[0].cvt_nid); 1893 chans = get_wcaps_channels(chans); 1894 1895 info->name = get_hdmi_pcm_name(0); 1896 info->pcm_type = HDA_PCM_TYPE_HDMI; 1897 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1898 *pstr = spec->pcm_playback; 1899 pstr->nid = spec->cvts[0].cvt_nid; 1900 if (pstr->channels_max <= 2 && chans && chans <= 16) 1901 pstr->channels_max = chans; 1902 1903 return 0; 1904 } 1905 1906 /* unsolicited event for jack sensing */ 1907 static void simple_hdmi_unsol_event(struct hda_codec *codec, 1908 unsigned int res) 1909 { 1910 snd_hda_jack_set_dirty_all(codec); 1911 snd_hda_jack_report_sync(codec); 1912 } 1913 1914 /* generic_hdmi_build_jack can be used for simple_hdmi, too, 1915 * as long as spec->pins[] is set correctly 1916 */ 1917 #define simple_hdmi_build_jack generic_hdmi_build_jack 1918 1919 static int simple_playback_build_controls(struct hda_codec *codec) 1920 { 1921 struct hdmi_spec *spec = codec->spec; 1922 int err; 1923 1924 err = snd_hda_create_spdif_out_ctls(codec, 1925 spec->cvts[0].cvt_nid, 1926 spec->cvts[0].cvt_nid); 1927 if (err < 0) 1928 return err; 1929 return simple_hdmi_build_jack(codec, 0); 1930 } 1931 1932 static int simple_playback_init(struct hda_codec *codec) 1933 { 1934 struct hdmi_spec *spec = codec->spec; 1935 hda_nid_t pin = spec->pins[0].pin_nid; 1936 1937 snd_hda_codec_write(codec, pin, 0, 1938 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); 1939 /* some codecs require to unmute the pin */ 1940 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) 1941 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE, 1942 AMP_OUT_UNMUTE); 1943 snd_hda_jack_detect_enable(codec, pin, pin); 1944 return 0; 1945 } 1946 1947 static void simple_playback_free(struct hda_codec *codec) 1948 { 1949 struct hdmi_spec *spec = codec->spec; 1950 1951 kfree(spec); 1952 } 1953 1954 /* 1955 * Nvidia specific implementations 1956 */ 1957 1958 #define Nv_VERB_SET_Channel_Allocation 0xF79 1959 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A 1960 #define Nv_VERB_SET_Audio_Protection_On 0xF98 1961 #define Nv_VERB_SET_Audio_Protection_Off 0xF99 1962 1963 #define nvhdmi_master_con_nid_7x 0x04 1964 #define nvhdmi_master_pin_nid_7x 0x05 1965 1966 static const hda_nid_t nvhdmi_con_nids_7x[4] = { 1967 /*front, rear, clfe, rear_surr */ 1968 0x6, 0x8, 0xa, 0xc, 1969 }; 1970 1971 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = { 1972 /* set audio protect on */ 1973 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1974 /* enable digital output on pin widget */ 1975 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1976 {} /* terminator */ 1977 }; 1978 1979 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = { 1980 /* set audio protect on */ 1981 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1982 /* enable digital output on pin widget */ 1983 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1984 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1985 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1986 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1987 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1988 {} /* terminator */ 1989 }; 1990 1991 #ifdef LIMITED_RATE_FMT_SUPPORT 1992 /* support only the safe format and rate */ 1993 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000 1994 #define SUPPORTED_MAXBPS 16 1995 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1996 #else 1997 /* support all rates and formats */ 1998 #define SUPPORTED_RATES \ 1999 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ 2000 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 2001 SNDRV_PCM_RATE_192000) 2002 #define SUPPORTED_MAXBPS 24 2003 #define SUPPORTED_FORMATS \ 2004 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 2005 #endif 2006 2007 static int nvhdmi_7x_init_2ch(struct hda_codec *codec) 2008 { 2009 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch); 2010 return 0; 2011 } 2012 2013 static int nvhdmi_7x_init_8ch(struct hda_codec *codec) 2014 { 2015 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch); 2016 return 0; 2017 } 2018 2019 static unsigned int channels_2_6_8[] = { 2020 2, 6, 8 2021 }; 2022 2023 static unsigned int channels_2_8[] = { 2024 2, 8 2025 }; 2026 2027 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = { 2028 .count = ARRAY_SIZE(channels_2_6_8), 2029 .list = channels_2_6_8, 2030 .mask = 0, 2031 }; 2032 2033 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = { 2034 .count = ARRAY_SIZE(channels_2_8), 2035 .list = channels_2_8, 2036 .mask = 0, 2037 }; 2038 2039 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, 2040 struct hda_codec *codec, 2041 struct snd_pcm_substream *substream) 2042 { 2043 struct hdmi_spec *spec = codec->spec; 2044 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL; 2045 2046 switch (codec->preset->id) { 2047 case 0x10de0002: 2048 case 0x10de0003: 2049 case 0x10de0005: 2050 case 0x10de0006: 2051 hw_constraints_channels = &hw_constraints_2_8_channels; 2052 break; 2053 case 0x10de0007: 2054 hw_constraints_channels = &hw_constraints_2_6_8_channels; 2055 break; 2056 default: 2057 break; 2058 } 2059 2060 if (hw_constraints_channels != NULL) { 2061 snd_pcm_hw_constraint_list(substream->runtime, 0, 2062 SNDRV_PCM_HW_PARAM_CHANNELS, 2063 hw_constraints_channels); 2064 } else { 2065 snd_pcm_hw_constraint_step(substream->runtime, 0, 2066 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 2067 } 2068 2069 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 2070 } 2071 2072 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo, 2073 struct hda_codec *codec, 2074 struct snd_pcm_substream *substream) 2075 { 2076 struct hdmi_spec *spec = codec->spec; 2077 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 2078 } 2079 2080 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 2081 struct hda_codec *codec, 2082 unsigned int stream_tag, 2083 unsigned int format, 2084 struct snd_pcm_substream *substream) 2085 { 2086 struct hdmi_spec *spec = codec->spec; 2087 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, 2088 stream_tag, format, substream); 2089 } 2090 2091 static const struct hda_pcm_stream simple_pcm_playback = { 2092 .substreams = 1, 2093 .channels_min = 2, 2094 .channels_max = 2, 2095 .ops = { 2096 .open = simple_playback_pcm_open, 2097 .close = simple_playback_pcm_close, 2098 .prepare = simple_playback_pcm_prepare 2099 }, 2100 }; 2101 2102 static const struct hda_codec_ops simple_hdmi_patch_ops = { 2103 .build_controls = simple_playback_build_controls, 2104 .build_pcms = simple_playback_build_pcms, 2105 .init = simple_playback_init, 2106 .free = simple_playback_free, 2107 .unsol_event = simple_hdmi_unsol_event, 2108 }; 2109 2110 static int patch_simple_hdmi(struct hda_codec *codec, 2111 hda_nid_t cvt_nid, hda_nid_t pin_nid) 2112 { 2113 struct hdmi_spec *spec; 2114 2115 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 2116 if (!spec) 2117 return -ENOMEM; 2118 2119 codec->spec = spec; 2120 2121 spec->multiout.num_dacs = 0; /* no analog */ 2122 spec->multiout.max_channels = 2; 2123 spec->multiout.dig_out_nid = cvt_nid; 2124 spec->num_cvts = 1; 2125 spec->num_pins = 1; 2126 spec->cvts[0].cvt_nid = cvt_nid; 2127 spec->pins[0].pin_nid = pin_nid; 2128 spec->pcm_playback = simple_pcm_playback; 2129 2130 codec->patch_ops = simple_hdmi_patch_ops; 2131 2132 return 0; 2133 } 2134 2135 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, 2136 int channels) 2137 { 2138 unsigned int chanmask; 2139 int chan = channels ? (channels - 1) : 1; 2140 2141 switch (channels) { 2142 default: 2143 case 0: 2144 case 2: 2145 chanmask = 0x00; 2146 break; 2147 case 4: 2148 chanmask = 0x08; 2149 break; 2150 case 6: 2151 chanmask = 0x0b; 2152 break; 2153 case 8: 2154 chanmask = 0x13; 2155 break; 2156 } 2157 2158 /* Set the audio infoframe channel allocation and checksum fields. The 2159 * channel count is computed implicitly by the hardware. */ 2160 snd_hda_codec_write(codec, 0x1, 0, 2161 Nv_VERB_SET_Channel_Allocation, chanmask); 2162 2163 snd_hda_codec_write(codec, 0x1, 0, 2164 Nv_VERB_SET_Info_Frame_Checksum, 2165 (0x71 - chan - chanmask)); 2166 } 2167 2168 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo, 2169 struct hda_codec *codec, 2170 struct snd_pcm_substream *substream) 2171 { 2172 struct hdmi_spec *spec = codec->spec; 2173 int i; 2174 2175 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 2176 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 2177 for (i = 0; i < 4; i++) { 2178 /* set the stream id */ 2179 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 2180 AC_VERB_SET_CHANNEL_STREAMID, 0); 2181 /* set the stream format */ 2182 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 2183 AC_VERB_SET_STREAM_FORMAT, 0); 2184 } 2185 2186 /* The audio hardware sends a channel count of 0x7 (8ch) when all the 2187 * streams are disabled. */ 2188 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 2189 2190 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 2191 } 2192 2193 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo, 2194 struct hda_codec *codec, 2195 unsigned int stream_tag, 2196 unsigned int format, 2197 struct snd_pcm_substream *substream) 2198 { 2199 int chs; 2200 unsigned int dataDCC2, channel_id; 2201 int i; 2202 struct hdmi_spec *spec = codec->spec; 2203 struct hda_spdif_out *spdif; 2204 2205 mutex_lock(&codec->spdif_mutex); 2206 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid); 2207 2208 chs = substream->runtime->channels; 2209 2210 dataDCC2 = 0x2; 2211 2212 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 2213 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) 2214 snd_hda_codec_write(codec, 2215 nvhdmi_master_con_nid_7x, 2216 0, 2217 AC_VERB_SET_DIGI_CONVERT_1, 2218 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 2219 2220 /* set the stream id */ 2221 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 2222 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 2223 2224 /* set the stream format */ 2225 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 2226 AC_VERB_SET_STREAM_FORMAT, format); 2227 2228 /* turn on again (if needed) */ 2229 /* enable and set the channel status audio/data flag */ 2230 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { 2231 snd_hda_codec_write(codec, 2232 nvhdmi_master_con_nid_7x, 2233 0, 2234 AC_VERB_SET_DIGI_CONVERT_1, 2235 spdif->ctls & 0xff); 2236 snd_hda_codec_write(codec, 2237 nvhdmi_master_con_nid_7x, 2238 0, 2239 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 2240 } 2241 2242 for (i = 0; i < 4; i++) { 2243 if (chs == 2) 2244 channel_id = 0; 2245 else 2246 channel_id = i * 2; 2247 2248 /* turn off SPDIF once; 2249 *otherwise the IEC958 bits won't be updated 2250 */ 2251 if (codec->spdif_status_reset && 2252 (spdif->ctls & AC_DIG1_ENABLE)) 2253 snd_hda_codec_write(codec, 2254 nvhdmi_con_nids_7x[i], 2255 0, 2256 AC_VERB_SET_DIGI_CONVERT_1, 2257 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 2258 /* set the stream id */ 2259 snd_hda_codec_write(codec, 2260 nvhdmi_con_nids_7x[i], 2261 0, 2262 AC_VERB_SET_CHANNEL_STREAMID, 2263 (stream_tag << 4) | channel_id); 2264 /* set the stream format */ 2265 snd_hda_codec_write(codec, 2266 nvhdmi_con_nids_7x[i], 2267 0, 2268 AC_VERB_SET_STREAM_FORMAT, 2269 format); 2270 /* turn on again (if needed) */ 2271 /* enable and set the channel status audio/data flag */ 2272 if (codec->spdif_status_reset && 2273 (spdif->ctls & AC_DIG1_ENABLE)) { 2274 snd_hda_codec_write(codec, 2275 nvhdmi_con_nids_7x[i], 2276 0, 2277 AC_VERB_SET_DIGI_CONVERT_1, 2278 spdif->ctls & 0xff); 2279 snd_hda_codec_write(codec, 2280 nvhdmi_con_nids_7x[i], 2281 0, 2282 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 2283 } 2284 } 2285 2286 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); 2287 2288 mutex_unlock(&codec->spdif_mutex); 2289 return 0; 2290 } 2291 2292 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = { 2293 .substreams = 1, 2294 .channels_min = 2, 2295 .channels_max = 8, 2296 .nid = nvhdmi_master_con_nid_7x, 2297 .rates = SUPPORTED_RATES, 2298 .maxbps = SUPPORTED_MAXBPS, 2299 .formats = SUPPORTED_FORMATS, 2300 .ops = { 2301 .open = simple_playback_pcm_open, 2302 .close = nvhdmi_8ch_7x_pcm_close, 2303 .prepare = nvhdmi_8ch_7x_pcm_prepare 2304 }, 2305 }; 2306 2307 static int patch_nvhdmi_2ch(struct hda_codec *codec) 2308 { 2309 struct hdmi_spec *spec; 2310 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x, 2311 nvhdmi_master_pin_nid_7x); 2312 if (err < 0) 2313 return err; 2314 2315 codec->patch_ops.init = nvhdmi_7x_init_2ch; 2316 /* override the PCM rates, etc, as the codec doesn't give full list */ 2317 spec = codec->spec; 2318 spec->pcm_playback.rates = SUPPORTED_RATES; 2319 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS; 2320 spec->pcm_playback.formats = SUPPORTED_FORMATS; 2321 return 0; 2322 } 2323 2324 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec) 2325 { 2326 struct hdmi_spec *spec = codec->spec; 2327 int err = simple_playback_build_pcms(codec); 2328 spec->pcm_rec[0].own_chmap = true; 2329 return err; 2330 } 2331 2332 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec) 2333 { 2334 struct hdmi_spec *spec = codec->spec; 2335 struct snd_pcm_chmap *chmap; 2336 int err; 2337 2338 err = simple_playback_build_controls(codec); 2339 if (err < 0) 2340 return err; 2341 2342 /* add channel maps */ 2343 err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm, 2344 SNDRV_PCM_STREAM_PLAYBACK, 2345 snd_pcm_alt_chmaps, 8, 0, &chmap); 2346 if (err < 0) 2347 return err; 2348 switch (codec->preset->id) { 2349 case 0x10de0002: 2350 case 0x10de0003: 2351 case 0x10de0005: 2352 case 0x10de0006: 2353 chmap->channel_mask = (1U << 2) | (1U << 8); 2354 break; 2355 case 0x10de0007: 2356 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8); 2357 } 2358 return 0; 2359 } 2360 2361 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) 2362 { 2363 struct hdmi_spec *spec; 2364 int err = patch_nvhdmi_2ch(codec); 2365 if (err < 0) 2366 return err; 2367 spec = codec->spec; 2368 spec->multiout.max_channels = 8; 2369 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x; 2370 codec->patch_ops.init = nvhdmi_7x_init_8ch; 2371 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms; 2372 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls; 2373 2374 /* Initialize the audio infoframe channel mask and checksum to something 2375 * valid */ 2376 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 2377 2378 return 0; 2379 } 2380 2381 /* 2382 * ATI-specific implementations 2383 * 2384 * FIXME: we may omit the whole this and use the generic code once after 2385 * it's confirmed to work. 2386 */ 2387 2388 #define ATIHDMI_CVT_NID 0x02 /* audio converter */ 2389 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ 2390 2391 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 2392 struct hda_codec *codec, 2393 unsigned int stream_tag, 2394 unsigned int format, 2395 struct snd_pcm_substream *substream) 2396 { 2397 struct hdmi_spec *spec = codec->spec; 2398 int chans = substream->runtime->channels; 2399 int i, err; 2400 2401 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, 2402 substream); 2403 if (err < 0) 2404 return err; 2405 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 2406 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); 2407 /* FIXME: XXX */ 2408 for (i = 0; i < chans; i++) { 2409 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 2410 AC_VERB_SET_HDMI_CHAN_SLOT, 2411 (i << 4) | i); 2412 } 2413 return 0; 2414 } 2415 2416 static int patch_atihdmi(struct hda_codec *codec) 2417 { 2418 struct hdmi_spec *spec; 2419 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID); 2420 if (err < 0) 2421 return err; 2422 spec = codec->spec; 2423 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare; 2424 return 0; 2425 } 2426 2427 /* VIA HDMI Implementation */ 2428 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */ 2429 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */ 2430 2431 static int patch_via_hdmi(struct hda_codec *codec) 2432 { 2433 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID); 2434 } 2435 2436 /* 2437 * patch entries 2438 */ 2439 static const struct hda_codec_preset snd_hda_preset_hdmi[] = { 2440 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, 2441 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, 2442 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, 2443 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, 2444 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, 2445 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, 2446 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, 2447 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2448 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2449 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2450 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2451 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, 2452 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, 2453 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, 2454 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, 2455 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, 2456 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, 2457 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, 2458 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, 2459 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, 2460 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, 2461 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, 2462 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, 2463 /* 17 is known to be absent */ 2464 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, 2465 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, 2466 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, 2467 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, 2468 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, 2469 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, 2470 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, 2471 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, 2472 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, 2473 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, 2474 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi }, 2475 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 2476 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 2477 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 2478 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 2479 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 2480 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 2481 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 2482 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi }, 2483 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi }, 2484 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi }, 2485 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 2486 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, 2487 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, 2488 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, 2489 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, 2490 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, 2491 {} /* terminator */ 2492 }; 2493 2494 MODULE_ALIAS("snd-hda-codec-id:1002793c"); 2495 MODULE_ALIAS("snd-hda-codec-id:10027919"); 2496 MODULE_ALIAS("snd-hda-codec-id:1002791a"); 2497 MODULE_ALIAS("snd-hda-codec-id:1002aa01"); 2498 MODULE_ALIAS("snd-hda-codec-id:10951390"); 2499 MODULE_ALIAS("snd-hda-codec-id:10951392"); 2500 MODULE_ALIAS("snd-hda-codec-id:10de0002"); 2501 MODULE_ALIAS("snd-hda-codec-id:10de0003"); 2502 MODULE_ALIAS("snd-hda-codec-id:10de0005"); 2503 MODULE_ALIAS("snd-hda-codec-id:10de0006"); 2504 MODULE_ALIAS("snd-hda-codec-id:10de0007"); 2505 MODULE_ALIAS("snd-hda-codec-id:10de000a"); 2506 MODULE_ALIAS("snd-hda-codec-id:10de000b"); 2507 MODULE_ALIAS("snd-hda-codec-id:10de000c"); 2508 MODULE_ALIAS("snd-hda-codec-id:10de000d"); 2509 MODULE_ALIAS("snd-hda-codec-id:10de0010"); 2510 MODULE_ALIAS("snd-hda-codec-id:10de0011"); 2511 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 2512 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 2513 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 2514 MODULE_ALIAS("snd-hda-codec-id:10de0015"); 2515 MODULE_ALIAS("snd-hda-codec-id:10de0016"); 2516 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 2517 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 2518 MODULE_ALIAS("snd-hda-codec-id:10de001a"); 2519 MODULE_ALIAS("snd-hda-codec-id:10de001b"); 2520 MODULE_ALIAS("snd-hda-codec-id:10de001c"); 2521 MODULE_ALIAS("snd-hda-codec-id:10de0040"); 2522 MODULE_ALIAS("snd-hda-codec-id:10de0041"); 2523 MODULE_ALIAS("snd-hda-codec-id:10de0042"); 2524 MODULE_ALIAS("snd-hda-codec-id:10de0043"); 2525 MODULE_ALIAS("snd-hda-codec-id:10de0044"); 2526 MODULE_ALIAS("snd-hda-codec-id:10de0051"); 2527 MODULE_ALIAS("snd-hda-codec-id:10de0067"); 2528 MODULE_ALIAS("snd-hda-codec-id:10de8001"); 2529 MODULE_ALIAS("snd-hda-codec-id:11069f80"); 2530 MODULE_ALIAS("snd-hda-codec-id:11069f81"); 2531 MODULE_ALIAS("snd-hda-codec-id:11069f84"); 2532 MODULE_ALIAS("snd-hda-codec-id:11069f85"); 2533 MODULE_ALIAS("snd-hda-codec-id:17e80047"); 2534 MODULE_ALIAS("snd-hda-codec-id:80860054"); 2535 MODULE_ALIAS("snd-hda-codec-id:80862801"); 2536 MODULE_ALIAS("snd-hda-codec-id:80862802"); 2537 MODULE_ALIAS("snd-hda-codec-id:80862803"); 2538 MODULE_ALIAS("snd-hda-codec-id:80862804"); 2539 MODULE_ALIAS("snd-hda-codec-id:80862805"); 2540 MODULE_ALIAS("snd-hda-codec-id:80862806"); 2541 MODULE_ALIAS("snd-hda-codec-id:80862807"); 2542 MODULE_ALIAS("snd-hda-codec-id:80862880"); 2543 MODULE_ALIAS("snd-hda-codec-id:808629fb"); 2544 2545 MODULE_LICENSE("GPL"); 2546 MODULE_DESCRIPTION("HDMI HD-audio codec"); 2547 MODULE_ALIAS("snd-hda-codec-intelhdmi"); 2548 MODULE_ALIAS("snd-hda-codec-nvhdmi"); 2549 MODULE_ALIAS("snd-hda-codec-atihdmi"); 2550 2551 static struct hda_codec_preset_list intel_list = { 2552 .preset = snd_hda_preset_hdmi, 2553 .owner = THIS_MODULE, 2554 }; 2555 2556 static int __init patch_hdmi_init(void) 2557 { 2558 return snd_hda_add_codec_preset(&intel_list); 2559 } 2560 2561 static void __exit patch_hdmi_exit(void) 2562 { 2563 snd_hda_delete_codec_preset(&intel_list); 2564 } 2565 2566 module_init(patch_hdmi_init) 2567 module_exit(patch_hdmi_exit) 2568