1 /* 2 * 3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs 4 * 5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved. 6 * Copyright (c) 2006 ATI Technologies Inc. 7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved. 8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com> 9 * 10 * Authors: 11 * Wu Fengguang <wfg@linux.intel.com> 12 * 13 * Maintained by: 14 * Wu Fengguang <wfg@linux.intel.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the Free 18 * Software Foundation; either version 2 of the License, or (at your option) 19 * any later version. 20 * 21 * This program is distributed in the hope that it will be useful, but 22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 * for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software Foundation, 28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 */ 30 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/module.h> 35 #include <sound/core.h> 36 #include <sound/jack.h> 37 #include "hda_codec.h" 38 #include "hda_local.h" 39 #include "hda_jack.h" 40 41 static bool static_hdmi_pcm; 42 module_param(static_hdmi_pcm, bool, 0644); 43 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); 44 45 /* 46 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device 47 * could support N independent pipes, each of them can be connected to one or 48 * more ports (DVI, HDMI or DisplayPort). 49 * 50 * The HDA correspondence of pipes/ports are converter/pin nodes. 51 */ 52 #define MAX_HDMI_CVTS 8 53 #define MAX_HDMI_PINS 8 54 55 struct hdmi_spec_per_cvt { 56 hda_nid_t cvt_nid; 57 int assigned; 58 unsigned int channels_min; 59 unsigned int channels_max; 60 u32 rates; 61 u64 formats; 62 unsigned int maxbps; 63 }; 64 65 struct hdmi_spec_per_pin { 66 hda_nid_t pin_nid; 67 int num_mux_nids; 68 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; 69 70 struct hda_codec *codec; 71 struct hdmi_eld sink_eld; 72 struct delayed_work work; 73 int repoll_count; 74 }; 75 76 struct hdmi_spec { 77 int num_cvts; 78 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS]; 79 80 int num_pins; 81 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS]; 82 struct hda_pcm pcm_rec[MAX_HDMI_PINS]; 83 84 /* 85 * Non-generic ATI/NVIDIA specific 86 */ 87 struct hda_multi_out multiout; 88 struct hda_pcm_stream pcm_playback; 89 }; 90 91 92 struct hdmi_audio_infoframe { 93 u8 type; /* 0x84 */ 94 u8 ver; /* 0x01 */ 95 u8 len; /* 0x0a */ 96 97 u8 checksum; 98 99 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ 100 u8 SS01_SF24; 101 u8 CXT04; 102 u8 CA; 103 u8 LFEPBL01_LSV36_DM_INH7; 104 }; 105 106 struct dp_audio_infoframe { 107 u8 type; /* 0x84 */ 108 u8 len; /* 0x1b */ 109 u8 ver; /* 0x11 << 2 */ 110 111 u8 CC02_CT47; /* match with HDMI infoframe from this on */ 112 u8 SS01_SF24; 113 u8 CXT04; 114 u8 CA; 115 u8 LFEPBL01_LSV36_DM_INH7; 116 }; 117 118 union audio_infoframe { 119 struct hdmi_audio_infoframe hdmi; 120 struct dp_audio_infoframe dp; 121 u8 bytes[0]; 122 }; 123 124 /* 125 * CEA speaker placement: 126 * 127 * FLH FCH FRH 128 * FLW FL FLC FC FRC FR FRW 129 * 130 * LFE 131 * TC 132 * 133 * RL RLC RC RRC RR 134 * 135 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to 136 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. 137 */ 138 enum cea_speaker_placement { 139 FL = (1 << 0), /* Front Left */ 140 FC = (1 << 1), /* Front Center */ 141 FR = (1 << 2), /* Front Right */ 142 FLC = (1 << 3), /* Front Left Center */ 143 FRC = (1 << 4), /* Front Right Center */ 144 RL = (1 << 5), /* Rear Left */ 145 RC = (1 << 6), /* Rear Center */ 146 RR = (1 << 7), /* Rear Right */ 147 RLC = (1 << 8), /* Rear Left Center */ 148 RRC = (1 << 9), /* Rear Right Center */ 149 LFE = (1 << 10), /* Low Frequency Effect */ 150 FLW = (1 << 11), /* Front Left Wide */ 151 FRW = (1 << 12), /* Front Right Wide */ 152 FLH = (1 << 13), /* Front Left High */ 153 FCH = (1 << 14), /* Front Center High */ 154 FRH = (1 << 15), /* Front Right High */ 155 TC = (1 << 16), /* Top Center */ 156 }; 157 158 /* 159 * ELD SA bits in the CEA Speaker Allocation data block 160 */ 161 static int eld_speaker_allocation_bits[] = { 162 [0] = FL | FR, 163 [1] = LFE, 164 [2] = FC, 165 [3] = RL | RR, 166 [4] = RC, 167 [5] = FLC | FRC, 168 [6] = RLC | RRC, 169 /* the following are not defined in ELD yet */ 170 [7] = FLW | FRW, 171 [8] = FLH | FRH, 172 [9] = TC, 173 [10] = FCH, 174 }; 175 176 struct cea_channel_speaker_allocation { 177 int ca_index; 178 int speakers[8]; 179 180 /* derived values, just for convenience */ 181 int channels; 182 int spk_mask; 183 }; 184 185 /* 186 * ALSA sequence is: 187 * 188 * surround40 surround41 surround50 surround51 surround71 189 * ch0 front left = = = = 190 * ch1 front right = = = = 191 * ch2 rear left = = = = 192 * ch3 rear right = = = = 193 * ch4 LFE center center center 194 * ch5 LFE LFE 195 * ch6 side left 196 * ch7 side right 197 * 198 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR} 199 */ 200 static int hdmi_channel_mapping[0x32][8] = { 201 /* stereo */ 202 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 203 /* 2.1 */ 204 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 205 /* Dolby Surround */ 206 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 }, 207 /* surround40 */ 208 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 }, 209 /* 4ch */ 210 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 }, 211 /* surround41 */ 212 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 }, 213 /* surround50 */ 214 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 }, 215 /* surround51 */ 216 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 }, 217 /* 7.1 */ 218 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 }, 219 }; 220 221 /* 222 * This is an ordered list! 223 * 224 * The preceding ones have better chances to be selected by 225 * hdmi_channel_allocation(). 226 */ 227 static struct cea_channel_speaker_allocation channel_allocations[] = { 228 /* channel: 7 6 5 4 3 2 1 0 */ 229 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, 230 /* 2.1 */ 231 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, 232 /* Dolby Surround */ 233 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, 234 /* surround40 */ 235 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, 236 /* surround41 */ 237 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, 238 /* surround50 */ 239 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, 240 /* surround51 */ 241 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, 242 /* 6.1 */ 243 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, 244 /* surround71 */ 245 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, 246 247 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, 248 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, 249 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, 250 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, 251 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, 252 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, 253 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, 254 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, 255 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, 256 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, 257 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, 258 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, 259 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, 260 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, 261 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, 262 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, 263 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, 264 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, 265 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, 266 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, 267 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, 268 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, 269 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, 270 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, 271 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, 272 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, 273 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, 274 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, 275 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, 276 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, 277 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, 278 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, 279 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, 280 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, 281 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, 282 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, 283 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, 284 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, 285 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, 286 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, 287 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, 288 }; 289 290 291 /* 292 * HDMI routines 293 */ 294 295 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid) 296 { 297 int pin_idx; 298 299 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 300 if (spec->pins[pin_idx].pin_nid == pin_nid) 301 return pin_idx; 302 303 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid); 304 return -EINVAL; 305 } 306 307 static int hinfo_to_pin_index(struct hdmi_spec *spec, 308 struct hda_pcm_stream *hinfo) 309 { 310 int pin_idx; 311 312 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 313 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo) 314 return pin_idx; 315 316 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo); 317 return -EINVAL; 318 } 319 320 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid) 321 { 322 int cvt_idx; 323 324 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) 325 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid) 326 return cvt_idx; 327 328 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid); 329 return -EINVAL; 330 } 331 332 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 333 struct snd_ctl_elem_info *uinfo) 334 { 335 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 336 struct hdmi_spec *spec; 337 int pin_idx; 338 339 spec = codec->spec; 340 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 341 342 pin_idx = kcontrol->private_value; 343 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size; 344 345 return 0; 346 } 347 348 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 349 struct snd_ctl_elem_value *ucontrol) 350 { 351 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 352 struct hdmi_spec *spec; 353 int pin_idx; 354 355 spec = codec->spec; 356 pin_idx = kcontrol->private_value; 357 358 memcpy(ucontrol->value.bytes.data, 359 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE); 360 361 return 0; 362 } 363 364 static struct snd_kcontrol_new eld_bytes_ctl = { 365 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 366 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 367 .name = "ELD", 368 .info = hdmi_eld_ctl_info, 369 .get = hdmi_eld_ctl_get, 370 }; 371 372 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx, 373 int device) 374 { 375 struct snd_kcontrol *kctl; 376 struct hdmi_spec *spec = codec->spec; 377 int err; 378 379 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); 380 if (!kctl) 381 return -ENOMEM; 382 kctl->private_value = pin_idx; 383 kctl->id.device = device; 384 385 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl); 386 if (err < 0) 387 return err; 388 389 return 0; 390 } 391 392 #ifdef BE_PARANOID 393 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 394 int *packet_index, int *byte_index) 395 { 396 int val; 397 398 val = snd_hda_codec_read(codec, pin_nid, 0, 399 AC_VERB_GET_HDMI_DIP_INDEX, 0); 400 401 *packet_index = val >> 5; 402 *byte_index = val & 0x1f; 403 } 404 #endif 405 406 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 407 int packet_index, int byte_index) 408 { 409 int val; 410 411 val = (packet_index << 5) | (byte_index & 0x1f); 412 413 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); 414 } 415 416 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, 417 unsigned char val) 418 { 419 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); 420 } 421 422 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) 423 { 424 /* Unmute */ 425 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) 426 snd_hda_codec_write(codec, pin_nid, 0, 427 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); 428 /* Disable pin out until stream is active*/ 429 snd_hda_codec_write(codec, pin_nid, 0, 430 AC_VERB_SET_PIN_WIDGET_CONTROL, 0); 431 } 432 433 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid) 434 { 435 return 1 + snd_hda_codec_read(codec, cvt_nid, 0, 436 AC_VERB_GET_CVT_CHAN_COUNT, 0); 437 } 438 439 static void hdmi_set_channel_count(struct hda_codec *codec, 440 hda_nid_t cvt_nid, int chs) 441 { 442 if (chs != hdmi_get_channel_count(codec, cvt_nid)) 443 snd_hda_codec_write(codec, cvt_nid, 0, 444 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); 445 } 446 447 448 /* 449 * Channel mapping routines 450 */ 451 452 /* 453 * Compute derived values in channel_allocations[]. 454 */ 455 static void init_channel_allocations(void) 456 { 457 int i, j; 458 struct cea_channel_speaker_allocation *p; 459 460 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 461 p = channel_allocations + i; 462 p->channels = 0; 463 p->spk_mask = 0; 464 for (j = 0; j < ARRAY_SIZE(p->speakers); j++) 465 if (p->speakers[j]) { 466 p->channels++; 467 p->spk_mask |= p->speakers[j]; 468 } 469 } 470 } 471 472 /* 473 * The transformation takes two steps: 474 * 475 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask 476 * spk_mask => (channel_allocations[]) => ai->CA 477 * 478 * TODO: it could select the wrong CA from multiple candidates. 479 */ 480 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels) 481 { 482 int i; 483 int ca = 0; 484 int spk_mask = 0; 485 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; 486 487 /* 488 * CA defaults to 0 for basic stereo audio 489 */ 490 if (channels <= 2) 491 return 0; 492 493 /* 494 * expand ELD's speaker allocation mask 495 * 496 * ELD tells the speaker mask in a compact(paired) form, 497 * expand ELD's notions to match the ones used by Audio InfoFrame. 498 */ 499 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { 500 if (eld->spk_alloc & (1 << i)) 501 spk_mask |= eld_speaker_allocation_bits[i]; 502 } 503 504 /* search for the first working match in the CA table */ 505 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 506 if (channels == channel_allocations[i].channels && 507 (spk_mask & channel_allocations[i].spk_mask) == 508 channel_allocations[i].spk_mask) { 509 ca = channel_allocations[i].ca_index; 510 break; 511 } 512 } 513 514 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf)); 515 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", 516 ca, channels, buf); 517 518 return ca; 519 } 520 521 static void hdmi_debug_channel_mapping(struct hda_codec *codec, 522 hda_nid_t pin_nid) 523 { 524 #ifdef CONFIG_SND_DEBUG_VERBOSE 525 int i; 526 int slot; 527 528 for (i = 0; i < 8; i++) { 529 slot = snd_hda_codec_read(codec, pin_nid, 0, 530 AC_VERB_GET_HDMI_CHAN_SLOT, i); 531 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", 532 slot >> 4, slot & 0xf); 533 } 534 #endif 535 } 536 537 538 static void hdmi_setup_channel_mapping(struct hda_codec *codec, 539 hda_nid_t pin_nid, 540 int ca) 541 { 542 int i; 543 int err; 544 545 if (hdmi_channel_mapping[ca][1] == 0) { 546 for (i = 0; i < channel_allocations[ca].channels; i++) 547 hdmi_channel_mapping[ca][i] = i | (i << 4); 548 for (; i < 8; i++) 549 hdmi_channel_mapping[ca][i] = 0xf | (i << 4); 550 } 551 552 for (i = 0; i < 8; i++) { 553 err = snd_hda_codec_write(codec, pin_nid, 0, 554 AC_VERB_SET_HDMI_CHAN_SLOT, 555 hdmi_channel_mapping[ca][i]); 556 if (err) { 557 snd_printdd(KERN_NOTICE 558 "HDMI: channel mapping failed\n"); 559 break; 560 } 561 } 562 563 hdmi_debug_channel_mapping(codec, pin_nid); 564 } 565 566 567 /* 568 * Audio InfoFrame routines 569 */ 570 571 /* 572 * Enable Audio InfoFrame Transmission 573 */ 574 static void hdmi_start_infoframe_trans(struct hda_codec *codec, 575 hda_nid_t pin_nid) 576 { 577 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 578 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 579 AC_DIPXMIT_BEST); 580 } 581 582 /* 583 * Disable Audio InfoFrame Transmission 584 */ 585 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, 586 hda_nid_t pin_nid) 587 { 588 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 589 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 590 AC_DIPXMIT_DISABLE); 591 } 592 593 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) 594 { 595 #ifdef CONFIG_SND_DEBUG_VERBOSE 596 int i; 597 int size; 598 599 size = snd_hdmi_get_eld_size(codec, pin_nid); 600 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); 601 602 for (i = 0; i < 8; i++) { 603 size = snd_hda_codec_read(codec, pin_nid, 0, 604 AC_VERB_GET_HDMI_DIP_SIZE, i); 605 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); 606 } 607 #endif 608 } 609 610 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) 611 { 612 #ifdef BE_PARANOID 613 int i, j; 614 int size; 615 int pi, bi; 616 for (i = 0; i < 8; i++) { 617 size = snd_hda_codec_read(codec, pin_nid, 0, 618 AC_VERB_GET_HDMI_DIP_SIZE, i); 619 if (size == 0) 620 continue; 621 622 hdmi_set_dip_index(codec, pin_nid, i, 0x0); 623 for (j = 1; j < 1000; j++) { 624 hdmi_write_dip_byte(codec, pin_nid, 0x0); 625 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); 626 if (pi != i) 627 snd_printd(KERN_INFO "dip index %d: %d != %d\n", 628 bi, pi, i); 629 if (bi == 0) /* byte index wrapped around */ 630 break; 631 } 632 snd_printd(KERN_INFO 633 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", 634 i, size, j); 635 } 636 #endif 637 } 638 639 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai) 640 { 641 u8 *bytes = (u8 *)hdmi_ai; 642 u8 sum = 0; 643 int i; 644 645 hdmi_ai->checksum = 0; 646 647 for (i = 0; i < sizeof(*hdmi_ai); i++) 648 sum += bytes[i]; 649 650 hdmi_ai->checksum = -sum; 651 } 652 653 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, 654 hda_nid_t pin_nid, 655 u8 *dip, int size) 656 { 657 int i; 658 659 hdmi_debug_dip_size(codec, pin_nid); 660 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ 661 662 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 663 for (i = 0; i < size; i++) 664 hdmi_write_dip_byte(codec, pin_nid, dip[i]); 665 } 666 667 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, 668 u8 *dip, int size) 669 { 670 u8 val; 671 int i; 672 673 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) 674 != AC_DIPXMIT_BEST) 675 return false; 676 677 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 678 for (i = 0; i < size; i++) { 679 val = snd_hda_codec_read(codec, pin_nid, 0, 680 AC_VERB_GET_HDMI_DIP_DATA, 0); 681 if (val != dip[i]) 682 return false; 683 } 684 685 return true; 686 } 687 688 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx, 689 struct snd_pcm_substream *substream) 690 { 691 struct hdmi_spec *spec = codec->spec; 692 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 693 hda_nid_t pin_nid = per_pin->pin_nid; 694 int channels = substream->runtime->channels; 695 struct hdmi_eld *eld; 696 int ca; 697 union audio_infoframe ai; 698 699 eld = &spec->pins[pin_idx].sink_eld; 700 if (!eld->monitor_present) 701 return; 702 703 ca = hdmi_channel_allocation(eld, channels); 704 705 memset(&ai, 0, sizeof(ai)); 706 if (eld->conn_type == 0) { /* HDMI */ 707 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; 708 709 hdmi_ai->type = 0x84; 710 hdmi_ai->ver = 0x01; 711 hdmi_ai->len = 0x0a; 712 hdmi_ai->CC02_CT47 = channels - 1; 713 hdmi_ai->CA = ca; 714 hdmi_checksum_audio_infoframe(hdmi_ai); 715 } else if (eld->conn_type == 1) { /* DisplayPort */ 716 struct dp_audio_infoframe *dp_ai = &ai.dp; 717 718 dp_ai->type = 0x84; 719 dp_ai->len = 0x1b; 720 dp_ai->ver = 0x11 << 2; 721 dp_ai->CC02_CT47 = channels - 1; 722 dp_ai->CA = ca; 723 } else { 724 snd_printd("HDMI: unknown connection type at pin %d\n", 725 pin_nid); 726 return; 727 } 728 729 /* 730 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or 731 * sizeof(*dp_ai) to avoid partial match/update problems when 732 * the user switches between HDMI/DP monitors. 733 */ 734 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, 735 sizeof(ai))) { 736 snd_printdd("hdmi_setup_audio_infoframe: " 737 "pin=%d channels=%d\n", 738 pin_nid, 739 channels); 740 hdmi_setup_channel_mapping(codec, pin_nid, ca); 741 hdmi_stop_infoframe_trans(codec, pin_nid); 742 hdmi_fill_audio_infoframe(codec, pin_nid, 743 ai.bytes, sizeof(ai)); 744 hdmi_start_infoframe_trans(codec, pin_nid); 745 } 746 } 747 748 749 /* 750 * Unsolicited events 751 */ 752 753 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); 754 755 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 756 { 757 struct hdmi_spec *spec = codec->spec; 758 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 759 int pin_nid; 760 int pin_idx; 761 struct hda_jack_tbl *jack; 762 763 jack = snd_hda_jack_tbl_get_from_tag(codec, tag); 764 if (!jack) 765 return; 766 pin_nid = jack->nid; 767 jack->jack_dirty = 1; 768 769 _snd_printd(SND_PR_VERBOSE, 770 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 771 codec->addr, pin_nid, 772 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV)); 773 774 pin_idx = pin_nid_to_pin_index(spec, pin_nid); 775 if (pin_idx < 0) 776 return; 777 778 hdmi_present_sense(&spec->pins[pin_idx], 1); 779 snd_hda_jack_report_sync(codec); 780 } 781 782 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 783 { 784 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 785 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 786 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); 787 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); 788 789 printk(KERN_INFO 790 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", 791 codec->addr, 792 tag, 793 subtag, 794 cp_state, 795 cp_ready); 796 797 /* TODO */ 798 if (cp_state) 799 ; 800 if (cp_ready) 801 ; 802 } 803 804 805 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) 806 { 807 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 808 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 809 810 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) { 811 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); 812 return; 813 } 814 815 if (subtag == 0) 816 hdmi_intrinsic_event(codec, res); 817 else 818 hdmi_non_intrinsic_event(codec, res); 819 } 820 821 /* 822 * Callbacks 823 */ 824 825 /* HBR should be Non-PCM, 8 channels */ 826 #define is_hbr_format(format) \ 827 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) 828 829 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, 830 hda_nid_t pin_nid, u32 stream_tag, int format) 831 { 832 int pinctl; 833 int new_pinctl = 0; 834 835 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 836 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 837 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 838 839 new_pinctl = pinctl & ~AC_PINCTL_EPT; 840 if (is_hbr_format(format)) 841 new_pinctl |= AC_PINCTL_EPT_HBR; 842 else 843 new_pinctl |= AC_PINCTL_EPT_NATIVE; 844 845 snd_printdd("hdmi_setup_stream: " 846 "NID=0x%x, %spinctl=0x%x\n", 847 pin_nid, 848 pinctl == new_pinctl ? "" : "new-", 849 new_pinctl); 850 851 if (pinctl != new_pinctl) 852 snd_hda_codec_write(codec, pin_nid, 0, 853 AC_VERB_SET_PIN_WIDGET_CONTROL, 854 new_pinctl); 855 856 } 857 if (is_hbr_format(format) && !new_pinctl) { 858 snd_printdd("hdmi_setup_stream: HBR is not supported\n"); 859 return -EINVAL; 860 } 861 862 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); 863 return 0; 864 } 865 866 /* 867 * HDA PCM callbacks 868 */ 869 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, 870 struct hda_codec *codec, 871 struct snd_pcm_substream *substream) 872 { 873 struct hdmi_spec *spec = codec->spec; 874 struct snd_pcm_runtime *runtime = substream->runtime; 875 int pin_idx, cvt_idx, mux_idx = 0; 876 struct hdmi_spec_per_pin *per_pin; 877 struct hdmi_eld *eld; 878 struct hdmi_spec_per_cvt *per_cvt = NULL; 879 880 /* Validate hinfo */ 881 pin_idx = hinfo_to_pin_index(spec, hinfo); 882 if (snd_BUG_ON(pin_idx < 0)) 883 return -EINVAL; 884 per_pin = &spec->pins[pin_idx]; 885 eld = &per_pin->sink_eld; 886 887 /* Dynamically assign converter to stream */ 888 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { 889 per_cvt = &spec->cvts[cvt_idx]; 890 891 /* Must not already be assigned */ 892 if (per_cvt->assigned) 893 continue; 894 /* Must be in pin's mux's list of converters */ 895 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) 896 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) 897 break; 898 /* Not in mux list */ 899 if (mux_idx == per_pin->num_mux_nids) 900 continue; 901 break; 902 } 903 /* No free converters */ 904 if (cvt_idx == spec->num_cvts) 905 return -ENODEV; 906 907 /* Claim converter */ 908 per_cvt->assigned = 1; 909 hinfo->nid = per_cvt->cvt_nid; 910 911 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 912 AC_VERB_SET_CONNECT_SEL, 913 mux_idx); 914 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); 915 916 /* Initially set the converter's capabilities */ 917 hinfo->channels_min = per_cvt->channels_min; 918 hinfo->channels_max = per_cvt->channels_max; 919 hinfo->rates = per_cvt->rates; 920 hinfo->formats = per_cvt->formats; 921 hinfo->maxbps = per_cvt->maxbps; 922 923 /* Restrict capabilities by ELD if this isn't disabled */ 924 if (!static_hdmi_pcm && eld->eld_valid) { 925 snd_hdmi_eld_update_pcm_info(eld, hinfo); 926 if (hinfo->channels_min > hinfo->channels_max || 927 !hinfo->rates || !hinfo->formats) 928 return -ENODEV; 929 } 930 931 /* Store the updated parameters */ 932 runtime->hw.channels_min = hinfo->channels_min; 933 runtime->hw.channels_max = hinfo->channels_max; 934 runtime->hw.formats = hinfo->formats; 935 runtime->hw.rates = hinfo->rates; 936 937 snd_pcm_hw_constraint_step(substream->runtime, 0, 938 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 939 return 0; 940 } 941 942 /* 943 * HDA/HDMI auto parsing 944 */ 945 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) 946 { 947 struct hdmi_spec *spec = codec->spec; 948 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 949 hda_nid_t pin_nid = per_pin->pin_nid; 950 951 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { 952 snd_printk(KERN_WARNING 953 "HDMI: pin %d wcaps %#x " 954 "does not support connection list\n", 955 pin_nid, get_wcaps(codec, pin_nid)); 956 return -EINVAL; 957 } 958 959 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid, 960 per_pin->mux_nids, 961 HDA_MAX_CONNECTIONS); 962 963 return 0; 964 } 965 966 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) 967 { 968 struct hda_codec *codec = per_pin->codec; 969 struct hdmi_eld *eld = &per_pin->sink_eld; 970 hda_nid_t pin_nid = per_pin->pin_nid; 971 /* 972 * Always execute a GetPinSense verb here, even when called from 973 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited 974 * response's PD bit is not the real PD value, but indicates that 975 * the real PD value changed. An older version of the HD-audio 976 * specification worked this way. Hence, we just ignore the data in 977 * the unsolicited response to avoid custom WARs. 978 */ 979 int present = snd_hda_pin_sense(codec, pin_nid); 980 bool eld_valid = false; 981 982 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer)); 983 984 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); 985 if (eld->monitor_present) 986 eld_valid = !!(present & AC_PINSENSE_ELDV); 987 988 _snd_printd(SND_PR_VERBOSE, 989 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 990 codec->addr, pin_nid, eld->monitor_present, eld_valid); 991 992 if (eld_valid) { 993 if (!snd_hdmi_get_eld(eld, codec, pin_nid)) 994 snd_hdmi_show_eld(eld); 995 else if (repoll) { 996 queue_delayed_work(codec->bus->workq, 997 &per_pin->work, 998 msecs_to_jiffies(300)); 999 } 1000 } 1001 } 1002 1003 static void hdmi_repoll_eld(struct work_struct *work) 1004 { 1005 struct hdmi_spec_per_pin *per_pin = 1006 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work); 1007 1008 if (per_pin->repoll_count++ > 6) 1009 per_pin->repoll_count = 0; 1010 1011 hdmi_present_sense(per_pin, per_pin->repoll_count); 1012 } 1013 1014 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1015 { 1016 struct hdmi_spec *spec = codec->spec; 1017 unsigned int caps, config; 1018 int pin_idx; 1019 struct hdmi_spec_per_pin *per_pin; 1020 int err; 1021 1022 caps = snd_hda_param_read(codec, pin_nid, AC_PAR_PIN_CAP); 1023 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP))) 1024 return 0; 1025 1026 config = snd_hda_codec_read(codec, pin_nid, 0, 1027 AC_VERB_GET_CONFIG_DEFAULT, 0); 1028 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) 1029 return 0; 1030 1031 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS)) 1032 return -E2BIG; 1033 1034 pin_idx = spec->num_pins; 1035 per_pin = &spec->pins[pin_idx]; 1036 1037 per_pin->pin_nid = pin_nid; 1038 1039 err = hdmi_read_pin_conn(codec, pin_idx); 1040 if (err < 0) 1041 return err; 1042 1043 spec->num_pins++; 1044 1045 return 0; 1046 } 1047 1048 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1049 { 1050 struct hdmi_spec *spec = codec->spec; 1051 int cvt_idx; 1052 struct hdmi_spec_per_cvt *per_cvt; 1053 unsigned int chans; 1054 int err; 1055 1056 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS)) 1057 return -E2BIG; 1058 1059 chans = get_wcaps(codec, cvt_nid); 1060 chans = get_wcaps_channels(chans); 1061 1062 cvt_idx = spec->num_cvts; 1063 per_cvt = &spec->cvts[cvt_idx]; 1064 1065 per_cvt->cvt_nid = cvt_nid; 1066 per_cvt->channels_min = 2; 1067 if (chans <= 16) 1068 per_cvt->channels_max = chans; 1069 1070 err = snd_hda_query_supported_pcm(codec, cvt_nid, 1071 &per_cvt->rates, 1072 &per_cvt->formats, 1073 &per_cvt->maxbps); 1074 if (err < 0) 1075 return err; 1076 1077 spec->num_cvts++; 1078 1079 return 0; 1080 } 1081 1082 static int hdmi_parse_codec(struct hda_codec *codec) 1083 { 1084 hda_nid_t nid; 1085 int i, nodes; 1086 1087 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid); 1088 if (!nid || nodes < 0) { 1089 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n"); 1090 return -EINVAL; 1091 } 1092 1093 for (i = 0; i < nodes; i++, nid++) { 1094 unsigned int caps; 1095 unsigned int type; 1096 1097 caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP); 1098 type = get_wcaps_type(caps); 1099 1100 if (!(caps & AC_WCAP_DIGITAL)) 1101 continue; 1102 1103 switch (type) { 1104 case AC_WID_AUD_OUT: 1105 hdmi_add_cvt(codec, nid); 1106 break; 1107 case AC_WID_PIN: 1108 hdmi_add_pin(codec, nid); 1109 break; 1110 } 1111 } 1112 1113 /* 1114 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event 1115 * can be lost and presence sense verb will become inaccurate if the 1116 * HDA link is powered off at hot plug or hw initialization time. 1117 */ 1118 #ifdef CONFIG_SND_HDA_POWER_SAVE 1119 if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & 1120 AC_PWRST_EPSS)) 1121 codec->bus->power_keep_link_on = 1; 1122 #endif 1123 1124 return 0; 1125 } 1126 1127 /* 1128 */ 1129 static char *get_hdmi_pcm_name(int idx) 1130 { 1131 static char names[MAX_HDMI_PINS][8]; 1132 sprintf(&names[idx][0], "HDMI %d", idx); 1133 return &names[idx][0]; 1134 } 1135 1136 /* 1137 * HDMI callbacks 1138 */ 1139 1140 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1141 struct hda_codec *codec, 1142 unsigned int stream_tag, 1143 unsigned int format, 1144 struct snd_pcm_substream *substream) 1145 { 1146 hda_nid_t cvt_nid = hinfo->nid; 1147 struct hdmi_spec *spec = codec->spec; 1148 int pin_idx = hinfo_to_pin_index(spec, hinfo); 1149 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid; 1150 int pinctl; 1151 1152 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); 1153 1154 hdmi_setup_audio_infoframe(codec, pin_idx, substream); 1155 1156 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 1157 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1158 snd_hda_codec_write(codec, pin_nid, 0, 1159 AC_VERB_SET_PIN_WIDGET_CONTROL, pinctl | PIN_OUT); 1160 1161 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); 1162 } 1163 1164 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, 1165 struct hda_codec *codec, 1166 struct snd_pcm_substream *substream) 1167 { 1168 snd_hda_codec_cleanup_stream(codec, hinfo->nid); 1169 return 0; 1170 } 1171 1172 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo, 1173 struct hda_codec *codec, 1174 struct snd_pcm_substream *substream) 1175 { 1176 struct hdmi_spec *spec = codec->spec; 1177 int cvt_idx, pin_idx; 1178 struct hdmi_spec_per_cvt *per_cvt; 1179 struct hdmi_spec_per_pin *per_pin; 1180 int pinctl; 1181 1182 if (hinfo->nid) { 1183 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid); 1184 if (snd_BUG_ON(cvt_idx < 0)) 1185 return -EINVAL; 1186 per_cvt = &spec->cvts[cvt_idx]; 1187 1188 snd_BUG_ON(!per_cvt->assigned); 1189 per_cvt->assigned = 0; 1190 hinfo->nid = 0; 1191 1192 pin_idx = hinfo_to_pin_index(spec, hinfo); 1193 if (snd_BUG_ON(pin_idx < 0)) 1194 return -EINVAL; 1195 per_pin = &spec->pins[pin_idx]; 1196 1197 pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 1198 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1199 snd_hda_codec_write(codec, per_pin->pin_nid, 0, 1200 AC_VERB_SET_PIN_WIDGET_CONTROL, 1201 pinctl & ~PIN_OUT); 1202 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1203 } 1204 return 0; 1205 } 1206 1207 static const struct hda_pcm_ops generic_ops = { 1208 .open = hdmi_pcm_open, 1209 .close = hdmi_pcm_close, 1210 .prepare = generic_hdmi_playback_pcm_prepare, 1211 .cleanup = generic_hdmi_playback_pcm_cleanup, 1212 }; 1213 1214 static int generic_hdmi_build_pcms(struct hda_codec *codec) 1215 { 1216 struct hdmi_spec *spec = codec->spec; 1217 int pin_idx; 1218 1219 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1220 struct hda_pcm *info; 1221 struct hda_pcm_stream *pstr; 1222 1223 info = &spec->pcm_rec[pin_idx]; 1224 info->name = get_hdmi_pcm_name(pin_idx); 1225 info->pcm_type = HDA_PCM_TYPE_HDMI; 1226 1227 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1228 pstr->substreams = 1; 1229 pstr->ops = generic_ops; 1230 /* other pstr fields are set in open */ 1231 } 1232 1233 codec->num_pcms = spec->num_pins; 1234 codec->pcm_info = spec->pcm_rec; 1235 1236 return 0; 1237 } 1238 1239 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx) 1240 { 1241 char hdmi_str[32] = "HDMI/DP"; 1242 struct hdmi_spec *spec = codec->spec; 1243 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1244 int pcmdev = spec->pcm_rec[pin_idx].device; 1245 1246 if (pcmdev > 0) 1247 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev); 1248 1249 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0); 1250 } 1251 1252 static int generic_hdmi_build_controls(struct hda_codec *codec) 1253 { 1254 struct hdmi_spec *spec = codec->spec; 1255 int err; 1256 int pin_idx; 1257 1258 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1259 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1260 1261 err = generic_hdmi_build_jack(codec, pin_idx); 1262 if (err < 0) 1263 return err; 1264 1265 err = snd_hda_create_spdif_out_ctls(codec, 1266 per_pin->pin_nid, 1267 per_pin->mux_nids[0]); 1268 if (err < 0) 1269 return err; 1270 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1271 1272 /* add control for ELD Bytes */ 1273 err = hdmi_create_eld_ctl(codec, 1274 pin_idx, 1275 spec->pcm_rec[pin_idx].device); 1276 1277 if (err < 0) 1278 return err; 1279 1280 hdmi_present_sense(per_pin, 0); 1281 } 1282 1283 return 0; 1284 } 1285 1286 static int generic_hdmi_init_per_pins(struct hda_codec *codec) 1287 { 1288 struct hdmi_spec *spec = codec->spec; 1289 int pin_idx; 1290 1291 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1292 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1293 struct hdmi_eld *eld = &per_pin->sink_eld; 1294 1295 per_pin->codec = codec; 1296 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); 1297 snd_hda_eld_proc_new(codec, eld, pin_idx); 1298 } 1299 return 0; 1300 } 1301 1302 static int generic_hdmi_init(struct hda_codec *codec) 1303 { 1304 struct hdmi_spec *spec = codec->spec; 1305 int pin_idx; 1306 1307 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1308 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1309 hda_nid_t pin_nid = per_pin->pin_nid; 1310 1311 hdmi_init_pin(codec, pin_nid); 1312 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid); 1313 } 1314 snd_hda_jack_report_sync(codec); 1315 return 0; 1316 } 1317 1318 static void generic_hdmi_free(struct hda_codec *codec) 1319 { 1320 struct hdmi_spec *spec = codec->spec; 1321 int pin_idx; 1322 1323 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1324 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx]; 1325 struct hdmi_eld *eld = &per_pin->sink_eld; 1326 1327 cancel_delayed_work(&per_pin->work); 1328 snd_hda_eld_proc_free(codec, eld); 1329 } 1330 1331 flush_workqueue(codec->bus->workq); 1332 kfree(spec); 1333 } 1334 1335 static const struct hda_codec_ops generic_hdmi_patch_ops = { 1336 .init = generic_hdmi_init, 1337 .free = generic_hdmi_free, 1338 .build_pcms = generic_hdmi_build_pcms, 1339 .build_controls = generic_hdmi_build_controls, 1340 .unsol_event = hdmi_unsol_event, 1341 }; 1342 1343 static int patch_generic_hdmi(struct hda_codec *codec) 1344 { 1345 struct hdmi_spec *spec; 1346 1347 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1348 if (spec == NULL) 1349 return -ENOMEM; 1350 1351 codec->spec = spec; 1352 if (hdmi_parse_codec(codec) < 0) { 1353 codec->spec = NULL; 1354 kfree(spec); 1355 return -EINVAL; 1356 } 1357 codec->patch_ops = generic_hdmi_patch_ops; 1358 generic_hdmi_init_per_pins(codec); 1359 1360 init_channel_allocations(); 1361 1362 return 0; 1363 } 1364 1365 /* 1366 * Shared non-generic implementations 1367 */ 1368 1369 static int simple_playback_build_pcms(struct hda_codec *codec) 1370 { 1371 struct hdmi_spec *spec = codec->spec; 1372 struct hda_pcm *info = spec->pcm_rec; 1373 unsigned int chans; 1374 struct hda_pcm_stream *pstr; 1375 1376 codec->num_pcms = 1; 1377 codec->pcm_info = info; 1378 1379 chans = get_wcaps(codec, spec->cvts[0].cvt_nid); 1380 chans = get_wcaps_channels(chans); 1381 1382 info->name = get_hdmi_pcm_name(0); 1383 info->pcm_type = HDA_PCM_TYPE_HDMI; 1384 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1385 *pstr = spec->pcm_playback; 1386 pstr->nid = spec->cvts[0].cvt_nid; 1387 if (pstr->channels_max <= 2 && chans && chans <= 16) 1388 pstr->channels_max = chans; 1389 1390 return 0; 1391 } 1392 1393 /* unsolicited event for jack sensing */ 1394 static void simple_hdmi_unsol_event(struct hda_codec *codec, 1395 unsigned int res) 1396 { 1397 snd_hda_jack_set_dirty_all(codec); 1398 snd_hda_jack_report_sync(codec); 1399 } 1400 1401 /* generic_hdmi_build_jack can be used for simple_hdmi, too, 1402 * as long as spec->pins[] is set correctly 1403 */ 1404 #define simple_hdmi_build_jack generic_hdmi_build_jack 1405 1406 static int simple_playback_build_controls(struct hda_codec *codec) 1407 { 1408 struct hdmi_spec *spec = codec->spec; 1409 int err; 1410 1411 err = snd_hda_create_spdif_out_ctls(codec, 1412 spec->cvts[0].cvt_nid, 1413 spec->cvts[0].cvt_nid); 1414 if (err < 0) 1415 return err; 1416 return simple_hdmi_build_jack(codec, 0); 1417 } 1418 1419 static int simple_playback_init(struct hda_codec *codec) 1420 { 1421 struct hdmi_spec *spec = codec->spec; 1422 hda_nid_t pin = spec->pins[0].pin_nid; 1423 1424 snd_hda_codec_write(codec, pin, 0, 1425 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); 1426 /* some codecs require to unmute the pin */ 1427 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) 1428 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE, 1429 AMP_OUT_UNMUTE); 1430 snd_hda_jack_detect_enable(codec, pin, pin); 1431 snd_hda_jack_report_sync(codec); 1432 return 0; 1433 } 1434 1435 static void simple_playback_free(struct hda_codec *codec) 1436 { 1437 struct hdmi_spec *spec = codec->spec; 1438 1439 kfree(spec); 1440 } 1441 1442 /* 1443 * Nvidia specific implementations 1444 */ 1445 1446 #define Nv_VERB_SET_Channel_Allocation 0xF79 1447 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A 1448 #define Nv_VERB_SET_Audio_Protection_On 0xF98 1449 #define Nv_VERB_SET_Audio_Protection_Off 0xF99 1450 1451 #define nvhdmi_master_con_nid_7x 0x04 1452 #define nvhdmi_master_pin_nid_7x 0x05 1453 1454 static const hda_nid_t nvhdmi_con_nids_7x[4] = { 1455 /*front, rear, clfe, rear_surr */ 1456 0x6, 0x8, 0xa, 0xc, 1457 }; 1458 1459 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = { 1460 /* set audio protect on */ 1461 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1462 /* enable digital output on pin widget */ 1463 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1464 {} /* terminator */ 1465 }; 1466 1467 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = { 1468 /* set audio protect on */ 1469 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 1470 /* enable digital output on pin widget */ 1471 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1472 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1473 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1474 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1475 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 1476 {} /* terminator */ 1477 }; 1478 1479 #ifdef LIMITED_RATE_FMT_SUPPORT 1480 /* support only the safe format and rate */ 1481 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000 1482 #define SUPPORTED_MAXBPS 16 1483 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE 1484 #else 1485 /* support all rates and formats */ 1486 #define SUPPORTED_RATES \ 1487 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ 1488 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 1489 SNDRV_PCM_RATE_192000) 1490 #define SUPPORTED_MAXBPS 24 1491 #define SUPPORTED_FORMATS \ 1492 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 1493 #endif 1494 1495 static int nvhdmi_7x_init_2ch(struct hda_codec *codec) 1496 { 1497 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch); 1498 return 0; 1499 } 1500 1501 static int nvhdmi_7x_init_8ch(struct hda_codec *codec) 1502 { 1503 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch); 1504 return 0; 1505 } 1506 1507 static unsigned int channels_2_6_8[] = { 1508 2, 6, 8 1509 }; 1510 1511 static unsigned int channels_2_8[] = { 1512 2, 8 1513 }; 1514 1515 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = { 1516 .count = ARRAY_SIZE(channels_2_6_8), 1517 .list = channels_2_6_8, 1518 .mask = 0, 1519 }; 1520 1521 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = { 1522 .count = ARRAY_SIZE(channels_2_8), 1523 .list = channels_2_8, 1524 .mask = 0, 1525 }; 1526 1527 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, 1528 struct hda_codec *codec, 1529 struct snd_pcm_substream *substream) 1530 { 1531 struct hdmi_spec *spec = codec->spec; 1532 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL; 1533 1534 switch (codec->preset->id) { 1535 case 0x10de0002: 1536 case 0x10de0003: 1537 case 0x10de0005: 1538 case 0x10de0006: 1539 hw_constraints_channels = &hw_constraints_2_8_channels; 1540 break; 1541 case 0x10de0007: 1542 hw_constraints_channels = &hw_constraints_2_6_8_channels; 1543 break; 1544 default: 1545 break; 1546 } 1547 1548 if (hw_constraints_channels != NULL) { 1549 snd_pcm_hw_constraint_list(substream->runtime, 0, 1550 SNDRV_PCM_HW_PARAM_CHANNELS, 1551 hw_constraints_channels); 1552 } else { 1553 snd_pcm_hw_constraint_step(substream->runtime, 0, 1554 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1555 } 1556 1557 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 1558 } 1559 1560 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo, 1561 struct hda_codec *codec, 1562 struct snd_pcm_substream *substream) 1563 { 1564 struct hdmi_spec *spec = codec->spec; 1565 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1566 } 1567 1568 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1569 struct hda_codec *codec, 1570 unsigned int stream_tag, 1571 unsigned int format, 1572 struct snd_pcm_substream *substream) 1573 { 1574 struct hdmi_spec *spec = codec->spec; 1575 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, 1576 stream_tag, format, substream); 1577 } 1578 1579 static const struct hda_pcm_stream simple_pcm_playback = { 1580 .substreams = 1, 1581 .channels_min = 2, 1582 .channels_max = 2, 1583 .ops = { 1584 .open = simple_playback_pcm_open, 1585 .close = simple_playback_pcm_close, 1586 .prepare = simple_playback_pcm_prepare 1587 }, 1588 }; 1589 1590 static const struct hda_codec_ops simple_hdmi_patch_ops = { 1591 .build_controls = simple_playback_build_controls, 1592 .build_pcms = simple_playback_build_pcms, 1593 .init = simple_playback_init, 1594 .free = simple_playback_free, 1595 .unsol_event = simple_hdmi_unsol_event, 1596 }; 1597 1598 static int patch_simple_hdmi(struct hda_codec *codec, 1599 hda_nid_t cvt_nid, hda_nid_t pin_nid) 1600 { 1601 struct hdmi_spec *spec; 1602 1603 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1604 if (!spec) 1605 return -ENOMEM; 1606 1607 codec->spec = spec; 1608 1609 spec->multiout.num_dacs = 0; /* no analog */ 1610 spec->multiout.max_channels = 2; 1611 spec->multiout.dig_out_nid = cvt_nid; 1612 spec->num_cvts = 1; 1613 spec->num_pins = 1; 1614 spec->cvts[0].cvt_nid = cvt_nid; 1615 spec->pins[0].pin_nid = pin_nid; 1616 spec->pcm_playback = simple_pcm_playback; 1617 1618 codec->patch_ops = simple_hdmi_patch_ops; 1619 1620 return 0; 1621 } 1622 1623 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, 1624 int channels) 1625 { 1626 unsigned int chanmask; 1627 int chan = channels ? (channels - 1) : 1; 1628 1629 switch (channels) { 1630 default: 1631 case 0: 1632 case 2: 1633 chanmask = 0x00; 1634 break; 1635 case 4: 1636 chanmask = 0x08; 1637 break; 1638 case 6: 1639 chanmask = 0x0b; 1640 break; 1641 case 8: 1642 chanmask = 0x13; 1643 break; 1644 } 1645 1646 /* Set the audio infoframe channel allocation and checksum fields. The 1647 * channel count is computed implicitly by the hardware. */ 1648 snd_hda_codec_write(codec, 0x1, 0, 1649 Nv_VERB_SET_Channel_Allocation, chanmask); 1650 1651 snd_hda_codec_write(codec, 0x1, 0, 1652 Nv_VERB_SET_Info_Frame_Checksum, 1653 (0x71 - chan - chanmask)); 1654 } 1655 1656 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo, 1657 struct hda_codec *codec, 1658 struct snd_pcm_substream *substream) 1659 { 1660 struct hdmi_spec *spec = codec->spec; 1661 int i; 1662 1663 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 1664 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 1665 for (i = 0; i < 4; i++) { 1666 /* set the stream id */ 1667 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1668 AC_VERB_SET_CHANNEL_STREAMID, 0); 1669 /* set the stream format */ 1670 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 1671 AC_VERB_SET_STREAM_FORMAT, 0); 1672 } 1673 1674 /* The audio hardware sends a channel count of 0x7 (8ch) when all the 1675 * streams are disabled. */ 1676 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1677 1678 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 1679 } 1680 1681 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo, 1682 struct hda_codec *codec, 1683 unsigned int stream_tag, 1684 unsigned int format, 1685 struct snd_pcm_substream *substream) 1686 { 1687 int chs; 1688 unsigned int dataDCC2, channel_id; 1689 int i; 1690 struct hdmi_spec *spec = codec->spec; 1691 struct hda_spdif_out *spdif; 1692 1693 mutex_lock(&codec->spdif_mutex); 1694 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid); 1695 1696 chs = substream->runtime->channels; 1697 1698 dataDCC2 = 0x2; 1699 1700 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 1701 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) 1702 snd_hda_codec_write(codec, 1703 nvhdmi_master_con_nid_7x, 1704 0, 1705 AC_VERB_SET_DIGI_CONVERT_1, 1706 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1707 1708 /* set the stream id */ 1709 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1710 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 1711 1712 /* set the stream format */ 1713 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 1714 AC_VERB_SET_STREAM_FORMAT, format); 1715 1716 /* turn on again (if needed) */ 1717 /* enable and set the channel status audio/data flag */ 1718 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { 1719 snd_hda_codec_write(codec, 1720 nvhdmi_master_con_nid_7x, 1721 0, 1722 AC_VERB_SET_DIGI_CONVERT_1, 1723 spdif->ctls & 0xff); 1724 snd_hda_codec_write(codec, 1725 nvhdmi_master_con_nid_7x, 1726 0, 1727 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1728 } 1729 1730 for (i = 0; i < 4; i++) { 1731 if (chs == 2) 1732 channel_id = 0; 1733 else 1734 channel_id = i * 2; 1735 1736 /* turn off SPDIF once; 1737 *otherwise the IEC958 bits won't be updated 1738 */ 1739 if (codec->spdif_status_reset && 1740 (spdif->ctls & AC_DIG1_ENABLE)) 1741 snd_hda_codec_write(codec, 1742 nvhdmi_con_nids_7x[i], 1743 0, 1744 AC_VERB_SET_DIGI_CONVERT_1, 1745 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 1746 /* set the stream id */ 1747 snd_hda_codec_write(codec, 1748 nvhdmi_con_nids_7x[i], 1749 0, 1750 AC_VERB_SET_CHANNEL_STREAMID, 1751 (stream_tag << 4) | channel_id); 1752 /* set the stream format */ 1753 snd_hda_codec_write(codec, 1754 nvhdmi_con_nids_7x[i], 1755 0, 1756 AC_VERB_SET_STREAM_FORMAT, 1757 format); 1758 /* turn on again (if needed) */ 1759 /* enable and set the channel status audio/data flag */ 1760 if (codec->spdif_status_reset && 1761 (spdif->ctls & AC_DIG1_ENABLE)) { 1762 snd_hda_codec_write(codec, 1763 nvhdmi_con_nids_7x[i], 1764 0, 1765 AC_VERB_SET_DIGI_CONVERT_1, 1766 spdif->ctls & 0xff); 1767 snd_hda_codec_write(codec, 1768 nvhdmi_con_nids_7x[i], 1769 0, 1770 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 1771 } 1772 } 1773 1774 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); 1775 1776 mutex_unlock(&codec->spdif_mutex); 1777 return 0; 1778 } 1779 1780 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = { 1781 .substreams = 1, 1782 .channels_min = 2, 1783 .channels_max = 8, 1784 .nid = nvhdmi_master_con_nid_7x, 1785 .rates = SUPPORTED_RATES, 1786 .maxbps = SUPPORTED_MAXBPS, 1787 .formats = SUPPORTED_FORMATS, 1788 .ops = { 1789 .open = simple_playback_pcm_open, 1790 .close = nvhdmi_8ch_7x_pcm_close, 1791 .prepare = nvhdmi_8ch_7x_pcm_prepare 1792 }, 1793 }; 1794 1795 static int patch_nvhdmi_2ch(struct hda_codec *codec) 1796 { 1797 struct hdmi_spec *spec; 1798 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x, 1799 nvhdmi_master_pin_nid_7x); 1800 if (err < 0) 1801 return err; 1802 1803 codec->patch_ops.init = nvhdmi_7x_init_2ch; 1804 /* override the PCM rates, etc, as the codec doesn't give full list */ 1805 spec = codec->spec; 1806 spec->pcm_playback.rates = SUPPORTED_RATES; 1807 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS; 1808 spec->pcm_playback.formats = SUPPORTED_FORMATS; 1809 return 0; 1810 } 1811 1812 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) 1813 { 1814 struct hdmi_spec *spec; 1815 int err = patch_nvhdmi_2ch(codec); 1816 if (err < 0) 1817 return err; 1818 spec = codec->spec; 1819 spec->multiout.max_channels = 8; 1820 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x; 1821 codec->patch_ops.init = nvhdmi_7x_init_8ch; 1822 1823 /* Initialize the audio infoframe channel mask and checksum to something 1824 * valid */ 1825 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 1826 1827 return 0; 1828 } 1829 1830 /* 1831 * ATI-specific implementations 1832 * 1833 * FIXME: we may omit the whole this and use the generic code once after 1834 * it's confirmed to work. 1835 */ 1836 1837 #define ATIHDMI_CVT_NID 0x02 /* audio converter */ 1838 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ 1839 1840 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1841 struct hda_codec *codec, 1842 unsigned int stream_tag, 1843 unsigned int format, 1844 struct snd_pcm_substream *substream) 1845 { 1846 struct hdmi_spec *spec = codec->spec; 1847 int chans = substream->runtime->channels; 1848 int i, err; 1849 1850 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, 1851 substream); 1852 if (err < 0) 1853 return err; 1854 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1855 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); 1856 /* FIXME: XXX */ 1857 for (i = 0; i < chans; i++) { 1858 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0, 1859 AC_VERB_SET_HDMI_CHAN_SLOT, 1860 (i << 4) | i); 1861 } 1862 return 0; 1863 } 1864 1865 static int patch_atihdmi(struct hda_codec *codec) 1866 { 1867 struct hdmi_spec *spec; 1868 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID); 1869 if (err < 0) 1870 return err; 1871 spec = codec->spec; 1872 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare; 1873 return 0; 1874 } 1875 1876 /* VIA HDMI Implementation */ 1877 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */ 1878 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */ 1879 1880 static int patch_via_hdmi(struct hda_codec *codec) 1881 { 1882 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID); 1883 } 1884 1885 /* 1886 * patch entries 1887 */ 1888 static const struct hda_codec_preset snd_hda_preset_hdmi[] = { 1889 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1890 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, 1891 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, 1892 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, 1893 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, 1894 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, 1895 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, 1896 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1897 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1898 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1899 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 1900 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, 1901 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, 1902 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, 1903 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, 1904 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, 1905 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, 1906 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, 1907 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, 1908 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, 1909 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, 1910 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, 1911 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, 1912 /* 17 is known to be absent */ 1913 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, 1914 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, 1915 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, 1916 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, 1917 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, 1918 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, 1919 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, 1920 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, 1921 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, 1922 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, 1923 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi }, 1924 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 1925 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 1926 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 1927 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 1928 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 1929 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 1930 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1931 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi }, 1932 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi }, 1933 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi }, 1934 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 1935 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, 1936 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, 1937 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, 1938 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, 1939 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, 1940 {} /* terminator */ 1941 }; 1942 1943 MODULE_ALIAS("snd-hda-codec-id:1002793c"); 1944 MODULE_ALIAS("snd-hda-codec-id:10027919"); 1945 MODULE_ALIAS("snd-hda-codec-id:1002791a"); 1946 MODULE_ALIAS("snd-hda-codec-id:1002aa01"); 1947 MODULE_ALIAS("snd-hda-codec-id:10951390"); 1948 MODULE_ALIAS("snd-hda-codec-id:10951392"); 1949 MODULE_ALIAS("snd-hda-codec-id:10de0002"); 1950 MODULE_ALIAS("snd-hda-codec-id:10de0003"); 1951 MODULE_ALIAS("snd-hda-codec-id:10de0005"); 1952 MODULE_ALIAS("snd-hda-codec-id:10de0006"); 1953 MODULE_ALIAS("snd-hda-codec-id:10de0007"); 1954 MODULE_ALIAS("snd-hda-codec-id:10de000a"); 1955 MODULE_ALIAS("snd-hda-codec-id:10de000b"); 1956 MODULE_ALIAS("snd-hda-codec-id:10de000c"); 1957 MODULE_ALIAS("snd-hda-codec-id:10de000d"); 1958 MODULE_ALIAS("snd-hda-codec-id:10de0010"); 1959 MODULE_ALIAS("snd-hda-codec-id:10de0011"); 1960 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 1961 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 1962 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 1963 MODULE_ALIAS("snd-hda-codec-id:10de0015"); 1964 MODULE_ALIAS("snd-hda-codec-id:10de0016"); 1965 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 1966 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 1967 MODULE_ALIAS("snd-hda-codec-id:10de001a"); 1968 MODULE_ALIAS("snd-hda-codec-id:10de001b"); 1969 MODULE_ALIAS("snd-hda-codec-id:10de001c"); 1970 MODULE_ALIAS("snd-hda-codec-id:10de0040"); 1971 MODULE_ALIAS("snd-hda-codec-id:10de0041"); 1972 MODULE_ALIAS("snd-hda-codec-id:10de0042"); 1973 MODULE_ALIAS("snd-hda-codec-id:10de0043"); 1974 MODULE_ALIAS("snd-hda-codec-id:10de0044"); 1975 MODULE_ALIAS("snd-hda-codec-id:10de0051"); 1976 MODULE_ALIAS("snd-hda-codec-id:10de0067"); 1977 MODULE_ALIAS("snd-hda-codec-id:10de8001"); 1978 MODULE_ALIAS("snd-hda-codec-id:11069f80"); 1979 MODULE_ALIAS("snd-hda-codec-id:11069f81"); 1980 MODULE_ALIAS("snd-hda-codec-id:11069f84"); 1981 MODULE_ALIAS("snd-hda-codec-id:11069f85"); 1982 MODULE_ALIAS("snd-hda-codec-id:17e80047"); 1983 MODULE_ALIAS("snd-hda-codec-id:80860054"); 1984 MODULE_ALIAS("snd-hda-codec-id:80862801"); 1985 MODULE_ALIAS("snd-hda-codec-id:80862802"); 1986 MODULE_ALIAS("snd-hda-codec-id:80862803"); 1987 MODULE_ALIAS("snd-hda-codec-id:80862804"); 1988 MODULE_ALIAS("snd-hda-codec-id:80862805"); 1989 MODULE_ALIAS("snd-hda-codec-id:80862806"); 1990 MODULE_ALIAS("snd-hda-codec-id:80862807"); 1991 MODULE_ALIAS("snd-hda-codec-id:80862880"); 1992 MODULE_ALIAS("snd-hda-codec-id:808629fb"); 1993 1994 MODULE_LICENSE("GPL"); 1995 MODULE_DESCRIPTION("HDMI HD-audio codec"); 1996 MODULE_ALIAS("snd-hda-codec-intelhdmi"); 1997 MODULE_ALIAS("snd-hda-codec-nvhdmi"); 1998 MODULE_ALIAS("snd-hda-codec-atihdmi"); 1999 2000 static struct hda_codec_preset_list intel_list = { 2001 .preset = snd_hda_preset_hdmi, 2002 .owner = THIS_MODULE, 2003 }; 2004 2005 static int __init patch_hdmi_init(void) 2006 { 2007 return snd_hda_add_codec_preset(&intel_list); 2008 } 2009 2010 static void __exit patch_hdmi_exit(void) 2011 { 2012 snd_hda_delete_codec_preset(&intel_list); 2013 } 2014 2015 module_init(patch_hdmi_init) 2016 module_exit(patch_hdmi_exit) 2017