1 /* 2 * 3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs 4 * 5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved. 6 * Copyright (c) 2006 ATI Technologies Inc. 7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved. 8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com> 9 * 10 * Authors: 11 * Wu Fengguang <wfg@linux.intel.com> 12 * 13 * Maintained by: 14 * Wu Fengguang <wfg@linux.intel.com> 15 * 16 * This program is free software; you can redistribute it and/or modify it 17 * under the terms of the GNU General Public License as published by the Free 18 * Software Foundation; either version 2 of the License, or (at your option) 19 * any later version. 20 * 21 * This program is distributed in the hope that it will be useful, but 22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 24 * for more details. 25 * 26 * You should have received a copy of the GNU General Public License 27 * along with this program; if not, write to the Free Software Foundation, 28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 29 */ 30 31 #include <linux/init.h> 32 #include <linux/delay.h> 33 #include <linux/slab.h> 34 #include <linux/module.h> 35 #include <sound/core.h> 36 #include <sound/jack.h> 37 #include <sound/asoundef.h> 38 #include <sound/tlv.h> 39 #include "hda_codec.h" 40 #include "hda_local.h" 41 #include "hda_jack.h" 42 43 static bool static_hdmi_pcm; 44 module_param(static_hdmi_pcm, bool, 0644); 45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info"); 46 47 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807) 48 49 struct hdmi_spec_per_cvt { 50 hda_nid_t cvt_nid; 51 int assigned; 52 unsigned int channels_min; 53 unsigned int channels_max; 54 u32 rates; 55 u64 formats; 56 unsigned int maxbps; 57 }; 58 59 /* max. connections to a widget */ 60 #define HDA_MAX_CONNECTIONS 32 61 62 struct hdmi_spec_per_pin { 63 hda_nid_t pin_nid; 64 int num_mux_nids; 65 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS]; 66 67 struct hda_codec *codec; 68 struct hdmi_eld sink_eld; 69 struct delayed_work work; 70 struct snd_kcontrol *eld_ctl; 71 int repoll_count; 72 bool setup; /* the stream has been set up by prepare callback */ 73 int channels; /* current number of channels */ 74 bool non_pcm; 75 bool chmap_set; /* channel-map override by ALSA API? */ 76 unsigned char chmap[8]; /* ALSA API channel-map */ 77 char pcm_name[8]; /* filled in build_pcm callbacks */ 78 }; 79 80 struct hdmi_spec { 81 int num_cvts; 82 struct snd_array cvts; /* struct hdmi_spec_per_cvt */ 83 hda_nid_t cvt_nids[4]; /* only for haswell fix */ 84 85 int num_pins; 86 struct snd_array pins; /* struct hdmi_spec_per_pin */ 87 struct snd_array pcm_rec; /* struct hda_pcm */ 88 unsigned int channels_max; /* max over all cvts */ 89 90 struct hdmi_eld temp_eld; 91 /* 92 * Non-generic ATI/NVIDIA specific 93 */ 94 struct hda_multi_out multiout; 95 struct hda_pcm_stream pcm_playback; 96 }; 97 98 99 struct hdmi_audio_infoframe { 100 u8 type; /* 0x84 */ 101 u8 ver; /* 0x01 */ 102 u8 len; /* 0x0a */ 103 104 u8 checksum; 105 106 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */ 107 u8 SS01_SF24; 108 u8 CXT04; 109 u8 CA; 110 u8 LFEPBL01_LSV36_DM_INH7; 111 }; 112 113 struct dp_audio_infoframe { 114 u8 type; /* 0x84 */ 115 u8 len; /* 0x1b */ 116 u8 ver; /* 0x11 << 2 */ 117 118 u8 CC02_CT47; /* match with HDMI infoframe from this on */ 119 u8 SS01_SF24; 120 u8 CXT04; 121 u8 CA; 122 u8 LFEPBL01_LSV36_DM_INH7; 123 }; 124 125 union audio_infoframe { 126 struct hdmi_audio_infoframe hdmi; 127 struct dp_audio_infoframe dp; 128 u8 bytes[0]; 129 }; 130 131 /* 132 * CEA speaker placement: 133 * 134 * FLH FCH FRH 135 * FLW FL FLC FC FRC FR FRW 136 * 137 * LFE 138 * TC 139 * 140 * RL RLC RC RRC RR 141 * 142 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to 143 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC. 144 */ 145 enum cea_speaker_placement { 146 FL = (1 << 0), /* Front Left */ 147 FC = (1 << 1), /* Front Center */ 148 FR = (1 << 2), /* Front Right */ 149 FLC = (1 << 3), /* Front Left Center */ 150 FRC = (1 << 4), /* Front Right Center */ 151 RL = (1 << 5), /* Rear Left */ 152 RC = (1 << 6), /* Rear Center */ 153 RR = (1 << 7), /* Rear Right */ 154 RLC = (1 << 8), /* Rear Left Center */ 155 RRC = (1 << 9), /* Rear Right Center */ 156 LFE = (1 << 10), /* Low Frequency Effect */ 157 FLW = (1 << 11), /* Front Left Wide */ 158 FRW = (1 << 12), /* Front Right Wide */ 159 FLH = (1 << 13), /* Front Left High */ 160 FCH = (1 << 14), /* Front Center High */ 161 FRH = (1 << 15), /* Front Right High */ 162 TC = (1 << 16), /* Top Center */ 163 }; 164 165 /* 166 * ELD SA bits in the CEA Speaker Allocation data block 167 */ 168 static int eld_speaker_allocation_bits[] = { 169 [0] = FL | FR, 170 [1] = LFE, 171 [2] = FC, 172 [3] = RL | RR, 173 [4] = RC, 174 [5] = FLC | FRC, 175 [6] = RLC | RRC, 176 /* the following are not defined in ELD yet */ 177 [7] = FLW | FRW, 178 [8] = FLH | FRH, 179 [9] = TC, 180 [10] = FCH, 181 }; 182 183 struct cea_channel_speaker_allocation { 184 int ca_index; 185 int speakers[8]; 186 187 /* derived values, just for convenience */ 188 int channels; 189 int spk_mask; 190 }; 191 192 /* 193 * ALSA sequence is: 194 * 195 * surround40 surround41 surround50 surround51 surround71 196 * ch0 front left = = = = 197 * ch1 front right = = = = 198 * ch2 rear left = = = = 199 * ch3 rear right = = = = 200 * ch4 LFE center center center 201 * ch5 LFE LFE 202 * ch6 side left 203 * ch7 side right 204 * 205 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR} 206 */ 207 static int hdmi_channel_mapping[0x32][8] = { 208 /* stereo */ 209 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 210 /* 2.1 */ 211 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 }, 212 /* Dolby Surround */ 213 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 }, 214 /* surround40 */ 215 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 }, 216 /* 4ch */ 217 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 }, 218 /* surround41 */ 219 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 }, 220 /* surround50 */ 221 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 }, 222 /* surround51 */ 223 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 }, 224 /* 7.1 */ 225 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 }, 226 }; 227 228 /* 229 * This is an ordered list! 230 * 231 * The preceding ones have better chances to be selected by 232 * hdmi_channel_allocation(). 233 */ 234 static struct cea_channel_speaker_allocation channel_allocations[] = { 235 /* channel: 7 6 5 4 3 2 1 0 */ 236 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } }, 237 /* 2.1 */ 238 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } }, 239 /* Dolby Surround */ 240 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } }, 241 /* surround40 */ 242 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } }, 243 /* surround41 */ 244 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } }, 245 /* surround50 */ 246 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } }, 247 /* surround51 */ 248 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } }, 249 /* 6.1 */ 250 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } }, 251 /* surround71 */ 252 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } }, 253 254 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } }, 255 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } }, 256 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } }, 257 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } }, 258 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } }, 259 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } }, 260 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } }, 261 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } }, 262 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } }, 263 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } }, 264 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } }, 265 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } }, 266 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } }, 267 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } }, 268 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } }, 269 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } }, 270 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } }, 271 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } }, 272 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } }, 273 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } }, 274 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } }, 275 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } }, 276 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } }, 277 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } }, 278 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } }, 279 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } }, 280 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } }, 281 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } }, 282 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } }, 283 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } }, 284 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } }, 285 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } }, 286 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } }, 287 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } }, 288 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } }, 289 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } }, 290 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } }, 291 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } }, 292 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } }, 293 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } }, 294 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } }, 295 }; 296 297 298 /* 299 * HDMI routines 300 */ 301 302 #define get_pin(spec, idx) \ 303 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx)) 304 #define get_cvt(spec, idx) \ 305 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx)) 306 #define get_pcm_rec(spec, idx) \ 307 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx)) 308 309 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid) 310 { 311 int pin_idx; 312 313 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 314 if (get_pin(spec, pin_idx)->pin_nid == pin_nid) 315 return pin_idx; 316 317 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid); 318 return -EINVAL; 319 } 320 321 static int hinfo_to_pin_index(struct hdmi_spec *spec, 322 struct hda_pcm_stream *hinfo) 323 { 324 int pin_idx; 325 326 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) 327 if (get_pcm_rec(spec, pin_idx)->stream == hinfo) 328 return pin_idx; 329 330 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo); 331 return -EINVAL; 332 } 333 334 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid) 335 { 336 int cvt_idx; 337 338 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) 339 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid) 340 return cvt_idx; 341 342 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid); 343 return -EINVAL; 344 } 345 346 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol, 347 struct snd_ctl_elem_info *uinfo) 348 { 349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 350 struct hdmi_spec *spec = codec->spec; 351 struct hdmi_eld *eld; 352 int pin_idx; 353 354 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; 355 356 pin_idx = kcontrol->private_value; 357 eld = &get_pin(spec, pin_idx)->sink_eld; 358 359 mutex_lock(&eld->lock); 360 uinfo->count = eld->eld_valid ? eld->eld_size : 0; 361 mutex_unlock(&eld->lock); 362 363 return 0; 364 } 365 366 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol, 367 struct snd_ctl_elem_value *ucontrol) 368 { 369 struct hda_codec *codec = snd_kcontrol_chip(kcontrol); 370 struct hdmi_spec *spec = codec->spec; 371 struct hdmi_eld *eld; 372 int pin_idx; 373 374 pin_idx = kcontrol->private_value; 375 eld = &get_pin(spec, pin_idx)->sink_eld; 376 377 mutex_lock(&eld->lock); 378 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) { 379 mutex_unlock(&eld->lock); 380 snd_BUG(); 381 return -EINVAL; 382 } 383 384 memset(ucontrol->value.bytes.data, 0, 385 ARRAY_SIZE(ucontrol->value.bytes.data)); 386 if (eld->eld_valid) 387 memcpy(ucontrol->value.bytes.data, eld->eld_buffer, 388 eld->eld_size); 389 mutex_unlock(&eld->lock); 390 391 return 0; 392 } 393 394 static struct snd_kcontrol_new eld_bytes_ctl = { 395 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, 396 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 397 .name = "ELD", 398 .info = hdmi_eld_ctl_info, 399 .get = hdmi_eld_ctl_get, 400 }; 401 402 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx, 403 int device) 404 { 405 struct snd_kcontrol *kctl; 406 struct hdmi_spec *spec = codec->spec; 407 int err; 408 409 kctl = snd_ctl_new1(&eld_bytes_ctl, codec); 410 if (!kctl) 411 return -ENOMEM; 412 kctl->private_value = pin_idx; 413 kctl->id.device = device; 414 415 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl); 416 if (err < 0) 417 return err; 418 419 get_pin(spec, pin_idx)->eld_ctl = kctl; 420 return 0; 421 } 422 423 #ifdef BE_PARANOID 424 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 425 int *packet_index, int *byte_index) 426 { 427 int val; 428 429 val = snd_hda_codec_read(codec, pin_nid, 0, 430 AC_VERB_GET_HDMI_DIP_INDEX, 0); 431 432 *packet_index = val >> 5; 433 *byte_index = val & 0x1f; 434 } 435 #endif 436 437 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid, 438 int packet_index, int byte_index) 439 { 440 int val; 441 442 val = (packet_index << 5) | (byte_index & 0x1f); 443 444 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val); 445 } 446 447 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid, 448 unsigned char val) 449 { 450 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val); 451 } 452 453 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid) 454 { 455 /* Unmute */ 456 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP) 457 snd_hda_codec_write(codec, pin_nid, 0, 458 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE); 459 /* Enable pin out: some machines with GM965 gets broken output when 460 * the pin is disabled or changed while using with HDMI 461 */ 462 snd_hda_codec_write(codec, pin_nid, 0, 463 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); 464 } 465 466 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid) 467 { 468 return 1 + snd_hda_codec_read(codec, cvt_nid, 0, 469 AC_VERB_GET_CVT_CHAN_COUNT, 0); 470 } 471 472 static void hdmi_set_channel_count(struct hda_codec *codec, 473 hda_nid_t cvt_nid, int chs) 474 { 475 if (chs != hdmi_get_channel_count(codec, cvt_nid)) 476 snd_hda_codec_write(codec, cvt_nid, 0, 477 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1); 478 } 479 480 481 /* 482 * Channel mapping routines 483 */ 484 485 /* 486 * Compute derived values in channel_allocations[]. 487 */ 488 static void init_channel_allocations(void) 489 { 490 int i, j; 491 struct cea_channel_speaker_allocation *p; 492 493 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 494 p = channel_allocations + i; 495 p->channels = 0; 496 p->spk_mask = 0; 497 for (j = 0; j < ARRAY_SIZE(p->speakers); j++) 498 if (p->speakers[j]) { 499 p->channels++; 500 p->spk_mask |= p->speakers[j]; 501 } 502 } 503 } 504 505 static int get_channel_allocation_order(int ca) 506 { 507 int i; 508 509 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 510 if (channel_allocations[i].ca_index == ca) 511 break; 512 } 513 return i; 514 } 515 516 /* 517 * The transformation takes two steps: 518 * 519 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask 520 * spk_mask => (channel_allocations[]) => ai->CA 521 * 522 * TODO: it could select the wrong CA from multiple candidates. 523 */ 524 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels) 525 { 526 int i; 527 int ca = 0; 528 int spk_mask = 0; 529 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE]; 530 531 /* 532 * CA defaults to 0 for basic stereo audio 533 */ 534 if (channels <= 2) 535 return 0; 536 537 /* 538 * expand ELD's speaker allocation mask 539 * 540 * ELD tells the speaker mask in a compact(paired) form, 541 * expand ELD's notions to match the ones used by Audio InfoFrame. 542 */ 543 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) { 544 if (eld->info.spk_alloc & (1 << i)) 545 spk_mask |= eld_speaker_allocation_bits[i]; 546 } 547 548 /* search for the first working match in the CA table */ 549 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 550 if (channels == channel_allocations[i].channels && 551 (spk_mask & channel_allocations[i].spk_mask) == 552 channel_allocations[i].spk_mask) { 553 ca = channel_allocations[i].ca_index; 554 break; 555 } 556 } 557 558 if (!ca) { 559 /* if there was no match, select the regular ALSA channel 560 * allocation with the matching number of channels */ 561 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 562 if (channels == channel_allocations[i].channels) { 563 ca = channel_allocations[i].ca_index; 564 break; 565 } 566 } 567 } 568 569 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf)); 570 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n", 571 ca, channels, buf); 572 573 return ca; 574 } 575 576 static void hdmi_debug_channel_mapping(struct hda_codec *codec, 577 hda_nid_t pin_nid) 578 { 579 #ifdef CONFIG_SND_DEBUG_VERBOSE 580 int i; 581 int slot; 582 583 for (i = 0; i < 8; i++) { 584 slot = snd_hda_codec_read(codec, pin_nid, 0, 585 AC_VERB_GET_HDMI_CHAN_SLOT, i); 586 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n", 587 slot >> 4, slot & 0xf); 588 } 589 #endif 590 } 591 592 593 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec, 594 hda_nid_t pin_nid, 595 bool non_pcm, 596 int ca) 597 { 598 int i; 599 int err; 600 int order; 601 int non_pcm_mapping[8]; 602 603 order = get_channel_allocation_order(ca); 604 605 if (hdmi_channel_mapping[ca][1] == 0) { 606 for (i = 0; i < channel_allocations[order].channels; i++) 607 hdmi_channel_mapping[ca][i] = i | (i << 4); 608 for (; i < 8; i++) 609 hdmi_channel_mapping[ca][i] = 0xf | (i << 4); 610 } 611 612 if (non_pcm) { 613 for (i = 0; i < channel_allocations[order].channels; i++) 614 non_pcm_mapping[i] = i | (i << 4); 615 for (; i < 8; i++) 616 non_pcm_mapping[i] = 0xf | (i << 4); 617 } 618 619 for (i = 0; i < 8; i++) { 620 err = snd_hda_codec_write(codec, pin_nid, 0, 621 AC_VERB_SET_HDMI_CHAN_SLOT, 622 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]); 623 if (err) { 624 snd_printdd(KERN_NOTICE 625 "HDMI: channel mapping failed\n"); 626 break; 627 } 628 } 629 630 hdmi_debug_channel_mapping(codec, pin_nid); 631 } 632 633 struct channel_map_table { 634 unsigned char map; /* ALSA API channel map position */ 635 unsigned char cea_slot; /* CEA slot value */ 636 int spk_mask; /* speaker position bit mask */ 637 }; 638 639 static struct channel_map_table map_tables[] = { 640 { SNDRV_CHMAP_FL, 0x00, FL }, 641 { SNDRV_CHMAP_FR, 0x01, FR }, 642 { SNDRV_CHMAP_RL, 0x04, RL }, 643 { SNDRV_CHMAP_RR, 0x05, RR }, 644 { SNDRV_CHMAP_LFE, 0x02, LFE }, 645 { SNDRV_CHMAP_FC, 0x03, FC }, 646 { SNDRV_CHMAP_RLC, 0x06, RLC }, 647 { SNDRV_CHMAP_RRC, 0x07, RRC }, 648 {} /* terminator */ 649 }; 650 651 /* from ALSA API channel position to speaker bit mask */ 652 static int to_spk_mask(unsigned char c) 653 { 654 struct channel_map_table *t = map_tables; 655 for (; t->map; t++) { 656 if (t->map == c) 657 return t->spk_mask; 658 } 659 return 0; 660 } 661 662 /* from ALSA API channel position to CEA slot */ 663 static int to_cea_slot(unsigned char c) 664 { 665 struct channel_map_table *t = map_tables; 666 for (; t->map; t++) { 667 if (t->map == c) 668 return t->cea_slot; 669 } 670 return 0x0f; 671 } 672 673 /* from CEA slot to ALSA API channel position */ 674 static int from_cea_slot(unsigned char c) 675 { 676 struct channel_map_table *t = map_tables; 677 for (; t->map; t++) { 678 if (t->cea_slot == c) 679 return t->map; 680 } 681 return 0; 682 } 683 684 /* from speaker bit mask to ALSA API channel position */ 685 static int spk_to_chmap(int spk) 686 { 687 struct channel_map_table *t = map_tables; 688 for (; t->map; t++) { 689 if (t->spk_mask == spk) 690 return t->map; 691 } 692 return 0; 693 } 694 695 /* get the CA index corresponding to the given ALSA API channel map */ 696 static int hdmi_manual_channel_allocation(int chs, unsigned char *map) 697 { 698 int i, spks = 0, spk_mask = 0; 699 700 for (i = 0; i < chs; i++) { 701 int mask = to_spk_mask(map[i]); 702 if (mask) { 703 spk_mask |= mask; 704 spks++; 705 } 706 } 707 708 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) { 709 if ((chs == channel_allocations[i].channels || 710 spks == channel_allocations[i].channels) && 711 (spk_mask & channel_allocations[i].spk_mask) == 712 channel_allocations[i].spk_mask) 713 return channel_allocations[i].ca_index; 714 } 715 return -1; 716 } 717 718 /* set up the channel slots for the given ALSA API channel map */ 719 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec, 720 hda_nid_t pin_nid, 721 int chs, unsigned char *map) 722 { 723 int i; 724 for (i = 0; i < 8; i++) { 725 int val, err; 726 if (i < chs) 727 val = to_cea_slot(map[i]); 728 else 729 val = 0xf; 730 val |= (i << 4); 731 err = snd_hda_codec_write(codec, pin_nid, 0, 732 AC_VERB_SET_HDMI_CHAN_SLOT, val); 733 if (err) 734 return -EINVAL; 735 } 736 return 0; 737 } 738 739 /* store ALSA API channel map from the current default map */ 740 static void hdmi_setup_fake_chmap(unsigned char *map, int ca) 741 { 742 int i; 743 for (i = 0; i < 8; i++) { 744 if (i < channel_allocations[ca].channels) 745 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f); 746 else 747 map[i] = 0; 748 } 749 } 750 751 static void hdmi_setup_channel_mapping(struct hda_codec *codec, 752 hda_nid_t pin_nid, bool non_pcm, int ca, 753 int channels, unsigned char *map, 754 bool chmap_set) 755 { 756 if (!non_pcm && chmap_set) { 757 hdmi_manual_setup_channel_mapping(codec, pin_nid, 758 channels, map); 759 } else { 760 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca); 761 hdmi_setup_fake_chmap(map, ca); 762 } 763 } 764 765 /* 766 * Audio InfoFrame routines 767 */ 768 769 /* 770 * Enable Audio InfoFrame Transmission 771 */ 772 static void hdmi_start_infoframe_trans(struct hda_codec *codec, 773 hda_nid_t pin_nid) 774 { 775 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 776 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 777 AC_DIPXMIT_BEST); 778 } 779 780 /* 781 * Disable Audio InfoFrame Transmission 782 */ 783 static void hdmi_stop_infoframe_trans(struct hda_codec *codec, 784 hda_nid_t pin_nid) 785 { 786 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 787 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT, 788 AC_DIPXMIT_DISABLE); 789 } 790 791 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid) 792 { 793 #ifdef CONFIG_SND_DEBUG_VERBOSE 794 int i; 795 int size; 796 797 size = snd_hdmi_get_eld_size(codec, pin_nid); 798 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size); 799 800 for (i = 0; i < 8; i++) { 801 size = snd_hda_codec_read(codec, pin_nid, 0, 802 AC_VERB_GET_HDMI_DIP_SIZE, i); 803 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size); 804 } 805 #endif 806 } 807 808 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid) 809 { 810 #ifdef BE_PARANOID 811 int i, j; 812 int size; 813 int pi, bi; 814 for (i = 0; i < 8; i++) { 815 size = snd_hda_codec_read(codec, pin_nid, 0, 816 AC_VERB_GET_HDMI_DIP_SIZE, i); 817 if (size == 0) 818 continue; 819 820 hdmi_set_dip_index(codec, pin_nid, i, 0x0); 821 for (j = 1; j < 1000; j++) { 822 hdmi_write_dip_byte(codec, pin_nid, 0x0); 823 hdmi_get_dip_index(codec, pin_nid, &pi, &bi); 824 if (pi != i) 825 snd_printd(KERN_INFO "dip index %d: %d != %d\n", 826 bi, pi, i); 827 if (bi == 0) /* byte index wrapped around */ 828 break; 829 } 830 snd_printd(KERN_INFO 831 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n", 832 i, size, j); 833 } 834 #endif 835 } 836 837 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai) 838 { 839 u8 *bytes = (u8 *)hdmi_ai; 840 u8 sum = 0; 841 int i; 842 843 hdmi_ai->checksum = 0; 844 845 for (i = 0; i < sizeof(*hdmi_ai); i++) 846 sum += bytes[i]; 847 848 hdmi_ai->checksum = -sum; 849 } 850 851 static void hdmi_fill_audio_infoframe(struct hda_codec *codec, 852 hda_nid_t pin_nid, 853 u8 *dip, int size) 854 { 855 int i; 856 857 hdmi_debug_dip_size(codec, pin_nid); 858 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */ 859 860 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 861 for (i = 0; i < size; i++) 862 hdmi_write_dip_byte(codec, pin_nid, dip[i]); 863 } 864 865 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid, 866 u8 *dip, int size) 867 { 868 u8 val; 869 int i; 870 871 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0) 872 != AC_DIPXMIT_BEST) 873 return false; 874 875 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0); 876 for (i = 0; i < size; i++) { 877 val = snd_hda_codec_read(codec, pin_nid, 0, 878 AC_VERB_GET_HDMI_DIP_DATA, 0); 879 if (val != dip[i]) 880 return false; 881 } 882 883 return true; 884 } 885 886 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, 887 struct hdmi_spec_per_pin *per_pin, 888 bool non_pcm) 889 { 890 hda_nid_t pin_nid = per_pin->pin_nid; 891 int channels = per_pin->channels; 892 struct hdmi_eld *eld; 893 int ca; 894 union audio_infoframe ai; 895 896 if (!channels) 897 return; 898 899 if (is_haswell(codec)) 900 snd_hda_codec_write(codec, pin_nid, 0, 901 AC_VERB_SET_AMP_GAIN_MUTE, 902 AMP_OUT_UNMUTE); 903 904 eld = &per_pin->sink_eld; 905 if (!eld->monitor_present) 906 return; 907 908 if (!non_pcm && per_pin->chmap_set) 909 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap); 910 else 911 ca = hdmi_channel_allocation(eld, channels); 912 if (ca < 0) 913 ca = 0; 914 915 memset(&ai, 0, sizeof(ai)); 916 if (eld->info.conn_type == 0) { /* HDMI */ 917 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi; 918 919 hdmi_ai->type = 0x84; 920 hdmi_ai->ver = 0x01; 921 hdmi_ai->len = 0x0a; 922 hdmi_ai->CC02_CT47 = channels - 1; 923 hdmi_ai->CA = ca; 924 hdmi_checksum_audio_infoframe(hdmi_ai); 925 } else if (eld->info.conn_type == 1) { /* DisplayPort */ 926 struct dp_audio_infoframe *dp_ai = &ai.dp; 927 928 dp_ai->type = 0x84; 929 dp_ai->len = 0x1b; 930 dp_ai->ver = 0x11 << 2; 931 dp_ai->CC02_CT47 = channels - 1; 932 dp_ai->CA = ca; 933 } else { 934 snd_printd("HDMI: unknown connection type at pin %d\n", 935 pin_nid); 936 return; 937 } 938 939 /* 940 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or 941 * sizeof(*dp_ai) to avoid partial match/update problems when 942 * the user switches between HDMI/DP monitors. 943 */ 944 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes, 945 sizeof(ai))) { 946 snd_printdd("hdmi_setup_audio_infoframe: " 947 "pin=%d channels=%d\n", 948 pin_nid, 949 channels); 950 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, 951 channels, per_pin->chmap, 952 per_pin->chmap_set); 953 hdmi_stop_infoframe_trans(codec, pin_nid); 954 hdmi_fill_audio_infoframe(codec, pin_nid, 955 ai.bytes, sizeof(ai)); 956 hdmi_start_infoframe_trans(codec, pin_nid); 957 } else { 958 /* For non-pcm audio switch, setup new channel mapping 959 * accordingly */ 960 if (per_pin->non_pcm != non_pcm) 961 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca, 962 channels, per_pin->chmap, 963 per_pin->chmap_set); 964 } 965 966 per_pin->non_pcm = non_pcm; 967 } 968 969 970 /* 971 * Unsolicited events 972 */ 973 974 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll); 975 976 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res) 977 { 978 struct hdmi_spec *spec = codec->spec; 979 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 980 int pin_nid; 981 int pin_idx; 982 struct hda_jack_tbl *jack; 983 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT; 984 985 jack = snd_hda_jack_tbl_get_from_tag(codec, tag); 986 if (!jack) 987 return; 988 pin_nid = jack->nid; 989 jack->jack_dirty = 1; 990 991 _snd_printd(SND_PR_VERBOSE, 992 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n", 993 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA), 994 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV)); 995 996 pin_idx = pin_nid_to_pin_index(spec, pin_nid); 997 if (pin_idx < 0) 998 return; 999 1000 hdmi_present_sense(get_pin(spec, pin_idx), 1); 1001 snd_hda_jack_report_sync(codec); 1002 } 1003 1004 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res) 1005 { 1006 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 1007 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 1008 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE); 1009 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY); 1010 1011 printk(KERN_INFO 1012 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n", 1013 codec->addr, 1014 tag, 1015 subtag, 1016 cp_state, 1017 cp_ready); 1018 1019 /* TODO */ 1020 if (cp_state) 1021 ; 1022 if (cp_ready) 1023 ; 1024 } 1025 1026 1027 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res) 1028 { 1029 int tag = res >> AC_UNSOL_RES_TAG_SHIFT; 1030 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT; 1031 1032 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) { 1033 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag); 1034 return; 1035 } 1036 1037 if (subtag == 0) 1038 hdmi_intrinsic_event(codec, res); 1039 else 1040 hdmi_non_intrinsic_event(codec, res); 1041 } 1042 1043 static void haswell_verify_D0(struct hda_codec *codec, 1044 hda_nid_t cvt_nid, hda_nid_t nid) 1045 { 1046 int pwr; 1047 1048 /* For Haswell, the converter 1/2 may keep in D3 state after bootup, 1049 * thus pins could only choose converter 0 for use. Make sure the 1050 * converters are in correct power state */ 1051 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0)) 1052 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0); 1053 1054 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) { 1055 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE, 1056 AC_PWRST_D0); 1057 msleep(40); 1058 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0); 1059 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT; 1060 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr); 1061 } 1062 } 1063 1064 /* 1065 * Callbacks 1066 */ 1067 1068 /* HBR should be Non-PCM, 8 channels */ 1069 #define is_hbr_format(format) \ 1070 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7) 1071 1072 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid, 1073 hda_nid_t pin_nid, u32 stream_tag, int format) 1074 { 1075 int pinctl; 1076 int new_pinctl = 0; 1077 1078 if (is_haswell(codec)) 1079 haswell_verify_D0(codec, cvt_nid, pin_nid); 1080 1081 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) { 1082 pinctl = snd_hda_codec_read(codec, pin_nid, 0, 1083 AC_VERB_GET_PIN_WIDGET_CONTROL, 0); 1084 1085 new_pinctl = pinctl & ~AC_PINCTL_EPT; 1086 if (is_hbr_format(format)) 1087 new_pinctl |= AC_PINCTL_EPT_HBR; 1088 else 1089 new_pinctl |= AC_PINCTL_EPT_NATIVE; 1090 1091 snd_printdd("hdmi_setup_stream: " 1092 "NID=0x%x, %spinctl=0x%x\n", 1093 pin_nid, 1094 pinctl == new_pinctl ? "" : "new-", 1095 new_pinctl); 1096 1097 if (pinctl != new_pinctl) 1098 snd_hda_codec_write(codec, pin_nid, 0, 1099 AC_VERB_SET_PIN_WIDGET_CONTROL, 1100 new_pinctl); 1101 1102 } 1103 if (is_hbr_format(format) && !new_pinctl) { 1104 snd_printdd("hdmi_setup_stream: HBR is not supported\n"); 1105 return -EINVAL; 1106 } 1107 1108 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format); 1109 return 0; 1110 } 1111 1112 static int hdmi_choose_cvt(struct hda_codec *codec, 1113 int pin_idx, int *cvt_id, int *mux_id) 1114 { 1115 struct hdmi_spec *spec = codec->spec; 1116 struct hdmi_spec_per_pin *per_pin; 1117 struct hdmi_spec_per_cvt *per_cvt = NULL; 1118 int cvt_idx, mux_idx = 0; 1119 1120 per_pin = get_pin(spec, pin_idx); 1121 1122 /* Dynamically assign converter to stream */ 1123 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) { 1124 per_cvt = get_cvt(spec, cvt_idx); 1125 1126 /* Must not already be assigned */ 1127 if (per_cvt->assigned) 1128 continue; 1129 /* Must be in pin's mux's list of converters */ 1130 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++) 1131 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid) 1132 break; 1133 /* Not in mux list */ 1134 if (mux_idx == per_pin->num_mux_nids) 1135 continue; 1136 break; 1137 } 1138 1139 /* No free converters */ 1140 if (cvt_idx == spec->num_cvts) 1141 return -ENODEV; 1142 1143 if (cvt_id) 1144 *cvt_id = cvt_idx; 1145 if (mux_id) 1146 *mux_id = mux_idx; 1147 1148 return 0; 1149 } 1150 1151 static void haswell_config_cvts(struct hda_codec *codec, 1152 int pin_id, int mux_id) 1153 { 1154 struct hdmi_spec *spec = codec->spec; 1155 struct hdmi_spec_per_pin *per_pin; 1156 int pin_idx, mux_idx; 1157 int curr; 1158 int err; 1159 1160 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1161 per_pin = get_pin(spec, pin_idx); 1162 1163 if (pin_idx == pin_id) 1164 continue; 1165 1166 curr = snd_hda_codec_read(codec, per_pin->pin_nid, 0, 1167 AC_VERB_GET_CONNECT_SEL, 0); 1168 1169 /* Choose another unused converter */ 1170 if (curr == mux_id) { 1171 err = hdmi_choose_cvt(codec, pin_idx, NULL, &mux_idx); 1172 if (err < 0) 1173 return; 1174 snd_printdd("HDMI: choose converter %d for pin %d\n", mux_idx, pin_idx); 1175 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0, 1176 AC_VERB_SET_CONNECT_SEL, 1177 mux_idx); 1178 } 1179 } 1180 } 1181 1182 /* 1183 * HDA PCM callbacks 1184 */ 1185 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo, 1186 struct hda_codec *codec, 1187 struct snd_pcm_substream *substream) 1188 { 1189 struct hdmi_spec *spec = codec->spec; 1190 struct snd_pcm_runtime *runtime = substream->runtime; 1191 int pin_idx, cvt_idx, mux_idx = 0; 1192 struct hdmi_spec_per_pin *per_pin; 1193 struct hdmi_eld *eld; 1194 struct hdmi_spec_per_cvt *per_cvt = NULL; 1195 int err; 1196 1197 /* Validate hinfo */ 1198 pin_idx = hinfo_to_pin_index(spec, hinfo); 1199 if (snd_BUG_ON(pin_idx < 0)) 1200 return -EINVAL; 1201 per_pin = get_pin(spec, pin_idx); 1202 eld = &per_pin->sink_eld; 1203 1204 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx); 1205 if (err < 0) 1206 return err; 1207 1208 per_cvt = get_cvt(spec, cvt_idx); 1209 /* Claim converter */ 1210 per_cvt->assigned = 1; 1211 hinfo->nid = per_cvt->cvt_nid; 1212 1213 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0, 1214 AC_VERB_SET_CONNECT_SEL, 1215 mux_idx); 1216 1217 /* configure unused pins to choose other converters */ 1218 if (is_haswell(codec)) 1219 haswell_config_cvts(codec, pin_idx, mux_idx); 1220 1221 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid); 1222 1223 /* Initially set the converter's capabilities */ 1224 hinfo->channels_min = per_cvt->channels_min; 1225 hinfo->channels_max = per_cvt->channels_max; 1226 hinfo->rates = per_cvt->rates; 1227 hinfo->formats = per_cvt->formats; 1228 hinfo->maxbps = per_cvt->maxbps; 1229 1230 /* Restrict capabilities by ELD if this isn't disabled */ 1231 if (!static_hdmi_pcm && eld->eld_valid) { 1232 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo); 1233 if (hinfo->channels_min > hinfo->channels_max || 1234 !hinfo->rates || !hinfo->formats) { 1235 per_cvt->assigned = 0; 1236 hinfo->nid = 0; 1237 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1238 return -ENODEV; 1239 } 1240 } 1241 1242 /* Store the updated parameters */ 1243 runtime->hw.channels_min = hinfo->channels_min; 1244 runtime->hw.channels_max = hinfo->channels_max; 1245 runtime->hw.formats = hinfo->formats; 1246 runtime->hw.rates = hinfo->rates; 1247 1248 snd_pcm_hw_constraint_step(substream->runtime, 0, 1249 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 1250 return 0; 1251 } 1252 1253 /* 1254 * HDA/HDMI auto parsing 1255 */ 1256 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx) 1257 { 1258 struct hdmi_spec *spec = codec->spec; 1259 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1260 hda_nid_t pin_nid = per_pin->pin_nid; 1261 1262 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) { 1263 snd_printk(KERN_WARNING 1264 "HDMI: pin %d wcaps %#x " 1265 "does not support connection list\n", 1266 pin_nid, get_wcaps(codec, pin_nid)); 1267 return -EINVAL; 1268 } 1269 1270 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid, 1271 per_pin->mux_nids, 1272 HDA_MAX_CONNECTIONS); 1273 1274 return 0; 1275 } 1276 1277 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll) 1278 { 1279 struct hda_codec *codec = per_pin->codec; 1280 struct hdmi_spec *spec = codec->spec; 1281 struct hdmi_eld *eld = &spec->temp_eld; 1282 struct hdmi_eld *pin_eld = &per_pin->sink_eld; 1283 hda_nid_t pin_nid = per_pin->pin_nid; 1284 /* 1285 * Always execute a GetPinSense verb here, even when called from 1286 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited 1287 * response's PD bit is not the real PD value, but indicates that 1288 * the real PD value changed. An older version of the HD-audio 1289 * specification worked this way. Hence, we just ignore the data in 1290 * the unsolicited response to avoid custom WARs. 1291 */ 1292 int present = snd_hda_pin_sense(codec, pin_nid); 1293 bool update_eld = false; 1294 bool eld_changed = false; 1295 1296 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE); 1297 if (pin_eld->monitor_present) 1298 eld->eld_valid = !!(present & AC_PINSENSE_ELDV); 1299 else 1300 eld->eld_valid = false; 1301 1302 _snd_printd(SND_PR_VERBOSE, 1303 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n", 1304 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid); 1305 1306 if (eld->eld_valid) { 1307 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer, 1308 &eld->eld_size) < 0) 1309 eld->eld_valid = false; 1310 else { 1311 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld)); 1312 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer, 1313 eld->eld_size) < 0) 1314 eld->eld_valid = false; 1315 } 1316 1317 if (eld->eld_valid) { 1318 snd_hdmi_show_eld(&eld->info); 1319 update_eld = true; 1320 } 1321 else if (repoll) { 1322 queue_delayed_work(codec->bus->workq, 1323 &per_pin->work, 1324 msecs_to_jiffies(300)); 1325 return; 1326 } 1327 } 1328 1329 mutex_lock(&pin_eld->lock); 1330 if (pin_eld->eld_valid && !eld->eld_valid) { 1331 update_eld = true; 1332 eld_changed = true; 1333 } 1334 if (update_eld) { 1335 bool old_eld_valid = pin_eld->eld_valid; 1336 pin_eld->eld_valid = eld->eld_valid; 1337 eld_changed = pin_eld->eld_size != eld->eld_size || 1338 memcmp(pin_eld->eld_buffer, eld->eld_buffer, 1339 eld->eld_size) != 0; 1340 if (eld_changed) 1341 memcpy(pin_eld->eld_buffer, eld->eld_buffer, 1342 eld->eld_size); 1343 pin_eld->eld_size = eld->eld_size; 1344 pin_eld->info = eld->info; 1345 1346 /* Haswell-specific workaround: re-setup when the transcoder is 1347 * changed during the stream playback 1348 */ 1349 if (is_haswell(codec) && 1350 eld->eld_valid && !old_eld_valid && per_pin->setup) 1351 hdmi_setup_audio_infoframe(codec, per_pin, 1352 per_pin->non_pcm); 1353 } 1354 mutex_unlock(&pin_eld->lock); 1355 1356 if (eld_changed) 1357 snd_ctl_notify(codec->bus->card, 1358 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO, 1359 &per_pin->eld_ctl->id); 1360 } 1361 1362 static void hdmi_repoll_eld(struct work_struct *work) 1363 { 1364 struct hdmi_spec_per_pin *per_pin = 1365 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work); 1366 1367 if (per_pin->repoll_count++ > 6) 1368 per_pin->repoll_count = 0; 1369 1370 hdmi_present_sense(per_pin, per_pin->repoll_count); 1371 } 1372 1373 static void intel_haswell_fixup_connect_list(struct hda_codec *codec, 1374 hda_nid_t nid); 1375 1376 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid) 1377 { 1378 struct hdmi_spec *spec = codec->spec; 1379 unsigned int caps, config; 1380 int pin_idx; 1381 struct hdmi_spec_per_pin *per_pin; 1382 int err; 1383 1384 caps = snd_hda_query_pin_caps(codec, pin_nid); 1385 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP))) 1386 return 0; 1387 1388 config = snd_hda_codec_get_pincfg(codec, pin_nid); 1389 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE) 1390 return 0; 1391 1392 if (is_haswell(codec)) 1393 intel_haswell_fixup_connect_list(codec, pin_nid); 1394 1395 pin_idx = spec->num_pins; 1396 per_pin = snd_array_new(&spec->pins); 1397 if (!per_pin) 1398 return -ENOMEM; 1399 1400 per_pin->pin_nid = pin_nid; 1401 per_pin->non_pcm = false; 1402 1403 err = hdmi_read_pin_conn(codec, pin_idx); 1404 if (err < 0) 1405 return err; 1406 1407 spec->num_pins++; 1408 1409 return 0; 1410 } 1411 1412 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1413 { 1414 struct hdmi_spec *spec = codec->spec; 1415 struct hdmi_spec_per_cvt *per_cvt; 1416 unsigned int chans; 1417 int err; 1418 1419 chans = get_wcaps(codec, cvt_nid); 1420 chans = get_wcaps_channels(chans); 1421 1422 per_cvt = snd_array_new(&spec->cvts); 1423 if (!per_cvt) 1424 return -ENOMEM; 1425 1426 per_cvt->cvt_nid = cvt_nid; 1427 per_cvt->channels_min = 2; 1428 if (chans <= 16) { 1429 per_cvt->channels_max = chans; 1430 if (chans > spec->channels_max) 1431 spec->channels_max = chans; 1432 } 1433 1434 err = snd_hda_query_supported_pcm(codec, cvt_nid, 1435 &per_cvt->rates, 1436 &per_cvt->formats, 1437 &per_cvt->maxbps); 1438 if (err < 0) 1439 return err; 1440 1441 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids)) 1442 spec->cvt_nids[spec->num_cvts] = cvt_nid; 1443 spec->num_cvts++; 1444 1445 return 0; 1446 } 1447 1448 static int hdmi_parse_codec(struct hda_codec *codec) 1449 { 1450 hda_nid_t nid; 1451 int i, nodes; 1452 1453 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid); 1454 if (!nid || nodes < 0) { 1455 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n"); 1456 return -EINVAL; 1457 } 1458 1459 for (i = 0; i < nodes; i++, nid++) { 1460 unsigned int caps; 1461 unsigned int type; 1462 1463 caps = get_wcaps(codec, nid); 1464 type = get_wcaps_type(caps); 1465 1466 if (!(caps & AC_WCAP_DIGITAL)) 1467 continue; 1468 1469 switch (type) { 1470 case AC_WID_AUD_OUT: 1471 hdmi_add_cvt(codec, nid); 1472 break; 1473 case AC_WID_PIN: 1474 hdmi_add_pin(codec, nid); 1475 break; 1476 } 1477 } 1478 1479 #ifdef CONFIG_PM 1480 /* We're seeing some problems with unsolicited hot plug events on 1481 * PantherPoint after S3, if this is not enabled */ 1482 if (codec->vendor_id == 0x80862806) 1483 codec->bus->power_keep_link_on = 1; 1484 /* 1485 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event 1486 * can be lost and presence sense verb will become inaccurate if the 1487 * HDA link is powered off at hot plug or hw initialization time. 1488 */ 1489 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) & 1490 AC_PWRST_EPSS)) 1491 codec->bus->power_keep_link_on = 1; 1492 #endif 1493 1494 return 0; 1495 } 1496 1497 /* 1498 */ 1499 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid) 1500 { 1501 struct hda_spdif_out *spdif; 1502 bool non_pcm; 1503 1504 mutex_lock(&codec->spdif_mutex); 1505 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid); 1506 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO); 1507 mutex_unlock(&codec->spdif_mutex); 1508 return non_pcm; 1509 } 1510 1511 1512 /* 1513 * HDMI callbacks 1514 */ 1515 1516 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 1517 struct hda_codec *codec, 1518 unsigned int stream_tag, 1519 unsigned int format, 1520 struct snd_pcm_substream *substream) 1521 { 1522 hda_nid_t cvt_nid = hinfo->nid; 1523 struct hdmi_spec *spec = codec->spec; 1524 int pin_idx = hinfo_to_pin_index(spec, hinfo); 1525 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1526 hda_nid_t pin_nid = per_pin->pin_nid; 1527 bool non_pcm; 1528 1529 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid); 1530 per_pin->channels = substream->runtime->channels; 1531 per_pin->setup = true; 1532 1533 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels); 1534 1535 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm); 1536 1537 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format); 1538 } 1539 1540 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, 1541 struct hda_codec *codec, 1542 struct snd_pcm_substream *substream) 1543 { 1544 snd_hda_codec_cleanup_stream(codec, hinfo->nid); 1545 return 0; 1546 } 1547 1548 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo, 1549 struct hda_codec *codec, 1550 struct snd_pcm_substream *substream) 1551 { 1552 struct hdmi_spec *spec = codec->spec; 1553 int cvt_idx, pin_idx; 1554 struct hdmi_spec_per_cvt *per_cvt; 1555 struct hdmi_spec_per_pin *per_pin; 1556 1557 if (hinfo->nid) { 1558 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid); 1559 if (snd_BUG_ON(cvt_idx < 0)) 1560 return -EINVAL; 1561 per_cvt = get_cvt(spec, cvt_idx); 1562 1563 snd_BUG_ON(!per_cvt->assigned); 1564 per_cvt->assigned = 0; 1565 hinfo->nid = 0; 1566 1567 pin_idx = hinfo_to_pin_index(spec, hinfo); 1568 if (snd_BUG_ON(pin_idx < 0)) 1569 return -EINVAL; 1570 per_pin = get_pin(spec, pin_idx); 1571 1572 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1573 per_pin->chmap_set = false; 1574 memset(per_pin->chmap, 0, sizeof(per_pin->chmap)); 1575 1576 per_pin->setup = false; 1577 per_pin->channels = 0; 1578 } 1579 1580 return 0; 1581 } 1582 1583 static const struct hda_pcm_ops generic_ops = { 1584 .open = hdmi_pcm_open, 1585 .close = hdmi_pcm_close, 1586 .prepare = generic_hdmi_playback_pcm_prepare, 1587 .cleanup = generic_hdmi_playback_pcm_cleanup, 1588 }; 1589 1590 /* 1591 * ALSA API channel-map control callbacks 1592 */ 1593 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol, 1594 struct snd_ctl_elem_info *uinfo) 1595 { 1596 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1597 struct hda_codec *codec = info->private_data; 1598 struct hdmi_spec *spec = codec->spec; 1599 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1600 uinfo->count = spec->channels_max; 1601 uinfo->value.integer.min = 0; 1602 uinfo->value.integer.max = SNDRV_CHMAP_LAST; 1603 return 0; 1604 } 1605 1606 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag, 1607 unsigned int size, unsigned int __user *tlv) 1608 { 1609 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1610 struct hda_codec *codec = info->private_data; 1611 struct hdmi_spec *spec = codec->spec; 1612 const unsigned int valid_mask = 1613 FL | FR | RL | RR | LFE | FC | RLC | RRC; 1614 unsigned int __user *dst; 1615 int chs, count = 0; 1616 1617 if (size < 8) 1618 return -ENOMEM; 1619 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv)) 1620 return -EFAULT; 1621 size -= 8; 1622 dst = tlv + 2; 1623 for (chs = 2; chs <= spec->channels_max; chs++) { 1624 int i, c; 1625 struct cea_channel_speaker_allocation *cap; 1626 cap = channel_allocations; 1627 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) { 1628 int chs_bytes = chs * 4; 1629 if (cap->channels != chs) 1630 continue; 1631 if (cap->spk_mask & ~valid_mask) 1632 continue; 1633 if (size < 8) 1634 return -ENOMEM; 1635 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) || 1636 put_user(chs_bytes, dst + 1)) 1637 return -EFAULT; 1638 dst += 2; 1639 size -= 8; 1640 count += 8; 1641 if (size < chs_bytes) 1642 return -ENOMEM; 1643 size -= chs_bytes; 1644 count += chs_bytes; 1645 for (c = 7; c >= 0; c--) { 1646 int spk = cap->speakers[c]; 1647 if (!spk) 1648 continue; 1649 if (put_user(spk_to_chmap(spk), dst)) 1650 return -EFAULT; 1651 dst++; 1652 } 1653 } 1654 } 1655 if (put_user(count, tlv + 1)) 1656 return -EFAULT; 1657 return 0; 1658 } 1659 1660 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol, 1661 struct snd_ctl_elem_value *ucontrol) 1662 { 1663 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1664 struct hda_codec *codec = info->private_data; 1665 struct hdmi_spec *spec = codec->spec; 1666 int pin_idx = kcontrol->private_value; 1667 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1668 int i; 1669 1670 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++) 1671 ucontrol->value.integer.value[i] = per_pin->chmap[i]; 1672 return 0; 1673 } 1674 1675 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol, 1676 struct snd_ctl_elem_value *ucontrol) 1677 { 1678 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol); 1679 struct hda_codec *codec = info->private_data; 1680 struct hdmi_spec *spec = codec->spec; 1681 int pin_idx = kcontrol->private_value; 1682 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1683 unsigned int ctl_idx; 1684 struct snd_pcm_substream *substream; 1685 unsigned char chmap[8]; 1686 int i, ca, prepared = 0; 1687 1688 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 1689 substream = snd_pcm_chmap_substream(info, ctl_idx); 1690 if (!substream || !substream->runtime) 1691 return 0; /* just for avoiding error from alsactl restore */ 1692 switch (substream->runtime->status->state) { 1693 case SNDRV_PCM_STATE_OPEN: 1694 case SNDRV_PCM_STATE_SETUP: 1695 break; 1696 case SNDRV_PCM_STATE_PREPARED: 1697 prepared = 1; 1698 break; 1699 default: 1700 return -EBUSY; 1701 } 1702 memset(chmap, 0, sizeof(chmap)); 1703 for (i = 0; i < ARRAY_SIZE(chmap); i++) 1704 chmap[i] = ucontrol->value.integer.value[i]; 1705 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap))) 1706 return 0; 1707 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap); 1708 if (ca < 0) 1709 return -EINVAL; 1710 per_pin->chmap_set = true; 1711 memcpy(per_pin->chmap, chmap, sizeof(chmap)); 1712 if (prepared) 1713 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm); 1714 1715 return 0; 1716 } 1717 1718 static int generic_hdmi_build_pcms(struct hda_codec *codec) 1719 { 1720 struct hdmi_spec *spec = codec->spec; 1721 int pin_idx; 1722 1723 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1724 struct hda_pcm *info; 1725 struct hda_pcm_stream *pstr; 1726 struct hdmi_spec_per_pin *per_pin; 1727 1728 per_pin = get_pin(spec, pin_idx); 1729 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx); 1730 info = snd_array_new(&spec->pcm_rec); 1731 if (!info) 1732 return -ENOMEM; 1733 info->name = per_pin->pcm_name; 1734 info->pcm_type = HDA_PCM_TYPE_HDMI; 1735 info->own_chmap = true; 1736 1737 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 1738 pstr->substreams = 1; 1739 pstr->ops = generic_ops; 1740 /* other pstr fields are set in open */ 1741 } 1742 1743 codec->num_pcms = spec->num_pins; 1744 codec->pcm_info = spec->pcm_rec.list; 1745 1746 return 0; 1747 } 1748 1749 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx) 1750 { 1751 char hdmi_str[32] = "HDMI/DP"; 1752 struct hdmi_spec *spec = codec->spec; 1753 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1754 int pcmdev = get_pcm_rec(spec, pin_idx)->device; 1755 1756 if (pcmdev > 0) 1757 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev); 1758 if (!is_jack_detectable(codec, per_pin->pin_nid)) 1759 strncat(hdmi_str, " Phantom", 1760 sizeof(hdmi_str) - strlen(hdmi_str) - 1); 1761 1762 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0); 1763 } 1764 1765 static int generic_hdmi_build_controls(struct hda_codec *codec) 1766 { 1767 struct hdmi_spec *spec = codec->spec; 1768 int err; 1769 int pin_idx; 1770 1771 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1772 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1773 1774 err = generic_hdmi_build_jack(codec, pin_idx); 1775 if (err < 0) 1776 return err; 1777 1778 err = snd_hda_create_dig_out_ctls(codec, 1779 per_pin->pin_nid, 1780 per_pin->mux_nids[0], 1781 HDA_PCM_TYPE_HDMI); 1782 if (err < 0) 1783 return err; 1784 snd_hda_spdif_ctls_unassign(codec, pin_idx); 1785 1786 /* add control for ELD Bytes */ 1787 err = hdmi_create_eld_ctl(codec, pin_idx, 1788 get_pcm_rec(spec, pin_idx)->device); 1789 1790 if (err < 0) 1791 return err; 1792 1793 hdmi_present_sense(per_pin, 0); 1794 } 1795 1796 /* add channel maps */ 1797 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1798 struct snd_pcm_chmap *chmap; 1799 struct snd_kcontrol *kctl; 1800 int i; 1801 1802 if (!codec->pcm_info[pin_idx].pcm) 1803 break; 1804 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm, 1805 SNDRV_PCM_STREAM_PLAYBACK, 1806 NULL, 0, pin_idx, &chmap); 1807 if (err < 0) 1808 return err; 1809 /* override handlers */ 1810 chmap->private_data = codec; 1811 kctl = chmap->kctl; 1812 for (i = 0; i < kctl->count; i++) 1813 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE; 1814 kctl->info = hdmi_chmap_ctl_info; 1815 kctl->get = hdmi_chmap_ctl_get; 1816 kctl->put = hdmi_chmap_ctl_put; 1817 kctl->tlv.c = hdmi_chmap_ctl_tlv; 1818 } 1819 1820 return 0; 1821 } 1822 1823 static int generic_hdmi_init_per_pins(struct hda_codec *codec) 1824 { 1825 struct hdmi_spec *spec = codec->spec; 1826 int pin_idx; 1827 1828 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1829 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1830 struct hdmi_eld *eld = &per_pin->sink_eld; 1831 1832 per_pin->codec = codec; 1833 mutex_init(&eld->lock); 1834 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld); 1835 snd_hda_eld_proc_new(codec, eld, pin_idx); 1836 } 1837 return 0; 1838 } 1839 1840 static int generic_hdmi_init(struct hda_codec *codec) 1841 { 1842 struct hdmi_spec *spec = codec->spec; 1843 int pin_idx; 1844 1845 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1846 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1847 hda_nid_t pin_nid = per_pin->pin_nid; 1848 1849 hdmi_init_pin(codec, pin_nid); 1850 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid); 1851 } 1852 return 0; 1853 } 1854 1855 static void hdmi_array_init(struct hdmi_spec *spec, int nums) 1856 { 1857 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums); 1858 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums); 1859 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums); 1860 } 1861 1862 static void hdmi_array_free(struct hdmi_spec *spec) 1863 { 1864 snd_array_free(&spec->pins); 1865 snd_array_free(&spec->cvts); 1866 snd_array_free(&spec->pcm_rec); 1867 } 1868 1869 static void generic_hdmi_free(struct hda_codec *codec) 1870 { 1871 struct hdmi_spec *spec = codec->spec; 1872 int pin_idx; 1873 1874 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1875 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1876 struct hdmi_eld *eld = &per_pin->sink_eld; 1877 1878 cancel_delayed_work(&per_pin->work); 1879 snd_hda_eld_proc_free(codec, eld); 1880 } 1881 1882 flush_workqueue(codec->bus->workq); 1883 hdmi_array_free(spec); 1884 kfree(spec); 1885 } 1886 1887 #ifdef CONFIG_PM 1888 static int generic_hdmi_resume(struct hda_codec *codec) 1889 { 1890 struct hdmi_spec *spec = codec->spec; 1891 int pin_idx; 1892 1893 generic_hdmi_init(codec); 1894 snd_hda_codec_resume_amp(codec); 1895 snd_hda_codec_resume_cache(codec); 1896 1897 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) { 1898 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx); 1899 hdmi_present_sense(per_pin, 1); 1900 } 1901 return 0; 1902 } 1903 #endif 1904 1905 static const struct hda_codec_ops generic_hdmi_patch_ops = { 1906 .init = generic_hdmi_init, 1907 .free = generic_hdmi_free, 1908 .build_pcms = generic_hdmi_build_pcms, 1909 .build_controls = generic_hdmi_build_controls, 1910 .unsol_event = hdmi_unsol_event, 1911 #ifdef CONFIG_PM 1912 .resume = generic_hdmi_resume, 1913 #endif 1914 }; 1915 1916 1917 static void intel_haswell_fixup_connect_list(struct hda_codec *codec, 1918 hda_nid_t nid) 1919 { 1920 struct hdmi_spec *spec = codec->spec; 1921 hda_nid_t conns[4]; 1922 int nconns; 1923 1924 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns)); 1925 if (nconns == spec->num_cvts && 1926 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t))) 1927 return; 1928 1929 /* override pins connection list */ 1930 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid); 1931 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids); 1932 } 1933 1934 #define INTEL_VENDOR_NID 0x08 1935 #define INTEL_GET_VENDOR_VERB 0xf81 1936 #define INTEL_SET_VENDOR_VERB 0x781 1937 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */ 1938 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */ 1939 1940 static void intel_haswell_enable_all_pins(struct hda_codec *codec, 1941 bool update_tree) 1942 { 1943 unsigned int vendor_param; 1944 1945 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0, 1946 INTEL_GET_VENDOR_VERB, 0); 1947 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS) 1948 return; 1949 1950 vendor_param |= INTEL_EN_ALL_PIN_CVTS; 1951 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0, 1952 INTEL_SET_VENDOR_VERB, vendor_param); 1953 if (vendor_param == -1) 1954 return; 1955 1956 if (update_tree) 1957 snd_hda_codec_update_widgets(codec); 1958 } 1959 1960 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec) 1961 { 1962 unsigned int vendor_param; 1963 1964 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0, 1965 INTEL_GET_VENDOR_VERB, 0); 1966 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12) 1967 return; 1968 1969 /* enable DP1.2 mode */ 1970 vendor_param |= INTEL_EN_DP12; 1971 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0, 1972 INTEL_SET_VENDOR_VERB, vendor_param); 1973 } 1974 1975 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0. 1976 * Otherwise you may get severe h/w communication errors. 1977 */ 1978 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg, 1979 unsigned int power_state) 1980 { 1981 if (power_state == AC_PWRST_D0) { 1982 intel_haswell_enable_all_pins(codec, false); 1983 intel_haswell_fixup_enable_dp12(codec); 1984 } 1985 1986 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state); 1987 snd_hda_codec_set_power_to_all(codec, fg, power_state); 1988 } 1989 1990 static int patch_generic_hdmi(struct hda_codec *codec) 1991 { 1992 struct hdmi_spec *spec; 1993 1994 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 1995 if (spec == NULL) 1996 return -ENOMEM; 1997 1998 codec->spec = spec; 1999 hdmi_array_init(spec, 4); 2000 2001 if (is_haswell(codec)) { 2002 intel_haswell_enable_all_pins(codec, true); 2003 intel_haswell_fixup_enable_dp12(codec); 2004 } 2005 2006 if (hdmi_parse_codec(codec) < 0) { 2007 codec->spec = NULL; 2008 kfree(spec); 2009 return -EINVAL; 2010 } 2011 codec->patch_ops = generic_hdmi_patch_ops; 2012 if (is_haswell(codec)) { 2013 codec->patch_ops.set_power_state = haswell_set_power_state; 2014 codec->dp_mst = true; 2015 } 2016 2017 generic_hdmi_init_per_pins(codec); 2018 2019 init_channel_allocations(); 2020 2021 return 0; 2022 } 2023 2024 /* 2025 * Shared non-generic implementations 2026 */ 2027 2028 static int simple_playback_build_pcms(struct hda_codec *codec) 2029 { 2030 struct hdmi_spec *spec = codec->spec; 2031 struct hda_pcm *info; 2032 unsigned int chans; 2033 struct hda_pcm_stream *pstr; 2034 struct hdmi_spec_per_cvt *per_cvt; 2035 2036 per_cvt = get_cvt(spec, 0); 2037 chans = get_wcaps(codec, per_cvt->cvt_nid); 2038 chans = get_wcaps_channels(chans); 2039 2040 info = snd_array_new(&spec->pcm_rec); 2041 if (!info) 2042 return -ENOMEM; 2043 info->name = get_pin(spec, 0)->pcm_name; 2044 sprintf(info->name, "HDMI 0"); 2045 info->pcm_type = HDA_PCM_TYPE_HDMI; 2046 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK]; 2047 *pstr = spec->pcm_playback; 2048 pstr->nid = per_cvt->cvt_nid; 2049 if (pstr->channels_max <= 2 && chans && chans <= 16) 2050 pstr->channels_max = chans; 2051 2052 codec->num_pcms = 1; 2053 codec->pcm_info = info; 2054 2055 return 0; 2056 } 2057 2058 /* unsolicited event for jack sensing */ 2059 static void simple_hdmi_unsol_event(struct hda_codec *codec, 2060 unsigned int res) 2061 { 2062 snd_hda_jack_set_dirty_all(codec); 2063 snd_hda_jack_report_sync(codec); 2064 } 2065 2066 /* generic_hdmi_build_jack can be used for simple_hdmi, too, 2067 * as long as spec->pins[] is set correctly 2068 */ 2069 #define simple_hdmi_build_jack generic_hdmi_build_jack 2070 2071 static int simple_playback_build_controls(struct hda_codec *codec) 2072 { 2073 struct hdmi_spec *spec = codec->spec; 2074 struct hdmi_spec_per_cvt *per_cvt; 2075 int err; 2076 2077 per_cvt = get_cvt(spec, 0); 2078 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid, 2079 per_cvt->cvt_nid); 2080 if (err < 0) 2081 return err; 2082 return simple_hdmi_build_jack(codec, 0); 2083 } 2084 2085 static int simple_playback_init(struct hda_codec *codec) 2086 { 2087 struct hdmi_spec *spec = codec->spec; 2088 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0); 2089 hda_nid_t pin = per_pin->pin_nid; 2090 2091 snd_hda_codec_write(codec, pin, 0, 2092 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT); 2093 /* some codecs require to unmute the pin */ 2094 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) 2095 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE, 2096 AMP_OUT_UNMUTE); 2097 snd_hda_jack_detect_enable(codec, pin, pin); 2098 return 0; 2099 } 2100 2101 static void simple_playback_free(struct hda_codec *codec) 2102 { 2103 struct hdmi_spec *spec = codec->spec; 2104 2105 hdmi_array_free(spec); 2106 kfree(spec); 2107 } 2108 2109 /* 2110 * Nvidia specific implementations 2111 */ 2112 2113 #define Nv_VERB_SET_Channel_Allocation 0xF79 2114 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A 2115 #define Nv_VERB_SET_Audio_Protection_On 0xF98 2116 #define Nv_VERB_SET_Audio_Protection_Off 0xF99 2117 2118 #define nvhdmi_master_con_nid_7x 0x04 2119 #define nvhdmi_master_pin_nid_7x 0x05 2120 2121 static const hda_nid_t nvhdmi_con_nids_7x[4] = { 2122 /*front, rear, clfe, rear_surr */ 2123 0x6, 0x8, 0xa, 0xc, 2124 }; 2125 2126 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = { 2127 /* set audio protect on */ 2128 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 2129 /* enable digital output on pin widget */ 2130 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 2131 {} /* terminator */ 2132 }; 2133 2134 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = { 2135 /* set audio protect on */ 2136 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1}, 2137 /* enable digital output on pin widget */ 2138 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 2139 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 2140 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 2141 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 2142 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 }, 2143 {} /* terminator */ 2144 }; 2145 2146 #ifdef LIMITED_RATE_FMT_SUPPORT 2147 /* support only the safe format and rate */ 2148 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000 2149 #define SUPPORTED_MAXBPS 16 2150 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE 2151 #else 2152 /* support all rates and formats */ 2153 #define SUPPORTED_RATES \ 2154 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\ 2155 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\ 2156 SNDRV_PCM_RATE_192000) 2157 #define SUPPORTED_MAXBPS 24 2158 #define SUPPORTED_FORMATS \ 2159 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE) 2160 #endif 2161 2162 static int nvhdmi_7x_init_2ch(struct hda_codec *codec) 2163 { 2164 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch); 2165 return 0; 2166 } 2167 2168 static int nvhdmi_7x_init_8ch(struct hda_codec *codec) 2169 { 2170 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch); 2171 return 0; 2172 } 2173 2174 static unsigned int channels_2_6_8[] = { 2175 2, 6, 8 2176 }; 2177 2178 static unsigned int channels_2_8[] = { 2179 2, 8 2180 }; 2181 2182 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = { 2183 .count = ARRAY_SIZE(channels_2_6_8), 2184 .list = channels_2_6_8, 2185 .mask = 0, 2186 }; 2187 2188 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = { 2189 .count = ARRAY_SIZE(channels_2_8), 2190 .list = channels_2_8, 2191 .mask = 0, 2192 }; 2193 2194 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo, 2195 struct hda_codec *codec, 2196 struct snd_pcm_substream *substream) 2197 { 2198 struct hdmi_spec *spec = codec->spec; 2199 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL; 2200 2201 switch (codec->preset->id) { 2202 case 0x10de0002: 2203 case 0x10de0003: 2204 case 0x10de0005: 2205 case 0x10de0006: 2206 hw_constraints_channels = &hw_constraints_2_8_channels; 2207 break; 2208 case 0x10de0007: 2209 hw_constraints_channels = &hw_constraints_2_6_8_channels; 2210 break; 2211 default: 2212 break; 2213 } 2214 2215 if (hw_constraints_channels != NULL) { 2216 snd_pcm_hw_constraint_list(substream->runtime, 0, 2217 SNDRV_PCM_HW_PARAM_CHANNELS, 2218 hw_constraints_channels); 2219 } else { 2220 snd_pcm_hw_constraint_step(substream->runtime, 0, 2221 SNDRV_PCM_HW_PARAM_CHANNELS, 2); 2222 } 2223 2224 return snd_hda_multi_out_dig_open(codec, &spec->multiout); 2225 } 2226 2227 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo, 2228 struct hda_codec *codec, 2229 struct snd_pcm_substream *substream) 2230 { 2231 struct hdmi_spec *spec = codec->spec; 2232 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 2233 } 2234 2235 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 2236 struct hda_codec *codec, 2237 unsigned int stream_tag, 2238 unsigned int format, 2239 struct snd_pcm_substream *substream) 2240 { 2241 struct hdmi_spec *spec = codec->spec; 2242 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout, 2243 stream_tag, format, substream); 2244 } 2245 2246 static const struct hda_pcm_stream simple_pcm_playback = { 2247 .substreams = 1, 2248 .channels_min = 2, 2249 .channels_max = 2, 2250 .ops = { 2251 .open = simple_playback_pcm_open, 2252 .close = simple_playback_pcm_close, 2253 .prepare = simple_playback_pcm_prepare 2254 }, 2255 }; 2256 2257 static const struct hda_codec_ops simple_hdmi_patch_ops = { 2258 .build_controls = simple_playback_build_controls, 2259 .build_pcms = simple_playback_build_pcms, 2260 .init = simple_playback_init, 2261 .free = simple_playback_free, 2262 .unsol_event = simple_hdmi_unsol_event, 2263 }; 2264 2265 static int patch_simple_hdmi(struct hda_codec *codec, 2266 hda_nid_t cvt_nid, hda_nid_t pin_nid) 2267 { 2268 struct hdmi_spec *spec; 2269 struct hdmi_spec_per_cvt *per_cvt; 2270 struct hdmi_spec_per_pin *per_pin; 2271 2272 spec = kzalloc(sizeof(*spec), GFP_KERNEL); 2273 if (!spec) 2274 return -ENOMEM; 2275 2276 codec->spec = spec; 2277 hdmi_array_init(spec, 1); 2278 2279 spec->multiout.num_dacs = 0; /* no analog */ 2280 spec->multiout.max_channels = 2; 2281 spec->multiout.dig_out_nid = cvt_nid; 2282 spec->num_cvts = 1; 2283 spec->num_pins = 1; 2284 per_pin = snd_array_new(&spec->pins); 2285 per_cvt = snd_array_new(&spec->cvts); 2286 if (!per_pin || !per_cvt) { 2287 simple_playback_free(codec); 2288 return -ENOMEM; 2289 } 2290 per_cvt->cvt_nid = cvt_nid; 2291 per_pin->pin_nid = pin_nid; 2292 spec->pcm_playback = simple_pcm_playback; 2293 2294 codec->patch_ops = simple_hdmi_patch_ops; 2295 2296 return 0; 2297 } 2298 2299 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec, 2300 int channels) 2301 { 2302 unsigned int chanmask; 2303 int chan = channels ? (channels - 1) : 1; 2304 2305 switch (channels) { 2306 default: 2307 case 0: 2308 case 2: 2309 chanmask = 0x00; 2310 break; 2311 case 4: 2312 chanmask = 0x08; 2313 break; 2314 case 6: 2315 chanmask = 0x0b; 2316 break; 2317 case 8: 2318 chanmask = 0x13; 2319 break; 2320 } 2321 2322 /* Set the audio infoframe channel allocation and checksum fields. The 2323 * channel count is computed implicitly by the hardware. */ 2324 snd_hda_codec_write(codec, 0x1, 0, 2325 Nv_VERB_SET_Channel_Allocation, chanmask); 2326 2327 snd_hda_codec_write(codec, 0x1, 0, 2328 Nv_VERB_SET_Info_Frame_Checksum, 2329 (0x71 - chan - chanmask)); 2330 } 2331 2332 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo, 2333 struct hda_codec *codec, 2334 struct snd_pcm_substream *substream) 2335 { 2336 struct hdmi_spec *spec = codec->spec; 2337 int i; 2338 2339 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 2340 0, AC_VERB_SET_CHANNEL_STREAMID, 0); 2341 for (i = 0; i < 4; i++) { 2342 /* set the stream id */ 2343 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 2344 AC_VERB_SET_CHANNEL_STREAMID, 0); 2345 /* set the stream format */ 2346 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0, 2347 AC_VERB_SET_STREAM_FORMAT, 0); 2348 } 2349 2350 /* The audio hardware sends a channel count of 0x7 (8ch) when all the 2351 * streams are disabled. */ 2352 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 2353 2354 return snd_hda_multi_out_dig_close(codec, &spec->multiout); 2355 } 2356 2357 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo, 2358 struct hda_codec *codec, 2359 unsigned int stream_tag, 2360 unsigned int format, 2361 struct snd_pcm_substream *substream) 2362 { 2363 int chs; 2364 unsigned int dataDCC2, channel_id; 2365 int i; 2366 struct hdmi_spec *spec = codec->spec; 2367 struct hda_spdif_out *spdif; 2368 struct hdmi_spec_per_cvt *per_cvt; 2369 2370 mutex_lock(&codec->spdif_mutex); 2371 per_cvt = get_cvt(spec, 0); 2372 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid); 2373 2374 chs = substream->runtime->channels; 2375 2376 dataDCC2 = 0x2; 2377 2378 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */ 2379 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) 2380 snd_hda_codec_write(codec, 2381 nvhdmi_master_con_nid_7x, 2382 0, 2383 AC_VERB_SET_DIGI_CONVERT_1, 2384 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 2385 2386 /* set the stream id */ 2387 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 2388 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0); 2389 2390 /* set the stream format */ 2391 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0, 2392 AC_VERB_SET_STREAM_FORMAT, format); 2393 2394 /* turn on again (if needed) */ 2395 /* enable and set the channel status audio/data flag */ 2396 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) { 2397 snd_hda_codec_write(codec, 2398 nvhdmi_master_con_nid_7x, 2399 0, 2400 AC_VERB_SET_DIGI_CONVERT_1, 2401 spdif->ctls & 0xff); 2402 snd_hda_codec_write(codec, 2403 nvhdmi_master_con_nid_7x, 2404 0, 2405 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 2406 } 2407 2408 for (i = 0; i < 4; i++) { 2409 if (chs == 2) 2410 channel_id = 0; 2411 else 2412 channel_id = i * 2; 2413 2414 /* turn off SPDIF once; 2415 *otherwise the IEC958 bits won't be updated 2416 */ 2417 if (codec->spdif_status_reset && 2418 (spdif->ctls & AC_DIG1_ENABLE)) 2419 snd_hda_codec_write(codec, 2420 nvhdmi_con_nids_7x[i], 2421 0, 2422 AC_VERB_SET_DIGI_CONVERT_1, 2423 spdif->ctls & ~AC_DIG1_ENABLE & 0xff); 2424 /* set the stream id */ 2425 snd_hda_codec_write(codec, 2426 nvhdmi_con_nids_7x[i], 2427 0, 2428 AC_VERB_SET_CHANNEL_STREAMID, 2429 (stream_tag << 4) | channel_id); 2430 /* set the stream format */ 2431 snd_hda_codec_write(codec, 2432 nvhdmi_con_nids_7x[i], 2433 0, 2434 AC_VERB_SET_STREAM_FORMAT, 2435 format); 2436 /* turn on again (if needed) */ 2437 /* enable and set the channel status audio/data flag */ 2438 if (codec->spdif_status_reset && 2439 (spdif->ctls & AC_DIG1_ENABLE)) { 2440 snd_hda_codec_write(codec, 2441 nvhdmi_con_nids_7x[i], 2442 0, 2443 AC_VERB_SET_DIGI_CONVERT_1, 2444 spdif->ctls & 0xff); 2445 snd_hda_codec_write(codec, 2446 nvhdmi_con_nids_7x[i], 2447 0, 2448 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2); 2449 } 2450 } 2451 2452 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs); 2453 2454 mutex_unlock(&codec->spdif_mutex); 2455 return 0; 2456 } 2457 2458 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = { 2459 .substreams = 1, 2460 .channels_min = 2, 2461 .channels_max = 8, 2462 .nid = nvhdmi_master_con_nid_7x, 2463 .rates = SUPPORTED_RATES, 2464 .maxbps = SUPPORTED_MAXBPS, 2465 .formats = SUPPORTED_FORMATS, 2466 .ops = { 2467 .open = simple_playback_pcm_open, 2468 .close = nvhdmi_8ch_7x_pcm_close, 2469 .prepare = nvhdmi_8ch_7x_pcm_prepare 2470 }, 2471 }; 2472 2473 static int patch_nvhdmi_2ch(struct hda_codec *codec) 2474 { 2475 struct hdmi_spec *spec; 2476 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x, 2477 nvhdmi_master_pin_nid_7x); 2478 if (err < 0) 2479 return err; 2480 2481 codec->patch_ops.init = nvhdmi_7x_init_2ch; 2482 /* override the PCM rates, etc, as the codec doesn't give full list */ 2483 spec = codec->spec; 2484 spec->pcm_playback.rates = SUPPORTED_RATES; 2485 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS; 2486 spec->pcm_playback.formats = SUPPORTED_FORMATS; 2487 return 0; 2488 } 2489 2490 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec) 2491 { 2492 struct hdmi_spec *spec = codec->spec; 2493 int err = simple_playback_build_pcms(codec); 2494 if (!err) { 2495 struct hda_pcm *info = get_pcm_rec(spec, 0); 2496 info->own_chmap = true; 2497 } 2498 return err; 2499 } 2500 2501 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec) 2502 { 2503 struct hdmi_spec *spec = codec->spec; 2504 struct hda_pcm *info; 2505 struct snd_pcm_chmap *chmap; 2506 int err; 2507 2508 err = simple_playback_build_controls(codec); 2509 if (err < 0) 2510 return err; 2511 2512 /* add channel maps */ 2513 info = get_pcm_rec(spec, 0); 2514 err = snd_pcm_add_chmap_ctls(info->pcm, 2515 SNDRV_PCM_STREAM_PLAYBACK, 2516 snd_pcm_alt_chmaps, 8, 0, &chmap); 2517 if (err < 0) 2518 return err; 2519 switch (codec->preset->id) { 2520 case 0x10de0002: 2521 case 0x10de0003: 2522 case 0x10de0005: 2523 case 0x10de0006: 2524 chmap->channel_mask = (1U << 2) | (1U << 8); 2525 break; 2526 case 0x10de0007: 2527 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8); 2528 } 2529 return 0; 2530 } 2531 2532 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec) 2533 { 2534 struct hdmi_spec *spec; 2535 int err = patch_nvhdmi_2ch(codec); 2536 if (err < 0) 2537 return err; 2538 spec = codec->spec; 2539 spec->multiout.max_channels = 8; 2540 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x; 2541 codec->patch_ops.init = nvhdmi_7x_init_8ch; 2542 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms; 2543 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls; 2544 2545 /* Initialize the audio infoframe channel mask and checksum to something 2546 * valid */ 2547 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8); 2548 2549 return 0; 2550 } 2551 2552 /* 2553 * ATI-specific implementations 2554 * 2555 * FIXME: we may omit the whole this and use the generic code once after 2556 * it's confirmed to work. 2557 */ 2558 2559 #define ATIHDMI_CVT_NID 0x02 /* audio converter */ 2560 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */ 2561 2562 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo, 2563 struct hda_codec *codec, 2564 unsigned int stream_tag, 2565 unsigned int format, 2566 struct snd_pcm_substream *substream) 2567 { 2568 struct hdmi_spec *spec = codec->spec; 2569 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0); 2570 int chans = substream->runtime->channels; 2571 int i, err; 2572 2573 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format, 2574 substream); 2575 if (err < 0) 2576 return err; 2577 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0, 2578 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1); 2579 /* FIXME: XXX */ 2580 for (i = 0; i < chans; i++) { 2581 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0, 2582 AC_VERB_SET_HDMI_CHAN_SLOT, 2583 (i << 4) | i); 2584 } 2585 return 0; 2586 } 2587 2588 static int patch_atihdmi(struct hda_codec *codec) 2589 { 2590 struct hdmi_spec *spec; 2591 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID); 2592 if (err < 0) 2593 return err; 2594 spec = codec->spec; 2595 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare; 2596 return 0; 2597 } 2598 2599 /* VIA HDMI Implementation */ 2600 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */ 2601 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */ 2602 2603 static int patch_via_hdmi(struct hda_codec *codec) 2604 { 2605 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID); 2606 } 2607 2608 /* 2609 * patch entries 2610 */ 2611 static const struct hda_codec_preset snd_hda_preset_hdmi[] = { 2612 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi }, 2613 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi }, 2614 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi }, 2615 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi }, 2616 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi }, 2617 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi }, 2618 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi }, 2619 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2620 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2621 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2622 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x }, 2623 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x }, 2624 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi }, 2625 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi }, 2626 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi }, 2627 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi }, 2628 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi }, 2629 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi }, 2630 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi }, 2631 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi }, 2632 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi }, 2633 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi }, 2634 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi }, 2635 /* 17 is known to be absent */ 2636 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi }, 2637 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi }, 2638 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi }, 2639 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi }, 2640 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi }, 2641 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi }, 2642 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi }, 2643 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi }, 2644 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi }, 2645 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi }, 2646 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi }, 2647 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi }, 2648 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch }, 2649 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch }, 2650 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 2651 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi }, 2652 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 2653 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi }, 2654 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 2655 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi }, 2656 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi }, 2657 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi }, 2658 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi }, 2659 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi }, 2660 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi }, 2661 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi }, 2662 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi }, 2663 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi }, 2664 {} /* terminator */ 2665 }; 2666 2667 MODULE_ALIAS("snd-hda-codec-id:1002793c"); 2668 MODULE_ALIAS("snd-hda-codec-id:10027919"); 2669 MODULE_ALIAS("snd-hda-codec-id:1002791a"); 2670 MODULE_ALIAS("snd-hda-codec-id:1002aa01"); 2671 MODULE_ALIAS("snd-hda-codec-id:10951390"); 2672 MODULE_ALIAS("snd-hda-codec-id:10951392"); 2673 MODULE_ALIAS("snd-hda-codec-id:10de0002"); 2674 MODULE_ALIAS("snd-hda-codec-id:10de0003"); 2675 MODULE_ALIAS("snd-hda-codec-id:10de0005"); 2676 MODULE_ALIAS("snd-hda-codec-id:10de0006"); 2677 MODULE_ALIAS("snd-hda-codec-id:10de0007"); 2678 MODULE_ALIAS("snd-hda-codec-id:10de000a"); 2679 MODULE_ALIAS("snd-hda-codec-id:10de000b"); 2680 MODULE_ALIAS("snd-hda-codec-id:10de000c"); 2681 MODULE_ALIAS("snd-hda-codec-id:10de000d"); 2682 MODULE_ALIAS("snd-hda-codec-id:10de0010"); 2683 MODULE_ALIAS("snd-hda-codec-id:10de0011"); 2684 MODULE_ALIAS("snd-hda-codec-id:10de0012"); 2685 MODULE_ALIAS("snd-hda-codec-id:10de0013"); 2686 MODULE_ALIAS("snd-hda-codec-id:10de0014"); 2687 MODULE_ALIAS("snd-hda-codec-id:10de0015"); 2688 MODULE_ALIAS("snd-hda-codec-id:10de0016"); 2689 MODULE_ALIAS("snd-hda-codec-id:10de0018"); 2690 MODULE_ALIAS("snd-hda-codec-id:10de0019"); 2691 MODULE_ALIAS("snd-hda-codec-id:10de001a"); 2692 MODULE_ALIAS("snd-hda-codec-id:10de001b"); 2693 MODULE_ALIAS("snd-hda-codec-id:10de001c"); 2694 MODULE_ALIAS("snd-hda-codec-id:10de0040"); 2695 MODULE_ALIAS("snd-hda-codec-id:10de0041"); 2696 MODULE_ALIAS("snd-hda-codec-id:10de0042"); 2697 MODULE_ALIAS("snd-hda-codec-id:10de0043"); 2698 MODULE_ALIAS("snd-hda-codec-id:10de0044"); 2699 MODULE_ALIAS("snd-hda-codec-id:10de0051"); 2700 MODULE_ALIAS("snd-hda-codec-id:10de0060"); 2701 MODULE_ALIAS("snd-hda-codec-id:10de0067"); 2702 MODULE_ALIAS("snd-hda-codec-id:10de8001"); 2703 MODULE_ALIAS("snd-hda-codec-id:11069f80"); 2704 MODULE_ALIAS("snd-hda-codec-id:11069f81"); 2705 MODULE_ALIAS("snd-hda-codec-id:11069f84"); 2706 MODULE_ALIAS("snd-hda-codec-id:11069f85"); 2707 MODULE_ALIAS("snd-hda-codec-id:17e80047"); 2708 MODULE_ALIAS("snd-hda-codec-id:80860054"); 2709 MODULE_ALIAS("snd-hda-codec-id:80862801"); 2710 MODULE_ALIAS("snd-hda-codec-id:80862802"); 2711 MODULE_ALIAS("snd-hda-codec-id:80862803"); 2712 MODULE_ALIAS("snd-hda-codec-id:80862804"); 2713 MODULE_ALIAS("snd-hda-codec-id:80862805"); 2714 MODULE_ALIAS("snd-hda-codec-id:80862806"); 2715 MODULE_ALIAS("snd-hda-codec-id:80862807"); 2716 MODULE_ALIAS("snd-hda-codec-id:80862880"); 2717 MODULE_ALIAS("snd-hda-codec-id:808629fb"); 2718 2719 MODULE_LICENSE("GPL"); 2720 MODULE_DESCRIPTION("HDMI HD-audio codec"); 2721 MODULE_ALIAS("snd-hda-codec-intelhdmi"); 2722 MODULE_ALIAS("snd-hda-codec-nvhdmi"); 2723 MODULE_ALIAS("snd-hda-codec-atihdmi"); 2724 2725 static struct hda_codec_preset_list intel_list = { 2726 .preset = snd_hda_preset_hdmi, 2727 .owner = THIS_MODULE, 2728 }; 2729 2730 static int __init patch_hdmi_init(void) 2731 { 2732 return snd_hda_add_codec_preset(&intel_list); 2733 } 2734 2735 static void __exit patch_hdmi_exit(void) 2736 { 2737 snd_hda_delete_codec_preset(&intel_list); 2738 } 2739 2740 module_init(patch_hdmi_init) 2741 module_exit(patch_hdmi_exit) 2742