1*8c70461bSLucas Tanure /* SPDX-License-Identifier: GPL-2.0-or-later */ 2*8c70461bSLucas Tanure /* 3*8c70461bSLucas Tanure * HD audio interface patch for Cirrus Logic CS8409 HDA bridge chip 4*8c70461bSLucas Tanure * 5*8c70461bSLucas Tanure * Copyright (C) 2021 Cirrus Logic, Inc. and 6*8c70461bSLucas Tanure * Cirrus Logic International Semiconductor Ltd. 7*8c70461bSLucas Tanure */ 8*8c70461bSLucas Tanure 9*8c70461bSLucas Tanure #ifndef __CS8409_PATCH_H 10*8c70461bSLucas Tanure #define __CS8409_PATCH_H 11*8c70461bSLucas Tanure 12*8c70461bSLucas Tanure /* Cirrus Logic CS8409 HDA bridge with 13*8c70461bSLucas Tanure * companion codec CS42L42 14*8c70461bSLucas Tanure */ 15*8c70461bSLucas Tanure #define CS42L42_HP_CH (2U) 16*8c70461bSLucas Tanure #define CS42L42_HS_MIC_CH (1U) 17*8c70461bSLucas Tanure 18*8c70461bSLucas Tanure #define CS8409_VENDOR_NID 0x47 19*8c70461bSLucas Tanure 20*8c70461bSLucas Tanure #define CS8409_CS42L42_HP_PIN_NID 0x24 21*8c70461bSLucas Tanure #define CS8409_CS42L42_SPK_PIN_NID 0x2c 22*8c70461bSLucas Tanure #define CS8409_CS42L42_AMIC_PIN_NID 0x34 23*8c70461bSLucas Tanure #define CS8409_CS42L42_DMIC_PIN_NID 0x44 24*8c70461bSLucas Tanure #define CS8409_CS42L42_DMIC_ADC_PIN_NID 0x22 25*8c70461bSLucas Tanure 26*8c70461bSLucas Tanure #define CS42L42_HSDET_AUTO_DONE 0x02 27*8c70461bSLucas Tanure #define CS42L42_HSTYPE_MASK 0x03 28*8c70461bSLucas Tanure 29*8c70461bSLucas Tanure #define CS42L42_JACK_INSERTED 0x0C 30*8c70461bSLucas Tanure #define CS42L42_JACK_REMOVED 0x00 31*8c70461bSLucas Tanure 32*8c70461bSLucas Tanure #define GPIO3_INT (1 << 3) 33*8c70461bSLucas Tanure #define GPIO4_INT (1 << 4) 34*8c70461bSLucas Tanure #define GPIO5_INT (1 << 5) 35*8c70461bSLucas Tanure 36*8c70461bSLucas Tanure #define CS42L42_I2C_ADDR (0x48 << 1) 37*8c70461bSLucas Tanure 38*8c70461bSLucas Tanure #define CIR_I2C_ADDR 0x0059 39*8c70461bSLucas Tanure #define CIR_I2C_DATA 0x005A 40*8c70461bSLucas Tanure #define CIR_I2C_CTRL 0x005B 41*8c70461bSLucas Tanure #define CIR_I2C_STATUS 0x005C 42*8c70461bSLucas Tanure #define CIR_I2C_QWRITE 0x005D 43*8c70461bSLucas Tanure #define CIR_I2C_QREAD 0x005E 44*8c70461bSLucas Tanure 45*8c70461bSLucas Tanure #define CS8409_CS42L42_HP_VOL_REAL_MIN (-63) 46*8c70461bSLucas Tanure #define CS8409_CS42L42_HP_VOL_REAL_MAX (0) 47*8c70461bSLucas Tanure #define CS8409_CS42L42_AMIC_VOL_REAL_MIN (-97) 48*8c70461bSLucas Tanure #define CS8409_CS42L42_AMIC_VOL_REAL_MAX (12) 49*8c70461bSLucas Tanure #define CS8409_CS42L42_REG_HS_VOLUME_CHA (0x2301) 50*8c70461bSLucas Tanure #define CS8409_CS42L42_REG_HS_VOLUME_CHB (0x2303) 51*8c70461bSLucas Tanure #define CS8409_CS42L42_REG_AMIC_VOLUME (0x1D03) 52*8c70461bSLucas Tanure 53*8c70461bSLucas Tanure enum { 54*8c70461bSLucas Tanure CS8409_BULLSEYE, 55*8c70461bSLucas Tanure CS8409_WARLOCK, 56*8c70461bSLucas Tanure CS8409_CYBORG, 57*8c70461bSLucas Tanure CS8409_FIXUPS, 58*8c70461bSLucas Tanure }; 59*8c70461bSLucas Tanure 60*8c70461bSLucas Tanure struct cs8409_i2c_param { 61*8c70461bSLucas Tanure unsigned int addr; 62*8c70461bSLucas Tanure unsigned int reg; 63*8c70461bSLucas Tanure }; 64*8c70461bSLucas Tanure 65*8c70461bSLucas Tanure struct cs8409_cir_param { 66*8c70461bSLucas Tanure unsigned int nid; 67*8c70461bSLucas Tanure unsigned int cir; 68*8c70461bSLucas Tanure unsigned int coeff; 69*8c70461bSLucas Tanure }; 70*8c70461bSLucas Tanure 71*8c70461bSLucas Tanure struct cs8409_spec { 72*8c70461bSLucas Tanure struct hda_gen_spec gen; 73*8c70461bSLucas Tanure 74*8c70461bSLucas Tanure unsigned int gpio_mask; 75*8c70461bSLucas Tanure unsigned int gpio_dir; 76*8c70461bSLucas Tanure unsigned int gpio_data; 77*8c70461bSLucas Tanure 78*8c70461bSLucas Tanure unsigned int cs42l42_hp_jack_in:1; 79*8c70461bSLucas Tanure unsigned int cs42l42_mic_jack_in:1; 80*8c70461bSLucas Tanure unsigned int cs42l42_volume_init:1; 81*8c70461bSLucas Tanure char cs42l42_hp_volume[CS42L42_HP_CH]; 82*8c70461bSLucas Tanure char cs42l42_hs_mic_volume[CS42L42_HS_MIC_CH]; 83*8c70461bSLucas Tanure 84*8c70461bSLucas Tanure struct mutex cs8409_i2c_mux; 85*8c70461bSLucas Tanure 86*8c70461bSLucas Tanure /* verb exec op override */ 87*8c70461bSLucas Tanure int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, unsigned int flags, 88*8c70461bSLucas Tanure unsigned int *res); 89*8c70461bSLucas Tanure }; 90*8c70461bSLucas Tanure 91*8c70461bSLucas Tanure #endif 92