19e7647b5SLucas Tanure // SPDX-License-Identifier: GPL-2.0-only 29e7647b5SLucas Tanure /* 39e7647b5SLucas Tanure * patch_cs8409-tables.c -- HD audio interface patch for Cirrus Logic CS8409 HDA bridge chip 49e7647b5SLucas Tanure * 59e7647b5SLucas Tanure * Copyright (C) 2021 Cirrus Logic, Inc. and 69e7647b5SLucas Tanure * Cirrus Logic International Semiconductor Ltd. 79e7647b5SLucas Tanure * 89e7647b5SLucas Tanure * Author: Lucas Tanure <tanureal@opensource.cirrus.com> 99e7647b5SLucas Tanure */ 109e7647b5SLucas Tanure 119e7647b5SLucas Tanure #include "patch_cs8409.h" 129e7647b5SLucas Tanure 13b2a88774SLucas Tanure /****************************************************************************** 14b2a88774SLucas Tanure * CS42L42 Specific Data 15b2a88774SLucas Tanure * 16b2a88774SLucas Tanure ******************************************************************************/ 17b2a88774SLucas Tanure 18636eb9d2SLucas Tanure static const DECLARE_TLV_DB_SCALE(cs42l42_dac_db_scale, CS42L42_HP_VOL_REAL_MIN * 100, 100, 1); 19b2a88774SLucas Tanure 20636eb9d2SLucas Tanure static const DECLARE_TLV_DB_SCALE(cs42l42_adc_db_scale, CS42L42_AMIC_VOL_REAL_MIN * 100, 100, 1); 21b2a88774SLucas Tanure 22b2a88774SLucas Tanure const struct snd_kcontrol_new cs42l42_dac_volume_mixer = { 23b2a88774SLucas Tanure .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 24b2a88774SLucas Tanure .index = 0, 25b2a88774SLucas Tanure .subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG), 26b2a88774SLucas Tanure .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ), 27636eb9d2SLucas Tanure .info = cs42l42_volume_info, 28636eb9d2SLucas Tanure .get = cs42l42_volume_get, 29636eb9d2SLucas Tanure .put = cs42l42_volume_put, 30b2a88774SLucas Tanure .tlv = { .p = cs42l42_dac_db_scale }, 3124f7ac3dSLucas Tanure .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_TRANSMITTER_A, 3, CS8409_CODEC0, 32b2a88774SLucas Tanure HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE 33b2a88774SLucas Tanure }; 34b2a88774SLucas Tanure 35b2a88774SLucas Tanure const struct snd_kcontrol_new cs42l42_adc_volume_mixer = { 36b2a88774SLucas Tanure .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 37b2a88774SLucas Tanure .index = 0, 38b2a88774SLucas Tanure .subdevice = (HDA_SUBDEV_AMP_FLAG | HDA_SUBDEV_NID_FLAG), 39b2a88774SLucas Tanure .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ), 40636eb9d2SLucas Tanure .info = cs42l42_volume_info, 41636eb9d2SLucas Tanure .get = cs42l42_volume_get, 42636eb9d2SLucas Tanure .put = cs42l42_volume_put, 43b2a88774SLucas Tanure .tlv = { .p = cs42l42_adc_db_scale }, 4424f7ac3dSLucas Tanure .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_RECEIVER_A, 1, CS8409_CODEC0, 45b2a88774SLucas Tanure HDA_INPUT, CS42L42_VOL_ADC) | HDA_AMP_VAL_MIN_MUTE 46b2a88774SLucas Tanure }; 47b2a88774SLucas Tanure 48*fed0aacaSStefan Binding const struct hda_pcm_stream cs42l42_48k_pcm_analog_playback = { 49*fed0aacaSStefan Binding .rates = SNDRV_PCM_RATE_48000, /* fixed rate */ 50*fed0aacaSStefan Binding }; 51*fed0aacaSStefan Binding 52*fed0aacaSStefan Binding const struct hda_pcm_stream cs42l42_48k_pcm_analog_capture = { 53*fed0aacaSStefan Binding .rates = SNDRV_PCM_RATE_48000, /* fixed rate */ 54*fed0aacaSStefan Binding }; 55*fed0aacaSStefan Binding 5624f7ac3dSLucas Tanure /****************************************************************************** 5724f7ac3dSLucas Tanure * BULLSEYE / WARLOCK / CYBORG Specific Arrays 5824f7ac3dSLucas Tanure * CS8409/CS42L42 5924f7ac3dSLucas Tanure ******************************************************************************/ 609e7647b5SLucas Tanure 619e7647b5SLucas Tanure const struct hda_verb cs8409_cs42l42_init_verbs[] = { 62ccff0064SStefan Binding { CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ 63ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ 64ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ 65ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ 66ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ 67ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ 689e7647b5SLucas Tanure {} /* terminator */ 699e7647b5SLucas Tanure }; 709e7647b5SLucas Tanure 719e7647b5SLucas Tanure const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { 72ccff0064SStefan Binding { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */ 73ccff0064SStefan Binding { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */ 74ccff0064SStefan Binding { CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */ 75ccff0064SStefan Binding { CS8409_PIN_DMIC1_IN, 0x90a00090 }, /* DMIC-1 */ 769e7647b5SLucas Tanure {} /* terminator */ 779e7647b5SLucas Tanure }; 789e7647b5SLucas Tanure 799e7647b5SLucas Tanure /* Vendor specific HW configuration for CS42L42 */ 8024f7ac3dSLucas Tanure static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { 819e7647b5SLucas Tanure { 0x1010, 0xB0 }, 829e7647b5SLucas Tanure { 0x1D01, 0x00 }, 839e7647b5SLucas Tanure { 0x1D02, 0x06 }, 849e7647b5SLucas Tanure { 0x1D03, 0x00 }, 859e7647b5SLucas Tanure { 0x1107, 0x01 }, 869e7647b5SLucas Tanure { 0x1009, 0x02 }, 879e7647b5SLucas Tanure { 0x1007, 0x03 }, 889e7647b5SLucas Tanure { 0x1201, 0x00 }, 899e7647b5SLucas Tanure { 0x1208, 0x13 }, 909e7647b5SLucas Tanure { 0x1205, 0xFF }, 919e7647b5SLucas Tanure { 0x1206, 0x00 }, 929e7647b5SLucas Tanure { 0x1207, 0x20 }, 939e7647b5SLucas Tanure { 0x1202, 0x0D }, 949e7647b5SLucas Tanure { 0x2A02, 0x02 }, 959e7647b5SLucas Tanure { 0x2A03, 0x00 }, 969e7647b5SLucas Tanure { 0x2A04, 0x00 }, 979e7647b5SLucas Tanure { 0x2A05, 0x02 }, 989e7647b5SLucas Tanure { 0x2A06, 0x00 }, 999e7647b5SLucas Tanure { 0x2A07, 0x20 }, 1009e7647b5SLucas Tanure { 0x2A08, 0x02 }, 1019e7647b5SLucas Tanure { 0x2A09, 0x00 }, 1029e7647b5SLucas Tanure { 0x2A0A, 0x80 }, 1039e7647b5SLucas Tanure { 0x2A0B, 0x02 }, 1049e7647b5SLucas Tanure { 0x2A0C, 0x00 }, 1059e7647b5SLucas Tanure { 0x2A0D, 0xA0 }, 1069e7647b5SLucas Tanure { 0x2A01, 0x0C }, 1079e7647b5SLucas Tanure { 0x2902, 0x01 }, 1089e7647b5SLucas Tanure { 0x2903, 0x02 }, 1099e7647b5SLucas Tanure { 0x2904, 0x00 }, 1109e7647b5SLucas Tanure { 0x2905, 0x00 }, 1119e7647b5SLucas Tanure { 0x2901, 0x01 }, 1129e7647b5SLucas Tanure { 0x1101, 0x0A }, 1139e7647b5SLucas Tanure { 0x1102, 0x84 }, 1149e7647b5SLucas Tanure { 0x2301, 0x00 }, 1159e7647b5SLucas Tanure { 0x2303, 0x00 }, 1169e7647b5SLucas Tanure { 0x2302, 0x3f }, 1179e7647b5SLucas Tanure { 0x2001, 0x03 }, 1189e7647b5SLucas Tanure { 0x1B75, 0xB6 }, 1199e7647b5SLucas Tanure { 0x1B73, 0xC2 }, 1209e7647b5SLucas Tanure { 0x1129, 0x01 }, 1219e7647b5SLucas Tanure { 0x1121, 0xF3 }, 1229e7647b5SLucas Tanure { 0x1103, 0x20 }, 1239e7647b5SLucas Tanure { 0x1105, 0x00 }, 1241f03db68SStefan Binding { 0x1112, 0x00 }, 1259e7647b5SLucas Tanure { 0x1113, 0x80 }, 1269e7647b5SLucas Tanure { 0x1C03, 0xC0 }, 1279e7647b5SLucas Tanure { 0x1101, 0x02 }, 128cab82a22SStefan Binding { 0x1316, 0xff }, 129cab82a22SStefan Binding { 0x1317, 0xff }, 130cab82a22SStefan Binding { 0x1318, 0xff }, 131cab82a22SStefan Binding { 0x1319, 0xff }, 132cab82a22SStefan Binding { 0x131a, 0xff }, 133cab82a22SStefan Binding { 0x131b, 0xff }, 134cab82a22SStefan Binding { 0x131c, 0xff }, 135cab82a22SStefan Binding { 0x131e, 0xff }, 136cab82a22SStefan Binding { 0x131f, 0xff }, 137cab82a22SStefan Binding { 0x1320, 0xff }, 138cab82a22SStefan Binding { 0x1b79, 0xff }, 139cab82a22SStefan Binding { 0x1b7a, 0xff }, 1409e7647b5SLucas Tanure }; 1419e7647b5SLucas Tanure 1429e7647b5SLucas Tanure /* Vendor specific hw configuration for CS8409 */ 1439e7647b5SLucas Tanure const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = { 144ccff0064SStefan Binding /* +PLL1/2_EN, +I2C_EN */ 145ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 }, 146ccff0064SStefan Binding /* ASP1/2_EN=0, ASP1_STP=1 */ 147ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 }, 148ccff0064SStefan Binding /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ 149ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 }, 150ccff0064SStefan Binding /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ 151ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 }, 152ccff0064SStefan Binding /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ 153ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 }, 154ccff0064SStefan Binding /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ 155ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL1, 0x0800 }, 156ccff0064SStefan Binding /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */ 157ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL2, 0x2800 }, 158ccff0064SStefan Binding /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ 159ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 }, 160ccff0064SStefan Binding /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ 161ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 }, 162ccff0064SStefan Binding /* ASP1: LCHI = 00h */ 163ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 }, 164ccff0064SStefan Binding /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ 165ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff }, 166ccff0064SStefan Binding /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ 167ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 }, 168ccff0064SStefan Binding /* ASP2: LCHI=1Fh */ 169ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL1, 0x801f }, 170ccff0064SStefan Binding /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */ 171ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL2, 0x283f }, 172ccff0064SStefan Binding /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */ 173ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL3, 0x805c }, 174ccff0064SStefan Binding /* DMIC1_MO=10b, DMIC1/2_SR=1 */ 175ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DMIC_CFG, 0x0023 }, 176ccff0064SStefan Binding /* ASP1/2_BEEP=0 */ 177ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 }, 178ccff0064SStefan Binding /* ASP1/2_EN=1, ASP1_STP=1 */ 179ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0062 }, 180ccff0064SStefan Binding /* -PLL2_EN */ 181ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 }, 182ccff0064SStefan Binding /* TX2.A: pre-scale att.=0 dB */ 183ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PRE_SCALE_ATTN2, 0x0000 }, 184ccff0064SStefan Binding /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */ 185ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0xfc03 }, 186ccff0064SStefan Binding /* test mode on */ 187ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 }, 188ccff0064SStefan Binding /* GPIO hysteresis = 30 us */ 189ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 }, 190ccff0064SStefan Binding /* test mode off */ 191ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 }, 1929e7647b5SLucas Tanure {} /* Terminator */ 1939e7647b5SLucas Tanure }; 1949e7647b5SLucas Tanure 1959e7647b5SLucas Tanure const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = { 196ccff0064SStefan Binding /* EQ_SEL=1, EQ1/2_EN=0 */ 197ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4000 }, 198ccff0064SStefan Binding /* +EQ_ACC */ 199ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x4000 }, 200ccff0064SStefan Binding /* +EQ2_EN */ 201ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4010 }, 202ccff0064SStefan Binding /* EQ_DATA_HI=0x0647 */ 203ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 }, 204ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */ 205ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc0c7 }, 206ccff0064SStefan Binding /* EQ_DATA_HI=0x0647 */ 207ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 }, 208ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */ 209ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc1c7 }, 210ccff0064SStefan Binding /* EQ_DATA_HI=0xf370 */ 211ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xf370 }, 212ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */ 213ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc271 }, 214ccff0064SStefan Binding /* EQ_DATA_HI=0x1ef8 */ 215ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ef8 }, 216ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */ 217ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc348 }, 218ccff0064SStefan Binding /* EQ_DATA_HI=0xc110 */ 219ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc110 }, 220ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */ 221ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc45a }, 222ccff0064SStefan Binding /* EQ_DATA_HI=0x1f29 */ 223ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1f29 }, 224ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */ 225ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc574 }, 226ccff0064SStefan Binding /* EQ_DATA_HI=0x1d7a */ 227ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1d7a }, 228ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */ 229ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc653 }, 230ccff0064SStefan Binding /* EQ_DATA_HI=0xc38c */ 231ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c }, 232ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */ 233ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc714 }, 234ccff0064SStefan Binding /* EQ_DATA_HI=0x1ca3 */ 235ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ca3 }, 236ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */ 237ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc8c7 }, 238ccff0064SStefan Binding /* EQ_DATA_HI=0xc38c */ 239ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c }, 240ccff0064SStefan Binding /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */ 241ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc914 }, 242ccff0064SStefan Binding /* -EQ_ACC, -EQ_WRT */ 243ccff0064SStefan Binding { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x0000 }, 2449e7647b5SLucas Tanure {} /* Terminator */ 2459e7647b5SLucas Tanure }; 24624f7ac3dSLucas Tanure 24724f7ac3dSLucas Tanure struct sub_codec cs8409_cs42l42_codec = { 24824f7ac3dSLucas Tanure .addr = CS42L42_I2C_ADDR, 24924f7ac3dSLucas Tanure .reset_gpio = CS8409_CS42L42_RESET, 25024f7ac3dSLucas Tanure .irq_mask = CS8409_CS42L42_INT, 25124f7ac3dSLucas Tanure .init_seq = cs42l42_init_reg_seq, 25224f7ac3dSLucas Tanure .init_seq_num = ARRAY_SIZE(cs42l42_init_reg_seq), 25324f7ac3dSLucas Tanure .hp_jack_in = 0, 25424f7ac3dSLucas Tanure .mic_jack_in = 0, 25524f7ac3dSLucas Tanure .paged = 1, 25624f7ac3dSLucas Tanure .suspended = 1, 257404e770aSStefan Binding .no_type_dect = 0, 25824f7ac3dSLucas Tanure }; 25924f7ac3dSLucas Tanure 26024f7ac3dSLucas Tanure /****************************************************************************** 26120e50772SLucas Tanure * Dolphin Specific Arrays 26220e50772SLucas Tanure * CS8409/ 2 X CS42L42 26320e50772SLucas Tanure ******************************************************************************/ 26420e50772SLucas Tanure 26520e50772SLucas Tanure const struct hda_verb dolphin_init_verbs[] = { 26620e50772SLucas Tanure { 0x01, AC_VERB_SET_GPIO_WAKE_MASK, DOLPHIN_WAKE }, /* WAKE from GPIO 0,4 */ 26720e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ 26820e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ 26920e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ 27020e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ 27120e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ 27220e50772SLucas Tanure {} /* terminator */ 27320e50772SLucas Tanure }; 27420e50772SLucas Tanure 27520e50772SLucas Tanure const struct hda_pintbl dolphin_pincfgs[] = { 27620e50772SLucas Tanure { 0x24, 0x022210f0 }, /* ASP-1-TX-A */ 27720e50772SLucas Tanure { 0x25, 0x010240f0 }, /* ASP-1-TX-B */ 27820e50772SLucas Tanure { 0x34, 0x02a21050 }, /* ASP-1-RX */ 27920e50772SLucas Tanure {} /* terminator */ 28020e50772SLucas Tanure }; 28120e50772SLucas Tanure 28220e50772SLucas Tanure /* Vendor specific HW configuration for CS42L42 */ 28320e50772SLucas Tanure static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = { 28420e50772SLucas Tanure { 0x1010, 0xB0 }, 28520e50772SLucas Tanure { 0x1D01, 0x00 }, 28620e50772SLucas Tanure { 0x1D02, 0x06 }, 28720e50772SLucas Tanure { 0x1D03, 0x00 }, 28820e50772SLucas Tanure { 0x1107, 0x01 }, 28920e50772SLucas Tanure { 0x1009, 0x02 }, 29020e50772SLucas Tanure { 0x1007, 0x03 }, 29120e50772SLucas Tanure { 0x1201, 0x00 }, 29220e50772SLucas Tanure { 0x1208, 0x13 }, 29320e50772SLucas Tanure { 0x1205, 0xFF }, 29420e50772SLucas Tanure { 0x1206, 0x00 }, 29520e50772SLucas Tanure { 0x1207, 0x20 }, 29620e50772SLucas Tanure { 0x1202, 0x0D }, 29720e50772SLucas Tanure { 0x2A02, 0x02 }, 29820e50772SLucas Tanure { 0x2A03, 0x00 }, 29920e50772SLucas Tanure { 0x2A04, 0x00 }, 30020e50772SLucas Tanure { 0x2A05, 0x02 }, 30120e50772SLucas Tanure { 0x2A06, 0x00 }, 30220e50772SLucas Tanure { 0x2A07, 0x20 }, 30320e50772SLucas Tanure { 0x2A01, 0x0C }, 30420e50772SLucas Tanure { 0x2902, 0x01 }, 30520e50772SLucas Tanure { 0x2903, 0x02 }, 30620e50772SLucas Tanure { 0x2904, 0x00 }, 30720e50772SLucas Tanure { 0x2905, 0x00 }, 30820e50772SLucas Tanure { 0x2901, 0x01 }, 30920e50772SLucas Tanure { 0x1101, 0x0A }, 31020e50772SLucas Tanure { 0x1102, 0x84 }, 311e4e6c584SStefan Binding { 0x2001, 0x03 }, 31220e50772SLucas Tanure { 0x2301, 0x00 }, 31320e50772SLucas Tanure { 0x2303, 0x00 }, 31420e50772SLucas Tanure { 0x2302, 0x3f }, 31520e50772SLucas Tanure { 0x1B75, 0xB6 }, 31620e50772SLucas Tanure { 0x1B73, 0xC2 }, 31720e50772SLucas Tanure { 0x1129, 0x01 }, 31820e50772SLucas Tanure { 0x1121, 0xF3 }, 31920e50772SLucas Tanure { 0x1103, 0x20 }, 32020e50772SLucas Tanure { 0x1105, 0x00 }, 32120e50772SLucas Tanure { 0x1112, 0x00 }, 32220e50772SLucas Tanure { 0x1113, 0x80 }, 32320e50772SLucas Tanure { 0x1C03, 0xC0 }, 32420e50772SLucas Tanure { 0x1101, 0x02 }, 32520e50772SLucas Tanure { 0x1316, 0xff }, 32620e50772SLucas Tanure { 0x1317, 0xff }, 32720e50772SLucas Tanure { 0x1318, 0xff }, 32820e50772SLucas Tanure { 0x1319, 0xff }, 32920e50772SLucas Tanure { 0x131a, 0xff }, 33020e50772SLucas Tanure { 0x131b, 0xff }, 33120e50772SLucas Tanure { 0x131c, 0xff }, 33220e50772SLucas Tanure { 0x131e, 0xff }, 33320e50772SLucas Tanure { 0x131f, 0xff }, 33420e50772SLucas Tanure { 0x1320, 0xff }, 33520e50772SLucas Tanure { 0x1b79, 0xff }, 33620e50772SLucas Tanure { 0x1b7a, 0xff } 33720e50772SLucas Tanure }; 33820e50772SLucas Tanure 33920e50772SLucas Tanure static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = { 34020e50772SLucas Tanure { 0x1010, 0xB0 }, 34120e50772SLucas Tanure { 0x1D01, 0x00 }, 34220e50772SLucas Tanure { 0x1D02, 0x06 }, 34320e50772SLucas Tanure { 0x1D03, 0x00 }, 34420e50772SLucas Tanure { 0x1107, 0x01 }, 34520e50772SLucas Tanure { 0x1009, 0x02 }, 34620e50772SLucas Tanure { 0x1007, 0x03 }, 34720e50772SLucas Tanure { 0x1201, 0x00 }, 34820e50772SLucas Tanure { 0x1208, 0x13 }, 34920e50772SLucas Tanure { 0x1205, 0xFF }, 35020e50772SLucas Tanure { 0x1206, 0x00 }, 35120e50772SLucas Tanure { 0x1207, 0x20 }, 35220e50772SLucas Tanure { 0x1202, 0x0D }, 35320e50772SLucas Tanure { 0x2A02, 0x02 }, 35420e50772SLucas Tanure { 0x2A03, 0x00 }, 35520e50772SLucas Tanure { 0x2A04, 0x80 }, 35620e50772SLucas Tanure { 0x2A05, 0x02 }, 35720e50772SLucas Tanure { 0x2A06, 0x00 }, 35820e50772SLucas Tanure { 0x2A07, 0xA0 }, 35920e50772SLucas Tanure { 0x2A01, 0x0C }, 36020e50772SLucas Tanure { 0x2902, 0x00 }, 36120e50772SLucas Tanure { 0x2903, 0x02 }, 36220e50772SLucas Tanure { 0x2904, 0x00 }, 36320e50772SLucas Tanure { 0x2905, 0x00 }, 36420e50772SLucas Tanure { 0x2901, 0x00 }, 36520e50772SLucas Tanure { 0x1101, 0x0E }, 36620e50772SLucas Tanure { 0x1102, 0x84 }, 367e4e6c584SStefan Binding { 0x2001, 0x01 }, 36820e50772SLucas Tanure { 0x2301, 0x00 }, 36920e50772SLucas Tanure { 0x2303, 0x00 }, 37020e50772SLucas Tanure { 0x2302, 0x3f }, 37120e50772SLucas Tanure { 0x1B75, 0xB6 }, 37220e50772SLucas Tanure { 0x1B73, 0xC2 }, 37320e50772SLucas Tanure { 0x1129, 0x01 }, 37420e50772SLucas Tanure { 0x1121, 0xF3 }, 37520e50772SLucas Tanure { 0x1103, 0x20 }, 37620e50772SLucas Tanure { 0x1105, 0x00 }, 37720e50772SLucas Tanure { 0x1112, 0x00 }, 37820e50772SLucas Tanure { 0x1113, 0x80 }, 37920e50772SLucas Tanure { 0x1C03, 0xC0 }, 38020e50772SLucas Tanure { 0x1101, 0x02 }, 38120e50772SLucas Tanure { 0x1316, 0xff }, 38220e50772SLucas Tanure { 0x1317, 0xff }, 38320e50772SLucas Tanure { 0x1318, 0xff }, 38420e50772SLucas Tanure { 0x1319, 0xff }, 38520e50772SLucas Tanure { 0x131a, 0xff }, 38620e50772SLucas Tanure { 0x131b, 0xff }, 38720e50772SLucas Tanure { 0x131c, 0xff }, 38820e50772SLucas Tanure { 0x131e, 0xff }, 38920e50772SLucas Tanure { 0x131f, 0xff }, 39020e50772SLucas Tanure { 0x1320, 0xff }, 39120e50772SLucas Tanure { 0x1b79, 0xff }, 39220e50772SLucas Tanure { 0x1b7a, 0xff } 39320e50772SLucas Tanure }; 39420e50772SLucas Tanure 39520e50772SLucas Tanure /* Vendor specific hw configuration for CS8409 */ 39620e50772SLucas Tanure const struct cs8409_cir_param dolphin_hw_cfg[] = { 39720e50772SLucas Tanure /* +PLL1/2_EN, +I2C_EN */ 39820e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 }, 39920e50772SLucas Tanure /* ASP1_EN=0, ASP1_STP=1 */ 40020e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 }, 40120e50772SLucas Tanure /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ 40220e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 }, 40320e50772SLucas Tanure /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ 40420e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 }, 40520e50772SLucas Tanure /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ 40620e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 }, 40720e50772SLucas Tanure /* ASP1.B: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=128 */ 40820e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, ASP1_B_TX_CTRL1, 0x0880 }, 40920e50772SLucas Tanure /* ASP1.B: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=160 */ 41020e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, ASP1_B_TX_CTRL2, 0x08a0 }, 41120e50772SLucas Tanure /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ 41220e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 }, 41320e50772SLucas Tanure /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ 41420e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 }, 41520e50772SLucas Tanure /* ASP1: LCHI = 00h */ 41620e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 }, 41720e50772SLucas Tanure /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ 41820e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff }, 41920e50772SLucas Tanure /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ 42020e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 }, 42120e50772SLucas Tanure /* ASP1/2_BEEP=0 */ 42220e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 }, 42320e50772SLucas Tanure /* ASP1_EN=1, ASP1_STP=1 */ 42420e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0022 }, 42520e50772SLucas Tanure /* -PLL2_EN */ 42620e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 }, 42720e50772SLucas Tanure /* ASP1_xxx_EN=1, ASP1_MCLK_EN=0 */ 42820e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0x5400 }, 42920e50772SLucas Tanure /* test mode on */ 43020e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 }, 43120e50772SLucas Tanure /* GPIO hysteresis = 30 us */ 43220e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 }, 43320e50772SLucas Tanure /* test mode off */ 43420e50772SLucas Tanure { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 }, 43520e50772SLucas Tanure {} /* Terminator */ 43620e50772SLucas Tanure }; 43720e50772SLucas Tanure 43820e50772SLucas Tanure struct sub_codec dolphin_cs42l42_0 = { 43920e50772SLucas Tanure .addr = DOLPHIN_C0_I2C_ADDR, 44020e50772SLucas Tanure .reset_gpio = DOLPHIN_C0_RESET, 44120e50772SLucas Tanure .irq_mask = DOLPHIN_C0_INT, 44220e50772SLucas Tanure .init_seq = dolphin_c0_init_reg_seq, 44320e50772SLucas Tanure .init_seq_num = ARRAY_SIZE(dolphin_c0_init_reg_seq), 44420e50772SLucas Tanure .hp_jack_in = 0, 44520e50772SLucas Tanure .mic_jack_in = 0, 44620e50772SLucas Tanure .paged = 1, 44720e50772SLucas Tanure .suspended = 1, 44820e50772SLucas Tanure .no_type_dect = 0, 44920e50772SLucas Tanure }; 45020e50772SLucas Tanure 45120e50772SLucas Tanure struct sub_codec dolphin_cs42l42_1 = { 45220e50772SLucas Tanure .addr = DOLPHIN_C1_I2C_ADDR, 45320e50772SLucas Tanure .reset_gpio = DOLPHIN_C1_RESET, 45420e50772SLucas Tanure .irq_mask = DOLPHIN_C1_INT, 45520e50772SLucas Tanure .init_seq = dolphin_c1_init_reg_seq, 45620e50772SLucas Tanure .init_seq_num = ARRAY_SIZE(dolphin_c1_init_reg_seq), 45720e50772SLucas Tanure .hp_jack_in = 0, 45820e50772SLucas Tanure .mic_jack_in = 0, 45920e50772SLucas Tanure .paged = 1, 46020e50772SLucas Tanure .suspended = 1, 46120e50772SLucas Tanure .no_type_dect = 1, 46220e50772SLucas Tanure }; 46320e50772SLucas Tanure 46420e50772SLucas Tanure /****************************************************************************** 46524f7ac3dSLucas Tanure * CS8409 Patch Driver Structs 46624f7ac3dSLucas Tanure * Arrays Used for all projects using CS8409 46724f7ac3dSLucas Tanure ******************************************************************************/ 46824f7ac3dSLucas Tanure 46924f7ac3dSLucas Tanure const struct snd_pci_quirk cs8409_fixup_tbl[] = { 47024f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), 47124f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), 47224f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), 47324f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE), 47424f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE), 47524f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE), 47624f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE), 47724f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE), 47824f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK), 47924f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK), 48024f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK), 48124f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK), 48224f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK), 48324f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK), 48424f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK), 48524f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK), 48624f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK), 48724f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK), 48824f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK), 48924f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK), 49024f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG), 49124f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG), 49224f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG), 49324f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG), 49424f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG), 49524f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG), 49624f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG), 49724f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG), 49824f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG), 49924f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG), 50024f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG), 50124f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG), 50224f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG), 50324f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG), 50424f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG), 50524f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG), 50624f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG), 50724f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), 50824f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), 50924f7ac3dSLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), 51020e50772SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AD0, "Dolphin", CS8409_DOLPHIN), 51120e50772SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AD1, "Dolphin", CS8409_DOLPHIN), 51220e50772SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AD2, "Dolphin", CS8409_DOLPHIN), 51320e50772SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0AD3, "Dolphin", CS8409_DOLPHIN), 51420e50772SLucas Tanure SND_PCI_QUIRK(0x1028, 0x0ACF, "Dolphin", CS8409_DOLPHIN), 51524f7ac3dSLucas Tanure {} /* terminator */ 51624f7ac3dSLucas Tanure }; 51724f7ac3dSLucas Tanure 51824f7ac3dSLucas Tanure /* Dell Inspiron models with cs8409/cs42l42 */ 51924f7ac3dSLucas Tanure const struct hda_model_fixup cs8409_models[] = { 52024f7ac3dSLucas Tanure { .id = CS8409_BULLSEYE, .name = "bullseye" }, 52124f7ac3dSLucas Tanure { .id = CS8409_WARLOCK, .name = "warlock" }, 52224f7ac3dSLucas Tanure { .id = CS8409_CYBORG, .name = "cyborg" }, 52320e50772SLucas Tanure { .id = CS8409_DOLPHIN, .name = "dolphin" }, 52424f7ac3dSLucas Tanure {} 52524f7ac3dSLucas Tanure }; 52624f7ac3dSLucas Tanure 52724f7ac3dSLucas Tanure const struct hda_fixup cs8409_fixups[] = { 52824f7ac3dSLucas Tanure [CS8409_BULLSEYE] = { 52924f7ac3dSLucas Tanure .type = HDA_FIXUP_PINS, 53024f7ac3dSLucas Tanure .v.pins = cs8409_cs42l42_pincfgs, 53124f7ac3dSLucas Tanure .chained = true, 53224f7ac3dSLucas Tanure .chain_id = CS8409_FIXUPS, 53324f7ac3dSLucas Tanure }, 53424f7ac3dSLucas Tanure [CS8409_WARLOCK] = { 53524f7ac3dSLucas Tanure .type = HDA_FIXUP_PINS, 53624f7ac3dSLucas Tanure .v.pins = cs8409_cs42l42_pincfgs, 53724f7ac3dSLucas Tanure .chained = true, 53824f7ac3dSLucas Tanure .chain_id = CS8409_FIXUPS, 53924f7ac3dSLucas Tanure }, 54024f7ac3dSLucas Tanure [CS8409_CYBORG] = { 54124f7ac3dSLucas Tanure .type = HDA_FIXUP_PINS, 54224f7ac3dSLucas Tanure .v.pins = cs8409_cs42l42_pincfgs, 54324f7ac3dSLucas Tanure .chained = true, 54424f7ac3dSLucas Tanure .chain_id = CS8409_FIXUPS, 54524f7ac3dSLucas Tanure }, 54624f7ac3dSLucas Tanure [CS8409_FIXUPS] = { 54724f7ac3dSLucas Tanure .type = HDA_FIXUP_FUNC, 54824f7ac3dSLucas Tanure .v.func = cs8409_cs42l42_fixups, 54924f7ac3dSLucas Tanure }, 55020e50772SLucas Tanure [CS8409_DOLPHIN] = { 55120e50772SLucas Tanure .type = HDA_FIXUP_PINS, 55220e50772SLucas Tanure .v.pins = dolphin_pincfgs, 55320e50772SLucas Tanure .chained = true, 55420e50772SLucas Tanure .chain_id = CS8409_DOLPHIN_FIXUPS, 55520e50772SLucas Tanure }, 55620e50772SLucas Tanure [CS8409_DOLPHIN_FIXUPS] = { 55720e50772SLucas Tanure .type = HDA_FIXUP_FUNC, 55820e50772SLucas Tanure .v.func = dolphin_fixups, 55920e50772SLucas Tanure }, 56024f7ac3dSLucas Tanure }; 561