1 /* 2 * Common functionality for the alsa driver code base for HD Audio. 3 * 4 * This program is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License as published by the Free 6 * Software Foundation; either version 2 of the License, or (at your option) 7 * any later version. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 */ 14 15 #ifndef __SOUND_HDA_CONTROLLER_H 16 #define __SOUND_HDA_CONTROLLER_H 17 18 #include <linux/timecounter.h> 19 #include <linux/interrupt.h> 20 #include <sound/core.h> 21 #include <sound/pcm.h> 22 #include <sound/initval.h> 23 #include "hda_codec.h" 24 #include <sound/hda_register.h> 25 26 #define AZX_MAX_CODECS HDA_MAX_CODECS 27 #define AZX_DEFAULT_CODECS 4 28 29 /* driver quirks (capabilities) */ 30 /* bits 0-7 are used for indicating driver type */ 31 #define AZX_DCAPS_NO_TCSEL (1 << 8) /* No Intel TCSEL bit */ 32 #define AZX_DCAPS_NO_MSI (1 << 9) /* No MSI support */ 33 #define AZX_DCAPS_SNOOP_MASK (3 << 10) /* snoop type mask */ 34 #define AZX_DCAPS_SNOOP_OFF (1 << 12) /* snoop default off */ 35 /* 13 unused */ 36 /* 14 unused */ 37 #define AZX_DCAPS_CTX_WORKAROUND (1 << 15) /* X-Fi workaround */ 38 #define AZX_DCAPS_POSFIX_LPIB (1 << 16) /* Use LPIB as default */ 39 /* 17 unused */ 40 #define AZX_DCAPS_NO_64BIT (1 << 18) /* No 64bit address */ 41 #define AZX_DCAPS_SYNC_WRITE (1 << 19) /* sync each cmd write */ 42 #define AZX_DCAPS_OLD_SSYNC (1 << 20) /* Old SSYNC reg for ICH */ 43 #define AZX_DCAPS_NO_ALIGN_BUFSIZE (1 << 21) /* no buffer size alignment */ 44 /* 22 unused */ 45 #define AZX_DCAPS_4K_BDLE_BOUNDARY (1 << 23) /* BDLE in 4k boundary */ 46 /* 24 unused */ 47 #define AZX_DCAPS_COUNT_LPIB_DELAY (1 << 25) /* Take LPIB as delay */ 48 #define AZX_DCAPS_PM_RUNTIME (1 << 26) /* runtime PM support */ 49 #ifdef CONFIG_SND_HDA_I915 50 #define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */ 51 #else 52 #define AZX_DCAPS_I915_POWERWELL 0 /* NOP */ 53 #endif 54 #define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */ 55 #define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */ 56 #define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */ 57 58 enum { 59 AZX_SNOOP_TYPE_NONE, 60 AZX_SNOOP_TYPE_SCH, 61 AZX_SNOOP_TYPE_ATI, 62 AZX_SNOOP_TYPE_NVIDIA, 63 }; 64 65 struct azx_dev { 66 struct hdac_stream core; 67 68 unsigned int irq_pending:1; 69 /* 70 * For VIA: 71 * A flag to ensure DMA position is 0 72 * when link position is not greater than FIFO size 73 */ 74 unsigned int insufficient:1; 75 unsigned int wc_marked:1; 76 }; 77 78 #define azx_stream(dev) (&(dev)->core) 79 #define stream_to_azx_dev(s) container_of(s, struct azx_dev, core) 80 81 struct azx; 82 83 /* Functions to read/write to hda registers. */ 84 struct hda_controller_ops { 85 /* Disable msi if supported, PCI only */ 86 int (*disable_msi_reset_irq)(struct azx *); 87 int (*substream_alloc_pages)(struct azx *chip, 88 struct snd_pcm_substream *substream, 89 size_t size); 90 int (*substream_free_pages)(struct azx *chip, 91 struct snd_pcm_substream *substream); 92 void (*pcm_mmap_prepare)(struct snd_pcm_substream *substream, 93 struct vm_area_struct *area); 94 /* Check if current position is acceptable */ 95 int (*position_check)(struct azx *chip, struct azx_dev *azx_dev); 96 /* enable/disable the link power */ 97 int (*link_power)(struct azx *chip, bool enable); 98 }; 99 100 struct azx_pcm { 101 struct azx *chip; 102 struct snd_pcm *pcm; 103 struct hda_codec *codec; 104 struct hda_pcm *info; 105 struct list_head list; 106 }; 107 108 typedef unsigned int (*azx_get_pos_callback_t)(struct azx *, struct azx_dev *); 109 typedef int (*azx_get_delay_callback_t)(struct azx *, struct azx_dev *, unsigned int pos); 110 111 struct azx { 112 struct hda_bus bus; 113 114 struct snd_card *card; 115 struct pci_dev *pci; 116 int dev_index; 117 118 /* chip type specific */ 119 int driver_type; 120 unsigned int driver_caps; 121 int playback_streams; 122 int playback_index_offset; 123 int capture_streams; 124 int capture_index_offset; 125 int num_streams; 126 const int *jackpoll_ms; /* per-card jack poll interval */ 127 128 /* Register interaction. */ 129 const struct hda_controller_ops *ops; 130 131 /* position adjustment callbacks */ 132 azx_get_pos_callback_t get_position[2]; 133 azx_get_delay_callback_t get_delay[2]; 134 135 /* locks */ 136 struct mutex open_mutex; /* Prevents concurrent open/close operations */ 137 138 /* PCM */ 139 struct list_head pcm_list; /* azx_pcm list */ 140 141 /* HD codec */ 142 int codec_probe_mask; /* copied from probe_mask option */ 143 unsigned int beep_mode; 144 145 #ifdef CONFIG_SND_HDA_PATCH_LOADER 146 const struct firmware *fw; 147 #endif 148 149 /* flags */ 150 int bdl_pos_adj; 151 int poll_count; 152 unsigned int running:1; 153 unsigned int single_cmd:1; 154 unsigned int polling_mode:1; 155 unsigned int msi:1; 156 unsigned int probing:1; /* codec probing phase */ 157 unsigned int snoop:1; 158 unsigned int align_buffer_size:1; 159 unsigned int region_requested:1; 160 unsigned int disabled:1; /* disabled by vga_switcheroo */ 161 162 #ifdef CONFIG_SND_HDA_DSP_LOADER 163 struct azx_dev saved_azx_dev; 164 #endif 165 }; 166 167 #define azx_bus(chip) (&(chip)->bus.core) 168 #define bus_to_azx(_bus) container_of(_bus, struct azx, bus.core) 169 170 #ifdef CONFIG_X86 171 #define azx_snoop(chip) ((chip)->snoop) 172 #else 173 #define azx_snoop(chip) true 174 #endif 175 176 /* 177 * macros for easy use 178 */ 179 180 #define azx_writel(chip, reg, value) \ 181 snd_hdac_chip_writel(azx_bus(chip), reg, value) 182 #define azx_readl(chip, reg) \ 183 snd_hdac_chip_readl(azx_bus(chip), reg) 184 #define azx_writew(chip, reg, value) \ 185 snd_hdac_chip_writew(azx_bus(chip), reg, value) 186 #define azx_readw(chip, reg) \ 187 snd_hdac_chip_readw(azx_bus(chip), reg) 188 #define azx_writeb(chip, reg, value) \ 189 snd_hdac_chip_writeb(azx_bus(chip), reg, value) 190 #define azx_readb(chip, reg) \ 191 snd_hdac_chip_readb(azx_bus(chip), reg) 192 193 #define azx_has_pm_runtime(chip) \ 194 ((chip)->driver_caps & AZX_DCAPS_PM_RUNTIME) 195 196 /* PCM setup */ 197 static inline struct azx_dev *get_azx_dev(struct snd_pcm_substream *substream) 198 { 199 return substream->runtime->private_data; 200 } 201 unsigned int azx_get_position(struct azx *chip, struct azx_dev *azx_dev); 202 unsigned int azx_get_pos_lpib(struct azx *chip, struct azx_dev *azx_dev); 203 unsigned int azx_get_pos_posbuf(struct azx *chip, struct azx_dev *azx_dev); 204 205 /* Stream control. */ 206 void azx_stop_all_streams(struct azx *chip); 207 208 /* Allocation functions. */ 209 #define azx_alloc_stream_pages(chip) \ 210 snd_hdac_bus_alloc_stream_pages(azx_bus(chip)) 211 #define azx_free_stream_pages(chip) \ 212 snd_hdac_bus_free_stream_pages(azx_bus(chip)) 213 214 /* Low level azx interface */ 215 void azx_init_chip(struct azx *chip, bool full_reset); 216 void azx_stop_chip(struct azx *chip); 217 #define azx_enter_link_reset(chip) \ 218 snd_hdac_bus_enter_link_reset(azx_bus(chip)) 219 irqreturn_t azx_interrupt(int irq, void *dev_id); 220 221 /* Codec interface */ 222 int azx_bus_init(struct azx *chip, const char *model, 223 const struct hdac_io_ops *io_ops); 224 int azx_probe_codecs(struct azx *chip, unsigned int max_slots); 225 int azx_codec_configure(struct azx *chip); 226 int azx_init_streams(struct azx *chip); 227 void azx_free_streams(struct azx *chip); 228 229 #endif /* __SOUND_HDA_CONTROLLER_H */ 230