xref: /openbmc/linux/sound/pci/hda/cs35l41_hda.c (revision fcad8950)
1 // SPDX-License-Identifier: GPL-2.0
2 //
3 // CS35l41 ALSA HDA audio driver
4 //
5 // Copyright 2021 Cirrus Logic, Inc.
6 //
7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com>
8 
9 #include <linux/acpi.h>
10 #include <linux/module.h>
11 #include <sound/hda_codec.h>
12 #include "hda_local.h"
13 #include "hda_auto_parser.h"
14 #include "hda_jack.h"
15 #include "hda_generic.h"
16 #include "hda_component.h"
17 #include "cs35l41_hda.h"
18 
19 static const struct reg_sequence cs35l41_hda_config[] = {
20 	{ CS35L41_PLL_CLK_CTRL,		0x00000430 }, // 3200000Hz, BCLK Input, PLL_REFCLK_EN = 1
21 	{ CS35L41_GLOBAL_CLK_CTRL,	0x00000003 }, // GLOBAL_FS = 48 kHz
22 	{ CS35L41_SP_ENABLES,		0x00010000 }, // ASP_RX1_EN = 1
23 	{ CS35L41_SP_RATE_CTRL,		0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz
24 	{ CS35L41_SP_FORMAT,		0x20200200 }, // 24 bits, I2S, BCLK Slave, FSYNC Slave
25 	{ CS35L41_DAC_PCM1_SRC,		0x00000008 }, // DACPCM1_SRC = ASPRX1
26 	{ CS35L41_AMP_DIG_VOL_CTRL,	0x00000000 }, // AMP_VOL_PCM  0.0 dB
27 	{ CS35L41_AMP_GAIN_CTRL,	0x00000084 }, // AMP_GAIN_PCM 4.5 dB
28 	{ CS35L41_PWR_CTRL2,		0x00000001 }, // AMP_EN = 1
29 };
30 
31 static const struct reg_sequence cs35l41_hda_start_bst[] = {
32 	{ CS35L41_PWR_CTRL2,		0x00000021 }, // BST_EN = 10, AMP_EN = 1
33 	{ CS35L41_PWR_CTRL1,		0x00000001, 3000}, // set GLOBAL_EN = 1
34 };
35 
36 static const struct reg_sequence cs35l41_hda_stop_bst[] = {
37 	{ CS35L41_PWR_CTRL1,		0x00000000, 3000}, // set GLOBAL_EN = 0
38 };
39 
40 // only on amps where GPIO1 is used to control ext. VSPK switch
41 static const struct reg_sequence cs35l41_start_ext_vspk[] = {
42 	{ 0x00000040,			0x00000055 },
43 	{ 0x00000040,			0x000000AA },
44 	{ 0x00007438,			0x00585941 },
45 	{ 0x00007414,			0x08C82222 },
46 	{ 0x0000742C,			0x00000009 },
47 	{ 0x00011008,			0x00008001 },
48 	{ 0x0000742C,			0x0000000F },
49 	{ 0x0000742C,			0x00000079 },
50 	{ 0x00007438,			0x00585941 },
51 	{ CS35L41_PWR_CTRL1,		0x00000001, 3000}, // set GLOBAL_EN = 1
52 	{ 0x0000742C,			0x000000F9 },
53 	{ 0x00007438,			0x00580941 },
54 	{ 0x00000040,			0x000000CC },
55 	{ 0x00000040,			0x00000033 },
56 };
57 
58 //only on amps where GPIO1 is used to control ext. VSPK switch
59 static const struct reg_sequence cs35l41_stop_ext_vspk[] = {
60 	{ 0x00000040,			0x00000055 },
61 	{ 0x00000040,			0x000000AA },
62 	{ 0x00007438,			0x00585941 },
63 	{ 0x00002014,			0x00000000, 3000}, // set GLOBAL_EN = 0
64 	{ 0x0000742C,			0x00000009 },
65 	{ 0x00007438,			0x00580941 },
66 	{ 0x00011008,			0x00000001 },
67 	{ 0x0000393C,			0x000000C0, 6000},
68 	{ 0x0000393C,			0x00000000 },
69 	{ 0x00007414,			0x00C82222 },
70 	{ 0x0000742C,			0x00000000 },
71 	{ 0x00000040,			0x000000CC },
72 	{ 0x00000040,			0x00000033 },
73 };
74 
75 static const struct reg_sequence cs35l41_safe_to_active[] = {
76 	{ 0x00000040,			0x00000055 },
77 	{ 0x00000040,			0x000000AA },
78 	{ 0x0000742C,			0x0000000F },
79 	{ 0x0000742C,			0x00000079 },
80 	{ 0x00007438,			0x00585941 },
81 	{ CS35L41_PWR_CTRL1,		0x00000001, 2000 }, // GLOBAL_EN = 1
82 	{ 0x0000742C,			0x000000F9 },
83 	{ 0x00007438,			0x00580941 },
84 	{ 0x00000040,			0x000000CC },
85 	{ 0x00000040,			0x00000033 },
86 };
87 
88 static const struct reg_sequence cs35l41_active_to_safe[] = {
89 	{ 0x00000040,			0x00000055 },
90 	{ 0x00000040,			0x000000AA },
91 	{ 0x00007438,			0x00585941 },
92 	{ CS35L41_AMP_DIG_VOL_CTRL,	0x0000A678 }, // AMP_VOL_PCM Mute
93 	{ CS35L41_PWR_CTRL2,		0x00000000 }, // AMP_EN = 0
94 	{ CS35L41_PWR_CTRL1,		0x00000000 },
95 	{ 0x0000742C,			0x00000009, 2000 },
96 	{ 0x00007438,			0x00580941 },
97 	{ 0x00000040,			0x000000CC },
98 	{ 0x00000040,			0x00000033 },
99 };
100 
101 static const struct reg_sequence cs35l41_reset_to_safe[] = {
102 	{ 0x00000040,			0x00000055 },
103 	{ 0x00000040,			0x000000AA },
104 	{ 0x00007438,			0x00585941 },
105 	{ 0x00007414,			0x08C82222 },
106 	{ 0x0000742C,			0x00000009 },
107 	{ 0x00000040,			0x000000CC },
108 	{ 0x00000040,			0x00000033 },
109 };
110 
111 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_no_bst = {
112 	.probe		= cs35l41_reset_to_safe,
113 	.num_probe	= ARRAY_SIZE(cs35l41_reset_to_safe),
114 	.open		= cs35l41_hda_config,
115 	.num_open	= ARRAY_SIZE(cs35l41_hda_config),
116 	.prepare	= cs35l41_safe_to_active,
117 	.num_prepare	= ARRAY_SIZE(cs35l41_safe_to_active),
118 	.cleanup	= cs35l41_active_to_safe,
119 	.num_cleanup	= ARRAY_SIZE(cs35l41_active_to_safe),
120 };
121 
122 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_ext_bst = {
123 	.open		= cs35l41_hda_config,
124 	.num_open	= ARRAY_SIZE(cs35l41_hda_config),
125 	.prepare	= cs35l41_start_ext_vspk,
126 	.num_prepare	= ARRAY_SIZE(cs35l41_start_ext_vspk),
127 	.cleanup	= cs35l41_stop_ext_vspk,
128 	.num_cleanup	= ARRAY_SIZE(cs35l41_stop_ext_vspk),
129 };
130 
131 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_int_bst = {
132 	.open		= cs35l41_hda_config,
133 	.num_open	= ARRAY_SIZE(cs35l41_hda_config),
134 	.prepare	= cs35l41_hda_start_bst,
135 	.num_prepare	= ARRAY_SIZE(cs35l41_hda_start_bst),
136 	.cleanup	= cs35l41_hda_stop_bst,
137 	.num_cleanup	= ARRAY_SIZE(cs35l41_hda_stop_bst),
138 };
139 
140 static void cs35l41_hda_playback_hook(struct device *dev, int action)
141 {
142 	struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
143 	const struct cs35l41_hda_reg_sequence *reg_seq = cs35l41->reg_seq;
144 	struct regmap *reg = cs35l41->regmap;
145 	int ret = 0;
146 
147 	switch (action) {
148 	case HDA_GEN_PCM_ACT_OPEN:
149 		if (reg_seq->open)
150 			ret = regmap_multi_reg_write(reg, reg_seq->open, reg_seq->num_open);
151 		break;
152 	case HDA_GEN_PCM_ACT_PREPARE:
153 		if (reg_seq->prepare)
154 			ret = regmap_multi_reg_write(reg, reg_seq->prepare, reg_seq->num_prepare);
155 		break;
156 	case HDA_GEN_PCM_ACT_CLEANUP:
157 		if (reg_seq->cleanup)
158 			ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup);
159 		break;
160 	case HDA_GEN_PCM_ACT_CLOSE:
161 		if (reg_seq->close)
162 			ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close);
163 		break;
164 	default:
165 		ret = -EINVAL;
166 		break;
167 	}
168 
169 	if (ret)
170 		dev_warn(cs35l41->dev, "Failed to apply multi reg write: %d\n", ret);
171 }
172 
173 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot,
174 				    unsigned int rx_num, unsigned int *rx_slot)
175 {
176 	struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
177 
178 	return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num,
179 				    rx_slot);
180 }
181 
182 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data)
183 {
184 	struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
185 	struct hda_component *comps = master_data;
186 
187 	if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS)
188 		return -EINVAL;
189 
190 	comps = &comps[cs35l41->index];
191 	if (comps->dev)
192 		return -EBUSY;
193 
194 	comps->dev = dev;
195 	strscpy(comps->name, dev_name(dev), sizeof(comps->name));
196 	comps->playback_hook = cs35l41_hda_playback_hook;
197 	comps->set_channel_map = cs35l41_hda_channel_map;
198 
199 	return 0;
200 }
201 
202 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data)
203 {
204 	struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
205 	struct hda_component *comps = master_data;
206 
207 	if (comps[cs35l41->index].dev == dev)
208 		memset(&comps[cs35l41->index], 0, sizeof(*comps));
209 }
210 
211 static const struct component_ops cs35l41_hda_comp_ops = {
212 	.bind = cs35l41_hda_bind,
213 	.unbind = cs35l41_hda_unbind,
214 };
215 
216 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41)
217 {
218 	struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
219 	bool internal_boost = false;
220 	int ret;
221 
222 	if (!cs35l41->hw_cfg.valid)
223 		return -EINVAL;
224 
225 	if (hw_cfg->vspk_always_on) {
226 		cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst;
227 		return 0;
228 	}
229 
230 	if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0)
231 		internal_boost = true;
232 
233 	if (hw_cfg->gpio1.valid) {
234 		switch (hw_cfg->gpio1.func) {
235 		case CS35L41_NOT_USED:
236 			break;
237 		case CS35l41_VSPK_SWITCH:
238 			hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO;
239 			hw_cfg->gpio1.out_en = true;
240 			break;
241 		case CS35l41_SYNC:
242 			hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC;
243 			break;
244 		default:
245 			dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n",
246 				hw_cfg->gpio1.func);
247 			return -EINVAL;
248 		}
249 	}
250 
251 	if (hw_cfg->gpio2.valid) {
252 		switch (hw_cfg->gpio2.func) {
253 		case CS35L41_NOT_USED:
254 			break;
255 		case CS35L41_INTERRUPT:
256 			break;
257 		default:
258 			dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func);
259 			return -EINVAL;
260 		}
261 	}
262 
263 	cs35l41_gpio_config(cs35l41->regmap, hw_cfg);
264 
265 	if (internal_boost) {
266 		cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst;
267 		ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap,
268 					   hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk);
269 		if (ret)
270 			return ret;
271 	} else {
272 		cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst;
273 	}
274 
275 	return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos);
276 }
277 
278 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id)
279 {
280 	struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg;
281 	u32 values[HDA_MAX_COMPONENTS];
282 	struct acpi_device *adev;
283 	struct device *physdev;
284 	char *property;
285 	size_t nval;
286 	int i, ret;
287 
288 	adev = acpi_dev_get_first_match_dev(hid, NULL, -1);
289 	if (!adev) {
290 		dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid);
291 		return -ENODEV;
292 	}
293 
294 	physdev = get_device(acpi_get_first_physical_node(adev));
295 	acpi_dev_put(adev);
296 
297 	property = "cirrus,dev-index";
298 	ret = device_property_count_u32(physdev, property);
299 	if (ret <= 0)
300 		goto no_acpi_dsd;
301 
302 	if (ret > ARRAY_SIZE(values)) {
303 		ret = -EINVAL;
304 		goto err;
305 	}
306 	nval = ret;
307 
308 	ret = device_property_read_u32_array(physdev, property, values, nval);
309 	if (ret)
310 		goto err;
311 
312 	cs35l41->index = -1;
313 	for (i = 0; i < nval; i++) {
314 		if (values[i] == id) {
315 			cs35l41->index = i;
316 			break;
317 		}
318 	}
319 	if (cs35l41->index == -1) {
320 		dev_err(cs35l41->dev, "No index found in %s\n", property);
321 		ret = -ENODEV;
322 		goto err;
323 	}
324 
325 	/* To use the same release code for all laptop variants we can't use devm_ version of
326 	 * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node
327 	 */
328 	cs35l41->reset_gpio = fwnode_gpiod_get_index(&adev->fwnode, "reset", cs35l41->index,
329 						     GPIOD_OUT_LOW, "cs35l41-reset");
330 
331 	property = "cirrus,speaker-position";
332 	ret = device_property_read_u32_array(physdev, property, values, nval);
333 	if (ret)
334 		goto err;
335 	hw_cfg->spk_pos = values[cs35l41->index];
336 
337 	property = "cirrus,gpio1-func";
338 	ret = device_property_read_u32_array(physdev, property, values, nval);
339 	if (ret)
340 		goto err;
341 	hw_cfg->gpio1.func = values[cs35l41->index];
342 	hw_cfg->gpio1.valid = true;
343 
344 	property = "cirrus,gpio2-func";
345 	ret = device_property_read_u32_array(physdev, property, values, nval);
346 	if (ret)
347 		goto err;
348 	hw_cfg->gpio2.func = values[cs35l41->index];
349 	hw_cfg->gpio2.valid = true;
350 
351 	property = "cirrus,boost-peak-milliamp";
352 	ret = device_property_read_u32_array(physdev, property, values, nval);
353 	if (ret == 0)
354 		hw_cfg->bst_ipk = values[cs35l41->index];
355 	else
356 		hw_cfg->bst_ipk = -1;
357 
358 	property = "cirrus,boost-ind-nanohenry";
359 	ret = device_property_read_u32_array(physdev, property, values, nval);
360 	if (ret == 0)
361 		hw_cfg->bst_ind = values[cs35l41->index];
362 	else
363 		hw_cfg->bst_ind = -1;
364 
365 	property = "cirrus,boost-cap-microfarad";
366 	ret = device_property_read_u32_array(physdev, property, values, nval);
367 	if (ret == 0)
368 		hw_cfg->bst_cap = values[cs35l41->index];
369 	else
370 		hw_cfg->bst_cap = -1;
371 
372 	hw_cfg->valid = true;
373 	put_device(physdev);
374 
375 	return 0;
376 
377 err:
378 	put_device(physdev);
379 	dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret);
380 
381 	return ret;
382 
383 no_acpi_dsd:
384 	/*
385 	 * Device CLSA0100 doesn't have _DSD so a gpiod_get by the label reset won't work.
386 	 * And devices created by i2c-multi-instantiate don't have their device struct pointing to
387 	 * the correct fwnode, so acpi_dev must be used here.
388 	 * And devm functions expect that the device requesting the resource has the correct
389 	 * fwnode.
390 	 */
391 	if (strncmp(hid, "CLSA0100", 8) != 0)
392 		return -EINVAL;
393 
394 	/* check I2C address to assign the index */
395 	cs35l41->index = id == 0x40 ? 0 : 1;
396 	cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH);
397 	cs35l41->hw_cfg.vspk_always_on = true;
398 	cs35l41->hw_cfg.valid = true;
399 	put_device(physdev);
400 
401 	return 0;
402 }
403 
404 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq,
405 		      struct regmap *regmap)
406 {
407 	unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status;
408 	struct cs35l41_hda *cs35l41;
409 	int ret;
410 
411 	if (IS_ERR(regmap))
412 		return PTR_ERR(regmap);
413 
414 	cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL);
415 	if (!cs35l41)
416 		return -ENOMEM;
417 
418 	cs35l41->dev = dev;
419 	cs35l41->irq = irq;
420 	cs35l41->regmap = regmap;
421 	dev_set_drvdata(dev, cs35l41);
422 
423 	ret = cs35l41_hda_read_acpi(cs35l41, device_name, id);
424 	if (ret) {
425 		dev_err_probe(cs35l41->dev, ret, "Platform not supported %d\n", ret);
426 		return ret;
427 	}
428 
429 	if (IS_ERR(cs35l41->reset_gpio)) {
430 		ret = PTR_ERR(cs35l41->reset_gpio);
431 		cs35l41->reset_gpio = NULL;
432 		if (ret == -EBUSY) {
433 			dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n");
434 		} else {
435 			dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO: %d\n", ret);
436 			goto err;
437 		}
438 	}
439 	if (cs35l41->reset_gpio) {
440 		usleep_range(2000, 2100);
441 		gpiod_set_value_cansleep(cs35l41->reset_gpio, 1);
442 	}
443 
444 	usleep_range(2000, 2100);
445 
446 	ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status,
447 				       int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000);
448 	if (ret) {
449 		dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret);
450 		goto err;
451 	}
452 
453 	ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts);
454 	if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) {
455 		dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n",
456 			int_sts & CS35L41_OTP_BOOT_ERR, ret);
457 		ret = -EIO;
458 		goto err;
459 	}
460 
461 	ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, &regid);
462 	if (ret) {
463 		dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret);
464 		goto err;
465 	}
466 
467 	ret = regmap_read(cs35l41->regmap, CS35L41_REVID, &reg_revid);
468 	if (ret) {
469 		dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret);
470 		goto err;
471 	}
472 
473 	mtl_revid = reg_revid & CS35L41_MTLREVID_MASK;
474 
475 	chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID;
476 	if (regid != chipid) {
477 		dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid);
478 		ret = -ENODEV;
479 		goto err;
480 	}
481 
482 	ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap);
483 	if (ret)
484 		goto err;
485 
486 	ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid);
487 	if (ret)
488 		goto err;
489 
490 	ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap);
491 	if (ret) {
492 		dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret);
493 		goto err;
494 	}
495 
496 	ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap);
497 	if (ret)
498 		goto err;
499 
500 	ret = cs35l41_hda_apply_properties(cs35l41);
501 	if (ret)
502 		goto err;
503 
504 	if (cs35l41->reg_seq->probe) {
505 		ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41->reg_seq->probe,
506 					     cs35l41->reg_seq->num_probe);
507 		if (ret) {
508 			dev_err(cs35l41->dev, "Fail to apply probe reg patch: %d\n", ret);
509 			goto err;
510 		}
511 	}
512 
513 	ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops);
514 	if (ret) {
515 		dev_err(cs35l41->dev, "Register component failed: %d\n", ret);
516 		goto err;
517 	}
518 
519 	dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid);
520 
521 	return 0;
522 
523 err:
524 	if (!cs35l41->hw_cfg.vspk_always_on)
525 		gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
526 	gpiod_put(cs35l41->reset_gpio);
527 
528 	return ret;
529 }
530 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41);
531 
532 void cs35l41_hda_remove(struct device *dev)
533 {
534 	struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev);
535 
536 	component_del(cs35l41->dev, &cs35l41_hda_comp_ops);
537 
538 	if (!cs35l41->hw_cfg.vspk_always_on)
539 		gpiod_set_value_cansleep(cs35l41->reset_gpio, 0);
540 	gpiod_put(cs35l41->reset_gpio);
541 }
542 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41);
543 
544 MODULE_DESCRIPTION("CS35L41 HDA Driver");
545 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>");
546 MODULE_LICENSE("GPL");
547