1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // CS35l41 ALSA HDA audio driver 4 // 5 // Copyright 2021 Cirrus Logic, Inc. 6 // 7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com> 8 9 #include <linux/acpi.h> 10 #include <linux/module.h> 11 #include <sound/hda_codec.h> 12 #include "hda_local.h" 13 #include "hda_auto_parser.h" 14 #include "hda_jack.h" 15 #include "hda_generic.h" 16 #include "hda_component.h" 17 #include "cs35l41_hda.h" 18 19 static const struct reg_sequence cs35l41_hda_config[] = { 20 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3200000Hz, BCLK Input, PLL_REFCLK_EN = 1 21 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 22 { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 23 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 24 { CS35L41_SP_FORMAT, 0x20200200 }, // 24 bits, I2S, BCLK Slave, FSYNC Slave 25 { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 26 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB 27 { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB 28 { CS35L41_PWR_CTRL2, 0x00000001 }, // AMP_EN = 1 29 }; 30 31 static const struct reg_sequence cs35l41_hda_start_bst[] = { 32 { CS35L41_PWR_CTRL2, 0x00000021 }, // BST_EN = 10, AMP_EN = 1 33 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 34 }; 35 36 static const struct reg_sequence cs35l41_hda_stop_bst[] = { 37 { CS35L41_PWR_CTRL1, 0x00000000, 3000}, // set GLOBAL_EN = 0 38 }; 39 40 // only on amps where GPIO1 is used to control ext. VSPK switch 41 static const struct reg_sequence cs35l41_start_ext_vspk[] = { 42 { 0x00000040, 0x00000055 }, 43 { 0x00000040, 0x000000AA }, 44 { 0x00007438, 0x00585941 }, 45 { 0x00007414, 0x08C82222 }, 46 { 0x0000742C, 0x00000009 }, 47 { 0x00011008, 0x00008001 }, 48 { 0x0000742C, 0x0000000F }, 49 { 0x0000742C, 0x00000079 }, 50 { 0x00007438, 0x00585941 }, 51 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 52 { 0x0000742C, 0x000000F9 }, 53 { 0x00007438, 0x00580941 }, 54 { 0x00000040, 0x000000CC }, 55 { 0x00000040, 0x00000033 }, 56 }; 57 58 //only on amps where GPIO1 is used to control ext. VSPK switch 59 static const struct reg_sequence cs35l41_stop_ext_vspk[] = { 60 { 0x00000040, 0x00000055 }, 61 { 0x00000040, 0x000000AA }, 62 { 0x00007438, 0x00585941 }, 63 { 0x00002014, 0x00000000, 3000}, // set GLOBAL_EN = 0 64 { 0x0000742C, 0x00000009 }, 65 { 0x00007438, 0x00580941 }, 66 { 0x00011008, 0x00000001 }, 67 { 0x0000393C, 0x000000C0, 6000}, 68 { 0x0000393C, 0x00000000 }, 69 { 0x00007414, 0x00C82222 }, 70 { 0x0000742C, 0x00000000 }, 71 { 0x00000040, 0x000000CC }, 72 { 0x00000040, 0x00000033 }, 73 }; 74 75 static const struct reg_sequence cs35l41_safe_to_active[] = { 76 { 0x00000040, 0x00000055 }, 77 { 0x00000040, 0x000000AA }, 78 { 0x0000742C, 0x0000000F }, 79 { 0x0000742C, 0x00000079 }, 80 { 0x00007438, 0x00585941 }, 81 { CS35L41_PWR_CTRL1, 0x00000001, 2000 }, // GLOBAL_EN = 1 82 { 0x0000742C, 0x000000F9 }, 83 { 0x00007438, 0x00580941 }, 84 { 0x00000040, 0x000000CC }, 85 { 0x00000040, 0x00000033 }, 86 }; 87 88 static const struct reg_sequence cs35l41_active_to_safe[] = { 89 { 0x00000040, 0x00000055 }, 90 { 0x00000040, 0x000000AA }, 91 { 0x00007438, 0x00585941 }, 92 { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_VOL_PCM Mute 93 { CS35L41_PWR_CTRL2, 0x00000000 }, // AMP_EN = 0 94 { CS35L41_PWR_CTRL1, 0x00000000 }, 95 { 0x0000742C, 0x00000009, 2000 }, 96 { 0x00007438, 0x00580941 }, 97 { 0x00000040, 0x000000CC }, 98 { 0x00000040, 0x00000033 }, 99 }; 100 101 static const struct reg_sequence cs35l41_reset_to_safe[] = { 102 { 0x00000040, 0x00000055 }, 103 { 0x00000040, 0x000000AA }, 104 { 0x00007438, 0x00585941 }, 105 { 0x00007414, 0x08C82222 }, 106 { 0x0000742C, 0x00000009 }, 107 { 0x00000040, 0x000000CC }, 108 { 0x00000040, 0x00000033 }, 109 }; 110 111 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_no_bst = { 112 .probe = cs35l41_reset_to_safe, 113 .num_probe = ARRAY_SIZE(cs35l41_reset_to_safe), 114 .open = cs35l41_hda_config, 115 .num_open = ARRAY_SIZE(cs35l41_hda_config), 116 .prepare = cs35l41_safe_to_active, 117 .num_prepare = ARRAY_SIZE(cs35l41_safe_to_active), 118 .cleanup = cs35l41_active_to_safe, 119 .num_cleanup = ARRAY_SIZE(cs35l41_active_to_safe), 120 }; 121 122 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_ext_bst = { 123 .open = cs35l41_hda_config, 124 .num_open = ARRAY_SIZE(cs35l41_hda_config), 125 .prepare = cs35l41_start_ext_vspk, 126 .num_prepare = ARRAY_SIZE(cs35l41_start_ext_vspk), 127 .cleanup = cs35l41_stop_ext_vspk, 128 .num_cleanup = ARRAY_SIZE(cs35l41_stop_ext_vspk), 129 }; 130 131 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_int_bst = { 132 .open = cs35l41_hda_config, 133 .num_open = ARRAY_SIZE(cs35l41_hda_config), 134 .prepare = cs35l41_hda_start_bst, 135 .num_prepare = ARRAY_SIZE(cs35l41_hda_start_bst), 136 .cleanup = cs35l41_hda_stop_bst, 137 .num_cleanup = ARRAY_SIZE(cs35l41_hda_stop_bst), 138 }; 139 140 static void cs35l41_hda_playback_hook(struct device *dev, int action) 141 { 142 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 143 const struct cs35l41_hda_reg_sequence *reg_seq = cs35l41->reg_seq; 144 struct regmap *reg = cs35l41->regmap; 145 int ret = 0; 146 147 switch (action) { 148 case HDA_GEN_PCM_ACT_OPEN: 149 if (reg_seq->open) 150 ret = regmap_multi_reg_write(reg, reg_seq->open, reg_seq->num_open); 151 break; 152 case HDA_GEN_PCM_ACT_PREPARE: 153 if (reg_seq->prepare) 154 ret = regmap_multi_reg_write(reg, reg_seq->prepare, reg_seq->num_prepare); 155 break; 156 case HDA_GEN_PCM_ACT_CLEANUP: 157 if (reg_seq->cleanup) 158 ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup); 159 break; 160 case HDA_GEN_PCM_ACT_CLOSE: 161 if (reg_seq->close) 162 ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close); 163 break; 164 default: 165 ret = -EINVAL; 166 break; 167 } 168 169 if (ret) 170 dev_warn(cs35l41->dev, "Failed to apply multi reg write: %d\n", ret); 171 } 172 173 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot, 174 unsigned int rx_num, unsigned int *rx_slot) 175 { 176 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 177 178 return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num, 179 rx_slot); 180 } 181 182 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data) 183 { 184 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 185 struct hda_component *comps = master_data; 186 187 if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS) 188 return -EINVAL; 189 190 comps = &comps[cs35l41->index]; 191 if (comps->dev) 192 return -EBUSY; 193 194 comps->dev = dev; 195 strscpy(comps->name, dev_name(dev), sizeof(comps->name)); 196 comps->playback_hook = cs35l41_hda_playback_hook; 197 comps->set_channel_map = cs35l41_hda_channel_map; 198 199 return 0; 200 } 201 202 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data) 203 { 204 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 205 struct hda_component *comps = master_data; 206 207 if (comps[cs35l41->index].dev == dev) 208 memset(&comps[cs35l41->index], 0, sizeof(*comps)); 209 } 210 211 static const struct component_ops cs35l41_hda_comp_ops = { 212 .bind = cs35l41_hda_bind, 213 .unbind = cs35l41_hda_unbind, 214 }; 215 216 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) 217 { 218 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 219 bool internal_boost = false; 220 int ret; 221 222 if (hw_cfg->vspk_always_on) { 223 cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; 224 return 0; 225 } 226 227 if (hw_cfg->bst_ind || hw_cfg->bst_cap || hw_cfg->bst_ipk) 228 internal_boost = true; 229 230 switch (hw_cfg->gpio1.func) { 231 case CS35L41_NOT_USED: 232 break; 233 case CS35l41_VSPK_SWITCH: 234 regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, 235 CS35L41_GPIO1_CTRL_MASK, 1 << CS35L41_GPIO1_CTRL_SHIFT); 236 break; 237 case CS35l41_SYNC: 238 regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, 239 CS35L41_GPIO1_CTRL_MASK, 2 << CS35L41_GPIO1_CTRL_SHIFT); 240 break; 241 default: 242 dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", hw_cfg->gpio1.func); 243 return -EINVAL; 244 } 245 246 switch (hw_cfg->gpio2.func) { 247 case CS35L41_NOT_USED: 248 break; 249 case CS35L41_INTERRUPT: 250 regmap_update_bits(cs35l41->regmap, CS35L41_GPIO_PAD_CONTROL, 251 CS35L41_GPIO2_CTRL_MASK, 2 << CS35L41_GPIO2_CTRL_SHIFT); 252 break; 253 default: 254 dev_err(cs35l41->dev, "Invalid function %d for GPIO2\n", hw_cfg->gpio2.func); 255 return -EINVAL; 256 } 257 258 if (internal_boost) { 259 cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; 260 if (!(hw_cfg->bst_ind && hw_cfg->bst_cap && hw_cfg->bst_ipk)) 261 return -EINVAL; 262 ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, 263 hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); 264 if (ret) 265 return ret; 266 } else { 267 cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; 268 } 269 270 return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); 271 } 272 273 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id) 274 { 275 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 276 u32 values[HDA_MAX_COMPONENTS]; 277 struct acpi_device *adev; 278 struct device *physdev; 279 char *property; 280 size_t nval; 281 int i, ret; 282 283 adev = acpi_dev_get_first_match_dev(hid, NULL, -1); 284 if (!adev) { 285 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid); 286 return -ENODEV; 287 } 288 289 physdev = get_device(acpi_get_first_physical_node(adev)); 290 acpi_dev_put(adev); 291 292 property = "cirrus,dev-index"; 293 ret = device_property_count_u32(physdev, property); 294 if (ret <= 0) 295 goto no_acpi_dsd; 296 297 if (ret > ARRAY_SIZE(values)) { 298 ret = -EINVAL; 299 goto err; 300 } 301 nval = ret; 302 303 ret = device_property_read_u32_array(physdev, property, values, nval); 304 if (ret) 305 goto err; 306 307 cs35l41->index = -1; 308 for (i = 0; i < nval; i++) { 309 if (values[i] == id) { 310 cs35l41->index = i; 311 break; 312 } 313 } 314 if (cs35l41->index == -1) { 315 dev_err(cs35l41->dev, "No index found in %s\n", property); 316 ret = -ENODEV; 317 goto err; 318 } 319 320 /* To use the same release code for all laptop variants we can't use devm_ version of 321 * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node 322 */ 323 cs35l41->reset_gpio = fwnode_gpiod_get_index(&adev->fwnode, "reset", cs35l41->index, 324 GPIOD_OUT_LOW, "cs35l41-reset"); 325 326 property = "cirrus,speaker-position"; 327 ret = device_property_read_u32_array(physdev, property, values, nval); 328 if (ret) 329 goto err; 330 hw_cfg->spk_pos = values[cs35l41->index]; 331 332 property = "cirrus,gpio1-func"; 333 ret = device_property_read_u32_array(physdev, property, values, nval); 334 if (ret) 335 goto err; 336 hw_cfg->gpio1.func = values[cs35l41->index]; 337 338 property = "cirrus,gpio2-func"; 339 ret = device_property_read_u32_array(physdev, property, values, nval); 340 if (ret) 341 goto err; 342 hw_cfg->gpio2.func = values[cs35l41->index]; 343 344 property = "cirrus,boost-peak-milliamp"; 345 ret = device_property_read_u32_array(physdev, property, values, nval); 346 if (ret == 0) 347 hw_cfg->bst_ipk = values[cs35l41->index]; 348 349 property = "cirrus,boost-ind-nanohenry"; 350 ret = device_property_read_u32_array(physdev, property, values, nval); 351 if (ret == 0) 352 hw_cfg->bst_ind = values[cs35l41->index]; 353 354 property = "cirrus,boost-cap-microfarad"; 355 ret = device_property_read_u32_array(physdev, property, values, nval); 356 if (ret == 0) 357 hw_cfg->bst_cap = values[cs35l41->index]; 358 359 put_device(physdev); 360 361 return 0; 362 363 err: 364 put_device(physdev); 365 dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret); 366 367 return ret; 368 369 no_acpi_dsd: 370 /* 371 * Device CLSA0100 doesn't have _DSD so a gpiod_get by the label reset won't work. 372 * And devices created by i2c-multi-instantiate don't have their device struct pointing to 373 * the correct fwnode, so acpi_dev must be used here. 374 * And devm functions expect that the device requesting the resource has the correct 375 * fwnode. 376 */ 377 if (strncmp(hid, "CLSA0100", 8) != 0) 378 return -EINVAL; 379 380 /* check I2C address to assign the index */ 381 cs35l41->index = id == 0x40 ? 0 : 1; 382 cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); 383 cs35l41->hw_cfg.vspk_always_on = true; 384 put_device(physdev); 385 386 return 0; 387 } 388 389 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq, 390 struct regmap *regmap) 391 { 392 unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status; 393 struct cs35l41_hda *cs35l41; 394 int ret; 395 396 if (IS_ERR(regmap)) 397 return PTR_ERR(regmap); 398 399 cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL); 400 if (!cs35l41) 401 return -ENOMEM; 402 403 cs35l41->dev = dev; 404 cs35l41->irq = irq; 405 cs35l41->regmap = regmap; 406 dev_set_drvdata(dev, cs35l41); 407 408 ret = cs35l41_hda_read_acpi(cs35l41, device_name, id); 409 if (ret) { 410 dev_err_probe(cs35l41->dev, ret, "Platform not supported %d\n", ret); 411 return ret; 412 } 413 414 if (IS_ERR(cs35l41->reset_gpio)) { 415 ret = PTR_ERR(cs35l41->reset_gpio); 416 cs35l41->reset_gpio = NULL; 417 if (ret == -EBUSY) { 418 dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n"); 419 } else { 420 dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO: %d\n", ret); 421 goto err; 422 } 423 } 424 if (cs35l41->reset_gpio) { 425 usleep_range(2000, 2100); 426 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 427 } 428 429 usleep_range(2000, 2100); 430 431 ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status, 432 int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000); 433 if (ret) { 434 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret); 435 goto err; 436 } 437 438 ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts); 439 if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) { 440 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n", 441 int_sts & CS35L41_OTP_BOOT_ERR, ret); 442 ret = -EIO; 443 goto err; 444 } 445 446 ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id); 447 if (ret) { 448 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret); 449 goto err; 450 } 451 452 ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid); 453 if (ret) { 454 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret); 455 goto err; 456 } 457 458 mtl_revid = reg_revid & CS35L41_MTLREVID_MASK; 459 460 chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID; 461 if (regid != chipid) { 462 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid); 463 ret = -ENODEV; 464 goto err; 465 } 466 467 ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 468 if (ret) 469 goto err; 470 471 ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid); 472 if (ret) 473 goto err; 474 475 ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap); 476 if (ret) { 477 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret); 478 goto err; 479 } 480 481 ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 482 if (ret) 483 goto err; 484 485 ret = cs35l41_hda_apply_properties(cs35l41); 486 if (ret) 487 goto err; 488 489 if (cs35l41->reg_seq->probe) { 490 ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41->reg_seq->probe, 491 cs35l41->reg_seq->num_probe); 492 if (ret) { 493 dev_err(cs35l41->dev, "Fail to apply probe reg patch: %d\n", ret); 494 goto err; 495 } 496 } 497 498 ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops); 499 if (ret) { 500 dev_err(cs35l41->dev, "Register component failed: %d\n", ret); 501 goto err; 502 } 503 504 dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid); 505 506 return 0; 507 508 err: 509 if (!cs35l41->hw_cfg.vspk_always_on) 510 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 511 gpiod_put(cs35l41->reset_gpio); 512 513 return ret; 514 } 515 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41); 516 517 void cs35l41_hda_remove(struct device *dev) 518 { 519 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 520 521 component_del(cs35l41->dev, &cs35l41_hda_comp_ops); 522 523 if (!cs35l41->hw_cfg.vspk_always_on) 524 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 525 gpiod_put(cs35l41->reset_gpio); 526 } 527 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41); 528 529 MODULE_DESCRIPTION("CS35L41 HDA Driver"); 530 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>"); 531 MODULE_LICENSE("GPL"); 532