1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // CS35l41 ALSA HDA audio driver 4 // 5 // Copyright 2021 Cirrus Logic, Inc. 6 // 7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com> 8 9 #include <linux/acpi.h> 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <sound/hda_codec.h> 13 #include <sound/soc.h> 14 #include <linux/pm_runtime.h> 15 #include "hda_local.h" 16 #include "hda_auto_parser.h" 17 #include "hda_jack.h" 18 #include "hda_generic.h" 19 #include "hda_component.h" 20 #include "cs35l41_hda.h" 21 #include "hda_cs_dsp_ctl.h" 22 23 #define CS35L41_FIRMWARE_ROOT "cirrus/" 24 #define CS35L41_PART "cs35l41" 25 26 #define HALO_STATE_DSP_CTL_NAME "HALO_STATE" 27 #define HALO_STATE_DSP_CTL_TYPE 5 28 #define HALO_STATE_DSP_CTL_ALG 262308 29 #define CAL_R_DSP_CTL_NAME "CAL_R" 30 #define CAL_STATUS_DSP_CTL_NAME "CAL_STATUS" 31 #define CAL_CHECKSUM_DSP_CTL_NAME "CAL_CHECKSUM" 32 #define CAL_AMBIENT_DSP_CTL_NAME "CAL_AMBIENT" 33 #define CAL_DSP_CTL_TYPE 5 34 #define CAL_DSP_CTL_ALG 205 35 36 static bool firmware_autostart = 1; 37 module_param(firmware_autostart, bool, 0444); 38 MODULE_PARM_DESC(firmware_autostart, "Allow automatic firmware download on boot" 39 "(0=Disable, 1=Enable) (default=1); "); 40 41 static const struct reg_sequence cs35l41_hda_config[] = { 42 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 43 { CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN 44 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 45 { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 46 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 47 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 48 { CS35L41_SP_HIZ_CTRL, 0x00000002 }, // Hi-Z unused 49 { CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot 50 { CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot 51 { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 52 { CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON 53 { CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON 54 { CS35L41_ASP_TX3_SRC, 0x00000032 }, // ASPTX3 SRC = ERRVOL 55 { CS35L41_ASP_TX4_SRC, 0x00000033 }, // ASPTX4 SRC = CLASSH_TGT 56 { CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1 57 { CS35L41_DSP1_RX2_SRC, 0x00000009 }, // DSP1RX2 SRC = ASPRX2 58 { CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON 59 { CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON 60 { CS35L41_DSP1_RX5_SRC, 0x00000020 }, // DSP1RX5 SRC = ERRVOL 61 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB 62 { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB 63 }; 64 65 static const struct reg_sequence cs35l41_hda_config_dsp[] = { 66 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 67 { CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN 68 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 69 { CS35L41_SP_ENABLES, 0x00010001 }, // ASP_RX1_EN = 1, ASP_TX1_EN = 1 70 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 71 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 72 { CS35L41_SP_HIZ_CTRL, 0x00000003 }, // Hi-Z unused/disabled 73 { CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot 74 { CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot 75 { CS35L41_DAC_PCM1_SRC, 0x00000032 }, // DACPCM1_SRC = ERR_VOL 76 { CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON 77 { CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON 78 { CS35L41_ASP_TX3_SRC, 0x00000028 }, // ASPTX3 SRC = VPMON 79 { CS35L41_ASP_TX4_SRC, 0x00000029 }, // ASPTX4 SRC = VBSTMON 80 { CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1 81 { CS35L41_DSP1_RX2_SRC, 0x00000008 }, // DSP1RX2 SRC = ASPRX1 82 { CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON 83 { CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON 84 { CS35L41_DSP1_RX5_SRC, 0x00000029 }, // DSP1RX5 SRC = VBSTMON 85 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB 86 { CS35L41_AMP_GAIN_CTRL, 0x00000233 }, // AMP_GAIN_PCM = 17.5dB AMP_GAIN_PDM = 19.5dB 87 }; 88 89 static const struct reg_sequence cs35l41_hda_mute[] = { 90 { CS35L41_AMP_GAIN_CTRL, 0x00000000 }, // AMP_GAIN_PCM 0.5 dB 91 { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM Mute 92 }; 93 94 static void cs35l41_add_controls(struct cs35l41_hda *cs35l41) 95 { 96 struct hda_cs_dsp_ctl_info info; 97 98 info.device_name = cs35l41->amp_name; 99 info.fw_type = cs35l41->firmware_type; 100 info.card = cs35l41->codec->card; 101 102 hda_cs_dsp_add_controls(&cs35l41->cs_dsp, &info); 103 } 104 105 static const struct cs_dsp_client_ops client_ops = { 106 .control_remove = hda_cs_dsp_control_remove, 107 }; 108 109 static int cs35l41_request_firmware_file(struct cs35l41_hda *cs35l41, 110 const struct firmware **firmware, char **filename, 111 const char *dir, const char *ssid, const char *amp_name, 112 int spkid, const char *filetype) 113 { 114 const char * const dsp_name = cs35l41->cs_dsp.name; 115 char *s, c; 116 int ret = 0; 117 118 if (spkid > -1 && ssid && amp_name) 119 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d-%s.%s", dir, CS35L41_PART, 120 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 121 ssid, spkid, amp_name, filetype); 122 else if (spkid > -1 && ssid) 123 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d.%s", dir, CS35L41_PART, 124 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 125 ssid, spkid, filetype); 126 else if (ssid && amp_name) 127 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, CS35L41_PART, 128 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 129 ssid, amp_name, filetype); 130 else if (ssid) 131 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, CS35L41_PART, 132 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 133 ssid, filetype); 134 else 135 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, CS35L41_PART, 136 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 137 filetype); 138 139 if (*filename == NULL) 140 return -ENOMEM; 141 142 /* 143 * Make sure that filename is lower-case and any non alpha-numeric 144 * characters except full stop and '/' are replaced with hyphens. 145 */ 146 s = *filename; 147 while (*s) { 148 c = *s; 149 if (isalnum(c)) 150 *s = tolower(c); 151 else if (c != '.' && c != '/') 152 *s = '-'; 153 s++; 154 } 155 156 ret = firmware_request_nowarn(firmware, *filename, cs35l41->dev); 157 if (ret != 0) { 158 dev_dbg(cs35l41->dev, "Failed to request '%s'\n", *filename); 159 kfree(*filename); 160 *filename = NULL; 161 } 162 163 return ret; 164 } 165 166 static int cs35l41_request_firmware_files_spkid(struct cs35l41_hda *cs35l41, 167 const struct firmware **wmfw_firmware, 168 char **wmfw_filename, 169 const struct firmware **coeff_firmware, 170 char **coeff_filename) 171 { 172 int ret; 173 174 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.wmfw */ 175 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 176 CS35L41_FIRMWARE_ROOT, 177 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 178 cs35l41->speaker_id, "wmfw"); 179 if (!ret) { 180 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 181 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 182 CS35L41_FIRMWARE_ROOT, 183 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 184 cs35l41->speaker_id, "bin"); 185 } 186 187 /* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */ 188 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 189 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 190 cs35l41->amp_name, -1, "wmfw"); 191 if (!ret) { 192 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 193 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 194 CS35L41_FIRMWARE_ROOT, 195 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 196 cs35l41->speaker_id, "bin"); 197 } 198 199 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.wmfw */ 200 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 201 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 202 NULL, cs35l41->speaker_id, "wmfw"); 203 if (!ret) { 204 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 205 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 206 CS35L41_FIRMWARE_ROOT, 207 cs35l41->acpi_subsystem_id, 208 cs35l41->amp_name, cs35l41->speaker_id, "bin"); 209 if (ret) 210 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */ 211 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, 212 coeff_filename, CS35L41_FIRMWARE_ROOT, 213 cs35l41->acpi_subsystem_id, NULL, 214 cs35l41->speaker_id, "bin"); 215 } 216 217 /* try cirrus/part-dspN-fwtype-sub.wmfw */ 218 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 219 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 220 NULL, -1, "wmfw"); 221 if (!ret) { 222 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 223 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 224 CS35L41_FIRMWARE_ROOT, 225 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 226 cs35l41->speaker_id, "bin"); 227 if (ret) 228 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */ 229 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, 230 coeff_filename, CS35L41_FIRMWARE_ROOT, 231 cs35l41->acpi_subsystem_id, NULL, 232 cs35l41->speaker_id, "bin"); 233 } 234 235 return ret; 236 } 237 238 static int cs35l41_request_firmware_files(struct cs35l41_hda *cs35l41, 239 const struct firmware **wmfw_firmware, 240 char **wmfw_filename, 241 const struct firmware **coeff_firmware, 242 char **coeff_filename) 243 { 244 int ret; 245 246 if (cs35l41->speaker_id > -1) { 247 ret = cs35l41_request_firmware_files_spkid(cs35l41, wmfw_firmware, wmfw_filename, 248 coeff_firmware, coeff_filename); 249 goto out; 250 251 } 252 253 /* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */ 254 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 255 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 256 cs35l41->amp_name, -1, "wmfw"); 257 if (!ret) { 258 /* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */ 259 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 260 CS35L41_FIRMWARE_ROOT, 261 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 262 -1, "bin"); 263 goto out; 264 } 265 266 /* try cirrus/part-dspN-fwtype-sub.wmfw */ 267 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 268 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 269 NULL, -1, "wmfw"); 270 if (!ret) { 271 /* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */ 272 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 273 CS35L41_FIRMWARE_ROOT, 274 cs35l41->acpi_subsystem_id, 275 cs35l41->amp_name, -1, "bin"); 276 if (ret) 277 /* try cirrus/part-dspN-fwtype-sub.bin */ 278 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 279 CS35L41_FIRMWARE_ROOT, 280 cs35l41->acpi_subsystem_id, NULL, -1, 281 "bin"); 282 } 283 284 out: 285 if (!ret) 286 return 0; 287 288 /* Handle fallback */ 289 dev_warn(cs35l41->dev, "Falling back to default firmware.\n"); 290 291 release_firmware(*wmfw_firmware); 292 kfree(*wmfw_filename); 293 294 /* fallback try cirrus/part-dspN-fwtype.wmfw */ 295 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 296 CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "wmfw"); 297 if (!ret) 298 /* fallback try cirrus/part-dspN-fwtype.bin */ 299 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 300 CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "bin"); 301 302 if (ret) { 303 release_firmware(*wmfw_firmware); 304 kfree(*wmfw_filename); 305 dev_warn(cs35l41->dev, "Unable to find firmware and tuning\n"); 306 } 307 return ret; 308 } 309 310 #if IS_ENABLED(CONFIG_EFI) 311 static int cs35l41_apply_calibration(struct cs35l41_hda *cs35l41, __be32 ambient, __be32 r0, 312 __be32 status, __be32 checksum) 313 { 314 int ret; 315 316 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_AMBIENT_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 317 CAL_DSP_CTL_ALG, &ambient, 4); 318 if (ret) { 319 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_AMBIENT_DSP_CTL_NAME, 320 ret); 321 return ret; 322 } 323 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_R_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 324 CAL_DSP_CTL_ALG, &r0, 4); 325 if (ret) { 326 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_R_DSP_CTL_NAME, ret); 327 return ret; 328 } 329 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_STATUS_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 330 CAL_DSP_CTL_ALG, &status, 4); 331 if (ret) { 332 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_STATUS_DSP_CTL_NAME, 333 ret); 334 return ret; 335 } 336 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_CHECKSUM_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 337 CAL_DSP_CTL_ALG, &checksum, 4); 338 if (ret) { 339 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_CHECKSUM_DSP_CTL_NAME, 340 ret); 341 return ret; 342 } 343 344 return 0; 345 } 346 347 static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41) 348 { 349 static efi_guid_t efi_guid = EFI_GUID(0x02f9af02, 0x7734, 0x4233, 0xb4, 0x3d, 0x93, 0xfe, 350 0x5a, 0xa3, 0x5d, 0xb3); 351 static efi_char16_t efi_name[] = L"CirrusSmartAmpCalibrationData"; 352 const struct cs35l41_amp_efi_data *efi_data; 353 const struct cs35l41_amp_cal_data *cl; 354 unsigned long data_size = 0; 355 efi_status_t status; 356 int ret = 0; 357 u8 *data = NULL; 358 u32 attr; 359 360 /* Get real size of UEFI variable */ 361 status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data); 362 if (status == EFI_BUFFER_TOO_SMALL) { 363 ret = -ENODEV; 364 /* Allocate data buffer of data_size bytes */ 365 data = vmalloc(data_size); 366 if (!data) 367 return -ENOMEM; 368 /* Get variable contents into buffer */ 369 status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data); 370 if (status == EFI_SUCCESS) { 371 efi_data = (struct cs35l41_amp_efi_data *)data; 372 dev_dbg(cs35l41->dev, "Calibration: Size=%d, Amp Count=%d\n", 373 efi_data->size, efi_data->count); 374 if (efi_data->count > cs35l41->index) { 375 cl = &efi_data->data[cs35l41->index]; 376 dev_dbg(cs35l41->dev, 377 "Calibration: Ambient=%02x, Status=%02x, R0=%d\n", 378 cl->calAmbient, cl->calStatus, cl->calR); 379 380 /* Calibration can only be applied whilst the DSP is not running */ 381 ret = cs35l41_apply_calibration(cs35l41, 382 cpu_to_be32(cl->calAmbient), 383 cpu_to_be32(cl->calR), 384 cpu_to_be32(cl->calStatus), 385 cpu_to_be32(cl->calR + 1)); 386 } 387 } 388 vfree(data); 389 } 390 return ret; 391 } 392 #else 393 static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41) 394 { 395 dev_warn(cs35l41->dev, "Calibration not supported without EFI support.\n"); 396 return 0; 397 } 398 #endif 399 400 static int cs35l41_init_dsp(struct cs35l41_hda *cs35l41) 401 { 402 const struct firmware *coeff_firmware = NULL; 403 const struct firmware *wmfw_firmware = NULL; 404 struct cs_dsp *dsp = &cs35l41->cs_dsp; 405 char *coeff_filename = NULL; 406 char *wmfw_filename = NULL; 407 int ret; 408 409 if (!cs35l41->halo_initialized) { 410 cs35l41_configure_cs_dsp(cs35l41->dev, cs35l41->regmap, dsp); 411 dsp->client_ops = &client_ops; 412 413 ret = cs_dsp_halo_init(&cs35l41->cs_dsp); 414 if (ret) 415 return ret; 416 cs35l41->halo_initialized = true; 417 } 418 419 ret = cs35l41_request_firmware_files(cs35l41, &wmfw_firmware, &wmfw_filename, 420 &coeff_firmware, &coeff_filename); 421 if (ret < 0) 422 return ret; 423 424 dev_dbg(cs35l41->dev, "Loading WMFW Firmware: %s\n", wmfw_filename); 425 if (coeff_filename) 426 dev_dbg(cs35l41->dev, "Loading Coefficient File: %s\n", coeff_filename); 427 else 428 dev_warn(cs35l41->dev, "No Coefficient File available.\n"); 429 430 ret = cs_dsp_power_up(dsp, wmfw_firmware, wmfw_filename, coeff_firmware, coeff_filename, 431 hda_cs_dsp_fw_ids[cs35l41->firmware_type]); 432 if (ret) 433 goto err_release; 434 435 cs35l41_add_controls(cs35l41); 436 437 ret = cs35l41_save_calibration(cs35l41); 438 439 err_release: 440 release_firmware(wmfw_firmware); 441 release_firmware(coeff_firmware); 442 kfree(wmfw_filename); 443 kfree(coeff_filename); 444 445 return ret; 446 } 447 448 static void cs35l41_shutdown_dsp(struct cs35l41_hda *cs35l41) 449 { 450 struct cs_dsp *dsp = &cs35l41->cs_dsp; 451 452 cs_dsp_stop(dsp); 453 cs_dsp_power_down(dsp); 454 cs35l41->firmware_running = false; 455 dev_dbg(cs35l41->dev, "Unloaded Firmware\n"); 456 } 457 458 static void cs35l41_remove_dsp(struct cs35l41_hda *cs35l41) 459 { 460 struct cs_dsp *dsp = &cs35l41->cs_dsp; 461 462 cancel_work_sync(&cs35l41->fw_load_work); 463 464 mutex_lock(&cs35l41->fw_mutex); 465 cs35l41_shutdown_dsp(cs35l41); 466 cs_dsp_remove(dsp); 467 cs35l41->halo_initialized = false; 468 mutex_unlock(&cs35l41->fw_mutex); 469 } 470 471 /* Protection release cycle to get the speaker out of Safe-Mode */ 472 static void cs35l41_error_release(struct device *dev, struct regmap *regmap, unsigned int mask) 473 { 474 regmap_write(regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); 475 regmap_set_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask); 476 regmap_clear_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask); 477 } 478 479 /* Clear all errors to release safe mode. Global Enable must be cleared first. */ 480 static void cs35l41_irq_release(struct cs35l41_hda *cs35l41) 481 { 482 cs35l41_error_release(cs35l41->dev, cs35l41->regmap, cs35l41->irq_errors); 483 cs35l41->irq_errors = 0; 484 } 485 486 static void cs35l41_hda_playback_hook(struct device *dev, int action) 487 { 488 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 489 struct regmap *reg = cs35l41->regmap; 490 int ret = 0; 491 492 switch (action) { 493 case HDA_GEN_PCM_ACT_OPEN: 494 pm_runtime_get_sync(dev); 495 mutex_lock(&cs35l41->fw_mutex); 496 cs35l41->playback_started = true; 497 if (cs35l41->firmware_running) { 498 regmap_multi_reg_write(reg, cs35l41_hda_config_dsp, 499 ARRAY_SIZE(cs35l41_hda_config_dsp)); 500 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 501 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 502 1 << CS35L41_VMON_EN_SHIFT | 1 << CS35L41_IMON_EN_SHIFT); 503 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, 504 CSPL_MBOX_CMD_RESUME); 505 } else { 506 regmap_multi_reg_write(reg, cs35l41_hda_config, 507 ARRAY_SIZE(cs35l41_hda_config)); 508 } 509 ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, 510 CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); 511 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 512 regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001); 513 mutex_unlock(&cs35l41->fw_mutex); 514 break; 515 case HDA_GEN_PCM_ACT_PREPARE: 516 mutex_lock(&cs35l41->fw_mutex); 517 ret = cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 1, NULL, 518 cs35l41->firmware_running); 519 mutex_unlock(&cs35l41->fw_mutex); 520 break; 521 case HDA_GEN_PCM_ACT_CLEANUP: 522 mutex_lock(&cs35l41->fw_mutex); 523 regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); 524 ret = cs35l41_global_enable(dev, reg, cs35l41->hw_cfg.bst_type, 0, NULL, 525 cs35l41->firmware_running); 526 mutex_unlock(&cs35l41->fw_mutex); 527 break; 528 case HDA_GEN_PCM_ACT_CLOSE: 529 mutex_lock(&cs35l41->fw_mutex); 530 ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, 531 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 532 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 533 regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); 534 if (cs35l41->firmware_running) { 535 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, 536 CSPL_MBOX_CMD_PAUSE); 537 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 538 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 539 0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT); 540 } 541 cs35l41_irq_release(cs35l41); 542 cs35l41->playback_started = false; 543 mutex_unlock(&cs35l41->fw_mutex); 544 545 pm_runtime_mark_last_busy(dev); 546 pm_runtime_put_autosuspend(dev); 547 break; 548 default: 549 dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action); 550 break; 551 } 552 553 if (ret) 554 dev_err(cs35l41->dev, "Regmap access fail: %d\n", ret); 555 } 556 557 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot, 558 unsigned int rx_num, unsigned int *rx_slot) 559 { 560 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 561 static const char * const channel_name[] = { "L", "R" }; 562 563 if (!cs35l41->amp_name) { 564 if (*rx_slot >= ARRAY_SIZE(channel_name)) 565 return -EINVAL; 566 567 cs35l41->amp_name = devm_kasprintf(cs35l41->dev, GFP_KERNEL, "%s%d", 568 channel_name[*rx_slot], cs35l41->channel_index); 569 if (!cs35l41->amp_name) 570 return -ENOMEM; 571 } 572 573 return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num, 574 rx_slot); 575 } 576 577 static int cs35l41_ready_for_reset(struct cs35l41_hda *cs35l41) 578 { 579 int ret = 0; 580 581 mutex_lock(&cs35l41->fw_mutex); 582 if (cs35l41->firmware_running) { 583 584 regcache_cache_only(cs35l41->regmap, false); 585 586 ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); 587 if (ret) { 588 dev_warn(cs35l41->dev, "Unable to exit Hibernate."); 589 goto err; 590 } 591 592 /* Test key needs to be unlocked to allow the OTP settings to re-apply */ 593 cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 594 ret = regcache_sync(cs35l41->regmap); 595 cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 596 if (ret) { 597 dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret); 598 goto err; 599 } 600 601 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 602 cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg); 603 604 cs35l41_shutdown_dsp(cs35l41); 605 cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); 606 } 607 err: 608 regcache_cache_only(cs35l41->regmap, true); 609 regcache_mark_dirty(cs35l41->regmap); 610 611 mutex_unlock(&cs35l41->fw_mutex); 612 613 return ret; 614 } 615 616 static int cs35l41_system_suspend(struct device *dev) 617 { 618 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 619 int ret; 620 621 dev_dbg(cs35l41->dev, "System Suspend\n"); 622 623 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 624 dev_err_once(cs35l41->dev, "System Suspend not supported\n"); 625 return 0; /* don't block the whole system suspend */ 626 } 627 628 ret = pm_runtime_force_suspend(dev); 629 if (ret) { 630 dev_err(dev, "System Suspend Failed, unable to runtime suspend: %d\n", ret); 631 return ret; 632 } 633 634 /* Shutdown DSP before system suspend */ 635 ret = cs35l41_ready_for_reset(cs35l41); 636 637 if (ret) 638 dev_err(dev, "System Suspend Failed, not ready for Reset: %d\n", ret); 639 640 /* 641 * Reset GPIO may be shared, so cannot reset here. 642 * However beyond this point, amps may be powered down. 643 */ 644 return ret; 645 } 646 647 static int cs35l41_system_resume(struct device *dev) 648 { 649 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 650 int ret; 651 652 dev_dbg(cs35l41->dev, "System Resume\n"); 653 654 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 655 dev_err_once(cs35l41->dev, "System Resume not supported\n"); 656 return 0; /* don't block the whole system resume */ 657 } 658 659 if (cs35l41->reset_gpio) { 660 usleep_range(2000, 2100); 661 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 662 } 663 664 usleep_range(2000, 2100); 665 666 ret = pm_runtime_force_resume(dev); 667 if (ret) { 668 dev_err(dev, "System Resume Failed: Unable to runtime resume: %d\n", ret); 669 return ret; 670 } 671 672 mutex_lock(&cs35l41->fw_mutex); 673 if (cs35l41->request_fw_load && !cs35l41->fw_request_ongoing) { 674 cs35l41->fw_request_ongoing = true; 675 schedule_work(&cs35l41->fw_load_work); 676 } 677 mutex_unlock(&cs35l41->fw_mutex); 678 679 return ret; 680 } 681 682 static int cs35l41_runtime_idle(struct device *dev) 683 { 684 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 685 686 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) 687 return -EBUSY; /* suspend not supported yet on this model */ 688 return 0; 689 } 690 691 static int cs35l41_runtime_suspend(struct device *dev) 692 { 693 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 694 int ret = 0; 695 696 dev_dbg(cs35l41->dev, "Runtime Suspend\n"); 697 698 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 699 dev_dbg(cs35l41->dev, "Runtime Suspend not supported\n"); 700 return 0; 701 } 702 703 mutex_lock(&cs35l41->fw_mutex); 704 705 if (cs35l41->playback_started) { 706 regmap_multi_reg_write(cs35l41->regmap, cs35l41_hda_mute, 707 ARRAY_SIZE(cs35l41_hda_mute)); 708 cs35l41_global_enable(cs35l41->dev, cs35l41->regmap, cs35l41->hw_cfg.bst_type, 0, 709 NULL, cs35l41->firmware_running); 710 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 711 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 712 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 713 regmap_write(cs35l41->regmap, CS35L41_GPIO1_CTRL1, 0x00000001); 714 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 715 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 716 0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT); 717 cs35l41->playback_started = false; 718 } 719 720 if (cs35l41->firmware_running) { 721 ret = cs35l41_enter_hibernate(cs35l41->dev, cs35l41->regmap, 722 cs35l41->hw_cfg.bst_type); 723 if (ret) 724 goto err; 725 } else { 726 cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); 727 } 728 729 regcache_cache_only(cs35l41->regmap, true); 730 regcache_mark_dirty(cs35l41->regmap); 731 732 err: 733 mutex_unlock(&cs35l41->fw_mutex); 734 735 return ret; 736 } 737 738 static int cs35l41_runtime_resume(struct device *dev) 739 { 740 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 741 int ret = 0; 742 743 dev_dbg(cs35l41->dev, "Runtime Resume\n"); 744 745 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 746 dev_dbg(cs35l41->dev, "Runtime Resume not supported\n"); 747 return 0; 748 } 749 750 mutex_lock(&cs35l41->fw_mutex); 751 752 regcache_cache_only(cs35l41->regmap, false); 753 754 if (cs35l41->firmware_running) { 755 ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); 756 if (ret) { 757 dev_warn(cs35l41->dev, "Unable to exit Hibernate."); 758 goto err; 759 } 760 } 761 762 /* Test key needs to be unlocked to allow the OTP settings to re-apply */ 763 cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 764 ret = regcache_sync(cs35l41->regmap); 765 cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 766 if (ret) { 767 dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret); 768 goto err; 769 } 770 771 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 772 cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg); 773 774 err: 775 mutex_unlock(&cs35l41->fw_mutex); 776 777 return ret; 778 } 779 780 static int cs35l41_smart_amp(struct cs35l41_hda *cs35l41) 781 { 782 __be32 halo_sts; 783 int ret; 784 785 ret = cs35l41_init_dsp(cs35l41); 786 if (ret) { 787 dev_warn(cs35l41->dev, "Cannot Initialize Firmware. Error: %d\n", ret); 788 goto clean_dsp; 789 } 790 791 ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap); 792 if (ret) { 793 dev_err(cs35l41->dev, "Cannot Write FS Errata: %d\n", ret); 794 goto clean_dsp; 795 } 796 797 ret = cs_dsp_run(&cs35l41->cs_dsp); 798 if (ret) { 799 dev_err(cs35l41->dev, "Fail to start dsp: %d\n", ret); 800 goto clean_dsp; 801 } 802 803 ret = read_poll_timeout(hda_cs_dsp_read_ctl, ret, 804 be32_to_cpu(halo_sts) == HALO_STATE_CODE_RUN, 805 1000, 15000, false, &cs35l41->cs_dsp, HALO_STATE_DSP_CTL_NAME, 806 HALO_STATE_DSP_CTL_TYPE, HALO_STATE_DSP_CTL_ALG, 807 &halo_sts, sizeof(halo_sts)); 808 809 if (ret) { 810 dev_err(cs35l41->dev, "Timeout waiting for HALO Core to start. State: %u\n", 811 halo_sts); 812 goto clean_dsp; 813 } 814 815 ret = cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, CSPL_MBOX_CMD_PAUSE); 816 if (ret) { 817 dev_err(cs35l41->dev, "Error waiting for DSP to pause: %u\n", ret); 818 goto clean_dsp; 819 } 820 821 cs35l41->firmware_running = true; 822 823 return 0; 824 825 clean_dsp: 826 cs35l41_shutdown_dsp(cs35l41); 827 return ret; 828 } 829 830 static void cs35l41_load_firmware(struct cs35l41_hda *cs35l41, bool load) 831 { 832 if (cs35l41->firmware_running && !load) { 833 dev_dbg(cs35l41->dev, "Unloading Firmware\n"); 834 cs35l41_shutdown_dsp(cs35l41); 835 } else if (!cs35l41->firmware_running && load) { 836 dev_dbg(cs35l41->dev, "Loading Firmware\n"); 837 cs35l41_smart_amp(cs35l41); 838 } else { 839 dev_dbg(cs35l41->dev, "Unable to Load firmware.\n"); 840 } 841 } 842 843 static int cs35l41_fw_load_ctl_get(struct snd_kcontrol *kcontrol, 844 struct snd_ctl_elem_value *ucontrol) 845 { 846 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 847 848 ucontrol->value.integer.value[0] = cs35l41->request_fw_load; 849 return 0; 850 } 851 852 static void cs35l41_fw_load_work(struct work_struct *work) 853 { 854 struct cs35l41_hda *cs35l41 = container_of(work, struct cs35l41_hda, fw_load_work); 855 856 pm_runtime_get_sync(cs35l41->dev); 857 858 mutex_lock(&cs35l41->fw_mutex); 859 860 /* Recheck if playback is ongoing, mutex will block playback during firmware loading */ 861 if (cs35l41->playback_started) 862 dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback. Retrying...\n"); 863 else 864 cs35l41_load_firmware(cs35l41, cs35l41->request_fw_load); 865 866 cs35l41->fw_request_ongoing = false; 867 mutex_unlock(&cs35l41->fw_mutex); 868 869 pm_runtime_mark_last_busy(cs35l41->dev); 870 pm_runtime_put_autosuspend(cs35l41->dev); 871 } 872 873 static int cs35l41_fw_load_ctl_put(struct snd_kcontrol *kcontrol, 874 struct snd_ctl_elem_value *ucontrol) 875 { 876 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 877 878 if (cs35l41->request_fw_load == ucontrol->value.integer.value[0]) 879 return 0; 880 881 if (cs35l41->fw_request_ongoing) { 882 dev_dbg(cs35l41->dev, "Existing request not complete\n"); 883 return -EBUSY; 884 } 885 886 /* Check if playback is ongoing when initial request is made */ 887 if (cs35l41->playback_started) { 888 dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback\n"); 889 return -EBUSY; 890 } 891 892 cs35l41->fw_request_ongoing = true; 893 cs35l41->request_fw_load = ucontrol->value.integer.value[0]; 894 schedule_work(&cs35l41->fw_load_work); 895 896 return 1; 897 } 898 899 static int cs35l41_fw_type_ctl_get(struct snd_kcontrol *kcontrol, 900 struct snd_ctl_elem_value *ucontrol) 901 { 902 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 903 904 ucontrol->value.enumerated.item[0] = cs35l41->firmware_type; 905 906 return 0; 907 } 908 909 static int cs35l41_fw_type_ctl_put(struct snd_kcontrol *kcontrol, 910 struct snd_ctl_elem_value *ucontrol) 911 { 912 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 913 914 if (ucontrol->value.enumerated.item[0] < HDA_CS_DSP_NUM_FW) { 915 if (cs35l41->firmware_type != ucontrol->value.enumerated.item[0]) { 916 cs35l41->firmware_type = ucontrol->value.enumerated.item[0]; 917 return 1; 918 } else { 919 return 0; 920 } 921 } 922 923 return -EINVAL; 924 } 925 926 static int cs35l41_fw_type_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 927 { 928 return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(hda_cs_dsp_fw_ids), hda_cs_dsp_fw_ids); 929 } 930 931 static int cs35l41_create_controls(struct cs35l41_hda *cs35l41) 932 { 933 char fw_type_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 934 char fw_load_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 935 struct snd_kcontrol_new fw_type_ctl = { 936 .name = fw_type_ctl_name, 937 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 938 .info = cs35l41_fw_type_ctl_info, 939 .get = cs35l41_fw_type_ctl_get, 940 .put = cs35l41_fw_type_ctl_put, 941 }; 942 struct snd_kcontrol_new fw_load_ctl = { 943 .name = fw_load_ctl_name, 944 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 945 .info = snd_ctl_boolean_mono_info, 946 .get = cs35l41_fw_load_ctl_get, 947 .put = cs35l41_fw_load_ctl_put, 948 }; 949 int ret; 950 951 scnprintf(fw_type_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Type", 952 cs35l41->amp_name); 953 scnprintf(fw_load_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Load", 954 cs35l41->amp_name); 955 956 ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_type_ctl, cs35l41)); 957 if (ret) { 958 dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_type_ctl.name, ret); 959 return ret; 960 } 961 962 dev_dbg(cs35l41->dev, "Added Control %s\n", fw_type_ctl.name); 963 964 ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_load_ctl, cs35l41)); 965 if (ret) { 966 dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_load_ctl.name, ret); 967 return ret; 968 } 969 970 dev_dbg(cs35l41->dev, "Added Control %s\n", fw_load_ctl.name); 971 972 return 0; 973 } 974 975 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data) 976 { 977 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 978 struct hda_component *comps = master_data; 979 int ret = 0; 980 981 if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS) 982 return -EINVAL; 983 984 comps = &comps[cs35l41->index]; 985 if (comps->dev) 986 return -EBUSY; 987 988 pm_runtime_get_sync(dev); 989 990 mutex_lock(&cs35l41->fw_mutex); 991 992 comps->dev = dev; 993 if (!cs35l41->acpi_subsystem_id) 994 cs35l41->acpi_subsystem_id = kasprintf(GFP_KERNEL, "%.8x", 995 comps->codec->core.subsystem_id); 996 cs35l41->codec = comps->codec; 997 strscpy(comps->name, dev_name(dev), sizeof(comps->name)); 998 999 cs35l41->firmware_type = HDA_CS_DSP_FW_SPK_PROT; 1000 1001 if (firmware_autostart) { 1002 dev_dbg(cs35l41->dev, "Firmware Autostart.\n"); 1003 cs35l41->request_fw_load = true; 1004 if (cs35l41_smart_amp(cs35l41) < 0) 1005 dev_warn(cs35l41->dev, "Cannot Run Firmware, reverting to dsp bypass...\n"); 1006 } else { 1007 dev_dbg(cs35l41->dev, "Firmware Autostart is disabled.\n"); 1008 } 1009 1010 ret = cs35l41_create_controls(cs35l41); 1011 1012 comps->playback_hook = cs35l41_hda_playback_hook; 1013 1014 mutex_unlock(&cs35l41->fw_mutex); 1015 1016 pm_runtime_mark_last_busy(dev); 1017 pm_runtime_put_autosuspend(dev); 1018 1019 return ret; 1020 } 1021 1022 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data) 1023 { 1024 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 1025 struct hda_component *comps = master_data; 1026 1027 if (comps[cs35l41->index].dev == dev) 1028 memset(&comps[cs35l41->index], 0, sizeof(*comps)); 1029 } 1030 1031 static const struct component_ops cs35l41_hda_comp_ops = { 1032 .bind = cs35l41_hda_bind, 1033 .unbind = cs35l41_hda_unbind, 1034 }; 1035 1036 static irqreturn_t cs35l41_bst_short_err(int irq, void *data) 1037 { 1038 struct cs35l41_hda *cs35l41 = data; 1039 1040 dev_crit_ratelimited(cs35l41->dev, "LBST Error\n"); 1041 set_bit(CS35L41_BST_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1042 1043 return IRQ_HANDLED; 1044 } 1045 1046 static irqreturn_t cs35l41_bst_dcm_uvp_err(int irq, void *data) 1047 { 1048 struct cs35l41_hda *cs35l41 = data; 1049 1050 dev_crit_ratelimited(cs35l41->dev, "DCM VBST Under Voltage Error\n"); 1051 set_bit(CS35L41_BST_UVP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1052 1053 return IRQ_HANDLED; 1054 } 1055 1056 static irqreturn_t cs35l41_bst_ovp_err(int irq, void *data) 1057 { 1058 struct cs35l41_hda *cs35l41 = data; 1059 1060 dev_crit_ratelimited(cs35l41->dev, "VBST Over Voltage error\n"); 1061 set_bit(CS35L41_BST_OVP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1062 1063 return IRQ_HANDLED; 1064 } 1065 1066 static irqreturn_t cs35l41_temp_err(int irq, void *data) 1067 { 1068 struct cs35l41_hda *cs35l41 = data; 1069 1070 dev_crit_ratelimited(cs35l41->dev, "Over temperature error\n"); 1071 set_bit(CS35L41_TEMP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1072 1073 return IRQ_HANDLED; 1074 } 1075 1076 static irqreturn_t cs35l41_temp_warn(int irq, void *data) 1077 { 1078 struct cs35l41_hda *cs35l41 = data; 1079 1080 dev_crit_ratelimited(cs35l41->dev, "Over temperature warning\n"); 1081 set_bit(CS35L41_TEMP_WARN_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1082 1083 return IRQ_HANDLED; 1084 } 1085 1086 static irqreturn_t cs35l41_amp_short(int irq, void *data) 1087 { 1088 struct cs35l41_hda *cs35l41 = data; 1089 1090 dev_crit_ratelimited(cs35l41->dev, "Amp short error\n"); 1091 set_bit(CS35L41_AMP_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1092 1093 return IRQ_HANDLED; 1094 } 1095 1096 static const struct cs35l41_irq cs35l41_irqs[] = { 1097 CS35L41_IRQ(BST_OVP_ERR, "Boost Overvoltage Error", cs35l41_bst_ovp_err), 1098 CS35L41_IRQ(BST_DCM_UVP_ERR, "Boost Undervoltage Error", cs35l41_bst_dcm_uvp_err), 1099 CS35L41_IRQ(BST_SHORT_ERR, "Boost Inductor Short Error", cs35l41_bst_short_err), 1100 CS35L41_IRQ(TEMP_WARN, "Temperature Warning", cs35l41_temp_warn), 1101 CS35L41_IRQ(TEMP_ERR, "Temperature Error", cs35l41_temp_err), 1102 CS35L41_IRQ(AMP_SHORT_ERR, "Amp Short", cs35l41_amp_short), 1103 }; 1104 1105 static const struct regmap_irq cs35l41_reg_irqs[] = { 1106 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_OVP_ERR), 1107 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_DCM_UVP_ERR), 1108 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_SHORT_ERR), 1109 CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_WARN), 1110 CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_ERR), 1111 CS35L41_REG_IRQ(IRQ1_STATUS1, AMP_SHORT_ERR), 1112 }; 1113 1114 static struct regmap_irq_chip cs35l41_regmap_irq_chip = { 1115 .name = "cs35l41 IRQ1 Controller", 1116 .status_base = CS35L41_IRQ1_STATUS1, 1117 .mask_base = CS35L41_IRQ1_MASK1, 1118 .ack_base = CS35L41_IRQ1_STATUS1, 1119 .num_regs = 4, 1120 .irqs = cs35l41_reg_irqs, 1121 .num_irqs = ARRAY_SIZE(cs35l41_reg_irqs), 1122 .runtime_pm = true, 1123 }; 1124 1125 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) 1126 { 1127 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1128 bool using_irq = false; 1129 int irq, irq_pol; 1130 int ret; 1131 int i; 1132 1133 if (!cs35l41->hw_cfg.valid) 1134 return -EINVAL; 1135 1136 ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg); 1137 if (ret) 1138 return ret; 1139 1140 if (hw_cfg->gpio1.valid) { 1141 switch (hw_cfg->gpio1.func) { 1142 case CS35L41_NOT_USED: 1143 break; 1144 case CS35l41_VSPK_SWITCH: 1145 hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO; 1146 hw_cfg->gpio1.out_en = true; 1147 break; 1148 case CS35l41_SYNC: 1149 hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC; 1150 break; 1151 default: 1152 dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", 1153 hw_cfg->gpio1.func); 1154 return -EINVAL; 1155 } 1156 } 1157 1158 if (hw_cfg->gpio2.valid) { 1159 switch (hw_cfg->gpio2.func) { 1160 case CS35L41_NOT_USED: 1161 break; 1162 case CS35L41_INTERRUPT: 1163 using_irq = true; 1164 hw_cfg->gpio2.func = CS35L41_GPIO2_INT_OPEN_DRAIN; 1165 break; 1166 default: 1167 dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func); 1168 return -EINVAL; 1169 } 1170 } 1171 1172 irq_pol = cs35l41_gpio_config(cs35l41->regmap, hw_cfg); 1173 1174 if (cs35l41->irq && using_irq) { 1175 ret = devm_regmap_add_irq_chip(cs35l41->dev, cs35l41->regmap, cs35l41->irq, 1176 IRQF_ONESHOT | IRQF_SHARED | irq_pol, 1177 0, &cs35l41_regmap_irq_chip, &cs35l41->irq_data); 1178 if (ret) 1179 return ret; 1180 1181 for (i = 0; i < ARRAY_SIZE(cs35l41_irqs); i++) { 1182 irq = regmap_irq_get_virq(cs35l41->irq_data, cs35l41_irqs[i].irq); 1183 if (irq < 0) 1184 return irq; 1185 1186 ret = devm_request_threaded_irq(cs35l41->dev, irq, NULL, 1187 cs35l41_irqs[i].handler, 1188 IRQF_ONESHOT | IRQF_SHARED | irq_pol, 1189 cs35l41_irqs[i].name, cs35l41); 1190 if (ret) 1191 return ret; 1192 } 1193 } 1194 1195 return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); 1196 } 1197 1198 static int cs35l41_get_speaker_id(struct device *dev, int amp_index, 1199 int num_amps, int fixed_gpio_id) 1200 { 1201 struct gpio_desc *speaker_id_desc; 1202 int speaker_id = -ENODEV; 1203 1204 if (fixed_gpio_id >= 0) { 1205 dev_dbg(dev, "Found Fixed Speaker ID GPIO (index = %d)\n", fixed_gpio_id); 1206 speaker_id_desc = gpiod_get_index(dev, NULL, fixed_gpio_id, GPIOD_IN); 1207 if (IS_ERR(speaker_id_desc)) { 1208 speaker_id = PTR_ERR(speaker_id_desc); 1209 return speaker_id; 1210 } 1211 speaker_id = gpiod_get_value_cansleep(speaker_id_desc); 1212 gpiod_put(speaker_id_desc); 1213 dev_dbg(dev, "Speaker ID = %d\n", speaker_id); 1214 } else { 1215 int base_index; 1216 int gpios_per_amp; 1217 int count; 1218 int tmp; 1219 int i; 1220 1221 count = gpiod_count(dev, "spk-id"); 1222 if (count > 0) { 1223 speaker_id = 0; 1224 gpios_per_amp = count / num_amps; 1225 base_index = gpios_per_amp * amp_index; 1226 1227 if (count % num_amps) 1228 return -EINVAL; 1229 1230 dev_dbg(dev, "Found %d Speaker ID GPIOs per Amp\n", gpios_per_amp); 1231 1232 for (i = 0; i < gpios_per_amp; i++) { 1233 speaker_id_desc = gpiod_get_index(dev, "spk-id", i + base_index, 1234 GPIOD_IN); 1235 if (IS_ERR(speaker_id_desc)) { 1236 speaker_id = PTR_ERR(speaker_id_desc); 1237 break; 1238 } 1239 tmp = gpiod_get_value_cansleep(speaker_id_desc); 1240 gpiod_put(speaker_id_desc); 1241 if (tmp < 0) { 1242 speaker_id = tmp; 1243 break; 1244 } 1245 speaker_id |= tmp << i; 1246 } 1247 dev_dbg(dev, "Speaker ID = %d\n", speaker_id); 1248 } 1249 } 1250 return speaker_id; 1251 } 1252 1253 /* 1254 * Device CLSA010(0/1) doesn't have _DSD so a gpiod_get by the label reset won't work. 1255 * And devices created by serial-multi-instantiate don't have their device struct 1256 * pointing to the correct fwnode, so acpi_dev must be used here. 1257 * And devm functions expect that the device requesting the resource has the correct 1258 * fwnode. 1259 */ 1260 static int cs35l41_no_acpi_dsd(struct cs35l41_hda *cs35l41, struct device *physdev, int id, 1261 const char *hid) 1262 { 1263 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1264 1265 /* check I2C address to assign the index */ 1266 cs35l41->index = id == 0x40 ? 0 : 1; 1267 cs35l41->channel_index = 0; 1268 cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); 1269 cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, 0, 0, 2); 1270 hw_cfg->spk_pos = cs35l41->index; 1271 hw_cfg->gpio2.func = CS35L41_INTERRUPT; 1272 hw_cfg->gpio2.valid = true; 1273 hw_cfg->valid = true; 1274 1275 if (strncmp(hid, "CLSA0100", 8) == 0) { 1276 hw_cfg->bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH; 1277 } else if (strncmp(hid, "CLSA0101", 8) == 0) { 1278 hw_cfg->bst_type = CS35L41_EXT_BOOST; 1279 hw_cfg->gpio1.func = CS35l41_VSPK_SWITCH; 1280 hw_cfg->gpio1.valid = true; 1281 } else { 1282 /* 1283 * Note: CLSA010(0/1) are special cases which use a slightly different design. 1284 * All other HIDs e.g. CSC3551 require valid ACPI _DSD properties to be supported. 1285 */ 1286 dev_err(cs35l41->dev, "Error: ACPI _DSD Properties are missing for HID %s.\n", hid); 1287 hw_cfg->valid = false; 1288 hw_cfg->gpio1.valid = false; 1289 hw_cfg->gpio2.valid = false; 1290 return -EINVAL; 1291 } 1292 1293 return 0; 1294 } 1295 1296 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id) 1297 { 1298 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1299 u32 values[HDA_MAX_COMPONENTS]; 1300 struct acpi_device *adev; 1301 struct device *physdev; 1302 const char *sub; 1303 char *property; 1304 size_t nval; 1305 int i, ret; 1306 1307 adev = acpi_dev_get_first_match_dev(hid, NULL, -1); 1308 if (!adev) { 1309 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid); 1310 return -ENODEV; 1311 } 1312 1313 physdev = get_device(acpi_get_first_physical_node(adev)); 1314 acpi_dev_put(adev); 1315 1316 sub = acpi_get_subsystem_id(ACPI_HANDLE(physdev)); 1317 if (IS_ERR(sub)) 1318 sub = NULL; 1319 cs35l41->acpi_subsystem_id = sub; 1320 1321 property = "cirrus,dev-index"; 1322 ret = device_property_count_u32(physdev, property); 1323 if (ret <= 0) { 1324 ret = cs35l41_no_acpi_dsd(cs35l41, physdev, id, hid); 1325 goto err_put_physdev; 1326 } 1327 if (ret > ARRAY_SIZE(values)) { 1328 ret = -EINVAL; 1329 goto err; 1330 } 1331 nval = ret; 1332 1333 ret = device_property_read_u32_array(physdev, property, values, nval); 1334 if (ret) 1335 goto err; 1336 1337 cs35l41->index = -1; 1338 for (i = 0; i < nval; i++) { 1339 if (values[i] == id) { 1340 cs35l41->index = i; 1341 break; 1342 } 1343 } 1344 if (cs35l41->index == -1) { 1345 dev_err(cs35l41->dev, "No index found in %s\n", property); 1346 ret = -ENODEV; 1347 goto err; 1348 } 1349 1350 /* To use the same release code for all laptop variants we can't use devm_ version of 1351 * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node 1352 */ 1353 cs35l41->reset_gpio = fwnode_gpiod_get_index(acpi_fwnode_handle(adev), "reset", cs35l41->index, 1354 GPIOD_OUT_LOW, "cs35l41-reset"); 1355 1356 property = "cirrus,speaker-position"; 1357 ret = device_property_read_u32_array(physdev, property, values, nval); 1358 if (ret) 1359 goto err; 1360 hw_cfg->spk_pos = values[cs35l41->index]; 1361 1362 cs35l41->channel_index = 0; 1363 for (i = 0; i < cs35l41->index; i++) 1364 if (values[i] == hw_cfg->spk_pos) 1365 cs35l41->channel_index++; 1366 1367 property = "cirrus,gpio1-func"; 1368 ret = device_property_read_u32_array(physdev, property, values, nval); 1369 if (ret) 1370 goto err; 1371 hw_cfg->gpio1.func = values[cs35l41->index]; 1372 hw_cfg->gpio1.valid = true; 1373 1374 property = "cirrus,gpio2-func"; 1375 ret = device_property_read_u32_array(physdev, property, values, nval); 1376 if (ret) 1377 goto err; 1378 hw_cfg->gpio2.func = values[cs35l41->index]; 1379 hw_cfg->gpio2.valid = true; 1380 1381 property = "cirrus,boost-peak-milliamp"; 1382 ret = device_property_read_u32_array(physdev, property, values, nval); 1383 if (ret == 0) 1384 hw_cfg->bst_ipk = values[cs35l41->index]; 1385 else 1386 hw_cfg->bst_ipk = -1; 1387 1388 property = "cirrus,boost-ind-nanohenry"; 1389 ret = device_property_read_u32_array(physdev, property, values, nval); 1390 if (ret == 0) 1391 hw_cfg->bst_ind = values[cs35l41->index]; 1392 else 1393 hw_cfg->bst_ind = -1; 1394 1395 property = "cirrus,boost-cap-microfarad"; 1396 ret = device_property_read_u32_array(physdev, property, values, nval); 1397 if (ret == 0) 1398 hw_cfg->bst_cap = values[cs35l41->index]; 1399 else 1400 hw_cfg->bst_cap = -1; 1401 1402 cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, cs35l41->index, nval, -1); 1403 1404 if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) 1405 hw_cfg->bst_type = CS35L41_INT_BOOST; 1406 else 1407 hw_cfg->bst_type = CS35L41_EXT_BOOST; 1408 1409 hw_cfg->valid = true; 1410 put_device(physdev); 1411 1412 return 0; 1413 1414 err: 1415 dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret); 1416 err_put_physdev: 1417 put_device(physdev); 1418 1419 return ret; 1420 } 1421 1422 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq, 1423 struct regmap *regmap) 1424 { 1425 unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status; 1426 struct cs35l41_hda *cs35l41; 1427 int ret; 1428 1429 BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != ARRAY_SIZE(cs35l41_reg_irqs)); 1430 BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != CS35L41_NUM_IRQ); 1431 1432 if (IS_ERR(regmap)) 1433 return PTR_ERR(regmap); 1434 1435 cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL); 1436 if (!cs35l41) 1437 return -ENOMEM; 1438 1439 cs35l41->dev = dev; 1440 cs35l41->irq = irq; 1441 cs35l41->regmap = regmap; 1442 dev_set_drvdata(dev, cs35l41); 1443 1444 ret = cs35l41_hda_read_acpi(cs35l41, device_name, id); 1445 if (ret) 1446 return dev_err_probe(cs35l41->dev, ret, "Platform not supported\n"); 1447 1448 if (IS_ERR(cs35l41->reset_gpio)) { 1449 ret = PTR_ERR(cs35l41->reset_gpio); 1450 cs35l41->reset_gpio = NULL; 1451 if (ret == -EBUSY) { 1452 dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n"); 1453 } else { 1454 dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO\n"); 1455 goto err; 1456 } 1457 } 1458 if (cs35l41->reset_gpio) { 1459 usleep_range(2000, 2100); 1460 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 1461 } 1462 1463 usleep_range(2000, 2100); 1464 1465 ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status, 1466 int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000); 1467 if (ret) { 1468 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret); 1469 goto err; 1470 } 1471 1472 ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts); 1473 if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) { 1474 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n", 1475 int_sts & CS35L41_OTP_BOOT_ERR, ret); 1476 ret = -EIO; 1477 goto err; 1478 } 1479 1480 ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id); 1481 if (ret) { 1482 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret); 1483 goto err; 1484 } 1485 1486 ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid); 1487 if (ret) { 1488 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret); 1489 goto err; 1490 } 1491 1492 mtl_revid = reg_revid & CS35L41_MTLREVID_MASK; 1493 1494 chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID; 1495 if (regid != chipid) { 1496 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid); 1497 ret = -ENODEV; 1498 goto err; 1499 } 1500 1501 ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 1502 if (ret) 1503 goto err; 1504 1505 ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid); 1506 if (ret) 1507 goto err; 1508 1509 ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap); 1510 if (ret) { 1511 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret); 1512 goto err; 1513 } 1514 1515 ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 1516 if (ret) 1517 goto err; 1518 1519 INIT_WORK(&cs35l41->fw_load_work, cs35l41_fw_load_work); 1520 mutex_init(&cs35l41->fw_mutex); 1521 1522 pm_runtime_set_autosuspend_delay(cs35l41->dev, 3000); 1523 pm_runtime_use_autosuspend(cs35l41->dev); 1524 pm_runtime_mark_last_busy(cs35l41->dev); 1525 pm_runtime_set_active(cs35l41->dev); 1526 pm_runtime_get_noresume(cs35l41->dev); 1527 pm_runtime_enable(cs35l41->dev); 1528 1529 ret = cs35l41_hda_apply_properties(cs35l41); 1530 if (ret) 1531 goto err_pm; 1532 1533 pm_runtime_put_autosuspend(cs35l41->dev); 1534 1535 ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops); 1536 if (ret) { 1537 dev_err(cs35l41->dev, "Register component failed: %d\n", ret); 1538 pm_runtime_disable(cs35l41->dev); 1539 goto err; 1540 } 1541 1542 dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid); 1543 1544 return 0; 1545 1546 err_pm: 1547 pm_runtime_disable(cs35l41->dev); 1548 pm_runtime_put_noidle(cs35l41->dev); 1549 1550 err: 1551 if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type)) 1552 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 1553 gpiod_put(cs35l41->reset_gpio); 1554 kfree(cs35l41->acpi_subsystem_id); 1555 1556 return ret; 1557 } 1558 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41); 1559 1560 void cs35l41_hda_remove(struct device *dev) 1561 { 1562 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 1563 1564 pm_runtime_get_sync(cs35l41->dev); 1565 pm_runtime_disable(cs35l41->dev); 1566 1567 if (cs35l41->halo_initialized) 1568 cs35l41_remove_dsp(cs35l41); 1569 1570 component_del(cs35l41->dev, &cs35l41_hda_comp_ops); 1571 1572 pm_runtime_put_noidle(cs35l41->dev); 1573 1574 if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type)) 1575 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 1576 gpiod_put(cs35l41->reset_gpio); 1577 kfree(cs35l41->acpi_subsystem_id); 1578 } 1579 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41); 1580 1581 const struct dev_pm_ops cs35l41_hda_pm_ops = { 1582 RUNTIME_PM_OPS(cs35l41_runtime_suspend, cs35l41_runtime_resume, 1583 cs35l41_runtime_idle) 1584 SYSTEM_SLEEP_PM_OPS(cs35l41_system_suspend, cs35l41_system_resume) 1585 }; 1586 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_pm_ops, SND_HDA_SCODEC_CS35L41); 1587 1588 MODULE_DESCRIPTION("CS35L41 HDA Driver"); 1589 MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS); 1590 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>"); 1591 MODULE_LICENSE("GPL"); 1592 MODULE_IMPORT_NS(FW_CS_DSP); 1593