1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // CS35l41 ALSA HDA audio driver 4 // 5 // Copyright 2021 Cirrus Logic, Inc. 6 // 7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com> 8 9 #include <linux/acpi.h> 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <sound/hda_codec.h> 13 #include <sound/soc.h> 14 #include <linux/pm_runtime.h> 15 #include "hda_local.h" 16 #include "hda_auto_parser.h" 17 #include "hda_jack.h" 18 #include "hda_generic.h" 19 #include "hda_component.h" 20 #include "cs35l41_hda.h" 21 #include "hda_cs_dsp_ctl.h" 22 23 #define CS35L41_FIRMWARE_ROOT "cirrus/" 24 #define CS35L41_PART "cs35l41" 25 26 #define HALO_STATE_DSP_CTL_NAME "HALO_STATE" 27 #define HALO_STATE_DSP_CTL_TYPE 5 28 #define HALO_STATE_DSP_CTL_ALG 262308 29 #define CAL_R_DSP_CTL_NAME "CAL_R" 30 #define CAL_STATUS_DSP_CTL_NAME "CAL_STATUS" 31 #define CAL_CHECKSUM_DSP_CTL_NAME "CAL_CHECKSUM" 32 #define CAL_AMBIENT_DSP_CTL_NAME "CAL_AMBIENT" 33 #define CAL_DSP_CTL_TYPE 5 34 #define CAL_DSP_CTL_ALG 205 35 36 static bool firmware_autostart = 1; 37 module_param(firmware_autostart, bool, 0444); 38 MODULE_PARM_DESC(firmware_autostart, "Allow automatic firmware download on boot" 39 "(0=Disable, 1=Enable) (default=1); "); 40 41 static const struct reg_sequence cs35l41_hda_config[] = { 42 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 43 { CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN 44 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 45 { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 46 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 47 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 48 { CS35L41_SP_HIZ_CTRL, 0x00000002 }, // Hi-Z unused 49 { CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot 50 { CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot 51 { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 52 { CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON 53 { CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON 54 { CS35L41_ASP_TX3_SRC, 0x00000032 }, // ASPTX3 SRC = ERRVOL 55 { CS35L41_ASP_TX4_SRC, 0x00000033 }, // ASPTX4 SRC = CLASSH_TGT 56 { CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1 57 { CS35L41_DSP1_RX2_SRC, 0x00000009 }, // DSP1RX2 SRC = ASPRX2 58 { CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON 59 { CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON 60 { CS35L41_DSP1_RX5_SRC, 0x00000020 }, // DSP1RX5 SRC = ERRVOL 61 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB 62 { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB 63 }; 64 65 static const struct reg_sequence cs35l41_hda_config_dsp[] = { 66 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 67 { CS35L41_DSP_CLK_CTRL, 0x00000003 }, // DSP CLK EN 68 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 69 { CS35L41_SP_ENABLES, 0x00010001 }, // ASP_RX1_EN = 1, ASP_TX1_EN = 1 70 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 71 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 72 { CS35L41_SP_HIZ_CTRL, 0x00000003 }, // Hi-Z unused/disabled 73 { CS35L41_SP_TX_WL, 0x00000018 }, // 24 cycles/slot 74 { CS35L41_SP_RX_WL, 0x00000018 }, // 24 cycles/slot 75 { CS35L41_DAC_PCM1_SRC, 0x00000032 }, // DACPCM1_SRC = ERR_VOL 76 { CS35L41_ASP_TX1_SRC, 0x00000018 }, // ASPTX1 SRC = VMON 77 { CS35L41_ASP_TX2_SRC, 0x00000019 }, // ASPTX2 SRC = IMON 78 { CS35L41_ASP_TX3_SRC, 0x00000028 }, // ASPTX3 SRC = VPMON 79 { CS35L41_ASP_TX4_SRC, 0x00000029 }, // ASPTX4 SRC = VBSTMON 80 { CS35L41_DSP1_RX1_SRC, 0x00000008 }, // DSP1RX1 SRC = ASPRX1 81 { CS35L41_DSP1_RX2_SRC, 0x00000008 }, // DSP1RX2 SRC = ASPRX1 82 { CS35L41_DSP1_RX3_SRC, 0x00000018 }, // DSP1RX3 SRC = VMON 83 { CS35L41_DSP1_RX4_SRC, 0x00000019 }, // DSP1RX4 SRC = IMON 84 { CS35L41_DSP1_RX5_SRC, 0x00000029 }, // DSP1RX5 SRC = VBSTMON 85 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM 0.0 dB 86 { CS35L41_AMP_GAIN_CTRL, 0x00000233 }, // AMP_GAIN_PCM = 17.5dB AMP_GAIN_PDM = 19.5dB 87 }; 88 89 static const struct reg_sequence cs35l41_hda_mute[] = { 90 { CS35L41_AMP_GAIN_CTRL, 0x00000000 }, // AMP_GAIN_PCM 0.5 dB 91 { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_HPF_PCM_EN = 1, AMP_VOL_PCM Mute 92 }; 93 94 static void cs35l41_add_controls(struct cs35l41_hda *cs35l41) 95 { 96 struct hda_cs_dsp_ctl_info info; 97 98 info.device_name = cs35l41->amp_name; 99 info.fw_type = cs35l41->firmware_type; 100 info.card = cs35l41->codec->card; 101 102 hda_cs_dsp_add_controls(&cs35l41->cs_dsp, &info); 103 } 104 105 static const struct cs_dsp_client_ops client_ops = { 106 .control_remove = hda_cs_dsp_control_remove, 107 }; 108 109 static int cs35l41_request_firmware_file(struct cs35l41_hda *cs35l41, 110 const struct firmware **firmware, char **filename, 111 const char *dir, const char *ssid, const char *amp_name, 112 int spkid, const char *filetype) 113 { 114 const char * const dsp_name = cs35l41->cs_dsp.name; 115 char *s, c; 116 int ret = 0; 117 118 if (spkid > -1 && ssid && amp_name) 119 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d-%s.%s", dir, CS35L41_PART, 120 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 121 ssid, spkid, amp_name, filetype); 122 else if (spkid > -1 && ssid) 123 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-spkid%d.%s", dir, CS35L41_PART, 124 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 125 ssid, spkid, filetype); 126 else if (ssid && amp_name) 127 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s-%s.%s", dir, CS35L41_PART, 128 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 129 ssid, amp_name, filetype); 130 else if (ssid) 131 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s-%s.%s", dir, CS35L41_PART, 132 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 133 ssid, filetype); 134 else 135 *filename = kasprintf(GFP_KERNEL, "%s%s-%s-%s.%s", dir, CS35L41_PART, 136 dsp_name, hda_cs_dsp_fw_ids[cs35l41->firmware_type], 137 filetype); 138 139 if (*filename == NULL) 140 return -ENOMEM; 141 142 /* 143 * Make sure that filename is lower-case and any non alpha-numeric 144 * characters except full stop and '/' are replaced with hyphens. 145 */ 146 s = *filename; 147 while (*s) { 148 c = *s; 149 if (isalnum(c)) 150 *s = tolower(c); 151 else if (c != '.' && c != '/') 152 *s = '-'; 153 s++; 154 } 155 156 ret = firmware_request_nowarn(firmware, *filename, cs35l41->dev); 157 if (ret != 0) { 158 dev_dbg(cs35l41->dev, "Failed to request '%s'\n", *filename); 159 kfree(*filename); 160 *filename = NULL; 161 } 162 163 return ret; 164 } 165 166 static int cs35l41_request_firmware_files_spkid(struct cs35l41_hda *cs35l41, 167 const struct firmware **wmfw_firmware, 168 char **wmfw_filename, 169 const struct firmware **coeff_firmware, 170 char **coeff_filename) 171 { 172 int ret; 173 174 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.wmfw */ 175 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 176 CS35L41_FIRMWARE_ROOT, 177 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 178 cs35l41->speaker_id, "wmfw"); 179 if (!ret) { 180 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 181 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 182 CS35L41_FIRMWARE_ROOT, 183 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 184 cs35l41->speaker_id, "bin"); 185 } 186 187 /* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */ 188 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 189 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 190 cs35l41->amp_name, -1, "wmfw"); 191 if (!ret) { 192 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 193 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 194 CS35L41_FIRMWARE_ROOT, 195 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 196 cs35l41->speaker_id, "bin"); 197 } 198 199 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.wmfw */ 200 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 201 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 202 NULL, cs35l41->speaker_id, "wmfw"); 203 if (!ret) { 204 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 205 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 206 CS35L41_FIRMWARE_ROOT, 207 cs35l41->acpi_subsystem_id, 208 cs35l41->amp_name, cs35l41->speaker_id, "bin"); 209 if (ret) 210 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */ 211 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, 212 coeff_filename, CS35L41_FIRMWARE_ROOT, 213 cs35l41->acpi_subsystem_id, NULL, 214 cs35l41->speaker_id, "bin"); 215 } 216 217 /* try cirrus/part-dspN-fwtype-sub.wmfw */ 218 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 219 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 220 NULL, -1, "wmfw"); 221 if (!ret) { 222 /* try cirrus/part-dspN-fwtype-sub<-spkidN><-ampname>.bin */ 223 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 224 CS35L41_FIRMWARE_ROOT, 225 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 226 cs35l41->speaker_id, "bin"); 227 if (ret) 228 /* try cirrus/part-dspN-fwtype-sub<-spkidN>.bin */ 229 return cs35l41_request_firmware_file(cs35l41, coeff_firmware, 230 coeff_filename, CS35L41_FIRMWARE_ROOT, 231 cs35l41->acpi_subsystem_id, NULL, 232 cs35l41->speaker_id, "bin"); 233 } 234 235 return ret; 236 } 237 238 static int cs35l41_request_firmware_files(struct cs35l41_hda *cs35l41, 239 const struct firmware **wmfw_firmware, 240 char **wmfw_filename, 241 const struct firmware **coeff_firmware, 242 char **coeff_filename) 243 { 244 int ret; 245 246 if (cs35l41->speaker_id > -1) { 247 ret = cs35l41_request_firmware_files_spkid(cs35l41, wmfw_firmware, wmfw_filename, 248 coeff_firmware, coeff_filename); 249 goto out; 250 251 } 252 253 /* try cirrus/part-dspN-fwtype-sub<-ampname>.wmfw */ 254 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 255 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 256 cs35l41->amp_name, -1, "wmfw"); 257 if (!ret) { 258 /* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */ 259 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 260 CS35L41_FIRMWARE_ROOT, 261 cs35l41->acpi_subsystem_id, cs35l41->amp_name, 262 -1, "bin"); 263 goto out; 264 } 265 266 /* try cirrus/part-dspN-fwtype-sub.wmfw */ 267 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 268 CS35L41_FIRMWARE_ROOT, cs35l41->acpi_subsystem_id, 269 NULL, -1, "wmfw"); 270 if (!ret) { 271 /* try cirrus/part-dspN-fwtype-sub<-ampname>.bin */ 272 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 273 CS35L41_FIRMWARE_ROOT, 274 cs35l41->acpi_subsystem_id, 275 cs35l41->amp_name, -1, "bin"); 276 if (ret) 277 /* try cirrus/part-dspN-fwtype-sub.bin */ 278 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 279 CS35L41_FIRMWARE_ROOT, 280 cs35l41->acpi_subsystem_id, NULL, -1, 281 "bin"); 282 } 283 284 out: 285 if (!ret) 286 return 0; 287 288 /* Handle fallback */ 289 dev_warn(cs35l41->dev, "Falling back to default firmware.\n"); 290 291 release_firmware(*wmfw_firmware); 292 kfree(*wmfw_filename); 293 294 /* fallback try cirrus/part-dspN-fwtype.wmfw */ 295 ret = cs35l41_request_firmware_file(cs35l41, wmfw_firmware, wmfw_filename, 296 CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "wmfw"); 297 if (!ret) 298 /* fallback try cirrus/part-dspN-fwtype.bin */ 299 ret = cs35l41_request_firmware_file(cs35l41, coeff_firmware, coeff_filename, 300 CS35L41_FIRMWARE_ROOT, NULL, NULL, -1, "bin"); 301 302 if (ret) { 303 release_firmware(*wmfw_firmware); 304 kfree(*wmfw_filename); 305 dev_warn(cs35l41->dev, "Unable to find firmware and tuning\n"); 306 } 307 return ret; 308 } 309 310 #if IS_ENABLED(CONFIG_EFI) 311 static int cs35l41_apply_calibration(struct cs35l41_hda *cs35l41, __be32 ambient, __be32 r0, 312 __be32 status, __be32 checksum) 313 { 314 int ret; 315 316 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_AMBIENT_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 317 CAL_DSP_CTL_ALG, &ambient, 4); 318 if (ret) { 319 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_AMBIENT_DSP_CTL_NAME, 320 ret); 321 return ret; 322 } 323 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_R_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 324 CAL_DSP_CTL_ALG, &r0, 4); 325 if (ret) { 326 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_R_DSP_CTL_NAME, ret); 327 return ret; 328 } 329 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_STATUS_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 330 CAL_DSP_CTL_ALG, &status, 4); 331 if (ret) { 332 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_STATUS_DSP_CTL_NAME, 333 ret); 334 return ret; 335 } 336 ret = hda_cs_dsp_write_ctl(&cs35l41->cs_dsp, CAL_CHECKSUM_DSP_CTL_NAME, CAL_DSP_CTL_TYPE, 337 CAL_DSP_CTL_ALG, &checksum, 4); 338 if (ret) { 339 dev_err(cs35l41->dev, "Cannot Write Control: %s - %d\n", CAL_CHECKSUM_DSP_CTL_NAME, 340 ret); 341 return ret; 342 } 343 344 return 0; 345 } 346 347 static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41) 348 { 349 static efi_guid_t efi_guid = EFI_GUID(0x02f9af02, 0x7734, 0x4233, 0xb4, 0x3d, 0x93, 0xfe, 350 0x5a, 0xa3, 0x5d, 0xb3); 351 static efi_char16_t efi_name[] = L"CirrusSmartAmpCalibrationData"; 352 const struct cs35l41_amp_efi_data *efi_data; 353 const struct cs35l41_amp_cal_data *cl; 354 unsigned long data_size = 0; 355 efi_status_t status; 356 int ret = 0; 357 u8 *data = NULL; 358 u32 attr; 359 360 /* Get real size of UEFI variable */ 361 status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data); 362 if (status == EFI_BUFFER_TOO_SMALL) { 363 ret = -ENODEV; 364 /* Allocate data buffer of data_size bytes */ 365 data = vmalloc(data_size); 366 if (!data) 367 return -ENOMEM; 368 /* Get variable contents into buffer */ 369 status = efi.get_variable(efi_name, &efi_guid, &attr, &data_size, data); 370 if (status == EFI_SUCCESS) { 371 efi_data = (struct cs35l41_amp_efi_data *)data; 372 dev_dbg(cs35l41->dev, "Calibration: Size=%d, Amp Count=%d\n", 373 efi_data->size, efi_data->count); 374 if (efi_data->count > cs35l41->index) { 375 cl = &efi_data->data[cs35l41->index]; 376 dev_dbg(cs35l41->dev, 377 "Calibration: Ambient=%02x, Status=%02x, R0=%d\n", 378 cl->calAmbient, cl->calStatus, cl->calR); 379 380 /* Calibration can only be applied whilst the DSP is not running */ 381 ret = cs35l41_apply_calibration(cs35l41, 382 cpu_to_be32(cl->calAmbient), 383 cpu_to_be32(cl->calR), 384 cpu_to_be32(cl->calStatus), 385 cpu_to_be32(cl->calR + 1)); 386 } 387 } 388 vfree(data); 389 } 390 return ret; 391 } 392 #else 393 static int cs35l41_save_calibration(struct cs35l41_hda *cs35l41) 394 { 395 dev_warn(cs35l41->dev, "Calibration not supported without EFI support.\n"); 396 return 0; 397 } 398 #endif 399 400 static int cs35l41_init_dsp(struct cs35l41_hda *cs35l41) 401 { 402 const struct firmware *coeff_firmware = NULL; 403 const struct firmware *wmfw_firmware = NULL; 404 struct cs_dsp *dsp = &cs35l41->cs_dsp; 405 char *coeff_filename = NULL; 406 char *wmfw_filename = NULL; 407 int ret; 408 409 if (!cs35l41->halo_initialized) { 410 cs35l41_configure_cs_dsp(cs35l41->dev, cs35l41->regmap, dsp); 411 dsp->client_ops = &client_ops; 412 413 ret = cs_dsp_halo_init(&cs35l41->cs_dsp); 414 if (ret) 415 return ret; 416 cs35l41->halo_initialized = true; 417 } 418 419 ret = cs35l41_request_firmware_files(cs35l41, &wmfw_firmware, &wmfw_filename, 420 &coeff_firmware, &coeff_filename); 421 if (ret < 0) 422 return ret; 423 424 dev_dbg(cs35l41->dev, "Loading WMFW Firmware: %s\n", wmfw_filename); 425 if (coeff_filename) 426 dev_dbg(cs35l41->dev, "Loading Coefficient File: %s\n", coeff_filename); 427 else 428 dev_warn(cs35l41->dev, "No Coefficient File available.\n"); 429 430 ret = cs_dsp_power_up(dsp, wmfw_firmware, wmfw_filename, coeff_firmware, coeff_filename, 431 hda_cs_dsp_fw_ids[cs35l41->firmware_type]); 432 if (ret) 433 goto err_release; 434 435 cs35l41_add_controls(cs35l41); 436 437 ret = cs35l41_save_calibration(cs35l41); 438 439 err_release: 440 release_firmware(wmfw_firmware); 441 release_firmware(coeff_firmware); 442 kfree(wmfw_filename); 443 kfree(coeff_filename); 444 445 return ret; 446 } 447 448 static void cs35l41_shutdown_dsp(struct cs35l41_hda *cs35l41) 449 { 450 struct cs_dsp *dsp = &cs35l41->cs_dsp; 451 452 cs_dsp_stop(dsp); 453 cs_dsp_power_down(dsp); 454 cs35l41->firmware_running = false; 455 dev_dbg(cs35l41->dev, "Unloaded Firmware\n"); 456 } 457 458 static void cs35l41_remove_dsp(struct cs35l41_hda *cs35l41) 459 { 460 struct cs_dsp *dsp = &cs35l41->cs_dsp; 461 462 cancel_work_sync(&cs35l41->fw_load_work); 463 464 mutex_lock(&cs35l41->fw_mutex); 465 cs35l41_shutdown_dsp(cs35l41); 466 cs_dsp_remove(dsp); 467 cs35l41->halo_initialized = false; 468 mutex_unlock(&cs35l41->fw_mutex); 469 } 470 471 /* Protection release cycle to get the speaker out of Safe-Mode */ 472 static void cs35l41_error_release(struct device *dev, struct regmap *regmap, unsigned int mask) 473 { 474 regmap_write(regmap, CS35L41_PROTECT_REL_ERR_IGN, 0); 475 regmap_set_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask); 476 regmap_clear_bits(regmap, CS35L41_PROTECT_REL_ERR_IGN, mask); 477 } 478 479 /* Clear all errors to release safe mode. Global Enable must be cleared first. */ 480 static void cs35l41_irq_release(struct cs35l41_hda *cs35l41) 481 { 482 cs35l41_error_release(cs35l41->dev, cs35l41->regmap, cs35l41->irq_errors); 483 cs35l41->irq_errors = 0; 484 } 485 486 static void cs35l41_hda_playback_hook(struct device *dev, int action) 487 { 488 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 489 struct regmap *reg = cs35l41->regmap; 490 int ret = 0; 491 492 switch (action) { 493 case HDA_GEN_PCM_ACT_OPEN: 494 pm_runtime_get_sync(dev); 495 mutex_lock(&cs35l41->fw_mutex); 496 cs35l41->playback_started = true; 497 if (cs35l41->firmware_running) { 498 regmap_multi_reg_write(reg, cs35l41_hda_config_dsp, 499 ARRAY_SIZE(cs35l41_hda_config_dsp)); 500 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 501 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 502 1 << CS35L41_VMON_EN_SHIFT | 1 << CS35L41_IMON_EN_SHIFT); 503 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, 504 CSPL_MBOX_CMD_RESUME); 505 } else { 506 regmap_multi_reg_write(reg, cs35l41_hda_config, 507 ARRAY_SIZE(cs35l41_hda_config)); 508 } 509 ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, 510 CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); 511 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 512 regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00008001); 513 mutex_unlock(&cs35l41->fw_mutex); 514 break; 515 case HDA_GEN_PCM_ACT_PREPARE: 516 mutex_lock(&cs35l41->fw_mutex); 517 ret = cs35l41_global_enable(reg, cs35l41->hw_cfg.bst_type, 1, NULL); 518 mutex_unlock(&cs35l41->fw_mutex); 519 break; 520 case HDA_GEN_PCM_ACT_CLEANUP: 521 mutex_lock(&cs35l41->fw_mutex); 522 regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); 523 ret = cs35l41_global_enable(reg, cs35l41->hw_cfg.bst_type, 0, NULL); 524 mutex_unlock(&cs35l41->fw_mutex); 525 break; 526 case HDA_GEN_PCM_ACT_CLOSE: 527 mutex_lock(&cs35l41->fw_mutex); 528 ret = regmap_update_bits(reg, CS35L41_PWR_CTRL2, 529 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 530 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 531 regmap_write(reg, CS35L41_GPIO1_CTRL1, 0x00000001); 532 if (cs35l41->firmware_running) { 533 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, 534 CSPL_MBOX_CMD_PAUSE); 535 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 536 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 537 0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT); 538 } 539 cs35l41_irq_release(cs35l41); 540 cs35l41->playback_started = false; 541 mutex_unlock(&cs35l41->fw_mutex); 542 543 pm_runtime_mark_last_busy(dev); 544 pm_runtime_put_autosuspend(dev); 545 break; 546 default: 547 dev_warn(cs35l41->dev, "Playback action not supported: %d\n", action); 548 break; 549 } 550 551 if (ret) 552 dev_err(cs35l41->dev, "Regmap access fail: %d\n", ret); 553 } 554 555 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot, 556 unsigned int rx_num, unsigned int *rx_slot) 557 { 558 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 559 static const char * const channel_name[] = { "L", "R" }; 560 561 if (!cs35l41->amp_name) { 562 if (*rx_slot >= ARRAY_SIZE(channel_name)) 563 return -EINVAL; 564 565 cs35l41->amp_name = devm_kasprintf(cs35l41->dev, GFP_KERNEL, "%s%d", 566 channel_name[*rx_slot], cs35l41->channel_index); 567 if (!cs35l41->amp_name) 568 return -ENOMEM; 569 } 570 571 return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num, 572 rx_slot); 573 } 574 575 static void cs35l41_ready_for_reset(struct cs35l41_hda *cs35l41) 576 { 577 mutex_lock(&cs35l41->fw_mutex); 578 if (cs35l41->firmware_running) { 579 580 regcache_cache_only(cs35l41->regmap, false); 581 582 cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); 583 cs35l41_shutdown_dsp(cs35l41); 584 cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); 585 586 regcache_cache_only(cs35l41->regmap, true); 587 regcache_mark_dirty(cs35l41->regmap); 588 } 589 mutex_unlock(&cs35l41->fw_mutex); 590 } 591 592 static int cs35l41_system_suspend(struct device *dev) 593 { 594 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 595 int ret; 596 597 dev_dbg(cs35l41->dev, "System Suspend\n"); 598 599 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 600 dev_err_once(cs35l41->dev, "System Suspend not supported\n"); 601 return 0; /* don't block the whole system suspend */ 602 } 603 604 ret = pm_runtime_force_suspend(dev); 605 if (ret) 606 return ret; 607 608 /* Shutdown DSP before system suspend */ 609 cs35l41_ready_for_reset(cs35l41); 610 611 /* 612 * Reset GPIO may be shared, so cannot reset here. 613 * However beyond this point, amps may be powered down. 614 */ 615 return 0; 616 } 617 618 static int cs35l41_system_resume(struct device *dev) 619 { 620 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 621 int ret; 622 623 dev_dbg(cs35l41->dev, "System Resume\n"); 624 625 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 626 dev_err_once(cs35l41->dev, "System Resume not supported\n"); 627 return 0; /* don't block the whole system resume */ 628 } 629 630 if (cs35l41->reset_gpio) { 631 usleep_range(2000, 2100); 632 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 633 } 634 635 usleep_range(2000, 2100); 636 637 ret = pm_runtime_force_resume(dev); 638 639 mutex_lock(&cs35l41->fw_mutex); 640 if (!ret && cs35l41->request_fw_load && !cs35l41->fw_request_ongoing) { 641 cs35l41->fw_request_ongoing = true; 642 schedule_work(&cs35l41->fw_load_work); 643 } 644 mutex_unlock(&cs35l41->fw_mutex); 645 646 return ret; 647 } 648 649 static int cs35l41_runtime_idle(struct device *dev) 650 { 651 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 652 653 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) 654 return -EBUSY; /* suspend not supported yet on this model */ 655 return 0; 656 } 657 658 static int cs35l41_runtime_suspend(struct device *dev) 659 { 660 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 661 int ret = 0; 662 663 dev_dbg(cs35l41->dev, "Runtime Suspend\n"); 664 665 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 666 dev_dbg(cs35l41->dev, "Runtime Suspend not supported\n"); 667 return 0; 668 } 669 670 mutex_lock(&cs35l41->fw_mutex); 671 672 if (cs35l41->playback_started) { 673 regmap_multi_reg_write(cs35l41->regmap, cs35l41_hda_mute, 674 ARRAY_SIZE(cs35l41_hda_mute)); 675 cs35l41_global_enable(cs35l41->regmap, cs35l41->hw_cfg.bst_type, 0, NULL); 676 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 677 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 678 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 679 regmap_write(cs35l41->regmap, CS35L41_GPIO1_CTRL1, 0x00000001); 680 regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, 681 CS35L41_VMON_EN_MASK | CS35L41_IMON_EN_MASK, 682 0 << CS35L41_VMON_EN_SHIFT | 0 << CS35L41_IMON_EN_SHIFT); 683 cs35l41->playback_started = false; 684 } 685 686 if (cs35l41->firmware_running) { 687 ret = cs35l41_enter_hibernate(cs35l41->dev, cs35l41->regmap, 688 cs35l41->hw_cfg.bst_type); 689 if (ret) 690 goto err; 691 } else { 692 cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type); 693 } 694 695 regcache_cache_only(cs35l41->regmap, true); 696 regcache_mark_dirty(cs35l41->regmap); 697 698 err: 699 mutex_unlock(&cs35l41->fw_mutex); 700 701 return ret; 702 } 703 704 static int cs35l41_runtime_resume(struct device *dev) 705 { 706 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 707 int ret = 0; 708 709 dev_dbg(cs35l41->dev, "Runtime Resume\n"); 710 711 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST_NO_VSPK_SWITCH) { 712 dev_dbg(cs35l41->dev, "Runtime Resume not supported\n"); 713 return 0; 714 } 715 716 mutex_lock(&cs35l41->fw_mutex); 717 718 regcache_cache_only(cs35l41->regmap, false); 719 720 if (cs35l41->firmware_running) { 721 ret = cs35l41_exit_hibernate(cs35l41->dev, cs35l41->regmap); 722 if (ret) { 723 dev_warn(cs35l41->dev, "Unable to exit Hibernate."); 724 goto err; 725 } 726 } 727 728 /* Test key needs to be unlocked to allow the OTP settings to re-apply */ 729 cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 730 ret = regcache_sync(cs35l41->regmap); 731 cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 732 if (ret) { 733 dev_err(cs35l41->dev, "Failed to restore register cache: %d\n", ret); 734 goto err; 735 } 736 737 if (cs35l41->hw_cfg.bst_type == CS35L41_EXT_BOOST) 738 cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, &cs35l41->hw_cfg); 739 740 err: 741 mutex_unlock(&cs35l41->fw_mutex); 742 743 return ret; 744 } 745 746 static int cs35l41_smart_amp(struct cs35l41_hda *cs35l41) 747 { 748 __be32 halo_sts; 749 int ret; 750 751 ret = cs35l41_init_dsp(cs35l41); 752 if (ret) { 753 dev_warn(cs35l41->dev, "Cannot Initialize Firmware. Error: %d\n", ret); 754 goto clean_dsp; 755 } 756 757 ret = cs35l41_write_fs_errata(cs35l41->dev, cs35l41->regmap); 758 if (ret) { 759 dev_err(cs35l41->dev, "Cannot Write FS Errata: %d\n", ret); 760 goto clean_dsp; 761 } 762 763 ret = cs_dsp_run(&cs35l41->cs_dsp); 764 if (ret) { 765 dev_err(cs35l41->dev, "Fail to start dsp: %d\n", ret); 766 goto clean_dsp; 767 } 768 769 ret = read_poll_timeout(hda_cs_dsp_read_ctl, ret, 770 be32_to_cpu(halo_sts) == HALO_STATE_CODE_RUN, 771 1000, 15000, false, &cs35l41->cs_dsp, HALO_STATE_DSP_CTL_NAME, 772 HALO_STATE_DSP_CTL_TYPE, HALO_STATE_DSP_CTL_ALG, 773 &halo_sts, sizeof(halo_sts)); 774 775 if (ret) { 776 dev_err(cs35l41->dev, "Timeout waiting for HALO Core to start. State: %u\n", 777 halo_sts); 778 goto clean_dsp; 779 } 780 781 cs35l41_set_cspl_mbox_cmd(cs35l41->dev, cs35l41->regmap, CSPL_MBOX_CMD_PAUSE); 782 cs35l41->firmware_running = true; 783 784 return 0; 785 786 clean_dsp: 787 cs35l41_shutdown_dsp(cs35l41); 788 return ret; 789 } 790 791 static void cs35l41_load_firmware(struct cs35l41_hda *cs35l41, bool load) 792 { 793 if (cs35l41->firmware_running && !load) { 794 dev_dbg(cs35l41->dev, "Unloading Firmware\n"); 795 cs35l41_shutdown_dsp(cs35l41); 796 } else if (!cs35l41->firmware_running && load) { 797 dev_dbg(cs35l41->dev, "Loading Firmware\n"); 798 cs35l41_smart_amp(cs35l41); 799 } else { 800 dev_dbg(cs35l41->dev, "Unable to Load firmware.\n"); 801 } 802 } 803 804 static int cs35l41_fw_load_ctl_get(struct snd_kcontrol *kcontrol, 805 struct snd_ctl_elem_value *ucontrol) 806 { 807 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 808 809 ucontrol->value.integer.value[0] = cs35l41->request_fw_load; 810 return 0; 811 } 812 813 static void cs35l41_fw_load_work(struct work_struct *work) 814 { 815 struct cs35l41_hda *cs35l41 = container_of(work, struct cs35l41_hda, fw_load_work); 816 817 pm_runtime_get_sync(cs35l41->dev); 818 819 mutex_lock(&cs35l41->fw_mutex); 820 821 /* Recheck if playback is ongoing, mutex will block playback during firmware loading */ 822 if (cs35l41->playback_started) 823 dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback. Retrying...\n"); 824 else 825 cs35l41_load_firmware(cs35l41, cs35l41->request_fw_load); 826 827 cs35l41->fw_request_ongoing = false; 828 mutex_unlock(&cs35l41->fw_mutex); 829 830 pm_runtime_mark_last_busy(cs35l41->dev); 831 pm_runtime_put_autosuspend(cs35l41->dev); 832 } 833 834 static int cs35l41_fw_load_ctl_put(struct snd_kcontrol *kcontrol, 835 struct snd_ctl_elem_value *ucontrol) 836 { 837 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 838 839 if (cs35l41->request_fw_load == ucontrol->value.integer.value[0]) 840 return 0; 841 842 if (cs35l41->fw_request_ongoing) { 843 dev_dbg(cs35l41->dev, "Existing request not complete\n"); 844 return -EBUSY; 845 } 846 847 /* Check if playback is ongoing when initial request is made */ 848 if (cs35l41->playback_started) { 849 dev_err(cs35l41->dev, "Cannot Load/Unload firmware during Playback\n"); 850 return -EBUSY; 851 } 852 853 cs35l41->fw_request_ongoing = true; 854 cs35l41->request_fw_load = ucontrol->value.integer.value[0]; 855 schedule_work(&cs35l41->fw_load_work); 856 857 return 1; 858 } 859 860 static int cs35l41_fw_type_ctl_get(struct snd_kcontrol *kcontrol, 861 struct snd_ctl_elem_value *ucontrol) 862 { 863 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 864 865 ucontrol->value.enumerated.item[0] = cs35l41->firmware_type; 866 867 return 0; 868 } 869 870 static int cs35l41_fw_type_ctl_put(struct snd_kcontrol *kcontrol, 871 struct snd_ctl_elem_value *ucontrol) 872 { 873 struct cs35l41_hda *cs35l41 = snd_kcontrol_chip(kcontrol); 874 875 if (ucontrol->value.enumerated.item[0] < HDA_CS_DSP_NUM_FW) { 876 if (cs35l41->firmware_type != ucontrol->value.enumerated.item[0]) { 877 cs35l41->firmware_type = ucontrol->value.enumerated.item[0]; 878 return 1; 879 } else { 880 return 0; 881 } 882 } 883 884 return -EINVAL; 885 } 886 887 static int cs35l41_fw_type_ctl_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 888 { 889 return snd_ctl_enum_info(uinfo, 1, ARRAY_SIZE(hda_cs_dsp_fw_ids), hda_cs_dsp_fw_ids); 890 } 891 892 static int cs35l41_create_controls(struct cs35l41_hda *cs35l41) 893 { 894 char fw_type_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 895 char fw_load_ctl_name[SNDRV_CTL_ELEM_ID_NAME_MAXLEN]; 896 struct snd_kcontrol_new fw_type_ctl = { 897 .name = fw_type_ctl_name, 898 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 899 .info = cs35l41_fw_type_ctl_info, 900 .get = cs35l41_fw_type_ctl_get, 901 .put = cs35l41_fw_type_ctl_put, 902 }; 903 struct snd_kcontrol_new fw_load_ctl = { 904 .name = fw_load_ctl_name, 905 .iface = SNDRV_CTL_ELEM_IFACE_CARD, 906 .info = snd_ctl_boolean_mono_info, 907 .get = cs35l41_fw_load_ctl_get, 908 .put = cs35l41_fw_load_ctl_put, 909 }; 910 int ret; 911 912 scnprintf(fw_type_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Type", 913 cs35l41->amp_name); 914 scnprintf(fw_load_ctl_name, SNDRV_CTL_ELEM_ID_NAME_MAXLEN, "%s DSP1 Firmware Load", 915 cs35l41->amp_name); 916 917 ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_type_ctl, cs35l41)); 918 if (ret) { 919 dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_type_ctl.name, ret); 920 return ret; 921 } 922 923 dev_dbg(cs35l41->dev, "Added Control %s\n", fw_type_ctl.name); 924 925 ret = snd_ctl_add(cs35l41->codec->card, snd_ctl_new1(&fw_load_ctl, cs35l41)); 926 if (ret) { 927 dev_err(cs35l41->dev, "Failed to add KControl %s = %d\n", fw_load_ctl.name, ret); 928 return ret; 929 } 930 931 dev_dbg(cs35l41->dev, "Added Control %s\n", fw_load_ctl.name); 932 933 return 0; 934 } 935 936 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data) 937 { 938 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 939 struct hda_component *comps = master_data; 940 int ret = 0; 941 942 if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS) 943 return -EINVAL; 944 945 comps = &comps[cs35l41->index]; 946 if (comps->dev) 947 return -EBUSY; 948 949 pm_runtime_get_sync(dev); 950 951 mutex_lock(&cs35l41->fw_mutex); 952 953 comps->dev = dev; 954 if (!cs35l41->acpi_subsystem_id) 955 cs35l41->acpi_subsystem_id = kasprintf(GFP_KERNEL, "%.8x", 956 comps->codec->core.subsystem_id); 957 cs35l41->codec = comps->codec; 958 strscpy(comps->name, dev_name(dev), sizeof(comps->name)); 959 960 cs35l41->firmware_type = HDA_CS_DSP_FW_SPK_PROT; 961 962 if (firmware_autostart) { 963 dev_dbg(cs35l41->dev, "Firmware Autostart.\n"); 964 cs35l41->request_fw_load = true; 965 if (cs35l41_smart_amp(cs35l41) < 0) 966 dev_warn(cs35l41->dev, "Cannot Run Firmware, reverting to dsp bypass...\n"); 967 } else { 968 dev_dbg(cs35l41->dev, "Firmware Autostart is disabled.\n"); 969 } 970 971 ret = cs35l41_create_controls(cs35l41); 972 973 comps->playback_hook = cs35l41_hda_playback_hook; 974 975 mutex_unlock(&cs35l41->fw_mutex); 976 977 pm_runtime_mark_last_busy(dev); 978 pm_runtime_put_autosuspend(dev); 979 980 return ret; 981 } 982 983 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data) 984 { 985 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 986 struct hda_component *comps = master_data; 987 988 if (comps[cs35l41->index].dev == dev) 989 memset(&comps[cs35l41->index], 0, sizeof(*comps)); 990 } 991 992 static const struct component_ops cs35l41_hda_comp_ops = { 993 .bind = cs35l41_hda_bind, 994 .unbind = cs35l41_hda_unbind, 995 }; 996 997 static irqreturn_t cs35l41_bst_short_err(int irq, void *data) 998 { 999 struct cs35l41_hda *cs35l41 = data; 1000 1001 dev_crit_ratelimited(cs35l41->dev, "LBST Error\n"); 1002 set_bit(CS35L41_BST_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1003 1004 return IRQ_HANDLED; 1005 } 1006 1007 static irqreturn_t cs35l41_bst_dcm_uvp_err(int irq, void *data) 1008 { 1009 struct cs35l41_hda *cs35l41 = data; 1010 1011 dev_crit_ratelimited(cs35l41->dev, "DCM VBST Under Voltage Error\n"); 1012 set_bit(CS35L41_BST_UVP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1013 1014 return IRQ_HANDLED; 1015 } 1016 1017 static irqreturn_t cs35l41_bst_ovp_err(int irq, void *data) 1018 { 1019 struct cs35l41_hda *cs35l41 = data; 1020 1021 dev_crit_ratelimited(cs35l41->dev, "VBST Over Voltage error\n"); 1022 set_bit(CS35L41_BST_OVP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1023 1024 return IRQ_HANDLED; 1025 } 1026 1027 static irqreturn_t cs35l41_temp_err(int irq, void *data) 1028 { 1029 struct cs35l41_hda *cs35l41 = data; 1030 1031 dev_crit_ratelimited(cs35l41->dev, "Over temperature error\n"); 1032 set_bit(CS35L41_TEMP_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1033 1034 return IRQ_HANDLED; 1035 } 1036 1037 static irqreturn_t cs35l41_temp_warn(int irq, void *data) 1038 { 1039 struct cs35l41_hda *cs35l41 = data; 1040 1041 dev_crit_ratelimited(cs35l41->dev, "Over temperature warning\n"); 1042 set_bit(CS35L41_TEMP_WARN_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1043 1044 return IRQ_HANDLED; 1045 } 1046 1047 static irqreturn_t cs35l41_amp_short(int irq, void *data) 1048 { 1049 struct cs35l41_hda *cs35l41 = data; 1050 1051 dev_crit_ratelimited(cs35l41->dev, "Amp short error\n"); 1052 set_bit(CS35L41_AMP_SHORT_ERR_RLS_SHIFT, &cs35l41->irq_errors); 1053 1054 return IRQ_HANDLED; 1055 } 1056 1057 static const struct cs35l41_irq cs35l41_irqs[] = { 1058 CS35L41_IRQ(BST_OVP_ERR, "Boost Overvoltage Error", cs35l41_bst_ovp_err), 1059 CS35L41_IRQ(BST_DCM_UVP_ERR, "Boost Undervoltage Error", cs35l41_bst_dcm_uvp_err), 1060 CS35L41_IRQ(BST_SHORT_ERR, "Boost Inductor Short Error", cs35l41_bst_short_err), 1061 CS35L41_IRQ(TEMP_WARN, "Temperature Warning", cs35l41_temp_warn), 1062 CS35L41_IRQ(TEMP_ERR, "Temperature Error", cs35l41_temp_err), 1063 CS35L41_IRQ(AMP_SHORT_ERR, "Amp Short", cs35l41_amp_short), 1064 }; 1065 1066 static const struct regmap_irq cs35l41_reg_irqs[] = { 1067 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_OVP_ERR), 1068 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_DCM_UVP_ERR), 1069 CS35L41_REG_IRQ(IRQ1_STATUS1, BST_SHORT_ERR), 1070 CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_WARN), 1071 CS35L41_REG_IRQ(IRQ1_STATUS1, TEMP_ERR), 1072 CS35L41_REG_IRQ(IRQ1_STATUS1, AMP_SHORT_ERR), 1073 }; 1074 1075 static struct regmap_irq_chip cs35l41_regmap_irq_chip = { 1076 .name = "cs35l41 IRQ1 Controller", 1077 .status_base = CS35L41_IRQ1_STATUS1, 1078 .mask_base = CS35L41_IRQ1_MASK1, 1079 .ack_base = CS35L41_IRQ1_STATUS1, 1080 .num_regs = 4, 1081 .irqs = cs35l41_reg_irqs, 1082 .num_irqs = ARRAY_SIZE(cs35l41_reg_irqs), 1083 .runtime_pm = true, 1084 }; 1085 1086 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) 1087 { 1088 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1089 bool using_irq = false; 1090 int irq, irq_pol; 1091 int ret; 1092 int i; 1093 1094 if (!cs35l41->hw_cfg.valid) 1095 return -EINVAL; 1096 1097 ret = cs35l41_init_boost(cs35l41->dev, cs35l41->regmap, hw_cfg); 1098 if (ret) 1099 return ret; 1100 1101 if (hw_cfg->gpio1.valid) { 1102 switch (hw_cfg->gpio1.func) { 1103 case CS35L41_NOT_USED: 1104 break; 1105 case CS35l41_VSPK_SWITCH: 1106 hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO; 1107 hw_cfg->gpio1.out_en = true; 1108 break; 1109 case CS35l41_SYNC: 1110 hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC; 1111 break; 1112 default: 1113 dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", 1114 hw_cfg->gpio1.func); 1115 return -EINVAL; 1116 } 1117 } 1118 1119 if (hw_cfg->gpio2.valid) { 1120 switch (hw_cfg->gpio2.func) { 1121 case CS35L41_NOT_USED: 1122 break; 1123 case CS35L41_INTERRUPT: 1124 using_irq = true; 1125 hw_cfg->gpio2.func = CS35L41_GPIO2_INT_OPEN_DRAIN; 1126 break; 1127 default: 1128 dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func); 1129 return -EINVAL; 1130 } 1131 } 1132 1133 irq_pol = cs35l41_gpio_config(cs35l41->regmap, hw_cfg); 1134 1135 if (cs35l41->irq && using_irq) { 1136 ret = devm_regmap_add_irq_chip(cs35l41->dev, cs35l41->regmap, cs35l41->irq, 1137 IRQF_ONESHOT | IRQF_SHARED | irq_pol, 1138 0, &cs35l41_regmap_irq_chip, &cs35l41->irq_data); 1139 if (ret) 1140 return ret; 1141 1142 for (i = 0; i < ARRAY_SIZE(cs35l41_irqs); i++) { 1143 irq = regmap_irq_get_virq(cs35l41->irq_data, cs35l41_irqs[i].irq); 1144 if (irq < 0) 1145 return irq; 1146 1147 ret = devm_request_threaded_irq(cs35l41->dev, irq, NULL, 1148 cs35l41_irqs[i].handler, 1149 IRQF_ONESHOT | IRQF_SHARED | irq_pol, 1150 cs35l41_irqs[i].name, cs35l41); 1151 if (ret) 1152 return ret; 1153 } 1154 } 1155 1156 return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); 1157 } 1158 1159 static int cs35l41_get_speaker_id(struct device *dev, int amp_index, 1160 int num_amps, int fixed_gpio_id) 1161 { 1162 struct gpio_desc *speaker_id_desc; 1163 int speaker_id = -ENODEV; 1164 1165 if (fixed_gpio_id >= 0) { 1166 dev_dbg(dev, "Found Fixed Speaker ID GPIO (index = %d)\n", fixed_gpio_id); 1167 speaker_id_desc = gpiod_get_index(dev, NULL, fixed_gpio_id, GPIOD_IN); 1168 if (IS_ERR(speaker_id_desc)) { 1169 speaker_id = PTR_ERR(speaker_id_desc); 1170 return speaker_id; 1171 } 1172 speaker_id = gpiod_get_value_cansleep(speaker_id_desc); 1173 gpiod_put(speaker_id_desc); 1174 dev_dbg(dev, "Speaker ID = %d\n", speaker_id); 1175 } else { 1176 int base_index; 1177 int gpios_per_amp; 1178 int count; 1179 int tmp; 1180 int i; 1181 1182 count = gpiod_count(dev, "spk-id"); 1183 if (count > 0) { 1184 speaker_id = 0; 1185 gpios_per_amp = count / num_amps; 1186 base_index = gpios_per_amp * amp_index; 1187 1188 if (count % num_amps) 1189 return -EINVAL; 1190 1191 dev_dbg(dev, "Found %d Speaker ID GPIOs per Amp\n", gpios_per_amp); 1192 1193 for (i = 0; i < gpios_per_amp; i++) { 1194 speaker_id_desc = gpiod_get_index(dev, "spk-id", i + base_index, 1195 GPIOD_IN); 1196 if (IS_ERR(speaker_id_desc)) { 1197 speaker_id = PTR_ERR(speaker_id_desc); 1198 break; 1199 } 1200 tmp = gpiod_get_value_cansleep(speaker_id_desc); 1201 gpiod_put(speaker_id_desc); 1202 if (tmp < 0) { 1203 speaker_id = tmp; 1204 break; 1205 } 1206 speaker_id |= tmp << i; 1207 } 1208 dev_dbg(dev, "Speaker ID = %d\n", speaker_id); 1209 } 1210 } 1211 return speaker_id; 1212 } 1213 1214 /* 1215 * Device CLSA010(0/1) doesn't have _DSD so a gpiod_get by the label reset won't work. 1216 * And devices created by serial-multi-instantiate don't have their device struct 1217 * pointing to the correct fwnode, so acpi_dev must be used here. 1218 * And devm functions expect that the device requesting the resource has the correct 1219 * fwnode. 1220 */ 1221 static int cs35l41_no_acpi_dsd(struct cs35l41_hda *cs35l41, struct device *physdev, int id, 1222 const char *hid) 1223 { 1224 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1225 1226 /* check I2C address to assign the index */ 1227 cs35l41->index = id == 0x40 ? 0 : 1; 1228 cs35l41->channel_index = 0; 1229 cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); 1230 cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, 0, 0, 2); 1231 hw_cfg->spk_pos = cs35l41->index; 1232 hw_cfg->gpio2.func = CS35L41_INTERRUPT; 1233 hw_cfg->gpio2.valid = true; 1234 hw_cfg->valid = true; 1235 1236 if (strncmp(hid, "CLSA0100", 8) == 0) { 1237 hw_cfg->bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH; 1238 } else if (strncmp(hid, "CLSA0101", 8) == 0) { 1239 hw_cfg->bst_type = CS35L41_EXT_BOOST; 1240 hw_cfg->gpio1.func = CS35l41_VSPK_SWITCH; 1241 hw_cfg->gpio1.valid = true; 1242 } else { 1243 /* 1244 * Note: CLSA010(0/1) are special cases which use a slightly different design. 1245 * All other HIDs e.g. CSC3551 require valid ACPI _DSD properties to be supported. 1246 */ 1247 dev_err(cs35l41->dev, "Error: ACPI _DSD Properties are missing for HID %s.\n", hid); 1248 hw_cfg->valid = false; 1249 hw_cfg->gpio1.valid = false; 1250 hw_cfg->gpio2.valid = false; 1251 return -EINVAL; 1252 } 1253 1254 return 0; 1255 } 1256 1257 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id) 1258 { 1259 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 1260 u32 values[HDA_MAX_COMPONENTS]; 1261 struct acpi_device *adev; 1262 struct device *physdev; 1263 const char *sub; 1264 char *property; 1265 size_t nval; 1266 int i, ret; 1267 1268 adev = acpi_dev_get_first_match_dev(hid, NULL, -1); 1269 if (!adev) { 1270 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid); 1271 return -ENODEV; 1272 } 1273 1274 physdev = get_device(acpi_get_first_physical_node(adev)); 1275 acpi_dev_put(adev); 1276 1277 sub = acpi_get_subsystem_id(ACPI_HANDLE(physdev)); 1278 if (IS_ERR(sub)) 1279 sub = NULL; 1280 cs35l41->acpi_subsystem_id = sub; 1281 1282 property = "cirrus,dev-index"; 1283 ret = device_property_count_u32(physdev, property); 1284 if (ret <= 0) { 1285 ret = cs35l41_no_acpi_dsd(cs35l41, physdev, id, hid); 1286 goto err_put_physdev; 1287 } 1288 if (ret > ARRAY_SIZE(values)) { 1289 ret = -EINVAL; 1290 goto err; 1291 } 1292 nval = ret; 1293 1294 ret = device_property_read_u32_array(physdev, property, values, nval); 1295 if (ret) 1296 goto err; 1297 1298 cs35l41->index = -1; 1299 for (i = 0; i < nval; i++) { 1300 if (values[i] == id) { 1301 cs35l41->index = i; 1302 break; 1303 } 1304 } 1305 if (cs35l41->index == -1) { 1306 dev_err(cs35l41->dev, "No index found in %s\n", property); 1307 ret = -ENODEV; 1308 goto err; 1309 } 1310 1311 /* To use the same release code for all laptop variants we can't use devm_ version of 1312 * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node 1313 */ 1314 cs35l41->reset_gpio = fwnode_gpiod_get_index(acpi_fwnode_handle(adev), "reset", cs35l41->index, 1315 GPIOD_OUT_LOW, "cs35l41-reset"); 1316 1317 property = "cirrus,speaker-position"; 1318 ret = device_property_read_u32_array(physdev, property, values, nval); 1319 if (ret) 1320 goto err; 1321 hw_cfg->spk_pos = values[cs35l41->index]; 1322 1323 cs35l41->channel_index = 0; 1324 for (i = 0; i < cs35l41->index; i++) 1325 if (values[i] == hw_cfg->spk_pos) 1326 cs35l41->channel_index++; 1327 1328 property = "cirrus,gpio1-func"; 1329 ret = device_property_read_u32_array(physdev, property, values, nval); 1330 if (ret) 1331 goto err; 1332 hw_cfg->gpio1.func = values[cs35l41->index]; 1333 hw_cfg->gpio1.valid = true; 1334 1335 property = "cirrus,gpio2-func"; 1336 ret = device_property_read_u32_array(physdev, property, values, nval); 1337 if (ret) 1338 goto err; 1339 hw_cfg->gpio2.func = values[cs35l41->index]; 1340 hw_cfg->gpio2.valid = true; 1341 1342 property = "cirrus,boost-peak-milliamp"; 1343 ret = device_property_read_u32_array(physdev, property, values, nval); 1344 if (ret == 0) 1345 hw_cfg->bst_ipk = values[cs35l41->index]; 1346 else 1347 hw_cfg->bst_ipk = -1; 1348 1349 property = "cirrus,boost-ind-nanohenry"; 1350 ret = device_property_read_u32_array(physdev, property, values, nval); 1351 if (ret == 0) 1352 hw_cfg->bst_ind = values[cs35l41->index]; 1353 else 1354 hw_cfg->bst_ind = -1; 1355 1356 property = "cirrus,boost-cap-microfarad"; 1357 ret = device_property_read_u32_array(physdev, property, values, nval); 1358 if (ret == 0) 1359 hw_cfg->bst_cap = values[cs35l41->index]; 1360 else 1361 hw_cfg->bst_cap = -1; 1362 1363 cs35l41->speaker_id = cs35l41_get_speaker_id(physdev, cs35l41->index, nval, -1); 1364 1365 if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) 1366 hw_cfg->bst_type = CS35L41_INT_BOOST; 1367 else 1368 hw_cfg->bst_type = CS35L41_EXT_BOOST; 1369 1370 hw_cfg->valid = true; 1371 put_device(physdev); 1372 1373 return 0; 1374 1375 err: 1376 dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret); 1377 err_put_physdev: 1378 put_device(physdev); 1379 1380 return ret; 1381 } 1382 1383 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq, 1384 struct regmap *regmap) 1385 { 1386 unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status; 1387 struct cs35l41_hda *cs35l41; 1388 int ret; 1389 1390 BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != ARRAY_SIZE(cs35l41_reg_irqs)); 1391 BUILD_BUG_ON(ARRAY_SIZE(cs35l41_irqs) != CS35L41_NUM_IRQ); 1392 1393 if (IS_ERR(regmap)) 1394 return PTR_ERR(regmap); 1395 1396 cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL); 1397 if (!cs35l41) 1398 return -ENOMEM; 1399 1400 cs35l41->dev = dev; 1401 cs35l41->irq = irq; 1402 cs35l41->regmap = regmap; 1403 dev_set_drvdata(dev, cs35l41); 1404 1405 ret = cs35l41_hda_read_acpi(cs35l41, device_name, id); 1406 if (ret) 1407 return dev_err_probe(cs35l41->dev, ret, "Platform not supported\n"); 1408 1409 if (IS_ERR(cs35l41->reset_gpio)) { 1410 ret = PTR_ERR(cs35l41->reset_gpio); 1411 cs35l41->reset_gpio = NULL; 1412 if (ret == -EBUSY) { 1413 dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n"); 1414 } else { 1415 dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO\n"); 1416 goto err; 1417 } 1418 } 1419 if (cs35l41->reset_gpio) { 1420 usleep_range(2000, 2100); 1421 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 1422 } 1423 1424 usleep_range(2000, 2100); 1425 1426 ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status, 1427 int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000); 1428 if (ret) { 1429 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret); 1430 goto err; 1431 } 1432 1433 ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts); 1434 if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) { 1435 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n", 1436 int_sts & CS35L41_OTP_BOOT_ERR, ret); 1437 ret = -EIO; 1438 goto err; 1439 } 1440 1441 ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id); 1442 if (ret) { 1443 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret); 1444 goto err; 1445 } 1446 1447 ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid); 1448 if (ret) { 1449 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret); 1450 goto err; 1451 } 1452 1453 mtl_revid = reg_revid & CS35L41_MTLREVID_MASK; 1454 1455 chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID; 1456 if (regid != chipid) { 1457 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid); 1458 ret = -ENODEV; 1459 goto err; 1460 } 1461 1462 ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 1463 if (ret) 1464 goto err; 1465 1466 ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid); 1467 if (ret) 1468 goto err; 1469 1470 ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap); 1471 if (ret) { 1472 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret); 1473 goto err; 1474 } 1475 1476 ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 1477 if (ret) 1478 goto err; 1479 1480 INIT_WORK(&cs35l41->fw_load_work, cs35l41_fw_load_work); 1481 mutex_init(&cs35l41->fw_mutex); 1482 1483 pm_runtime_set_autosuspend_delay(cs35l41->dev, 3000); 1484 pm_runtime_use_autosuspend(cs35l41->dev); 1485 pm_runtime_mark_last_busy(cs35l41->dev); 1486 pm_runtime_set_active(cs35l41->dev); 1487 pm_runtime_get_noresume(cs35l41->dev); 1488 pm_runtime_enable(cs35l41->dev); 1489 1490 ret = cs35l41_hda_apply_properties(cs35l41); 1491 if (ret) 1492 goto err_pm; 1493 1494 pm_runtime_put_autosuspend(cs35l41->dev); 1495 1496 ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops); 1497 if (ret) { 1498 dev_err(cs35l41->dev, "Register component failed: %d\n", ret); 1499 pm_runtime_disable(cs35l41->dev); 1500 goto err; 1501 } 1502 1503 dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid); 1504 1505 return 0; 1506 1507 err_pm: 1508 pm_runtime_disable(cs35l41->dev); 1509 pm_runtime_put_noidle(cs35l41->dev); 1510 1511 err: 1512 if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type)) 1513 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 1514 gpiod_put(cs35l41->reset_gpio); 1515 kfree(cs35l41->acpi_subsystem_id); 1516 1517 return ret; 1518 } 1519 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41); 1520 1521 void cs35l41_hda_remove(struct device *dev) 1522 { 1523 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 1524 1525 pm_runtime_get_sync(cs35l41->dev); 1526 pm_runtime_disable(cs35l41->dev); 1527 1528 if (cs35l41->halo_initialized) 1529 cs35l41_remove_dsp(cs35l41); 1530 1531 component_del(cs35l41->dev, &cs35l41_hda_comp_ops); 1532 1533 pm_runtime_put_noidle(cs35l41->dev); 1534 1535 if (cs35l41_safe_reset(cs35l41->regmap, cs35l41->hw_cfg.bst_type)) 1536 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 1537 gpiod_put(cs35l41->reset_gpio); 1538 kfree(cs35l41->acpi_subsystem_id); 1539 } 1540 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41); 1541 1542 const struct dev_pm_ops cs35l41_hda_pm_ops = { 1543 RUNTIME_PM_OPS(cs35l41_runtime_suspend, cs35l41_runtime_resume, 1544 cs35l41_runtime_idle) 1545 SYSTEM_SLEEP_PM_OPS(cs35l41_system_suspend, cs35l41_system_resume) 1546 }; 1547 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_pm_ops, SND_HDA_SCODEC_CS35L41); 1548 1549 MODULE_DESCRIPTION("CS35L41 HDA Driver"); 1550 MODULE_IMPORT_NS(SND_HDA_CS_DSP_CONTROLS); 1551 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>"); 1552 MODULE_LICENSE("GPL"); 1553 MODULE_IMPORT_NS(FW_CS_DSP); 1554