1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // CS35l41 ALSA HDA audio driver 4 // 5 // Copyright 2021 Cirrus Logic, Inc. 6 // 7 // Author: Lucas Tanure <tanureal@opensource.cirrus.com> 8 9 #include <linux/acpi.h> 10 #include <linux/module.h> 11 #include <sound/hda_codec.h> 12 #include "hda_local.h" 13 #include "hda_auto_parser.h" 14 #include "hda_jack.h" 15 #include "hda_generic.h" 16 #include "hda_component.h" 17 #include "cs35l41_hda.h" 18 19 static const struct reg_sequence cs35l41_hda_config[] = { 20 { CS35L41_PLL_CLK_CTRL, 0x00000430 }, // 3072000Hz, BCLK Input, PLL_REFCLK_EN = 1 21 { CS35L41_GLOBAL_CLK_CTRL, 0x00000003 }, // GLOBAL_FS = 48 kHz 22 { CS35L41_SP_ENABLES, 0x00010000 }, // ASP_RX1_EN = 1 23 { CS35L41_SP_RATE_CTRL, 0x00000021 }, // ASP_BCLK_FREQ = 3.072 MHz 24 { CS35L41_SP_FORMAT, 0x20200200 }, // 32 bits RX/TX slots, I2S, clk consumer 25 { CS35L41_DAC_PCM1_SRC, 0x00000008 }, // DACPCM1_SRC = ASPRX1 26 { CS35L41_AMP_DIG_VOL_CTRL, 0x00000000 }, // AMP_VOL_PCM 0.0 dB 27 { CS35L41_AMP_GAIN_CTRL, 0x00000084 }, // AMP_GAIN_PCM 4.5 dB 28 }; 29 30 static const struct reg_sequence cs35l41_hda_mute[] = { 31 { CS35L41_AMP_GAIN_CTRL, 0x00000000 }, // AMP_GAIN_PCM 0.5 dB 32 { CS35L41_AMP_DIG_VOL_CTRL, 0x0000A678 }, // AMP_VOL_PCM Mute 33 }; 34 35 static const struct reg_sequence cs35l41_hda_start_bst[] = { 36 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 37 }; 38 39 static const struct reg_sequence cs35l41_hda_stop_bst[] = { 40 { CS35L41_PWR_CTRL1, 0x00000000, 3000}, // set GLOBAL_EN = 0 41 }; 42 43 // only on amps where GPIO1 is used to control ext. VSPK switch 44 static const struct reg_sequence cs35l41_start_ext_vspk[] = { 45 { 0x00000040, 0x00000055 }, 46 { 0x00000040, 0x000000AA }, 47 { 0x00007438, 0x00585941 }, 48 { 0x00007414, 0x08C82222 }, 49 { 0x0000742C, 0x00000009 }, 50 { 0x00011008, 0x00008001 }, 51 { 0x0000742C, 0x0000000F }, 52 { 0x0000742C, 0x00000079 }, 53 { 0x00007438, 0x00585941 }, 54 { CS35L41_PWR_CTRL1, 0x00000001, 3000}, // set GLOBAL_EN = 1 55 { 0x0000742C, 0x000000F9 }, 56 { 0x00007438, 0x00580941 }, 57 { 0x00000040, 0x000000CC }, 58 { 0x00000040, 0x00000033 }, 59 }; 60 61 //only on amps where GPIO1 is used to control ext. VSPK switch 62 static const struct reg_sequence cs35l41_stop_ext_vspk[] = { 63 { 0x00000040, 0x00000055 }, 64 { 0x00000040, 0x000000AA }, 65 { 0x00007438, 0x00585941 }, 66 { 0x00002014, 0x00000000, 3000}, // set GLOBAL_EN = 0 67 { 0x0000742C, 0x00000009 }, 68 { 0x00007438, 0x00580941 }, 69 { 0x00011008, 0x00000001 }, 70 { 0x0000393C, 0x000000C0, 6000}, 71 { 0x0000393C, 0x00000000 }, 72 { 0x00007414, 0x00C82222 }, 73 { 0x0000742C, 0x00000000 }, 74 { 0x00000040, 0x000000CC }, 75 { 0x00000040, 0x00000033 }, 76 }; 77 78 static const struct reg_sequence cs35l41_safe_to_active[] = { 79 { 0x00000040, 0x00000055 }, 80 { 0x00000040, 0x000000AA }, 81 { 0x0000742C, 0x0000000F }, 82 { 0x0000742C, 0x00000079 }, 83 { 0x00007438, 0x00585941 }, 84 { CS35L41_PWR_CTRL1, 0x00000001, 2000 }, // GLOBAL_EN = 1 85 { 0x0000742C, 0x000000F9 }, 86 { 0x00007438, 0x00580941 }, 87 { 0x00000040, 0x000000CC }, 88 { 0x00000040, 0x00000033 }, 89 }; 90 91 static const struct reg_sequence cs35l41_active_to_safe[] = { 92 { 0x00000040, 0x00000055 }, 93 { 0x00000040, 0x000000AA }, 94 { 0x00007438, 0x00585941 }, 95 { CS35L41_PWR_CTRL1, 0x00000000 }, 96 { 0x0000742C, 0x00000009, 2000 }, 97 { 0x00007438, 0x00580941 }, 98 { 0x00000040, 0x000000CC }, 99 { 0x00000040, 0x00000033 }, 100 }; 101 102 static const struct reg_sequence cs35l41_reset_to_safe[] = { 103 { 0x00000040, 0x00000055 }, 104 { 0x00000040, 0x000000AA }, 105 { 0x00007438, 0x00585941 }, 106 { 0x00007414, 0x08C82222 }, 107 { 0x0000742C, 0x00000009 }, 108 { 0x00000040, 0x000000CC }, 109 { 0x00000040, 0x00000033 }, 110 }; 111 112 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_no_bst = { 113 .prepare = cs35l41_safe_to_active, 114 .num_prepare = ARRAY_SIZE(cs35l41_safe_to_active), 115 .cleanup = cs35l41_active_to_safe, 116 .num_cleanup = ARRAY_SIZE(cs35l41_active_to_safe), 117 }; 118 119 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_ext_bst = { 120 .prepare = cs35l41_start_ext_vspk, 121 .num_prepare = ARRAY_SIZE(cs35l41_start_ext_vspk), 122 .cleanup = cs35l41_stop_ext_vspk, 123 .num_cleanup = ARRAY_SIZE(cs35l41_stop_ext_vspk), 124 }; 125 126 static const struct cs35l41_hda_reg_sequence cs35l41_hda_reg_seq_int_bst = { 127 .prepare = cs35l41_hda_start_bst, 128 .num_prepare = ARRAY_SIZE(cs35l41_hda_start_bst), 129 .cleanup = cs35l41_hda_stop_bst, 130 .num_cleanup = ARRAY_SIZE(cs35l41_hda_stop_bst), 131 }; 132 133 static void cs35l41_hda_playback_hook(struct device *dev, int action) 134 { 135 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 136 const struct cs35l41_hda_reg_sequence *reg_seq = cs35l41->reg_seq; 137 struct regmap *reg = cs35l41->regmap; 138 int ret = 0; 139 140 switch (action) { 141 case HDA_GEN_PCM_ACT_OPEN: 142 ret = regmap_multi_reg_write(reg, cs35l41_hda_config, 143 ARRAY_SIZE(cs35l41_hda_config)); 144 regmap_update_bits(reg, CS35L41_PWR_CTRL2, 145 CS35L41_AMP_EN_MASK, 1 << CS35L41_AMP_EN_SHIFT); 146 break; 147 case HDA_GEN_PCM_ACT_PREPARE: 148 if (reg_seq->prepare) 149 ret = regmap_multi_reg_write(reg, reg_seq->prepare, reg_seq->num_prepare); 150 break; 151 case HDA_GEN_PCM_ACT_CLEANUP: 152 regmap_multi_reg_write(reg, cs35l41_hda_mute, ARRAY_SIZE(cs35l41_hda_mute)); 153 if (reg_seq->cleanup) 154 ret = regmap_multi_reg_write(reg, reg_seq->cleanup, reg_seq->num_cleanup); 155 break; 156 case HDA_GEN_PCM_ACT_CLOSE: 157 regmap_update_bits(reg, CS35L41_PWR_CTRL2, 158 CS35L41_AMP_EN_MASK, 0 << CS35L41_AMP_EN_SHIFT); 159 if (reg_seq->close) 160 ret = regmap_multi_reg_write(reg, reg_seq->close, reg_seq->num_close); 161 break; 162 default: 163 ret = -EINVAL; 164 break; 165 } 166 167 if (ret) 168 dev_warn(cs35l41->dev, "Failed to apply multi reg write: %d\n", ret); 169 } 170 171 static int cs35l41_hda_channel_map(struct device *dev, unsigned int tx_num, unsigned int *tx_slot, 172 unsigned int rx_num, unsigned int *rx_slot) 173 { 174 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 175 176 return cs35l41_set_channels(cs35l41->dev, cs35l41->regmap, tx_num, tx_slot, rx_num, 177 rx_slot); 178 } 179 180 static int cs35l41_hda_bind(struct device *dev, struct device *master, void *master_data) 181 { 182 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 183 struct hda_component *comps = master_data; 184 185 if (!comps || cs35l41->index < 0 || cs35l41->index >= HDA_MAX_COMPONENTS) 186 return -EINVAL; 187 188 comps = &comps[cs35l41->index]; 189 if (comps->dev) 190 return -EBUSY; 191 192 comps->dev = dev; 193 strscpy(comps->name, dev_name(dev), sizeof(comps->name)); 194 comps->playback_hook = cs35l41_hda_playback_hook; 195 comps->set_channel_map = cs35l41_hda_channel_map; 196 197 return 0; 198 } 199 200 static void cs35l41_hda_unbind(struct device *dev, struct device *master, void *master_data) 201 { 202 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 203 struct hda_component *comps = master_data; 204 205 if (comps[cs35l41->index].dev == dev) 206 memset(&comps[cs35l41->index], 0, sizeof(*comps)); 207 } 208 209 static const struct component_ops cs35l41_hda_comp_ops = { 210 .bind = cs35l41_hda_bind, 211 .unbind = cs35l41_hda_unbind, 212 }; 213 214 static int cs35l41_hda_apply_properties(struct cs35l41_hda *cs35l41) 215 { 216 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 217 int ret; 218 219 if (!cs35l41->hw_cfg.valid) 220 return -EINVAL; 221 222 switch (hw_cfg->bst_type) { 223 case CS35L41_INT_BOOST: 224 cs35l41->reg_seq = &cs35l41_hda_reg_seq_int_bst; 225 ret = cs35l41_boost_config(cs35l41->dev, cs35l41->regmap, 226 hw_cfg->bst_ind, hw_cfg->bst_cap, hw_cfg->bst_ipk); 227 if (ret) 228 return ret; 229 break; 230 case CS35L41_EXT_BOOST: 231 case CS35L41_EXT_BOOST_NO_VSPK_SWITCH: 232 if (hw_cfg->bst_type == CS35L41_EXT_BOOST) 233 cs35l41->reg_seq = &cs35l41_hda_reg_seq_ext_bst; 234 else 235 cs35l41->reg_seq = &cs35l41_hda_reg_seq_no_bst; 236 regmap_multi_reg_write(cs35l41->regmap, cs35l41_reset_to_safe, 237 ARRAY_SIZE(cs35l41_reset_to_safe)); 238 ret = regmap_update_bits(cs35l41->regmap, CS35L41_PWR_CTRL2, CS35L41_BST_EN_MASK, 239 CS35L41_BST_DIS_FET_OFF << CS35L41_BST_EN_SHIFT); 240 if (ret) 241 return ret; 242 break; 243 default: 244 dev_err(cs35l41->dev, "Boost type %d not supported\n", hw_cfg->bst_type); 245 return -EINVAL; 246 } 247 248 if (hw_cfg->gpio1.valid) { 249 switch (hw_cfg->gpio1.func) { 250 case CS35L41_NOT_USED: 251 break; 252 case CS35l41_VSPK_SWITCH: 253 hw_cfg->gpio1.func = CS35L41_GPIO1_GPIO; 254 hw_cfg->gpio1.out_en = true; 255 break; 256 case CS35l41_SYNC: 257 hw_cfg->gpio1.func = CS35L41_GPIO1_MDSYNC; 258 break; 259 default: 260 dev_err(cs35l41->dev, "Invalid function %d for GPIO1\n", 261 hw_cfg->gpio1.func); 262 return -EINVAL; 263 } 264 } 265 266 if (hw_cfg->gpio2.valid) { 267 switch (hw_cfg->gpio2.func) { 268 case CS35L41_NOT_USED: 269 break; 270 case CS35L41_INTERRUPT: 271 break; 272 default: 273 dev_err(cs35l41->dev, "Invalid GPIO2 function %d\n", hw_cfg->gpio2.func); 274 return -EINVAL; 275 } 276 } 277 278 cs35l41_gpio_config(cs35l41->regmap, hw_cfg); 279 280 return cs35l41_hda_channel_map(cs35l41->dev, 0, NULL, 1, &hw_cfg->spk_pos); 281 } 282 283 static int cs35l41_hda_read_acpi(struct cs35l41_hda *cs35l41, const char *hid, int id) 284 { 285 struct cs35l41_hw_cfg *hw_cfg = &cs35l41->hw_cfg; 286 u32 values[HDA_MAX_COMPONENTS]; 287 struct acpi_device *adev; 288 struct device *physdev; 289 char *property; 290 size_t nval; 291 int i, ret; 292 293 adev = acpi_dev_get_first_match_dev(hid, NULL, -1); 294 if (!adev) { 295 dev_err(cs35l41->dev, "Failed to find an ACPI device for %s\n", hid); 296 return -ENODEV; 297 } 298 299 physdev = get_device(acpi_get_first_physical_node(adev)); 300 acpi_dev_put(adev); 301 302 property = "cirrus,dev-index"; 303 ret = device_property_count_u32(physdev, property); 304 if (ret <= 0) 305 goto no_acpi_dsd; 306 307 if (ret > ARRAY_SIZE(values)) { 308 ret = -EINVAL; 309 goto err; 310 } 311 nval = ret; 312 313 ret = device_property_read_u32_array(physdev, property, values, nval); 314 if (ret) 315 goto err; 316 317 cs35l41->index = -1; 318 for (i = 0; i < nval; i++) { 319 if (values[i] == id) { 320 cs35l41->index = i; 321 break; 322 } 323 } 324 if (cs35l41->index == -1) { 325 dev_err(cs35l41->dev, "No index found in %s\n", property); 326 ret = -ENODEV; 327 goto err; 328 } 329 330 /* To use the same release code for all laptop variants we can't use devm_ version of 331 * gpiod_get here, as CLSA010* don't have a fully functional bios with an _DSD node 332 */ 333 cs35l41->reset_gpio = fwnode_gpiod_get_index(&adev->fwnode, "reset", cs35l41->index, 334 GPIOD_OUT_LOW, "cs35l41-reset"); 335 336 property = "cirrus,speaker-position"; 337 ret = device_property_read_u32_array(physdev, property, values, nval); 338 if (ret) 339 goto err; 340 hw_cfg->spk_pos = values[cs35l41->index]; 341 342 property = "cirrus,gpio1-func"; 343 ret = device_property_read_u32_array(physdev, property, values, nval); 344 if (ret) 345 goto err; 346 hw_cfg->gpio1.func = values[cs35l41->index]; 347 hw_cfg->gpio1.valid = true; 348 349 property = "cirrus,gpio2-func"; 350 ret = device_property_read_u32_array(physdev, property, values, nval); 351 if (ret) 352 goto err; 353 hw_cfg->gpio2.func = values[cs35l41->index]; 354 hw_cfg->gpio2.valid = true; 355 356 property = "cirrus,boost-peak-milliamp"; 357 ret = device_property_read_u32_array(physdev, property, values, nval); 358 if (ret == 0) 359 hw_cfg->bst_ipk = values[cs35l41->index]; 360 else 361 hw_cfg->bst_ipk = -1; 362 363 property = "cirrus,boost-ind-nanohenry"; 364 ret = device_property_read_u32_array(physdev, property, values, nval); 365 if (ret == 0) 366 hw_cfg->bst_ind = values[cs35l41->index]; 367 else 368 hw_cfg->bst_ind = -1; 369 370 property = "cirrus,boost-cap-microfarad"; 371 ret = device_property_read_u32_array(physdev, property, values, nval); 372 if (ret == 0) 373 hw_cfg->bst_cap = values[cs35l41->index]; 374 else 375 hw_cfg->bst_cap = -1; 376 377 if (hw_cfg->bst_ind > 0 || hw_cfg->bst_cap > 0 || hw_cfg->bst_ipk > 0) 378 hw_cfg->bst_type = CS35L41_INT_BOOST; 379 else 380 hw_cfg->bst_type = CS35L41_EXT_BOOST; 381 382 hw_cfg->valid = true; 383 put_device(physdev); 384 385 return 0; 386 387 err: 388 put_device(physdev); 389 dev_err(cs35l41->dev, "Failed property %s: %d\n", property, ret); 390 391 return ret; 392 393 no_acpi_dsd: 394 /* 395 * Device CLSA0100 doesn't have _DSD so a gpiod_get by the label reset won't work. 396 * And devices created by i2c-multi-instantiate don't have their device struct pointing to 397 * the correct fwnode, so acpi_dev must be used here. 398 * And devm functions expect that the device requesting the resource has the correct 399 * fwnode. 400 */ 401 if (strncmp(hid, "CLSA0100", 8) != 0) 402 return -EINVAL; 403 404 /* check I2C address to assign the index */ 405 cs35l41->index = id == 0x40 ? 0 : 1; 406 cs35l41->reset_gpio = gpiod_get_index(physdev, NULL, 0, GPIOD_OUT_HIGH); 407 cs35l41->hw_cfg.bst_type = CS35L41_EXT_BOOST_NO_VSPK_SWITCH; 408 cs35l41->hw_cfg.valid = true; 409 put_device(physdev); 410 411 return 0; 412 } 413 414 int cs35l41_hda_probe(struct device *dev, const char *device_name, int id, int irq, 415 struct regmap *regmap) 416 { 417 unsigned int int_sts, regid, reg_revid, mtl_revid, chipid, int_status; 418 struct cs35l41_hda *cs35l41; 419 int ret; 420 421 if (IS_ERR(regmap)) 422 return PTR_ERR(regmap); 423 424 cs35l41 = devm_kzalloc(dev, sizeof(*cs35l41), GFP_KERNEL); 425 if (!cs35l41) 426 return -ENOMEM; 427 428 cs35l41->dev = dev; 429 cs35l41->irq = irq; 430 cs35l41->regmap = regmap; 431 dev_set_drvdata(dev, cs35l41); 432 433 ret = cs35l41_hda_read_acpi(cs35l41, device_name, id); 434 if (ret) { 435 dev_err_probe(cs35l41->dev, ret, "Platform not supported %d\n", ret); 436 return ret; 437 } 438 439 if (IS_ERR(cs35l41->reset_gpio)) { 440 ret = PTR_ERR(cs35l41->reset_gpio); 441 cs35l41->reset_gpio = NULL; 442 if (ret == -EBUSY) { 443 dev_info(cs35l41->dev, "Reset line busy, assuming shared reset\n"); 444 } else { 445 dev_err_probe(cs35l41->dev, ret, "Failed to get reset GPIO: %d\n", ret); 446 goto err; 447 } 448 } 449 if (cs35l41->reset_gpio) { 450 usleep_range(2000, 2100); 451 gpiod_set_value_cansleep(cs35l41->reset_gpio, 1); 452 } 453 454 usleep_range(2000, 2100); 455 456 ret = regmap_read_poll_timeout(cs35l41->regmap, CS35L41_IRQ1_STATUS4, int_status, 457 int_status & CS35L41_OTP_BOOT_DONE, 1000, 100000); 458 if (ret) { 459 dev_err(cs35l41->dev, "Failed waiting for OTP_BOOT_DONE: %d\n", ret); 460 goto err; 461 } 462 463 ret = regmap_read(cs35l41->regmap, CS35L41_IRQ1_STATUS3, &int_sts); 464 if (ret || (int_sts & CS35L41_OTP_BOOT_ERR)) { 465 dev_err(cs35l41->dev, "OTP Boot status %x error: %d\n", 466 int_sts & CS35L41_OTP_BOOT_ERR, ret); 467 ret = -EIO; 468 goto err; 469 } 470 471 ret = regmap_read(cs35l41->regmap, CS35L41_DEVID, ®id); 472 if (ret) { 473 dev_err(cs35l41->dev, "Get Device ID failed: %d\n", ret); 474 goto err; 475 } 476 477 ret = regmap_read(cs35l41->regmap, CS35L41_REVID, ®_revid); 478 if (ret) { 479 dev_err(cs35l41->dev, "Get Revision ID failed: %d\n", ret); 480 goto err; 481 } 482 483 mtl_revid = reg_revid & CS35L41_MTLREVID_MASK; 484 485 chipid = (mtl_revid % 2) ? CS35L41R_CHIP_ID : CS35L41_CHIP_ID; 486 if (regid != chipid) { 487 dev_err(cs35l41->dev, "CS35L41 Device ID (%X). Expected ID %X\n", regid, chipid); 488 ret = -ENODEV; 489 goto err; 490 } 491 492 ret = cs35l41_test_key_unlock(cs35l41->dev, cs35l41->regmap); 493 if (ret) 494 goto err; 495 496 ret = cs35l41_register_errata_patch(cs35l41->dev, cs35l41->regmap, reg_revid); 497 if (ret) 498 goto err; 499 500 ret = cs35l41_otp_unpack(cs35l41->dev, cs35l41->regmap); 501 if (ret) { 502 dev_err(cs35l41->dev, "OTP Unpack failed: %d\n", ret); 503 goto err; 504 } 505 506 ret = cs35l41_test_key_lock(cs35l41->dev, cs35l41->regmap); 507 if (ret) 508 goto err; 509 510 ret = cs35l41_hda_apply_properties(cs35l41); 511 if (ret) 512 goto err; 513 514 if (cs35l41->reg_seq->probe) { 515 ret = regmap_multi_reg_write(cs35l41->regmap, cs35l41->reg_seq->probe, 516 cs35l41->reg_seq->num_probe); 517 if (ret) { 518 dev_err(cs35l41->dev, "Fail to apply probe reg patch: %d\n", ret); 519 goto err; 520 } 521 } 522 523 ret = component_add(cs35l41->dev, &cs35l41_hda_comp_ops); 524 if (ret) { 525 dev_err(cs35l41->dev, "Register component failed: %d\n", ret); 526 goto err; 527 } 528 529 dev_info(cs35l41->dev, "Cirrus Logic CS35L41 (%x), Revision: %02X\n", regid, reg_revid); 530 531 return 0; 532 533 err: 534 if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) 535 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 536 gpiod_put(cs35l41->reset_gpio); 537 538 return ret; 539 } 540 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_probe, SND_HDA_SCODEC_CS35L41); 541 542 void cs35l41_hda_remove(struct device *dev) 543 { 544 struct cs35l41_hda *cs35l41 = dev_get_drvdata(dev); 545 546 component_del(cs35l41->dev, &cs35l41_hda_comp_ops); 547 548 if (cs35l41->hw_cfg.bst_type != CS35L41_EXT_BOOST_NO_VSPK_SWITCH) 549 gpiod_set_value_cansleep(cs35l41->reset_gpio, 0); 550 gpiod_put(cs35l41->reset_gpio); 551 } 552 EXPORT_SYMBOL_NS_GPL(cs35l41_hda_remove, SND_HDA_SCODEC_CS35L41); 553 554 MODULE_DESCRIPTION("CS35L41 HDA Driver"); 555 MODULE_AUTHOR("Lucas Tanure, Cirrus Logic Inc, <tanureal@opensource.cirrus.com>"); 556 MODULE_LICENSE("GPL"); 557