1 /* 2 * The driver for the ForteMedia FM801 based soundcards 3 * Copyright (c) by Jaroslav Kysela <perex@suse.cz> 4 * 5 * Support FM only card by Andy Shevchenko <andy@smile.org.ua> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 * 21 */ 22 23 #include <sound/driver.h> 24 #include <linux/delay.h> 25 #include <linux/init.h> 26 #include <linux/interrupt.h> 27 #include <linux/pci.h> 28 #include <linux/slab.h> 29 #include <linux/moduleparam.h> 30 #include <sound/core.h> 31 #include <sound/pcm.h> 32 #include <sound/tlv.h> 33 #include <sound/ac97_codec.h> 34 #include <sound/mpu401.h> 35 #include <sound/opl3.h> 36 #include <sound/initval.h> 37 38 #include <asm/io.h> 39 40 #ifdef CONFIG_SND_FM801_TEA575X_BOOL 41 #include <sound/tea575x-tuner.h> 42 #define TEA575X_RADIO 1 43 #endif 44 45 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>"); 46 MODULE_DESCRIPTION("ForteMedia FM801"); 47 MODULE_LICENSE("GPL"); 48 MODULE_SUPPORTED_DEVICE("{{ForteMedia,FM801}," 49 "{Genius,SoundMaker Live 5.1}}"); 50 51 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 52 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 53 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 54 /* 55 * Enable TEA575x tuner 56 * 1 = MediaForte 256-PCS 57 * 2 = MediaForte 256-PCPR 58 * 3 = MediaForte 64-PCR 59 * 16 = setup tuner only (this is additional bit), i.e. SF-64-PCR FM card 60 * High 16-bits are video (radio) device number + 1 61 */ 62 static int tea575x_tuner[SNDRV_CARDS]; 63 64 module_param_array(index, int, NULL, 0444); 65 MODULE_PARM_DESC(index, "Index value for the FM801 soundcard."); 66 module_param_array(id, charp, NULL, 0444); 67 MODULE_PARM_DESC(id, "ID string for the FM801 soundcard."); 68 module_param_array(enable, bool, NULL, 0444); 69 MODULE_PARM_DESC(enable, "Enable FM801 soundcard."); 70 module_param_array(tea575x_tuner, int, NULL, 0444); 71 MODULE_PARM_DESC(tea575x_tuner, "Enable TEA575x tuner."); 72 73 /* 74 * Direct registers 75 */ 76 77 #define FM801_REG(chip, reg) (chip->port + FM801_##reg) 78 79 #define FM801_PCM_VOL 0x00 /* PCM Output Volume */ 80 #define FM801_FM_VOL 0x02 /* FM Output Volume */ 81 #define FM801_I2S_VOL 0x04 /* I2S Volume */ 82 #define FM801_REC_SRC 0x06 /* Record Source */ 83 #define FM801_PLY_CTRL 0x08 /* Playback Control */ 84 #define FM801_PLY_COUNT 0x0a /* Playback Count */ 85 #define FM801_PLY_BUF1 0x0c /* Playback Bufer I */ 86 #define FM801_PLY_BUF2 0x10 /* Playback Buffer II */ 87 #define FM801_CAP_CTRL 0x14 /* Capture Control */ 88 #define FM801_CAP_COUNT 0x16 /* Capture Count */ 89 #define FM801_CAP_BUF1 0x18 /* Capture Buffer I */ 90 #define FM801_CAP_BUF2 0x1c /* Capture Buffer II */ 91 #define FM801_CODEC_CTRL 0x22 /* Codec Control */ 92 #define FM801_I2S_MODE 0x24 /* I2S Mode Control */ 93 #define FM801_VOLUME 0x26 /* Volume Up/Down/Mute Status */ 94 #define FM801_I2C_CTRL 0x29 /* I2C Control */ 95 #define FM801_AC97_CMD 0x2a /* AC'97 Command */ 96 #define FM801_AC97_DATA 0x2c /* AC'97 Data */ 97 #define FM801_MPU401_DATA 0x30 /* MPU401 Data */ 98 #define FM801_MPU401_CMD 0x31 /* MPU401 Command */ 99 #define FM801_GPIO_CTRL 0x52 /* General Purpose I/O Control */ 100 #define FM801_GEN_CTRL 0x54 /* General Control */ 101 #define FM801_IRQ_MASK 0x56 /* Interrupt Mask */ 102 #define FM801_IRQ_STATUS 0x5a /* Interrupt Status */ 103 #define FM801_OPL3_BANK0 0x68 /* OPL3 Status Read / Bank 0 Write */ 104 #define FM801_OPL3_DATA0 0x69 /* OPL3 Data 0 Write */ 105 #define FM801_OPL3_BANK1 0x6a /* OPL3 Bank 1 Write */ 106 #define FM801_OPL3_DATA1 0x6b /* OPL3 Bank 1 Write */ 107 #define FM801_POWERDOWN 0x70 /* Blocks Power Down Control */ 108 109 /* codec access */ 110 #define FM801_AC97_READ (1<<7) /* read=1, write=0 */ 111 #define FM801_AC97_VALID (1<<8) /* port valid=1 */ 112 #define FM801_AC97_BUSY (1<<9) /* busy=1 */ 113 #define FM801_AC97_ADDR_SHIFT 10 /* codec id (2bit) */ 114 115 /* playback and record control register bits */ 116 #define FM801_BUF1_LAST (1<<1) 117 #define FM801_BUF2_LAST (1<<2) 118 #define FM801_START (1<<5) 119 #define FM801_PAUSE (1<<6) 120 #define FM801_IMMED_STOP (1<<7) 121 #define FM801_RATE_SHIFT 8 122 #define FM801_RATE_MASK (15 << FM801_RATE_SHIFT) 123 #define FM801_CHANNELS_4 (1<<12) /* playback only */ 124 #define FM801_CHANNELS_6 (2<<12) /* playback only */ 125 #define FM801_CHANNELS_6MS (3<<12) /* playback only */ 126 #define FM801_CHANNELS_MASK (3<<12) 127 #define FM801_16BIT (1<<14) 128 #define FM801_STEREO (1<<15) 129 130 /* IRQ status bits */ 131 #define FM801_IRQ_PLAYBACK (1<<8) 132 #define FM801_IRQ_CAPTURE (1<<9) 133 #define FM801_IRQ_VOLUME (1<<14) 134 #define FM801_IRQ_MPU (1<<15) 135 136 /* GPIO control register */ 137 #define FM801_GPIO_GP0 (1<<0) /* read/write */ 138 #define FM801_GPIO_GP1 (1<<1) 139 #define FM801_GPIO_GP2 (1<<2) 140 #define FM801_GPIO_GP3 (1<<3) 141 #define FM801_GPIO_GP(x) (1<<(0+(x))) 142 #define FM801_GPIO_GD0 (1<<8) /* directions: 1 = input, 0 = output*/ 143 #define FM801_GPIO_GD1 (1<<9) 144 #define FM801_GPIO_GD2 (1<<10) 145 #define FM801_GPIO_GD3 (1<<11) 146 #define FM801_GPIO_GD(x) (1<<(8+(x))) 147 #define FM801_GPIO_GS0 (1<<12) /* function select: */ 148 #define FM801_GPIO_GS1 (1<<13) /* 1 = GPIO */ 149 #define FM801_GPIO_GS2 (1<<14) /* 0 = other (S/PDIF, VOL) */ 150 #define FM801_GPIO_GS3 (1<<15) 151 #define FM801_GPIO_GS(x) (1<<(12+(x))) 152 153 /* 154 155 */ 156 157 struct fm801 { 158 int irq; 159 160 unsigned long port; /* I/O port number */ 161 unsigned int multichannel: 1, /* multichannel support */ 162 secondary: 1; /* secondary codec */ 163 unsigned char secondary_addr; /* address of the secondary codec */ 164 unsigned int tea575x_tuner; /* tuner flags */ 165 166 unsigned short ply_ctrl; /* playback control */ 167 unsigned short cap_ctrl; /* capture control */ 168 169 unsigned long ply_buffer; 170 unsigned int ply_buf; 171 unsigned int ply_count; 172 unsigned int ply_size; 173 unsigned int ply_pos; 174 175 unsigned long cap_buffer; 176 unsigned int cap_buf; 177 unsigned int cap_count; 178 unsigned int cap_size; 179 unsigned int cap_pos; 180 181 struct snd_ac97_bus *ac97_bus; 182 struct snd_ac97 *ac97; 183 struct snd_ac97 *ac97_sec; 184 185 struct pci_dev *pci; 186 struct snd_card *card; 187 struct snd_pcm *pcm; 188 struct snd_rawmidi *rmidi; 189 struct snd_pcm_substream *playback_substream; 190 struct snd_pcm_substream *capture_substream; 191 unsigned int p_dma_size; 192 unsigned int c_dma_size; 193 194 spinlock_t reg_lock; 195 struct snd_info_entry *proc_entry; 196 197 #ifdef TEA575X_RADIO 198 struct snd_tea575x tea; 199 #endif 200 201 #ifdef CONFIG_PM 202 u16 saved_regs[0x20]; 203 #endif 204 }; 205 206 static struct pci_device_id snd_fm801_ids[] = { 207 { 0x1319, 0x0801, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* FM801 */ 208 { 0x5213, 0x0510, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, 0, }, /* Gallant Odyssey Sound 4 */ 209 { 0, } 210 }; 211 212 MODULE_DEVICE_TABLE(pci, snd_fm801_ids); 213 214 /* 215 * common I/O routines 216 */ 217 218 static int snd_fm801_update_bits(struct fm801 *chip, unsigned short reg, 219 unsigned short mask, unsigned short value) 220 { 221 int change; 222 unsigned long flags; 223 unsigned short old, new; 224 225 spin_lock_irqsave(&chip->reg_lock, flags); 226 old = inw(chip->port + reg); 227 new = (old & ~mask) | value; 228 change = old != new; 229 if (change) 230 outw(new, chip->port + reg); 231 spin_unlock_irqrestore(&chip->reg_lock, flags); 232 return change; 233 } 234 235 static void snd_fm801_codec_write(struct snd_ac97 *ac97, 236 unsigned short reg, 237 unsigned short val) 238 { 239 struct fm801 *chip = ac97->private_data; 240 int idx; 241 242 /* 243 * Wait until the codec interface is not ready.. 244 */ 245 for (idx = 0; idx < 100; idx++) { 246 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 247 goto ok1; 248 udelay(10); 249 } 250 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); 251 return; 252 253 ok1: 254 /* write data and address */ 255 outw(val, FM801_REG(chip, AC97_DATA)); 256 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT), FM801_REG(chip, AC97_CMD)); 257 /* 258 * Wait until the write command is not completed.. 259 */ 260 for (idx = 0; idx < 1000; idx++) { 261 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 262 return; 263 udelay(10); 264 } 265 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); 266 } 267 268 static unsigned short snd_fm801_codec_read(struct snd_ac97 *ac97, unsigned short reg) 269 { 270 struct fm801 *chip = ac97->private_data; 271 int idx; 272 273 /* 274 * Wait until the codec interface is not ready.. 275 */ 276 for (idx = 0; idx < 100; idx++) { 277 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 278 goto ok1; 279 udelay(10); 280 } 281 snd_printk(KERN_ERR "AC'97 interface is busy (1)\n"); 282 return 0; 283 284 ok1: 285 /* read command */ 286 outw(reg | (ac97->addr << FM801_AC97_ADDR_SHIFT) | FM801_AC97_READ, 287 FM801_REG(chip, AC97_CMD)); 288 for (idx = 0; idx < 100; idx++) { 289 if (!(inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_BUSY)) 290 goto ok2; 291 udelay(10); 292 } 293 snd_printk(KERN_ERR "AC'97 interface #%d is busy (2)\n", ac97->num); 294 return 0; 295 296 ok2: 297 for (idx = 0; idx < 1000; idx++) { 298 if (inw(FM801_REG(chip, AC97_CMD)) & FM801_AC97_VALID) 299 goto ok3; 300 udelay(10); 301 } 302 snd_printk(KERN_ERR "AC'97 interface #%d is not valid (2)\n", ac97->num); 303 return 0; 304 305 ok3: 306 return inw(FM801_REG(chip, AC97_DATA)); 307 } 308 309 static unsigned int rates[] = { 310 5500, 8000, 9600, 11025, 311 16000, 19200, 22050, 32000, 312 38400, 44100, 48000 313 }; 314 315 static struct snd_pcm_hw_constraint_list hw_constraints_rates = { 316 .count = ARRAY_SIZE(rates), 317 .list = rates, 318 .mask = 0, 319 }; 320 321 static unsigned int channels[] = { 322 2, 4, 6 323 }; 324 325 static struct snd_pcm_hw_constraint_list hw_constraints_channels = { 326 .count = ARRAY_SIZE(channels), 327 .list = channels, 328 .mask = 0, 329 }; 330 331 /* 332 * Sample rate routines 333 */ 334 335 static unsigned short snd_fm801_rate_bits(unsigned int rate) 336 { 337 unsigned int idx; 338 339 for (idx = 0; idx < ARRAY_SIZE(rates); idx++) 340 if (rates[idx] == rate) 341 return idx; 342 snd_BUG(); 343 return ARRAY_SIZE(rates) - 1; 344 } 345 346 /* 347 * PCM part 348 */ 349 350 static int snd_fm801_playback_trigger(struct snd_pcm_substream *substream, 351 int cmd) 352 { 353 struct fm801 *chip = snd_pcm_substream_chip(substream); 354 355 spin_lock(&chip->reg_lock); 356 switch (cmd) { 357 case SNDRV_PCM_TRIGGER_START: 358 chip->ply_ctrl &= ~(FM801_BUF1_LAST | 359 FM801_BUF2_LAST | 360 FM801_PAUSE); 361 chip->ply_ctrl |= FM801_START | 362 FM801_IMMED_STOP; 363 break; 364 case SNDRV_PCM_TRIGGER_STOP: 365 chip->ply_ctrl &= ~(FM801_START | FM801_PAUSE); 366 break; 367 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 368 case SNDRV_PCM_TRIGGER_SUSPEND: 369 chip->ply_ctrl |= FM801_PAUSE; 370 break; 371 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 372 case SNDRV_PCM_TRIGGER_RESUME: 373 chip->ply_ctrl &= ~FM801_PAUSE; 374 break; 375 default: 376 spin_unlock(&chip->reg_lock); 377 snd_BUG(); 378 return -EINVAL; 379 } 380 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); 381 spin_unlock(&chip->reg_lock); 382 return 0; 383 } 384 385 static int snd_fm801_capture_trigger(struct snd_pcm_substream *substream, 386 int cmd) 387 { 388 struct fm801 *chip = snd_pcm_substream_chip(substream); 389 390 spin_lock(&chip->reg_lock); 391 switch (cmd) { 392 case SNDRV_PCM_TRIGGER_START: 393 chip->cap_ctrl &= ~(FM801_BUF1_LAST | 394 FM801_BUF2_LAST | 395 FM801_PAUSE); 396 chip->cap_ctrl |= FM801_START | 397 FM801_IMMED_STOP; 398 break; 399 case SNDRV_PCM_TRIGGER_STOP: 400 chip->cap_ctrl &= ~(FM801_START | FM801_PAUSE); 401 break; 402 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 403 case SNDRV_PCM_TRIGGER_SUSPEND: 404 chip->cap_ctrl |= FM801_PAUSE; 405 break; 406 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 407 case SNDRV_PCM_TRIGGER_RESUME: 408 chip->cap_ctrl &= ~FM801_PAUSE; 409 break; 410 default: 411 spin_unlock(&chip->reg_lock); 412 snd_BUG(); 413 return -EINVAL; 414 } 415 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); 416 spin_unlock(&chip->reg_lock); 417 return 0; 418 } 419 420 static int snd_fm801_hw_params(struct snd_pcm_substream *substream, 421 struct snd_pcm_hw_params *hw_params) 422 { 423 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); 424 } 425 426 static int snd_fm801_hw_free(struct snd_pcm_substream *substream) 427 { 428 return snd_pcm_lib_free_pages(substream); 429 } 430 431 static int snd_fm801_playback_prepare(struct snd_pcm_substream *substream) 432 { 433 struct fm801 *chip = snd_pcm_substream_chip(substream); 434 struct snd_pcm_runtime *runtime = substream->runtime; 435 436 chip->ply_size = snd_pcm_lib_buffer_bytes(substream); 437 chip->ply_count = snd_pcm_lib_period_bytes(substream); 438 spin_lock_irq(&chip->reg_lock); 439 chip->ply_ctrl &= ~(FM801_START | FM801_16BIT | 440 FM801_STEREO | FM801_RATE_MASK | 441 FM801_CHANNELS_MASK); 442 if (snd_pcm_format_width(runtime->format) == 16) 443 chip->ply_ctrl |= FM801_16BIT; 444 if (runtime->channels > 1) { 445 chip->ply_ctrl |= FM801_STEREO; 446 if (runtime->channels == 4) 447 chip->ply_ctrl |= FM801_CHANNELS_4; 448 else if (runtime->channels == 6) 449 chip->ply_ctrl |= FM801_CHANNELS_6; 450 } 451 chip->ply_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; 452 chip->ply_buf = 0; 453 outw(chip->ply_ctrl, FM801_REG(chip, PLY_CTRL)); 454 outw(chip->ply_count - 1, FM801_REG(chip, PLY_COUNT)); 455 chip->ply_buffer = runtime->dma_addr; 456 chip->ply_pos = 0; 457 outl(chip->ply_buffer, FM801_REG(chip, PLY_BUF1)); 458 outl(chip->ply_buffer + (chip->ply_count % chip->ply_size), FM801_REG(chip, PLY_BUF2)); 459 spin_unlock_irq(&chip->reg_lock); 460 return 0; 461 } 462 463 static int snd_fm801_capture_prepare(struct snd_pcm_substream *substream) 464 { 465 struct fm801 *chip = snd_pcm_substream_chip(substream); 466 struct snd_pcm_runtime *runtime = substream->runtime; 467 468 chip->cap_size = snd_pcm_lib_buffer_bytes(substream); 469 chip->cap_count = snd_pcm_lib_period_bytes(substream); 470 spin_lock_irq(&chip->reg_lock); 471 chip->cap_ctrl &= ~(FM801_START | FM801_16BIT | 472 FM801_STEREO | FM801_RATE_MASK); 473 if (snd_pcm_format_width(runtime->format) == 16) 474 chip->cap_ctrl |= FM801_16BIT; 475 if (runtime->channels > 1) 476 chip->cap_ctrl |= FM801_STEREO; 477 chip->cap_ctrl |= snd_fm801_rate_bits(runtime->rate) << FM801_RATE_SHIFT; 478 chip->cap_buf = 0; 479 outw(chip->cap_ctrl, FM801_REG(chip, CAP_CTRL)); 480 outw(chip->cap_count - 1, FM801_REG(chip, CAP_COUNT)); 481 chip->cap_buffer = runtime->dma_addr; 482 chip->cap_pos = 0; 483 outl(chip->cap_buffer, FM801_REG(chip, CAP_BUF1)); 484 outl(chip->cap_buffer + (chip->cap_count % chip->cap_size), FM801_REG(chip, CAP_BUF2)); 485 spin_unlock_irq(&chip->reg_lock); 486 return 0; 487 } 488 489 static snd_pcm_uframes_t snd_fm801_playback_pointer(struct snd_pcm_substream *substream) 490 { 491 struct fm801 *chip = snd_pcm_substream_chip(substream); 492 size_t ptr; 493 494 if (!(chip->ply_ctrl & FM801_START)) 495 return 0; 496 spin_lock(&chip->reg_lock); 497 ptr = chip->ply_pos + (chip->ply_count - 1) - inw(FM801_REG(chip, PLY_COUNT)); 498 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_PLAYBACK) { 499 ptr += chip->ply_count; 500 ptr %= chip->ply_size; 501 } 502 spin_unlock(&chip->reg_lock); 503 return bytes_to_frames(substream->runtime, ptr); 504 } 505 506 static snd_pcm_uframes_t snd_fm801_capture_pointer(struct snd_pcm_substream *substream) 507 { 508 struct fm801 *chip = snd_pcm_substream_chip(substream); 509 size_t ptr; 510 511 if (!(chip->cap_ctrl & FM801_START)) 512 return 0; 513 spin_lock(&chip->reg_lock); 514 ptr = chip->cap_pos + (chip->cap_count - 1) - inw(FM801_REG(chip, CAP_COUNT)); 515 if (inw(FM801_REG(chip, IRQ_STATUS)) & FM801_IRQ_CAPTURE) { 516 ptr += chip->cap_count; 517 ptr %= chip->cap_size; 518 } 519 spin_unlock(&chip->reg_lock); 520 return bytes_to_frames(substream->runtime, ptr); 521 } 522 523 static irqreturn_t snd_fm801_interrupt(int irq, void *dev_id) 524 { 525 struct fm801 *chip = dev_id; 526 unsigned short status; 527 unsigned int tmp; 528 529 status = inw(FM801_REG(chip, IRQ_STATUS)); 530 status &= FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU|FM801_IRQ_VOLUME; 531 if (! status) 532 return IRQ_NONE; 533 /* ack first */ 534 outw(status, FM801_REG(chip, IRQ_STATUS)); 535 if (chip->pcm && (status & FM801_IRQ_PLAYBACK) && chip->playback_substream) { 536 spin_lock(&chip->reg_lock); 537 chip->ply_buf++; 538 chip->ply_pos += chip->ply_count; 539 chip->ply_pos %= chip->ply_size; 540 tmp = chip->ply_pos + chip->ply_count; 541 tmp %= chip->ply_size; 542 outl(chip->ply_buffer + tmp, 543 (chip->ply_buf & 1) ? 544 FM801_REG(chip, PLY_BUF1) : 545 FM801_REG(chip, PLY_BUF2)); 546 spin_unlock(&chip->reg_lock); 547 snd_pcm_period_elapsed(chip->playback_substream); 548 } 549 if (chip->pcm && (status & FM801_IRQ_CAPTURE) && chip->capture_substream) { 550 spin_lock(&chip->reg_lock); 551 chip->cap_buf++; 552 chip->cap_pos += chip->cap_count; 553 chip->cap_pos %= chip->cap_size; 554 tmp = chip->cap_pos + chip->cap_count; 555 tmp %= chip->cap_size; 556 outl(chip->cap_buffer + tmp, 557 (chip->cap_buf & 1) ? 558 FM801_REG(chip, CAP_BUF1) : 559 FM801_REG(chip, CAP_BUF2)); 560 spin_unlock(&chip->reg_lock); 561 snd_pcm_period_elapsed(chip->capture_substream); 562 } 563 if (chip->rmidi && (status & FM801_IRQ_MPU)) 564 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 565 if (status & FM801_IRQ_VOLUME) 566 ;/* TODO */ 567 568 return IRQ_HANDLED; 569 } 570 571 static struct snd_pcm_hardware snd_fm801_playback = 572 { 573 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 574 SNDRV_PCM_INFO_BLOCK_TRANSFER | 575 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | 576 SNDRV_PCM_INFO_MMAP_VALID), 577 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 578 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, 579 .rate_min = 5500, 580 .rate_max = 48000, 581 .channels_min = 1, 582 .channels_max = 2, 583 .buffer_bytes_max = (128*1024), 584 .period_bytes_min = 64, 585 .period_bytes_max = (128*1024), 586 .periods_min = 1, 587 .periods_max = 1024, 588 .fifo_size = 0, 589 }; 590 591 static struct snd_pcm_hardware snd_fm801_capture = 592 { 593 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 594 SNDRV_PCM_INFO_BLOCK_TRANSFER | 595 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME | 596 SNDRV_PCM_INFO_MMAP_VALID), 597 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE, 598 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_48000, 599 .rate_min = 5500, 600 .rate_max = 48000, 601 .channels_min = 1, 602 .channels_max = 2, 603 .buffer_bytes_max = (128*1024), 604 .period_bytes_min = 64, 605 .period_bytes_max = (128*1024), 606 .periods_min = 1, 607 .periods_max = 1024, 608 .fifo_size = 0, 609 }; 610 611 static int snd_fm801_playback_open(struct snd_pcm_substream *substream) 612 { 613 struct fm801 *chip = snd_pcm_substream_chip(substream); 614 struct snd_pcm_runtime *runtime = substream->runtime; 615 int err; 616 617 chip->playback_substream = substream; 618 runtime->hw = snd_fm801_playback; 619 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 620 &hw_constraints_rates); 621 if (chip->multichannel) { 622 runtime->hw.channels_max = 6; 623 snd_pcm_hw_constraint_list(runtime, 0, 624 SNDRV_PCM_HW_PARAM_CHANNELS, 625 &hw_constraints_channels); 626 } 627 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 628 return err; 629 return 0; 630 } 631 632 static int snd_fm801_capture_open(struct snd_pcm_substream *substream) 633 { 634 struct fm801 *chip = snd_pcm_substream_chip(substream); 635 struct snd_pcm_runtime *runtime = substream->runtime; 636 int err; 637 638 chip->capture_substream = substream; 639 runtime->hw = snd_fm801_capture; 640 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 641 &hw_constraints_rates); 642 if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) 643 return err; 644 return 0; 645 } 646 647 static int snd_fm801_playback_close(struct snd_pcm_substream *substream) 648 { 649 struct fm801 *chip = snd_pcm_substream_chip(substream); 650 651 chip->playback_substream = NULL; 652 return 0; 653 } 654 655 static int snd_fm801_capture_close(struct snd_pcm_substream *substream) 656 { 657 struct fm801 *chip = snd_pcm_substream_chip(substream); 658 659 chip->capture_substream = NULL; 660 return 0; 661 } 662 663 static struct snd_pcm_ops snd_fm801_playback_ops = { 664 .open = snd_fm801_playback_open, 665 .close = snd_fm801_playback_close, 666 .ioctl = snd_pcm_lib_ioctl, 667 .hw_params = snd_fm801_hw_params, 668 .hw_free = snd_fm801_hw_free, 669 .prepare = snd_fm801_playback_prepare, 670 .trigger = snd_fm801_playback_trigger, 671 .pointer = snd_fm801_playback_pointer, 672 }; 673 674 static struct snd_pcm_ops snd_fm801_capture_ops = { 675 .open = snd_fm801_capture_open, 676 .close = snd_fm801_capture_close, 677 .ioctl = snd_pcm_lib_ioctl, 678 .hw_params = snd_fm801_hw_params, 679 .hw_free = snd_fm801_hw_free, 680 .prepare = snd_fm801_capture_prepare, 681 .trigger = snd_fm801_capture_trigger, 682 .pointer = snd_fm801_capture_pointer, 683 }; 684 685 static int __devinit snd_fm801_pcm(struct fm801 *chip, int device, struct snd_pcm ** rpcm) 686 { 687 struct snd_pcm *pcm; 688 int err; 689 690 if (rpcm) 691 *rpcm = NULL; 692 if ((err = snd_pcm_new(chip->card, "FM801", device, 1, 1, &pcm)) < 0) 693 return err; 694 695 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_fm801_playback_ops); 696 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_fm801_capture_ops); 697 698 pcm->private_data = chip; 699 pcm->info_flags = 0; 700 strcpy(pcm->name, "FM801"); 701 chip->pcm = pcm; 702 703 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, 704 snd_dma_pci_data(chip->pci), 705 chip->multichannel ? 128*1024 : 64*1024, 128*1024); 706 707 if (rpcm) 708 *rpcm = pcm; 709 return 0; 710 } 711 712 /* 713 * TEA5757 radio 714 */ 715 716 #ifdef TEA575X_RADIO 717 718 /* 256PCS GPIO numbers */ 719 #define TEA_256PCS_DATA 1 720 #define TEA_256PCS_WRITE_ENABLE 2 /* inverted */ 721 #define TEA_256PCS_BUS_CLOCK 3 722 723 static void snd_fm801_tea575x_256pcs_write(struct snd_tea575x *tea, unsigned int val) 724 { 725 struct fm801 *chip = tea->private_data; 726 unsigned short reg; 727 int i = 25; 728 729 spin_lock_irq(&chip->reg_lock); 730 reg = inw(FM801_REG(chip, GPIO_CTRL)); 731 /* use GPIO lines and set write enable bit */ 732 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | 733 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | 734 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK); 735 /* all of lines are in the write direction */ 736 /* clear data and clock lines */ 737 reg &= ~(FM801_GPIO_GD(TEA_256PCS_DATA) | 738 FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | 739 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | 740 FM801_GPIO_GP(TEA_256PCS_DATA) | 741 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK) | 742 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE)); 743 outw(reg, FM801_REG(chip, GPIO_CTRL)); 744 udelay(1); 745 746 while (i--) { 747 if (val & (1 << i)) 748 reg |= FM801_GPIO_GP(TEA_256PCS_DATA); 749 else 750 reg &= ~FM801_GPIO_GP(TEA_256PCS_DATA); 751 outw(reg, FM801_REG(chip, GPIO_CTRL)); 752 udelay(1); 753 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 754 outw(reg, FM801_REG(chip, GPIO_CTRL)); 755 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 756 outw(reg, FM801_REG(chip, GPIO_CTRL)); 757 udelay(1); 758 } 759 760 /* and reset the write enable bit */ 761 reg |= FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE) | 762 FM801_GPIO_GP(TEA_256PCS_DATA); 763 outw(reg, FM801_REG(chip, GPIO_CTRL)); 764 spin_unlock_irq(&chip->reg_lock); 765 } 766 767 static unsigned int snd_fm801_tea575x_256pcs_read(struct snd_tea575x *tea) 768 { 769 struct fm801 *chip = tea->private_data; 770 unsigned short reg; 771 unsigned int val = 0; 772 int i; 773 774 spin_lock_irq(&chip->reg_lock); 775 reg = inw(FM801_REG(chip, GPIO_CTRL)); 776 /* use GPIO lines, set data direction to input */ 777 reg |= FM801_GPIO_GS(TEA_256PCS_DATA) | 778 FM801_GPIO_GS(TEA_256PCS_WRITE_ENABLE) | 779 FM801_GPIO_GS(TEA_256PCS_BUS_CLOCK) | 780 FM801_GPIO_GD(TEA_256PCS_DATA) | 781 FM801_GPIO_GP(TEA_256PCS_DATA) | 782 FM801_GPIO_GP(TEA_256PCS_WRITE_ENABLE); 783 /* all of lines are in the write direction, except data */ 784 /* clear data, write enable and clock lines */ 785 reg &= ~(FM801_GPIO_GD(TEA_256PCS_WRITE_ENABLE) | 786 FM801_GPIO_GD(TEA_256PCS_BUS_CLOCK) | 787 FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK)); 788 789 for (i = 0; i < 24; i++) { 790 reg &= ~FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 791 outw(reg, FM801_REG(chip, GPIO_CTRL)); 792 udelay(1); 793 reg |= FM801_GPIO_GP(TEA_256PCS_BUS_CLOCK); 794 outw(reg, FM801_REG(chip, GPIO_CTRL)); 795 udelay(1); 796 val <<= 1; 797 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCS_DATA)) 798 val |= 1; 799 } 800 801 spin_unlock_irq(&chip->reg_lock); 802 803 return val; 804 } 805 806 /* 256PCPR GPIO numbers */ 807 #define TEA_256PCPR_BUS_CLOCK 0 808 #define TEA_256PCPR_DATA 1 809 #define TEA_256PCPR_WRITE_ENABLE 2 /* inverted */ 810 811 static void snd_fm801_tea575x_256pcpr_write(struct snd_tea575x *tea, unsigned int val) 812 { 813 struct fm801 *chip = tea->private_data; 814 unsigned short reg; 815 int i = 25; 816 817 spin_lock_irq(&chip->reg_lock); 818 reg = inw(FM801_REG(chip, GPIO_CTRL)); 819 /* use GPIO lines and set write enable bit */ 820 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | 821 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | 822 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK); 823 /* all of lines are in the write direction */ 824 /* clear data and clock lines */ 825 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_DATA) | 826 FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | 827 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | 828 FM801_GPIO_GP(TEA_256PCPR_DATA) | 829 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK) | 830 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE)); 831 outw(reg, FM801_REG(chip, GPIO_CTRL)); 832 udelay(1); 833 834 while (i--) { 835 if (val & (1 << i)) 836 reg |= FM801_GPIO_GP(TEA_256PCPR_DATA); 837 else 838 reg &= ~FM801_GPIO_GP(TEA_256PCPR_DATA); 839 outw(reg, FM801_REG(chip, GPIO_CTRL)); 840 udelay(1); 841 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 842 outw(reg, FM801_REG(chip, GPIO_CTRL)); 843 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 844 outw(reg, FM801_REG(chip, GPIO_CTRL)); 845 udelay(1); 846 } 847 848 /* and reset the write enable bit */ 849 reg |= FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE) | 850 FM801_GPIO_GP(TEA_256PCPR_DATA); 851 outw(reg, FM801_REG(chip, GPIO_CTRL)); 852 spin_unlock_irq(&chip->reg_lock); 853 } 854 855 static unsigned int snd_fm801_tea575x_256pcpr_read(struct snd_tea575x *tea) 856 { 857 struct fm801 *chip = tea->private_data; 858 unsigned short reg; 859 unsigned int val = 0; 860 int i; 861 862 spin_lock_irq(&chip->reg_lock); 863 reg = inw(FM801_REG(chip, GPIO_CTRL)); 864 /* use GPIO lines, set data direction to input */ 865 reg |= FM801_GPIO_GS(TEA_256PCPR_DATA) | 866 FM801_GPIO_GS(TEA_256PCPR_WRITE_ENABLE) | 867 FM801_GPIO_GS(TEA_256PCPR_BUS_CLOCK) | 868 FM801_GPIO_GD(TEA_256PCPR_DATA) | 869 FM801_GPIO_GP(TEA_256PCPR_DATA) | 870 FM801_GPIO_GP(TEA_256PCPR_WRITE_ENABLE); 871 /* all of lines are in the write direction, except data */ 872 /* clear data, write enable and clock lines */ 873 reg &= ~(FM801_GPIO_GD(TEA_256PCPR_WRITE_ENABLE) | 874 FM801_GPIO_GD(TEA_256PCPR_BUS_CLOCK) | 875 FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK)); 876 877 for (i = 0; i < 24; i++) { 878 reg &= ~FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 879 outw(reg, FM801_REG(chip, GPIO_CTRL)); 880 udelay(1); 881 reg |= FM801_GPIO_GP(TEA_256PCPR_BUS_CLOCK); 882 outw(reg, FM801_REG(chip, GPIO_CTRL)); 883 udelay(1); 884 val <<= 1; 885 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_256PCPR_DATA)) 886 val |= 1; 887 } 888 889 spin_unlock_irq(&chip->reg_lock); 890 891 return val; 892 } 893 894 /* 64PCR GPIO numbers */ 895 #define TEA_64PCR_BUS_CLOCK 0 896 #define TEA_64PCR_WRITE_ENABLE 1 /* inverted */ 897 #define TEA_64PCR_DATA 2 898 899 static void snd_fm801_tea575x_64pcr_write(struct snd_tea575x *tea, unsigned int val) 900 { 901 struct fm801 *chip = tea->private_data; 902 unsigned short reg; 903 int i = 25; 904 905 spin_lock_irq(&chip->reg_lock); 906 reg = inw(FM801_REG(chip, GPIO_CTRL)); 907 /* use GPIO lines and set write enable bit */ 908 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 909 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | 910 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK); 911 /* all of lines are in the write direction */ 912 /* clear data and clock lines */ 913 reg &= ~(FM801_GPIO_GD(TEA_64PCR_DATA) | 914 FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | 915 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | 916 FM801_GPIO_GP(TEA_64PCR_DATA) | 917 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK) | 918 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE)); 919 outw(reg, FM801_REG(chip, GPIO_CTRL)); 920 udelay(1); 921 922 while (i--) { 923 if (val & (1 << i)) 924 reg |= FM801_GPIO_GP(TEA_64PCR_DATA); 925 else 926 reg &= ~FM801_GPIO_GP(TEA_64PCR_DATA); 927 outw(reg, FM801_REG(chip, GPIO_CTRL)); 928 udelay(1); 929 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 930 outw(reg, FM801_REG(chip, GPIO_CTRL)); 931 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 932 outw(reg, FM801_REG(chip, GPIO_CTRL)); 933 udelay(1); 934 } 935 936 /* and reset the write enable bit */ 937 reg |= FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE) | 938 FM801_GPIO_GP(TEA_64PCR_DATA); 939 outw(reg, FM801_REG(chip, GPIO_CTRL)); 940 spin_unlock_irq(&chip->reg_lock); 941 } 942 943 static unsigned int snd_fm801_tea575x_64pcr_read(struct snd_tea575x *tea) 944 { 945 struct fm801 *chip = tea->private_data; 946 unsigned short reg; 947 unsigned int val = 0; 948 int i; 949 950 spin_lock_irq(&chip->reg_lock); 951 reg = inw(FM801_REG(chip, GPIO_CTRL)); 952 /* use GPIO lines, set data direction to input */ 953 reg |= FM801_GPIO_GS(TEA_64PCR_DATA) | 954 FM801_GPIO_GS(TEA_64PCR_WRITE_ENABLE) | 955 FM801_GPIO_GS(TEA_64PCR_BUS_CLOCK) | 956 FM801_GPIO_GD(TEA_64PCR_DATA) | 957 FM801_GPIO_GP(TEA_64PCR_DATA) | 958 FM801_GPIO_GP(TEA_64PCR_WRITE_ENABLE); 959 /* all of lines are in the write direction, except data */ 960 /* clear data, write enable and clock lines */ 961 reg &= ~(FM801_GPIO_GD(TEA_64PCR_WRITE_ENABLE) | 962 FM801_GPIO_GD(TEA_64PCR_BUS_CLOCK) | 963 FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK)); 964 965 for (i = 0; i < 24; i++) { 966 reg &= ~FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 967 outw(reg, FM801_REG(chip, GPIO_CTRL)); 968 udelay(1); 969 reg |= FM801_GPIO_GP(TEA_64PCR_BUS_CLOCK); 970 outw(reg, FM801_REG(chip, GPIO_CTRL)); 971 udelay(1); 972 val <<= 1; 973 if (inw(FM801_REG(chip, GPIO_CTRL)) & FM801_GPIO_GP(TEA_64PCR_DATA)) 974 val |= 1; 975 } 976 977 spin_unlock_irq(&chip->reg_lock); 978 979 return val; 980 } 981 982 static struct snd_tea575x_ops snd_fm801_tea_ops[3] = { 983 { 984 /* 1 = MediaForte 256-PCS */ 985 .write = snd_fm801_tea575x_256pcs_write, 986 .read = snd_fm801_tea575x_256pcs_read, 987 }, 988 { 989 /* 2 = MediaForte 256-PCPR */ 990 .write = snd_fm801_tea575x_256pcpr_write, 991 .read = snd_fm801_tea575x_256pcpr_read, 992 }, 993 { 994 /* 3 = MediaForte 64-PCR */ 995 .write = snd_fm801_tea575x_64pcr_write, 996 .read = snd_fm801_tea575x_64pcr_read, 997 } 998 }; 999 #endif 1000 1001 /* 1002 * Mixer routines 1003 */ 1004 1005 #define FM801_SINGLE(xname, reg, shift, mask, invert) \ 1006 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_single, \ 1007 .get = snd_fm801_get_single, .put = snd_fm801_put_single, \ 1008 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 1009 1010 static int snd_fm801_info_single(struct snd_kcontrol *kcontrol, 1011 struct snd_ctl_elem_info *uinfo) 1012 { 1013 int mask = (kcontrol->private_value >> 16) & 0xff; 1014 1015 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1016 uinfo->count = 1; 1017 uinfo->value.integer.min = 0; 1018 uinfo->value.integer.max = mask; 1019 return 0; 1020 } 1021 1022 static int snd_fm801_get_single(struct snd_kcontrol *kcontrol, 1023 struct snd_ctl_elem_value *ucontrol) 1024 { 1025 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1026 int reg = kcontrol->private_value & 0xff; 1027 int shift = (kcontrol->private_value >> 8) & 0xff; 1028 int mask = (kcontrol->private_value >> 16) & 0xff; 1029 int invert = (kcontrol->private_value >> 24) & 0xff; 1030 1031 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift) & mask; 1032 if (invert) 1033 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1034 return 0; 1035 } 1036 1037 static int snd_fm801_put_single(struct snd_kcontrol *kcontrol, 1038 struct snd_ctl_elem_value *ucontrol) 1039 { 1040 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1041 int reg = kcontrol->private_value & 0xff; 1042 int shift = (kcontrol->private_value >> 8) & 0xff; 1043 int mask = (kcontrol->private_value >> 16) & 0xff; 1044 int invert = (kcontrol->private_value >> 24) & 0xff; 1045 unsigned short val; 1046 1047 val = (ucontrol->value.integer.value[0] & mask); 1048 if (invert) 1049 val = mask - val; 1050 return snd_fm801_update_bits(chip, reg, mask << shift, val << shift); 1051 } 1052 1053 #define FM801_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ 1054 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .info = snd_fm801_info_double, \ 1055 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ 1056 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24) } 1057 #define FM801_DOUBLE_TLV(xname, reg, shift_left, shift_right, mask, invert, xtlv) \ 1058 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1059 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ, \ 1060 .name = xname, .info = snd_fm801_info_double, \ 1061 .get = snd_fm801_get_double, .put = snd_fm801_put_double, \ 1062 .private_value = reg | (shift_left << 8) | (shift_right << 12) | (mask << 16) | (invert << 24), \ 1063 .tlv = { .p = (xtlv) } } 1064 1065 static int snd_fm801_info_double(struct snd_kcontrol *kcontrol, 1066 struct snd_ctl_elem_info *uinfo) 1067 { 1068 int mask = (kcontrol->private_value >> 16) & 0xff; 1069 1070 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1071 uinfo->count = 2; 1072 uinfo->value.integer.min = 0; 1073 uinfo->value.integer.max = mask; 1074 return 0; 1075 } 1076 1077 static int snd_fm801_get_double(struct snd_kcontrol *kcontrol, 1078 struct snd_ctl_elem_value *ucontrol) 1079 { 1080 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1081 int reg = kcontrol->private_value & 0xff; 1082 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 1083 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 1084 int mask = (kcontrol->private_value >> 16) & 0xff; 1085 int invert = (kcontrol->private_value >> 24) & 0xff; 1086 1087 spin_lock_irq(&chip->reg_lock); 1088 ucontrol->value.integer.value[0] = (inw(chip->port + reg) >> shift_left) & mask; 1089 ucontrol->value.integer.value[1] = (inw(chip->port + reg) >> shift_right) & mask; 1090 spin_unlock_irq(&chip->reg_lock); 1091 if (invert) { 1092 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1093 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 1094 } 1095 return 0; 1096 } 1097 1098 static int snd_fm801_put_double(struct snd_kcontrol *kcontrol, 1099 struct snd_ctl_elem_value *ucontrol) 1100 { 1101 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1102 int reg = kcontrol->private_value & 0xff; 1103 int shift_left = (kcontrol->private_value >> 8) & 0x0f; 1104 int shift_right = (kcontrol->private_value >> 12) & 0x0f; 1105 int mask = (kcontrol->private_value >> 16) & 0xff; 1106 int invert = (kcontrol->private_value >> 24) & 0xff; 1107 unsigned short val1, val2; 1108 1109 val1 = ucontrol->value.integer.value[0] & mask; 1110 val2 = ucontrol->value.integer.value[1] & mask; 1111 if (invert) { 1112 val1 = mask - val1; 1113 val2 = mask - val2; 1114 } 1115 return snd_fm801_update_bits(chip, reg, 1116 (mask << shift_left) | (mask << shift_right), 1117 (val1 << shift_left ) | (val2 << shift_right)); 1118 } 1119 1120 static int snd_fm801_info_mux(struct snd_kcontrol *kcontrol, 1121 struct snd_ctl_elem_info *uinfo) 1122 { 1123 static char *texts[5] = { 1124 "AC97 Primary", "FM", "I2S", "PCM", "AC97 Secondary" 1125 }; 1126 1127 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; 1128 uinfo->count = 1; 1129 uinfo->value.enumerated.items = 5; 1130 if (uinfo->value.enumerated.item > 4) 1131 uinfo->value.enumerated.item = 4; 1132 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); 1133 return 0; 1134 } 1135 1136 static int snd_fm801_get_mux(struct snd_kcontrol *kcontrol, 1137 struct snd_ctl_elem_value *ucontrol) 1138 { 1139 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1140 unsigned short val; 1141 1142 val = inw(FM801_REG(chip, REC_SRC)) & 7; 1143 if (val > 4) 1144 val = 4; 1145 ucontrol->value.enumerated.item[0] = val; 1146 return 0; 1147 } 1148 1149 static int snd_fm801_put_mux(struct snd_kcontrol *kcontrol, 1150 struct snd_ctl_elem_value *ucontrol) 1151 { 1152 struct fm801 *chip = snd_kcontrol_chip(kcontrol); 1153 unsigned short val; 1154 1155 if ((val = ucontrol->value.enumerated.item[0]) > 4) 1156 return -EINVAL; 1157 return snd_fm801_update_bits(chip, FM801_REC_SRC, 7, val); 1158 } 1159 1160 static const DECLARE_TLV_DB_SCALE(db_scale_dsp, -3450, 150, 0); 1161 1162 #define FM801_CONTROLS ARRAY_SIZE(snd_fm801_controls) 1163 1164 static struct snd_kcontrol_new snd_fm801_controls[] __devinitdata = { 1165 FM801_DOUBLE_TLV("Wave Playback Volume", FM801_PCM_VOL, 0, 8, 31, 1, 1166 db_scale_dsp), 1167 FM801_SINGLE("Wave Playback Switch", FM801_PCM_VOL, 15, 1, 1), 1168 FM801_DOUBLE_TLV("I2S Playback Volume", FM801_I2S_VOL, 0, 8, 31, 1, 1169 db_scale_dsp), 1170 FM801_SINGLE("I2S Playback Switch", FM801_I2S_VOL, 15, 1, 1), 1171 FM801_DOUBLE_TLV("FM Playback Volume", FM801_FM_VOL, 0, 8, 31, 1, 1172 db_scale_dsp), 1173 FM801_SINGLE("FM Playback Switch", FM801_FM_VOL, 15, 1, 1), 1174 { 1175 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1176 .name = "Digital Capture Source", 1177 .info = snd_fm801_info_mux, 1178 .get = snd_fm801_get_mux, 1179 .put = snd_fm801_put_mux, 1180 } 1181 }; 1182 1183 #define FM801_CONTROLS_MULTI ARRAY_SIZE(snd_fm801_controls_multi) 1184 1185 static struct snd_kcontrol_new snd_fm801_controls_multi[] __devinitdata = { 1186 FM801_SINGLE("AC97 2ch->4ch Copy Switch", FM801_CODEC_CTRL, 7, 1, 0), 1187 FM801_SINGLE("AC97 18-bit Switch", FM801_CODEC_CTRL, 10, 1, 0), 1188 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",CAPTURE,SWITCH), FM801_I2S_MODE, 8, 1, 0), 1189 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",PLAYBACK,SWITCH), FM801_I2S_MODE, 9, 1, 0), 1190 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("Raw Data ",CAPTURE,SWITCH), FM801_I2S_MODE, 10, 1, 0), 1191 FM801_SINGLE(SNDRV_CTL_NAME_IEC958("",PLAYBACK,SWITCH), FM801_GEN_CTRL, 2, 1, 0), 1192 }; 1193 1194 static void snd_fm801_mixer_free_ac97_bus(struct snd_ac97_bus *bus) 1195 { 1196 struct fm801 *chip = bus->private_data; 1197 chip->ac97_bus = NULL; 1198 } 1199 1200 static void snd_fm801_mixer_free_ac97(struct snd_ac97 *ac97) 1201 { 1202 struct fm801 *chip = ac97->private_data; 1203 if (ac97->num == 0) { 1204 chip->ac97 = NULL; 1205 } else { 1206 chip->ac97_sec = NULL; 1207 } 1208 } 1209 1210 static int __devinit snd_fm801_mixer(struct fm801 *chip) 1211 { 1212 struct snd_ac97_template ac97; 1213 unsigned int i; 1214 int err; 1215 static struct snd_ac97_bus_ops ops = { 1216 .write = snd_fm801_codec_write, 1217 .read = snd_fm801_codec_read, 1218 }; 1219 1220 if ((err = snd_ac97_bus(chip->card, 0, &ops, chip, &chip->ac97_bus)) < 0) 1221 return err; 1222 chip->ac97_bus->private_free = snd_fm801_mixer_free_ac97_bus; 1223 1224 memset(&ac97, 0, sizeof(ac97)); 1225 ac97.private_data = chip; 1226 ac97.private_free = snd_fm801_mixer_free_ac97; 1227 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97)) < 0) 1228 return err; 1229 if (chip->secondary) { 1230 ac97.num = 1; 1231 ac97.addr = chip->secondary_addr; 1232 if ((err = snd_ac97_mixer(chip->ac97_bus, &ac97, &chip->ac97_sec)) < 0) 1233 return err; 1234 } 1235 for (i = 0; i < FM801_CONTROLS; i++) 1236 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls[i], chip)); 1237 if (chip->multichannel) { 1238 for (i = 0; i < FM801_CONTROLS_MULTI; i++) 1239 snd_ctl_add(chip->card, snd_ctl_new1(&snd_fm801_controls_multi[i], chip)); 1240 } 1241 return 0; 1242 } 1243 1244 /* 1245 * initialization routines 1246 */ 1247 1248 static int wait_for_codec(struct fm801 *chip, unsigned int codec_id, 1249 unsigned short reg, unsigned long waits) 1250 { 1251 unsigned long timeout = jiffies + waits; 1252 1253 outw(FM801_AC97_READ | (codec_id << FM801_AC97_ADDR_SHIFT) | reg, 1254 FM801_REG(chip, AC97_CMD)); 1255 udelay(5); 1256 do { 1257 if ((inw(FM801_REG(chip, AC97_CMD)) & (FM801_AC97_VALID|FM801_AC97_BUSY)) 1258 == FM801_AC97_VALID) 1259 return 0; 1260 schedule_timeout_uninterruptible(1); 1261 } while (time_after(timeout, jiffies)); 1262 return -EIO; 1263 } 1264 1265 static int snd_fm801_chip_init(struct fm801 *chip, int resume) 1266 { 1267 int id; 1268 unsigned short cmdw; 1269 1270 if (chip->tea575x_tuner & 0x0010) 1271 goto __ac97_ok; 1272 1273 /* codec cold reset + AC'97 warm reset */ 1274 outw((1<<5) | (1<<6), FM801_REG(chip, CODEC_CTRL)); 1275 inw(FM801_REG(chip, CODEC_CTRL)); /* flush posting data */ 1276 udelay(100); 1277 outw(0, FM801_REG(chip, CODEC_CTRL)); 1278 1279 if (wait_for_codec(chip, 0, AC97_RESET, msecs_to_jiffies(750)) < 0) { 1280 snd_printk(KERN_ERR "Primary AC'97 codec not found\n"); 1281 if (! resume) 1282 return -EIO; 1283 } 1284 1285 if (chip->multichannel) { 1286 if (chip->secondary_addr) { 1287 wait_for_codec(chip, chip->secondary_addr, 1288 AC97_VENDOR_ID1, msecs_to_jiffies(50)); 1289 } else { 1290 /* my card has the secondary codec */ 1291 /* at address #3, so the loop is inverted */ 1292 for (id = 3; id > 0; id--) { 1293 if (! wait_for_codec(chip, id, AC97_VENDOR_ID1, 1294 msecs_to_jiffies(50))) { 1295 cmdw = inw(FM801_REG(chip, AC97_DATA)); 1296 if (cmdw != 0xffff && cmdw != 0) { 1297 chip->secondary = 1; 1298 chip->secondary_addr = id; 1299 break; 1300 } 1301 } 1302 } 1303 } 1304 1305 /* the recovery phase, it seems that probing for non-existing codec might */ 1306 /* cause timeout problems */ 1307 wait_for_codec(chip, 0, AC97_VENDOR_ID1, msecs_to_jiffies(750)); 1308 } 1309 1310 __ac97_ok: 1311 1312 /* init volume */ 1313 outw(0x0808, FM801_REG(chip, PCM_VOL)); 1314 outw(0x9f1f, FM801_REG(chip, FM_VOL)); 1315 outw(0x8808, FM801_REG(chip, I2S_VOL)); 1316 1317 /* I2S control - I2S mode */ 1318 outw(0x0003, FM801_REG(chip, I2S_MODE)); 1319 1320 /* interrupt setup */ 1321 cmdw = inw(FM801_REG(chip, IRQ_MASK)); 1322 if (chip->irq < 0) 1323 cmdw |= 0x00c3; /* mask everything, no PCM nor MPU */ 1324 else 1325 cmdw &= ~0x0083; /* unmask MPU, PLAYBACK & CAPTURE */ 1326 outw(cmdw, FM801_REG(chip, IRQ_MASK)); 1327 1328 /* interrupt clear */ 1329 outw(FM801_IRQ_PLAYBACK|FM801_IRQ_CAPTURE|FM801_IRQ_MPU, FM801_REG(chip, IRQ_STATUS)); 1330 1331 return 0; 1332 } 1333 1334 1335 static int snd_fm801_free(struct fm801 *chip) 1336 { 1337 unsigned short cmdw; 1338 1339 if (chip->irq < 0) 1340 goto __end_hw; 1341 1342 /* interrupt setup - mask everything */ 1343 cmdw = inw(FM801_REG(chip, IRQ_MASK)); 1344 cmdw |= 0x00c3; 1345 outw(cmdw, FM801_REG(chip, IRQ_MASK)); 1346 1347 __end_hw: 1348 #ifdef TEA575X_RADIO 1349 snd_tea575x_exit(&chip->tea); 1350 #endif 1351 if (chip->irq >= 0) 1352 free_irq(chip->irq, chip); 1353 pci_release_regions(chip->pci); 1354 pci_disable_device(chip->pci); 1355 1356 kfree(chip); 1357 return 0; 1358 } 1359 1360 static int snd_fm801_dev_free(struct snd_device *device) 1361 { 1362 struct fm801 *chip = device->device_data; 1363 return snd_fm801_free(chip); 1364 } 1365 1366 static int __devinit snd_fm801_create(struct snd_card *card, 1367 struct pci_dev * pci, 1368 int tea575x_tuner, 1369 struct fm801 ** rchip) 1370 { 1371 struct fm801 *chip; 1372 unsigned char rev; 1373 int err; 1374 static struct snd_device_ops ops = { 1375 .dev_free = snd_fm801_dev_free, 1376 }; 1377 1378 *rchip = NULL; 1379 if ((err = pci_enable_device(pci)) < 0) 1380 return err; 1381 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1382 if (chip == NULL) { 1383 pci_disable_device(pci); 1384 return -ENOMEM; 1385 } 1386 spin_lock_init(&chip->reg_lock); 1387 chip->card = card; 1388 chip->pci = pci; 1389 chip->irq = -1; 1390 chip->tea575x_tuner = tea575x_tuner; 1391 if ((err = pci_request_regions(pci, "FM801")) < 0) { 1392 kfree(chip); 1393 pci_disable_device(pci); 1394 return err; 1395 } 1396 chip->port = pci_resource_start(pci, 0); 1397 if ((tea575x_tuner & 0x0010) == 0) { 1398 if (request_irq(pci->irq, snd_fm801_interrupt, IRQF_SHARED, 1399 "FM801", chip)) { 1400 snd_printk(KERN_ERR "unable to grab IRQ %d\n", chip->irq); 1401 snd_fm801_free(chip); 1402 return -EBUSY; 1403 } 1404 chip->irq = pci->irq; 1405 pci_set_master(pci); 1406 } 1407 1408 pci_read_config_byte(pci, PCI_REVISION_ID, &rev); 1409 if (rev >= 0xb1) /* FM801-AU */ 1410 chip->multichannel = 1; 1411 1412 snd_fm801_chip_init(chip, 0); 1413 1414 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1415 snd_fm801_free(chip); 1416 return err; 1417 } 1418 1419 snd_card_set_dev(card, &pci->dev); 1420 1421 #ifdef TEA575X_RADIO 1422 if (tea575x_tuner > 0 && (tea575x_tuner & 0x000f) < 4) { 1423 chip->tea.dev_nr = tea575x_tuner >> 16; 1424 chip->tea.card = card; 1425 chip->tea.freq_fixup = 10700; 1426 chip->tea.private_data = chip; 1427 chip->tea.ops = &snd_fm801_tea_ops[(tea575x_tuner & 0x000f) - 1]; 1428 snd_tea575x_init(&chip->tea); 1429 } 1430 #endif 1431 1432 *rchip = chip; 1433 return 0; 1434 } 1435 1436 static int __devinit snd_card_fm801_probe(struct pci_dev *pci, 1437 const struct pci_device_id *pci_id) 1438 { 1439 static int dev; 1440 struct snd_card *card; 1441 struct fm801 *chip; 1442 struct snd_opl3 *opl3; 1443 int err; 1444 1445 if (dev >= SNDRV_CARDS) 1446 return -ENODEV; 1447 if (!enable[dev]) { 1448 dev++; 1449 return -ENOENT; 1450 } 1451 1452 card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0); 1453 if (card == NULL) 1454 return -ENOMEM; 1455 if ((err = snd_fm801_create(card, pci, tea575x_tuner[dev], &chip)) < 0) { 1456 snd_card_free(card); 1457 return err; 1458 } 1459 card->private_data = chip; 1460 1461 strcpy(card->driver, "FM801"); 1462 strcpy(card->shortname, "ForteMedia FM801-"); 1463 strcat(card->shortname, chip->multichannel ? "AU" : "AS"); 1464 sprintf(card->longname, "%s at 0x%lx, irq %i", 1465 card->shortname, chip->port, chip->irq); 1466 1467 if (tea575x_tuner[dev] & 0x0010) 1468 goto __fm801_tuner_only; 1469 1470 if ((err = snd_fm801_pcm(chip, 0, NULL)) < 0) { 1471 snd_card_free(card); 1472 return err; 1473 } 1474 if ((err = snd_fm801_mixer(chip)) < 0) { 1475 snd_card_free(card); 1476 return err; 1477 } 1478 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_FM801, 1479 FM801_REG(chip, MPU401_DATA), 1480 MPU401_INFO_INTEGRATED, 1481 chip->irq, 0, &chip->rmidi)) < 0) { 1482 snd_card_free(card); 1483 return err; 1484 } 1485 if ((err = snd_opl3_create(card, FM801_REG(chip, OPL3_BANK0), 1486 FM801_REG(chip, OPL3_BANK1), 1487 OPL3_HW_OPL3_FM801, 1, &opl3)) < 0) { 1488 snd_card_free(card); 1489 return err; 1490 } 1491 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1492 snd_card_free(card); 1493 return err; 1494 } 1495 1496 __fm801_tuner_only: 1497 if ((err = snd_card_register(card)) < 0) { 1498 snd_card_free(card); 1499 return err; 1500 } 1501 pci_set_drvdata(pci, card); 1502 dev++; 1503 return 0; 1504 } 1505 1506 static void __devexit snd_card_fm801_remove(struct pci_dev *pci) 1507 { 1508 snd_card_free(pci_get_drvdata(pci)); 1509 pci_set_drvdata(pci, NULL); 1510 } 1511 1512 #ifdef CONFIG_PM 1513 static unsigned char saved_regs[] = { 1514 FM801_PCM_VOL, FM801_I2S_VOL, FM801_FM_VOL, FM801_REC_SRC, 1515 FM801_PLY_CTRL, FM801_PLY_COUNT, FM801_PLY_BUF1, FM801_PLY_BUF2, 1516 FM801_CAP_CTRL, FM801_CAP_COUNT, FM801_CAP_BUF1, FM801_CAP_BUF2, 1517 FM801_CODEC_CTRL, FM801_I2S_MODE, FM801_VOLUME, FM801_GEN_CTRL, 1518 }; 1519 1520 static int snd_fm801_suspend(struct pci_dev *pci, pm_message_t state) 1521 { 1522 struct snd_card *card = pci_get_drvdata(pci); 1523 struct fm801 *chip = card->private_data; 1524 int i; 1525 1526 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1527 snd_pcm_suspend_all(chip->pcm); 1528 snd_ac97_suspend(chip->ac97); 1529 snd_ac97_suspend(chip->ac97_sec); 1530 for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 1531 chip->saved_regs[i] = inw(chip->port + saved_regs[i]); 1532 /* FIXME: tea575x suspend */ 1533 1534 pci_disable_device(pci); 1535 pci_save_state(pci); 1536 pci_set_power_state(pci, pci_choose_state(pci, state)); 1537 return 0; 1538 } 1539 1540 static int snd_fm801_resume(struct pci_dev *pci) 1541 { 1542 struct snd_card *card = pci_get_drvdata(pci); 1543 struct fm801 *chip = card->private_data; 1544 int i; 1545 1546 pci_set_power_state(pci, PCI_D0); 1547 pci_restore_state(pci); 1548 if (pci_enable_device(pci) < 0) { 1549 printk(KERN_ERR "fm801: pci_enable_device failed, " 1550 "disabling device\n"); 1551 snd_card_disconnect(card); 1552 return -EIO; 1553 } 1554 pci_set_master(pci); 1555 1556 snd_fm801_chip_init(chip, 1); 1557 snd_ac97_resume(chip->ac97); 1558 snd_ac97_resume(chip->ac97_sec); 1559 for (i = 0; i < ARRAY_SIZE(saved_regs); i++) 1560 outw(chip->saved_regs[i], chip->port + saved_regs[i]); 1561 1562 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1563 return 0; 1564 } 1565 #endif 1566 1567 static struct pci_driver driver = { 1568 .name = "FM801", 1569 .id_table = snd_fm801_ids, 1570 .probe = snd_card_fm801_probe, 1571 .remove = __devexit_p(snd_card_fm801_remove), 1572 #ifdef CONFIG_PM 1573 .suspend = snd_fm801_suspend, 1574 .resume = snd_fm801_resume, 1575 #endif 1576 }; 1577 1578 static int __init alsa_card_fm801_init(void) 1579 { 1580 return pci_register_driver(&driver); 1581 } 1582 1583 static void __exit alsa_card_fm801_exit(void) 1584 { 1585 pci_unregister_driver(&driver); 1586 } 1587 1588 module_init(alsa_card_fm801_init) 1589 module_exit(alsa_card_fm801_exit) 1590