1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard 4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>, 5 * Jaroslav Kysela <perex@perex.cz>, 6 * Thomas Sailer <sailer@ife.ee.ethz.ch>, 7 * Abramo Bagnara <abramo@alsa-project.org>, 8 * Markus Gruber <gruber@eikon.tum.de> 9 * 10 * Rewritten from sonicvibes.c source. 11 * 12 * TODO: 13 * Rewrite better spinlocks 14 */ 15 16 /* 17 NOTES: 18 - Capture data is written unaligned starting from dma_base + 1 so I need to 19 disable mmap and to add a copy callback. 20 - After several cycle of the following: 21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done 22 a "playback write error (DMA or IRQ trouble?)" may happen. 23 This is due to playback interrupts not generated. 24 I suspect a timing issue. 25 - Sometimes the interrupt handler is invoked wrongly during playback. 26 This generates some harmless "Unexpected hw_pointer: wrong interrupt 27 acknowledge". 28 I've seen that using small period sizes. 29 Reproducible with: 30 mpg123 test.mp3 & 31 hdparm -t -T /dev/hda 32 */ 33 34 35 #include <linux/init.h> 36 #include <linux/interrupt.h> 37 #include <linux/pci.h> 38 #include <linux/slab.h> 39 #include <linux/gameport.h> 40 #include <linux/module.h> 41 #include <linux/delay.h> 42 #include <linux/dma-mapping.h> 43 #include <linux/io.h> 44 #include <sound/core.h> 45 #include <sound/control.h> 46 #include <sound/pcm.h> 47 #include <sound/opl3.h> 48 #include <sound/mpu401.h> 49 #include <sound/initval.h> 50 #include <sound/tlv.h> 51 52 MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>"); 53 MODULE_DESCRIPTION("ESS Solo-1"); 54 MODULE_LICENSE("GPL"); 55 56 #if IS_REACHABLE(CONFIG_GAMEPORT) 57 #define SUPPORT_JOYSTICK 1 58 #endif 59 60 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 61 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 62 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 63 64 module_param_array(index, int, NULL, 0444); 65 MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard."); 66 module_param_array(id, charp, NULL, 0444); 67 MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard."); 68 module_param_array(enable, bool, NULL, 0444); 69 MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard."); 70 71 #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x) 72 73 #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x) 74 75 #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x) 76 77 #define SL_PCI_LEGACYCONTROL 0x40 78 #define SL_PCI_CONFIG 0x50 79 #define SL_PCI_DDMACONTROL 0x60 80 81 #define ESSIO_REG_AUDIO2DMAADDR 0 82 #define ESSIO_REG_AUDIO2DMACOUNT 4 83 #define ESSIO_REG_AUDIO2MODE 6 84 #define ESSIO_REG_IRQCONTROL 7 85 86 #define ESSDM_REG_DMAADDR 0x00 87 #define ESSDM_REG_DMACOUNT 0x04 88 #define ESSDM_REG_DMACOMMAND 0x08 89 #define ESSDM_REG_DMASTATUS 0x08 90 #define ESSDM_REG_DMAMODE 0x0b 91 #define ESSDM_REG_DMACLEAR 0x0d 92 #define ESSDM_REG_DMAMASK 0x0f 93 94 #define ESSSB_REG_FMLOWADDR 0x00 95 #define ESSSB_REG_FMHIGHADDR 0x02 96 #define ESSSB_REG_MIXERADDR 0x04 97 #define ESSSB_REG_MIXERDATA 0x05 98 99 #define ESSSB_IREG_AUDIO1 0x14 100 #define ESSSB_IREG_MICMIX 0x1a 101 #define ESSSB_IREG_RECSRC 0x1c 102 #define ESSSB_IREG_MASTER 0x32 103 #define ESSSB_IREG_FM 0x36 104 #define ESSSB_IREG_AUXACD 0x38 105 #define ESSSB_IREG_AUXB 0x3a 106 #define ESSSB_IREG_PCSPEAKER 0x3c 107 #define ESSSB_IREG_LINE 0x3e 108 #define ESSSB_IREG_SPATCONTROL 0x50 109 #define ESSSB_IREG_SPATLEVEL 0x52 110 #define ESSSB_IREG_MASTER_LEFT 0x60 111 #define ESSSB_IREG_MASTER_RIGHT 0x62 112 #define ESSSB_IREG_MPU401CONTROL 0x64 113 #define ESSSB_IREG_MICMIXRECORD 0x68 114 #define ESSSB_IREG_AUDIO2RECORD 0x69 115 #define ESSSB_IREG_AUXACDRECORD 0x6a 116 #define ESSSB_IREG_FMRECORD 0x6b 117 #define ESSSB_IREG_AUXBRECORD 0x6c 118 #define ESSSB_IREG_MONO 0x6d 119 #define ESSSB_IREG_LINERECORD 0x6e 120 #define ESSSB_IREG_MONORECORD 0x6f 121 #define ESSSB_IREG_AUDIO2SAMPLE 0x70 122 #define ESSSB_IREG_AUDIO2MODE 0x71 123 #define ESSSB_IREG_AUDIO2FILTER 0x72 124 #define ESSSB_IREG_AUDIO2TCOUNTL 0x74 125 #define ESSSB_IREG_AUDIO2TCOUNTH 0x76 126 #define ESSSB_IREG_AUDIO2CONTROL1 0x78 127 #define ESSSB_IREG_AUDIO2CONTROL2 0x7a 128 #define ESSSB_IREG_AUDIO2 0x7c 129 130 #define ESSSB_REG_RESET 0x06 131 132 #define ESSSB_REG_READDATA 0x0a 133 #define ESSSB_REG_WRITEDATA 0x0c 134 #define ESSSB_REG_READSTATUS 0x0c 135 136 #define ESSSB_REG_STATUS 0x0e 137 138 #define ESS_CMD_EXTSAMPLERATE 0xa1 139 #define ESS_CMD_FILTERDIV 0xa2 140 #define ESS_CMD_DMACNTRELOADL 0xa4 141 #define ESS_CMD_DMACNTRELOADH 0xa5 142 #define ESS_CMD_ANALOGCONTROL 0xa8 143 #define ESS_CMD_IRQCONTROL 0xb1 144 #define ESS_CMD_DRQCONTROL 0xb2 145 #define ESS_CMD_RECLEVEL 0xb4 146 #define ESS_CMD_SETFORMAT 0xb6 147 #define ESS_CMD_SETFORMAT2 0xb7 148 #define ESS_CMD_DMACONTROL 0xb8 149 #define ESS_CMD_DMATYPE 0xb9 150 #define ESS_CMD_OFFSETLEFT 0xba 151 #define ESS_CMD_OFFSETRIGHT 0xbb 152 #define ESS_CMD_READREG 0xc0 153 #define ESS_CMD_ENABLEEXT 0xc6 154 #define ESS_CMD_PAUSEDMA 0xd0 155 #define ESS_CMD_ENABLEAUDIO1 0xd1 156 #define ESS_CMD_STOPAUDIO1 0xd3 157 #define ESS_CMD_AUDIO1STATUS 0xd8 158 #define ESS_CMD_CONTDMA 0xd4 159 #define ESS_CMD_TESTIRQ 0xf2 160 161 #define ESS_RECSRC_MIC 0 162 #define ESS_RECSRC_AUXACD 2 163 #define ESS_RECSRC_AUXB 5 164 #define ESS_RECSRC_LINE 6 165 #define ESS_RECSRC_NONE 7 166 167 #define DAC1 0x01 168 #define ADC1 0x02 169 #define DAC2 0x04 170 171 /* 172 173 */ 174 175 #define SAVED_REG_SIZE 32 /* max. number of registers to save */ 176 177 struct es1938 { 178 int irq; 179 180 unsigned long io_port; 181 unsigned long sb_port; 182 unsigned long vc_port; 183 unsigned long mpu_port; 184 unsigned long game_port; 185 unsigned long ddma_port; 186 187 unsigned char irqmask; 188 unsigned char revision; 189 190 struct snd_kcontrol *hw_volume; 191 struct snd_kcontrol *hw_switch; 192 struct snd_kcontrol *master_volume; 193 struct snd_kcontrol *master_switch; 194 195 struct pci_dev *pci; 196 struct snd_card *card; 197 struct snd_pcm *pcm; 198 struct snd_pcm_substream *capture_substream; 199 struct snd_pcm_substream *playback1_substream; 200 struct snd_pcm_substream *playback2_substream; 201 struct snd_rawmidi *rmidi; 202 203 unsigned int dma1_size; 204 unsigned int dma2_size; 205 unsigned int dma1_start; 206 unsigned int dma2_start; 207 unsigned int dma1_shift; 208 unsigned int dma2_shift; 209 unsigned int last_capture_dmaaddr; 210 unsigned int active; 211 212 spinlock_t reg_lock; 213 spinlock_t mixer_lock; 214 struct snd_info_entry *proc_entry; 215 216 #ifdef SUPPORT_JOYSTICK 217 struct gameport *gameport; 218 #endif 219 #ifdef CONFIG_PM_SLEEP 220 unsigned char saved_regs[SAVED_REG_SIZE]; 221 #endif 222 }; 223 224 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id); 225 226 static const struct pci_device_id snd_es1938_ids[] = { 227 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */ 228 { 0, } 229 }; 230 231 MODULE_DEVICE_TABLE(pci, snd_es1938_ids); 232 233 #define RESET_LOOP_TIMEOUT 0x10000 234 #define WRITE_LOOP_TIMEOUT 0x10000 235 #define GET_LOOP_TIMEOUT 0x01000 236 237 /* ----------------------------------------------------------------- 238 * Write to a mixer register 239 * -----------------------------------------------------------------*/ 240 static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val) 241 { 242 unsigned long flags; 243 spin_lock_irqsave(&chip->mixer_lock, flags); 244 outb(reg, SLSB_REG(chip, MIXERADDR)); 245 outb(val, SLSB_REG(chip, MIXERDATA)); 246 spin_unlock_irqrestore(&chip->mixer_lock, flags); 247 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val); 248 } 249 250 /* ----------------------------------------------------------------- 251 * Read from a mixer register 252 * -----------------------------------------------------------------*/ 253 static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg) 254 { 255 int data; 256 unsigned long flags; 257 spin_lock_irqsave(&chip->mixer_lock, flags); 258 outb(reg, SLSB_REG(chip, MIXERADDR)); 259 data = inb(SLSB_REG(chip, MIXERDATA)); 260 spin_unlock_irqrestore(&chip->mixer_lock, flags); 261 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data); 262 return data; 263 } 264 265 /* ----------------------------------------------------------------- 266 * Write to some bits of a mixer register (return old value) 267 * -----------------------------------------------------------------*/ 268 static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg, 269 unsigned char mask, unsigned char val) 270 { 271 unsigned long flags; 272 unsigned char old, new, oval; 273 spin_lock_irqsave(&chip->mixer_lock, flags); 274 outb(reg, SLSB_REG(chip, MIXERADDR)); 275 old = inb(SLSB_REG(chip, MIXERDATA)); 276 oval = old & mask; 277 if (val != oval) { 278 new = (old & ~mask) | (val & mask); 279 outb(new, SLSB_REG(chip, MIXERDATA)); 280 dev_dbg(chip->card->dev, 281 "Mixer reg %02x was %02x, set to %02x\n", 282 reg, old, new); 283 } 284 spin_unlock_irqrestore(&chip->mixer_lock, flags); 285 return oval; 286 } 287 288 /* ----------------------------------------------------------------- 289 * Write command to Controller Registers 290 * -----------------------------------------------------------------*/ 291 static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd) 292 { 293 int i; 294 unsigned char v; 295 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) { 296 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) { 297 outb(cmd, SLSB_REG(chip, WRITEDATA)); 298 return; 299 } 300 } 301 dev_err(chip->card->dev, 302 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v); 303 } 304 305 /* ----------------------------------------------------------------- 306 * Read the Read Data Buffer 307 * -----------------------------------------------------------------*/ 308 static int snd_es1938_get_byte(struct es1938 *chip) 309 { 310 int i; 311 unsigned char v; 312 for (i = GET_LOOP_TIMEOUT; i; i--) 313 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80) 314 return inb(SLSB_REG(chip, READDATA)); 315 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v); 316 return -ENODEV; 317 } 318 319 /* ----------------------------------------------------------------- 320 * Write value cmd register 321 * -----------------------------------------------------------------*/ 322 static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val) 323 { 324 unsigned long flags; 325 spin_lock_irqsave(&chip->reg_lock, flags); 326 snd_es1938_write_cmd(chip, reg); 327 snd_es1938_write_cmd(chip, val); 328 spin_unlock_irqrestore(&chip->reg_lock, flags); 329 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val); 330 } 331 332 /* ----------------------------------------------------------------- 333 * Read data from cmd register and return it 334 * -----------------------------------------------------------------*/ 335 static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg) 336 { 337 unsigned char val; 338 unsigned long flags; 339 spin_lock_irqsave(&chip->reg_lock, flags); 340 snd_es1938_write_cmd(chip, ESS_CMD_READREG); 341 snd_es1938_write_cmd(chip, reg); 342 val = snd_es1938_get_byte(chip); 343 spin_unlock_irqrestore(&chip->reg_lock, flags); 344 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val); 345 return val; 346 } 347 348 /* ----------------------------------------------------------------- 349 * Write data to cmd register and return old value 350 * -----------------------------------------------------------------*/ 351 static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask, 352 unsigned char val) 353 { 354 unsigned long flags; 355 unsigned char old, new, oval; 356 spin_lock_irqsave(&chip->reg_lock, flags); 357 snd_es1938_write_cmd(chip, ESS_CMD_READREG); 358 snd_es1938_write_cmd(chip, reg); 359 old = snd_es1938_get_byte(chip); 360 oval = old & mask; 361 if (val != oval) { 362 snd_es1938_write_cmd(chip, reg); 363 new = (old & ~mask) | (val & mask); 364 snd_es1938_write_cmd(chip, new); 365 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n", 366 reg, old, new); 367 } 368 spin_unlock_irqrestore(&chip->reg_lock, flags); 369 return oval; 370 } 371 372 /* -------------------------------------------------------------------- 373 * Reset the chip 374 * --------------------------------------------------------------------*/ 375 static void snd_es1938_reset(struct es1938 *chip) 376 { 377 int i; 378 379 outb(3, SLSB_REG(chip, RESET)); 380 inb(SLSB_REG(chip, RESET)); 381 outb(0, SLSB_REG(chip, RESET)); 382 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) { 383 if (inb(SLSB_REG(chip, STATUS)) & 0x80) { 384 if (inb(SLSB_REG(chip, READDATA)) == 0xaa) 385 goto __next; 386 } 387 } 388 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n"); 389 390 __next: 391 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT); 392 393 /* Demand transfer DMA: 4 bytes per DMA request */ 394 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2); 395 396 /* Change behaviour of register A1 397 4x oversampling 398 2nd channel DAC asynchronous */ 399 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32); 400 /* enable/select DMA channel and IRQ channel */ 401 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50); 402 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50); 403 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1); 404 /* Set spatializer parameters to recommended values */ 405 snd_es1938_mixer_write(chip, 0x54, 0x8f); 406 snd_es1938_mixer_write(chip, 0x56, 0x95); 407 snd_es1938_mixer_write(chip, 0x58, 0x94); 408 snd_es1938_mixer_write(chip, 0x5a, 0x80); 409 } 410 411 /* -------------------------------------------------------------------- 412 * Reset the FIFOs 413 * --------------------------------------------------------------------*/ 414 static void snd_es1938_reset_fifo(struct es1938 *chip) 415 { 416 outb(2, SLSB_REG(chip, RESET)); 417 outb(0, SLSB_REG(chip, RESET)); 418 } 419 420 static const struct snd_ratnum clocks[2] = { 421 { 422 .num = 793800, 423 .den_min = 1, 424 .den_max = 128, 425 .den_step = 1, 426 }, 427 { 428 .num = 768000, 429 .den_min = 1, 430 .den_max = 128, 431 .den_step = 1, 432 } 433 }; 434 435 static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = { 436 .nrats = 2, 437 .rats = clocks, 438 }; 439 440 441 static void snd_es1938_rate_set(struct es1938 *chip, 442 struct snd_pcm_substream *substream, 443 int mode) 444 { 445 unsigned int bits, div0; 446 struct snd_pcm_runtime *runtime = substream->runtime; 447 if (runtime->rate_num == clocks[0].num) 448 bits = 128 - runtime->rate_den; 449 else 450 bits = 256 - runtime->rate_den; 451 452 /* set filter register */ 453 div0 = 256 - 7160000*20/(8*82*runtime->rate); 454 455 if (mode == DAC2) { 456 snd_es1938_mixer_write(chip, 0x70, bits); 457 snd_es1938_mixer_write(chip, 0x72, div0); 458 } else { 459 snd_es1938_write(chip, 0xA1, bits); 460 snd_es1938_write(chip, 0xA2, div0); 461 } 462 } 463 464 /* -------------------------------------------------------------------- 465 * Configure Solo1 builtin DMA Controller 466 * --------------------------------------------------------------------*/ 467 468 static void snd_es1938_playback1_setdma(struct es1938 *chip) 469 { 470 outb(0x00, SLIO_REG(chip, AUDIO2MODE)); 471 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR)); 472 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT)); 473 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT)); 474 } 475 476 static void snd_es1938_playback2_setdma(struct es1938 *chip) 477 { 478 /* Enable DMA controller */ 479 outb(0xc4, SLDM_REG(chip, DMACOMMAND)); 480 /* 1. Master reset */ 481 outb(0, SLDM_REG(chip, DMACLEAR)); 482 /* 2. Mask DMA */ 483 outb(1, SLDM_REG(chip, DMAMASK)); 484 outb(0x18, SLDM_REG(chip, DMAMODE)); 485 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); 486 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); 487 /* 3. Unmask DMA */ 488 outb(0, SLDM_REG(chip, DMAMASK)); 489 } 490 491 static void snd_es1938_capture_setdma(struct es1938 *chip) 492 { 493 /* Enable DMA controller */ 494 outb(0xc4, SLDM_REG(chip, DMACOMMAND)); 495 /* 1. Master reset */ 496 outb(0, SLDM_REG(chip, DMACLEAR)); 497 /* 2. Mask DMA */ 498 outb(1, SLDM_REG(chip, DMAMASK)); 499 outb(0x14, SLDM_REG(chip, DMAMODE)); 500 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); 501 chip->last_capture_dmaaddr = chip->dma1_start; 502 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); 503 /* 3. Unmask DMA */ 504 outb(0, SLDM_REG(chip, DMAMASK)); 505 } 506 507 /* ---------------------------------------------------------------------- 508 * 509 * *** PCM part *** 510 */ 511 512 static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream, 513 int cmd) 514 { 515 struct es1938 *chip = snd_pcm_substream_chip(substream); 516 int val; 517 switch (cmd) { 518 case SNDRV_PCM_TRIGGER_START: 519 case SNDRV_PCM_TRIGGER_RESUME: 520 val = 0x0f; 521 chip->active |= ADC1; 522 break; 523 case SNDRV_PCM_TRIGGER_STOP: 524 case SNDRV_PCM_TRIGGER_SUSPEND: 525 val = 0x00; 526 chip->active &= ~ADC1; 527 break; 528 default: 529 return -EINVAL; 530 } 531 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); 532 return 0; 533 } 534 535 static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream, 536 int cmd) 537 { 538 struct es1938 *chip = snd_pcm_substream_chip(substream); 539 switch (cmd) { 540 case SNDRV_PCM_TRIGGER_START: 541 case SNDRV_PCM_TRIGGER_RESUME: 542 /* According to the documentation this should be: 543 0x13 but that value may randomly swap stereo channels */ 544 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92); 545 udelay(10); 546 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93); 547 /* This two stage init gives the FIFO -> DAC connection time to 548 * settle before first data from DMA flows in. This should ensure 549 * no swapping of stereo channels. Report a bug if otherwise :-) */ 550 outb(0x0a, SLIO_REG(chip, AUDIO2MODE)); 551 chip->active |= DAC2; 552 break; 553 case SNDRV_PCM_TRIGGER_STOP: 554 case SNDRV_PCM_TRIGGER_SUSPEND: 555 outb(0, SLIO_REG(chip, AUDIO2MODE)); 556 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0); 557 chip->active &= ~DAC2; 558 break; 559 default: 560 return -EINVAL; 561 } 562 return 0; 563 } 564 565 static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream, 566 int cmd) 567 { 568 struct es1938 *chip = snd_pcm_substream_chip(substream); 569 int val; 570 switch (cmd) { 571 case SNDRV_PCM_TRIGGER_START: 572 case SNDRV_PCM_TRIGGER_RESUME: 573 val = 5; 574 chip->active |= DAC1; 575 break; 576 case SNDRV_PCM_TRIGGER_STOP: 577 case SNDRV_PCM_TRIGGER_SUSPEND: 578 val = 0; 579 chip->active &= ~DAC1; 580 break; 581 default: 582 return -EINVAL; 583 } 584 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); 585 return 0; 586 } 587 588 static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream, 589 int cmd) 590 { 591 switch (substream->number) { 592 case 0: 593 return snd_es1938_playback1_trigger(substream, cmd); 594 case 1: 595 return snd_es1938_playback2_trigger(substream, cmd); 596 } 597 snd_BUG(); 598 return -EINVAL; 599 } 600 601 /* -------------------------------------------------------------------- 602 * First channel for Extended Mode Audio 1 ADC Operation 603 * --------------------------------------------------------------------*/ 604 static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream) 605 { 606 struct es1938 *chip = snd_pcm_substream_chip(substream); 607 struct snd_pcm_runtime *runtime = substream->runtime; 608 int u, is8, mono; 609 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 610 unsigned int count = snd_pcm_lib_period_bytes(substream); 611 612 chip->dma1_size = size; 613 chip->dma1_start = runtime->dma_addr; 614 615 mono = (runtime->channels > 1) ? 0 : 1; 616 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; 617 u = snd_pcm_format_unsigned(runtime->format); 618 619 chip->dma1_shift = 2 - mono - is8; 620 621 snd_es1938_reset_fifo(chip); 622 623 /* program type */ 624 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); 625 626 /* set clock and counters */ 627 snd_es1938_rate_set(chip, substream, ADC1); 628 629 count = 0x10000 - count; 630 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); 631 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); 632 633 /* initialize and configure ADC */ 634 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71); 635 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 | 636 (u ? 0x00 : 0x20) | 637 (is8 ? 0x00 : 0x04) | 638 (mono ? 0x40 : 0x08)); 639 640 // snd_es1938_reset_fifo(chip); 641 642 /* 11. configure system interrupt controller and DMA controller */ 643 snd_es1938_capture_setdma(chip); 644 645 return 0; 646 } 647 648 649 /* ------------------------------------------------------------------------------ 650 * Second Audio channel DAC Operation 651 * ------------------------------------------------------------------------------*/ 652 static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream) 653 { 654 struct es1938 *chip = snd_pcm_substream_chip(substream); 655 struct snd_pcm_runtime *runtime = substream->runtime; 656 int u, is8, mono; 657 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 658 unsigned int count = snd_pcm_lib_period_bytes(substream); 659 660 chip->dma2_size = size; 661 chip->dma2_start = runtime->dma_addr; 662 663 mono = (runtime->channels > 1) ? 0 : 1; 664 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; 665 u = snd_pcm_format_unsigned(runtime->format); 666 667 chip->dma2_shift = 2 - mono - is8; 668 669 snd_es1938_reset_fifo(chip); 670 671 /* set clock and counters */ 672 snd_es1938_rate_set(chip, substream, DAC2); 673 674 count >>= 1; 675 count = 0x10000 - count; 676 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff); 677 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8); 678 679 /* initialize and configure Audio 2 DAC */ 680 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | 681 (mono ? 0 : 2) | (is8 ? 0 : 1)); 682 683 /* program DMA */ 684 snd_es1938_playback1_setdma(chip); 685 686 return 0; 687 } 688 689 static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream) 690 { 691 struct es1938 *chip = snd_pcm_substream_chip(substream); 692 struct snd_pcm_runtime *runtime = substream->runtime; 693 int u, is8, mono; 694 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 695 unsigned int count = snd_pcm_lib_period_bytes(substream); 696 697 chip->dma1_size = size; 698 chip->dma1_start = runtime->dma_addr; 699 700 mono = (runtime->channels > 1) ? 0 : 1; 701 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; 702 u = snd_pcm_format_unsigned(runtime->format); 703 704 chip->dma1_shift = 2 - mono - is8; 705 706 count = 0x10000 - count; 707 708 /* reset */ 709 snd_es1938_reset_fifo(chip); 710 711 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); 712 713 /* set clock and counters */ 714 snd_es1938_rate_set(chip, substream, DAC1); 715 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); 716 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); 717 718 /* initialized and configure DAC */ 719 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00); 720 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71); 721 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 722 0x90 | (mono ? 0x40 : 0x08) | 723 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20)); 724 725 /* program DMA */ 726 snd_es1938_playback2_setdma(chip); 727 728 return 0; 729 } 730 731 static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream) 732 { 733 switch (substream->number) { 734 case 0: 735 return snd_es1938_playback1_prepare(substream); 736 case 1: 737 return snd_es1938_playback2_prepare(substream); 738 } 739 snd_BUG(); 740 return -EINVAL; 741 } 742 743 /* during the incrementing of dma counters the DMA register reads sometimes 744 returns garbage. To ensure a valid hw pointer, the following checks which 745 should be very unlikely to fail are used: 746 - is the current DMA address in the valid DMA range ? 747 - is the sum of DMA address and DMA counter pointing to the last DMA byte ? 748 One can argue this could differ by one byte depending on which register is 749 updated first, so the implementation below allows for that. 750 */ 751 static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream) 752 { 753 struct es1938 *chip = snd_pcm_substream_chip(substream); 754 size_t ptr; 755 #if 0 756 size_t old, new; 757 /* This stuff is *needed*, don't ask why - AB */ 758 old = inw(SLDM_REG(chip, DMACOUNT)); 759 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) 760 old = new; 761 ptr = chip->dma1_size - 1 - new; 762 #else 763 size_t count; 764 unsigned int diff; 765 766 ptr = inl(SLDM_REG(chip, DMAADDR)); 767 count = inw(SLDM_REG(chip, DMACOUNT)); 768 diff = chip->dma1_start + chip->dma1_size - ptr - count; 769 770 if (diff > 3 || ptr < chip->dma1_start 771 || ptr >= chip->dma1_start+chip->dma1_size) 772 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */ 773 else 774 chip->last_capture_dmaaddr = ptr; /* good, remember it */ 775 776 ptr -= chip->dma1_start; 777 #endif 778 return ptr >> chip->dma1_shift; 779 } 780 781 static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream) 782 { 783 struct es1938 *chip = snd_pcm_substream_chip(substream); 784 size_t ptr; 785 #if 1 786 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT)); 787 #else 788 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start; 789 #endif 790 return ptr >> chip->dma2_shift; 791 } 792 793 static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream) 794 { 795 struct es1938 *chip = snd_pcm_substream_chip(substream); 796 size_t ptr; 797 size_t old, new; 798 #if 1 799 /* This stuff is *needed*, don't ask why - AB */ 800 old = inw(SLDM_REG(chip, DMACOUNT)); 801 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) 802 old = new; 803 ptr = chip->dma1_size - 1 - new; 804 #else 805 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start; 806 #endif 807 return ptr >> chip->dma1_shift; 808 } 809 810 static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream) 811 { 812 switch (substream->number) { 813 case 0: 814 return snd_es1938_playback1_pointer(substream); 815 case 1: 816 return snd_es1938_playback2_pointer(substream); 817 } 818 snd_BUG(); 819 return -EINVAL; 820 } 821 822 static int snd_es1938_capture_copy(struct snd_pcm_substream *substream, 823 int channel, unsigned long pos, 824 void __user *dst, unsigned long count) 825 { 826 struct snd_pcm_runtime *runtime = substream->runtime; 827 struct es1938 *chip = snd_pcm_substream_chip(substream); 828 829 if (snd_BUG_ON(pos + count > chip->dma1_size)) 830 return -EINVAL; 831 if (pos + count < chip->dma1_size) { 832 if (copy_to_user(dst, runtime->dma_area + pos + 1, count)) 833 return -EFAULT; 834 } else { 835 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1)) 836 return -EFAULT; 837 if (put_user(runtime->dma_area[0], 838 ((unsigned char __user *)dst) + count - 1)) 839 return -EFAULT; 840 } 841 return 0; 842 } 843 844 static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream, 845 int channel, unsigned long pos, 846 void *dst, unsigned long count) 847 { 848 struct snd_pcm_runtime *runtime = substream->runtime; 849 struct es1938 *chip = snd_pcm_substream_chip(substream); 850 851 if (snd_BUG_ON(pos + count > chip->dma1_size)) 852 return -EINVAL; 853 if (pos + count < chip->dma1_size) { 854 memcpy(dst, runtime->dma_area + pos + 1, count); 855 } else { 856 memcpy(dst, runtime->dma_area + pos + 1, count - 1); 857 runtime->dma_area[0] = *((unsigned char *)dst + count - 1); 858 } 859 return 0; 860 } 861 862 /* ---------------------------------------------------------------------- 863 * Audio1 Capture (ADC) 864 * ----------------------------------------------------------------------*/ 865 static const struct snd_pcm_hardware snd_es1938_capture = 866 { 867 .info = (SNDRV_PCM_INFO_INTERLEAVED | 868 SNDRV_PCM_INFO_BLOCK_TRANSFER), 869 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 870 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), 871 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 872 .rate_min = 6000, 873 .rate_max = 48000, 874 .channels_min = 1, 875 .channels_max = 2, 876 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ 877 .period_bytes_min = 64, 878 .period_bytes_max = 0x8000, 879 .periods_min = 1, 880 .periods_max = 1024, 881 .fifo_size = 256, 882 }; 883 884 /* ----------------------------------------------------------------------- 885 * Audio2 Playback (DAC) 886 * -----------------------------------------------------------------------*/ 887 static const struct snd_pcm_hardware snd_es1938_playback = 888 { 889 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 890 SNDRV_PCM_INFO_BLOCK_TRANSFER | 891 SNDRV_PCM_INFO_MMAP_VALID), 892 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 893 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), 894 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 895 .rate_min = 6000, 896 .rate_max = 48000, 897 .channels_min = 1, 898 .channels_max = 2, 899 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ 900 .period_bytes_min = 64, 901 .period_bytes_max = 0x8000, 902 .periods_min = 1, 903 .periods_max = 1024, 904 .fifo_size = 256, 905 }; 906 907 static int snd_es1938_capture_open(struct snd_pcm_substream *substream) 908 { 909 struct es1938 *chip = snd_pcm_substream_chip(substream); 910 struct snd_pcm_runtime *runtime = substream->runtime; 911 912 if (chip->playback2_substream) 913 return -EAGAIN; 914 chip->capture_substream = substream; 915 runtime->hw = snd_es1938_capture; 916 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 917 &hw_constraints_clocks); 918 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); 919 return 0; 920 } 921 922 static int snd_es1938_playback_open(struct snd_pcm_substream *substream) 923 { 924 struct es1938 *chip = snd_pcm_substream_chip(substream); 925 struct snd_pcm_runtime *runtime = substream->runtime; 926 927 switch (substream->number) { 928 case 0: 929 chip->playback1_substream = substream; 930 break; 931 case 1: 932 if (chip->capture_substream) 933 return -EAGAIN; 934 chip->playback2_substream = substream; 935 break; 936 default: 937 snd_BUG(); 938 return -EINVAL; 939 } 940 runtime->hw = snd_es1938_playback; 941 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 942 &hw_constraints_clocks); 943 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); 944 return 0; 945 } 946 947 static int snd_es1938_capture_close(struct snd_pcm_substream *substream) 948 { 949 struct es1938 *chip = snd_pcm_substream_chip(substream); 950 951 chip->capture_substream = NULL; 952 return 0; 953 } 954 955 static int snd_es1938_playback_close(struct snd_pcm_substream *substream) 956 { 957 struct es1938 *chip = snd_pcm_substream_chip(substream); 958 959 switch (substream->number) { 960 case 0: 961 chip->playback1_substream = NULL; 962 break; 963 case 1: 964 chip->playback2_substream = NULL; 965 break; 966 default: 967 snd_BUG(); 968 return -EINVAL; 969 } 970 return 0; 971 } 972 973 static const struct snd_pcm_ops snd_es1938_playback_ops = { 974 .open = snd_es1938_playback_open, 975 .close = snd_es1938_playback_close, 976 .prepare = snd_es1938_playback_prepare, 977 .trigger = snd_es1938_playback_trigger, 978 .pointer = snd_es1938_playback_pointer, 979 }; 980 981 static const struct snd_pcm_ops snd_es1938_capture_ops = { 982 .open = snd_es1938_capture_open, 983 .close = snd_es1938_capture_close, 984 .prepare = snd_es1938_capture_prepare, 985 .trigger = snd_es1938_capture_trigger, 986 .pointer = snd_es1938_capture_pointer, 987 .copy_user = snd_es1938_capture_copy, 988 .copy_kernel = snd_es1938_capture_copy_kernel, 989 }; 990 991 static int snd_es1938_new_pcm(struct es1938 *chip, int device) 992 { 993 struct snd_pcm *pcm; 994 int err; 995 996 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0) 997 return err; 998 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops); 999 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops); 1000 1001 pcm->private_data = chip; 1002 pcm->info_flags = 0; 1003 strcpy(pcm->name, "ESS Solo-1"); 1004 1005 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 1006 &chip->pci->dev, 64*1024, 64*1024); 1007 1008 chip->pcm = pcm; 1009 return 0; 1010 } 1011 1012 /* ------------------------------------------------------------------- 1013 * 1014 * *** Mixer part *** 1015 */ 1016 1017 static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol, 1018 struct snd_ctl_elem_info *uinfo) 1019 { 1020 static const char * const texts[8] = { 1021 "Mic", "Mic Master", "CD", "AOUT", 1022 "Mic1", "Mix", "Line", "Master" 1023 }; 1024 1025 return snd_ctl_enum_info(uinfo, 1, 8, texts); 1026 } 1027 1028 static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol, 1029 struct snd_ctl_elem_value *ucontrol) 1030 { 1031 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1032 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07; 1033 return 0; 1034 } 1035 1036 static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol, 1037 struct snd_ctl_elem_value *ucontrol) 1038 { 1039 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1040 unsigned char val = ucontrol->value.enumerated.item[0]; 1041 1042 if (val > 7) 1043 return -EINVAL; 1044 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val; 1045 } 1046 1047 #define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info 1048 1049 static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol, 1050 struct snd_ctl_elem_value *ucontrol) 1051 { 1052 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1053 unsigned char val = snd_es1938_mixer_read(chip, 0x50); 1054 ucontrol->value.integer.value[0] = !!(val & 8); 1055 return 0; 1056 } 1057 1058 static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol, 1059 struct snd_ctl_elem_value *ucontrol) 1060 { 1061 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1062 unsigned char oval, nval; 1063 int change; 1064 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04; 1065 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c; 1066 change = nval != oval; 1067 if (change) { 1068 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04); 1069 snd_es1938_mixer_write(chip, 0x50, nval); 1070 } 1071 return change; 1072 } 1073 1074 static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol, 1075 struct snd_ctl_elem_info *uinfo) 1076 { 1077 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1078 uinfo->count = 2; 1079 uinfo->value.integer.min = 0; 1080 uinfo->value.integer.max = 63; 1081 return 0; 1082 } 1083 1084 static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol, 1085 struct snd_ctl_elem_value *ucontrol) 1086 { 1087 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1088 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f; 1089 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f; 1090 return 0; 1091 } 1092 1093 #define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info 1094 1095 static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol, 1096 struct snd_ctl_elem_value *ucontrol) 1097 { 1098 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1099 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40); 1100 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40); 1101 return 0; 1102 } 1103 1104 static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol) 1105 { 1106 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1107 chip->master_volume = NULL; 1108 chip->master_switch = NULL; 1109 chip->hw_volume = NULL; 1110 chip->hw_switch = NULL; 1111 } 1112 1113 static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg, 1114 unsigned char mask, unsigned char val) 1115 { 1116 if (reg < 0xa0) 1117 return snd_es1938_mixer_bits(chip, reg, mask, val); 1118 else 1119 return snd_es1938_bits(chip, reg, mask, val); 1120 } 1121 1122 static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg) 1123 { 1124 if (reg < 0xa0) 1125 return snd_es1938_mixer_read(chip, reg); 1126 else 1127 return snd_es1938_read(chip, reg); 1128 } 1129 1130 #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ 1131 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1132 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\ 1133 .name = xname, .index = xindex, \ 1134 .info = snd_es1938_info_single, \ 1135 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ 1136 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ 1137 .tlv = { .p = xtlv } } 1138 #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \ 1139 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1140 .info = snd_es1938_info_single, \ 1141 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ 1142 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 1143 1144 static int snd_es1938_info_single(struct snd_kcontrol *kcontrol, 1145 struct snd_ctl_elem_info *uinfo) 1146 { 1147 int mask = (kcontrol->private_value >> 16) & 0xff; 1148 1149 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1150 uinfo->count = 1; 1151 uinfo->value.integer.min = 0; 1152 uinfo->value.integer.max = mask; 1153 return 0; 1154 } 1155 1156 static int snd_es1938_get_single(struct snd_kcontrol *kcontrol, 1157 struct snd_ctl_elem_value *ucontrol) 1158 { 1159 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1160 int reg = kcontrol->private_value & 0xff; 1161 int shift = (kcontrol->private_value >> 8) & 0xff; 1162 int mask = (kcontrol->private_value >> 16) & 0xff; 1163 int invert = (kcontrol->private_value >> 24) & 0xff; 1164 int val; 1165 1166 val = snd_es1938_reg_read(chip, reg); 1167 ucontrol->value.integer.value[0] = (val >> shift) & mask; 1168 if (invert) 1169 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1170 return 0; 1171 } 1172 1173 static int snd_es1938_put_single(struct snd_kcontrol *kcontrol, 1174 struct snd_ctl_elem_value *ucontrol) 1175 { 1176 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1177 int reg = kcontrol->private_value & 0xff; 1178 int shift = (kcontrol->private_value >> 8) & 0xff; 1179 int mask = (kcontrol->private_value >> 16) & 0xff; 1180 int invert = (kcontrol->private_value >> 24) & 0xff; 1181 unsigned char val; 1182 1183 val = (ucontrol->value.integer.value[0] & mask); 1184 if (invert) 1185 val = mask - val; 1186 mask <<= shift; 1187 val <<= shift; 1188 return snd_es1938_reg_bits(chip, reg, mask, val) != val; 1189 } 1190 1191 #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \ 1192 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1193 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\ 1194 .name = xname, .index = xindex, \ 1195 .info = snd_es1938_info_double, \ 1196 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ 1197 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \ 1198 .tlv = { .p = xtlv } } 1199 #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ 1200 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1201 .info = snd_es1938_info_double, \ 1202 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ 1203 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) } 1204 1205 static int snd_es1938_info_double(struct snd_kcontrol *kcontrol, 1206 struct snd_ctl_elem_info *uinfo) 1207 { 1208 int mask = (kcontrol->private_value >> 24) & 0xff; 1209 1210 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1211 uinfo->count = 2; 1212 uinfo->value.integer.min = 0; 1213 uinfo->value.integer.max = mask; 1214 return 0; 1215 } 1216 1217 static int snd_es1938_get_double(struct snd_kcontrol *kcontrol, 1218 struct snd_ctl_elem_value *ucontrol) 1219 { 1220 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1221 int left_reg = kcontrol->private_value & 0xff; 1222 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1223 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1224 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1225 int mask = (kcontrol->private_value >> 24) & 0xff; 1226 int invert = (kcontrol->private_value >> 22) & 1; 1227 unsigned char left, right; 1228 1229 left = snd_es1938_reg_read(chip, left_reg); 1230 if (left_reg != right_reg) 1231 right = snd_es1938_reg_read(chip, right_reg); 1232 else 1233 right = left; 1234 ucontrol->value.integer.value[0] = (left >> shift_left) & mask; 1235 ucontrol->value.integer.value[1] = (right >> shift_right) & mask; 1236 if (invert) { 1237 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1238 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 1239 } 1240 return 0; 1241 } 1242 1243 static int snd_es1938_put_double(struct snd_kcontrol *kcontrol, 1244 struct snd_ctl_elem_value *ucontrol) 1245 { 1246 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1247 int left_reg = kcontrol->private_value & 0xff; 1248 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1249 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1250 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1251 int mask = (kcontrol->private_value >> 24) & 0xff; 1252 int invert = (kcontrol->private_value >> 22) & 1; 1253 int change; 1254 unsigned char val1, val2, mask1, mask2; 1255 1256 val1 = ucontrol->value.integer.value[0] & mask; 1257 val2 = ucontrol->value.integer.value[1] & mask; 1258 if (invert) { 1259 val1 = mask - val1; 1260 val2 = mask - val2; 1261 } 1262 val1 <<= shift_left; 1263 val2 <<= shift_right; 1264 mask1 = mask << shift_left; 1265 mask2 = mask << shift_right; 1266 if (left_reg != right_reg) { 1267 change = 0; 1268 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1) 1269 change = 1; 1270 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2) 1271 change = 1; 1272 } else { 1273 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2, 1274 val1 | val2) != (val1 | val2)); 1275 } 1276 return change; 1277 } 1278 1279 static const DECLARE_TLV_DB_RANGE(db_scale_master, 1280 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1), 1281 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0), 1282 ); 1283 1284 static const DECLARE_TLV_DB_RANGE(db_scale_audio1, 1285 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1), 1286 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0), 1287 ); 1288 1289 static const DECLARE_TLV_DB_RANGE(db_scale_audio2, 1290 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1), 1291 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0), 1292 ); 1293 1294 static const DECLARE_TLV_DB_RANGE(db_scale_mic, 1295 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1), 1296 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0), 1297 ); 1298 1299 static const DECLARE_TLV_DB_RANGE(db_scale_line, 1300 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1), 1301 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0), 1302 ); 1303 1304 static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0); 1305 1306 static const struct snd_kcontrol_new snd_es1938_controls[] = { 1307 ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0, 1308 db_scale_master), 1309 ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1), 1310 { 1311 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1312 .name = "Hardware Master Playback Volume", 1313 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1314 .info = snd_es1938_info_hw_volume, 1315 .get = snd_es1938_get_hw_volume, 1316 }, 1317 { 1318 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1319 .access = (SNDRV_CTL_ELEM_ACCESS_READ | 1320 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1321 .name = "Hardware Master Playback Switch", 1322 .info = snd_es1938_info_hw_switch, 1323 .get = snd_es1938_get_hw_switch, 1324 .tlv = { .p = db_scale_master }, 1325 }, 1326 ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0), 1327 ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0, 1328 db_scale_line), 1329 ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0), 1330 ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0, 1331 db_scale_mic), 1332 ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0, 1333 db_scale_line), 1334 ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0, 1335 db_scale_mic), 1336 ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0, 1337 db_scale_line), 1338 ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0, 1339 db_scale_capture), 1340 ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0), 1341 ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0), 1342 ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1), 1343 { 1344 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1345 .name = "Capture Source", 1346 .info = snd_es1938_info_mux, 1347 .get = snd_es1938_get_mux, 1348 .put = snd_es1938_put_mux, 1349 }, 1350 ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0, 1351 db_scale_line), 1352 ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0, 1353 db_scale_audio2), 1354 ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0, 1355 db_scale_mic), 1356 ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0, 1357 db_scale_line), 1358 ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0, 1359 db_scale_mic), 1360 ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0, 1361 db_scale_line), 1362 ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0, 1363 db_scale_line), 1364 ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0, 1365 db_scale_line), 1366 ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0, 1367 db_scale_audio2), 1368 ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0, 1369 db_scale_audio1), 1370 ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0), 1371 { 1372 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1373 .name = "3D Control - Switch", 1374 .info = snd_es1938_info_spatializer_enable, 1375 .get = snd_es1938_get_spatializer_enable, 1376 .put = snd_es1938_put_spatializer_enable, 1377 }, 1378 ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0) 1379 }; 1380 1381 1382 /* ---------------------------------------------------------------------------- */ 1383 /* ---------------------------------------------------------------------------- */ 1384 1385 /* 1386 * initialize the chip - used by resume callback, too 1387 */ 1388 static void snd_es1938_chip_init(struct es1938 *chip) 1389 { 1390 /* reset chip */ 1391 snd_es1938_reset(chip); 1392 1393 /* configure native mode */ 1394 1395 /* enable bus master */ 1396 pci_set_master(chip->pci); 1397 1398 /* disable legacy audio */ 1399 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f); 1400 1401 /* set DDMA base */ 1402 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1); 1403 1404 /* set DMA/IRQ policy */ 1405 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0); 1406 1407 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/ 1408 outb(0xf0, SLIO_REG(chip, IRQCONTROL)); 1409 1410 /* reset DMA */ 1411 outb(0, SLDM_REG(chip, DMACLEAR)); 1412 } 1413 1414 #ifdef CONFIG_PM_SLEEP 1415 /* 1416 * PM support 1417 */ 1418 1419 static const unsigned char saved_regs[SAVED_REG_SIZE+1] = { 1420 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38, 1421 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68, 1422 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d, 1423 0xa8, 0xb4, 1424 }; 1425 1426 1427 static int es1938_suspend(struct device *dev) 1428 { 1429 struct snd_card *card = dev_get_drvdata(dev); 1430 struct es1938 *chip = card->private_data; 1431 const unsigned char *s; 1432 unsigned char *d; 1433 1434 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1435 1436 /* save mixer-related registers */ 1437 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) 1438 *d = snd_es1938_reg_read(chip, *s); 1439 1440 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */ 1441 if (chip->irq >= 0) { 1442 free_irq(chip->irq, chip); 1443 chip->irq = -1; 1444 card->sync_irq = -1; 1445 } 1446 return 0; 1447 } 1448 1449 static int es1938_resume(struct device *dev) 1450 { 1451 struct pci_dev *pci = to_pci_dev(dev); 1452 struct snd_card *card = dev_get_drvdata(dev); 1453 struct es1938 *chip = card->private_data; 1454 const unsigned char *s; 1455 unsigned char *d; 1456 1457 if (request_irq(pci->irq, snd_es1938_interrupt, 1458 IRQF_SHARED, KBUILD_MODNAME, chip)) { 1459 dev_err(dev, "unable to grab IRQ %d, disabling device\n", 1460 pci->irq); 1461 snd_card_disconnect(card); 1462 return -EIO; 1463 } 1464 chip->irq = pci->irq; 1465 card->sync_irq = chip->irq; 1466 snd_es1938_chip_init(chip); 1467 1468 /* restore mixer-related registers */ 1469 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) { 1470 if (*s < 0xa0) 1471 snd_es1938_mixer_write(chip, *s, *d); 1472 else 1473 snd_es1938_write(chip, *s, *d); 1474 } 1475 1476 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1477 return 0; 1478 } 1479 1480 static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume); 1481 #define ES1938_PM_OPS &es1938_pm 1482 #else 1483 #define ES1938_PM_OPS NULL 1484 #endif /* CONFIG_PM_SLEEP */ 1485 1486 #ifdef SUPPORT_JOYSTICK 1487 static int snd_es1938_create_gameport(struct es1938 *chip) 1488 { 1489 struct gameport *gp; 1490 1491 chip->gameport = gp = gameport_allocate_port(); 1492 if (!gp) { 1493 dev_err(chip->card->dev, 1494 "cannot allocate memory for gameport\n"); 1495 return -ENOMEM; 1496 } 1497 1498 gameport_set_name(gp, "ES1938"); 1499 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 1500 gameport_set_dev_parent(gp, &chip->pci->dev); 1501 gp->io = chip->game_port; 1502 1503 gameport_register_port(gp); 1504 1505 return 0; 1506 } 1507 1508 static void snd_es1938_free_gameport(struct es1938 *chip) 1509 { 1510 if (chip->gameport) { 1511 gameport_unregister_port(chip->gameport); 1512 chip->gameport = NULL; 1513 } 1514 } 1515 #else 1516 static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; } 1517 static inline void snd_es1938_free_gameport(struct es1938 *chip) { } 1518 #endif /* SUPPORT_JOYSTICK */ 1519 1520 static int snd_es1938_free(struct es1938 *chip) 1521 { 1522 /* disable irqs */ 1523 outb(0x00, SLIO_REG(chip, IRQCONTROL)); 1524 if (chip->rmidi) 1525 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); 1526 1527 snd_es1938_free_gameport(chip); 1528 1529 if (chip->irq >= 0) 1530 free_irq(chip->irq, chip); 1531 pci_release_regions(chip->pci); 1532 pci_disable_device(chip->pci); 1533 kfree(chip); 1534 return 0; 1535 } 1536 1537 static int snd_es1938_dev_free(struct snd_device *device) 1538 { 1539 struct es1938 *chip = device->device_data; 1540 return snd_es1938_free(chip); 1541 } 1542 1543 static int snd_es1938_create(struct snd_card *card, 1544 struct pci_dev *pci, 1545 struct es1938 **rchip) 1546 { 1547 struct es1938 *chip; 1548 int err; 1549 static const struct snd_device_ops ops = { 1550 .dev_free = snd_es1938_dev_free, 1551 }; 1552 1553 *rchip = NULL; 1554 1555 /* enable PCI device */ 1556 if ((err = pci_enable_device(pci)) < 0) 1557 return err; 1558 /* check, if we can restrict PCI DMA transfers to 24 bits */ 1559 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) { 1560 dev_err(card->dev, 1561 "architecture does not support 24bit PCI busmaster DMA\n"); 1562 pci_disable_device(pci); 1563 return -ENXIO; 1564 } 1565 1566 chip = kzalloc(sizeof(*chip), GFP_KERNEL); 1567 if (chip == NULL) { 1568 pci_disable_device(pci); 1569 return -ENOMEM; 1570 } 1571 spin_lock_init(&chip->reg_lock); 1572 spin_lock_init(&chip->mixer_lock); 1573 chip->card = card; 1574 chip->pci = pci; 1575 chip->irq = -1; 1576 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) { 1577 kfree(chip); 1578 pci_disable_device(pci); 1579 return err; 1580 } 1581 chip->io_port = pci_resource_start(pci, 0); 1582 chip->sb_port = pci_resource_start(pci, 1); 1583 chip->vc_port = pci_resource_start(pci, 2); 1584 chip->mpu_port = pci_resource_start(pci, 3); 1585 chip->game_port = pci_resource_start(pci, 4); 1586 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED, 1587 KBUILD_MODNAME, chip)) { 1588 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 1589 snd_es1938_free(chip); 1590 return -EBUSY; 1591 } 1592 chip->irq = pci->irq; 1593 card->sync_irq = chip->irq; 1594 dev_dbg(card->dev, 1595 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n", 1596 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port); 1597 1598 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */ 1599 1600 snd_es1938_chip_init(chip); 1601 1602 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { 1603 snd_es1938_free(chip); 1604 return err; 1605 } 1606 1607 *rchip = chip; 1608 return 0; 1609 } 1610 1611 /* -------------------------------------------------------------------- 1612 * Interrupt handler 1613 * -------------------------------------------------------------------- */ 1614 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id) 1615 { 1616 struct es1938 *chip = dev_id; 1617 unsigned char status; 1618 __always_unused unsigned char audiostatus; 1619 int handled = 0; 1620 1621 status = inb(SLIO_REG(chip, IRQCONTROL)); 1622 #if 0 1623 dev_dbg(chip->card->dev, 1624 "Es1938debug - interrupt status: =0x%x\n", status); 1625 #endif 1626 1627 /* AUDIO 1 */ 1628 if (status & 0x10) { 1629 #if 0 1630 dev_dbg(chip->card->dev, 1631 "Es1938debug - AUDIO channel 1 interrupt\n"); 1632 dev_dbg(chip->card->dev, 1633 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n", 1634 inw(SLDM_REG(chip, DMACOUNT))); 1635 dev_dbg(chip->card->dev, 1636 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n", 1637 inl(SLDM_REG(chip, DMAADDR))); 1638 dev_dbg(chip->card->dev, 1639 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n", 1640 inl(SLDM_REG(chip, DMASTATUS))); 1641 #endif 1642 /* clear irq */ 1643 handled = 1; 1644 audiostatus = inb(SLSB_REG(chip, STATUS)); 1645 if (chip->active & ADC1) 1646 snd_pcm_period_elapsed(chip->capture_substream); 1647 else if (chip->active & DAC1) 1648 snd_pcm_period_elapsed(chip->playback2_substream); 1649 } 1650 1651 /* AUDIO 2 */ 1652 if (status & 0x20) { 1653 #if 0 1654 dev_dbg(chip->card->dev, 1655 "Es1938debug - AUDIO channel 2 interrupt\n"); 1656 dev_dbg(chip->card->dev, 1657 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n", 1658 inw(SLIO_REG(chip, AUDIO2DMACOUNT))); 1659 dev_dbg(chip->card->dev, 1660 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n", 1661 inl(SLIO_REG(chip, AUDIO2DMAADDR))); 1662 1663 #endif 1664 /* clear irq */ 1665 handled = 1; 1666 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0); 1667 if (chip->active & DAC2) 1668 snd_pcm_period_elapsed(chip->playback1_substream); 1669 } 1670 1671 /* Hardware volume */ 1672 if (status & 0x40) { 1673 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80; 1674 handled = 1; 1675 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id); 1676 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id); 1677 if (!split) { 1678 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, 1679 &chip->master_switch->id); 1680 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, 1681 &chip->master_volume->id); 1682 } 1683 /* ack interrupt */ 1684 snd_es1938_mixer_write(chip, 0x66, 0x00); 1685 } 1686 1687 /* MPU401 */ 1688 if (status & 0x80) { 1689 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received. 1690 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well! 1691 // andreas@flying-snail.de 1692 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */ 1693 if (chip->rmidi) { 1694 handled = 1; 1695 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 1696 } 1697 } 1698 return IRQ_RETVAL(handled); 1699 } 1700 1701 #define ES1938_DMA_SIZE 64 1702 1703 static int snd_es1938_mixer(struct es1938 *chip) 1704 { 1705 struct snd_card *card; 1706 unsigned int idx; 1707 int err; 1708 1709 card = chip->card; 1710 1711 strcpy(card->mixername, "ESS Solo-1"); 1712 1713 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) { 1714 struct snd_kcontrol *kctl; 1715 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip); 1716 switch (idx) { 1717 case 0: 1718 chip->master_volume = kctl; 1719 kctl->private_free = snd_es1938_hwv_free; 1720 break; 1721 case 1: 1722 chip->master_switch = kctl; 1723 kctl->private_free = snd_es1938_hwv_free; 1724 break; 1725 case 2: 1726 chip->hw_volume = kctl; 1727 kctl->private_free = snd_es1938_hwv_free; 1728 break; 1729 case 3: 1730 chip->hw_switch = kctl; 1731 kctl->private_free = snd_es1938_hwv_free; 1732 break; 1733 } 1734 if ((err = snd_ctl_add(card, kctl)) < 0) 1735 return err; 1736 } 1737 return 0; 1738 } 1739 1740 1741 static int snd_es1938_probe(struct pci_dev *pci, 1742 const struct pci_device_id *pci_id) 1743 { 1744 static int dev; 1745 struct snd_card *card; 1746 struct es1938 *chip; 1747 struct snd_opl3 *opl3; 1748 int idx, err; 1749 1750 if (dev >= SNDRV_CARDS) 1751 return -ENODEV; 1752 if (!enable[dev]) { 1753 dev++; 1754 return -ENOENT; 1755 } 1756 1757 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 1758 0, &card); 1759 if (err < 0) 1760 return err; 1761 for (idx = 0; idx < 5; idx++) { 1762 if (pci_resource_start(pci, idx) == 0 || 1763 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) { 1764 snd_card_free(card); 1765 return -ENODEV; 1766 } 1767 } 1768 if ((err = snd_es1938_create(card, pci, &chip)) < 0) { 1769 snd_card_free(card); 1770 return err; 1771 } 1772 card->private_data = chip; 1773 1774 strcpy(card->driver, "ES1938"); 1775 strcpy(card->shortname, "ESS ES1938 (Solo-1)"); 1776 sprintf(card->longname, "%s rev %i, irq %i", 1777 card->shortname, 1778 chip->revision, 1779 chip->irq); 1780 1781 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) { 1782 snd_card_free(card); 1783 return err; 1784 } 1785 if ((err = snd_es1938_mixer(chip)) < 0) { 1786 snd_card_free(card); 1787 return err; 1788 } 1789 if (snd_opl3_create(card, 1790 SLSB_REG(chip, FMLOWADDR), 1791 SLSB_REG(chip, FMHIGHADDR), 1792 OPL3_HW_OPL3, 1, &opl3) < 0) { 1793 dev_err(card->dev, "OPL3 not detected at 0x%lx\n", 1794 SLSB_REG(chip, FMLOWADDR)); 1795 } else { 1796 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) { 1797 snd_card_free(card); 1798 return err; 1799 } 1800 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { 1801 snd_card_free(card); 1802 return err; 1803 } 1804 } 1805 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, 1806 chip->mpu_port, 1807 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 1808 -1, &chip->rmidi) < 0) { 1809 dev_err(card->dev, "unable to initialize MPU-401\n"); 1810 } else { 1811 // this line is vital for MIDI interrupt handling on ess-solo1 1812 // andreas@flying-snail.de 1813 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40); 1814 } 1815 1816 snd_es1938_create_gameport(chip); 1817 1818 if ((err = snd_card_register(card)) < 0) { 1819 snd_card_free(card); 1820 return err; 1821 } 1822 1823 pci_set_drvdata(pci, card); 1824 dev++; 1825 return 0; 1826 } 1827 1828 static void snd_es1938_remove(struct pci_dev *pci) 1829 { 1830 snd_card_free(pci_get_drvdata(pci)); 1831 } 1832 1833 static struct pci_driver es1938_driver = { 1834 .name = KBUILD_MODNAME, 1835 .id_table = snd_es1938_ids, 1836 .probe = snd_es1938_probe, 1837 .remove = snd_es1938_remove, 1838 .driver = { 1839 .pm = ES1938_PM_OPS, 1840 }, 1841 }; 1842 1843 module_pci_driver(es1938_driver); 1844