1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard 4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>, 5 * Jaroslav Kysela <perex@perex.cz>, 6 * Thomas Sailer <sailer@ife.ee.ethz.ch>, 7 * Abramo Bagnara <abramo@alsa-project.org>, 8 * Markus Gruber <gruber@eikon.tum.de> 9 * 10 * Rewritten from sonicvibes.c source. 11 * 12 * TODO: 13 * Rewrite better spinlocks 14 */ 15 16 /* 17 NOTES: 18 - Capture data is written unaligned starting from dma_base + 1 so I need to 19 disable mmap and to add a copy callback. 20 - After several cycle of the following: 21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done 22 a "playback write error (DMA or IRQ trouble?)" may happen. 23 This is due to playback interrupts not generated. 24 I suspect a timing issue. 25 - Sometimes the interrupt handler is invoked wrongly during playback. 26 This generates some harmless "Unexpected hw_pointer: wrong interrupt 27 acknowledge". 28 I've seen that using small period sizes. 29 Reproducible with: 30 mpg123 test.mp3 & 31 hdparm -t -T /dev/hda 32 */ 33 34 35 #include <linux/init.h> 36 #include <linux/interrupt.h> 37 #include <linux/pci.h> 38 #include <linux/slab.h> 39 #include <linux/gameport.h> 40 #include <linux/module.h> 41 #include <linux/delay.h> 42 #include <linux/dma-mapping.h> 43 #include <linux/io.h> 44 #include <sound/core.h> 45 #include <sound/control.h> 46 #include <sound/pcm.h> 47 #include <sound/opl3.h> 48 #include <sound/mpu401.h> 49 #include <sound/initval.h> 50 #include <sound/tlv.h> 51 52 MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>"); 53 MODULE_DESCRIPTION("ESS Solo-1"); 54 MODULE_LICENSE("GPL"); 55 56 #if IS_REACHABLE(CONFIG_GAMEPORT) 57 #define SUPPORT_JOYSTICK 1 58 #endif 59 60 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ 61 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ 62 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ 63 64 module_param_array(index, int, NULL, 0444); 65 MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard."); 66 module_param_array(id, charp, NULL, 0444); 67 MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard."); 68 module_param_array(enable, bool, NULL, 0444); 69 MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard."); 70 71 #define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x) 72 73 #define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x) 74 75 #define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x) 76 77 #define SL_PCI_LEGACYCONTROL 0x40 78 #define SL_PCI_CONFIG 0x50 79 #define SL_PCI_DDMACONTROL 0x60 80 81 #define ESSIO_REG_AUDIO2DMAADDR 0 82 #define ESSIO_REG_AUDIO2DMACOUNT 4 83 #define ESSIO_REG_AUDIO2MODE 6 84 #define ESSIO_REG_IRQCONTROL 7 85 86 #define ESSDM_REG_DMAADDR 0x00 87 #define ESSDM_REG_DMACOUNT 0x04 88 #define ESSDM_REG_DMACOMMAND 0x08 89 #define ESSDM_REG_DMASTATUS 0x08 90 #define ESSDM_REG_DMAMODE 0x0b 91 #define ESSDM_REG_DMACLEAR 0x0d 92 #define ESSDM_REG_DMAMASK 0x0f 93 94 #define ESSSB_REG_FMLOWADDR 0x00 95 #define ESSSB_REG_FMHIGHADDR 0x02 96 #define ESSSB_REG_MIXERADDR 0x04 97 #define ESSSB_REG_MIXERDATA 0x05 98 99 #define ESSSB_IREG_AUDIO1 0x14 100 #define ESSSB_IREG_MICMIX 0x1a 101 #define ESSSB_IREG_RECSRC 0x1c 102 #define ESSSB_IREG_MASTER 0x32 103 #define ESSSB_IREG_FM 0x36 104 #define ESSSB_IREG_AUXACD 0x38 105 #define ESSSB_IREG_AUXB 0x3a 106 #define ESSSB_IREG_PCSPEAKER 0x3c 107 #define ESSSB_IREG_LINE 0x3e 108 #define ESSSB_IREG_SPATCONTROL 0x50 109 #define ESSSB_IREG_SPATLEVEL 0x52 110 #define ESSSB_IREG_MASTER_LEFT 0x60 111 #define ESSSB_IREG_MASTER_RIGHT 0x62 112 #define ESSSB_IREG_MPU401CONTROL 0x64 113 #define ESSSB_IREG_MICMIXRECORD 0x68 114 #define ESSSB_IREG_AUDIO2RECORD 0x69 115 #define ESSSB_IREG_AUXACDRECORD 0x6a 116 #define ESSSB_IREG_FMRECORD 0x6b 117 #define ESSSB_IREG_AUXBRECORD 0x6c 118 #define ESSSB_IREG_MONO 0x6d 119 #define ESSSB_IREG_LINERECORD 0x6e 120 #define ESSSB_IREG_MONORECORD 0x6f 121 #define ESSSB_IREG_AUDIO2SAMPLE 0x70 122 #define ESSSB_IREG_AUDIO2MODE 0x71 123 #define ESSSB_IREG_AUDIO2FILTER 0x72 124 #define ESSSB_IREG_AUDIO2TCOUNTL 0x74 125 #define ESSSB_IREG_AUDIO2TCOUNTH 0x76 126 #define ESSSB_IREG_AUDIO2CONTROL1 0x78 127 #define ESSSB_IREG_AUDIO2CONTROL2 0x7a 128 #define ESSSB_IREG_AUDIO2 0x7c 129 130 #define ESSSB_REG_RESET 0x06 131 132 #define ESSSB_REG_READDATA 0x0a 133 #define ESSSB_REG_WRITEDATA 0x0c 134 #define ESSSB_REG_READSTATUS 0x0c 135 136 #define ESSSB_REG_STATUS 0x0e 137 138 #define ESS_CMD_EXTSAMPLERATE 0xa1 139 #define ESS_CMD_FILTERDIV 0xa2 140 #define ESS_CMD_DMACNTRELOADL 0xa4 141 #define ESS_CMD_DMACNTRELOADH 0xa5 142 #define ESS_CMD_ANALOGCONTROL 0xa8 143 #define ESS_CMD_IRQCONTROL 0xb1 144 #define ESS_CMD_DRQCONTROL 0xb2 145 #define ESS_CMD_RECLEVEL 0xb4 146 #define ESS_CMD_SETFORMAT 0xb6 147 #define ESS_CMD_SETFORMAT2 0xb7 148 #define ESS_CMD_DMACONTROL 0xb8 149 #define ESS_CMD_DMATYPE 0xb9 150 #define ESS_CMD_OFFSETLEFT 0xba 151 #define ESS_CMD_OFFSETRIGHT 0xbb 152 #define ESS_CMD_READREG 0xc0 153 #define ESS_CMD_ENABLEEXT 0xc6 154 #define ESS_CMD_PAUSEDMA 0xd0 155 #define ESS_CMD_ENABLEAUDIO1 0xd1 156 #define ESS_CMD_STOPAUDIO1 0xd3 157 #define ESS_CMD_AUDIO1STATUS 0xd8 158 #define ESS_CMD_CONTDMA 0xd4 159 #define ESS_CMD_TESTIRQ 0xf2 160 161 #define ESS_RECSRC_MIC 0 162 #define ESS_RECSRC_AUXACD 2 163 #define ESS_RECSRC_AUXB 5 164 #define ESS_RECSRC_LINE 6 165 #define ESS_RECSRC_NONE 7 166 167 #define DAC1 0x01 168 #define ADC1 0x02 169 #define DAC2 0x04 170 171 /* 172 173 */ 174 175 #define SAVED_REG_SIZE 32 /* max. number of registers to save */ 176 177 struct es1938 { 178 int irq; 179 180 unsigned long io_port; 181 unsigned long sb_port; 182 unsigned long vc_port; 183 unsigned long mpu_port; 184 unsigned long game_port; 185 unsigned long ddma_port; 186 187 unsigned char irqmask; 188 unsigned char revision; 189 190 struct snd_kcontrol *hw_volume; 191 struct snd_kcontrol *hw_switch; 192 struct snd_kcontrol *master_volume; 193 struct snd_kcontrol *master_switch; 194 195 struct pci_dev *pci; 196 struct snd_card *card; 197 struct snd_pcm *pcm; 198 struct snd_pcm_substream *capture_substream; 199 struct snd_pcm_substream *playback1_substream; 200 struct snd_pcm_substream *playback2_substream; 201 struct snd_rawmidi *rmidi; 202 203 unsigned int dma1_size; 204 unsigned int dma2_size; 205 unsigned int dma1_start; 206 unsigned int dma2_start; 207 unsigned int dma1_shift; 208 unsigned int dma2_shift; 209 unsigned int last_capture_dmaaddr; 210 unsigned int active; 211 212 spinlock_t reg_lock; 213 spinlock_t mixer_lock; 214 struct snd_info_entry *proc_entry; 215 216 #ifdef SUPPORT_JOYSTICK 217 struct gameport *gameport; 218 #endif 219 #ifdef CONFIG_PM_SLEEP 220 unsigned char saved_regs[SAVED_REG_SIZE]; 221 #endif 222 }; 223 224 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id); 225 226 static const struct pci_device_id snd_es1938_ids[] = { 227 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */ 228 { 0, } 229 }; 230 231 MODULE_DEVICE_TABLE(pci, snd_es1938_ids); 232 233 #define RESET_LOOP_TIMEOUT 0x10000 234 #define WRITE_LOOP_TIMEOUT 0x10000 235 #define GET_LOOP_TIMEOUT 0x01000 236 237 /* ----------------------------------------------------------------- 238 * Write to a mixer register 239 * -----------------------------------------------------------------*/ 240 static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val) 241 { 242 unsigned long flags; 243 spin_lock_irqsave(&chip->mixer_lock, flags); 244 outb(reg, SLSB_REG(chip, MIXERADDR)); 245 outb(val, SLSB_REG(chip, MIXERDATA)); 246 spin_unlock_irqrestore(&chip->mixer_lock, flags); 247 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val); 248 } 249 250 /* ----------------------------------------------------------------- 251 * Read from a mixer register 252 * -----------------------------------------------------------------*/ 253 static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg) 254 { 255 int data; 256 unsigned long flags; 257 spin_lock_irqsave(&chip->mixer_lock, flags); 258 outb(reg, SLSB_REG(chip, MIXERADDR)); 259 data = inb(SLSB_REG(chip, MIXERDATA)); 260 spin_unlock_irqrestore(&chip->mixer_lock, flags); 261 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data); 262 return data; 263 } 264 265 /* ----------------------------------------------------------------- 266 * Write to some bits of a mixer register (return old value) 267 * -----------------------------------------------------------------*/ 268 static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg, 269 unsigned char mask, unsigned char val) 270 { 271 unsigned long flags; 272 unsigned char old, new, oval; 273 spin_lock_irqsave(&chip->mixer_lock, flags); 274 outb(reg, SLSB_REG(chip, MIXERADDR)); 275 old = inb(SLSB_REG(chip, MIXERDATA)); 276 oval = old & mask; 277 if (val != oval) { 278 new = (old & ~mask) | (val & mask); 279 outb(new, SLSB_REG(chip, MIXERDATA)); 280 dev_dbg(chip->card->dev, 281 "Mixer reg %02x was %02x, set to %02x\n", 282 reg, old, new); 283 } 284 spin_unlock_irqrestore(&chip->mixer_lock, flags); 285 return oval; 286 } 287 288 /* ----------------------------------------------------------------- 289 * Write command to Controller Registers 290 * -----------------------------------------------------------------*/ 291 static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd) 292 { 293 int i; 294 unsigned char v; 295 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) { 296 v = inb(SLSB_REG(chip, READSTATUS)); 297 if (!(v & 0x80)) { 298 outb(cmd, SLSB_REG(chip, WRITEDATA)); 299 return; 300 } 301 } 302 dev_err(chip->card->dev, 303 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v); 304 } 305 306 /* ----------------------------------------------------------------- 307 * Read the Read Data Buffer 308 * -----------------------------------------------------------------*/ 309 static int snd_es1938_get_byte(struct es1938 *chip) 310 { 311 int i; 312 unsigned char v; 313 for (i = GET_LOOP_TIMEOUT; i; i--) { 314 v = inb(SLSB_REG(chip, STATUS)); 315 if (v & 0x80) 316 return inb(SLSB_REG(chip, READDATA)); 317 } 318 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v); 319 return -ENODEV; 320 } 321 322 /* ----------------------------------------------------------------- 323 * Write value cmd register 324 * -----------------------------------------------------------------*/ 325 static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val) 326 { 327 unsigned long flags; 328 spin_lock_irqsave(&chip->reg_lock, flags); 329 snd_es1938_write_cmd(chip, reg); 330 snd_es1938_write_cmd(chip, val); 331 spin_unlock_irqrestore(&chip->reg_lock, flags); 332 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val); 333 } 334 335 /* ----------------------------------------------------------------- 336 * Read data from cmd register and return it 337 * -----------------------------------------------------------------*/ 338 static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg) 339 { 340 unsigned char val; 341 unsigned long flags; 342 spin_lock_irqsave(&chip->reg_lock, flags); 343 snd_es1938_write_cmd(chip, ESS_CMD_READREG); 344 snd_es1938_write_cmd(chip, reg); 345 val = snd_es1938_get_byte(chip); 346 spin_unlock_irqrestore(&chip->reg_lock, flags); 347 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val); 348 return val; 349 } 350 351 /* ----------------------------------------------------------------- 352 * Write data to cmd register and return old value 353 * -----------------------------------------------------------------*/ 354 static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask, 355 unsigned char val) 356 { 357 unsigned long flags; 358 unsigned char old, new, oval; 359 spin_lock_irqsave(&chip->reg_lock, flags); 360 snd_es1938_write_cmd(chip, ESS_CMD_READREG); 361 snd_es1938_write_cmd(chip, reg); 362 old = snd_es1938_get_byte(chip); 363 oval = old & mask; 364 if (val != oval) { 365 snd_es1938_write_cmd(chip, reg); 366 new = (old & ~mask) | (val & mask); 367 snd_es1938_write_cmd(chip, new); 368 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n", 369 reg, old, new); 370 } 371 spin_unlock_irqrestore(&chip->reg_lock, flags); 372 return oval; 373 } 374 375 /* -------------------------------------------------------------------- 376 * Reset the chip 377 * --------------------------------------------------------------------*/ 378 static void snd_es1938_reset(struct es1938 *chip) 379 { 380 int i; 381 382 outb(3, SLSB_REG(chip, RESET)); 383 inb(SLSB_REG(chip, RESET)); 384 outb(0, SLSB_REG(chip, RESET)); 385 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) { 386 if (inb(SLSB_REG(chip, STATUS)) & 0x80) { 387 if (inb(SLSB_REG(chip, READDATA)) == 0xaa) 388 goto __next; 389 } 390 } 391 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n"); 392 393 __next: 394 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT); 395 396 /* Demand transfer DMA: 4 bytes per DMA request */ 397 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2); 398 399 /* Change behaviour of register A1 400 4x oversampling 401 2nd channel DAC asynchronous */ 402 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32); 403 /* enable/select DMA channel and IRQ channel */ 404 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50); 405 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50); 406 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1); 407 /* Set spatializer parameters to recommended values */ 408 snd_es1938_mixer_write(chip, 0x54, 0x8f); 409 snd_es1938_mixer_write(chip, 0x56, 0x95); 410 snd_es1938_mixer_write(chip, 0x58, 0x94); 411 snd_es1938_mixer_write(chip, 0x5a, 0x80); 412 } 413 414 /* -------------------------------------------------------------------- 415 * Reset the FIFOs 416 * --------------------------------------------------------------------*/ 417 static void snd_es1938_reset_fifo(struct es1938 *chip) 418 { 419 outb(2, SLSB_REG(chip, RESET)); 420 outb(0, SLSB_REG(chip, RESET)); 421 } 422 423 static const struct snd_ratnum clocks[2] = { 424 { 425 .num = 793800, 426 .den_min = 1, 427 .den_max = 128, 428 .den_step = 1, 429 }, 430 { 431 .num = 768000, 432 .den_min = 1, 433 .den_max = 128, 434 .den_step = 1, 435 } 436 }; 437 438 static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = { 439 .nrats = 2, 440 .rats = clocks, 441 }; 442 443 444 static void snd_es1938_rate_set(struct es1938 *chip, 445 struct snd_pcm_substream *substream, 446 int mode) 447 { 448 unsigned int bits, div0; 449 struct snd_pcm_runtime *runtime = substream->runtime; 450 if (runtime->rate_num == clocks[0].num) 451 bits = 128 - runtime->rate_den; 452 else 453 bits = 256 - runtime->rate_den; 454 455 /* set filter register */ 456 div0 = 256 - 7160000*20/(8*82*runtime->rate); 457 458 if (mode == DAC2) { 459 snd_es1938_mixer_write(chip, 0x70, bits); 460 snd_es1938_mixer_write(chip, 0x72, div0); 461 } else { 462 snd_es1938_write(chip, 0xA1, bits); 463 snd_es1938_write(chip, 0xA2, div0); 464 } 465 } 466 467 /* -------------------------------------------------------------------- 468 * Configure Solo1 builtin DMA Controller 469 * --------------------------------------------------------------------*/ 470 471 static void snd_es1938_playback1_setdma(struct es1938 *chip) 472 { 473 outb(0x00, SLIO_REG(chip, AUDIO2MODE)); 474 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR)); 475 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT)); 476 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT)); 477 } 478 479 static void snd_es1938_playback2_setdma(struct es1938 *chip) 480 { 481 /* Enable DMA controller */ 482 outb(0xc4, SLDM_REG(chip, DMACOMMAND)); 483 /* 1. Master reset */ 484 outb(0, SLDM_REG(chip, DMACLEAR)); 485 /* 2. Mask DMA */ 486 outb(1, SLDM_REG(chip, DMAMASK)); 487 outb(0x18, SLDM_REG(chip, DMAMODE)); 488 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); 489 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); 490 /* 3. Unmask DMA */ 491 outb(0, SLDM_REG(chip, DMAMASK)); 492 } 493 494 static void snd_es1938_capture_setdma(struct es1938 *chip) 495 { 496 /* Enable DMA controller */ 497 outb(0xc4, SLDM_REG(chip, DMACOMMAND)); 498 /* 1. Master reset */ 499 outb(0, SLDM_REG(chip, DMACLEAR)); 500 /* 2. Mask DMA */ 501 outb(1, SLDM_REG(chip, DMAMASK)); 502 outb(0x14, SLDM_REG(chip, DMAMODE)); 503 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR)); 504 chip->last_capture_dmaaddr = chip->dma1_start; 505 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT)); 506 /* 3. Unmask DMA */ 507 outb(0, SLDM_REG(chip, DMAMASK)); 508 } 509 510 /* ---------------------------------------------------------------------- 511 * 512 * *** PCM part *** 513 */ 514 515 static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream, 516 int cmd) 517 { 518 struct es1938 *chip = snd_pcm_substream_chip(substream); 519 int val; 520 switch (cmd) { 521 case SNDRV_PCM_TRIGGER_START: 522 case SNDRV_PCM_TRIGGER_RESUME: 523 val = 0x0f; 524 chip->active |= ADC1; 525 break; 526 case SNDRV_PCM_TRIGGER_STOP: 527 case SNDRV_PCM_TRIGGER_SUSPEND: 528 val = 0x00; 529 chip->active &= ~ADC1; 530 break; 531 default: 532 return -EINVAL; 533 } 534 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); 535 return 0; 536 } 537 538 static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream, 539 int cmd) 540 { 541 struct es1938 *chip = snd_pcm_substream_chip(substream); 542 switch (cmd) { 543 case SNDRV_PCM_TRIGGER_START: 544 case SNDRV_PCM_TRIGGER_RESUME: 545 /* According to the documentation this should be: 546 0x13 but that value may randomly swap stereo channels */ 547 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92); 548 udelay(10); 549 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93); 550 /* This two stage init gives the FIFO -> DAC connection time to 551 * settle before first data from DMA flows in. This should ensure 552 * no swapping of stereo channels. Report a bug if otherwise :-) */ 553 outb(0x0a, SLIO_REG(chip, AUDIO2MODE)); 554 chip->active |= DAC2; 555 break; 556 case SNDRV_PCM_TRIGGER_STOP: 557 case SNDRV_PCM_TRIGGER_SUSPEND: 558 outb(0, SLIO_REG(chip, AUDIO2MODE)); 559 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0); 560 chip->active &= ~DAC2; 561 break; 562 default: 563 return -EINVAL; 564 } 565 return 0; 566 } 567 568 static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream, 569 int cmd) 570 { 571 struct es1938 *chip = snd_pcm_substream_chip(substream); 572 int val; 573 switch (cmd) { 574 case SNDRV_PCM_TRIGGER_START: 575 case SNDRV_PCM_TRIGGER_RESUME: 576 val = 5; 577 chip->active |= DAC1; 578 break; 579 case SNDRV_PCM_TRIGGER_STOP: 580 case SNDRV_PCM_TRIGGER_SUSPEND: 581 val = 0; 582 chip->active &= ~DAC1; 583 break; 584 default: 585 return -EINVAL; 586 } 587 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val); 588 return 0; 589 } 590 591 static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream, 592 int cmd) 593 { 594 switch (substream->number) { 595 case 0: 596 return snd_es1938_playback1_trigger(substream, cmd); 597 case 1: 598 return snd_es1938_playback2_trigger(substream, cmd); 599 } 600 snd_BUG(); 601 return -EINVAL; 602 } 603 604 /* -------------------------------------------------------------------- 605 * First channel for Extended Mode Audio 1 ADC Operation 606 * --------------------------------------------------------------------*/ 607 static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream) 608 { 609 struct es1938 *chip = snd_pcm_substream_chip(substream); 610 struct snd_pcm_runtime *runtime = substream->runtime; 611 int u, is8, mono; 612 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 613 unsigned int count = snd_pcm_lib_period_bytes(substream); 614 615 chip->dma1_size = size; 616 chip->dma1_start = runtime->dma_addr; 617 618 mono = (runtime->channels > 1) ? 0 : 1; 619 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; 620 u = snd_pcm_format_unsigned(runtime->format); 621 622 chip->dma1_shift = 2 - mono - is8; 623 624 snd_es1938_reset_fifo(chip); 625 626 /* program type */ 627 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); 628 629 /* set clock and counters */ 630 snd_es1938_rate_set(chip, substream, ADC1); 631 632 count = 0x10000 - count; 633 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); 634 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); 635 636 /* initialize and configure ADC */ 637 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71); 638 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 | 639 (u ? 0x00 : 0x20) | 640 (is8 ? 0x00 : 0x04) | 641 (mono ? 0x40 : 0x08)); 642 643 // snd_es1938_reset_fifo(chip); 644 645 /* 11. configure system interrupt controller and DMA controller */ 646 snd_es1938_capture_setdma(chip); 647 648 return 0; 649 } 650 651 652 /* ------------------------------------------------------------------------------ 653 * Second Audio channel DAC Operation 654 * ------------------------------------------------------------------------------*/ 655 static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream) 656 { 657 struct es1938 *chip = snd_pcm_substream_chip(substream); 658 struct snd_pcm_runtime *runtime = substream->runtime; 659 int u, is8, mono; 660 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 661 unsigned int count = snd_pcm_lib_period_bytes(substream); 662 663 chip->dma2_size = size; 664 chip->dma2_start = runtime->dma_addr; 665 666 mono = (runtime->channels > 1) ? 0 : 1; 667 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; 668 u = snd_pcm_format_unsigned(runtime->format); 669 670 chip->dma2_shift = 2 - mono - is8; 671 672 snd_es1938_reset_fifo(chip); 673 674 /* set clock and counters */ 675 snd_es1938_rate_set(chip, substream, DAC2); 676 677 count >>= 1; 678 count = 0x10000 - count; 679 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff); 680 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8); 681 682 /* initialize and configure Audio 2 DAC */ 683 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) | 684 (mono ? 0 : 2) | (is8 ? 0 : 1)); 685 686 /* program DMA */ 687 snd_es1938_playback1_setdma(chip); 688 689 return 0; 690 } 691 692 static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream) 693 { 694 struct es1938 *chip = snd_pcm_substream_chip(substream); 695 struct snd_pcm_runtime *runtime = substream->runtime; 696 int u, is8, mono; 697 unsigned int size = snd_pcm_lib_buffer_bytes(substream); 698 unsigned int count = snd_pcm_lib_period_bytes(substream); 699 700 chip->dma1_size = size; 701 chip->dma1_start = runtime->dma_addr; 702 703 mono = (runtime->channels > 1) ? 0 : 1; 704 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1; 705 u = snd_pcm_format_unsigned(runtime->format); 706 707 chip->dma1_shift = 2 - mono - is8; 708 709 count = 0x10000 - count; 710 711 /* reset */ 712 snd_es1938_reset_fifo(chip); 713 714 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1)); 715 716 /* set clock and counters */ 717 snd_es1938_rate_set(chip, substream, DAC1); 718 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff); 719 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8); 720 721 /* initialized and configure DAC */ 722 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00); 723 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71); 724 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 725 0x90 | (mono ? 0x40 : 0x08) | 726 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20)); 727 728 /* program DMA */ 729 snd_es1938_playback2_setdma(chip); 730 731 return 0; 732 } 733 734 static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream) 735 { 736 switch (substream->number) { 737 case 0: 738 return snd_es1938_playback1_prepare(substream); 739 case 1: 740 return snd_es1938_playback2_prepare(substream); 741 } 742 snd_BUG(); 743 return -EINVAL; 744 } 745 746 /* during the incrementing of dma counters the DMA register reads sometimes 747 returns garbage. To ensure a valid hw pointer, the following checks which 748 should be very unlikely to fail are used: 749 - is the current DMA address in the valid DMA range ? 750 - is the sum of DMA address and DMA counter pointing to the last DMA byte ? 751 One can argue this could differ by one byte depending on which register is 752 updated first, so the implementation below allows for that. 753 */ 754 static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream) 755 { 756 struct es1938 *chip = snd_pcm_substream_chip(substream); 757 size_t ptr; 758 #if 0 759 size_t old, new; 760 /* This stuff is *needed*, don't ask why - AB */ 761 old = inw(SLDM_REG(chip, DMACOUNT)); 762 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) 763 old = new; 764 ptr = chip->dma1_size - 1 - new; 765 #else 766 size_t count; 767 unsigned int diff; 768 769 ptr = inl(SLDM_REG(chip, DMAADDR)); 770 count = inw(SLDM_REG(chip, DMACOUNT)); 771 diff = chip->dma1_start + chip->dma1_size - ptr - count; 772 773 if (diff > 3 || ptr < chip->dma1_start 774 || ptr >= chip->dma1_start+chip->dma1_size) 775 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */ 776 else 777 chip->last_capture_dmaaddr = ptr; /* good, remember it */ 778 779 ptr -= chip->dma1_start; 780 #endif 781 return ptr >> chip->dma1_shift; 782 } 783 784 static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream) 785 { 786 struct es1938 *chip = snd_pcm_substream_chip(substream); 787 size_t ptr; 788 #if 1 789 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT)); 790 #else 791 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start; 792 #endif 793 return ptr >> chip->dma2_shift; 794 } 795 796 static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream) 797 { 798 struct es1938 *chip = snd_pcm_substream_chip(substream); 799 size_t ptr; 800 size_t old, new; 801 #if 1 802 /* This stuff is *needed*, don't ask why - AB */ 803 old = inw(SLDM_REG(chip, DMACOUNT)); 804 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old) 805 old = new; 806 ptr = chip->dma1_size - 1 - new; 807 #else 808 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start; 809 #endif 810 return ptr >> chip->dma1_shift; 811 } 812 813 static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream) 814 { 815 switch (substream->number) { 816 case 0: 817 return snd_es1938_playback1_pointer(substream); 818 case 1: 819 return snd_es1938_playback2_pointer(substream); 820 } 821 snd_BUG(); 822 return -EINVAL; 823 } 824 825 static int snd_es1938_capture_copy(struct snd_pcm_substream *substream, 826 int channel, unsigned long pos, 827 struct iov_iter *dst, unsigned long count) 828 { 829 struct snd_pcm_runtime *runtime = substream->runtime; 830 struct es1938 *chip = snd_pcm_substream_chip(substream); 831 832 if (snd_BUG_ON(pos + count > chip->dma1_size)) 833 return -EINVAL; 834 if (pos + count < chip->dma1_size) { 835 if (copy_to_iter(runtime->dma_area + pos + 1, count, dst) != count) 836 return -EFAULT; 837 } else { 838 if (copy_to_iter(runtime->dma_area + pos + 1, count - 1, dst) != count - 1) 839 return -EFAULT; 840 if (copy_to_iter(runtime->dma_area, 1, dst) != 1) 841 return -EFAULT; 842 } 843 return 0; 844 } 845 846 /* ---------------------------------------------------------------------- 847 * Audio1 Capture (ADC) 848 * ----------------------------------------------------------------------*/ 849 static const struct snd_pcm_hardware snd_es1938_capture = 850 { 851 .info = (SNDRV_PCM_INFO_INTERLEAVED | 852 SNDRV_PCM_INFO_BLOCK_TRANSFER), 853 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 854 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), 855 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 856 .rate_min = 6000, 857 .rate_max = 48000, 858 .channels_min = 1, 859 .channels_max = 2, 860 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ 861 .period_bytes_min = 64, 862 .period_bytes_max = 0x8000, 863 .periods_min = 1, 864 .periods_max = 1024, 865 .fifo_size = 256, 866 }; 867 868 /* ----------------------------------------------------------------------- 869 * Audio2 Playback (DAC) 870 * -----------------------------------------------------------------------*/ 871 static const struct snd_pcm_hardware snd_es1938_playback = 872 { 873 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED | 874 SNDRV_PCM_INFO_BLOCK_TRANSFER | 875 SNDRV_PCM_INFO_MMAP_VALID), 876 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE | 877 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE), 878 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000, 879 .rate_min = 6000, 880 .rate_max = 48000, 881 .channels_min = 1, 882 .channels_max = 2, 883 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */ 884 .period_bytes_min = 64, 885 .period_bytes_max = 0x8000, 886 .periods_min = 1, 887 .periods_max = 1024, 888 .fifo_size = 256, 889 }; 890 891 static int snd_es1938_capture_open(struct snd_pcm_substream *substream) 892 { 893 struct es1938 *chip = snd_pcm_substream_chip(substream); 894 struct snd_pcm_runtime *runtime = substream->runtime; 895 896 if (chip->playback2_substream) 897 return -EAGAIN; 898 chip->capture_substream = substream; 899 runtime->hw = snd_es1938_capture; 900 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 901 &hw_constraints_clocks); 902 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); 903 return 0; 904 } 905 906 static int snd_es1938_playback_open(struct snd_pcm_substream *substream) 907 { 908 struct es1938 *chip = snd_pcm_substream_chip(substream); 909 struct snd_pcm_runtime *runtime = substream->runtime; 910 911 switch (substream->number) { 912 case 0: 913 chip->playback1_substream = substream; 914 break; 915 case 1: 916 if (chip->capture_substream) 917 return -EAGAIN; 918 chip->playback2_substream = substream; 919 break; 920 default: 921 snd_BUG(); 922 return -EINVAL; 923 } 924 runtime->hw = snd_es1938_playback; 925 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, 926 &hw_constraints_clocks); 927 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00); 928 return 0; 929 } 930 931 static int snd_es1938_capture_close(struct snd_pcm_substream *substream) 932 { 933 struct es1938 *chip = snd_pcm_substream_chip(substream); 934 935 chip->capture_substream = NULL; 936 return 0; 937 } 938 939 static int snd_es1938_playback_close(struct snd_pcm_substream *substream) 940 { 941 struct es1938 *chip = snd_pcm_substream_chip(substream); 942 943 switch (substream->number) { 944 case 0: 945 chip->playback1_substream = NULL; 946 break; 947 case 1: 948 chip->playback2_substream = NULL; 949 break; 950 default: 951 snd_BUG(); 952 return -EINVAL; 953 } 954 return 0; 955 } 956 957 static const struct snd_pcm_ops snd_es1938_playback_ops = { 958 .open = snd_es1938_playback_open, 959 .close = snd_es1938_playback_close, 960 .prepare = snd_es1938_playback_prepare, 961 .trigger = snd_es1938_playback_trigger, 962 .pointer = snd_es1938_playback_pointer, 963 }; 964 965 static const struct snd_pcm_ops snd_es1938_capture_ops = { 966 .open = snd_es1938_capture_open, 967 .close = snd_es1938_capture_close, 968 .prepare = snd_es1938_capture_prepare, 969 .trigger = snd_es1938_capture_trigger, 970 .pointer = snd_es1938_capture_pointer, 971 .copy = snd_es1938_capture_copy, 972 }; 973 974 static int snd_es1938_new_pcm(struct es1938 *chip, int device) 975 { 976 struct snd_pcm *pcm; 977 int err; 978 979 err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm); 980 if (err < 0) 981 return err; 982 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops); 983 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops); 984 985 pcm->private_data = chip; 986 pcm->info_flags = 0; 987 strcpy(pcm->name, "ESS Solo-1"); 988 989 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 990 &chip->pci->dev, 64*1024, 64*1024); 991 992 chip->pcm = pcm; 993 return 0; 994 } 995 996 /* ------------------------------------------------------------------- 997 * 998 * *** Mixer part *** 999 */ 1000 1001 static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol, 1002 struct snd_ctl_elem_info *uinfo) 1003 { 1004 static const char * const texts[8] = { 1005 "Mic", "Mic Master", "CD", "AOUT", 1006 "Mic1", "Mix", "Line", "Master" 1007 }; 1008 1009 return snd_ctl_enum_info(uinfo, 1, 8, texts); 1010 } 1011 1012 static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol, 1013 struct snd_ctl_elem_value *ucontrol) 1014 { 1015 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1016 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07; 1017 return 0; 1018 } 1019 1020 static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol, 1021 struct snd_ctl_elem_value *ucontrol) 1022 { 1023 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1024 unsigned char val = ucontrol->value.enumerated.item[0]; 1025 1026 if (val > 7) 1027 return -EINVAL; 1028 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val; 1029 } 1030 1031 #define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info 1032 1033 static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol, 1034 struct snd_ctl_elem_value *ucontrol) 1035 { 1036 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1037 unsigned char val = snd_es1938_mixer_read(chip, 0x50); 1038 ucontrol->value.integer.value[0] = !!(val & 8); 1039 return 0; 1040 } 1041 1042 static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol, 1043 struct snd_ctl_elem_value *ucontrol) 1044 { 1045 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1046 unsigned char oval, nval; 1047 int change; 1048 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04; 1049 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c; 1050 change = nval != oval; 1051 if (change) { 1052 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04); 1053 snd_es1938_mixer_write(chip, 0x50, nval); 1054 } 1055 return change; 1056 } 1057 1058 static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol, 1059 struct snd_ctl_elem_info *uinfo) 1060 { 1061 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; 1062 uinfo->count = 2; 1063 uinfo->value.integer.min = 0; 1064 uinfo->value.integer.max = 63; 1065 return 0; 1066 } 1067 1068 static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol, 1069 struct snd_ctl_elem_value *ucontrol) 1070 { 1071 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1072 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f; 1073 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f; 1074 return 0; 1075 } 1076 1077 #define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info 1078 1079 static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol, 1080 struct snd_ctl_elem_value *ucontrol) 1081 { 1082 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1083 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40); 1084 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40); 1085 return 0; 1086 } 1087 1088 static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol) 1089 { 1090 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1091 chip->master_volume = NULL; 1092 chip->master_switch = NULL; 1093 chip->hw_volume = NULL; 1094 chip->hw_switch = NULL; 1095 } 1096 1097 static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg, 1098 unsigned char mask, unsigned char val) 1099 { 1100 if (reg < 0xa0) 1101 return snd_es1938_mixer_bits(chip, reg, mask, val); 1102 else 1103 return snd_es1938_bits(chip, reg, mask, val); 1104 } 1105 1106 static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg) 1107 { 1108 if (reg < 0xa0) 1109 return snd_es1938_mixer_read(chip, reg); 1110 else 1111 return snd_es1938_read(chip, reg); 1112 } 1113 1114 #define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ 1115 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1116 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\ 1117 .name = xname, .index = xindex, \ 1118 .info = snd_es1938_info_single, \ 1119 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ 1120 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \ 1121 .tlv = { .p = xtlv } } 1122 #define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \ 1123 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1124 .info = snd_es1938_info_single, \ 1125 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \ 1126 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) } 1127 1128 static int snd_es1938_info_single(struct snd_kcontrol *kcontrol, 1129 struct snd_ctl_elem_info *uinfo) 1130 { 1131 int mask = (kcontrol->private_value >> 16) & 0xff; 1132 1133 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1134 uinfo->count = 1; 1135 uinfo->value.integer.min = 0; 1136 uinfo->value.integer.max = mask; 1137 return 0; 1138 } 1139 1140 static int snd_es1938_get_single(struct snd_kcontrol *kcontrol, 1141 struct snd_ctl_elem_value *ucontrol) 1142 { 1143 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1144 int reg = kcontrol->private_value & 0xff; 1145 int shift = (kcontrol->private_value >> 8) & 0xff; 1146 int mask = (kcontrol->private_value >> 16) & 0xff; 1147 int invert = (kcontrol->private_value >> 24) & 0xff; 1148 int val; 1149 1150 val = snd_es1938_reg_read(chip, reg); 1151 ucontrol->value.integer.value[0] = (val >> shift) & mask; 1152 if (invert) 1153 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1154 return 0; 1155 } 1156 1157 static int snd_es1938_put_single(struct snd_kcontrol *kcontrol, 1158 struct snd_ctl_elem_value *ucontrol) 1159 { 1160 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1161 int reg = kcontrol->private_value & 0xff; 1162 int shift = (kcontrol->private_value >> 8) & 0xff; 1163 int mask = (kcontrol->private_value >> 16) & 0xff; 1164 int invert = (kcontrol->private_value >> 24) & 0xff; 1165 unsigned char val; 1166 1167 val = (ucontrol->value.integer.value[0] & mask); 1168 if (invert) 1169 val = mask - val; 1170 mask <<= shift; 1171 val <<= shift; 1172 return snd_es1938_reg_bits(chip, reg, mask, val) != val; 1173 } 1174 1175 #define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \ 1176 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ 1177 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\ 1178 .name = xname, .index = xindex, \ 1179 .info = snd_es1938_info_double, \ 1180 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ 1181 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \ 1182 .tlv = { .p = xtlv } } 1183 #define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ 1184 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \ 1185 .info = snd_es1938_info_double, \ 1186 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \ 1187 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) } 1188 1189 static int snd_es1938_info_double(struct snd_kcontrol *kcontrol, 1190 struct snd_ctl_elem_info *uinfo) 1191 { 1192 int mask = (kcontrol->private_value >> 24) & 0xff; 1193 1194 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; 1195 uinfo->count = 2; 1196 uinfo->value.integer.min = 0; 1197 uinfo->value.integer.max = mask; 1198 return 0; 1199 } 1200 1201 static int snd_es1938_get_double(struct snd_kcontrol *kcontrol, 1202 struct snd_ctl_elem_value *ucontrol) 1203 { 1204 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1205 int left_reg = kcontrol->private_value & 0xff; 1206 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1207 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1208 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1209 int mask = (kcontrol->private_value >> 24) & 0xff; 1210 int invert = (kcontrol->private_value >> 22) & 1; 1211 unsigned char left, right; 1212 1213 left = snd_es1938_reg_read(chip, left_reg); 1214 if (left_reg != right_reg) 1215 right = snd_es1938_reg_read(chip, right_reg); 1216 else 1217 right = left; 1218 ucontrol->value.integer.value[0] = (left >> shift_left) & mask; 1219 ucontrol->value.integer.value[1] = (right >> shift_right) & mask; 1220 if (invert) { 1221 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; 1222 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1]; 1223 } 1224 return 0; 1225 } 1226 1227 static int snd_es1938_put_double(struct snd_kcontrol *kcontrol, 1228 struct snd_ctl_elem_value *ucontrol) 1229 { 1230 struct es1938 *chip = snd_kcontrol_chip(kcontrol); 1231 int left_reg = kcontrol->private_value & 0xff; 1232 int right_reg = (kcontrol->private_value >> 8) & 0xff; 1233 int shift_left = (kcontrol->private_value >> 16) & 0x07; 1234 int shift_right = (kcontrol->private_value >> 19) & 0x07; 1235 int mask = (kcontrol->private_value >> 24) & 0xff; 1236 int invert = (kcontrol->private_value >> 22) & 1; 1237 int change; 1238 unsigned char val1, val2, mask1, mask2; 1239 1240 val1 = ucontrol->value.integer.value[0] & mask; 1241 val2 = ucontrol->value.integer.value[1] & mask; 1242 if (invert) { 1243 val1 = mask - val1; 1244 val2 = mask - val2; 1245 } 1246 val1 <<= shift_left; 1247 val2 <<= shift_right; 1248 mask1 = mask << shift_left; 1249 mask2 = mask << shift_right; 1250 if (left_reg != right_reg) { 1251 change = 0; 1252 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1) 1253 change = 1; 1254 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2) 1255 change = 1; 1256 } else { 1257 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2, 1258 val1 | val2) != (val1 | val2)); 1259 } 1260 return change; 1261 } 1262 1263 static const DECLARE_TLV_DB_RANGE(db_scale_master, 1264 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1), 1265 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0), 1266 ); 1267 1268 static const DECLARE_TLV_DB_RANGE(db_scale_audio1, 1269 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1), 1270 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0), 1271 ); 1272 1273 static const DECLARE_TLV_DB_RANGE(db_scale_audio2, 1274 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1), 1275 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0), 1276 ); 1277 1278 static const DECLARE_TLV_DB_RANGE(db_scale_mic, 1279 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1), 1280 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0), 1281 ); 1282 1283 static const DECLARE_TLV_DB_RANGE(db_scale_line, 1284 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1), 1285 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0), 1286 ); 1287 1288 static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0); 1289 1290 static const struct snd_kcontrol_new snd_es1938_controls[] = { 1291 ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0, 1292 db_scale_master), 1293 ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1), 1294 { 1295 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1296 .name = "Hardware Master Playback Volume", 1297 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1298 .info = snd_es1938_info_hw_volume, 1299 .get = snd_es1938_get_hw_volume, 1300 }, 1301 { 1302 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1303 .access = (SNDRV_CTL_ELEM_ACCESS_READ | 1304 SNDRV_CTL_ELEM_ACCESS_TLV_READ), 1305 .name = "Hardware Master Playback Switch", 1306 .info = snd_es1938_info_hw_switch, 1307 .get = snd_es1938_get_hw_switch, 1308 .tlv = { .p = db_scale_master }, 1309 }, 1310 ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0), 1311 ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0, 1312 db_scale_line), 1313 ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0), 1314 ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0, 1315 db_scale_mic), 1316 ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0, 1317 db_scale_line), 1318 ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0, 1319 db_scale_mic), 1320 ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0, 1321 db_scale_line), 1322 ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0, 1323 db_scale_capture), 1324 ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0), 1325 ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0), 1326 ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1), 1327 { 1328 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1329 .name = "Capture Source", 1330 .info = snd_es1938_info_mux, 1331 .get = snd_es1938_get_mux, 1332 .put = snd_es1938_put_mux, 1333 }, 1334 ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0, 1335 db_scale_line), 1336 ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0, 1337 db_scale_audio2), 1338 ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0, 1339 db_scale_mic), 1340 ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0, 1341 db_scale_line), 1342 ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0, 1343 db_scale_mic), 1344 ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0, 1345 db_scale_line), 1346 ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0, 1347 db_scale_line), 1348 ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0, 1349 db_scale_line), 1350 ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0, 1351 db_scale_audio2), 1352 ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0, 1353 db_scale_audio1), 1354 ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0), 1355 { 1356 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1357 .name = "3D Control - Switch", 1358 .info = snd_es1938_info_spatializer_enable, 1359 .get = snd_es1938_get_spatializer_enable, 1360 .put = snd_es1938_put_spatializer_enable, 1361 }, 1362 ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0) 1363 }; 1364 1365 1366 /* ---------------------------------------------------------------------------- */ 1367 /* ---------------------------------------------------------------------------- */ 1368 1369 /* 1370 * initialize the chip - used by resume callback, too 1371 */ 1372 static void snd_es1938_chip_init(struct es1938 *chip) 1373 { 1374 /* reset chip */ 1375 snd_es1938_reset(chip); 1376 1377 /* configure native mode */ 1378 1379 /* enable bus master */ 1380 pci_set_master(chip->pci); 1381 1382 /* disable legacy audio */ 1383 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f); 1384 1385 /* set DDMA base */ 1386 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1); 1387 1388 /* set DMA/IRQ policy */ 1389 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0); 1390 1391 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/ 1392 outb(0xf0, SLIO_REG(chip, IRQCONTROL)); 1393 1394 /* reset DMA */ 1395 outb(0, SLDM_REG(chip, DMACLEAR)); 1396 } 1397 1398 #ifdef CONFIG_PM_SLEEP 1399 /* 1400 * PM support 1401 */ 1402 1403 static const unsigned char saved_regs[SAVED_REG_SIZE+1] = { 1404 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38, 1405 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68, 1406 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d, 1407 0xa8, 0xb4, 1408 }; 1409 1410 1411 static int es1938_suspend(struct device *dev) 1412 { 1413 struct snd_card *card = dev_get_drvdata(dev); 1414 struct es1938 *chip = card->private_data; 1415 const unsigned char *s; 1416 unsigned char *d; 1417 1418 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); 1419 1420 /* save mixer-related registers */ 1421 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) 1422 *d = snd_es1938_reg_read(chip, *s); 1423 1424 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */ 1425 if (chip->irq >= 0) { 1426 free_irq(chip->irq, chip); 1427 chip->irq = -1; 1428 card->sync_irq = -1; 1429 } 1430 return 0; 1431 } 1432 1433 static int es1938_resume(struct device *dev) 1434 { 1435 struct pci_dev *pci = to_pci_dev(dev); 1436 struct snd_card *card = dev_get_drvdata(dev); 1437 struct es1938 *chip = card->private_data; 1438 const unsigned char *s; 1439 unsigned char *d; 1440 1441 if (request_irq(pci->irq, snd_es1938_interrupt, 1442 IRQF_SHARED, KBUILD_MODNAME, chip)) { 1443 dev_err(dev, "unable to grab IRQ %d, disabling device\n", 1444 pci->irq); 1445 snd_card_disconnect(card); 1446 return -EIO; 1447 } 1448 chip->irq = pci->irq; 1449 card->sync_irq = chip->irq; 1450 snd_es1938_chip_init(chip); 1451 1452 /* restore mixer-related registers */ 1453 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) { 1454 if (*s < 0xa0) 1455 snd_es1938_mixer_write(chip, *s, *d); 1456 else 1457 snd_es1938_write(chip, *s, *d); 1458 } 1459 1460 snd_power_change_state(card, SNDRV_CTL_POWER_D0); 1461 return 0; 1462 } 1463 1464 static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume); 1465 #define ES1938_PM_OPS &es1938_pm 1466 #else 1467 #define ES1938_PM_OPS NULL 1468 #endif /* CONFIG_PM_SLEEP */ 1469 1470 #ifdef SUPPORT_JOYSTICK 1471 static int snd_es1938_create_gameport(struct es1938 *chip) 1472 { 1473 struct gameport *gp; 1474 1475 chip->gameport = gp = gameport_allocate_port(); 1476 if (!gp) { 1477 dev_err(chip->card->dev, 1478 "cannot allocate memory for gameport\n"); 1479 return -ENOMEM; 1480 } 1481 1482 gameport_set_name(gp, "ES1938"); 1483 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); 1484 gameport_set_dev_parent(gp, &chip->pci->dev); 1485 gp->io = chip->game_port; 1486 1487 gameport_register_port(gp); 1488 1489 return 0; 1490 } 1491 1492 static void snd_es1938_free_gameport(struct es1938 *chip) 1493 { 1494 if (chip->gameport) { 1495 gameport_unregister_port(chip->gameport); 1496 chip->gameport = NULL; 1497 } 1498 } 1499 #else 1500 static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; } 1501 static inline void snd_es1938_free_gameport(struct es1938 *chip) { } 1502 #endif /* SUPPORT_JOYSTICK */ 1503 1504 static void snd_es1938_free(struct snd_card *card) 1505 { 1506 struct es1938 *chip = card->private_data; 1507 1508 /* disable irqs */ 1509 outb(0x00, SLIO_REG(chip, IRQCONTROL)); 1510 if (chip->rmidi) 1511 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); 1512 1513 snd_es1938_free_gameport(chip); 1514 1515 if (chip->irq >= 0) 1516 free_irq(chip->irq, chip); 1517 } 1518 1519 static int snd_es1938_create(struct snd_card *card, 1520 struct pci_dev *pci) 1521 { 1522 struct es1938 *chip = card->private_data; 1523 int err; 1524 1525 /* enable PCI device */ 1526 err = pcim_enable_device(pci); 1527 if (err < 0) 1528 return err; 1529 /* check, if we can restrict PCI DMA transfers to 24 bits */ 1530 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) { 1531 dev_err(card->dev, 1532 "architecture does not support 24bit PCI busmaster DMA\n"); 1533 return -ENXIO; 1534 } 1535 1536 spin_lock_init(&chip->reg_lock); 1537 spin_lock_init(&chip->mixer_lock); 1538 chip->card = card; 1539 chip->pci = pci; 1540 chip->irq = -1; 1541 err = pci_request_regions(pci, "ESS Solo-1"); 1542 if (err < 0) 1543 return err; 1544 chip->io_port = pci_resource_start(pci, 0); 1545 chip->sb_port = pci_resource_start(pci, 1); 1546 chip->vc_port = pci_resource_start(pci, 2); 1547 chip->mpu_port = pci_resource_start(pci, 3); 1548 chip->game_port = pci_resource_start(pci, 4); 1549 /* still use non-managed irq handler as it's re-acquired at PM resume */ 1550 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED, 1551 KBUILD_MODNAME, chip)) { 1552 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); 1553 return -EBUSY; 1554 } 1555 chip->irq = pci->irq; 1556 card->sync_irq = chip->irq; 1557 card->private_free = snd_es1938_free; 1558 dev_dbg(card->dev, 1559 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n", 1560 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port); 1561 1562 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */ 1563 1564 snd_es1938_chip_init(chip); 1565 return 0; 1566 } 1567 1568 /* -------------------------------------------------------------------- 1569 * Interrupt handler 1570 * -------------------------------------------------------------------- */ 1571 static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id) 1572 { 1573 struct es1938 *chip = dev_id; 1574 unsigned char status; 1575 __always_unused unsigned char audiostatus; 1576 int handled = 0; 1577 1578 status = inb(SLIO_REG(chip, IRQCONTROL)); 1579 #if 0 1580 dev_dbg(chip->card->dev, 1581 "Es1938debug - interrupt status: =0x%x\n", status); 1582 #endif 1583 1584 /* AUDIO 1 */ 1585 if (status & 0x10) { 1586 #if 0 1587 dev_dbg(chip->card->dev, 1588 "Es1938debug - AUDIO channel 1 interrupt\n"); 1589 dev_dbg(chip->card->dev, 1590 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n", 1591 inw(SLDM_REG(chip, DMACOUNT))); 1592 dev_dbg(chip->card->dev, 1593 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n", 1594 inl(SLDM_REG(chip, DMAADDR))); 1595 dev_dbg(chip->card->dev, 1596 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n", 1597 inl(SLDM_REG(chip, DMASTATUS))); 1598 #endif 1599 /* clear irq */ 1600 handled = 1; 1601 audiostatus = inb(SLSB_REG(chip, STATUS)); 1602 if (chip->active & ADC1) 1603 snd_pcm_period_elapsed(chip->capture_substream); 1604 else if (chip->active & DAC1) 1605 snd_pcm_period_elapsed(chip->playback2_substream); 1606 } 1607 1608 /* AUDIO 2 */ 1609 if (status & 0x20) { 1610 #if 0 1611 dev_dbg(chip->card->dev, 1612 "Es1938debug - AUDIO channel 2 interrupt\n"); 1613 dev_dbg(chip->card->dev, 1614 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n", 1615 inw(SLIO_REG(chip, AUDIO2DMACOUNT))); 1616 dev_dbg(chip->card->dev, 1617 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n", 1618 inl(SLIO_REG(chip, AUDIO2DMAADDR))); 1619 1620 #endif 1621 /* clear irq */ 1622 handled = 1; 1623 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0); 1624 if (chip->active & DAC2) 1625 snd_pcm_period_elapsed(chip->playback1_substream); 1626 } 1627 1628 /* Hardware volume */ 1629 if (status & 0x40) { 1630 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80; 1631 handled = 1; 1632 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id); 1633 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id); 1634 if (!split) { 1635 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, 1636 &chip->master_switch->id); 1637 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, 1638 &chip->master_volume->id); 1639 } 1640 /* ack interrupt */ 1641 snd_es1938_mixer_write(chip, 0x66, 0x00); 1642 } 1643 1644 /* MPU401 */ 1645 if (status & 0x80) { 1646 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received. 1647 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well! 1648 // andreas@flying-snail.de 1649 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */ 1650 if (chip->rmidi) { 1651 handled = 1; 1652 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data); 1653 } 1654 } 1655 return IRQ_RETVAL(handled); 1656 } 1657 1658 #define ES1938_DMA_SIZE 64 1659 1660 static int snd_es1938_mixer(struct es1938 *chip) 1661 { 1662 struct snd_card *card; 1663 unsigned int idx; 1664 int err; 1665 1666 card = chip->card; 1667 1668 strcpy(card->mixername, "ESS Solo-1"); 1669 1670 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) { 1671 struct snd_kcontrol *kctl; 1672 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip); 1673 switch (idx) { 1674 case 0: 1675 chip->master_volume = kctl; 1676 kctl->private_free = snd_es1938_hwv_free; 1677 break; 1678 case 1: 1679 chip->master_switch = kctl; 1680 kctl->private_free = snd_es1938_hwv_free; 1681 break; 1682 case 2: 1683 chip->hw_volume = kctl; 1684 kctl->private_free = snd_es1938_hwv_free; 1685 break; 1686 case 3: 1687 chip->hw_switch = kctl; 1688 kctl->private_free = snd_es1938_hwv_free; 1689 break; 1690 } 1691 err = snd_ctl_add(card, kctl); 1692 if (err < 0) 1693 return err; 1694 } 1695 return 0; 1696 } 1697 1698 1699 static int __snd_es1938_probe(struct pci_dev *pci, 1700 const struct pci_device_id *pci_id) 1701 { 1702 static int dev; 1703 struct snd_card *card; 1704 struct es1938 *chip; 1705 struct snd_opl3 *opl3; 1706 int idx, err; 1707 1708 if (dev >= SNDRV_CARDS) 1709 return -ENODEV; 1710 if (!enable[dev]) { 1711 dev++; 1712 return -ENOENT; 1713 } 1714 1715 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 1716 sizeof(*chip), &card); 1717 if (err < 0) 1718 return err; 1719 chip = card->private_data; 1720 1721 for (idx = 0; idx < 5; idx++) 1722 if (pci_resource_start(pci, idx) == 0 || 1723 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) 1724 return -ENODEV; 1725 1726 err = snd_es1938_create(card, pci); 1727 if (err < 0) 1728 return err; 1729 1730 strcpy(card->driver, "ES1938"); 1731 strcpy(card->shortname, "ESS ES1938 (Solo-1)"); 1732 sprintf(card->longname, "%s rev %i, irq %i", 1733 card->shortname, 1734 chip->revision, 1735 chip->irq); 1736 1737 err = snd_es1938_new_pcm(chip, 0); 1738 if (err < 0) 1739 return err; 1740 err = snd_es1938_mixer(chip); 1741 if (err < 0) 1742 return err; 1743 if (snd_opl3_create(card, 1744 SLSB_REG(chip, FMLOWADDR), 1745 SLSB_REG(chip, FMHIGHADDR), 1746 OPL3_HW_OPL3, 1, &opl3) < 0) { 1747 dev_err(card->dev, "OPL3 not detected at 0x%lx\n", 1748 SLSB_REG(chip, FMLOWADDR)); 1749 } else { 1750 err = snd_opl3_timer_new(opl3, 0, 1); 1751 if (err < 0) 1752 return err; 1753 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL); 1754 if (err < 0) 1755 return err; 1756 } 1757 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401, 1758 chip->mpu_port, 1759 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK, 1760 -1, &chip->rmidi) < 0) { 1761 dev_err(card->dev, "unable to initialize MPU-401\n"); 1762 } else { 1763 // this line is vital for MIDI interrupt handling on ess-solo1 1764 // andreas@flying-snail.de 1765 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40); 1766 } 1767 1768 snd_es1938_create_gameport(chip); 1769 1770 err = snd_card_register(card); 1771 if (err < 0) 1772 return err; 1773 1774 pci_set_drvdata(pci, card); 1775 dev++; 1776 return 0; 1777 } 1778 1779 static int snd_es1938_probe(struct pci_dev *pci, 1780 const struct pci_device_id *pci_id) 1781 { 1782 return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id)); 1783 } 1784 1785 static struct pci_driver es1938_driver = { 1786 .name = KBUILD_MODNAME, 1787 .id_table = snd_es1938_ids, 1788 .probe = snd_es1938_probe, 1789 .driver = { 1790 .pm = ES1938_PM_OPS, 1791 }, 1792 }; 1793 1794 module_pci_driver(es1938_driver); 1795