1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips / proc interface routines 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added EMU 1010 support. 9 * 10 * BUGS: 11 * -- 12 * 13 * TODO: 14 * -- 15 */ 16 17 #include <linux/slab.h> 18 #include <linux/init.h> 19 #include <sound/core.h> 20 #include <sound/emu10k1.h> 21 #include "p16v.h" 22 23 static void snd_emu10k1_proc_spdif_status(struct snd_emu10k1 * emu, 24 struct snd_info_buffer *buffer, 25 char *title, 26 int status_reg, 27 int rate_reg) 28 { 29 static const char * const clkaccy[4] = { "1000ppm", "50ppm", "variable", "unknown" }; 30 static const int samplerate[16] = { 44100, 1, 48000, 32000, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; 31 static const char * const channel[16] = { "unspec", "left", "right", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", "13", "14", "15" }; 32 static const char * const emphasis[8] = { "none", "50/15 usec 2 channel", "2", "3", "4", "5", "6", "7" }; 33 unsigned int status, rate = 0; 34 35 status = snd_emu10k1_ptr_read(emu, status_reg, 0); 36 37 snd_iprintf(buffer, "\n%s\n", title); 38 39 if (status != 0xffffffff) { 40 snd_iprintf(buffer, "Professional Mode : %s\n", (status & SPCS_PROFESSIONAL) ? "yes" : "no"); 41 snd_iprintf(buffer, "Not Audio Data : %s\n", (status & SPCS_NOTAUDIODATA) ? "yes" : "no"); 42 snd_iprintf(buffer, "Copyright : %s\n", (status & SPCS_COPYRIGHT) ? "yes" : "no"); 43 snd_iprintf(buffer, "Emphasis : %s\n", emphasis[(status & SPCS_EMPHASISMASK) >> 3]); 44 snd_iprintf(buffer, "Mode : %i\n", (status & SPCS_MODEMASK) >> 6); 45 snd_iprintf(buffer, "Category Code : 0x%x\n", (status & SPCS_CATEGORYCODEMASK) >> 8); 46 snd_iprintf(buffer, "Generation Status : %s\n", status & SPCS_GENERATIONSTATUS ? "original" : "copy"); 47 snd_iprintf(buffer, "Source Mask : %i\n", (status & SPCS_SOURCENUMMASK) >> 16); 48 snd_iprintf(buffer, "Channel Number : %s\n", channel[(status & SPCS_CHANNELNUMMASK) >> 20]); 49 snd_iprintf(buffer, "Sample Rate : %iHz\n", samplerate[(status & SPCS_SAMPLERATEMASK) >> 24]); 50 snd_iprintf(buffer, "Clock Accuracy : %s\n", clkaccy[(status & SPCS_CLKACCYMASK) >> 28]); 51 52 if (rate_reg > 0) { 53 rate = snd_emu10k1_ptr_read(emu, rate_reg, 0); 54 snd_iprintf(buffer, "S/PDIF Valid : %s\n", rate & SRCS_SPDIFVALID ? "on" : "off"); 55 snd_iprintf(buffer, "S/PDIF Locked : %s\n", rate & SRCS_SPDIFLOCKED ? "on" : "off"); 56 snd_iprintf(buffer, "Rate Locked : %s\n", rate & SRCS_RATELOCKED ? "on" : "off"); 57 /* From ((Rate * 48000 ) / 262144); */ 58 snd_iprintf(buffer, "Estimated Sample Rate : %d\n", ((rate & 0xFFFFF ) * 375) >> 11); 59 } 60 } else { 61 snd_iprintf(buffer, "No signal detected.\n"); 62 } 63 64 } 65 66 static void snd_emu10k1_proc_read(struct snd_info_entry *entry, 67 struct snd_info_buffer *buffer) 68 { 69 struct snd_emu10k1 *emu = entry->private_data; 70 const char * const *inputs = emu->audigy ? 71 snd_emu10k1_audigy_ins : snd_emu10k1_sblive_ins; 72 const char * const *outputs = emu->audigy ? 73 snd_emu10k1_audigy_outs : snd_emu10k1_sblive_outs; 74 unsigned short extin_mask = emu->audigy ? ~0 : emu->fx8010.extin_mask; 75 unsigned short extout_mask = emu->audigy ? ~0 : emu->fx8010.extout_mask; 76 unsigned int val, val1, ptrx, psst, dsl, snda; 77 int nefx = emu->audigy ? 32 : 16; 78 int idx; 79 80 snd_iprintf(buffer, "EMU10K1\n\n"); 81 snd_iprintf(buffer, "Card : %s\n", 82 emu->card_capabilities->emu_model ? "E-MU D.A.S." : 83 emu->card_capabilities->ecard ? "E-MU A.P.S." : 84 emu->audigy ? "SB Audigy" : "SB Live!"); 85 snd_iprintf(buffer, "Internal TRAM (words) : 0x%x\n", emu->fx8010.itram_size); 86 snd_iprintf(buffer, "External TRAM (words) : 0x%x\n", (int)emu->fx8010.etram_pages.bytes / 2); 87 88 snd_iprintf(buffer, "\nEffect Send Routing & Amounts:\n"); 89 for (idx = 0; idx < NUM_G; idx++) { 90 ptrx = snd_emu10k1_ptr_read(emu, PTRX, idx); 91 psst = snd_emu10k1_ptr_read(emu, PSST, idx); 92 dsl = snd_emu10k1_ptr_read(emu, DSL, idx); 93 if (emu->audigy) { 94 val = snd_emu10k1_ptr_read(emu, A_FXRT1, idx); 95 val1 = snd_emu10k1_ptr_read(emu, A_FXRT2, idx); 96 snda = snd_emu10k1_ptr_read(emu, A_SENDAMOUNTS, idx); 97 snd_iprintf(buffer, "Ch%-2i: A=%2i:%02x, B=%2i:%02x, C=%2i:%02x, D=%2i:%02x, ", 98 idx, 99 val & 0x3f, REG_VAL_GET(PTRX_FXSENDAMOUNT_A, ptrx), 100 (val >> 8) & 0x3f, REG_VAL_GET(PTRX_FXSENDAMOUNT_B, ptrx), 101 (val >> 16) & 0x3f, REG_VAL_GET(PSST_FXSENDAMOUNT_C, psst), 102 (val >> 24) & 0x3f, REG_VAL_GET(DSL_FXSENDAMOUNT_D, dsl)); 103 snd_iprintf(buffer, "E=%2i:%02x, F=%2i:%02x, G=%2i:%02x, H=%2i:%02x\n", 104 val1 & 0x3f, (snda >> 24) & 0xff, 105 (val1 >> 8) & 0x3f, (snda >> 16) & 0xff, 106 (val1 >> 16) & 0x3f, (snda >> 8) & 0xff, 107 (val1 >> 24) & 0x3f, snda & 0xff); 108 } else { 109 val = snd_emu10k1_ptr_read(emu, FXRT, idx); 110 snd_iprintf(buffer, "Ch%-2i: A=%2i:%02x, B=%2i:%02x, C=%2i:%02x, D=%2i:%02x\n", 111 idx, 112 (val >> 16) & 0x0f, REG_VAL_GET(PTRX_FXSENDAMOUNT_A, ptrx), 113 (val >> 20) & 0x0f, REG_VAL_GET(PTRX_FXSENDAMOUNT_B, ptrx), 114 (val >> 24) & 0x0f, REG_VAL_GET(PSST_FXSENDAMOUNT_C, psst), 115 (val >> 28) & 0x0f, REG_VAL_GET(DSL_FXSENDAMOUNT_D, dsl)); 116 } 117 } 118 snd_iprintf(buffer, "\nEffect Send Targets:\n"); 119 // Audigy actually has 64, but we don't use them all. 120 for (idx = 0; idx < 32; idx++) { 121 const char *c = snd_emu10k1_fxbus[idx]; 122 if (c) 123 snd_iprintf(buffer, " Channel %02i [%s]\n", idx, c); 124 } 125 if (!emu->card_capabilities->emu_model) { 126 snd_iprintf(buffer, "\nOutput Channels:\n"); 127 for (idx = 0; idx < 32; idx++) 128 if (outputs[idx] && (extout_mask & (1 << idx))) 129 snd_iprintf(buffer, " Channel %02i [%s]\n", idx, outputs[idx]); 130 snd_iprintf(buffer, "\nInput Channels:\n"); 131 for (idx = 0; idx < 16; idx++) 132 if (inputs[idx] && (extin_mask & (1 << idx))) 133 snd_iprintf(buffer, " Channel %02i [%s]\n", idx, inputs[idx]); 134 snd_iprintf(buffer, "\nMultichannel Capture Sources:\n"); 135 for (idx = 0; idx < nefx; idx++) 136 if (emu->efx_voices_mask[0] & (1 << idx)) 137 snd_iprintf(buffer, " Channel %02i [Output: %s]\n", 138 idx, outputs[idx] ? outputs[idx] : "???"); 139 if (emu->audigy) { 140 for (idx = 0; idx < 32; idx++) 141 if (emu->efx_voices_mask[1] & (1 << idx)) 142 snd_iprintf(buffer, " Channel %02i [Input: %s]\n", 143 idx + 32, inputs[idx] ? inputs[idx] : "???"); 144 } else { 145 for (idx = 0; idx < 16; idx++) { 146 if (emu->efx_voices_mask[0] & ((1 << 16) << idx)) { 147 if (emu->card_capabilities->sblive51) { 148 s8 c = snd_emu10k1_sblive51_fxbus2_map[idx]; 149 if (c == -1) 150 snd_iprintf(buffer, " Channel %02i [Output: %s]\n", 151 idx + 16, outputs[idx + 16]); 152 else 153 snd_iprintf(buffer, " Channel %02i [Input: %s]\n", 154 idx + 16, inputs[c]); 155 } else { 156 snd_iprintf(buffer, " Channel %02i [Input: %s]\n", 157 idx + 16, inputs[idx] ? inputs[idx] : "???"); 158 } 159 } 160 } 161 } 162 } 163 } 164 165 static void snd_emu10k1_proc_spdif_read(struct snd_info_entry *entry, 166 struct snd_info_buffer *buffer) 167 { 168 struct snd_emu10k1 *emu = entry->private_data; 169 u32 value; 170 u32 value2; 171 172 if (emu->card_capabilities->emu_model) { 173 // This represents the S/PDIF lock status on 0404b, which is 174 // kinda weird and unhelpful, because monitoring it via IRQ is 175 // impractical (one gets an IRQ flood as long as it is desynced). 176 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &value); 177 snd_iprintf(buffer, "Lock status 1: %#x\n", value & 0x10); 178 179 // Bit 0x1 in LO being 0 is supposedly for ADAT lock. 180 // The registers are always all zero on 0404b. 181 snd_emu1010_fpga_read(emu, EMU_HANA_LOCK_STS_LO, &value); 182 snd_emu1010_fpga_read(emu, EMU_HANA_LOCK_STS_HI, &value2); 183 snd_iprintf(buffer, "Lock status 2: %#x %#x\n", value, value2); 184 185 snd_iprintf(buffer, "S/PDIF rate: %dHz\n", 186 snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_HANA_SPDIF_IN)); 187 if (emu->card_capabilities->emu_model != EMU_MODEL_EMU0404) { 188 snd_iprintf(buffer, "ADAT rate: %dHz\n", 189 snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_HANA_ADAT_IN)); 190 snd_iprintf(buffer, "Dock rate: %dHz\n", 191 snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_2ND_HANA)); 192 } 193 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU0404 || 194 emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) 195 snd_iprintf(buffer, "BNC rate: %dHz\n", 196 snd_emu1010_get_raw_rate(emu, EMU_HANA_WCLOCK_SYNC_BNC)); 197 198 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &value); 199 if (value & EMU_HANA_SPDIF_MODE_RX_INVALID) 200 snd_iprintf(buffer, "\nS/PDIF input invalid\n"); 201 else 202 snd_iprintf(buffer, "\nS/PDIF mode: %s%s\n", 203 value & EMU_HANA_SPDIF_MODE_RX_PRO ? "professional" : "consumer", 204 value & EMU_HANA_SPDIF_MODE_RX_NOCOPY ? ", no copy" : ""); 205 } else { 206 snd_emu10k1_proc_spdif_status(emu, buffer, "CD-ROM S/PDIF In", CDCS, CDSRCS); 207 snd_emu10k1_proc_spdif_status(emu, buffer, "Optical or Coax S/PDIF In", GPSCS, GPSRCS); 208 } 209 #if 0 210 val = snd_emu10k1_ptr_read(emu, ZVSRCS, 0); 211 snd_iprintf(buffer, "\nZoomed Video\n"); 212 snd_iprintf(buffer, "Rate Locked : %s\n", val & SRCS_RATELOCKED ? "on" : "off"); 213 snd_iprintf(buffer, "Estimated Sample Rate : 0x%x\n", val & SRCS_ESTSAMPLERATE); 214 #endif 215 } 216 217 static void snd_emu10k1_proc_rates_read(struct snd_info_entry *entry, 218 struct snd_info_buffer *buffer) 219 { 220 static const int samplerate[8] = { 44100, 48000, 96000, 192000, 4, 5, 6, 7 }; 221 struct snd_emu10k1 *emu = entry->private_data; 222 unsigned int val, tmp, n; 223 val = snd_emu10k1_ptr20_read(emu, CAPTURE_RATE_STATUS, 0); 224 for (n = 0; n < 4; n++) { 225 tmp = val >> (16 + (n*4)); 226 if (tmp & 0x8) snd_iprintf(buffer, "Channel %d: Rate=%d\n", n, samplerate[tmp & 0x7]); 227 else snd_iprintf(buffer, "Channel %d: No input\n", n); 228 } 229 } 230 231 struct emu10k1_reg_entry { 232 unsigned short base, size; 233 const char *name; 234 }; 235 236 static const struct emu10k1_reg_entry sblive_reg_entries[] = { 237 { 0, 0x10, "FXBUS" }, 238 { 0x10, 0x10, "EXTIN" }, 239 { 0x20, 0x10, "EXTOUT" }, 240 { 0x30, 0x10, "FXBUS2" }, 241 { 0x40, 0x20, NULL }, // Constants 242 { 0x100, 0x100, "GPR" }, 243 { 0x200, 0x80, "ITRAM_DATA" }, 244 { 0x280, 0x20, "ETRAM_DATA" }, 245 { 0x300, 0x80, "ITRAM_ADDR" }, 246 { 0x380, 0x20, "ETRAM_ADDR" }, 247 { 0x400, 0, NULL } 248 }; 249 250 static const struct emu10k1_reg_entry audigy_reg_entries[] = { 251 { 0, 0x40, "FXBUS" }, 252 { 0x40, 0x10, "EXTIN" }, 253 { 0x50, 0x10, "P16VIN" }, 254 { 0x60, 0x20, "EXTOUT" }, 255 { 0x80, 0x20, "FXBUS2" }, 256 { 0xa0, 0x10, "EMU32OUTH" }, 257 { 0xb0, 0x10, "EMU32OUTL" }, 258 { 0xc0, 0x20, NULL }, // Constants 259 // This can't be quite right - overlap. 260 //{ 0x100, 0xc0, "ITRAM_CTL" }, 261 //{ 0x1c0, 0x40, "ETRAM_CTL" }, 262 { 0x160, 0x20, "A3_EMU32IN" }, 263 { 0x1e0, 0x20, "A3_EMU32OUT" }, 264 { 0x200, 0xc0, "ITRAM_DATA" }, 265 { 0x2c0, 0x40, "ETRAM_DATA" }, 266 { 0x300, 0xc0, "ITRAM_ADDR" }, 267 { 0x3c0, 0x40, "ETRAM_ADDR" }, 268 { 0x400, 0x200, "GPR" }, 269 { 0x600, 0, NULL } 270 }; 271 272 static const char * const emu10k1_const_entries[] = { 273 "C_00000000", 274 "C_00000001", 275 "C_00000002", 276 "C_00000003", 277 "C_00000004", 278 "C_00000008", 279 "C_00000010", 280 "C_00000020", 281 "C_00000100", 282 "C_00010000", 283 "C_00000800", 284 "C_10000000", 285 "C_20000000", 286 "C_40000000", 287 "C_80000000", 288 "C_7fffffff", 289 "C_ffffffff", 290 "C_fffffffe", 291 "C_c0000000", 292 "C_4f1bbcdc", 293 "C_5a7ef9db", 294 "C_00100000", 295 "GPR_ACCU", 296 "GPR_COND", 297 "GPR_NOISE0", 298 "GPR_NOISE1", 299 "GPR_IRQ", 300 "GPR_DBAC", 301 "GPR_DBACE", 302 "???", 303 }; 304 305 static int disasm_emu10k1_reg(char *buffer, 306 const struct emu10k1_reg_entry *entries, 307 unsigned reg, const char *pfx) 308 { 309 for (int i = 0; ; i++) { 310 unsigned base = entries[i].base; 311 unsigned size = entries[i].size; 312 if (!size) 313 return sprintf(buffer, "%s0x%03x", pfx, reg); 314 if (reg >= base && reg < base + size) { 315 const char *name = entries[i].name; 316 reg -= base; 317 if (name) 318 return sprintf(buffer, "%s%s(%u)", pfx, name, reg); 319 return sprintf(buffer, "%s%s", pfx, emu10k1_const_entries[reg]); 320 } 321 } 322 } 323 324 static int disasm_sblive_reg(char *buffer, unsigned reg, const char *pfx) 325 { 326 return disasm_emu10k1_reg(buffer, sblive_reg_entries, reg, pfx); 327 } 328 329 static int disasm_audigy_reg(char *buffer, unsigned reg, const char *pfx) 330 { 331 return disasm_emu10k1_reg(buffer, audigy_reg_entries, reg, pfx); 332 } 333 334 static void snd_emu10k1_proc_acode_read(struct snd_info_entry *entry, 335 struct snd_info_buffer *buffer) 336 { 337 u32 pc; 338 struct snd_emu10k1 *emu = entry->private_data; 339 static const char * const insns[16] = { 340 "MAC0", "MAC1", "MAC2", "MAC3", "MACINT0", "MACINT1", "ACC3", "MACMV", 341 "ANDXOR", "TSTNEG", "LIMITGE", "LIMITLT", "LOG", "EXP", "INTERP", "SKIP", 342 }; 343 static const char spaces[] = " "; 344 const int nspaces = sizeof(spaces) - 1; 345 346 snd_iprintf(buffer, "FX8010 Instruction List '%s'\n", emu->fx8010.name); 347 snd_iprintf(buffer, " Code dump :\n"); 348 for (pc = 0; pc < (emu->audigy ? 1024 : 512); pc++) { 349 u32 low, high; 350 int len; 351 char buf[100]; 352 char *bufp = buf; 353 354 low = snd_emu10k1_efx_read(emu, pc * 2); 355 high = snd_emu10k1_efx_read(emu, pc * 2 + 1); 356 if (emu->audigy) { 357 bufp += sprintf(bufp, " %-7s ", insns[(high >> 24) & 0x0f]); 358 bufp += disasm_audigy_reg(bufp, (high >> 12) & 0x7ff, ""); 359 bufp += disasm_audigy_reg(bufp, (high >> 0) & 0x7ff, ", "); 360 bufp += disasm_audigy_reg(bufp, (low >> 12) & 0x7ff, ", "); 361 bufp += disasm_audigy_reg(bufp, (low >> 0) & 0x7ff, ", "); 362 } else { 363 bufp += sprintf(bufp, " %-7s ", insns[(high >> 20) & 0x0f]); 364 bufp += disasm_sblive_reg(bufp, (high >> 10) & 0x3ff, ""); 365 bufp += disasm_sblive_reg(bufp, (high >> 0) & 0x3ff, ", "); 366 bufp += disasm_sblive_reg(bufp, (low >> 10) & 0x3ff, ", "); 367 bufp += disasm_sblive_reg(bufp, (low >> 0) & 0x3ff, ", "); 368 } 369 len = (int)(ptrdiff_t)(bufp - buf); 370 snd_iprintf(buffer, "%s %s /* 0x%04x: 0x%08x%08x */\n", 371 buf, &spaces[nspaces - clamp(65 - len, 0, nspaces)], 372 pc, high, low); 373 } 374 } 375 376 #define TOTAL_SIZE_GPR (0x100*4) 377 #define A_TOTAL_SIZE_GPR (0x200*4) 378 #define TOTAL_SIZE_TANKMEM_DATA (0xa0*4) 379 #define TOTAL_SIZE_TANKMEM_ADDR (0xa0*4) 380 #define A_TOTAL_SIZE_TANKMEM_DATA (0x100*4) 381 #define A_TOTAL_SIZE_TANKMEM_ADDR (0x100*4) 382 #define TOTAL_SIZE_CODE (0x200*8) 383 #define A_TOTAL_SIZE_CODE (0x400*8) 384 385 static ssize_t snd_emu10k1_fx8010_read(struct snd_info_entry *entry, 386 void *file_private_data, 387 struct file *file, char __user *buf, 388 size_t count, loff_t pos) 389 { 390 struct snd_emu10k1 *emu = entry->private_data; 391 unsigned int offset; 392 int tram_addr = 0; 393 unsigned int *tmp; 394 long res; 395 unsigned int idx; 396 397 if (!strcmp(entry->name, "fx8010_tram_addr")) { 398 offset = TANKMEMADDRREGBASE; 399 tram_addr = 1; 400 } else if (!strcmp(entry->name, "fx8010_tram_data")) { 401 offset = TANKMEMDATAREGBASE; 402 } else if (!strcmp(entry->name, "fx8010_code")) { 403 offset = emu->audigy ? A_MICROCODEBASE : MICROCODEBASE; 404 } else { 405 offset = emu->audigy ? A_FXGPREGBASE : FXGPREGBASE; 406 } 407 408 tmp = kmalloc(count + 8, GFP_KERNEL); 409 if (!tmp) 410 return -ENOMEM; 411 for (idx = 0; idx < ((pos & 3) + count + 3) >> 2; idx++) { 412 unsigned int val; 413 val = snd_emu10k1_ptr_read(emu, offset + idx + (pos >> 2), 0); 414 if (tram_addr && emu->audigy) { 415 val >>= 11; 416 val |= snd_emu10k1_ptr_read(emu, 0x100 + idx + (pos >> 2), 0) << 20; 417 } 418 tmp[idx] = val; 419 } 420 if (copy_to_user(buf, ((char *)tmp) + (pos & 3), count)) 421 res = -EFAULT; 422 else 423 res = count; 424 kfree(tmp); 425 return res; 426 } 427 428 static void snd_emu10k1_proc_voices_read(struct snd_info_entry *entry, 429 struct snd_info_buffer *buffer) 430 { 431 struct snd_emu10k1 *emu = entry->private_data; 432 struct snd_emu10k1_voice *voice; 433 int idx; 434 static const char * const types[] = { 435 "Unused", "EFX", "EFX IRQ", "PCM", "PCM IRQ", "Synth" 436 }; 437 static_assert(ARRAY_SIZE(types) == EMU10K1_NUM_TYPES); 438 439 snd_iprintf(buffer, "ch\tdirty\tlast\tuse\n"); 440 for (idx = 0; idx < NUM_G; idx++) { 441 voice = &emu->voices[idx]; 442 snd_iprintf(buffer, "%i\t%u\t%u\t%s\n", 443 idx, 444 voice->dirty, 445 voice->last, 446 types[voice->use]); 447 } 448 } 449 450 #ifdef CONFIG_SND_DEBUG 451 452 static void snd_emu_proc_emu1010_link_read(struct snd_emu10k1 *emu, 453 struct snd_info_buffer *buffer, 454 u32 dst) 455 { 456 u32 src = snd_emu1010_fpga_link_dst_src_read(emu, dst); 457 snd_iprintf(buffer, "%04x: %04x\n", dst, src); 458 } 459 460 static void snd_emu_proc_emu1010_reg_read(struct snd_info_entry *entry, 461 struct snd_info_buffer *buffer) 462 { 463 struct snd_emu10k1 *emu = entry->private_data; 464 u32 value; 465 int i; 466 snd_iprintf(buffer, "EMU1010 Registers:\n\n"); 467 468 for(i = 0; i < 0x40; i+=1) { 469 snd_emu1010_fpga_read(emu, i, &value); 470 snd_iprintf(buffer, "%02x: %02x\n", i, value); 471 } 472 473 snd_iprintf(buffer, "\nEMU1010 Routes:\n\n"); 474 475 for (i = 0; i < 16; i++) // To Alice2/Tina[2] via EMU32 476 snd_emu_proc_emu1010_link_read(emu, buffer, i); 477 if (emu->card_capabilities->emu_model != EMU_MODEL_EMU0404) 478 for (i = 0; i < 32; i++) // To Dock via EDI 479 snd_emu_proc_emu1010_link_read(emu, buffer, 0x100 + i); 480 if (emu->card_capabilities->emu_model != EMU_MODEL_EMU1616) 481 for (i = 0; i < 8; i++) // To Hamoa/local 482 snd_emu_proc_emu1010_link_read(emu, buffer, 0x200 + i); 483 for (i = 0; i < 8; i++) // To Hamoa/Mana/local 484 snd_emu_proc_emu1010_link_read(emu, buffer, 0x300 + i); 485 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) { 486 for (i = 0; i < 16; i++) // To Tina2 via EMU32 487 snd_emu_proc_emu1010_link_read(emu, buffer, 0x400 + i); 488 } else if (emu->card_capabilities->emu_model != EMU_MODEL_EMU0404) { 489 for (i = 0; i < 8; i++) // To Hana ADAT 490 snd_emu_proc_emu1010_link_read(emu, buffer, 0x400 + i); 491 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010B) { 492 for (i = 0; i < 16; i++) // To Tina via EMU32 493 snd_emu_proc_emu1010_link_read(emu, buffer, 0x500 + i); 494 } else { 495 // To Alice2 via I2S 496 snd_emu_proc_emu1010_link_read(emu, buffer, 0x500); 497 snd_emu_proc_emu1010_link_read(emu, buffer, 0x501); 498 snd_emu_proc_emu1010_link_read(emu, buffer, 0x600); 499 snd_emu_proc_emu1010_link_read(emu, buffer, 0x601); 500 snd_emu_proc_emu1010_link_read(emu, buffer, 0x700); 501 snd_emu_proc_emu1010_link_read(emu, buffer, 0x701); 502 } 503 } 504 } 505 506 static void snd_emu_proc_io_reg_read(struct snd_info_entry *entry, 507 struct snd_info_buffer *buffer) 508 { 509 struct snd_emu10k1 *emu = entry->private_data; 510 unsigned long value; 511 int i; 512 snd_iprintf(buffer, "IO Registers:\n\n"); 513 for(i = 0; i < 0x40; i+=4) { 514 value = inl(emu->port + i); 515 snd_iprintf(buffer, "%02X: %08lX\n", i, value); 516 } 517 } 518 519 static void snd_emu_proc_io_reg_write(struct snd_info_entry *entry, 520 struct snd_info_buffer *buffer) 521 { 522 struct snd_emu10k1 *emu = entry->private_data; 523 char line[64]; 524 u32 reg, val; 525 while (!snd_info_get_line(buffer, line, sizeof(line))) { 526 if (sscanf(line, "%x %x", ®, &val) != 2) 527 continue; 528 if (reg < 0x40 && val <= 0xffffffff) { 529 outl(val, emu->port + (reg & 0xfffffffc)); 530 } 531 } 532 } 533 534 static unsigned int snd_ptr_read(struct snd_emu10k1 * emu, 535 unsigned int iobase, 536 unsigned int reg, 537 unsigned int chn) 538 { 539 unsigned long flags; 540 unsigned int regptr, val; 541 542 regptr = (reg << 16) | chn; 543 544 spin_lock_irqsave(&emu->emu_lock, flags); 545 outl(regptr, emu->port + iobase + PTR); 546 val = inl(emu->port + iobase + DATA); 547 spin_unlock_irqrestore(&emu->emu_lock, flags); 548 return val; 549 } 550 551 static void snd_ptr_write(struct snd_emu10k1 *emu, 552 unsigned int iobase, 553 unsigned int reg, 554 unsigned int chn, 555 unsigned int data) 556 { 557 unsigned int regptr; 558 unsigned long flags; 559 560 regptr = (reg << 16) | chn; 561 562 spin_lock_irqsave(&emu->emu_lock, flags); 563 outl(regptr, emu->port + iobase + PTR); 564 outl(data, emu->port + iobase + DATA); 565 spin_unlock_irqrestore(&emu->emu_lock, flags); 566 } 567 568 569 static void snd_emu_proc_ptr_reg_read(struct snd_info_entry *entry, 570 struct snd_info_buffer *buffer, int iobase, int offset, int length, int voices) 571 { 572 struct snd_emu10k1 *emu = entry->private_data; 573 unsigned long value; 574 int i,j; 575 if (offset+length > 0xa0) { 576 snd_iprintf(buffer, "Input values out of range\n"); 577 return; 578 } 579 snd_iprintf(buffer, "Registers 0x%x\n", iobase); 580 for(i = offset; i < offset+length; i++) { 581 snd_iprintf(buffer, "%02X: ",i); 582 for (j = 0; j < voices; j++) { 583 value = snd_ptr_read(emu, iobase, i, j); 584 snd_iprintf(buffer, "%08lX ", value); 585 } 586 snd_iprintf(buffer, "\n"); 587 } 588 } 589 590 static void snd_emu_proc_ptr_reg_write(struct snd_info_entry *entry, 591 struct snd_info_buffer *buffer, 592 int iobase, int length, int voices) 593 { 594 struct snd_emu10k1 *emu = entry->private_data; 595 char line[64]; 596 unsigned int reg, channel_id , val; 597 while (!snd_info_get_line(buffer, line, sizeof(line))) { 598 if (sscanf(line, "%x %x %x", ®, &channel_id, &val) != 3) 599 continue; 600 if (reg < length && channel_id < voices) 601 snd_ptr_write(emu, iobase, reg, channel_id, val); 602 } 603 } 604 605 static void snd_emu_proc_ptr_reg_write00(struct snd_info_entry *entry, 606 struct snd_info_buffer *buffer) 607 { 608 snd_emu_proc_ptr_reg_write(entry, buffer, 0, 0x80, 64); 609 } 610 611 static void snd_emu_proc_ptr_reg_write20(struct snd_info_entry *entry, 612 struct snd_info_buffer *buffer) 613 { 614 struct snd_emu10k1 *emu = entry->private_data; 615 snd_emu_proc_ptr_reg_write(entry, buffer, 0x20, 616 emu->card_capabilities->ca0108_chip ? 0xa0 : 0x80, 4); 617 } 618 619 620 static void snd_emu_proc_ptr_reg_read00a(struct snd_info_entry *entry, 621 struct snd_info_buffer *buffer) 622 { 623 snd_emu_proc_ptr_reg_read(entry, buffer, 0, 0, 0x40, 64); 624 } 625 626 static void snd_emu_proc_ptr_reg_read00b(struct snd_info_entry *entry, 627 struct snd_info_buffer *buffer) 628 { 629 snd_emu_proc_ptr_reg_read(entry, buffer, 0, 0x40, 0x40, 64); 630 } 631 632 static void snd_emu_proc_ptr_reg_read20a(struct snd_info_entry *entry, 633 struct snd_info_buffer *buffer) 634 { 635 snd_emu_proc_ptr_reg_read(entry, buffer, 0x20, 0, 0x40, 4); 636 } 637 638 static void snd_emu_proc_ptr_reg_read20b(struct snd_info_entry *entry, 639 struct snd_info_buffer *buffer) 640 { 641 snd_emu_proc_ptr_reg_read(entry, buffer, 0x20, 0x40, 0x40, 4); 642 } 643 644 static void snd_emu_proc_ptr_reg_read20c(struct snd_info_entry *entry, 645 struct snd_info_buffer * buffer) 646 { 647 snd_emu_proc_ptr_reg_read(entry, buffer, 0x20, 0x80, 0x20, 4); 648 } 649 #endif 650 651 static const struct snd_info_entry_ops snd_emu10k1_proc_ops_fx8010 = { 652 .read = snd_emu10k1_fx8010_read, 653 }; 654 655 int snd_emu10k1_proc_init(struct snd_emu10k1 *emu) 656 { 657 struct snd_info_entry *entry; 658 #ifdef CONFIG_SND_DEBUG 659 if (emu->card_capabilities->emu_model) { 660 snd_card_ro_proc_new(emu->card, "emu1010_regs", 661 emu, snd_emu_proc_emu1010_reg_read); 662 } 663 snd_card_rw_proc_new(emu->card, "io_regs", emu, 664 snd_emu_proc_io_reg_read, 665 snd_emu_proc_io_reg_write); 666 snd_card_rw_proc_new(emu->card, "ptr_regs00a", emu, 667 snd_emu_proc_ptr_reg_read00a, 668 snd_emu_proc_ptr_reg_write00); 669 snd_card_rw_proc_new(emu->card, "ptr_regs00b", emu, 670 snd_emu_proc_ptr_reg_read00b, 671 snd_emu_proc_ptr_reg_write00); 672 if (!emu->card_capabilities->emu_model && 673 (emu->card_capabilities->ca0151_chip || emu->card_capabilities->ca0108_chip)) { 674 snd_card_rw_proc_new(emu->card, "ptr_regs20a", emu, 675 snd_emu_proc_ptr_reg_read20a, 676 snd_emu_proc_ptr_reg_write20); 677 snd_card_rw_proc_new(emu->card, "ptr_regs20b", emu, 678 snd_emu_proc_ptr_reg_read20b, 679 snd_emu_proc_ptr_reg_write20); 680 if (emu->card_capabilities->ca0108_chip) 681 snd_card_rw_proc_new(emu->card, "ptr_regs20c", emu, 682 snd_emu_proc_ptr_reg_read20c, 683 snd_emu_proc_ptr_reg_write20); 684 } 685 #endif 686 687 snd_card_ro_proc_new(emu->card, "emu10k1", emu, snd_emu10k1_proc_read); 688 689 if (emu->card_capabilities->emu10k2_chip) 690 snd_card_ro_proc_new(emu->card, "spdif-in", emu, 691 snd_emu10k1_proc_spdif_read); 692 if (emu->card_capabilities->ca0151_chip) 693 snd_card_ro_proc_new(emu->card, "capture-rates", emu, 694 snd_emu10k1_proc_rates_read); 695 696 snd_card_ro_proc_new(emu->card, "voices", emu, 697 snd_emu10k1_proc_voices_read); 698 699 if (! snd_card_proc_new(emu->card, "fx8010_gpr", &entry)) { 700 entry->content = SNDRV_INFO_CONTENT_DATA; 701 entry->private_data = emu; 702 entry->mode = S_IFREG | 0444 /*| S_IWUSR*/; 703 entry->size = emu->audigy ? A_TOTAL_SIZE_GPR : TOTAL_SIZE_GPR; 704 entry->c.ops = &snd_emu10k1_proc_ops_fx8010; 705 } 706 if (! snd_card_proc_new(emu->card, "fx8010_tram_data", &entry)) { 707 entry->content = SNDRV_INFO_CONTENT_DATA; 708 entry->private_data = emu; 709 entry->mode = S_IFREG | 0444 /*| S_IWUSR*/; 710 entry->size = emu->audigy ? A_TOTAL_SIZE_TANKMEM_DATA : TOTAL_SIZE_TANKMEM_DATA ; 711 entry->c.ops = &snd_emu10k1_proc_ops_fx8010; 712 } 713 if (! snd_card_proc_new(emu->card, "fx8010_tram_addr", &entry)) { 714 entry->content = SNDRV_INFO_CONTENT_DATA; 715 entry->private_data = emu; 716 entry->mode = S_IFREG | 0444 /*| S_IWUSR*/; 717 entry->size = emu->audigy ? A_TOTAL_SIZE_TANKMEM_ADDR : TOTAL_SIZE_TANKMEM_ADDR ; 718 entry->c.ops = &snd_emu10k1_proc_ops_fx8010; 719 } 720 if (! snd_card_proc_new(emu->card, "fx8010_code", &entry)) { 721 entry->content = SNDRV_INFO_CONTENT_DATA; 722 entry->private_data = emu; 723 entry->mode = S_IFREG | 0444 /*| S_IWUSR*/; 724 entry->size = emu->audigy ? A_TOTAL_SIZE_CODE : TOTAL_SIZE_CODE; 725 entry->c.ops = &snd_emu10k1_proc_ops_fx8010; 726 } 727 snd_card_ro_proc_new(emu->card, "fx8010_acode", emu, 728 snd_emu10k1_proc_acode_read); 729 return 0; 730 } 731