1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com> 4 * Driver EMU10K1X chips 5 * 6 * Parts of this code were adapted from audigyls.c driver which is 7 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk> 8 * 9 * BUGS: 10 * -- 11 * 12 * TODO: 13 * 14 * Chips (SB0200 model): 15 * - EMU10K1X-DBQ 16 * - STAC 9708T 17 */ 18 #include <linux/init.h> 19 #include <linux/interrupt.h> 20 #include <linux/pci.h> 21 #include <linux/dma-mapping.h> 22 #include <linux/slab.h> 23 #include <linux/module.h> 24 #include <sound/core.h> 25 #include <sound/initval.h> 26 #include <sound/pcm.h> 27 #include <sound/ac97_codec.h> 28 #include <sound/info.h> 29 #include <sound/rawmidi.h> 30 31 MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>"); 32 MODULE_DESCRIPTION("EMU10K1X"); 33 MODULE_LICENSE("GPL"); 34 35 // module parameters (see "Module Parameters") 36 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; 37 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; 38 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; 39 40 module_param_array(index, int, NULL, 0444); 41 MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard."); 42 module_param_array(id, charp, NULL, 0444); 43 MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard."); 44 module_param_array(enable, bool, NULL, 0444); 45 MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard."); 46 47 48 // some definitions were borrowed from emu10k1 driver as they seem to be the same 49 /************************************************************************************************/ 50 /* PCI function 0 registers, address = <val> + PCIBASE0 */ 51 /************************************************************************************************/ 52 53 #define PTR 0x00 /* Indexed register set pointer register */ 54 /* NOTE: The CHANNELNUM and ADDRESS words can */ 55 /* be modified independently of each other. */ 56 57 #define DATA 0x04 /* Indexed register set data register */ 58 59 #define IPR 0x08 /* Global interrupt pending register */ 60 /* Clear pending interrupts by writing a 1 to */ 61 /* the relevant bits and zero to the other bits */ 62 #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */ 63 #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */ 64 #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */ 65 #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ 66 #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */ 67 #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ 68 69 #define INTE 0x0c /* Interrupt enable register */ 70 #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */ 71 #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */ 72 #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */ 73 #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */ 74 #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */ 75 #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */ 76 77 #define HCFG 0x14 /* Hardware config register */ 78 79 #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */ 80 /* NOTE: This should generally never be used. */ 81 #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */ 82 /* Should be set to 1 when the EMU10K1 is */ 83 /* completely initialized. */ 84 #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */ 85 86 87 #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */ 88 89 #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */ 90 91 /********************************************************************************************************/ 92 /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */ 93 /********************************************************************************************************/ 94 #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */ 95 /* One list entry: 4 bytes for DMA address, 96 * 4 bytes for period_size << 16. 97 * One list entry is 8 bytes long. 98 * One list entry for each period in the buffer. 99 */ 100 #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */ 101 #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */ 102 #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA address */ 103 #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */ 104 #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */ 105 #define PLAYBACK_UNKNOWN1 0x07 106 #define PLAYBACK_UNKNOWN2 0x08 107 108 /* Only one capture channel supported */ 109 #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */ 110 #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */ 111 #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */ 112 #define CAPTURE_UNKNOWN 0x13 113 114 /* From 0x20 - 0x3f, last samples played on each channel */ 115 116 #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */ 117 #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */ 118 #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */ 119 #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */ 120 #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */ 121 122 #define ROUTING 0x41 /* Setup sound routing ? */ 123 #define ROUTING_FRONT_LEFT 0x00000001 124 #define ROUTING_FRONT_RIGHT 0x00000002 125 #define ROUTING_REAR_LEFT 0x00000004 126 #define ROUTING_REAR_RIGHT 0x00000008 127 #define ROUTING_CENTER_LFE 0x00010000 128 129 #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */ 130 131 #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */ 132 133 #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */ 134 135 #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */ 136 #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */ 137 #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */ 138 #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */ 139 #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */ 140 #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */ 141 #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */ 142 #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */ 143 #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */ 144 #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */ 145 #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */ 146 #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */ 147 #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */ 148 #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */ 149 #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */ 150 #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */ 151 #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */ 152 #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */ 153 #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */ 154 #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */ 155 #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */ 156 #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */ 157 #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */ 158 159 #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */ 160 161 /* This is the MPU port on the card */ 162 #define MUDATA 0x47 163 #define MUCMD 0x48 164 #define MUSTAT MUCMD 165 166 /* From 0x50 - 0x5f, last samples captured */ 167 168 /* 169 * The hardware has 3 channels for playback and 1 for capture. 170 * - channel 0 is the front channel 171 * - channel 1 is the rear channel 172 * - channel 2 is the center/lfe channel 173 * Volume is controlled by the AC97 for the front and rear channels by 174 * the PCM Playback Volume, Sigmatel Surround Playback Volume and 175 * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects 176 * the front/rear channel mixing in the REAR OUT jack. When using the 177 * 4-Speaker Stereo, both front and rear channels will be mixed in the 178 * REAR OUT. 179 * The center/lfe channel has no volume control and cannot be muted during 180 * playback. 181 */ 182 183 struct emu10k1x_voice { 184 struct emu10k1x *emu; 185 int number; 186 int use; 187 188 struct emu10k1x_pcm *epcm; 189 }; 190 191 struct emu10k1x_pcm { 192 struct emu10k1x *emu; 193 struct snd_pcm_substream *substream; 194 struct emu10k1x_voice *voice; 195 unsigned short running; 196 }; 197 198 struct emu10k1x_midi { 199 struct emu10k1x *emu; 200 struct snd_rawmidi *rmidi; 201 struct snd_rawmidi_substream *substream_input; 202 struct snd_rawmidi_substream *substream_output; 203 unsigned int midi_mode; 204 spinlock_t input_lock; 205 spinlock_t output_lock; 206 spinlock_t open_lock; 207 int tx_enable, rx_enable; 208 int port; 209 int ipr_tx, ipr_rx; 210 void (*interrupt)(struct emu10k1x *emu, unsigned int status); 211 }; 212 213 // definition of the chip-specific record 214 struct emu10k1x { 215 struct snd_card *card; 216 struct pci_dev *pci; 217 218 unsigned long port; 219 int irq; 220 221 unsigned char revision; /* chip revision */ 222 unsigned int serial; /* serial number */ 223 unsigned short model; /* subsystem id */ 224 225 spinlock_t emu_lock; 226 spinlock_t voice_lock; 227 228 struct snd_ac97 *ac97; 229 struct snd_pcm *pcm; 230 231 struct emu10k1x_voice voices[3]; 232 struct emu10k1x_voice capture_voice; 233 u32 spdif_bits[3]; // SPDIF out setup 234 235 struct snd_dma_buffer *dma_buffer; 236 237 struct emu10k1x_midi midi; 238 }; 239 240 /* hardware definition */ 241 static const struct snd_pcm_hardware snd_emu10k1x_playback_hw = { 242 .info = (SNDRV_PCM_INFO_MMAP | 243 SNDRV_PCM_INFO_INTERLEAVED | 244 SNDRV_PCM_INFO_BLOCK_TRANSFER | 245 SNDRV_PCM_INFO_MMAP_VALID), 246 .formats = SNDRV_PCM_FMTBIT_S16_LE, 247 .rates = SNDRV_PCM_RATE_48000, 248 .rate_min = 48000, 249 .rate_max = 48000, 250 .channels_min = 2, 251 .channels_max = 2, 252 .buffer_bytes_max = (32*1024), 253 .period_bytes_min = 64, 254 .period_bytes_max = (16*1024), 255 .periods_min = 2, 256 .periods_max = 8, 257 .fifo_size = 0, 258 }; 259 260 static const struct snd_pcm_hardware snd_emu10k1x_capture_hw = { 261 .info = (SNDRV_PCM_INFO_MMAP | 262 SNDRV_PCM_INFO_INTERLEAVED | 263 SNDRV_PCM_INFO_BLOCK_TRANSFER | 264 SNDRV_PCM_INFO_MMAP_VALID), 265 .formats = SNDRV_PCM_FMTBIT_S16_LE, 266 .rates = SNDRV_PCM_RATE_48000, 267 .rate_min = 48000, 268 .rate_max = 48000, 269 .channels_min = 2, 270 .channels_max = 2, 271 .buffer_bytes_max = (32*1024), 272 .period_bytes_min = 64, 273 .period_bytes_max = (16*1024), 274 .periods_min = 2, 275 .periods_max = 2, 276 .fifo_size = 0, 277 }; 278 279 static unsigned int snd_emu10k1x_ptr_read(struct emu10k1x * emu, 280 unsigned int reg, 281 unsigned int chn) 282 { 283 unsigned long flags; 284 unsigned int regptr, val; 285 286 regptr = (reg << 16) | chn; 287 288 spin_lock_irqsave(&emu->emu_lock, flags); 289 outl(regptr, emu->port + PTR); 290 val = inl(emu->port + DATA); 291 spin_unlock_irqrestore(&emu->emu_lock, flags); 292 return val; 293 } 294 295 static void snd_emu10k1x_ptr_write(struct emu10k1x *emu, 296 unsigned int reg, 297 unsigned int chn, 298 unsigned int data) 299 { 300 unsigned int regptr; 301 unsigned long flags; 302 303 regptr = (reg << 16) | chn; 304 305 spin_lock_irqsave(&emu->emu_lock, flags); 306 outl(regptr, emu->port + PTR); 307 outl(data, emu->port + DATA); 308 spin_unlock_irqrestore(&emu->emu_lock, flags); 309 } 310 311 static void snd_emu10k1x_intr_enable(struct emu10k1x *emu, unsigned int intrenb) 312 { 313 unsigned long flags; 314 unsigned int intr_enable; 315 316 spin_lock_irqsave(&emu->emu_lock, flags); 317 intr_enable = inl(emu->port + INTE) | intrenb; 318 outl(intr_enable, emu->port + INTE); 319 spin_unlock_irqrestore(&emu->emu_lock, flags); 320 } 321 322 static void snd_emu10k1x_intr_disable(struct emu10k1x *emu, unsigned int intrenb) 323 { 324 unsigned long flags; 325 unsigned int intr_enable; 326 327 spin_lock_irqsave(&emu->emu_lock, flags); 328 intr_enable = inl(emu->port + INTE) & ~intrenb; 329 outl(intr_enable, emu->port + INTE); 330 spin_unlock_irqrestore(&emu->emu_lock, flags); 331 } 332 333 static void snd_emu10k1x_gpio_write(struct emu10k1x *emu, unsigned int value) 334 { 335 unsigned long flags; 336 337 spin_lock_irqsave(&emu->emu_lock, flags); 338 outl(value, emu->port + GPIO); 339 spin_unlock_irqrestore(&emu->emu_lock, flags); 340 } 341 342 static void snd_emu10k1x_pcm_free_substream(struct snd_pcm_runtime *runtime) 343 { 344 kfree(runtime->private_data); 345 } 346 347 static void snd_emu10k1x_pcm_interrupt(struct emu10k1x *emu, struct emu10k1x_voice *voice) 348 { 349 struct emu10k1x_pcm *epcm; 350 351 epcm = voice->epcm; 352 if (!epcm) 353 return; 354 if (epcm->substream == NULL) 355 return; 356 #if 0 357 dev_info(emu->card->dev, 358 "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n", 359 epcm->substream->ops->pointer(epcm->substream), 360 snd_pcm_lib_period_bytes(epcm->substream), 361 snd_pcm_lib_buffer_bytes(epcm->substream)); 362 #endif 363 snd_pcm_period_elapsed(epcm->substream); 364 } 365 366 /* open callback */ 367 static int snd_emu10k1x_playback_open(struct snd_pcm_substream *substream) 368 { 369 struct emu10k1x *chip = snd_pcm_substream_chip(substream); 370 struct emu10k1x_pcm *epcm; 371 struct snd_pcm_runtime *runtime = substream->runtime; 372 int err; 373 374 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 375 if (err < 0) 376 return err; 377 err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64); 378 if (err < 0) 379 return err; 380 381 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL); 382 if (epcm == NULL) 383 return -ENOMEM; 384 epcm->emu = chip; 385 epcm->substream = substream; 386 387 runtime->private_data = epcm; 388 runtime->private_free = snd_emu10k1x_pcm_free_substream; 389 390 runtime->hw = snd_emu10k1x_playback_hw; 391 392 return 0; 393 } 394 395 /* close callback */ 396 static int snd_emu10k1x_playback_close(struct snd_pcm_substream *substream) 397 { 398 return 0; 399 } 400 401 /* hw_params callback */ 402 static int snd_emu10k1x_pcm_hw_params(struct snd_pcm_substream *substream, 403 struct snd_pcm_hw_params *hw_params) 404 { 405 struct snd_pcm_runtime *runtime = substream->runtime; 406 struct emu10k1x_pcm *epcm = runtime->private_data; 407 408 if (! epcm->voice) { 409 epcm->voice = &epcm->emu->voices[substream->pcm->device]; 410 epcm->voice->use = 1; 411 epcm->voice->epcm = epcm; 412 } 413 414 return 0; 415 } 416 417 /* hw_free callback */ 418 static int snd_emu10k1x_pcm_hw_free(struct snd_pcm_substream *substream) 419 { 420 struct snd_pcm_runtime *runtime = substream->runtime; 421 struct emu10k1x_pcm *epcm; 422 423 if (runtime->private_data == NULL) 424 return 0; 425 426 epcm = runtime->private_data; 427 428 if (epcm->voice) { 429 epcm->voice->use = 0; 430 epcm->voice->epcm = NULL; 431 epcm->voice = NULL; 432 } 433 434 return 0; 435 } 436 437 /* prepare callback */ 438 static int snd_emu10k1x_pcm_prepare(struct snd_pcm_substream *substream) 439 { 440 struct emu10k1x *emu = snd_pcm_substream_chip(substream); 441 struct snd_pcm_runtime *runtime = substream->runtime; 442 struct emu10k1x_pcm *epcm = runtime->private_data; 443 int voice = epcm->voice->number; 444 u32 *table_base = (u32 *)(emu->dma_buffer->area+1024*voice); 445 u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size); 446 int i; 447 448 for(i = 0; i < runtime->periods; i++) { 449 *table_base++=runtime->dma_addr+(i*period_size_bytes); 450 *table_base++=period_size_bytes<<16; 451 } 452 453 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer->addr+1024*voice); 454 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19); 455 snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0); 456 snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0); 457 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0); 458 snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0); 459 snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr); 460 461 snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16); 462 463 return 0; 464 } 465 466 /* trigger callback */ 467 static int snd_emu10k1x_pcm_trigger(struct snd_pcm_substream *substream, 468 int cmd) 469 { 470 struct emu10k1x *emu = snd_pcm_substream_chip(substream); 471 struct snd_pcm_runtime *runtime = substream->runtime; 472 struct emu10k1x_pcm *epcm = runtime->private_data; 473 int channel = epcm->voice->number; 474 int result = 0; 475 476 /* 477 dev_dbg(emu->card->dev, 478 "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", 479 (int)emu, cmd, (int)substream->ops->pointer(substream)); 480 */ 481 482 switch (cmd) { 483 case SNDRV_PCM_TRIGGER_START: 484 if(runtime->periods == 2) 485 snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel); 486 else 487 snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel); 488 epcm->running = 1; 489 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel)); 490 break; 491 case SNDRV_PCM_TRIGGER_STOP: 492 epcm->running = 0; 493 snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel); 494 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel)); 495 break; 496 default: 497 result = -EINVAL; 498 break; 499 } 500 return result; 501 } 502 503 /* pointer callback */ 504 static snd_pcm_uframes_t 505 snd_emu10k1x_pcm_pointer(struct snd_pcm_substream *substream) 506 { 507 struct emu10k1x *emu = snd_pcm_substream_chip(substream); 508 struct snd_pcm_runtime *runtime = substream->runtime; 509 struct emu10k1x_pcm *epcm = runtime->private_data; 510 int channel = epcm->voice->number; 511 snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0; 512 513 if (!epcm->running) 514 return 0; 515 516 ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel); 517 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel); 518 ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel); 519 520 if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size)) 521 return 0; 522 523 if (ptr3 != ptr4) 524 ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel); 525 ptr2 = bytes_to_frames(runtime, ptr1); 526 ptr2 += (ptr4 >> 3) * runtime->period_size; 527 ptr = ptr2; 528 529 if (ptr >= runtime->buffer_size) 530 ptr -= runtime->buffer_size; 531 532 return ptr; 533 } 534 535 /* operators */ 536 static const struct snd_pcm_ops snd_emu10k1x_playback_ops = { 537 .open = snd_emu10k1x_playback_open, 538 .close = snd_emu10k1x_playback_close, 539 .hw_params = snd_emu10k1x_pcm_hw_params, 540 .hw_free = snd_emu10k1x_pcm_hw_free, 541 .prepare = snd_emu10k1x_pcm_prepare, 542 .trigger = snd_emu10k1x_pcm_trigger, 543 .pointer = snd_emu10k1x_pcm_pointer, 544 }; 545 546 /* open_capture callback */ 547 static int snd_emu10k1x_pcm_open_capture(struct snd_pcm_substream *substream) 548 { 549 struct emu10k1x *chip = snd_pcm_substream_chip(substream); 550 struct emu10k1x_pcm *epcm; 551 struct snd_pcm_runtime *runtime = substream->runtime; 552 int err; 553 554 err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 555 if (err < 0) 556 return err; 557 err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64); 558 if (err < 0) 559 return err; 560 561 epcm = kzalloc(sizeof(*epcm), GFP_KERNEL); 562 if (epcm == NULL) 563 return -ENOMEM; 564 565 epcm->emu = chip; 566 epcm->substream = substream; 567 568 runtime->private_data = epcm; 569 runtime->private_free = snd_emu10k1x_pcm_free_substream; 570 571 runtime->hw = snd_emu10k1x_capture_hw; 572 573 return 0; 574 } 575 576 /* close callback */ 577 static int snd_emu10k1x_pcm_close_capture(struct snd_pcm_substream *substream) 578 { 579 return 0; 580 } 581 582 /* hw_params callback */ 583 static int snd_emu10k1x_pcm_hw_params_capture(struct snd_pcm_substream *substream, 584 struct snd_pcm_hw_params *hw_params) 585 { 586 struct snd_pcm_runtime *runtime = substream->runtime; 587 struct emu10k1x_pcm *epcm = runtime->private_data; 588 589 if (! epcm->voice) { 590 if (epcm->emu->capture_voice.use) 591 return -EBUSY; 592 epcm->voice = &epcm->emu->capture_voice; 593 epcm->voice->epcm = epcm; 594 epcm->voice->use = 1; 595 } 596 597 return 0; 598 } 599 600 /* hw_free callback */ 601 static int snd_emu10k1x_pcm_hw_free_capture(struct snd_pcm_substream *substream) 602 { 603 struct snd_pcm_runtime *runtime = substream->runtime; 604 605 struct emu10k1x_pcm *epcm; 606 607 if (runtime->private_data == NULL) 608 return 0; 609 epcm = runtime->private_data; 610 611 if (epcm->voice) { 612 epcm->voice->use = 0; 613 epcm->voice->epcm = NULL; 614 epcm->voice = NULL; 615 } 616 617 return 0; 618 } 619 620 /* prepare capture callback */ 621 static int snd_emu10k1x_pcm_prepare_capture(struct snd_pcm_substream *substream) 622 { 623 struct emu10k1x *emu = snd_pcm_substream_chip(substream); 624 struct snd_pcm_runtime *runtime = substream->runtime; 625 626 snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr); 627 snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes 628 snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0); 629 snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0); 630 631 return 0; 632 } 633 634 /* trigger_capture callback */ 635 static int snd_emu10k1x_pcm_trigger_capture(struct snd_pcm_substream *substream, 636 int cmd) 637 { 638 struct emu10k1x *emu = snd_pcm_substream_chip(substream); 639 struct snd_pcm_runtime *runtime = substream->runtime; 640 struct emu10k1x_pcm *epcm = runtime->private_data; 641 int result = 0; 642 643 switch (cmd) { 644 case SNDRV_PCM_TRIGGER_START: 645 snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP | 646 INTE_CAP_0_HALF_LOOP); 647 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE); 648 epcm->running = 1; 649 break; 650 case SNDRV_PCM_TRIGGER_STOP: 651 epcm->running = 0; 652 snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP | 653 INTE_CAP_0_HALF_LOOP); 654 snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE)); 655 break; 656 default: 657 result = -EINVAL; 658 break; 659 } 660 return result; 661 } 662 663 /* pointer_capture callback */ 664 static snd_pcm_uframes_t 665 snd_emu10k1x_pcm_pointer_capture(struct snd_pcm_substream *substream) 666 { 667 struct emu10k1x *emu = snd_pcm_substream_chip(substream); 668 struct snd_pcm_runtime *runtime = substream->runtime; 669 struct emu10k1x_pcm *epcm = runtime->private_data; 670 snd_pcm_uframes_t ptr; 671 672 if (!epcm->running) 673 return 0; 674 675 ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0)); 676 if (ptr >= runtime->buffer_size) 677 ptr -= runtime->buffer_size; 678 679 return ptr; 680 } 681 682 static const struct snd_pcm_ops snd_emu10k1x_capture_ops = { 683 .open = snd_emu10k1x_pcm_open_capture, 684 .close = snd_emu10k1x_pcm_close_capture, 685 .hw_params = snd_emu10k1x_pcm_hw_params_capture, 686 .hw_free = snd_emu10k1x_pcm_hw_free_capture, 687 .prepare = snd_emu10k1x_pcm_prepare_capture, 688 .trigger = snd_emu10k1x_pcm_trigger_capture, 689 .pointer = snd_emu10k1x_pcm_pointer_capture, 690 }; 691 692 static unsigned short snd_emu10k1x_ac97_read(struct snd_ac97 *ac97, 693 unsigned short reg) 694 { 695 struct emu10k1x *emu = ac97->private_data; 696 unsigned long flags; 697 unsigned short val; 698 699 spin_lock_irqsave(&emu->emu_lock, flags); 700 outb(reg, emu->port + AC97ADDRESS); 701 val = inw(emu->port + AC97DATA); 702 spin_unlock_irqrestore(&emu->emu_lock, flags); 703 return val; 704 } 705 706 static void snd_emu10k1x_ac97_write(struct snd_ac97 *ac97, 707 unsigned short reg, unsigned short val) 708 { 709 struct emu10k1x *emu = ac97->private_data; 710 unsigned long flags; 711 712 spin_lock_irqsave(&emu->emu_lock, flags); 713 outb(reg, emu->port + AC97ADDRESS); 714 outw(val, emu->port + AC97DATA); 715 spin_unlock_irqrestore(&emu->emu_lock, flags); 716 } 717 718 static int snd_emu10k1x_ac97(struct emu10k1x *chip) 719 { 720 struct snd_ac97_bus *pbus; 721 struct snd_ac97_template ac97; 722 int err; 723 static const struct snd_ac97_bus_ops ops = { 724 .write = snd_emu10k1x_ac97_write, 725 .read = snd_emu10k1x_ac97_read, 726 }; 727 728 err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus); 729 if (err < 0) 730 return err; 731 pbus->no_vra = 1; /* we don't need VRA */ 732 733 memset(&ac97, 0, sizeof(ac97)); 734 ac97.private_data = chip; 735 ac97.scaps = AC97_SCAP_NO_SPDIF; 736 return snd_ac97_mixer(pbus, &ac97, &chip->ac97); 737 } 738 739 static void snd_emu10k1x_free(struct snd_card *card) 740 { 741 struct emu10k1x *chip = card->private_data; 742 743 snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0); 744 // disable interrupts 745 outl(0, chip->port + INTE); 746 // disable audio 747 outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); 748 } 749 750 static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id) 751 { 752 unsigned int status; 753 754 struct emu10k1x *chip = dev_id; 755 struct emu10k1x_voice *pvoice = chip->voices; 756 int i; 757 int mask; 758 759 status = inl(chip->port + IPR); 760 761 if (! status) 762 return IRQ_NONE; 763 764 // capture interrupt 765 if (status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) { 766 struct emu10k1x_voice *cap_voice = &chip->capture_voice; 767 if (cap_voice->use) 768 snd_emu10k1x_pcm_interrupt(chip, cap_voice); 769 else 770 snd_emu10k1x_intr_disable(chip, 771 INTE_CAP_0_LOOP | 772 INTE_CAP_0_HALF_LOOP); 773 } 774 775 mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP; 776 for (i = 0; i < 3; i++) { 777 if (status & mask) { 778 if (pvoice->use) 779 snd_emu10k1x_pcm_interrupt(chip, pvoice); 780 else 781 snd_emu10k1x_intr_disable(chip, mask); 782 } 783 pvoice++; 784 mask <<= 1; 785 } 786 787 if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) { 788 if (chip->midi.interrupt) 789 chip->midi.interrupt(chip, status); 790 else 791 snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE); 792 } 793 794 // acknowledge the interrupt if necessary 795 outl(status, chip->port + IPR); 796 797 /* dev_dbg(chip->card->dev, "interrupt %08x\n", status); */ 798 return IRQ_HANDLED; 799 } 800 801 static const struct snd_pcm_chmap_elem surround_map[] = { 802 { .channels = 2, 803 .map = { SNDRV_CHMAP_RL, SNDRV_CHMAP_RR } }, 804 { } 805 }; 806 807 static const struct snd_pcm_chmap_elem clfe_map[] = { 808 { .channels = 2, 809 .map = { SNDRV_CHMAP_FC, SNDRV_CHMAP_LFE } }, 810 { } 811 }; 812 813 static int snd_emu10k1x_pcm(struct emu10k1x *emu, int device) 814 { 815 struct snd_pcm *pcm; 816 const struct snd_pcm_chmap_elem *map = NULL; 817 int err; 818 int capture = 0; 819 820 if (device == 0) 821 capture = 1; 822 823 err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm); 824 if (err < 0) 825 return err; 826 827 pcm->private_data = emu; 828 829 switch(device) { 830 case 0: 831 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops); 832 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops); 833 break; 834 case 1: 835 case 2: 836 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops); 837 break; 838 } 839 840 pcm->info_flags = 0; 841 switch(device) { 842 case 0: 843 strcpy(pcm->name, "EMU10K1X Front"); 844 map = snd_pcm_std_chmaps; 845 break; 846 case 1: 847 strcpy(pcm->name, "EMU10K1X Rear"); 848 map = surround_map; 849 break; 850 case 2: 851 strcpy(pcm->name, "EMU10K1X Center/LFE"); 852 map = clfe_map; 853 break; 854 } 855 emu->pcm = pcm; 856 857 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 858 &emu->pci->dev, 32*1024, 32*1024); 859 860 return snd_pcm_add_chmap_ctls(pcm, SNDRV_PCM_STREAM_PLAYBACK, map, 2, 861 1 << 2, NULL); 862 } 863 864 static int snd_emu10k1x_create(struct snd_card *card, 865 struct pci_dev *pci) 866 { 867 struct emu10k1x *chip = card->private_data; 868 int err; 869 int ch; 870 871 err = pcim_enable_device(pci); 872 if (err < 0) 873 return err; 874 875 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(28)) < 0) { 876 dev_err(card->dev, "error to set 28bit mask DMA\n"); 877 return -ENXIO; 878 } 879 880 chip->card = card; 881 chip->pci = pci; 882 chip->irq = -1; 883 884 spin_lock_init(&chip->emu_lock); 885 spin_lock_init(&chip->voice_lock); 886 887 err = pci_request_regions(pci, "EMU10K1X"); 888 if (err < 0) 889 return err; 890 chip->port = pci_resource_start(pci, 0); 891 892 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1x_interrupt, 893 IRQF_SHARED, KBUILD_MODNAME, chip)) { 894 dev_err(card->dev, "cannot grab irq %d\n", pci->irq); 895 return -EBUSY; 896 } 897 chip->irq = pci->irq; 898 card->sync_irq = chip->irq; 899 card->private_free = snd_emu10k1x_free; 900 901 chip->dma_buffer = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, 902 4 * 1024); 903 if (!chip->dma_buffer) 904 return -ENOMEM; 905 906 pci_set_master(pci); 907 /* read revision & serial */ 908 chip->revision = pci->revision; 909 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial); 910 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model); 911 dev_info(card->dev, "Model %04x Rev %08x Serial %08x\n", chip->model, 912 chip->revision, chip->serial); 913 914 outl(0, chip->port + INTE); 915 916 for(ch = 0; ch < 3; ch++) { 917 chip->voices[ch].emu = chip; 918 chip->voices[ch].number = ch; 919 } 920 921 /* 922 * Init to 0x02109204 : 923 * Clock accuracy = 0 (1000ppm) 924 * Sample Rate = 2 (48kHz) 925 * Audio Channel = 1 (Left of 2) 926 * Source Number = 0 (Unspecified) 927 * Generation Status = 1 (Original for Cat Code 12) 928 * Cat Code = 12 (Digital Signal Mixer) 929 * Mode = 0 (Mode 0) 930 * Emphasis = 0 (None) 931 * CP = 1 (Copyright unasserted) 932 * AN = 0 (Audio data) 933 * P = 0 (Consumer) 934 */ 935 snd_emu10k1x_ptr_write(chip, SPCS0, 0, 936 chip->spdif_bits[0] = 937 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 938 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 939 SPCS_GENERATIONSTATUS | 0x00001200 | 940 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT); 941 snd_emu10k1x_ptr_write(chip, SPCS1, 0, 942 chip->spdif_bits[1] = 943 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 944 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 945 SPCS_GENERATIONSTATUS | 0x00001200 | 946 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT); 947 snd_emu10k1x_ptr_write(chip, SPCS2, 0, 948 chip->spdif_bits[2] = 949 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 950 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 951 SPCS_GENERATIONSTATUS | 0x00001200 | 952 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT); 953 954 snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF 955 snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing 956 snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode 957 958 outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); 959 960 return 0; 961 } 962 963 static void snd_emu10k1x_proc_reg_read(struct snd_info_entry *entry, 964 struct snd_info_buffer *buffer) 965 { 966 struct emu10k1x *emu = entry->private_data; 967 unsigned long value,value1,value2; 968 unsigned long flags; 969 int i; 970 971 snd_iprintf(buffer, "Registers:\n\n"); 972 for(i = 0; i < 0x20; i+=4) { 973 spin_lock_irqsave(&emu->emu_lock, flags); 974 value = inl(emu->port + i); 975 spin_unlock_irqrestore(&emu->emu_lock, flags); 976 snd_iprintf(buffer, "Register %02X: %08lX\n", i, value); 977 } 978 snd_iprintf(buffer, "\nRegisters\n\n"); 979 for(i = 0; i <= 0x48; i++) { 980 value = snd_emu10k1x_ptr_read(emu, i, 0); 981 if(i < 0x10 || (i >= 0x20 && i < 0x40)) { 982 value1 = snd_emu10k1x_ptr_read(emu, i, 1); 983 value2 = snd_emu10k1x_ptr_read(emu, i, 2); 984 snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2); 985 } else { 986 snd_iprintf(buffer, "%02X: %08lX\n", i, value); 987 } 988 } 989 } 990 991 static void snd_emu10k1x_proc_reg_write(struct snd_info_entry *entry, 992 struct snd_info_buffer *buffer) 993 { 994 struct emu10k1x *emu = entry->private_data; 995 char line[64]; 996 unsigned int reg, channel_id , val; 997 998 while (!snd_info_get_line(buffer, line, sizeof(line))) { 999 if (sscanf(line, "%x %x %x", ®, &channel_id, &val) != 3) 1000 continue; 1001 1002 if (reg < 0x49 && channel_id <= 2) 1003 snd_emu10k1x_ptr_write(emu, reg, channel_id, val); 1004 } 1005 } 1006 1007 static int snd_emu10k1x_proc_init(struct emu10k1x *emu) 1008 { 1009 snd_card_rw_proc_new(emu->card, "emu10k1x_regs", emu, 1010 snd_emu10k1x_proc_reg_read, 1011 snd_emu10k1x_proc_reg_write); 1012 return 0; 1013 } 1014 1015 #define snd_emu10k1x_shared_spdif_info snd_ctl_boolean_mono_info 1016 1017 static int snd_emu10k1x_shared_spdif_get(struct snd_kcontrol *kcontrol, 1018 struct snd_ctl_elem_value *ucontrol) 1019 { 1020 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); 1021 1022 ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1; 1023 1024 return 0; 1025 } 1026 1027 static int snd_emu10k1x_shared_spdif_put(struct snd_kcontrol *kcontrol, 1028 struct snd_ctl_elem_value *ucontrol) 1029 { 1030 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); 1031 unsigned int val; 1032 1033 val = ucontrol->value.integer.value[0] ; 1034 1035 if (val) { 1036 // enable spdif output 1037 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000); 1038 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700); 1039 snd_emu10k1x_gpio_write(emu, 0x1000); 1040 } else { 1041 // disable spdif output 1042 snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700); 1043 snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F); 1044 snd_emu10k1x_gpio_write(emu, 0x1080); 1045 } 1046 return 0; 1047 } 1048 1049 static const struct snd_kcontrol_new snd_emu10k1x_shared_spdif = 1050 { 1051 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, 1052 .name = "Analog/Digital Output Jack", 1053 .info = snd_emu10k1x_shared_spdif_info, 1054 .get = snd_emu10k1x_shared_spdif_get, 1055 .put = snd_emu10k1x_shared_spdif_put 1056 }; 1057 1058 static int snd_emu10k1x_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) 1059 { 1060 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; 1061 uinfo->count = 1; 1062 return 0; 1063 } 1064 1065 static int snd_emu10k1x_spdif_get(struct snd_kcontrol *kcontrol, 1066 struct snd_ctl_elem_value *ucontrol) 1067 { 1068 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); 1069 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 1070 1071 ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff; 1072 ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff; 1073 ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff; 1074 ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff; 1075 return 0; 1076 } 1077 1078 static int snd_emu10k1x_spdif_get_mask(struct snd_kcontrol *kcontrol, 1079 struct snd_ctl_elem_value *ucontrol) 1080 { 1081 ucontrol->value.iec958.status[0] = 0xff; 1082 ucontrol->value.iec958.status[1] = 0xff; 1083 ucontrol->value.iec958.status[2] = 0xff; 1084 ucontrol->value.iec958.status[3] = 0xff; 1085 return 0; 1086 } 1087 1088 static int snd_emu10k1x_spdif_put(struct snd_kcontrol *kcontrol, 1089 struct snd_ctl_elem_value *ucontrol) 1090 { 1091 struct emu10k1x *emu = snd_kcontrol_chip(kcontrol); 1092 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); 1093 int change; 1094 unsigned int val; 1095 1096 val = (ucontrol->value.iec958.status[0] << 0) | 1097 (ucontrol->value.iec958.status[1] << 8) | 1098 (ucontrol->value.iec958.status[2] << 16) | 1099 (ucontrol->value.iec958.status[3] << 24); 1100 change = val != emu->spdif_bits[idx]; 1101 if (change) { 1102 snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val); 1103 emu->spdif_bits[idx] = val; 1104 } 1105 return change; 1106 } 1107 1108 static const struct snd_kcontrol_new snd_emu10k1x_spdif_mask_control = 1109 { 1110 .access = SNDRV_CTL_ELEM_ACCESS_READ, 1111 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1112 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), 1113 .count = 3, 1114 .info = snd_emu10k1x_spdif_info, 1115 .get = snd_emu10k1x_spdif_get_mask 1116 }; 1117 1118 static const struct snd_kcontrol_new snd_emu10k1x_spdif_control = 1119 { 1120 .iface = SNDRV_CTL_ELEM_IFACE_PCM, 1121 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), 1122 .count = 3, 1123 .info = snd_emu10k1x_spdif_info, 1124 .get = snd_emu10k1x_spdif_get, 1125 .put = snd_emu10k1x_spdif_put 1126 }; 1127 1128 static int snd_emu10k1x_mixer(struct emu10k1x *emu) 1129 { 1130 int err; 1131 struct snd_kcontrol *kctl; 1132 struct snd_card *card = emu->card; 1133 1134 kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu); 1135 if (!kctl) 1136 return -ENOMEM; 1137 err = snd_ctl_add(card, kctl); 1138 if (err) 1139 return err; 1140 kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu); 1141 if (!kctl) 1142 return -ENOMEM; 1143 err = snd_ctl_add(card, kctl); 1144 if (err) 1145 return err; 1146 kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu); 1147 if (!kctl) 1148 return -ENOMEM; 1149 err = snd_ctl_add(card, kctl); 1150 if (err) 1151 return err; 1152 1153 return 0; 1154 } 1155 1156 #define EMU10K1X_MIDI_MODE_INPUT (1<<0) 1157 #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1) 1158 1159 static inline unsigned char mpu401_read(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int idx) 1160 { 1161 return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0); 1162 } 1163 1164 static inline void mpu401_write(struct emu10k1x *emu, struct emu10k1x_midi *mpu, int data, int idx) 1165 { 1166 snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data); 1167 } 1168 1169 #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0) 1170 #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1) 1171 #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0) 1172 #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1) 1173 1174 #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80)) 1175 #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40)) 1176 1177 #define MPU401_RESET 0xff 1178 #define MPU401_ENTER_UART 0x3f 1179 #define MPU401_ACK 0xfe 1180 1181 static void mpu401_clear_rx(struct emu10k1x *emu, struct emu10k1x_midi *mpu) 1182 { 1183 int timeout = 100000; 1184 for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--) 1185 mpu401_read_data(emu, mpu); 1186 #ifdef CONFIG_SND_DEBUG 1187 if (timeout <= 0) 1188 dev_err(emu->card->dev, 1189 "cmd: clear rx timeout (status = 0x%x)\n", 1190 mpu401_read_stat(emu, mpu)); 1191 #endif 1192 } 1193 1194 /* 1195 1196 */ 1197 1198 static void do_emu10k1x_midi_interrupt(struct emu10k1x *emu, 1199 struct emu10k1x_midi *midi, unsigned int status) 1200 { 1201 unsigned char byte; 1202 1203 if (midi->rmidi == NULL) { 1204 snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable); 1205 return; 1206 } 1207 1208 spin_lock(&midi->input_lock); 1209 if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) { 1210 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) { 1211 mpu401_clear_rx(emu, midi); 1212 } else { 1213 byte = mpu401_read_data(emu, midi); 1214 if (midi->substream_input) 1215 snd_rawmidi_receive(midi->substream_input, &byte, 1); 1216 } 1217 } 1218 spin_unlock(&midi->input_lock); 1219 1220 spin_lock(&midi->output_lock); 1221 if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) { 1222 if (midi->substream_output && 1223 snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) { 1224 mpu401_write_data(emu, midi, byte); 1225 } else { 1226 snd_emu10k1x_intr_disable(emu, midi->tx_enable); 1227 } 1228 } 1229 spin_unlock(&midi->output_lock); 1230 } 1231 1232 static void snd_emu10k1x_midi_interrupt(struct emu10k1x *emu, unsigned int status) 1233 { 1234 do_emu10k1x_midi_interrupt(emu, &emu->midi, status); 1235 } 1236 1237 static int snd_emu10k1x_midi_cmd(struct emu10k1x * emu, 1238 struct emu10k1x_midi *midi, unsigned char cmd, int ack) 1239 { 1240 unsigned long flags; 1241 int timeout, ok; 1242 1243 spin_lock_irqsave(&midi->input_lock, flags); 1244 mpu401_write_data(emu, midi, 0x00); 1245 /* mpu401_clear_rx(emu, midi); */ 1246 1247 mpu401_write_cmd(emu, midi, cmd); 1248 if (ack) { 1249 ok = 0; 1250 timeout = 10000; 1251 while (!ok && timeout-- > 0) { 1252 if (mpu401_input_avail(emu, midi)) { 1253 if (mpu401_read_data(emu, midi) == MPU401_ACK) 1254 ok = 1; 1255 } 1256 } 1257 if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK) 1258 ok = 1; 1259 } else { 1260 ok = 1; 1261 } 1262 spin_unlock_irqrestore(&midi->input_lock, flags); 1263 if (!ok) { 1264 dev_err(emu->card->dev, 1265 "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n", 1266 cmd, emu->port, 1267 mpu401_read_stat(emu, midi), 1268 mpu401_read_data(emu, midi)); 1269 return 1; 1270 } 1271 return 0; 1272 } 1273 1274 static int snd_emu10k1x_midi_input_open(struct snd_rawmidi_substream *substream) 1275 { 1276 struct emu10k1x *emu; 1277 struct emu10k1x_midi *midi = substream->rmidi->private_data; 1278 unsigned long flags; 1279 1280 emu = midi->emu; 1281 if (snd_BUG_ON(!emu)) 1282 return -ENXIO; 1283 spin_lock_irqsave(&midi->open_lock, flags); 1284 midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT; 1285 midi->substream_input = substream; 1286 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) { 1287 spin_unlock_irqrestore(&midi->open_lock, flags); 1288 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1)) 1289 goto error_out; 1290 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1)) 1291 goto error_out; 1292 } else { 1293 spin_unlock_irqrestore(&midi->open_lock, flags); 1294 } 1295 return 0; 1296 1297 error_out: 1298 return -EIO; 1299 } 1300 1301 static int snd_emu10k1x_midi_output_open(struct snd_rawmidi_substream *substream) 1302 { 1303 struct emu10k1x *emu; 1304 struct emu10k1x_midi *midi = substream->rmidi->private_data; 1305 unsigned long flags; 1306 1307 emu = midi->emu; 1308 if (snd_BUG_ON(!emu)) 1309 return -ENXIO; 1310 spin_lock_irqsave(&midi->open_lock, flags); 1311 midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT; 1312 midi->substream_output = substream; 1313 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) { 1314 spin_unlock_irqrestore(&midi->open_lock, flags); 1315 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1)) 1316 goto error_out; 1317 if (snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1)) 1318 goto error_out; 1319 } else { 1320 spin_unlock_irqrestore(&midi->open_lock, flags); 1321 } 1322 return 0; 1323 1324 error_out: 1325 return -EIO; 1326 } 1327 1328 static int snd_emu10k1x_midi_input_close(struct snd_rawmidi_substream *substream) 1329 { 1330 struct emu10k1x *emu; 1331 struct emu10k1x_midi *midi = substream->rmidi->private_data; 1332 unsigned long flags; 1333 int err = 0; 1334 1335 emu = midi->emu; 1336 if (snd_BUG_ON(!emu)) 1337 return -ENXIO; 1338 spin_lock_irqsave(&midi->open_lock, flags); 1339 snd_emu10k1x_intr_disable(emu, midi->rx_enable); 1340 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT; 1341 midi->substream_input = NULL; 1342 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) { 1343 spin_unlock_irqrestore(&midi->open_lock, flags); 1344 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0); 1345 } else { 1346 spin_unlock_irqrestore(&midi->open_lock, flags); 1347 } 1348 return err; 1349 } 1350 1351 static int snd_emu10k1x_midi_output_close(struct snd_rawmidi_substream *substream) 1352 { 1353 struct emu10k1x *emu; 1354 struct emu10k1x_midi *midi = substream->rmidi->private_data; 1355 unsigned long flags; 1356 int err = 0; 1357 1358 emu = midi->emu; 1359 if (snd_BUG_ON(!emu)) 1360 return -ENXIO; 1361 spin_lock_irqsave(&midi->open_lock, flags); 1362 snd_emu10k1x_intr_disable(emu, midi->tx_enable); 1363 midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT; 1364 midi->substream_output = NULL; 1365 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) { 1366 spin_unlock_irqrestore(&midi->open_lock, flags); 1367 err = snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0); 1368 } else { 1369 spin_unlock_irqrestore(&midi->open_lock, flags); 1370 } 1371 return err; 1372 } 1373 1374 static void snd_emu10k1x_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) 1375 { 1376 struct emu10k1x *emu; 1377 struct emu10k1x_midi *midi = substream->rmidi->private_data; 1378 emu = midi->emu; 1379 if (snd_BUG_ON(!emu)) 1380 return; 1381 1382 if (up) 1383 snd_emu10k1x_intr_enable(emu, midi->rx_enable); 1384 else 1385 snd_emu10k1x_intr_disable(emu, midi->rx_enable); 1386 } 1387 1388 static void snd_emu10k1x_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) 1389 { 1390 struct emu10k1x *emu; 1391 struct emu10k1x_midi *midi = substream->rmidi->private_data; 1392 unsigned long flags; 1393 1394 emu = midi->emu; 1395 if (snd_BUG_ON(!emu)) 1396 return; 1397 1398 if (up) { 1399 int max = 4; 1400 unsigned char byte; 1401 1402 /* try to send some amount of bytes here before interrupts */ 1403 spin_lock_irqsave(&midi->output_lock, flags); 1404 while (max > 0) { 1405 if (mpu401_output_ready(emu, midi)) { 1406 if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) || 1407 snd_rawmidi_transmit(substream, &byte, 1) != 1) { 1408 /* no more data */ 1409 spin_unlock_irqrestore(&midi->output_lock, flags); 1410 return; 1411 } 1412 mpu401_write_data(emu, midi, byte); 1413 max--; 1414 } else { 1415 break; 1416 } 1417 } 1418 spin_unlock_irqrestore(&midi->output_lock, flags); 1419 snd_emu10k1x_intr_enable(emu, midi->tx_enable); 1420 } else { 1421 snd_emu10k1x_intr_disable(emu, midi->tx_enable); 1422 } 1423 } 1424 1425 /* 1426 1427 */ 1428 1429 static const struct snd_rawmidi_ops snd_emu10k1x_midi_output = 1430 { 1431 .open = snd_emu10k1x_midi_output_open, 1432 .close = snd_emu10k1x_midi_output_close, 1433 .trigger = snd_emu10k1x_midi_output_trigger, 1434 }; 1435 1436 static const struct snd_rawmidi_ops snd_emu10k1x_midi_input = 1437 { 1438 .open = snd_emu10k1x_midi_input_open, 1439 .close = snd_emu10k1x_midi_input_close, 1440 .trigger = snd_emu10k1x_midi_input_trigger, 1441 }; 1442 1443 static void snd_emu10k1x_midi_free(struct snd_rawmidi *rmidi) 1444 { 1445 struct emu10k1x_midi *midi = rmidi->private_data; 1446 midi->interrupt = NULL; 1447 midi->rmidi = NULL; 1448 } 1449 1450 static int emu10k1x_midi_init(struct emu10k1x *emu, 1451 struct emu10k1x_midi *midi, int device, 1452 char *name) 1453 { 1454 struct snd_rawmidi *rmidi; 1455 int err; 1456 1457 err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi); 1458 if (err < 0) 1459 return err; 1460 midi->emu = emu; 1461 spin_lock_init(&midi->open_lock); 1462 spin_lock_init(&midi->input_lock); 1463 spin_lock_init(&midi->output_lock); 1464 strcpy(rmidi->name, name); 1465 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output); 1466 snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input); 1467 rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT | 1468 SNDRV_RAWMIDI_INFO_INPUT | 1469 SNDRV_RAWMIDI_INFO_DUPLEX; 1470 rmidi->private_data = midi; 1471 rmidi->private_free = snd_emu10k1x_midi_free; 1472 midi->rmidi = rmidi; 1473 return 0; 1474 } 1475 1476 static int snd_emu10k1x_midi(struct emu10k1x *emu) 1477 { 1478 struct emu10k1x_midi *midi = &emu->midi; 1479 int err; 1480 1481 err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)"); 1482 if (err < 0) 1483 return err; 1484 1485 midi->tx_enable = INTE_MIDITXENABLE; 1486 midi->rx_enable = INTE_MIDIRXENABLE; 1487 midi->port = MUDATA; 1488 midi->ipr_tx = IPR_MIDITRANSBUFEMPTY; 1489 midi->ipr_rx = IPR_MIDIRECVBUFEMPTY; 1490 midi->interrupt = snd_emu10k1x_midi_interrupt; 1491 return 0; 1492 } 1493 1494 static int snd_emu10k1x_probe(struct pci_dev *pci, 1495 const struct pci_device_id *pci_id) 1496 { 1497 static int dev; 1498 struct snd_card *card; 1499 struct emu10k1x *chip; 1500 int err; 1501 1502 if (dev >= SNDRV_CARDS) 1503 return -ENODEV; 1504 if (!enable[dev]) { 1505 dev++; 1506 return -ENOENT; 1507 } 1508 1509 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE, 1510 sizeof(*chip), &card); 1511 if (err < 0) 1512 return err; 1513 chip = card->private_data; 1514 1515 err = snd_emu10k1x_create(card, pci); 1516 if (err < 0) 1517 return err; 1518 1519 err = snd_emu10k1x_pcm(chip, 0); 1520 if (err < 0) 1521 return err; 1522 err = snd_emu10k1x_pcm(chip, 1); 1523 if (err < 0) 1524 return err; 1525 err = snd_emu10k1x_pcm(chip, 2); 1526 if (err < 0) 1527 return err; 1528 1529 err = snd_emu10k1x_ac97(chip); 1530 if (err < 0) 1531 return err; 1532 1533 err = snd_emu10k1x_mixer(chip); 1534 if (err < 0) 1535 return err; 1536 1537 err = snd_emu10k1x_midi(chip); 1538 if (err < 0) 1539 return err; 1540 1541 snd_emu10k1x_proc_init(chip); 1542 1543 strcpy(card->driver, "EMU10K1X"); 1544 strcpy(card->shortname, "Dell Sound Blaster Live!"); 1545 sprintf(card->longname, "%s at 0x%lx irq %i", 1546 card->shortname, chip->port, chip->irq); 1547 1548 err = snd_card_register(card); 1549 if (err < 0) 1550 return err; 1551 1552 pci_set_drvdata(pci, card); 1553 dev++; 1554 return 0; 1555 } 1556 1557 // PCI IDs 1558 static const struct pci_device_id snd_emu10k1x_ids[] = { 1559 { PCI_VDEVICE(CREATIVE, 0x0006), 0 }, /* Dell OEM version (EMU10K1) */ 1560 { 0, } 1561 }; 1562 MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids); 1563 1564 // pci_driver definition 1565 static struct pci_driver emu10k1x_driver = { 1566 .name = KBUILD_MODNAME, 1567 .id_table = snd_emu10k1x_ids, 1568 .probe = snd_emu10k1x_probe, 1569 }; 1570 1571 module_pci_driver(emu10k1x_driver); 1572