xref: /openbmc/linux/sound/pci/emu10k1/emu10k1_main.c (revision d5e7cafd)
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3  *                   Creative Labs, Inc.
4  *  Routines for control of EMU10K1 chips
5  *
6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7  *      Added support for Audigy 2 Value.
8  *  	Added EMU 1010 support.
9  *  	General bug fixes and enhancements.
10  *
11  *
12  *  BUGS:
13  *    --
14  *
15  *  TODO:
16  *    --
17  *
18  *   This program is free software; you can redistribute it and/or modify
19  *   it under the terms of the GNU General Public License as published by
20  *   the Free Software Foundation; either version 2 of the License, or
21  *   (at your option) any later version.
22  *
23  *   This program is distributed in the hope that it will be useful,
24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  *   GNU General Public License for more details.
27  *
28  *   You should have received a copy of the GNU General Public License
29  *   along with this program; if not, write to the Free Software
30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
31  *
32  */
33 
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/module.h>
39 #include <linux/interrupt.h>
40 #include <linux/pci.h>
41 #include <linux/slab.h>
42 #include <linux/vmalloc.h>
43 #include <linux/mutex.h>
44 
45 
46 #include <sound/core.h>
47 #include <sound/emu10k1.h>
48 #include <linux/firmware.h>
49 #include "p16v.h"
50 #include "tina2.h"
51 #include "p17v.h"
52 
53 
54 #define HANA_FILENAME "emu/hana.fw"
55 #define DOCK_FILENAME "emu/audio_dock.fw"
56 #define EMU1010B_FILENAME "emu/emu1010b.fw"
57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
58 #define EMU0404_FILENAME "emu/emu0404.fw"
59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
60 
61 MODULE_FIRMWARE(HANA_FILENAME);
62 MODULE_FIRMWARE(DOCK_FILENAME);
63 MODULE_FIRMWARE(EMU1010B_FILENAME);
64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
65 MODULE_FIRMWARE(EMU0404_FILENAME);
66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
67 
68 
69 /*************************************************************************
70  * EMU10K1 init / done
71  *************************************************************************/
72 
73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch)
74 {
75 	snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
76 	snd_emu10k1_ptr_write(emu, IP, ch, 0);
77 	snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
78 	snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
79 	snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
80 	snd_emu10k1_ptr_write(emu, CPF, ch, 0);
81 	snd_emu10k1_ptr_write(emu, CCR, ch, 0);
82 
83 	snd_emu10k1_ptr_write(emu, PSST, ch, 0);
84 	snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
85 	snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
86 	snd_emu10k1_ptr_write(emu, Z1, ch, 0);
87 	snd_emu10k1_ptr_write(emu, Z2, ch, 0);
88 	snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
89 
90 	snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
91 	snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
92 	snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
93 	snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
94 	snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
95 	snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);	/* 1 Hz */
96 	snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);	/* 1 Hz */
97 	snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
98 
99 	/*** these are last so OFF prevents writing ***/
100 	snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
101 	snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
102 	snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
103 	snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
104 	snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
105 
106 	/* Audigy extra stuffs */
107 	if (emu->audigy) {
108 		snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
109 		snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
110 		snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
111 		snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
112 		snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
113 		snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
114 		snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
115 	}
116 }
117 
118 static unsigned int spi_dac_init[] = {
119 		0x00ff,
120 		0x02ff,
121 		0x0400,
122 		0x0520,
123 		0x0600,
124 		0x08ff,
125 		0x0aff,
126 		0x0cff,
127 		0x0eff,
128 		0x10ff,
129 		0x1200,
130 		0x1400,
131 		0x1480,
132 		0x1800,
133 		0x1aff,
134 		0x1cff,
135 		0x1e00,
136 		0x0530,
137 		0x0602,
138 		0x0622,
139 		0x1400,
140 };
141 
142 static unsigned int i2c_adc_init[][2] = {
143 	{ 0x17, 0x00 }, /* Reset */
144 	{ 0x07, 0x00 }, /* Timeout */
145 	{ 0x0b, 0x22 },  /* Interface control */
146 	{ 0x0c, 0x22 },  /* Master mode control */
147 	{ 0x0d, 0x08 },  /* Powerdown control */
148 	{ 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
149 	{ 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
150 	{ 0x10, 0x7b },  /* ALC Control 1 */
151 	{ 0x11, 0x00 },  /* ALC Control 2 */
152 	{ 0x12, 0x32 },  /* ALC Control 3 */
153 	{ 0x13, 0x00 },  /* Noise gate control */
154 	{ 0x14, 0xa6 },  /* Limiter control */
155 	{ 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for A2ZS Notebook */
156 };
157 
158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
159 {
160 	unsigned int silent_page;
161 	int ch;
162 	u32 tmp;
163 
164 	/* disable audio and lock cache */
165 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK |
166 		HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
167 
168 	/* reset recording buffers */
169 	snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
170 	snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
171 	snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
172 	snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
173 	snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
174 	snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
175 
176 	/* disable channel interrupt */
177 	outl(0, emu->port + INTE);
178 	snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
179 	snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
180 	snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
181 	snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
182 
183 	if (emu->audigy) {
184 		/* set SPDIF bypass mode */
185 		snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
186 		/* enable rear left + rear right AC97 slots */
187 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
188 				      AC97SLOT_REAR_LEFT);
189 	}
190 
191 	/* init envelope engine */
192 	for (ch = 0; ch < NUM_G; ch++)
193 		snd_emu10k1_voice_init(emu, ch);
194 
195 	snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
196 	snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
197 	snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
198 
199 	if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
200 		/* Hacks for Alice3 to work independent of haP16V driver */
201 		/* Setup SRCMulti_I2S SamplingRate */
202 		tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 		tmp &= 0xfffff1ff;
204 		tmp |= (0x2<<9);
205 		snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
206 
207 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
208 		snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
209 		/* Setup SRCMulti Input Audio Enable */
210 		/* Use 0xFFFFFFFF to enable P16V sounds. */
211 		snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
212 
213 		/* Enabled Phased (8-channel) P16V playback */
214 		outl(0x0201, emu->port + HCFG2);
215 		/* Set playback routing. */
216 		snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
217 	}
218 	if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
219 		/* Hacks for Alice3 to work independent of haP16V driver */
220 		dev_info(emu->card->dev, "Audigy2 value: Special config.\n");
221 		/* Setup SRCMulti_I2S SamplingRate */
222 		tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
223 		tmp &= 0xfffff1ff;
224 		tmp |= (0x2<<9);
225 		snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
226 
227 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
228 		outl(0x600000, emu->port + 0x20);
229 		outl(0x14, emu->port + 0x24);
230 
231 		/* Setup SRCMulti Input Audio Enable */
232 		outl(0x7b0000, emu->port + 0x20);
233 		outl(0xFF000000, emu->port + 0x24);
234 
235 		/* Setup SPDIF Out Audio Enable */
236 		/* The Audigy 2 Value has a separate SPDIF out,
237 		 * so no need for a mixer switch
238 		 */
239 		outl(0x7a0000, emu->port + 0x20);
240 		outl(0xFF000000, emu->port + 0x24);
241 		tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
242 		outl(tmp, emu->port + A_IOCFG);
243 	}
244 	if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
245 		int size, n;
246 
247 		size = ARRAY_SIZE(spi_dac_init);
248 		for (n = 0; n < size; n++)
249 			snd_emu10k1_spi_write(emu, spi_dac_init[n]);
250 
251 		snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
252 		/* Enable GPIOs
253 		 * GPIO0: Unknown
254 		 * GPIO1: Speakers-enabled.
255 		 * GPIO2: Unknown
256 		 * GPIO3: Unknown
257 		 * GPIO4: IEC958 Output on.
258 		 * GPIO5: Unknown
259 		 * GPIO6: Unknown
260 		 * GPIO7: Unknown
261 		 */
262 		outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
263 	}
264 	if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
265 		int size, n;
266 
267 		snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
268 		tmp = inl(emu->port + A_IOCFG);
269 		outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
270 		tmp = inl(emu->port + A_IOCFG);
271 		size = ARRAY_SIZE(i2c_adc_init);
272 		for (n = 0; n < size; n++)
273 			snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
274 		for (n = 0; n < 4; n++) {
275 			emu->i2c_capture_volume[n][0] = 0xcf;
276 			emu->i2c_capture_volume[n][1] = 0xcf;
277 		}
278 	}
279 
280 
281 	snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
282 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);	/* taken from original driver */
283 	snd_emu10k1_ptr_write(emu, TCBS, 0, 4);	/* taken from original driver */
284 
285 	silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
286 	for (ch = 0; ch < NUM_G; ch++) {
287 		snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
288 		snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
289 	}
290 
291 	if (emu->card_capabilities->emu_model) {
292 		outl(HCFG_AUTOMUTE_ASYNC |
293 			HCFG_EMU32_SLAVE |
294 			HCFG_AUDIOENABLE, emu->port + HCFG);
295 	/*
296 	 *  Hokay, setup HCFG
297 	 *   Mute Disable Audio = 0
298 	 *   Lock Tank Memory = 1
299 	 *   Lock Sound Memory = 0
300 	 *   Auto Mute = 1
301 	 */
302 	} else if (emu->audigy) {
303 		if (emu->revision == 4) /* audigy2 */
304 			outl(HCFG_AUDIOENABLE |
305 			     HCFG_AC3ENABLE_CDSPDIF |
306 			     HCFG_AC3ENABLE_GPSPDIF |
307 			     HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
308 		else
309 			outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
310 	/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
311 	 * e.g. card_capabilities->joystick */
312 	} else if (emu->model == 0x20 ||
313 	    emu->model == 0xc400 ||
314 	    (emu->model == 0x21 && emu->revision < 6))
315 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
316 	else
317 		/* With on-chip joystick */
318 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
319 
320 	if (enable_ir) {	/* enable IR for SB Live */
321 		if (emu->card_capabilities->emu_model) {
322 			;  /* Disable all access to A_IOCFG for the emu1010 */
323 		} else if (emu->card_capabilities->i2c_adc) {
324 			;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
325 		} else if (emu->audigy) {
326 			unsigned int reg = inl(emu->port + A_IOCFG);
327 			outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
328 			udelay(500);
329 			outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
330 			udelay(100);
331 			outl(reg, emu->port + A_IOCFG);
332 		} else {
333 			unsigned int reg = inl(emu->port + HCFG);
334 			outl(reg | HCFG_GPOUT2, emu->port + HCFG);
335 			udelay(500);
336 			outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
337 			udelay(100);
338 			outl(reg, emu->port + HCFG);
339 		}
340 	}
341 
342 	if (emu->card_capabilities->emu_model) {
343 		;  /* Disable all access to A_IOCFG for the emu1010 */
344 	} else if (emu->card_capabilities->i2c_adc) {
345 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
346 	} else if (emu->audigy) {	/* enable analog output */
347 		unsigned int reg = inl(emu->port + A_IOCFG);
348 		outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
349 	}
350 
351 	return 0;
352 }
353 
354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
355 {
356 	/*
357 	 *  Enable the audio bit
358 	 */
359 	outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
360 
361 	/* Enable analog/digital outs on audigy */
362 	if (emu->card_capabilities->emu_model) {
363 		;  /* Disable all access to A_IOCFG for the emu1010 */
364 	} else if (emu->card_capabilities->i2c_adc) {
365 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
366 	} else if (emu->audigy) {
367 		outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
368 
369 		if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
370 			/* Unmute Analog now.  Set GPO6 to 1 for Apollo.
371 			 * This has to be done after init ALice3 I2SOut beyond 48KHz.
372 			 * So, sequence is important. */
373 			outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
374 		} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
375 			/* Unmute Analog now. */
376 			outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
377 		} else {
378 			/* Disable routing from AC97 line out to Front speakers */
379 			outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
380 		}
381 	}
382 
383 #if 0
384 	{
385 	unsigned int tmp;
386 	/* FIXME: the following routine disables LiveDrive-II !! */
387 	/* TOSLink detection */
388 	emu->tos_link = 0;
389 	tmp = inl(emu->port + HCFG);
390 	if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
391 		outl(tmp|0x800, emu->port + HCFG);
392 		udelay(50);
393 		if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
394 			emu->tos_link = 1;
395 			outl(tmp, emu->port + HCFG);
396 		}
397 	}
398 	}
399 #endif
400 
401 	snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
402 }
403 
404 int snd_emu10k1_done(struct snd_emu10k1 *emu)
405 {
406 	int ch;
407 
408 	outl(0, emu->port + INTE);
409 
410 	/*
411 	 *  Shutdown the chip
412 	 */
413 	for (ch = 0; ch < NUM_G; ch++)
414 		snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
415 	for (ch = 0; ch < NUM_G; ch++) {
416 		snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
417 		snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
418 		snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
419 		snd_emu10k1_ptr_write(emu, CPF, ch, 0);
420 	}
421 
422 	/* reset recording buffers */
423 	snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
424 	snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
425 	snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
426 	snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
427 	snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
428 	snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
429 	snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
430 	snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
431 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);
432 	if (emu->audigy)
433 		snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
434 	else
435 		snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
436 
437 	/* disable channel interrupt */
438 	snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
439 	snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
440 	snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
441 	snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
442 
443 	/* disable audio and lock cache */
444 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
445 	snd_emu10k1_ptr_write(emu, PTB, 0, 0);
446 
447 	return 0;
448 }
449 
450 /*************************************************************************
451  * ECARD functional implementation
452  *************************************************************************/
453 
454 /* In A1 Silicon, these bits are in the HC register */
455 #define HOOKN_BIT		(1L << 12)
456 #define HANDN_BIT		(1L << 11)
457 #define PULSEN_BIT		(1L << 10)
458 
459 #define EC_GDI1			(1 << 13)
460 #define EC_GDI0			(1 << 14)
461 
462 #define EC_NUM_CONTROL_BITS	20
463 
464 #define EC_AC3_DATA_SELN	0x0001L
465 #define EC_EE_DATA_SEL		0x0002L
466 #define EC_EE_CNTRL_SELN	0x0004L
467 #define EC_EECLK		0x0008L
468 #define EC_EECS			0x0010L
469 #define EC_EESDO		0x0020L
470 #define EC_TRIM_CSN		0x0040L
471 #define EC_TRIM_SCLK		0x0080L
472 #define EC_TRIM_SDATA		0x0100L
473 #define EC_TRIM_MUTEN		0x0200L
474 #define EC_ADCCAL		0x0400L
475 #define EC_ADCRSTN		0x0800L
476 #define EC_DACCAL		0x1000L
477 #define EC_DACMUTEN		0x2000L
478 #define EC_LEDN			0x4000L
479 
480 #define EC_SPDIF0_SEL_SHIFT	15
481 #define EC_SPDIF1_SEL_SHIFT	17
482 #define EC_SPDIF0_SEL_MASK	(0x3L << EC_SPDIF0_SEL_SHIFT)
483 #define EC_SPDIF1_SEL_MASK	(0x7L << EC_SPDIF1_SEL_SHIFT)
484 #define EC_SPDIF0_SELECT(_x)	(((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
485 #define EC_SPDIF1_SELECT(_x)	(((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
486 #define EC_CURRENT_PROM_VERSION 0x01	/* Self-explanatory.  This should
487 					 * be incremented any time the EEPROM's
488 					 * format is changed.  */
489 
490 #define EC_EEPROM_SIZE		0x40	/* ECARD EEPROM has 64 16-bit words */
491 
492 /* Addresses for special values stored in to EEPROM */
493 #define EC_PROM_VERSION_ADDR	0x20	/* Address of the current prom version */
494 #define EC_BOARDREV0_ADDR	0x21	/* LSW of board rev */
495 #define EC_BOARDREV1_ADDR	0x22	/* MSW of board rev */
496 
497 #define EC_LAST_PROMFILE_ADDR	0x2f
498 
499 #define EC_SERIALNUM_ADDR	0x30	/* First word of serial number.  The
500 					 * can be up to 30 characters in length
501 					 * and is stored as a NULL-terminated
502 					 * ASCII string.  Any unused bytes must be
503 					 * filled with zeros */
504 #define EC_CHECKSUM_ADDR	0x3f	/* Location at which checksum is stored */
505 
506 
507 /* Most of this stuff is pretty self-evident.  According to the hardware
508  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
509  * offset problem.  Weird.
510  */
511 #define EC_RAW_RUN_MODE		(EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
512 				 EC_TRIM_CSN)
513 
514 
515 #define EC_DEFAULT_ADC_GAIN	0xC4C4
516 #define EC_DEFAULT_SPDIF0_SEL	0x0
517 #define EC_DEFAULT_SPDIF1_SEL	0x4
518 
519 /**************************************************************************
520  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
521  *  control latch will is loaded bit-serially by toggling the Modem control
522  *  lines from function 2 on the E8010.  This function hides these details
523  *  and presents the illusion that we are actually writing to a distinct
524  *  register.
525  */
526 
527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value)
528 {
529 	unsigned short count;
530 	unsigned int data;
531 	unsigned long hc_port;
532 	unsigned int hc_value;
533 
534 	hc_port = emu->port + HCFG;
535 	hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
536 	outl(hc_value, hc_port);
537 
538 	for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
539 
540 		/* Set up the value */
541 		data = ((value & 0x1) ? PULSEN_BIT : 0);
542 		value >>= 1;
543 
544 		outl(hc_value | data, hc_port);
545 
546 		/* Clock the shift register */
547 		outl(hc_value | data | HANDN_BIT, hc_port);
548 		outl(hc_value | data, hc_port);
549 	}
550 
551 	/* Latch the bits */
552 	outl(hc_value | HOOKN_BIT, hc_port);
553 	outl(hc_value, hc_port);
554 }
555 
556 /**************************************************************************
557  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
558  * trim value consists of a 16bit value which is composed of two
559  * 8 bit gain/trim values, one for the left channel and one for the
560  * right channel.  The following table maps from the Gain/Attenuation
561  * value in decibels into the corresponding bit pattern for a single
562  * channel.
563  */
564 
565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu,
566 					 unsigned short gain)
567 {
568 	unsigned int bit;
569 
570 	/* Enable writing to the TRIM registers */
571 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
572 
573 	/* Do it again to insure that we meet hold time requirements */
574 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
575 
576 	for (bit = (1 << 15); bit; bit >>= 1) {
577 		unsigned int value;
578 
579 		value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
580 
581 		if (gain & bit)
582 			value |= EC_TRIM_SDATA;
583 
584 		/* Clock the bit */
585 		snd_emu10k1_ecard_write(emu, value);
586 		snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
587 		snd_emu10k1_ecard_write(emu, value);
588 	}
589 
590 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
591 }
592 
593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu)
594 {
595 	unsigned int hc_value;
596 
597 	/* Set up the initial settings */
598 	emu->ecard_ctrl = EC_RAW_RUN_MODE |
599 			  EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
600 			  EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
601 
602 	/* Step 0: Set the codec type in the hardware control register
603 	 * and enable audio output */
604 	hc_value = inl(emu->port + HCFG);
605 	outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
606 	inl(emu->port + HCFG);
607 
608 	/* Step 1: Turn off the led and deassert TRIM_CS */
609 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
610 
611 	/* Step 2: Calibrate the ADC and DAC */
612 	snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
613 
614 	/* Step 3: Wait for awhile;   XXX We can't get away with this
615 	 * under a real operating system; we'll need to block and wait that
616 	 * way. */
617 	snd_emu10k1_wait(emu, 48000);
618 
619 	/* Step 4: Switch off the DAC and ADC calibration.  Note
620 	 * That ADC_CAL is actually an inverted signal, so we assert
621 	 * it here to stop calibration.  */
622 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
623 
624 	/* Step 4: Switch into run mode */
625 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
626 
627 	/* Step 5: Set the analog input gain */
628 	snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
629 
630 	return 0;
631 }
632 
633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu)
634 {
635 	unsigned long special_port;
636 	unsigned int value;
637 
638 	/* Special initialisation routine
639 	 * before the rest of the IO-Ports become active.
640 	 */
641 	special_port = emu->port + 0x38;
642 	value = inl(special_port);
643 	outl(0x00d00000, special_port);
644 	value = inl(special_port);
645 	outl(0x00d00001, special_port);
646 	value = inl(special_port);
647 	outl(0x00d0005f, special_port);
648 	value = inl(special_port);
649 	outl(0x00d0007f, special_port);
650 	value = inl(special_port);
651 	outl(0x0090007f, special_port);
652 	value = inl(special_port);
653 
654 	snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
655 	/* Delay to give time for ADC chip to switch on. It needs 113ms */
656 	msleep(200);
657 	return 0;
658 }
659 
660 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu,
661 				     const struct firmware *fw_entry)
662 {
663 	int n, i;
664 	int reg;
665 	int value;
666 	unsigned int write_post;
667 	unsigned long flags;
668 
669 	if (!fw_entry)
670 		return -EIO;
671 
672 	/* The FPGA is a Xilinx Spartan IIE XC2S50E */
673 	/* GPIO7 -> FPGA PGMN
674 	 * GPIO6 -> FPGA CCLK
675 	 * GPIO5 -> FPGA DIN
676 	 * FPGA CONFIG OFF -> FPGA PGMN
677 	 */
678 	spin_lock_irqsave(&emu->emu_lock, flags);
679 	outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
680 	write_post = inl(emu->port + A_IOCFG);
681 	udelay(100);
682 	outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
683 	write_post = inl(emu->port + A_IOCFG);
684 	udelay(100); /* Allow FPGA memory to clean */
685 	for (n = 0; n < fw_entry->size; n++) {
686 		value = fw_entry->data[n];
687 		for (i = 0; i < 8; i++) {
688 			reg = 0x80;
689 			if (value & 0x1)
690 				reg = reg | 0x20;
691 			value = value >> 1;
692 			outl(reg, emu->port + A_IOCFG);
693 			write_post = inl(emu->port + A_IOCFG);
694 			outl(reg | 0x40, emu->port + A_IOCFG);
695 			write_post = inl(emu->port + A_IOCFG);
696 		}
697 	}
698 	/* After programming, set GPIO bit 4 high again. */
699 	outl(0x10, emu->port + A_IOCFG);
700 	write_post = inl(emu->port + A_IOCFG);
701 	spin_unlock_irqrestore(&emu->emu_lock, flags);
702 
703 	return 0;
704 }
705 
706 static int emu1010_firmware_thread(void *data)
707 {
708 	struct snd_emu10k1 *emu = data;
709 	u32 tmp, tmp2, reg;
710 	int err;
711 
712 	for (;;) {
713 		/* Delay to allow Audio Dock to settle */
714 		msleep_interruptible(1000);
715 		if (kthread_should_stop())
716 			break;
717 #ifdef CONFIG_PM_SLEEP
718 		if (emu->suspend)
719 			continue;
720 #endif
721 		snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */
722 		snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg); /* OPTIONS: Which cards are attached to the EMU */
723 		if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
724 			/* Audio Dock attached */
725 			/* Return to Audio Dock programming mode */
726 			dev_info(emu->card->dev,
727 				 "emu1010: Loading Audio Dock Firmware\n");
728 			snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK);
729 
730 			if (!emu->dock_fw) {
731 				const char *filename = NULL;
732 				switch (emu->card_capabilities->emu_model) {
733 				case EMU_MODEL_EMU1010:
734 					filename = DOCK_FILENAME;
735 					break;
736 				case EMU_MODEL_EMU1010B:
737 					filename = MICRO_DOCK_FILENAME;
738 					break;
739 				case EMU_MODEL_EMU1616:
740 					filename = MICRO_DOCK_FILENAME;
741 					break;
742 				}
743 				if (filename) {
744 					err = request_firmware(&emu->dock_fw,
745 							       filename,
746 							       &emu->pci->dev);
747 					if (err)
748 						continue;
749 				}
750 			}
751 
752 			if (emu->dock_fw) {
753 				err = snd_emu1010_load_firmware(emu, emu->dock_fw);
754 				if (err)
755 					continue;
756 			}
757 
758 			snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0);
759 			snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg);
760 			dev_info(emu->card->dev,
761 				 "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n",
762 				 reg);
763 			/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
764 			snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
765 			dev_info(emu->card->dev,
766 				 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg);
767 			if ((reg & 0x1f) != 0x15) {
768 				/* FPGA failed to be programmed */
769 				dev_info(emu->card->dev,
770 					 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n",
771 					 reg);
772 				continue;
773 			}
774 			dev_info(emu->card->dev,
775 				 "emu1010: Audio Dock Firmware loaded\n");
776 			snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp);
777 			snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2);
778 			dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n",
779 				   tmp, tmp2);
780 			/* Sync clocking between 1010 and Dock */
781 			/* Allow DLL to settle */
782 			msleep(10);
783 			/* Unmute all. Default is muted after a firmware load */
784 			snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE);
785 		}
786 	}
787 	dev_info(emu->card->dev, "emu1010: firmware thread stopping\n");
788 	return 0;
789 }
790 
791 /*
792  * EMU-1010 - details found out from this driver, official MS Win drivers,
793  * testing the card:
794  *
795  * Audigy2 (aka Alice2):
796  * ---------------------
797  * 	* communication over PCI
798  * 	* conversion of 32-bit data coming over EMU32 links from HANA FPGA
799  *	  to 2 x 16-bit, using internal DSP instructions
800  * 	* slave mode, clock supplied by HANA
801  * 	* linked to HANA using:
802  * 		32 x 32-bit serial EMU32 output channels
803  * 		16 x EMU32 input channels
804  * 		(?) x I2S I/O channels (?)
805  *
806  * FPGA (aka HANA):
807  * ---------------
808  * 	* provides all (?) physical inputs and outputs of the card
809  * 		(ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
810  * 	* provides clock signal for the card and Alice2
811  * 	* two crystals - for 44.1kHz and 48kHz multiples
812  * 	* provides internal routing of signal sources to signal destinations
813  * 	* inputs/outputs to Alice2 - see above
814  *
815  * Current status of the driver:
816  * ----------------------------
817  * 	* only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
818  * 	* PCM device nb. 2:
819  *		16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
820  * 		16 x 32-bit capture - snd_emu10k1_capture_efx_ops
821  */
822 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu)
823 {
824 	unsigned int i;
825 	u32 tmp, tmp2, reg;
826 	int err;
827 
828 	dev_info(emu->card->dev, "emu1010: Special config.\n");
829 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
830 	 * Lock Sound Memory Cache, Lock Tank Memory Cache,
831 	 * Mute all codecs.
832 	 */
833 	outl(0x0005a00c, emu->port + HCFG);
834 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
835 	 * Lock Tank Memory Cache,
836 	 * Mute all codecs.
837 	 */
838 	outl(0x0005a004, emu->port + HCFG);
839 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
840 	 * Mute all codecs.
841 	 */
842 	outl(0x0005a000, emu->port + HCFG);
843 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
844 	 * Mute all codecs.
845 	 */
846 	outl(0x0005a000, emu->port + HCFG);
847 
848 	/* Disable 48Volt power to Audio Dock */
849 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
850 
851 	/* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
852 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
853 	dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg);
854 	if ((reg & 0x3f) == 0x15) {
855 		/* FPGA netlist already present so clear it */
856 		/* Return to programming mode */
857 
858 		snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02);
859 	}
860 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
861 	dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg);
862 	if ((reg & 0x3f) == 0x15) {
863 		/* FPGA failed to return to programming mode */
864 		dev_info(emu->card->dev,
865 			 "emu1010: FPGA failed to return to programming mode\n");
866 		return -ENODEV;
867 	}
868 	dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg);
869 
870 	if (!emu->firmware) {
871 		const char *filename;
872 		switch (emu->card_capabilities->emu_model) {
873 		case EMU_MODEL_EMU1010:
874 			filename = HANA_FILENAME;
875 			break;
876 		case EMU_MODEL_EMU1010B:
877 			filename = EMU1010B_FILENAME;
878 			break;
879 		case EMU_MODEL_EMU1616:
880 			filename = EMU1010_NOTEBOOK_FILENAME;
881 			break;
882 		case EMU_MODEL_EMU0404:
883 			filename = EMU0404_FILENAME;
884 			break;
885 		default:
886 			return -ENODEV;
887 		}
888 
889 		err = request_firmware(&emu->firmware, filename, &emu->pci->dev);
890 		if (err != 0) {
891 			dev_info(emu->card->dev,
892 				 "emu1010: firmware: %s not found. Err = %d\n",
893 				 filename, err);
894 			return err;
895 		}
896 		dev_info(emu->card->dev,
897 			 "emu1010: firmware file = %s, size = 0x%zx\n",
898 			   filename, emu->firmware->size);
899 	}
900 
901 	err = snd_emu1010_load_firmware(emu, emu->firmware);
902 	if (err != 0) {
903 		dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n");
904 		return err;
905 	}
906 
907 	/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
908 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg);
909 	if ((reg & 0x3f) != 0x15) {
910 		/* FPGA failed to be programmed */
911 		dev_info(emu->card->dev,
912 			 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n",
913 			 reg);
914 		return -ENODEV;
915 	}
916 
917 	dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n");
918 	snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp);
919 	snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2);
920 	dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2);
921 	/* Enable 48Volt power to Audio Dock */
922 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON);
923 
924 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
925 	dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
926 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
927 	dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg);
928 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp);
929 	/* Optical -> ADAT I/O  */
930 	/* 0 : SPDIF
931 	 * 1 : ADAT
932 	 */
933 	emu->emu1010.optical_in = 1; /* IN_ADAT */
934 	emu->emu1010.optical_out = 1; /* IN_ADAT */
935 	tmp = 0;
936 	tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
937 		(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
938 	snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp);
939 	snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp);
940 	/* Set no attenuation on Audio Dock pads. */
941 	snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00);
942 	emu->emu1010.adc_pads = 0x00;
943 	snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
944 	/* Unmute Audio dock DACs, Headphone source DAC-4. */
945 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
946 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
947 	snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp);
948 	/* DAC PADs. */
949 	snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f);
950 	emu->emu1010.dac_pads = 0x0f;
951 	snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp);
952 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30);
953 	snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
954 	/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
955 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10);
956 	/* MIDI routing */
957 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19);
958 	/* Unknown. */
959 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c);
960 	/* IRQ Enable: All on */
961 	/* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */
962 	/* IRQ Enable: All off */
963 	snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00);
964 
965 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg);
966 	dev_info(emu->card->dev, "emu1010: Card options3 = 0x%x\n", reg);
967 	/* Default WCLK set to 48kHz. */
968 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00);
969 	/* Word Clock source, Internal 48kHz x1 */
970 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
971 	/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
972 	/* Audio Dock LEDs. */
973 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);
974 
975 #if 0
976 	/* For 96kHz */
977 	snd_emu1010_fpga_link_dst_src_write(emu,
978 		EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
979 	snd_emu1010_fpga_link_dst_src_write(emu,
980 		EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
981 	snd_emu1010_fpga_link_dst_src_write(emu,
982 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
983 	snd_emu1010_fpga_link_dst_src_write(emu,
984 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
985 #endif
986 #if 0
987 	/* For 192kHz */
988 	snd_emu1010_fpga_link_dst_src_write(emu,
989 		EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
990 	snd_emu1010_fpga_link_dst_src_write(emu,
991 		EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
992 	snd_emu1010_fpga_link_dst_src_write(emu,
993 		EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
994 	snd_emu1010_fpga_link_dst_src_write(emu,
995 		EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
996 	snd_emu1010_fpga_link_dst_src_write(emu,
997 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
998 	snd_emu1010_fpga_link_dst_src_write(emu,
999 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
1000 	snd_emu1010_fpga_link_dst_src_write(emu,
1001 		EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
1002 	snd_emu1010_fpga_link_dst_src_write(emu,
1003 		EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
1004 #endif
1005 #if 1
1006 	/* For 48kHz */
1007 	snd_emu1010_fpga_link_dst_src_write(emu,
1008 		EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
1009 	snd_emu1010_fpga_link_dst_src_write(emu,
1010 		EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
1011 	snd_emu1010_fpga_link_dst_src_write(emu,
1012 		EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
1013 	snd_emu1010_fpga_link_dst_src_write(emu,
1014 		EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
1015 	snd_emu1010_fpga_link_dst_src_write(emu,
1016 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
1017 	snd_emu1010_fpga_link_dst_src_write(emu,
1018 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
1019 	snd_emu1010_fpga_link_dst_src_write(emu,
1020 		EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
1021 	snd_emu1010_fpga_link_dst_src_write(emu,
1022 		EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
1023 	/* Pavel Hofman - setting defaults for 8 more capture channels
1024 	 * Defaults only, users will set their own values anyways, let's
1025 	 * just copy/paste.
1026 	 */
1027 
1028 	snd_emu1010_fpga_link_dst_src_write(emu,
1029 		EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
1030 	snd_emu1010_fpga_link_dst_src_write(emu,
1031 		EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1032 	snd_emu1010_fpga_link_dst_src_write(emu,
1033 		EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1034 	snd_emu1010_fpga_link_dst_src_write(emu,
1035 		EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1036 	snd_emu1010_fpga_link_dst_src_write(emu,
1037 		EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1038 	snd_emu1010_fpga_link_dst_src_write(emu,
1039 		EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1040 	snd_emu1010_fpga_link_dst_src_write(emu,
1041 		EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1042 	snd_emu1010_fpga_link_dst_src_write(emu,
1043 		EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1044 #endif
1045 #if 0
1046 	/* Original */
1047 	snd_emu1010_fpga_link_dst_src_write(emu,
1048 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1049 	snd_emu1010_fpga_link_dst_src_write(emu,
1050 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1051 	snd_emu1010_fpga_link_dst_src_write(emu,
1052 		EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1053 	snd_emu1010_fpga_link_dst_src_write(emu,
1054 		EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1055 	snd_emu1010_fpga_link_dst_src_write(emu,
1056 		EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1057 	snd_emu1010_fpga_link_dst_src_write(emu,
1058 		EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1059 	snd_emu1010_fpga_link_dst_src_write(emu,
1060 		EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1061 	snd_emu1010_fpga_link_dst_src_write(emu,
1062 		EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1063 	snd_emu1010_fpga_link_dst_src_write(emu,
1064 		EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1065 	snd_emu1010_fpga_link_dst_src_write(emu,
1066 		EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1067 	snd_emu1010_fpga_link_dst_src_write(emu,
1068 		EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1069 	snd_emu1010_fpga_link_dst_src_write(emu,
1070 		EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1071 #endif
1072 	for (i = 0; i < 0x20; i++) {
1073 		/* AudioDock Elink <- Silence */
1074 		snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE);
1075 	}
1076 	for (i = 0; i < 4; i++) {
1077 		/* Hana SPDIF Out <- Silence */
1078 		snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE);
1079 	}
1080 	for (i = 0; i < 7; i++) {
1081 		/* Hamoa DAC <- Silence */
1082 		snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE);
1083 	}
1084 	for (i = 0; i < 7; i++) {
1085 		/* Hana ADAT Out <- Silence */
1086 		snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1087 	}
1088 	snd_emu1010_fpga_link_dst_src_write(emu,
1089 		EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1090 	snd_emu1010_fpga_link_dst_src_write(emu,
1091 		EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1092 	snd_emu1010_fpga_link_dst_src_write(emu,
1093 		EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1094 	snd_emu1010_fpga_link_dst_src_write(emu,
1095 		EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1096 	snd_emu1010_fpga_link_dst_src_write(emu,
1097 		EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1098 	snd_emu1010_fpga_link_dst_src_write(emu,
1099 		EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1100 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */
1101 
1102 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1103 
1104 	/* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1105 	 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1106 	 * Mute all codecs.
1107 	 */
1108 	outl(0x0000a000, emu->port + HCFG);
1109 	/* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1110 	 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1111 	 * Un-Mute all codecs.
1112 	 */
1113 	outl(0x0000a001, emu->port + HCFG);
1114 
1115 	/* Initial boot complete. Now patches */
1116 
1117 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp);
1118 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1119 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1120 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */
1121 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */
1122 	snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp);
1123 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1124 
1125 	/* Start Micro/Audio Dock firmware loader thread */
1126 	if (!emu->emu1010.firmware_thread) {
1127 		emu->emu1010.firmware_thread =
1128 			kthread_create(emu1010_firmware_thread, emu,
1129 				       "emu1010_firmware");
1130 		wake_up_process(emu->emu1010.firmware_thread);
1131 	}
1132 
1133 #if 0
1134 	snd_emu1010_fpga_link_dst_src_write(emu,
1135 		EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1136 	snd_emu1010_fpga_link_dst_src_write(emu,
1137 		EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1138 	snd_emu1010_fpga_link_dst_src_write(emu,
1139 		EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1140 	snd_emu1010_fpga_link_dst_src_write(emu,
1141 		EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1142 #endif
1143 	/* Default outputs */
1144 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1145 		/* 1616(M) cardbus default outputs */
1146 		/* ALICE2 bus 0xa0 */
1147 		snd_emu1010_fpga_link_dst_src_write(emu,
1148 			EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1149 		emu->emu1010.output_source[0] = 17;
1150 		snd_emu1010_fpga_link_dst_src_write(emu,
1151 			EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1152 		emu->emu1010.output_source[1] = 18;
1153 		snd_emu1010_fpga_link_dst_src_write(emu,
1154 			EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1155 		emu->emu1010.output_source[2] = 19;
1156 		snd_emu1010_fpga_link_dst_src_write(emu,
1157 			EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1158 		emu->emu1010.output_source[3] = 20;
1159 		snd_emu1010_fpga_link_dst_src_write(emu,
1160 			EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1161 		emu->emu1010.output_source[4] = 21;
1162 		snd_emu1010_fpga_link_dst_src_write(emu,
1163 			EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1164 		emu->emu1010.output_source[5] = 22;
1165 		/* ALICE2 bus 0xa0 */
1166 		snd_emu1010_fpga_link_dst_src_write(emu,
1167 			EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1168 		emu->emu1010.output_source[16] = 17;
1169 		snd_emu1010_fpga_link_dst_src_write(emu,
1170 			EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1171 		emu->emu1010.output_source[17] = 18;
1172 	} else {
1173 		/* ALICE2 bus 0xa0 */
1174 		snd_emu1010_fpga_link_dst_src_write(emu,
1175 			EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1176 		emu->emu1010.output_source[0] = 21;
1177 		snd_emu1010_fpga_link_dst_src_write(emu,
1178 			EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1179 		emu->emu1010.output_source[1] = 22;
1180 		snd_emu1010_fpga_link_dst_src_write(emu,
1181 			EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1182 		emu->emu1010.output_source[2] = 23;
1183 		snd_emu1010_fpga_link_dst_src_write(emu,
1184 			EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1185 		emu->emu1010.output_source[3] = 24;
1186 		snd_emu1010_fpga_link_dst_src_write(emu,
1187 			EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1188 		emu->emu1010.output_source[4] = 25;
1189 		snd_emu1010_fpga_link_dst_src_write(emu,
1190 			EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1191 		emu->emu1010.output_source[5] = 26;
1192 		snd_emu1010_fpga_link_dst_src_write(emu,
1193 			EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1194 		emu->emu1010.output_source[6] = 27;
1195 		snd_emu1010_fpga_link_dst_src_write(emu,
1196 			EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1197 		emu->emu1010.output_source[7] = 28;
1198 		/* ALICE2 bus 0xa0 */
1199 		snd_emu1010_fpga_link_dst_src_write(emu,
1200 			EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1201 		emu->emu1010.output_source[8] = 21;
1202 		snd_emu1010_fpga_link_dst_src_write(emu,
1203 			EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1204 		emu->emu1010.output_source[9] = 22;
1205 		/* ALICE2 bus 0xa0 */
1206 		snd_emu1010_fpga_link_dst_src_write(emu,
1207 			EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1208 		emu->emu1010.output_source[10] = 21;
1209 		snd_emu1010_fpga_link_dst_src_write(emu,
1210 			EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1211 		emu->emu1010.output_source[11] = 22;
1212 		/* ALICE2 bus 0xa0 */
1213 		snd_emu1010_fpga_link_dst_src_write(emu,
1214 			EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1215 		emu->emu1010.output_source[12] = 21;
1216 		snd_emu1010_fpga_link_dst_src_write(emu,
1217 			EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1218 		emu->emu1010.output_source[13] = 22;
1219 		/* ALICE2 bus 0xa0 */
1220 		snd_emu1010_fpga_link_dst_src_write(emu,
1221 			EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1222 		emu->emu1010.output_source[14] = 21;
1223 		snd_emu1010_fpga_link_dst_src_write(emu,
1224 			EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1225 		emu->emu1010.output_source[15] = 22;
1226 		/* ALICE2 bus 0xa0 */
1227 		snd_emu1010_fpga_link_dst_src_write(emu,
1228 			EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1229 		emu->emu1010.output_source[16] = 21;
1230 		snd_emu1010_fpga_link_dst_src_write(emu,
1231 			EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1232 		emu->emu1010.output_source[17] = 22;
1233 		snd_emu1010_fpga_link_dst_src_write(emu,
1234 			EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1235 		emu->emu1010.output_source[18] = 23;
1236 		snd_emu1010_fpga_link_dst_src_write(emu,
1237 			EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1238 		emu->emu1010.output_source[19] = 24;
1239 		snd_emu1010_fpga_link_dst_src_write(emu,
1240 			EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1241 		emu->emu1010.output_source[20] = 25;
1242 		snd_emu1010_fpga_link_dst_src_write(emu,
1243 			EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1244 		emu->emu1010.output_source[21] = 26;
1245 		snd_emu1010_fpga_link_dst_src_write(emu,
1246 			EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1247 		emu->emu1010.output_source[22] = 27;
1248 		snd_emu1010_fpga_link_dst_src_write(emu,
1249 			EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1250 		emu->emu1010.output_source[23] = 28;
1251 	}
1252 	/* TEMP: Select SPDIF in/out */
1253 	/* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */
1254 
1255 	/* TEMP: Select 48kHz SPDIF out */
1256 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1257 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1258 	/* Word Clock source, Internal 48kHz x1 */
1259 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K);
1260 	/* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */
1261 	emu->emu1010.internal_clock = 1; /* 48000 */
1262 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */
1263 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1264 	/* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */
1265 	/* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */
1266 	/* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */
1267 
1268 	return 0;
1269 }
1270 /*
1271  *  Create the EMU10K1 instance
1272  */
1273 
1274 #ifdef CONFIG_PM_SLEEP
1275 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1276 static void free_pm_buffer(struct snd_emu10k1 *emu);
1277 #endif
1278 
1279 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1280 {
1281 	if (emu->port) {	/* avoid access to already used hardware */
1282 		snd_emu10k1_fx8010_tram_setup(emu, 0);
1283 		snd_emu10k1_done(emu);
1284 		snd_emu10k1_free_efx(emu);
1285 	}
1286 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1287 		/* Disable 48Volt power to Audio Dock */
1288 		snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0);
1289 	}
1290 	if (emu->emu1010.firmware_thread)
1291 		kthread_stop(emu->emu1010.firmware_thread);
1292 	release_firmware(emu->firmware);
1293 	release_firmware(emu->dock_fw);
1294 	if (emu->irq >= 0)
1295 		free_irq(emu->irq, emu);
1296 	/* remove reserved page */
1297 	if (emu->reserved_page) {
1298 		snd_emu10k1_synth_free(emu,
1299 			(struct snd_util_memblk *)emu->reserved_page);
1300 		emu->reserved_page = NULL;
1301 	}
1302 	snd_util_memhdr_free(emu->memhdr);
1303 	if (emu->silent_page.area)
1304 		snd_dma_free_pages(&emu->silent_page);
1305 	if (emu->ptb_pages.area)
1306 		snd_dma_free_pages(&emu->ptb_pages);
1307 	vfree(emu->page_ptr_table);
1308 	vfree(emu->page_addr_table);
1309 #ifdef CONFIG_PM_SLEEP
1310 	free_pm_buffer(emu);
1311 #endif
1312 	if (emu->port)
1313 		pci_release_regions(emu->pci);
1314 	if (emu->card_capabilities->ca0151_chip) /* P16V */
1315 		snd_p16v_free(emu);
1316 	pci_disable_device(emu->pci);
1317 	kfree(emu);
1318 	return 0;
1319 }
1320 
1321 static int snd_emu10k1_dev_free(struct snd_device *device)
1322 {
1323 	struct snd_emu10k1 *emu = device->device_data;
1324 	return snd_emu10k1_free(emu);
1325 }
1326 
1327 static struct snd_emu_chip_details emu_chip_details[] = {
1328 	/* Audigy4 (Not PRO) SB0610 */
1329 	/* Tested by James@superbug.co.uk 4th April 2006 */
1330 	/* A_IOCFG bits
1331 	 * Output
1332 	 * 0: ?
1333 	 * 1: ?
1334 	 * 2: ?
1335 	 * 3: 0 - Digital Out, 1 - Line in
1336 	 * 4: ?
1337 	 * 5: ?
1338 	 * 6: ?
1339 	 * 7: ?
1340 	 * Input
1341 	 * 8: ?
1342 	 * 9: ?
1343 	 * A: Green jack sense (Front)
1344 	 * B: ?
1345 	 * C: Black jack sense (Rear/Side Right)
1346 	 * D: Yellow jack sense (Center/LFE/Side Left)
1347 	 * E: ?
1348 	 * F: ?
1349 	 *
1350 	 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1351 	 * 0 - Digital Out
1352 	 * 1 - Line in
1353 	 */
1354 	/* Mic input not tested.
1355 	 * Analog CD input not tested
1356 	 * Digital Out not tested.
1357 	 * Line in working.
1358 	 * Audio output 5.1 working. Side outputs not working.
1359 	 */
1360 	/* DSP: CA10300-IAT LF
1361 	 * DAC: Cirrus Logic CS4382-KQZ
1362 	 * ADC: Philips 1361T
1363 	 * AC97: Sigmatel STAC9750
1364 	 * CA0151: None
1365 	 */
1366 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1367 	 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]",
1368 	 .id = "Audigy2",
1369 	 .emu10k2_chip = 1,
1370 	 .ca0108_chip = 1,
1371 	 .spk71 = 1,
1372 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1373 	 .ac97_chip = 1} ,
1374 	/* Audigy 2 Value AC3 out does not work yet.
1375 	 * Need to find out how to turn off interpolators.
1376 	 */
1377 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1378 	/* DSP: CA0108-IAT
1379 	 * DAC: CS4382-KQ
1380 	 * ADC: Philips 1361T
1381 	 * AC97: STAC9750
1382 	 * CA0151: None
1383 	 */
1384 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1385 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]",
1386 	 .id = "Audigy2",
1387 	 .emu10k2_chip = 1,
1388 	 .ca0108_chip = 1,
1389 	 .spk71 = 1,
1390 	 .ac97_chip = 1} ,
1391 	/* Audigy 2 ZS Notebook Cardbus card.*/
1392 	/* Tested by James@superbug.co.uk 6th November 2006 */
1393 	/* Audio output 7.1/Headphones working.
1394 	 * Digital output working. (AC3 not checked, only PCM)
1395 	 * Audio Mic/Line inputs working.
1396 	 * Digital input not tested.
1397 	 */
1398 	/* DSP: Tina2
1399 	 * DAC: Wolfson WM8768/WM8568
1400 	 * ADC: Wolfson WM8775
1401 	 * AC97: None
1402 	 * CA0151: None
1403 	 */
1404 	/* Tested by James@superbug.co.uk 4th April 2006 */
1405 	/* A_IOCFG bits
1406 	 * Output
1407 	 * 0: Not Used
1408 	 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1409 	 * 2: Analog input 0 = line in, 1 = mic in
1410 	 * 3: Not Used
1411 	 * 4: Digital output 0 = off, 1 = on.
1412 	 * 5: Not Used
1413 	 * 6: Not Used
1414 	 * 7: Not Used
1415 	 * Input
1416 	 *      All bits 1 (0x3fxx) means nothing plugged in.
1417 	 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1418 	 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1419 	 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1420 	 * E-F: Always 0
1421 	 *
1422 	 */
1423 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1424 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]",
1425 	 .id = "Audigy2",
1426 	 .emu10k2_chip = 1,
1427 	 .ca0108_chip = 1,
1428 	 .ca_cardbus_chip = 1,
1429 	 .spi_dac = 1,
1430 	 .i2c_adc = 1,
1431 	 .spk71 = 1} ,
1432 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1433 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1434 	 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1435 	 .id = "EMU1010",
1436 	 .emu10k2_chip = 1,
1437 	 .ca0108_chip = 1,
1438 	 .ca_cardbus_chip = 1,
1439 	 .spk71 = 1 ,
1440 	 .emu_model = EMU_MODEL_EMU1616},
1441 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1442 	/* This is MAEM8960, 0202 is MAEM 8980 */
1443 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1444 	 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]",
1445 	 .id = "EMU1010",
1446 	 .emu10k2_chip = 1,
1447 	 .ca0108_chip = 1,
1448 	 .spk71 = 1,
1449 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */
1450 	/* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */
1451 	/* This is MAEM8986, 0202 is MAEM8980 */
1452 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102,
1453 	 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]",
1454 	 .id = "EMU1010",
1455 	 .emu10k2_chip = 1,
1456 	 .ca0108_chip = 1,
1457 	 .spk71 = 1,
1458 	 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */
1459 	/* Tested by James@superbug.co.uk 8th July 2005. */
1460 	/* This is MAEM8810, 0202 is MAEM8820 */
1461 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1462 	 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]",
1463 	 .id = "EMU1010",
1464 	 .emu10k2_chip = 1,
1465 	 .ca0102_chip = 1,
1466 	 .spk71 = 1,
1467 	 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */
1468 	/* EMU0404b */
1469 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1470 	 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]",
1471 	 .id = "EMU0404",
1472 	 .emu10k2_chip = 1,
1473 	 .ca0108_chip = 1,
1474 	 .spk71 = 1,
1475 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */
1476 	/* Tested by James@superbug.co.uk 20-3-2007. */
1477 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1478 	 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]",
1479 	 .id = "EMU0404",
1480 	 .emu10k2_chip = 1,
1481 	 .ca0102_chip = 1,
1482 	 .spk71 = 1,
1483 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1484 	/* EMU0404 PCIe */
1485 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102,
1486 	 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]",
1487 	 .id = "EMU0404",
1488 	 .emu10k2_chip = 1,
1489 	 .ca0108_chip = 1,
1490 	 .spk71 = 1,
1491 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */
1492 	/* Note that all E-mu cards require kernel 2.6 or newer. */
1493 	{.vendor = 0x1102, .device = 0x0008,
1494 	 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]",
1495 	 .id = "Audigy2",
1496 	 .emu10k2_chip = 1,
1497 	 .ca0108_chip = 1,
1498 	 .ac97_chip = 1} ,
1499 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1500 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1501 	 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]",
1502 	 .id = "Audigy2",
1503 	 .emu10k2_chip = 1,
1504 	 .ca0102_chip = 1,
1505 	 .ca0151_chip = 1,
1506 	 .spk71 = 1,
1507 	 .spdif_bug = 1,
1508 	 .ac97_chip = 1} ,
1509 	/* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1510 	/* The 0x20061102 does have SB0350 written on it
1511 	 * Just like 0x20021102
1512 	 */
1513 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1514 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]",
1515 	 .id = "Audigy2",
1516 	 .emu10k2_chip = 1,
1517 	 .ca0102_chip = 1,
1518 	 .ca0151_chip = 1,
1519 	 .spk71 = 1,
1520 	 .spdif_bug = 1,
1521 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1522 	 .ac97_chip = 1} ,
1523 	/* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by
1524 	   Creative's Windows driver */
1525 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102,
1526 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]",
1527 	 .id = "Audigy2",
1528 	 .emu10k2_chip = 1,
1529 	 .ca0102_chip = 1,
1530 	 .ca0151_chip = 1,
1531 	 .spk71 = 1,
1532 	 .spdif_bug = 1,
1533 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1534 	 .ac97_chip = 1} ,
1535 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1536 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]",
1537 	 .id = "Audigy2",
1538 	 .emu10k2_chip = 1,
1539 	 .ca0102_chip = 1,
1540 	 .ca0151_chip = 1,
1541 	 .spk71 = 1,
1542 	 .spdif_bug = 1,
1543 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1544 	 .ac97_chip = 1} ,
1545 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1546 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]",
1547 	 .id = "Audigy2",
1548 	 .emu10k2_chip = 1,
1549 	 .ca0102_chip = 1,
1550 	 .ca0151_chip = 1,
1551 	 .spk71 = 1,
1552 	 .spdif_bug = 1,
1553 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1554 	 .ac97_chip = 1} ,
1555 	/* Audigy 2 */
1556 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1557 	/* DSP: CA0102-IAT
1558 	 * DAC: CS4382-KQ
1559 	 * ADC: Philips 1361T
1560 	 * AC97: STAC9721
1561 	 * CA0151: Yes
1562 	 */
1563 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1564 	 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]",
1565 	 .id = "Audigy2",
1566 	 .emu10k2_chip = 1,
1567 	 .ca0102_chip = 1,
1568 	 .ca0151_chip = 1,
1569 	 .spk71 = 1,
1570 	 .spdif_bug = 1,
1571 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1572 	 .ac97_chip = 1} ,
1573 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1574 	 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]",
1575 	 .id = "Audigy2",
1576 	 .emu10k2_chip = 1,
1577 	 .ca0102_chip = 1,
1578 	 .ca0151_chip = 1,
1579 	 .spk71 = 1,
1580 	 .spdif_bug = 1} ,
1581 	/* Dell OEM/Creative Labs Audigy 2 ZS */
1582 	/* See ALSA bug#1365 */
1583 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1584 	 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]",
1585 	 .id = "Audigy2",
1586 	 .emu10k2_chip = 1,
1587 	 .ca0102_chip = 1,
1588 	 .ca0151_chip = 1,
1589 	 .spk71 = 1,
1590 	 .spdif_bug = 1,
1591 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1592 	 .ac97_chip = 1} ,
1593 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1594 	 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]",
1595 	 .id = "Audigy2",
1596 	 .emu10k2_chip = 1,
1597 	 .ca0102_chip = 1,
1598 	 .ca0151_chip = 1,
1599 	 .spk71 = 1,
1600 	 .spdif_bug = 1,
1601 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1602 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1603 	 .ac97_chip = 1} ,
1604 	{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1605 	 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]",
1606 	 .id = "Audigy2",
1607 	 .emu10k2_chip = 1,
1608 	 .ca0102_chip = 1,
1609 	 .ca0151_chip = 1,
1610 	 .spdif_bug = 1,
1611 	 .ac97_chip = 1} ,
1612 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1613 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]",
1614 	 .id = "Audigy",
1615 	 .emu10k2_chip = 1,
1616 	 .ca0102_chip = 1,
1617 	 .ac97_chip = 1} ,
1618 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1619 	 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]",
1620 	 .id = "Audigy",
1621 	 .emu10k2_chip = 1,
1622 	 .ca0102_chip = 1,
1623 	 .spdif_bug = 1,
1624 	 .ac97_chip = 1} ,
1625 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1626 	 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]",
1627 	 .id = "Audigy",
1628 	 .emu10k2_chip = 1,
1629 	 .ca0102_chip = 1,
1630 	 .ac97_chip = 1} ,
1631 	{.vendor = 0x1102, .device = 0x0004,
1632 	 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1633 	 .id = "Audigy",
1634 	 .emu10k2_chip = 1,
1635 	 .ca0102_chip = 1,
1636 	 .ac97_chip = 1} ,
1637 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1638 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1639 	 .id = "Live",
1640 	 .emu10k1_chip = 1,
1641 	 .ac97_chip = 1,
1642 	 .sblive51 = 1} ,
1643 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102,
1644 	 .driver = "EMU10K1", .name = "SB Live! [SB0105]",
1645 	 .id = "Live",
1646 	 .emu10k1_chip = 1,
1647 	 .ac97_chip = 1,
1648 	 .sblive51 = 1} ,
1649 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102,
1650 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]",
1651 	 .id = "Live",
1652 	 .emu10k1_chip = 1,
1653 	 .ac97_chip = 1,
1654 	 .sblive51 = 1} ,
1655 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1656 	 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]",
1657 	 .id = "Live",
1658 	 .emu10k1_chip = 1,
1659 	 .ac97_chip = 1,
1660 	 .sblive51 = 1} ,
1661 	/* Tested by ALSA bug#1680 26th December 2005 */
1662 	/* note: It really has SB0220 written on the card, */
1663 	/* but it's SB0228 according to kx.inf */
1664 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1665 	 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]",
1666 	 .id = "Live",
1667 	 .emu10k1_chip = 1,
1668 	 .ac97_chip = 1,
1669 	 .sblive51 = 1} ,
1670 	/* Tested by Thomas Zehetbauer 27th Aug 2005 */
1671 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1672 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]",
1673 	 .id = "Live",
1674 	 .emu10k1_chip = 1,
1675 	 .ac97_chip = 1,
1676 	 .sblive51 = 1} ,
1677 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1678 	 .driver = "EMU10K1", .name = "SB Live! 5.1",
1679 	 .id = "Live",
1680 	 .emu10k1_chip = 1,
1681 	 .ac97_chip = 1,
1682 	 .sblive51 = 1} ,
1683 	/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1684 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1685 	 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]",
1686 	 .id = "Live",
1687 	 .emu10k1_chip = 1,
1688 	 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1689 			  * share the same IDs!
1690 			  */
1691 	 .sblive51 = 1} ,
1692 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1693 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]",
1694 	 .id = "Live",
1695 	 .emu10k1_chip = 1,
1696 	 .ac97_chip = 1,
1697 	 .sblive51 = 1} ,
1698 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1699 	 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]",
1700 	 .id = "Live",
1701 	 .emu10k1_chip = 1,
1702 	 .ac97_chip = 1} ,
1703 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1704 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]",
1705 	 .id = "Live",
1706 	 .emu10k1_chip = 1,
1707 	 .ac97_chip = 1,
1708 	 .sblive51 = 1} ,
1709 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1710 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]",
1711 	 .id = "Live",
1712 	 .emu10k1_chip = 1,
1713 	 .ac97_chip = 1,
1714 	 .sblive51 = 1} ,
1715 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1716 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]",
1717 	 .id = "Live",
1718 	 .emu10k1_chip = 1,
1719 	 .ac97_chip = 1,
1720 	 .sblive51 = 1} ,
1721 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1722 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1723 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]",
1724 	 .id = "Live",
1725 	 .emu10k1_chip = 1,
1726 	 .ac97_chip = 1,
1727 	 .sblive51 = 1} ,
1728 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1729 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]",
1730 	 .id = "Live",
1731 	 .emu10k1_chip = 1,
1732 	 .ac97_chip = 1,
1733 	 .sblive51 = 1} ,
1734 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1735 	 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1736 	 .id = "Live",
1737 	 .emu10k1_chip = 1,
1738 	 .ac97_chip = 1,
1739 	 .sblive51 = 1} ,
1740 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1741 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]",
1742 	 .id = "Live",
1743 	 .emu10k1_chip = 1,
1744 	 .ac97_chip = 1,
1745 	 .sblive51 = 1} ,
1746 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1747 	 .driver = "EMU10K1", .name = "E-mu APS [PC545]",
1748 	 .id = "APS",
1749 	 .emu10k1_chip = 1,
1750 	 .ecard = 1} ,
1751 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1752 	 .driver = "EMU10K1", .name = "SB Live! [CT4620]",
1753 	 .id = "Live",
1754 	 .emu10k1_chip = 1,
1755 	 .ac97_chip = 1,
1756 	 .sblive51 = 1} ,
1757 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1758 	 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]",
1759 	 .id = "Live",
1760 	 .emu10k1_chip = 1,
1761 	 .ac97_chip = 1,
1762 	 .sblive51 = 1} ,
1763 	{.vendor = 0x1102, .device = 0x0002,
1764 	 .driver = "EMU10K1", .name = "SB Live! [Unknown]",
1765 	 .id = "Live",
1766 	 .emu10k1_chip = 1,
1767 	 .ac97_chip = 1,
1768 	 .sblive51 = 1} ,
1769 	{ } /* terminator */
1770 };
1771 
1772 int snd_emu10k1_create(struct snd_card *card,
1773 		       struct pci_dev *pci,
1774 		       unsigned short extin_mask,
1775 		       unsigned short extout_mask,
1776 		       long max_cache_bytes,
1777 		       int enable_ir,
1778 		       uint subsystem,
1779 		       struct snd_emu10k1 **remu)
1780 {
1781 	struct snd_emu10k1 *emu;
1782 	int idx, err;
1783 	int is_audigy;
1784 	unsigned int silent_page;
1785 	const struct snd_emu_chip_details *c;
1786 	static struct snd_device_ops ops = {
1787 		.dev_free =	snd_emu10k1_dev_free,
1788 	};
1789 
1790 	*remu = NULL;
1791 
1792 	/* enable PCI device */
1793 	err = pci_enable_device(pci);
1794 	if (err < 0)
1795 		return err;
1796 
1797 	emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1798 	if (emu == NULL) {
1799 		pci_disable_device(pci);
1800 		return -ENOMEM;
1801 	}
1802 	emu->card = card;
1803 	spin_lock_init(&emu->reg_lock);
1804 	spin_lock_init(&emu->emu_lock);
1805 	spin_lock_init(&emu->spi_lock);
1806 	spin_lock_init(&emu->i2c_lock);
1807 	spin_lock_init(&emu->voice_lock);
1808 	spin_lock_init(&emu->synth_lock);
1809 	spin_lock_init(&emu->memblk_lock);
1810 	mutex_init(&emu->fx8010.lock);
1811 	INIT_LIST_HEAD(&emu->mapped_link_head);
1812 	INIT_LIST_HEAD(&emu->mapped_order_link_head);
1813 	emu->pci = pci;
1814 	emu->irq = -1;
1815 	emu->synth = NULL;
1816 	emu->get_synth_voice = NULL;
1817 	/* read revision & serial */
1818 	emu->revision = pci->revision;
1819 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1820 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1821 	dev_dbg(card->dev,
1822 		"vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n",
1823 		pci->vendor, pci->device, emu->serial, emu->model);
1824 
1825 	for (c = emu_chip_details; c->vendor; c++) {
1826 		if (c->vendor == pci->vendor && c->device == pci->device) {
1827 			if (subsystem) {
1828 				if (c->subsystem && (c->subsystem == subsystem))
1829 					break;
1830 				else
1831 					continue;
1832 			} else {
1833 				if (c->subsystem && (c->subsystem != emu->serial))
1834 					continue;
1835 				if (c->revision && c->revision != emu->revision)
1836 					continue;
1837 			}
1838 			break;
1839 		}
1840 	}
1841 	if (c->vendor == 0) {
1842 		dev_err(card->dev, "emu10k1: Card not recognised\n");
1843 		kfree(emu);
1844 		pci_disable_device(pci);
1845 		return -ENOENT;
1846 	}
1847 	emu->card_capabilities = c;
1848 	if (c->subsystem && !subsystem)
1849 		dev_dbg(card->dev, "Sound card name = %s\n", c->name);
1850 	else if (subsystem)
1851 		dev_dbg(card->dev, "Sound card name = %s, "
1852 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x. "
1853 			"Forced to subsystem = 0x%x\n",	c->name,
1854 			pci->vendor, pci->device, emu->serial, c->subsystem);
1855 	else
1856 		dev_dbg(card->dev, "Sound card name = %s, "
1857 			"vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n",
1858 			c->name, pci->vendor, pci->device,
1859 			emu->serial);
1860 
1861 	if (!*card->id && c->id) {
1862 		int i, n = 0;
1863 		strlcpy(card->id, c->id, sizeof(card->id));
1864 		for (;;) {
1865 			for (i = 0; i < snd_ecards_limit; i++) {
1866 				if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1867 					break;
1868 			}
1869 			if (i >= snd_ecards_limit)
1870 				break;
1871 			n++;
1872 			if (n >= SNDRV_CARDS)
1873 				break;
1874 			snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1875 		}
1876 	}
1877 
1878 	is_audigy = emu->audigy = c->emu10k2_chip;
1879 
1880 	/* set the DMA transfer mask */
1881 	emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1882 	if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1883 	    pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1884 		dev_err(card->dev,
1885 			"architecture does not support PCI busmaster DMA with mask 0x%lx\n",
1886 			emu->dma_mask);
1887 		kfree(emu);
1888 		pci_disable_device(pci);
1889 		return -ENXIO;
1890 	}
1891 	if (is_audigy)
1892 		emu->gpr_base = A_FXGPREGBASE;
1893 	else
1894 		emu->gpr_base = FXGPREGBASE;
1895 
1896 	err = pci_request_regions(pci, "EMU10K1");
1897 	if (err < 0) {
1898 		kfree(emu);
1899 		pci_disable_device(pci);
1900 		return err;
1901 	}
1902 	emu->port = pci_resource_start(pci, 0);
1903 
1904 	emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1905 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1906 				32 * 1024, &emu->ptb_pages) < 0) {
1907 		err = -ENOMEM;
1908 		goto error;
1909 	}
1910 
1911 	emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1912 	emu->page_addr_table = vmalloc(emu->max_cache_pages *
1913 				       sizeof(unsigned long));
1914 	if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1915 		err = -ENOMEM;
1916 		goto error;
1917 	}
1918 
1919 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1920 				EMUPAGESIZE, &emu->silent_page) < 0) {
1921 		err = -ENOMEM;
1922 		goto error;
1923 	}
1924 	emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1925 	if (emu->memhdr == NULL) {
1926 		err = -ENOMEM;
1927 		goto error;
1928 	}
1929 	emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1930 		sizeof(struct snd_util_memblk);
1931 
1932 	pci_set_master(pci);
1933 
1934 	emu->fx8010.fxbus_mask = 0x303f;
1935 	if (extin_mask == 0)
1936 		extin_mask = 0x3fcf;
1937 	if (extout_mask == 0)
1938 		extout_mask = 0x7fff;
1939 	emu->fx8010.extin_mask = extin_mask;
1940 	emu->fx8010.extout_mask = extout_mask;
1941 	emu->enable_ir = enable_ir;
1942 
1943 	if (emu->card_capabilities->ca_cardbus_chip) {
1944 		err = snd_emu10k1_cardbus_init(emu);
1945 		if (err < 0)
1946 			goto error;
1947 	}
1948 	if (emu->card_capabilities->ecard) {
1949 		err = snd_emu10k1_ecard_init(emu);
1950 		if (err < 0)
1951 			goto error;
1952 	} else if (emu->card_capabilities->emu_model) {
1953 		err = snd_emu10k1_emu1010_init(emu);
1954 		if (err < 0) {
1955 			snd_emu10k1_free(emu);
1956 			return err;
1957 		}
1958 	} else {
1959 		/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1960 			does not support this, it shouldn't do any harm */
1961 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0,
1962 					AC97SLOT_CNTR|AC97SLOT_LFE);
1963 	}
1964 
1965 	/* initialize TRAM setup */
1966 	emu->fx8010.itram_size = (16 * 1024)/2;
1967 	emu->fx8010.etram_pages.area = NULL;
1968 	emu->fx8010.etram_pages.bytes = 0;
1969 
1970 	/* irq handler must be registered after I/O ports are activated */
1971 	if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1972 			KBUILD_MODNAME, emu)) {
1973 		err = -EBUSY;
1974 		goto error;
1975 	}
1976 	emu->irq = pci->irq;
1977 
1978 	/*
1979 	 *  Init to 0x02109204 :
1980 	 *  Clock accuracy    = 0     (1000ppm)
1981 	 *  Sample Rate       = 2     (48kHz)
1982 	 *  Audio Channel     = 1     (Left of 2)
1983 	 *  Source Number     = 0     (Unspecified)
1984 	 *  Generation Status = 1     (Original for Cat Code 12)
1985 	 *  Cat Code          = 12    (Digital Signal Mixer)
1986 	 *  Mode              = 0     (Mode 0)
1987 	 *  Emphasis          = 0     (None)
1988 	 *  CP                = 1     (Copyright unasserted)
1989 	 *  AN                = 0     (Audio data)
1990 	 *  P                 = 0     (Consumer)
1991 	 */
1992 	emu->spdif_bits[0] = emu->spdif_bits[1] =
1993 		emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1994 		SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1995 		SPCS_GENERATIONSTATUS | 0x00001200 |
1996 		0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1997 
1998 	emu->reserved_page = (struct snd_emu10k1_memblk *)
1999 		snd_emu10k1_synth_alloc(emu, 4096);
2000 	if (emu->reserved_page)
2001 		emu->reserved_page->map_locked = 1;
2002 
2003 	/* Clear silent pages and set up pointers */
2004 	memset(emu->silent_page.area, 0, PAGE_SIZE);
2005 	silent_page = emu->silent_page.addr << 1;
2006 	for (idx = 0; idx < MAXPAGES; idx++)
2007 		((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
2008 
2009 	/* set up voice indices */
2010 	for (idx = 0; idx < NUM_G; idx++) {
2011 		emu->voices[idx].emu = emu;
2012 		emu->voices[idx].number = idx;
2013 	}
2014 
2015 	err = snd_emu10k1_init(emu, enable_ir, 0);
2016 	if (err < 0)
2017 		goto error;
2018 #ifdef CONFIG_PM_SLEEP
2019 	err = alloc_pm_buffer(emu);
2020 	if (err < 0)
2021 		goto error;
2022 #endif
2023 
2024 	/*  Initialize the effect engine */
2025 	err = snd_emu10k1_init_efx(emu);
2026 	if (err < 0)
2027 		goto error;
2028 	snd_emu10k1_audio_enable(emu);
2029 
2030 	err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops);
2031 	if (err < 0)
2032 		goto error;
2033 
2034 #ifdef CONFIG_PROC_FS
2035 	snd_emu10k1_proc_init(emu);
2036 #endif
2037 
2038 	*remu = emu;
2039 	return 0;
2040 
2041  error:
2042 	snd_emu10k1_free(emu);
2043 	return err;
2044 }
2045 
2046 #ifdef CONFIG_PM_SLEEP
2047 static unsigned char saved_regs[] = {
2048 	CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
2049 	FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
2050 	ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
2051 	TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
2052 	MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
2053 	SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
2054 	0xff /* end */
2055 };
2056 static unsigned char saved_regs_audigy[] = {
2057 	A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
2058 	A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
2059 	0xff /* end */
2060 };
2061 
2062 static int alloc_pm_buffer(struct snd_emu10k1 *emu)
2063 {
2064 	int size;
2065 
2066 	size = ARRAY_SIZE(saved_regs);
2067 	if (emu->audigy)
2068 		size += ARRAY_SIZE(saved_regs_audigy);
2069 	emu->saved_ptr = vmalloc(4 * NUM_G * size);
2070 	if (!emu->saved_ptr)
2071 		return -ENOMEM;
2072 	if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
2073 		return -ENOMEM;
2074 	if (emu->card_capabilities->ca0151_chip &&
2075 	    snd_p16v_alloc_pm_buffer(emu) < 0)
2076 		return -ENOMEM;
2077 	return 0;
2078 }
2079 
2080 static void free_pm_buffer(struct snd_emu10k1 *emu)
2081 {
2082 	vfree(emu->saved_ptr);
2083 	snd_emu10k1_efx_free_pm_buffer(emu);
2084 	if (emu->card_capabilities->ca0151_chip)
2085 		snd_p16v_free_pm_buffer(emu);
2086 }
2087 
2088 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2089 {
2090 	int i;
2091 	unsigned char *reg;
2092 	unsigned int *val;
2093 
2094 	val = emu->saved_ptr;
2095 	for (reg = saved_regs; *reg != 0xff; reg++)
2096 		for (i = 0; i < NUM_G; i++, val++)
2097 			*val = snd_emu10k1_ptr_read(emu, *reg, i);
2098 	if (emu->audigy) {
2099 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2100 			for (i = 0; i < NUM_G; i++, val++)
2101 				*val = snd_emu10k1_ptr_read(emu, *reg, i);
2102 	}
2103 	if (emu->audigy)
2104 		emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2105 	emu->saved_hcfg = inl(emu->port + HCFG);
2106 }
2107 
2108 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2109 {
2110 	if (emu->card_capabilities->ca_cardbus_chip)
2111 		snd_emu10k1_cardbus_init(emu);
2112 	if (emu->card_capabilities->ecard)
2113 		snd_emu10k1_ecard_init(emu);
2114 	else if (emu->card_capabilities->emu_model)
2115 		snd_emu10k1_emu1010_init(emu);
2116 	else
2117 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2118 	snd_emu10k1_init(emu, emu->enable_ir, 1);
2119 }
2120 
2121 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2122 {
2123 	int i;
2124 	unsigned char *reg;
2125 	unsigned int *val;
2126 
2127 	snd_emu10k1_audio_enable(emu);
2128 
2129 	/* resore for spdif */
2130 	if (emu->audigy)
2131 		outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2132 	outl(emu->saved_hcfg, emu->port + HCFG);
2133 
2134 	val = emu->saved_ptr;
2135 	for (reg = saved_regs; *reg != 0xff; reg++)
2136 		for (i = 0; i < NUM_G; i++, val++)
2137 			snd_emu10k1_ptr_write(emu, *reg, i, *val);
2138 	if (emu->audigy) {
2139 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2140 			for (i = 0; i < NUM_G; i++, val++)
2141 				snd_emu10k1_ptr_write(emu, *reg, i, *val);
2142 	}
2143 }
2144 #endif
2145