1 /* 2 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 3 * Creative Labs, Inc. 4 * Routines for control of EMU10K1 chips 5 * 6 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 7 * Added support for Audigy 2 Value. 8 * Added EMU 1010 support. 9 * General bug fixes and enhancements. 10 * 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 * 18 * This program is free software; you can redistribute it and/or modify 19 * it under the terms of the GNU General Public License as published by 20 * the Free Software Foundation; either version 2 of the License, or 21 * (at your option) any later version. 22 * 23 * This program is distributed in the hope that it will be useful, 24 * but WITHOUT ANY WARRANTY; without even the implied warranty of 25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 26 * GNU General Public License for more details. 27 * 28 * You should have received a copy of the GNU General Public License 29 * along with this program; if not, write to the Free Software 30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 31 * 32 */ 33 34 #include <linux/sched.h> 35 #include <linux/kthread.h> 36 #include <linux/delay.h> 37 #include <linux/init.h> 38 #include <linux/module.h> 39 #include <linux/interrupt.h> 40 #include <linux/pci.h> 41 #include <linux/slab.h> 42 #include <linux/vmalloc.h> 43 #include <linux/mutex.h> 44 45 46 #include <sound/core.h> 47 #include <sound/emu10k1.h> 48 #include <linux/firmware.h> 49 #include "p16v.h" 50 #include "tina2.h" 51 #include "p17v.h" 52 53 54 #define HANA_FILENAME "emu/hana.fw" 55 #define DOCK_FILENAME "emu/audio_dock.fw" 56 #define EMU1010B_FILENAME "emu/emu1010b.fw" 57 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 58 #define EMU0404_FILENAME "emu/emu0404.fw" 59 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 60 61 MODULE_FIRMWARE(HANA_FILENAME); 62 MODULE_FIRMWARE(DOCK_FILENAME); 63 MODULE_FIRMWARE(EMU1010B_FILENAME); 64 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 65 MODULE_FIRMWARE(EMU0404_FILENAME); 66 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 67 68 69 /************************************************************************* 70 * EMU10K1 init / done 71 *************************************************************************/ 72 73 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 74 { 75 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 76 snd_emu10k1_ptr_write(emu, IP, ch, 0); 77 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff); 78 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff); 79 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 80 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 81 snd_emu10k1_ptr_write(emu, CCR, ch, 0); 82 83 snd_emu10k1_ptr_write(emu, PSST, ch, 0); 84 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10); 85 snd_emu10k1_ptr_write(emu, CCCA, ch, 0); 86 snd_emu10k1_ptr_write(emu, Z1, ch, 0); 87 snd_emu10k1_ptr_write(emu, Z2, ch, 0); 88 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000); 89 90 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0); 91 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0); 92 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff); 93 snd_emu10k1_ptr_write(emu, PEFE, ch, 0); 94 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0); 95 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */ 96 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */ 97 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0); 98 99 /*** these are last so OFF prevents writing ***/ 100 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0); 101 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0); 102 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0); 103 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0); 104 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0); 105 106 /* Audigy extra stuffs */ 107 if (emu->audigy) { 108 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */ 109 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */ 110 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */ 111 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */ 112 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100); 113 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f); 114 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0); 115 } 116 } 117 118 static unsigned int spi_dac_init[] = { 119 0x00ff, 120 0x02ff, 121 0x0400, 122 0x0520, 123 0x0600, 124 0x08ff, 125 0x0aff, 126 0x0cff, 127 0x0eff, 128 0x10ff, 129 0x1200, 130 0x1400, 131 0x1480, 132 0x1800, 133 0x1aff, 134 0x1cff, 135 0x1e00, 136 0x0530, 137 0x0602, 138 0x0622, 139 0x1400, 140 }; 141 142 static unsigned int i2c_adc_init[][2] = { 143 { 0x17, 0x00 }, /* Reset */ 144 { 0x07, 0x00 }, /* Timeout */ 145 { 0x0b, 0x22 }, /* Interface control */ 146 { 0x0c, 0x22 }, /* Master mode control */ 147 { 0x0d, 0x08 }, /* Powerdown control */ 148 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 149 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 150 { 0x10, 0x7b }, /* ALC Control 1 */ 151 { 0x11, 0x00 }, /* ALC Control 2 */ 152 { 0x12, 0x32 }, /* ALC Control 3 */ 153 { 0x13, 0x00 }, /* Noise gate control */ 154 { 0x14, 0xa6 }, /* Limiter control */ 155 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 156 }; 157 158 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume) 159 { 160 unsigned int silent_page; 161 int ch; 162 u32 tmp; 163 164 /* disable audio and lock cache */ 165 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 166 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 167 168 /* reset recording buffers */ 169 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE); 170 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 171 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE); 172 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 173 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 174 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 175 176 /* disable channel interrupt */ 177 outl(0, emu->port + INTE); 178 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 179 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 180 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 181 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 182 183 if (emu->audigy) { 184 /* set SPDIF bypass mode */ 185 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 186 /* enable rear left + rear right AC97 slots */ 187 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 188 AC97SLOT_REAR_LEFT); 189 } 190 191 /* init envelope engine */ 192 for (ch = 0; ch < NUM_G; ch++) 193 snd_emu10k1_voice_init(emu, ch); 194 195 snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]); 196 snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]); 197 snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]); 198 199 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 200 /* Hacks for Alice3 to work independent of haP16V driver */ 201 /* Setup SRCMulti_I2S SamplingRate */ 202 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); 203 tmp &= 0xfffff1ff; 204 tmp |= (0x2<<9); 205 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); 206 207 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 208 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 209 /* Setup SRCMulti Input Audio Enable */ 210 /* Use 0xFFFFFFFF to enable P16V sounds. */ 211 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 212 213 /* Enabled Phased (8-channel) P16V playback */ 214 outl(0x0201, emu->port + HCFG2); 215 /* Set playback routing. */ 216 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 217 } 218 if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 219 /* Hacks for Alice3 to work independent of haP16V driver */ 220 snd_printk(KERN_INFO "Audigy2 value: Special config.\n"); 221 /* Setup SRCMulti_I2S SamplingRate */ 222 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0); 223 tmp &= 0xfffff1ff; 224 tmp |= (0x2<<9); 225 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp); 226 227 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 228 outl(0x600000, emu->port + 0x20); 229 outl(0x14, emu->port + 0x24); 230 231 /* Setup SRCMulti Input Audio Enable */ 232 outl(0x7b0000, emu->port + 0x20); 233 outl(0xFF000000, emu->port + 0x24); 234 235 /* Setup SPDIF Out Audio Enable */ 236 /* The Audigy 2 Value has a separate SPDIF out, 237 * so no need for a mixer switch 238 */ 239 outl(0x7a0000, emu->port + 0x20); 240 outl(0xFF000000, emu->port + 0x24); 241 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 242 outl(tmp, emu->port + A_IOCFG); 243 } 244 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 245 int size, n; 246 247 size = ARRAY_SIZE(spi_dac_init); 248 for (n = 0; n < size; n++) 249 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 250 251 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 252 /* Enable GPIOs 253 * GPIO0: Unknown 254 * GPIO1: Speakers-enabled. 255 * GPIO2: Unknown 256 * GPIO3: Unknown 257 * GPIO4: IEC958 Output on. 258 * GPIO5: Unknown 259 * GPIO6: Unknown 260 * GPIO7: Unknown 261 */ 262 outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 263 } 264 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 265 int size, n; 266 267 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 268 tmp = inl(emu->port + A_IOCFG); 269 outl(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 270 tmp = inl(emu->port + A_IOCFG); 271 size = ARRAY_SIZE(i2c_adc_init); 272 for (n = 0; n < size; n++) 273 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 274 for (n = 0; n < 4; n++) { 275 emu->i2c_capture_volume[n][0] = 0xcf; 276 emu->i2c_capture_volume[n][1] = 0xcf; 277 } 278 } 279 280 281 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 282 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 283 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */ 284 285 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK; 286 for (ch = 0; ch < NUM_G; ch++) { 287 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 288 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 289 } 290 291 if (emu->card_capabilities->emu_model) { 292 outl(HCFG_AUTOMUTE_ASYNC | 293 HCFG_EMU32_SLAVE | 294 HCFG_AUDIOENABLE, emu->port + HCFG); 295 /* 296 * Hokay, setup HCFG 297 * Mute Disable Audio = 0 298 * Lock Tank Memory = 1 299 * Lock Sound Memory = 0 300 * Auto Mute = 1 301 */ 302 } else if (emu->audigy) { 303 if (emu->revision == 4) /* audigy2 */ 304 outl(HCFG_AUDIOENABLE | 305 HCFG_AC3ENABLE_CDSPDIF | 306 HCFG_AC3ENABLE_GPSPDIF | 307 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 308 else 309 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 310 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 311 * e.g. card_capabilities->joystick */ 312 } else if (emu->model == 0x20 || 313 emu->model == 0xc400 || 314 (emu->model == 0x21 && emu->revision < 6)) 315 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 316 else 317 /* With on-chip joystick */ 318 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 319 320 if (enable_ir) { /* enable IR for SB Live */ 321 if (emu->card_capabilities->emu_model) { 322 ; /* Disable all access to A_IOCFG for the emu1010 */ 323 } else if (emu->card_capabilities->i2c_adc) { 324 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 325 } else if (emu->audigy) { 326 unsigned int reg = inl(emu->port + A_IOCFG); 327 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 328 udelay(500); 329 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 330 udelay(100); 331 outl(reg, emu->port + A_IOCFG); 332 } else { 333 unsigned int reg = inl(emu->port + HCFG); 334 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 335 udelay(500); 336 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 337 udelay(100); 338 outl(reg, emu->port + HCFG); 339 } 340 } 341 342 if (emu->card_capabilities->emu_model) { 343 ; /* Disable all access to A_IOCFG for the emu1010 */ 344 } else if (emu->card_capabilities->i2c_adc) { 345 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 346 } else if (emu->audigy) { /* enable analog output */ 347 unsigned int reg = inl(emu->port + A_IOCFG); 348 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 349 } 350 351 return 0; 352 } 353 354 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 355 { 356 /* 357 * Enable the audio bit 358 */ 359 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 360 361 /* Enable analog/digital outs on audigy */ 362 if (emu->card_capabilities->emu_model) { 363 ; /* Disable all access to A_IOCFG for the emu1010 */ 364 } else if (emu->card_capabilities->i2c_adc) { 365 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 366 } else if (emu->audigy) { 367 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 368 369 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 370 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 371 * This has to be done after init ALice3 I2SOut beyond 48KHz. 372 * So, sequence is important. */ 373 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 374 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 375 /* Unmute Analog now. */ 376 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 377 } else { 378 /* Disable routing from AC97 line out to Front speakers */ 379 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 380 } 381 } 382 383 #if 0 384 { 385 unsigned int tmp; 386 /* FIXME: the following routine disables LiveDrive-II !! */ 387 /* TOSLink detection */ 388 emu->tos_link = 0; 389 tmp = inl(emu->port + HCFG); 390 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 391 outl(tmp|0x800, emu->port + HCFG); 392 udelay(50); 393 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 394 emu->tos_link = 1; 395 outl(tmp, emu->port + HCFG); 396 } 397 } 398 } 399 #endif 400 401 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 402 } 403 404 int snd_emu10k1_done(struct snd_emu10k1 *emu) 405 { 406 int ch; 407 408 outl(0, emu->port + INTE); 409 410 /* 411 * Shutdown the chip 412 */ 413 for (ch = 0; ch < NUM_G; ch++) 414 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0); 415 for (ch = 0; ch < NUM_G; ch++) { 416 snd_emu10k1_ptr_write(emu, VTFT, ch, 0); 417 snd_emu10k1_ptr_write(emu, CVCF, ch, 0); 418 snd_emu10k1_ptr_write(emu, PTRX, ch, 0); 419 snd_emu10k1_ptr_write(emu, CPF, ch, 0); 420 } 421 422 /* reset recording buffers */ 423 snd_emu10k1_ptr_write(emu, MICBS, 0, 0); 424 snd_emu10k1_ptr_write(emu, MICBA, 0, 0); 425 snd_emu10k1_ptr_write(emu, FXBS, 0, 0); 426 snd_emu10k1_ptr_write(emu, FXBA, 0, 0); 427 snd_emu10k1_ptr_write(emu, FXWC, 0, 0); 428 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE); 429 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0); 430 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K); 431 snd_emu10k1_ptr_write(emu, TCB, 0, 0); 432 if (emu->audigy) 433 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 434 else 435 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 436 437 /* disable channel interrupt */ 438 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0); 439 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0); 440 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0); 441 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0); 442 443 /* disable audio and lock cache */ 444 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 445 snd_emu10k1_ptr_write(emu, PTB, 0, 0); 446 447 return 0; 448 } 449 450 /************************************************************************* 451 * ECARD functional implementation 452 *************************************************************************/ 453 454 /* In A1 Silicon, these bits are in the HC register */ 455 #define HOOKN_BIT (1L << 12) 456 #define HANDN_BIT (1L << 11) 457 #define PULSEN_BIT (1L << 10) 458 459 #define EC_GDI1 (1 << 13) 460 #define EC_GDI0 (1 << 14) 461 462 #define EC_NUM_CONTROL_BITS 20 463 464 #define EC_AC3_DATA_SELN 0x0001L 465 #define EC_EE_DATA_SEL 0x0002L 466 #define EC_EE_CNTRL_SELN 0x0004L 467 #define EC_EECLK 0x0008L 468 #define EC_EECS 0x0010L 469 #define EC_EESDO 0x0020L 470 #define EC_TRIM_CSN 0x0040L 471 #define EC_TRIM_SCLK 0x0080L 472 #define EC_TRIM_SDATA 0x0100L 473 #define EC_TRIM_MUTEN 0x0200L 474 #define EC_ADCCAL 0x0400L 475 #define EC_ADCRSTN 0x0800L 476 #define EC_DACCAL 0x1000L 477 #define EC_DACMUTEN 0x2000L 478 #define EC_LEDN 0x4000L 479 480 #define EC_SPDIF0_SEL_SHIFT 15 481 #define EC_SPDIF1_SEL_SHIFT 17 482 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 483 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 484 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 485 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 486 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 487 * be incremented any time the EEPROM's 488 * format is changed. */ 489 490 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 491 492 /* Addresses for special values stored in to EEPROM */ 493 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 494 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 495 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 496 497 #define EC_LAST_PROMFILE_ADDR 0x2f 498 499 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 500 * can be up to 30 characters in length 501 * and is stored as a NULL-terminated 502 * ASCII string. Any unused bytes must be 503 * filled with zeros */ 504 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 505 506 507 /* Most of this stuff is pretty self-evident. According to the hardware 508 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 509 * offset problem. Weird. 510 */ 511 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 512 EC_TRIM_CSN) 513 514 515 #define EC_DEFAULT_ADC_GAIN 0xC4C4 516 #define EC_DEFAULT_SPDIF0_SEL 0x0 517 #define EC_DEFAULT_SPDIF1_SEL 0x4 518 519 /************************************************************************** 520 * @func Clock bits into the Ecard's control latch. The Ecard uses a 521 * control latch will is loaded bit-serially by toggling the Modem control 522 * lines from function 2 on the E8010. This function hides these details 523 * and presents the illusion that we are actually writing to a distinct 524 * register. 525 */ 526 527 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 528 { 529 unsigned short count; 530 unsigned int data; 531 unsigned long hc_port; 532 unsigned int hc_value; 533 534 hc_port = emu->port + HCFG; 535 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 536 outl(hc_value, hc_port); 537 538 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 539 540 /* Set up the value */ 541 data = ((value & 0x1) ? PULSEN_BIT : 0); 542 value >>= 1; 543 544 outl(hc_value | data, hc_port); 545 546 /* Clock the shift register */ 547 outl(hc_value | data | HANDN_BIT, hc_port); 548 outl(hc_value | data, hc_port); 549 } 550 551 /* Latch the bits */ 552 outl(hc_value | HOOKN_BIT, hc_port); 553 outl(hc_value, hc_port); 554 } 555 556 /************************************************************************** 557 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 558 * trim value consists of a 16bit value which is composed of two 559 * 8 bit gain/trim values, one for the left channel and one for the 560 * right channel. The following table maps from the Gain/Attenuation 561 * value in decibels into the corresponding bit pattern for a single 562 * channel. 563 */ 564 565 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 566 unsigned short gain) 567 { 568 unsigned int bit; 569 570 /* Enable writing to the TRIM registers */ 571 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 572 573 /* Do it again to insure that we meet hold time requirements */ 574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 575 576 for (bit = (1 << 15); bit; bit >>= 1) { 577 unsigned int value; 578 579 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 580 581 if (gain & bit) 582 value |= EC_TRIM_SDATA; 583 584 /* Clock the bit */ 585 snd_emu10k1_ecard_write(emu, value); 586 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 587 snd_emu10k1_ecard_write(emu, value); 588 } 589 590 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 591 } 592 593 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 594 { 595 unsigned int hc_value; 596 597 /* Set up the initial settings */ 598 emu->ecard_ctrl = EC_RAW_RUN_MODE | 599 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 600 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 601 602 /* Step 0: Set the codec type in the hardware control register 603 * and enable audio output */ 604 hc_value = inl(emu->port + HCFG); 605 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 606 inl(emu->port + HCFG); 607 608 /* Step 1: Turn off the led and deassert TRIM_CS */ 609 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 610 611 /* Step 2: Calibrate the ADC and DAC */ 612 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 613 614 /* Step 3: Wait for awhile; XXX We can't get away with this 615 * under a real operating system; we'll need to block and wait that 616 * way. */ 617 snd_emu10k1_wait(emu, 48000); 618 619 /* Step 4: Switch off the DAC and ADC calibration. Note 620 * That ADC_CAL is actually an inverted signal, so we assert 621 * it here to stop calibration. */ 622 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 623 624 /* Step 4: Switch into run mode */ 625 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 626 627 /* Step 5: Set the analog input gain */ 628 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 629 630 return 0; 631 } 632 633 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 634 { 635 unsigned long special_port; 636 unsigned int value; 637 638 /* Special initialisation routine 639 * before the rest of the IO-Ports become active. 640 */ 641 special_port = emu->port + 0x38; 642 value = inl(special_port); 643 outl(0x00d00000, special_port); 644 value = inl(special_port); 645 outl(0x00d00001, special_port); 646 value = inl(special_port); 647 outl(0x00d0005f, special_port); 648 value = inl(special_port); 649 outl(0x00d0007f, special_port); 650 value = inl(special_port); 651 outl(0x0090007f, special_port); 652 value = inl(special_port); 653 654 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 655 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 656 msleep(200); 657 return 0; 658 } 659 660 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu) 661 { 662 int n, i; 663 int reg; 664 int value; 665 unsigned int write_post; 666 unsigned long flags; 667 const struct firmware *fw_entry = emu->firmware; 668 669 if (!fw_entry) 670 return -EIO; 671 672 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 673 /* GPIO7 -> FPGA PGMN 674 * GPIO6 -> FPGA CCLK 675 * GPIO5 -> FPGA DIN 676 * FPGA CONFIG OFF -> FPGA PGMN 677 */ 678 spin_lock_irqsave(&emu->emu_lock, flags); 679 outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */ 680 write_post = inl(emu->port + A_IOCFG); 681 udelay(100); 682 outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */ 683 write_post = inl(emu->port + A_IOCFG); 684 udelay(100); /* Allow FPGA memory to clean */ 685 for (n = 0; n < fw_entry->size; n++) { 686 value = fw_entry->data[n]; 687 for (i = 0; i < 8; i++) { 688 reg = 0x80; 689 if (value & 0x1) 690 reg = reg | 0x20; 691 value = value >> 1; 692 outl(reg, emu->port + A_IOCFG); 693 write_post = inl(emu->port + A_IOCFG); 694 outl(reg | 0x40, emu->port + A_IOCFG); 695 write_post = inl(emu->port + A_IOCFG); 696 } 697 } 698 /* After programming, set GPIO bit 4 high again. */ 699 outl(0x10, emu->port + A_IOCFG); 700 write_post = inl(emu->port + A_IOCFG); 701 spin_unlock_irqrestore(&emu->emu_lock, flags); 702 703 return 0; 704 } 705 706 static int emu1010_firmware_thread(void *data) 707 { 708 struct snd_emu10k1 *emu = data; 709 u32 tmp, tmp2, reg; 710 int err; 711 712 for (;;) { 713 /* Delay to allow Audio Dock to settle */ 714 msleep_interruptible(1000); 715 if (kthread_should_stop()) 716 break; 717 #ifdef CONFIG_PM_SLEEP 718 if (emu->suspend) 719 continue; 720 #endif 721 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp); /* IRQ Status */ 722 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 723 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 724 /* Audio Dock attached */ 725 /* Return to Audio Dock programming mode */ 726 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n"); 727 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK); 728 err = snd_emu1010_load_firmware(emu); 729 if (err != 0) 730 continue; 731 732 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 733 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); 734 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS = 0x%x\n", reg); 735 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 736 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 737 snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", reg); 738 if ((reg & 0x1f) != 0x15) { 739 /* FPGA failed to be programmed */ 740 snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", reg); 741 continue; 742 } 743 snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n"); 744 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 745 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 746 snd_printk(KERN_INFO "Audio Dock ver: %u.%u\n", 747 tmp, tmp2); 748 /* Sync clocking between 1010 and Dock */ 749 /* Allow DLL to settle */ 750 msleep(10); 751 /* Unmute all. Default is muted after a firmware load */ 752 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 753 } 754 } 755 snd_printk(KERN_INFO "emu1010: firmware thread stopping\n"); 756 return 0; 757 } 758 759 /* 760 * EMU-1010 - details found out from this driver, official MS Win drivers, 761 * testing the card: 762 * 763 * Audigy2 (aka Alice2): 764 * --------------------- 765 * * communication over PCI 766 * * conversion of 32-bit data coming over EMU32 links from HANA FPGA 767 * to 2 x 16-bit, using internal DSP instructions 768 * * slave mode, clock supplied by HANA 769 * * linked to HANA using: 770 * 32 x 32-bit serial EMU32 output channels 771 * 16 x EMU32 input channels 772 * (?) x I2S I/O channels (?) 773 * 774 * FPGA (aka HANA): 775 * --------------- 776 * * provides all (?) physical inputs and outputs of the card 777 * (ADC, DAC, SPDIF I/O, ADAT I/O, etc.) 778 * * provides clock signal for the card and Alice2 779 * * two crystals - for 44.1kHz and 48kHz multiples 780 * * provides internal routing of signal sources to signal destinations 781 * * inputs/outputs to Alice2 - see above 782 * 783 * Current status of the driver: 784 * ---------------------------- 785 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 786 * * PCM device nb. 2: 787 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 788 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 789 */ 790 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 791 { 792 unsigned int i; 793 u32 tmp, tmp2, reg; 794 int err; 795 796 snd_printk(KERN_INFO "emu1010: Special config.\n"); 797 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 798 * Lock Sound Memory Cache, Lock Tank Memory Cache, 799 * Mute all codecs. 800 */ 801 outl(0x0005a00c, emu->port + HCFG); 802 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 803 * Lock Tank Memory Cache, 804 * Mute all codecs. 805 */ 806 outl(0x0005a004, emu->port + HCFG); 807 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 808 * Mute all codecs. 809 */ 810 outl(0x0005a000, emu->port + HCFG); 811 /* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave, 812 * Mute all codecs. 813 */ 814 outl(0x0005a000, emu->port + HCFG); 815 816 /* Disable 48Volt power to Audio Dock */ 817 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 818 819 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 820 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 821 snd_printdd("reg1 = 0x%x\n", reg); 822 if ((reg & 0x3f) == 0x15) { 823 /* FPGA netlist already present so clear it */ 824 /* Return to programming mode */ 825 826 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0x02); 827 } 828 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 829 snd_printdd("reg2 = 0x%x\n", reg); 830 if ((reg & 0x3f) == 0x15) { 831 /* FPGA failed to return to programming mode */ 832 snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n"); 833 return -ENODEV; 834 } 835 snd_printk(KERN_INFO "emu1010: EMU_HANA_ID = 0x%x\n", reg); 836 837 if (!emu->firmware) { 838 const char *filename; 839 switch (emu->card_capabilities->emu_model) { 840 case EMU_MODEL_EMU1010: 841 filename = HANA_FILENAME; 842 break; 843 case EMU_MODEL_EMU1010B: 844 filename = EMU1010B_FILENAME; 845 break; 846 case EMU_MODEL_EMU1616: 847 filename = EMU1010_NOTEBOOK_FILENAME; 848 break; 849 case EMU_MODEL_EMU0404: 850 filename = EMU0404_FILENAME; 851 break; 852 default: 853 return -ENODEV; 854 } 855 856 err = request_firmware(&emu->firmware, filename, &emu->pci->dev); 857 if (err != 0) { 858 snd_printk(KERN_ERR "emu1010: firmware: %s not found. Err = %d\n", filename, err); 859 return err; 860 } 861 snd_printk(KERN_INFO "emu1010: firmware file = %s, size = 0x%zx\n", 862 filename, emu->firmware->size); 863 } 864 865 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 866 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 867 if ((reg & 0x3f) != 0x15) { 868 /* FPGA failed to be programmed */ 869 snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", reg); 870 return -ENODEV; 871 } 872 873 snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n"); 874 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 875 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 876 snd_printk(KERN_INFO "emu1010: Hana version: %u.%u\n", tmp, tmp2); 877 /* Enable 48Volt power to Audio Dock */ 878 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 879 880 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 881 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg); 882 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 883 snd_printk(KERN_INFO "emu1010: Card options = 0x%x\n", reg); 884 snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp); 885 /* Optical -> ADAT I/O */ 886 /* 0 : SPDIF 887 * 1 : ADAT 888 */ 889 emu->emu1010.optical_in = 1; /* IN_ADAT */ 890 emu->emu1010.optical_out = 1; /* IN_ADAT */ 891 tmp = 0; 892 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) | 893 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0); 894 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 895 snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp); 896 /* Set no attenuation on Audio Dock pads. */ 897 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00); 898 emu->emu1010.adc_pads = 0x00; 899 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp); 900 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 901 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); 902 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); 903 snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp); 904 /* DAC PADs. */ 905 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f); 906 emu->emu1010.dac_pads = 0x0f; 907 snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp); 908 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30); 909 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp); 910 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 911 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); 912 /* MIDI routing */ 913 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); 914 /* Unknown. */ 915 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); 916 /* IRQ Enable: All on */ 917 /* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); */ 918 /* IRQ Enable: All off */ 919 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00); 920 921 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 922 snd_printk(KERN_INFO "emu1010: Card options3 = 0x%x\n", reg); 923 /* Default WCLK set to 48kHz. */ 924 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00); 925 /* Word Clock source, Internal 48kHz x1 */ 926 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 927 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 928 /* Audio Dock LEDs. */ 929 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); 930 931 #if 0 932 /* For 96kHz */ 933 snd_emu1010_fpga_link_dst_src_write(emu, 934 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); 935 snd_emu1010_fpga_link_dst_src_write(emu, 936 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); 937 snd_emu1010_fpga_link_dst_src_write(emu, 938 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2); 939 snd_emu1010_fpga_link_dst_src_write(emu, 940 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2); 941 #endif 942 #if 0 943 /* For 192kHz */ 944 snd_emu1010_fpga_link_dst_src_write(emu, 945 EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1); 946 snd_emu1010_fpga_link_dst_src_write(emu, 947 EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1); 948 snd_emu1010_fpga_link_dst_src_write(emu, 949 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); 950 snd_emu1010_fpga_link_dst_src_write(emu, 951 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2); 952 snd_emu1010_fpga_link_dst_src_write(emu, 953 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3); 954 snd_emu1010_fpga_link_dst_src_write(emu, 955 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3); 956 snd_emu1010_fpga_link_dst_src_write(emu, 957 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4); 958 snd_emu1010_fpga_link_dst_src_write(emu, 959 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4); 960 #endif 961 #if 1 962 /* For 48kHz */ 963 snd_emu1010_fpga_link_dst_src_write(emu, 964 EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1); 965 snd_emu1010_fpga_link_dst_src_write(emu, 966 EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1); 967 snd_emu1010_fpga_link_dst_src_write(emu, 968 EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2); 969 snd_emu1010_fpga_link_dst_src_write(emu, 970 EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2); 971 snd_emu1010_fpga_link_dst_src_write(emu, 972 EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1); 973 snd_emu1010_fpga_link_dst_src_write(emu, 974 EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1); 975 snd_emu1010_fpga_link_dst_src_write(emu, 976 EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1); 977 snd_emu1010_fpga_link_dst_src_write(emu, 978 EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1); 979 /* Pavel Hofman - setting defaults for 8 more capture channels 980 * Defaults only, users will set their own values anyways, let's 981 * just copy/paste. 982 */ 983 984 snd_emu1010_fpga_link_dst_src_write(emu, 985 EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1); 986 snd_emu1010_fpga_link_dst_src_write(emu, 987 EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1); 988 snd_emu1010_fpga_link_dst_src_write(emu, 989 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2); 990 snd_emu1010_fpga_link_dst_src_write(emu, 991 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2); 992 snd_emu1010_fpga_link_dst_src_write(emu, 993 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1); 994 snd_emu1010_fpga_link_dst_src_write(emu, 995 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1); 996 snd_emu1010_fpga_link_dst_src_write(emu, 997 EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1); 998 snd_emu1010_fpga_link_dst_src_write(emu, 999 EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1); 1000 #endif 1001 #if 0 1002 /* Original */ 1003 snd_emu1010_fpga_link_dst_src_write(emu, 1004 EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT); 1005 snd_emu1010_fpga_link_dst_src_write(emu, 1006 EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1); 1007 snd_emu1010_fpga_link_dst_src_write(emu, 1008 EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2); 1009 snd_emu1010_fpga_link_dst_src_write(emu, 1010 EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3); 1011 snd_emu1010_fpga_link_dst_src_write(emu, 1012 EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4); 1013 snd_emu1010_fpga_link_dst_src_write(emu, 1014 EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5); 1015 snd_emu1010_fpga_link_dst_src_write(emu, 1016 EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6); 1017 snd_emu1010_fpga_link_dst_src_write(emu, 1018 EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7); 1019 snd_emu1010_fpga_link_dst_src_write(emu, 1020 EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1); 1021 snd_emu1010_fpga_link_dst_src_write(emu, 1022 EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1); 1023 snd_emu1010_fpga_link_dst_src_write(emu, 1024 EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2); 1025 snd_emu1010_fpga_link_dst_src_write(emu, 1026 EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2); 1027 #endif 1028 for (i = 0; i < 0x20; i++) { 1029 /* AudioDock Elink <- Silence */ 1030 snd_emu1010_fpga_link_dst_src_write(emu, 0x0100 + i, EMU_SRC_SILENCE); 1031 } 1032 for (i = 0; i < 4; i++) { 1033 /* Hana SPDIF Out <- Silence */ 1034 snd_emu1010_fpga_link_dst_src_write(emu, 0x0200 + i, EMU_SRC_SILENCE); 1035 } 1036 for (i = 0; i < 7; i++) { 1037 /* Hamoa DAC <- Silence */ 1038 snd_emu1010_fpga_link_dst_src_write(emu, 0x0300 + i, EMU_SRC_SILENCE); 1039 } 1040 for (i = 0; i < 7; i++) { 1041 /* Hana ADAT Out <- Silence */ 1042 snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE); 1043 } 1044 snd_emu1010_fpga_link_dst_src_write(emu, 1045 EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1); 1046 snd_emu1010_fpga_link_dst_src_write(emu, 1047 EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1); 1048 snd_emu1010_fpga_link_dst_src_write(emu, 1049 EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1); 1050 snd_emu1010_fpga_link_dst_src_write(emu, 1051 EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1); 1052 snd_emu1010_fpga_link_dst_src_write(emu, 1053 EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1); 1054 snd_emu1010_fpga_link_dst_src_write(emu, 1055 EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1); 1056 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01); /* Unmute all */ 1057 1058 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp); 1059 1060 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, 1061 * Lock Sound Memory Cache, Lock Tank Memory Cache, 1062 * Mute all codecs. 1063 */ 1064 outl(0x0000a000, emu->port + HCFG); 1065 /* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave, 1066 * Lock Sound Memory Cache, Lock Tank Memory Cache, 1067 * Un-Mute all codecs. 1068 */ 1069 outl(0x0000a001, emu->port + HCFG); 1070 1071 /* Initial boot complete. Now patches */ 1072 1073 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp); 1074 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */ 1075 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */ 1076 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19); /* MIDI Route */ 1077 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c); /* Unknown */ 1078 snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp); 1079 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10); /* SPDIF Format spdif (or 0x11 for aes/ebu) */ 1080 1081 /* Start Micro/Audio Dock firmware loader thread */ 1082 if (!emu->emu1010.firmware_thread) { 1083 emu->emu1010.firmware_thread = 1084 kthread_create(emu1010_firmware_thread, emu, 1085 "emu1010_firmware"); 1086 wake_up_process(emu->emu1010.firmware_thread); 1087 } 1088 1089 #if 0 1090 snd_emu1010_fpga_link_dst_src_write(emu, 1091 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */ 1092 snd_emu1010_fpga_link_dst_src_write(emu, 1093 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */ 1094 snd_emu1010_fpga_link_dst_src_write(emu, 1095 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */ 1096 snd_emu1010_fpga_link_dst_src_write(emu, 1097 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */ 1098 #endif 1099 /* Default outputs */ 1100 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) { 1101 /* 1616(M) cardbus default outputs */ 1102 /* ALICE2 bus 0xa0 */ 1103 snd_emu1010_fpga_link_dst_src_write(emu, 1104 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1105 emu->emu1010.output_source[0] = 17; 1106 snd_emu1010_fpga_link_dst_src_write(emu, 1107 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1108 emu->emu1010.output_source[1] = 18; 1109 snd_emu1010_fpga_link_dst_src_write(emu, 1110 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); 1111 emu->emu1010.output_source[2] = 19; 1112 snd_emu1010_fpga_link_dst_src_write(emu, 1113 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); 1114 emu->emu1010.output_source[3] = 20; 1115 snd_emu1010_fpga_link_dst_src_write(emu, 1116 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); 1117 emu->emu1010.output_source[4] = 21; 1118 snd_emu1010_fpga_link_dst_src_write(emu, 1119 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); 1120 emu->emu1010.output_source[5] = 22; 1121 /* ALICE2 bus 0xa0 */ 1122 snd_emu1010_fpga_link_dst_src_write(emu, 1123 EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0); 1124 emu->emu1010.output_source[16] = 17; 1125 snd_emu1010_fpga_link_dst_src_write(emu, 1126 EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1); 1127 emu->emu1010.output_source[17] = 18; 1128 } else { 1129 /* ALICE2 bus 0xa0 */ 1130 snd_emu1010_fpga_link_dst_src_write(emu, 1131 EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1132 emu->emu1010.output_source[0] = 21; 1133 snd_emu1010_fpga_link_dst_src_write(emu, 1134 EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1135 emu->emu1010.output_source[1] = 22; 1136 snd_emu1010_fpga_link_dst_src_write(emu, 1137 EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2); 1138 emu->emu1010.output_source[2] = 23; 1139 snd_emu1010_fpga_link_dst_src_write(emu, 1140 EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); 1141 emu->emu1010.output_source[3] = 24; 1142 snd_emu1010_fpga_link_dst_src_write(emu, 1143 EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4); 1144 emu->emu1010.output_source[4] = 25; 1145 snd_emu1010_fpga_link_dst_src_write(emu, 1146 EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5); 1147 emu->emu1010.output_source[5] = 26; 1148 snd_emu1010_fpga_link_dst_src_write(emu, 1149 EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6); 1150 emu->emu1010.output_source[6] = 27; 1151 snd_emu1010_fpga_link_dst_src_write(emu, 1152 EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7); 1153 emu->emu1010.output_source[7] = 28; 1154 /* ALICE2 bus 0xa0 */ 1155 snd_emu1010_fpga_link_dst_src_write(emu, 1156 EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1157 emu->emu1010.output_source[8] = 21; 1158 snd_emu1010_fpga_link_dst_src_write(emu, 1159 EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1160 emu->emu1010.output_source[9] = 22; 1161 /* ALICE2 bus 0xa0 */ 1162 snd_emu1010_fpga_link_dst_src_write(emu, 1163 EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1164 emu->emu1010.output_source[10] = 21; 1165 snd_emu1010_fpga_link_dst_src_write(emu, 1166 EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1167 emu->emu1010.output_source[11] = 22; 1168 /* ALICE2 bus 0xa0 */ 1169 snd_emu1010_fpga_link_dst_src_write(emu, 1170 EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1171 emu->emu1010.output_source[12] = 21; 1172 snd_emu1010_fpga_link_dst_src_write(emu, 1173 EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1174 emu->emu1010.output_source[13] = 22; 1175 /* ALICE2 bus 0xa0 */ 1176 snd_emu1010_fpga_link_dst_src_write(emu, 1177 EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0); 1178 emu->emu1010.output_source[14] = 21; 1179 snd_emu1010_fpga_link_dst_src_write(emu, 1180 EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1); 1181 emu->emu1010.output_source[15] = 22; 1182 /* ALICE2 bus 0xa0 */ 1183 snd_emu1010_fpga_link_dst_src_write(emu, 1184 EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0); 1185 emu->emu1010.output_source[16] = 21; 1186 snd_emu1010_fpga_link_dst_src_write(emu, 1187 EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1); 1188 emu->emu1010.output_source[17] = 22; 1189 snd_emu1010_fpga_link_dst_src_write(emu, 1190 EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2); 1191 emu->emu1010.output_source[18] = 23; 1192 snd_emu1010_fpga_link_dst_src_write(emu, 1193 EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3); 1194 emu->emu1010.output_source[19] = 24; 1195 snd_emu1010_fpga_link_dst_src_write(emu, 1196 EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4); 1197 emu->emu1010.output_source[20] = 25; 1198 snd_emu1010_fpga_link_dst_src_write(emu, 1199 EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5); 1200 emu->emu1010.output_source[21] = 26; 1201 snd_emu1010_fpga_link_dst_src_write(emu, 1202 EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6); 1203 emu->emu1010.output_source[22] = 27; 1204 snd_emu1010_fpga_link_dst_src_write(emu, 1205 EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7); 1206 emu->emu1010.output_source[23] = 28; 1207 } 1208 /* TEMP: Select SPDIF in/out */ 1209 /* snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); */ /* Output spdif */ 1210 1211 /* TEMP: Select 48kHz SPDIF out */ 1212 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */ 1213 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */ 1214 /* Word Clock source, Internal 48kHz x1 */ 1215 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 1216 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 1217 emu->emu1010.internal_clock = 1; /* 48000 */ 1218 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12); /* Set LEDs on Audio Dock */ 1219 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */ 1220 /* snd_emu1010_fpga_write(emu, 0x7, 0x0); */ /* Mute all */ 1221 /* snd_emu1010_fpga_write(emu, 0x7, 0x1); */ /* Unmute all */ 1222 /* snd_emu1010_fpga_write(emu, 0xe, 0x12); */ /* Set LEDs on Audio Dock */ 1223 1224 return 0; 1225 } 1226 /* 1227 * Create the EMU10K1 instance 1228 */ 1229 1230 #ifdef CONFIG_PM_SLEEP 1231 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 1232 static void free_pm_buffer(struct snd_emu10k1 *emu); 1233 #endif 1234 1235 static int snd_emu10k1_free(struct snd_emu10k1 *emu) 1236 { 1237 if (emu->port) { /* avoid access to already used hardware */ 1238 snd_emu10k1_fx8010_tram_setup(emu, 0); 1239 snd_emu10k1_done(emu); 1240 snd_emu10k1_free_efx(emu); 1241 } 1242 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 1243 /* Disable 48Volt power to Audio Dock */ 1244 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 1245 } 1246 if (emu->emu1010.firmware_thread) 1247 kthread_stop(emu->emu1010.firmware_thread); 1248 if (emu->firmware) 1249 release_firmware(emu->firmware); 1250 if (emu->irq >= 0) 1251 free_irq(emu->irq, emu); 1252 /* remove reserved page */ 1253 if (emu->reserved_page) { 1254 snd_emu10k1_synth_free(emu, 1255 (struct snd_util_memblk *)emu->reserved_page); 1256 emu->reserved_page = NULL; 1257 } 1258 if (emu->memhdr) 1259 snd_util_memhdr_free(emu->memhdr); 1260 if (emu->silent_page.area) 1261 snd_dma_free_pages(&emu->silent_page); 1262 if (emu->ptb_pages.area) 1263 snd_dma_free_pages(&emu->ptb_pages); 1264 vfree(emu->page_ptr_table); 1265 vfree(emu->page_addr_table); 1266 #ifdef CONFIG_PM_SLEEP 1267 free_pm_buffer(emu); 1268 #endif 1269 if (emu->port) 1270 pci_release_regions(emu->pci); 1271 if (emu->card_capabilities->ca0151_chip) /* P16V */ 1272 snd_p16v_free(emu); 1273 pci_disable_device(emu->pci); 1274 kfree(emu); 1275 return 0; 1276 } 1277 1278 static int snd_emu10k1_dev_free(struct snd_device *device) 1279 { 1280 struct snd_emu10k1 *emu = device->device_data; 1281 return snd_emu10k1_free(emu); 1282 } 1283 1284 static struct snd_emu_chip_details emu_chip_details[] = { 1285 /* Audigy4 (Not PRO) SB0610 */ 1286 /* Tested by James@superbug.co.uk 4th April 2006 */ 1287 /* A_IOCFG bits 1288 * Output 1289 * 0: ? 1290 * 1: ? 1291 * 2: ? 1292 * 3: 0 - Digital Out, 1 - Line in 1293 * 4: ? 1294 * 5: ? 1295 * 6: ? 1296 * 7: ? 1297 * Input 1298 * 8: ? 1299 * 9: ? 1300 * A: Green jack sense (Front) 1301 * B: ? 1302 * C: Black jack sense (Rear/Side Right) 1303 * D: Yellow jack sense (Center/LFE/Side Left) 1304 * E: ? 1305 * F: ? 1306 * 1307 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1308 * 0 - Digital Out 1309 * 1 - Line in 1310 */ 1311 /* Mic input not tested. 1312 * Analog CD input not tested 1313 * Digital Out not tested. 1314 * Line in working. 1315 * Audio output 5.1 working. Side outputs not working. 1316 */ 1317 /* DSP: CA10300-IAT LF 1318 * DAC: Cirrus Logic CS4382-KQZ 1319 * ADC: Philips 1361T 1320 * AC97: Sigmatel STAC9750 1321 * CA0151: None 1322 */ 1323 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1324 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1325 .id = "Audigy2", 1326 .emu10k2_chip = 1, 1327 .ca0108_chip = 1, 1328 .spk71 = 1, 1329 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1330 .ac97_chip = 1} , 1331 /* Audigy 2 Value AC3 out does not work yet. 1332 * Need to find out how to turn off interpolators. 1333 */ 1334 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1335 /* DSP: CA0108-IAT 1336 * DAC: CS4382-KQ 1337 * ADC: Philips 1361T 1338 * AC97: STAC9750 1339 * CA0151: None 1340 */ 1341 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1342 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1343 .id = "Audigy2", 1344 .emu10k2_chip = 1, 1345 .ca0108_chip = 1, 1346 .spk71 = 1, 1347 .ac97_chip = 1} , 1348 /* Audigy 2 ZS Notebook Cardbus card.*/ 1349 /* Tested by James@superbug.co.uk 6th November 2006 */ 1350 /* Audio output 7.1/Headphones working. 1351 * Digital output working. (AC3 not checked, only PCM) 1352 * Audio Mic/Line inputs working. 1353 * Digital input not tested. 1354 */ 1355 /* DSP: Tina2 1356 * DAC: Wolfson WM8768/WM8568 1357 * ADC: Wolfson WM8775 1358 * AC97: None 1359 * CA0151: None 1360 */ 1361 /* Tested by James@superbug.co.uk 4th April 2006 */ 1362 /* A_IOCFG bits 1363 * Output 1364 * 0: Not Used 1365 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1366 * 2: Analog input 0 = line in, 1 = mic in 1367 * 3: Not Used 1368 * 4: Digital output 0 = off, 1 = on. 1369 * 5: Not Used 1370 * 6: Not Used 1371 * 7: Not Used 1372 * Input 1373 * All bits 1 (0x3fxx) means nothing plugged in. 1374 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1375 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1376 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1377 * E-F: Always 0 1378 * 1379 */ 1380 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1381 .driver = "Audigy2", .name = "SB Audigy 2 ZS Notebook [SB0530]", 1382 .id = "Audigy2", 1383 .emu10k2_chip = 1, 1384 .ca0108_chip = 1, 1385 .ca_cardbus_chip = 1, 1386 .spi_dac = 1, 1387 .i2c_adc = 1, 1388 .spk71 = 1} , 1389 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1390 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1391 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]", 1392 .id = "EMU1010", 1393 .emu10k2_chip = 1, 1394 .ca0108_chip = 1, 1395 .ca_cardbus_chip = 1, 1396 .spk71 = 1 , 1397 .emu_model = EMU_MODEL_EMU1616}, 1398 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1399 /* This is MAEM8960, 0202 is MAEM 8980 */ 1400 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1401 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM8960]", 1402 .id = "EMU1010", 1403 .emu10k2_chip = 1, 1404 .ca0108_chip = 1, 1405 .spk71 = 1, 1406 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1407 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1408 /* This is MAEM8986, 0202 is MAEM8980 */ 1409 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1410 .driver = "Audigy2", .name = "E-mu 1010 PCIe [MAEM8986]", 1411 .id = "EMU1010", 1412 .emu10k2_chip = 1, 1413 .ca0108_chip = 1, 1414 .spk71 = 1, 1415 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1416 /* Tested by James@superbug.co.uk 8th July 2005. */ 1417 /* This is MAEM8810, 0202 is MAEM8820 */ 1418 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1419 .driver = "Audigy2", .name = "E-mu 1010 [MAEM8810]", 1420 .id = "EMU1010", 1421 .emu10k2_chip = 1, 1422 .ca0102_chip = 1, 1423 .spk71 = 1, 1424 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1425 /* EMU0404b */ 1426 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1427 .driver = "Audigy2", .name = "E-mu 0404b PCI [MAEM8852]", 1428 .id = "EMU0404", 1429 .emu10k2_chip = 1, 1430 .ca0108_chip = 1, 1431 .spk71 = 1, 1432 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1433 /* Tested by James@superbug.co.uk 20-3-2007. */ 1434 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1435 .driver = "Audigy2", .name = "E-mu 0404 [MAEM8850]", 1436 .id = "EMU0404", 1437 .emu10k2_chip = 1, 1438 .ca0102_chip = 1, 1439 .spk71 = 1, 1440 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1441 /* EMU0404 PCIe */ 1442 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1443 .driver = "Audigy2", .name = "E-mu 0404 PCIe [MAEM8984]", 1444 .id = "EMU0404", 1445 .emu10k2_chip = 1, 1446 .ca0108_chip = 1, 1447 .spk71 = 1, 1448 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1449 /* Note that all E-mu cards require kernel 2.6 or newer. */ 1450 {.vendor = 0x1102, .device = 0x0008, 1451 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1452 .id = "Audigy2", 1453 .emu10k2_chip = 1, 1454 .ca0108_chip = 1, 1455 .ac97_chip = 1} , 1456 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1457 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1458 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1459 .id = "Audigy2", 1460 .emu10k2_chip = 1, 1461 .ca0102_chip = 1, 1462 .ca0151_chip = 1, 1463 .spk71 = 1, 1464 .spdif_bug = 1, 1465 .ac97_chip = 1} , 1466 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1467 /* The 0x20061102 does have SB0350 written on it 1468 * Just like 0x20021102 1469 */ 1470 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1471 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1472 .id = "Audigy2", 1473 .emu10k2_chip = 1, 1474 .ca0102_chip = 1, 1475 .ca0151_chip = 1, 1476 .spk71 = 1, 1477 .spdif_bug = 1, 1478 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1479 .ac97_chip = 1} , 1480 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1481 Creative's Windows driver */ 1482 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1483 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1484 .id = "Audigy2", 1485 .emu10k2_chip = 1, 1486 .ca0102_chip = 1, 1487 .ca0151_chip = 1, 1488 .spk71 = 1, 1489 .spdif_bug = 1, 1490 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1491 .ac97_chip = 1} , 1492 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1493 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1494 .id = "Audigy2", 1495 .emu10k2_chip = 1, 1496 .ca0102_chip = 1, 1497 .ca0151_chip = 1, 1498 .spk71 = 1, 1499 .spdif_bug = 1, 1500 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1501 .ac97_chip = 1} , 1502 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1503 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1504 .id = "Audigy2", 1505 .emu10k2_chip = 1, 1506 .ca0102_chip = 1, 1507 .ca0151_chip = 1, 1508 .spk71 = 1, 1509 .spdif_bug = 1, 1510 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1511 .ac97_chip = 1} , 1512 /* Audigy 2 */ 1513 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1514 /* DSP: CA0102-IAT 1515 * DAC: CS4382-KQ 1516 * ADC: Philips 1361T 1517 * AC97: STAC9721 1518 * CA0151: Yes 1519 */ 1520 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1521 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1522 .id = "Audigy2", 1523 .emu10k2_chip = 1, 1524 .ca0102_chip = 1, 1525 .ca0151_chip = 1, 1526 .spk71 = 1, 1527 .spdif_bug = 1, 1528 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1529 .ac97_chip = 1} , 1530 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1531 .driver = "Audigy2", .name = "SB Audigy 2 Platinum EX [SB0280]", 1532 .id = "Audigy2", 1533 .emu10k2_chip = 1, 1534 .ca0102_chip = 1, 1535 .ca0151_chip = 1, 1536 .spk71 = 1, 1537 .spdif_bug = 1} , 1538 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1539 /* See ALSA bug#1365 */ 1540 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1541 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1542 .id = "Audigy2", 1543 .emu10k2_chip = 1, 1544 .ca0102_chip = 1, 1545 .ca0151_chip = 1, 1546 .spk71 = 1, 1547 .spdif_bug = 1, 1548 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1549 .ac97_chip = 1} , 1550 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1551 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1552 .id = "Audigy2", 1553 .emu10k2_chip = 1, 1554 .ca0102_chip = 1, 1555 .ca0151_chip = 1, 1556 .spk71 = 1, 1557 .spdif_bug = 1, 1558 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1559 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1560 .ac97_chip = 1} , 1561 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1562 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1563 .id = "Audigy2", 1564 .emu10k2_chip = 1, 1565 .ca0102_chip = 1, 1566 .ca0151_chip = 1, 1567 .spdif_bug = 1, 1568 .ac97_chip = 1} , 1569 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1570 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1571 .id = "Audigy", 1572 .emu10k2_chip = 1, 1573 .ca0102_chip = 1, 1574 .ac97_chip = 1} , 1575 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1576 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1577 .id = "Audigy", 1578 .emu10k2_chip = 1, 1579 .ca0102_chip = 1, 1580 .spdif_bug = 1, 1581 .ac97_chip = 1} , 1582 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1583 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1584 .id = "Audigy", 1585 .emu10k2_chip = 1, 1586 .ca0102_chip = 1, 1587 .ac97_chip = 1} , 1588 {.vendor = 0x1102, .device = 0x0004, 1589 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1590 .id = "Audigy", 1591 .emu10k2_chip = 1, 1592 .ca0102_chip = 1, 1593 .ac97_chip = 1} , 1594 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1595 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1596 .id = "Live", 1597 .emu10k1_chip = 1, 1598 .ac97_chip = 1, 1599 .sblive51 = 1} , 1600 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1601 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1602 .id = "Live", 1603 .emu10k1_chip = 1, 1604 .ac97_chip = 1, 1605 .sblive51 = 1} , 1606 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1607 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1608 .id = "Live", 1609 .emu10k1_chip = 1, 1610 .ac97_chip = 1, 1611 .sblive51 = 1} , 1612 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1613 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1614 .id = "Live", 1615 .emu10k1_chip = 1, 1616 .ac97_chip = 1, 1617 .sblive51 = 1} , 1618 /* Tested by ALSA bug#1680 26th December 2005 */ 1619 /* note: It really has SB0220 written on the card, */ 1620 /* but it's SB0228 according to kx.inf */ 1621 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1622 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1623 .id = "Live", 1624 .emu10k1_chip = 1, 1625 .ac97_chip = 1, 1626 .sblive51 = 1} , 1627 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1628 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1629 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1630 .id = "Live", 1631 .emu10k1_chip = 1, 1632 .ac97_chip = 1, 1633 .sblive51 = 1} , 1634 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1635 .driver = "EMU10K1", .name = "SB Live! 5.1", 1636 .id = "Live", 1637 .emu10k1_chip = 1, 1638 .ac97_chip = 1, 1639 .sblive51 = 1} , 1640 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1641 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1642 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1643 .id = "Live", 1644 .emu10k1_chip = 1, 1645 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1646 * share the same IDs! 1647 */ 1648 .sblive51 = 1} , 1649 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1650 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1651 .id = "Live", 1652 .emu10k1_chip = 1, 1653 .ac97_chip = 1, 1654 .sblive51 = 1} , 1655 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1656 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1657 .id = "Live", 1658 .emu10k1_chip = 1, 1659 .ac97_chip = 1} , 1660 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1661 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1662 .id = "Live", 1663 .emu10k1_chip = 1, 1664 .ac97_chip = 1, 1665 .sblive51 = 1} , 1666 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1667 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1668 .id = "Live", 1669 .emu10k1_chip = 1, 1670 .ac97_chip = 1, 1671 .sblive51 = 1} , 1672 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1673 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1674 .id = "Live", 1675 .emu10k1_chip = 1, 1676 .ac97_chip = 1, 1677 .sblive51 = 1} , 1678 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1679 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1680 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1681 .id = "Live", 1682 .emu10k1_chip = 1, 1683 .ac97_chip = 1, 1684 .sblive51 = 1} , 1685 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1686 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1687 .id = "Live", 1688 .emu10k1_chip = 1, 1689 .ac97_chip = 1, 1690 .sblive51 = 1} , 1691 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1692 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1693 .id = "Live", 1694 .emu10k1_chip = 1, 1695 .ac97_chip = 1, 1696 .sblive51 = 1} , 1697 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1698 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1699 .id = "Live", 1700 .emu10k1_chip = 1, 1701 .ac97_chip = 1, 1702 .sblive51 = 1} , 1703 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1704 .driver = "EMU10K1", .name = "E-mu APS [PC545]", 1705 .id = "APS", 1706 .emu10k1_chip = 1, 1707 .ecard = 1} , 1708 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1709 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1710 .id = "Live", 1711 .emu10k1_chip = 1, 1712 .ac97_chip = 1, 1713 .sblive51 = 1} , 1714 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1715 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1716 .id = "Live", 1717 .emu10k1_chip = 1, 1718 .ac97_chip = 1, 1719 .sblive51 = 1} , 1720 {.vendor = 0x1102, .device = 0x0002, 1721 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1722 .id = "Live", 1723 .emu10k1_chip = 1, 1724 .ac97_chip = 1, 1725 .sblive51 = 1} , 1726 { } /* terminator */ 1727 }; 1728 1729 int snd_emu10k1_create(struct snd_card *card, 1730 struct pci_dev *pci, 1731 unsigned short extin_mask, 1732 unsigned short extout_mask, 1733 long max_cache_bytes, 1734 int enable_ir, 1735 uint subsystem, 1736 struct snd_emu10k1 **remu) 1737 { 1738 struct snd_emu10k1 *emu; 1739 int idx, err; 1740 int is_audigy; 1741 unsigned int silent_page; 1742 const struct snd_emu_chip_details *c; 1743 static struct snd_device_ops ops = { 1744 .dev_free = snd_emu10k1_dev_free, 1745 }; 1746 1747 *remu = NULL; 1748 1749 /* enable PCI device */ 1750 err = pci_enable_device(pci); 1751 if (err < 0) 1752 return err; 1753 1754 emu = kzalloc(sizeof(*emu), GFP_KERNEL); 1755 if (emu == NULL) { 1756 pci_disable_device(pci); 1757 return -ENOMEM; 1758 } 1759 emu->card = card; 1760 spin_lock_init(&emu->reg_lock); 1761 spin_lock_init(&emu->emu_lock); 1762 spin_lock_init(&emu->spi_lock); 1763 spin_lock_init(&emu->i2c_lock); 1764 spin_lock_init(&emu->voice_lock); 1765 spin_lock_init(&emu->synth_lock); 1766 spin_lock_init(&emu->memblk_lock); 1767 mutex_init(&emu->fx8010.lock); 1768 INIT_LIST_HEAD(&emu->mapped_link_head); 1769 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1770 emu->pci = pci; 1771 emu->irq = -1; 1772 emu->synth = NULL; 1773 emu->get_synth_voice = NULL; 1774 /* read revision & serial */ 1775 emu->revision = pci->revision; 1776 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1777 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1778 snd_printdd("vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", pci->vendor, pci->device, emu->serial, emu->model); 1779 1780 for (c = emu_chip_details; c->vendor; c++) { 1781 if (c->vendor == pci->vendor && c->device == pci->device) { 1782 if (subsystem) { 1783 if (c->subsystem && (c->subsystem == subsystem)) 1784 break; 1785 else 1786 continue; 1787 } else { 1788 if (c->subsystem && (c->subsystem != emu->serial)) 1789 continue; 1790 if (c->revision && c->revision != emu->revision) 1791 continue; 1792 } 1793 break; 1794 } 1795 } 1796 if (c->vendor == 0) { 1797 snd_printk(KERN_ERR "emu10k1: Card not recognised\n"); 1798 kfree(emu); 1799 pci_disable_device(pci); 1800 return -ENOENT; 1801 } 1802 emu->card_capabilities = c; 1803 if (c->subsystem && !subsystem) 1804 snd_printdd("Sound card name = %s\n", c->name); 1805 else if (subsystem) 1806 snd_printdd("Sound card name = %s, " 1807 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1808 "Forced to subsystem = 0x%x\n", c->name, 1809 pci->vendor, pci->device, emu->serial, c->subsystem); 1810 else 1811 snd_printdd("Sound card name = %s, " 1812 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1813 c->name, pci->vendor, pci->device, 1814 emu->serial); 1815 1816 if (!*card->id && c->id) { 1817 int i, n = 0; 1818 strlcpy(card->id, c->id, sizeof(card->id)); 1819 for (;;) { 1820 for (i = 0; i < snd_ecards_limit; i++) { 1821 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id)) 1822 break; 1823 } 1824 if (i >= snd_ecards_limit) 1825 break; 1826 n++; 1827 if (n >= SNDRV_CARDS) 1828 break; 1829 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n); 1830 } 1831 } 1832 1833 is_audigy = emu->audigy = c->emu10k2_chip; 1834 1835 /* set the DMA transfer mask */ 1836 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK; 1837 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 || 1838 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) { 1839 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask); 1840 kfree(emu); 1841 pci_disable_device(pci); 1842 return -ENXIO; 1843 } 1844 if (is_audigy) 1845 emu->gpr_base = A_FXGPREGBASE; 1846 else 1847 emu->gpr_base = FXGPREGBASE; 1848 1849 err = pci_request_regions(pci, "EMU10K1"); 1850 if (err < 0) { 1851 kfree(emu); 1852 pci_disable_device(pci); 1853 return err; 1854 } 1855 emu->port = pci_resource_start(pci, 0); 1856 1857 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1858 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1859 32 * 1024, &emu->ptb_pages) < 0) { 1860 err = -ENOMEM; 1861 goto error; 1862 } 1863 1864 emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *)); 1865 emu->page_addr_table = vmalloc(emu->max_cache_pages * 1866 sizeof(unsigned long)); 1867 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) { 1868 err = -ENOMEM; 1869 goto error; 1870 } 1871 1872 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci), 1873 EMUPAGESIZE, &emu->silent_page) < 0) { 1874 err = -ENOMEM; 1875 goto error; 1876 } 1877 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1878 if (emu->memhdr == NULL) { 1879 err = -ENOMEM; 1880 goto error; 1881 } 1882 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1883 sizeof(struct snd_util_memblk); 1884 1885 pci_set_master(pci); 1886 1887 emu->fx8010.fxbus_mask = 0x303f; 1888 if (extin_mask == 0) 1889 extin_mask = 0x3fcf; 1890 if (extout_mask == 0) 1891 extout_mask = 0x7fff; 1892 emu->fx8010.extin_mask = extin_mask; 1893 emu->fx8010.extout_mask = extout_mask; 1894 emu->enable_ir = enable_ir; 1895 1896 if (emu->card_capabilities->ca_cardbus_chip) { 1897 err = snd_emu10k1_cardbus_init(emu); 1898 if (err < 0) 1899 goto error; 1900 } 1901 if (emu->card_capabilities->ecard) { 1902 err = snd_emu10k1_ecard_init(emu); 1903 if (err < 0) 1904 goto error; 1905 } else if (emu->card_capabilities->emu_model) { 1906 err = snd_emu10k1_emu1010_init(emu); 1907 if (err < 0) { 1908 snd_emu10k1_free(emu); 1909 return err; 1910 } 1911 } else { 1912 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1913 does not support this, it shouldn't do any harm */ 1914 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1915 AC97SLOT_CNTR|AC97SLOT_LFE); 1916 } 1917 1918 /* initialize TRAM setup */ 1919 emu->fx8010.itram_size = (16 * 1024)/2; 1920 emu->fx8010.etram_pages.area = NULL; 1921 emu->fx8010.etram_pages.bytes = 0; 1922 1923 /* irq handler must be registered after I/O ports are activated */ 1924 if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED, 1925 KBUILD_MODNAME, emu)) { 1926 err = -EBUSY; 1927 goto error; 1928 } 1929 emu->irq = pci->irq; 1930 1931 /* 1932 * Init to 0x02109204 : 1933 * Clock accuracy = 0 (1000ppm) 1934 * Sample Rate = 2 (48kHz) 1935 * Audio Channel = 1 (Left of 2) 1936 * Source Number = 0 (Unspecified) 1937 * Generation Status = 1 (Original for Cat Code 12) 1938 * Cat Code = 12 (Digital Signal Mixer) 1939 * Mode = 0 (Mode 0) 1940 * Emphasis = 0 (None) 1941 * CP = 1 (Copyright unasserted) 1942 * AN = 0 (Audio data) 1943 * P = 0 (Consumer) 1944 */ 1945 emu->spdif_bits[0] = emu->spdif_bits[1] = 1946 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1947 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1948 SPCS_GENERATIONSTATUS | 0x00001200 | 1949 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1950 1951 emu->reserved_page = (struct snd_emu10k1_memblk *) 1952 snd_emu10k1_synth_alloc(emu, 4096); 1953 if (emu->reserved_page) 1954 emu->reserved_page->map_locked = 1; 1955 1956 /* Clear silent pages and set up pointers */ 1957 memset(emu->silent_page.area, 0, PAGE_SIZE); 1958 silent_page = emu->silent_page.addr << 1; 1959 for (idx = 0; idx < MAXPAGES; idx++) 1960 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx); 1961 1962 /* set up voice indices */ 1963 for (idx = 0; idx < NUM_G; idx++) { 1964 emu->voices[idx].emu = emu; 1965 emu->voices[idx].number = idx; 1966 } 1967 1968 err = snd_emu10k1_init(emu, enable_ir, 0); 1969 if (err < 0) 1970 goto error; 1971 #ifdef CONFIG_PM_SLEEP 1972 err = alloc_pm_buffer(emu); 1973 if (err < 0) 1974 goto error; 1975 #endif 1976 1977 /* Initialize the effect engine */ 1978 err = snd_emu10k1_init_efx(emu); 1979 if (err < 0) 1980 goto error; 1981 snd_emu10k1_audio_enable(emu); 1982 1983 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops); 1984 if (err < 0) 1985 goto error; 1986 1987 #ifdef CONFIG_PROC_FS 1988 snd_emu10k1_proc_init(emu); 1989 #endif 1990 1991 snd_card_set_dev(card, &pci->dev); 1992 *remu = emu; 1993 return 0; 1994 1995 error: 1996 snd_emu10k1_free(emu); 1997 return err; 1998 } 1999 2000 #ifdef CONFIG_PM_SLEEP 2001 static unsigned char saved_regs[] = { 2002 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 2003 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 2004 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 2005 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 2006 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 2007 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 2008 0xff /* end */ 2009 }; 2010 static unsigned char saved_regs_audigy[] = { 2011 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE, 2012 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 2013 0xff /* end */ 2014 }; 2015 2016 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 2017 { 2018 int size; 2019 2020 size = ARRAY_SIZE(saved_regs); 2021 if (emu->audigy) 2022 size += ARRAY_SIZE(saved_regs_audigy); 2023 emu->saved_ptr = vmalloc(4 * NUM_G * size); 2024 if (!emu->saved_ptr) 2025 return -ENOMEM; 2026 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 2027 return -ENOMEM; 2028 if (emu->card_capabilities->ca0151_chip && 2029 snd_p16v_alloc_pm_buffer(emu) < 0) 2030 return -ENOMEM; 2031 return 0; 2032 } 2033 2034 static void free_pm_buffer(struct snd_emu10k1 *emu) 2035 { 2036 vfree(emu->saved_ptr); 2037 snd_emu10k1_efx_free_pm_buffer(emu); 2038 if (emu->card_capabilities->ca0151_chip) 2039 snd_p16v_free_pm_buffer(emu); 2040 } 2041 2042 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 2043 { 2044 int i; 2045 unsigned char *reg; 2046 unsigned int *val; 2047 2048 val = emu->saved_ptr; 2049 for (reg = saved_regs; *reg != 0xff; reg++) 2050 for (i = 0; i < NUM_G; i++, val++) 2051 *val = snd_emu10k1_ptr_read(emu, *reg, i); 2052 if (emu->audigy) { 2053 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 2054 for (i = 0; i < NUM_G; i++, val++) 2055 *val = snd_emu10k1_ptr_read(emu, *reg, i); 2056 } 2057 if (emu->audigy) 2058 emu->saved_a_iocfg = inl(emu->port + A_IOCFG); 2059 emu->saved_hcfg = inl(emu->port + HCFG); 2060 } 2061 2062 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 2063 { 2064 if (emu->card_capabilities->ca_cardbus_chip) 2065 snd_emu10k1_cardbus_init(emu); 2066 if (emu->card_capabilities->ecard) 2067 snd_emu10k1_ecard_init(emu); 2068 else if (emu->card_capabilities->emu_model) 2069 snd_emu10k1_emu1010_init(emu); 2070 else 2071 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 2072 snd_emu10k1_init(emu, emu->enable_ir, 1); 2073 } 2074 2075 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 2076 { 2077 int i; 2078 unsigned char *reg; 2079 unsigned int *val; 2080 2081 snd_emu10k1_audio_enable(emu); 2082 2083 /* resore for spdif */ 2084 if (emu->audigy) 2085 outl(emu->saved_a_iocfg, emu->port + A_IOCFG); 2086 outl(emu->saved_hcfg, emu->port + HCFG); 2087 2088 val = emu->saved_ptr; 2089 for (reg = saved_regs; *reg != 0xff; reg++) 2090 for (i = 0; i < NUM_G; i++, val++) 2091 snd_emu10k1_ptr_write(emu, *reg, i, *val); 2092 if (emu->audigy) { 2093 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 2094 for (i = 0; i < NUM_G; i++, val++) 2095 snd_emu10k1_ptr_write(emu, *reg, i, *val); 2096 } 2097 } 2098 #endif 2099