xref: /openbmc/linux/sound/pci/emu10k1/emu10k1_main.c (revision 9ac8d3fb)
1 /*
2  *  Copyright (c) by Jaroslav Kysela <perex@perex.cz>
3  *                   Creative Labs, Inc.
4  *  Routines for control of EMU10K1 chips
5  *
6  *  Copyright (c) by James Courtier-Dutton <James@superbug.co.uk>
7  *      Added support for Audigy 2 Value.
8  *  	Added EMU 1010 support.
9  *  	General bug fixes and enhancements.
10  *
11  *
12  *  BUGS:
13  *    --
14  *
15  *  TODO:
16  *    --
17  *
18  *   This program is free software; you can redistribute it and/or modify
19  *   it under the terms of the GNU General Public License as published by
20  *   the Free Software Foundation; either version 2 of the License, or
21  *   (at your option) any later version.
22  *
23  *   This program is distributed in the hope that it will be useful,
24  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
25  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  *   GNU General Public License for more details.
27  *
28  *   You should have received a copy of the GNU General Public License
29  *   along with this program; if not, write to the Free Software
30  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
31  *
32  */
33 
34 #include <linux/sched.h>
35 #include <linux/kthread.h>
36 #include <linux/delay.h>
37 #include <linux/init.h>
38 #include <linux/interrupt.h>
39 #include <linux/pci.h>
40 #include <linux/slab.h>
41 #include <linux/vmalloc.h>
42 #include <linux/mutex.h>
43 
44 
45 #include <sound/core.h>
46 #include <sound/emu10k1.h>
47 #include <linux/firmware.h>
48 #include "p16v.h"
49 #include "tina2.h"
50 #include "p17v.h"
51 
52 
53 #define HANA_FILENAME "emu/hana.fw"
54 #define DOCK_FILENAME "emu/audio_dock.fw"
55 #define EMU1010B_FILENAME "emu/emu1010b.fw"
56 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw"
57 #define EMU0404_FILENAME "emu/emu0404.fw"
58 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw"
59 
60 MODULE_FIRMWARE(HANA_FILENAME);
61 MODULE_FIRMWARE(DOCK_FILENAME);
62 MODULE_FIRMWARE(EMU1010B_FILENAME);
63 MODULE_FIRMWARE(MICRO_DOCK_FILENAME);
64 MODULE_FIRMWARE(EMU0404_FILENAME);
65 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME);
66 
67 
68 /*************************************************************************
69  * EMU10K1 init / done
70  *************************************************************************/
71 
72 void snd_emu10k1_voice_init(struct snd_emu10k1 * emu, int ch)
73 {
74 	snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
75 	snd_emu10k1_ptr_write(emu, IP, ch, 0);
76 	snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
77 	snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
78 	snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
79 	snd_emu10k1_ptr_write(emu, CPF, ch, 0);
80 	snd_emu10k1_ptr_write(emu, CCR, ch, 0);
81 
82 	snd_emu10k1_ptr_write(emu, PSST, ch, 0);
83 	snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
84 	snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
85 	snd_emu10k1_ptr_write(emu, Z1, ch, 0);
86 	snd_emu10k1_ptr_write(emu, Z2, ch, 0);
87 	snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
88 
89 	snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
90 	snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
91 	snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
92 	snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
93 	snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
94 	snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24);	/* 1 Hz */
95 	snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24);	/* 1 Hz */
96 	snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
97 
98 	/*** these are last so OFF prevents writing ***/
99 	snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
100 	snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
101 	snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
102 	snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
103 	snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
104 
105 	/* Audigy extra stuffs */
106 	if (emu->audigy) {
107 		snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
108 		snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
109 		snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
110 		snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
111 		snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
112 		snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
113 		snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
114 	}
115 }
116 
117 static unsigned int spi_dac_init[] = {
118 		0x00ff,
119 		0x02ff,
120 		0x0400,
121 		0x0520,
122 		0x0600,
123 		0x08ff,
124 		0x0aff,
125 		0x0cff,
126 		0x0eff,
127 		0x10ff,
128 		0x1200,
129 		0x1400,
130 		0x1480,
131 		0x1800,
132 		0x1aff,
133 		0x1cff,
134 		0x1e00,
135 		0x0530,
136 		0x0602,
137 		0x0622,
138 		0x1400,
139 };
140 
141 static unsigned int i2c_adc_init[][2] = {
142 	{ 0x17, 0x00 }, /* Reset */
143 	{ 0x07, 0x00 }, /* Timeout */
144 	{ 0x0b, 0x22 },  /* Interface control */
145 	{ 0x0c, 0x22 },  /* Master mode control */
146 	{ 0x0d, 0x08 },  /* Powerdown control */
147 	{ 0x0e, 0xcf },  /* Attenuation Left  0x01 = -103dB, 0xff = 24dB */
148 	{ 0x0f, 0xcf },  /* Attenuation Right 0.5dB steps */
149 	{ 0x10, 0x7b },  /* ALC Control 1 */
150 	{ 0x11, 0x00 },  /* ALC Control 2 */
151 	{ 0x12, 0x32 },  /* ALC Control 3 */
152 	{ 0x13, 0x00 },  /* Noise gate control */
153 	{ 0x14, 0xa6 },  /* Limiter control */
154 	{ 0x15, ADC_MUX_2 },  /* ADC Mixer control. Mic for Audigy 2 ZS Notebook */
155 };
156 
157 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir, int resume)
158 {
159 	unsigned int silent_page;
160 	int ch;
161 	u32 tmp;
162 
163 	/* disable audio and lock cache */
164 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE,
165 	     emu->port + HCFG);
166 
167 	/* reset recording buffers */
168 	snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
169 	snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
170 	snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
171 	snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
172 	snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
173 	snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
174 
175 	/* disable channel interrupt */
176 	outl(0, emu->port + INTE);
177 	snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
178 	snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
179 	snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
180 	snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
181 
182 	if (emu->audigy){
183 		/* set SPDIF bypass mode */
184 		snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
185 		/* enable rear left + rear right AC97 slots */
186 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT |
187 				      AC97SLOT_REAR_LEFT);
188 	}
189 
190 	/* init envelope engine */
191 	for (ch = 0; ch < NUM_G; ch++)
192 		snd_emu10k1_voice_init(emu, ch);
193 
194 	snd_emu10k1_ptr_write(emu, SPCS0, 0, emu->spdif_bits[0]);
195 	snd_emu10k1_ptr_write(emu, SPCS1, 0, emu->spdif_bits[1]);
196 	snd_emu10k1_ptr_write(emu, SPCS2, 0, emu->spdif_bits[2]);
197 
198 	if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
199 		/* Hacks for Alice3 to work independent of haP16V driver */
200 		//Setup SRCMulti_I2S SamplingRate
201 		tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
202 		tmp &= 0xfffff1ff;
203 		tmp |= (0x2<<9);
204 		snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
205 
206 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
207 		snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
208 		/* Setup SRCMulti Input Audio Enable */
209 		/* Use 0xFFFFFFFF to enable P16V sounds. */
210 		snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
211 
212 		/* Enabled Phased (8-channel) P16V playback */
213 		outl(0x0201, emu->port + HCFG2);
214 		/* Set playback routing. */
215 		snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
216 	}
217 	if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */
218 		/* Hacks for Alice3 to work independent of haP16V driver */
219 		snd_printk(KERN_INFO "Audigy2 value: Special config.\n");
220 		//Setup SRCMulti_I2S SamplingRate
221 		tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
222 		tmp &= 0xfffff1ff;
223 		tmp |= (0x2<<9);
224 		snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
225 
226 		/* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
227 		outl(0x600000, emu->port + 0x20);
228 		outl(0x14, emu->port + 0x24);
229 
230 		/* Setup SRCMulti Input Audio Enable */
231 		outl(0x7b0000, emu->port + 0x20);
232 		outl(0xFF000000, emu->port + 0x24);
233 
234 		/* Setup SPDIF Out Audio Enable */
235 		/* The Audigy 2 Value has a separate SPDIF out,
236 		 * so no need for a mixer switch
237 		 */
238 		outl(0x7a0000, emu->port + 0x20);
239 		outl(0xFF000000, emu->port + 0x24);
240 		tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
241 		outl(tmp, emu->port + A_IOCFG);
242 	}
243 	if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */
244 		int size, n;
245 
246 		size = ARRAY_SIZE(spi_dac_init);
247 		for (n = 0; n < size; n++)
248 			snd_emu10k1_spi_write(emu, spi_dac_init[n]);
249 
250 		snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10);
251 		/* Enable GPIOs
252 		 * GPIO0: Unknown
253 		 * GPIO1: Speakers-enabled.
254 		 * GPIO2: Unknown
255 		 * GPIO3: Unknown
256 		 * GPIO4: IEC958 Output on.
257 		 * GPIO5: Unknown
258 		 * GPIO6: Unknown
259 		 * GPIO7: Unknown
260 		 */
261 		outl(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */
262 	}
263 	if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */
264 		int size, n;
265 
266 		snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f);
267 		tmp = inl(emu->port + A_IOCFG);
268 		outl(tmp | 0x4, emu->port + A_IOCFG);  /* Set bit 2 for mic input */
269 		tmp = inl(emu->port + A_IOCFG);
270 		size = ARRAY_SIZE(i2c_adc_init);
271 		for (n = 0; n < size; n++)
272 			snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]);
273 		for (n=0; n < 4; n++) {
274 			emu->i2c_capture_volume[n][0]= 0xcf;
275 			emu->i2c_capture_volume[n][1]= 0xcf;
276 		}
277 	}
278 
279 
280 	snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
281 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);	/* taken from original driver */
282 	snd_emu10k1_ptr_write(emu, TCBS, 0, 4);	/* taken from original driver */
283 
284 	silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
285 	for (ch = 0; ch < NUM_G; ch++) {
286 		snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
287 		snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
288 	}
289 
290 	if (emu->card_capabilities->emu_model) {
291 		outl(HCFG_AUTOMUTE_ASYNC |
292 			HCFG_EMU32_SLAVE |
293 			HCFG_AUDIOENABLE, emu->port + HCFG);
294 	/*
295 	 *  Hokay, setup HCFG
296 	 *   Mute Disable Audio = 0
297 	 *   Lock Tank Memory = 1
298 	 *   Lock Sound Memory = 0
299 	 *   Auto Mute = 1
300 	 */
301 	} else if (emu->audigy) {
302 		if (emu->revision == 4) /* audigy2 */
303 			outl(HCFG_AUDIOENABLE |
304 			     HCFG_AC3ENABLE_CDSPDIF |
305 			     HCFG_AC3ENABLE_GPSPDIF |
306 			     HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
307 		else
308 			outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
309 	/* FIXME: Remove all these emu->model and replace it with a card recognition parameter,
310 	 * e.g. card_capabilities->joystick */
311 	} else if (emu->model == 0x20 ||
312 	    emu->model == 0xc400 ||
313 	    (emu->model == 0x21 && emu->revision < 6))
314 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
315 	else
316 		// With on-chip joystick
317 		outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
318 
319 	if (enable_ir) {	/* enable IR for SB Live */
320 		if (emu->card_capabilities->emu_model) {
321 			;  /* Disable all access to A_IOCFG for the emu1010 */
322 		} else if (emu->card_capabilities->i2c_adc) {
323 			;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
324 		} else if (emu->audigy) {
325 			unsigned int reg = inl(emu->port + A_IOCFG);
326 			outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
327 			udelay(500);
328 			outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
329 			udelay(100);
330 			outl(reg, emu->port + A_IOCFG);
331 		} else {
332 			unsigned int reg = inl(emu->port + HCFG);
333 			outl(reg | HCFG_GPOUT2, emu->port + HCFG);
334 			udelay(500);
335 			outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
336 			udelay(100);
337 			outl(reg, emu->port + HCFG);
338  		}
339 	}
340 
341 	if (emu->card_capabilities->emu_model) {
342 		;  /* Disable all access to A_IOCFG for the emu1010 */
343 	} else if (emu->card_capabilities->i2c_adc) {
344 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
345 	} else if (emu->audigy) {	/* enable analog output */
346 		unsigned int reg = inl(emu->port + A_IOCFG);
347 		outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
348 	}
349 
350 	return 0;
351 }
352 
353 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu)
354 {
355 	/*
356 	 *  Enable the audio bit
357 	 */
358 	outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
359 
360 	/* Enable analog/digital outs on audigy */
361 	if (emu->card_capabilities->emu_model) {
362 		;  /* Disable all access to A_IOCFG for the emu1010 */
363 	} else if (emu->card_capabilities->i2c_adc) {
364 		;  /* Disable A_IOCFG for Audigy 2 ZS Notebook */
365 	} else if (emu->audigy) {
366 		outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
367 
368 		if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
369 			/* Unmute Analog now.  Set GPO6 to 1 for Apollo.
370 			 * This has to be done after init ALice3 I2SOut beyond 48KHz.
371 			 * So, sequence is important. */
372 			outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
373 		} else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */
374 			/* Unmute Analog now. */
375 			outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
376 		} else {
377 			/* Disable routing from AC97 line out to Front speakers */
378 			outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
379 		}
380 	}
381 
382 #if 0
383 	{
384 	unsigned int tmp;
385 	/* FIXME: the following routine disables LiveDrive-II !! */
386 	// TOSLink detection
387 	emu->tos_link = 0;
388 	tmp = inl(emu->port + HCFG);
389 	if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
390 		outl(tmp|0x800, emu->port + HCFG);
391 		udelay(50);
392 		if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
393 			emu->tos_link = 1;
394 			outl(tmp, emu->port + HCFG);
395 		}
396 	}
397 	}
398 #endif
399 
400 	snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
401 }
402 
403 int snd_emu10k1_done(struct snd_emu10k1 * emu)
404 {
405 	int ch;
406 
407 	outl(0, emu->port + INTE);
408 
409 	/*
410 	 *  Shutdown the chip
411 	 */
412 	for (ch = 0; ch < NUM_G; ch++)
413 		snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
414 	for (ch = 0; ch < NUM_G; ch++) {
415 		snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
416 		snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
417 		snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
418 		snd_emu10k1_ptr_write(emu, CPF, ch, 0);
419 	}
420 
421 	/* reset recording buffers */
422 	snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
423 	snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
424 	snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
425 	snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
426 	snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
427 	snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
428 	snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
429 	snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
430 	snd_emu10k1_ptr_write(emu, TCB, 0, 0);
431 	if (emu->audigy)
432 		snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
433 	else
434 		snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
435 
436 	/* disable channel interrupt */
437 	snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
438 	snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
439 	snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
440 	snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
441 
442 	/* disable audio and lock cache */
443 	outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
444 	snd_emu10k1_ptr_write(emu, PTB, 0, 0);
445 
446 	return 0;
447 }
448 
449 /*************************************************************************
450  * ECARD functional implementation
451  *************************************************************************/
452 
453 /* In A1 Silicon, these bits are in the HC register */
454 #define HOOKN_BIT		(1L << 12)
455 #define HANDN_BIT		(1L << 11)
456 #define PULSEN_BIT		(1L << 10)
457 
458 #define EC_GDI1			(1 << 13)
459 #define EC_GDI0			(1 << 14)
460 
461 #define EC_NUM_CONTROL_BITS	20
462 
463 #define EC_AC3_DATA_SELN	0x0001L
464 #define EC_EE_DATA_SEL		0x0002L
465 #define EC_EE_CNTRL_SELN	0x0004L
466 #define EC_EECLK		0x0008L
467 #define EC_EECS			0x0010L
468 #define EC_EESDO		0x0020L
469 #define EC_TRIM_CSN		0x0040L
470 #define EC_TRIM_SCLK		0x0080L
471 #define EC_TRIM_SDATA		0x0100L
472 #define EC_TRIM_MUTEN		0x0200L
473 #define EC_ADCCAL		0x0400L
474 #define EC_ADCRSTN		0x0800L
475 #define EC_DACCAL		0x1000L
476 #define EC_DACMUTEN		0x2000L
477 #define EC_LEDN			0x4000L
478 
479 #define EC_SPDIF0_SEL_SHIFT	15
480 #define EC_SPDIF1_SEL_SHIFT	17
481 #define EC_SPDIF0_SEL_MASK	(0x3L << EC_SPDIF0_SEL_SHIFT)
482 #define EC_SPDIF1_SEL_MASK	(0x7L << EC_SPDIF1_SEL_SHIFT)
483 #define EC_SPDIF0_SELECT(_x)	(((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
484 #define EC_SPDIF1_SELECT(_x)	(((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
485 #define EC_CURRENT_PROM_VERSION 0x01	/* Self-explanatory.  This should
486 					 * be incremented any time the EEPROM's
487 					 * format is changed.  */
488 
489 #define EC_EEPROM_SIZE		0x40	/* ECARD EEPROM has 64 16-bit words */
490 
491 /* Addresses for special values stored in to EEPROM */
492 #define EC_PROM_VERSION_ADDR	0x20	/* Address of the current prom version */
493 #define EC_BOARDREV0_ADDR	0x21	/* LSW of board rev */
494 #define EC_BOARDREV1_ADDR	0x22	/* MSW of board rev */
495 
496 #define EC_LAST_PROMFILE_ADDR	0x2f
497 
498 #define EC_SERIALNUM_ADDR	0x30	/* First word of serial number.  The
499 					 * can be up to 30 characters in length
500 					 * and is stored as a NULL-terminated
501 					 * ASCII string.  Any unused bytes must be
502 					 * filled with zeros */
503 #define EC_CHECKSUM_ADDR	0x3f	/* Location at which checksum is stored */
504 
505 
506 /* Most of this stuff is pretty self-evident.  According to the hardware
507  * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
508  * offset problem.  Weird.
509  */
510 #define EC_RAW_RUN_MODE		(EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
511 				 EC_TRIM_CSN)
512 
513 
514 #define EC_DEFAULT_ADC_GAIN	0xC4C4
515 #define EC_DEFAULT_SPDIF0_SEL	0x0
516 #define EC_DEFAULT_SPDIF1_SEL	0x4
517 
518 /**************************************************************************
519  * @func Clock bits into the Ecard's control latch.  The Ecard uses a
520  *  control latch will is loaded bit-serially by toggling the Modem control
521  *  lines from function 2 on the E8010.  This function hides these details
522  *  and presents the illusion that we are actually writing to a distinct
523  *  register.
524  */
525 
526 static void snd_emu10k1_ecard_write(struct snd_emu10k1 * emu, unsigned int value)
527 {
528 	unsigned short count;
529 	unsigned int data;
530 	unsigned long hc_port;
531 	unsigned int hc_value;
532 
533 	hc_port = emu->port + HCFG;
534 	hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
535 	outl(hc_value, hc_port);
536 
537 	for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
538 
539 		/* Set up the value */
540 		data = ((value & 0x1) ? PULSEN_BIT : 0);
541 		value >>= 1;
542 
543 		outl(hc_value | data, hc_port);
544 
545 		/* Clock the shift register */
546 		outl(hc_value | data | HANDN_BIT, hc_port);
547 		outl(hc_value | data, hc_port);
548 	}
549 
550 	/* Latch the bits */
551 	outl(hc_value | HOOKN_BIT, hc_port);
552 	outl(hc_value, hc_port);
553 }
554 
555 /**************************************************************************
556  * @func Set the gain of the ECARD's CS3310 Trim/gain controller.  The
557  * trim value consists of a 16bit value which is composed of two
558  * 8 bit gain/trim values, one for the left channel and one for the
559  * right channel.  The following table maps from the Gain/Attenuation
560  * value in decibels into the corresponding bit pattern for a single
561  * channel.
562  */
563 
564 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 * emu,
565 					 unsigned short gain)
566 {
567 	unsigned int bit;
568 
569 	/* Enable writing to the TRIM registers */
570 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
571 
572 	/* Do it again to insure that we meet hold time requirements */
573 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
574 
575 	for (bit = (1 << 15); bit; bit >>= 1) {
576 		unsigned int value;
577 
578 		value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
579 
580 		if (gain & bit)
581 			value |= EC_TRIM_SDATA;
582 
583 		/* Clock the bit */
584 		snd_emu10k1_ecard_write(emu, value);
585 		snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
586 		snd_emu10k1_ecard_write(emu, value);
587 	}
588 
589 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
590 }
591 
592 static int snd_emu10k1_ecard_init(struct snd_emu10k1 * emu)
593 {
594 	unsigned int hc_value;
595 
596 	/* Set up the initial settings */
597 	emu->ecard_ctrl = EC_RAW_RUN_MODE |
598 			  EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
599 			  EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
600 
601 	/* Step 0: Set the codec type in the hardware control register
602 	 * and enable audio output */
603 	hc_value = inl(emu->port + HCFG);
604 	outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
605 	inl(emu->port + HCFG);
606 
607 	/* Step 1: Turn off the led and deassert TRIM_CS */
608 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
609 
610 	/* Step 2: Calibrate the ADC and DAC */
611 	snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
612 
613 	/* Step 3: Wait for awhile;   XXX We can't get away with this
614 	 * under a real operating system; we'll need to block and wait that
615 	 * way. */
616 	snd_emu10k1_wait(emu, 48000);
617 
618 	/* Step 4: Switch off the DAC and ADC calibration.  Note
619 	 * That ADC_CAL is actually an inverted signal, so we assert
620 	 * it here to stop calibration.  */
621 	snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
622 
623 	/* Step 4: Switch into run mode */
624 	snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
625 
626 	/* Step 5: Set the analog input gain */
627 	snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
628 
629 	return 0;
630 }
631 
632 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 * emu)
633 {
634 	unsigned long special_port;
635 	unsigned int value;
636 
637 	/* Special initialisation routine
638 	 * before the rest of the IO-Ports become active.
639 	 */
640 	special_port = emu->port + 0x38;
641 	value = inl(special_port);
642 	outl(0x00d00000, special_port);
643 	value = inl(special_port);
644 	outl(0x00d00001, special_port);
645 	value = inl(special_port);
646 	outl(0x00d0005f, special_port);
647 	value = inl(special_port);
648 	outl(0x00d0007f, special_port);
649 	value = inl(special_port);
650 	outl(0x0090007f, special_port);
651 	value = inl(special_port);
652 
653 	snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */
654 	/* Delay to give time for ADC chip to switch on. It needs 113ms */
655 	msleep(200);
656 	return 0;
657 }
658 
659 static int snd_emu1010_load_firmware(struct snd_emu10k1 * emu, const char * filename)
660 {
661 	int err;
662 	int n, i;
663 	int reg;
664 	int value;
665 	unsigned int write_post;
666 	unsigned long flags;
667 	const struct firmware *fw_entry;
668 
669 	if ((err = request_firmware(&fw_entry, filename, &emu->pci->dev)) != 0) {
670 		snd_printk(KERN_ERR "firmware: %s not found. Err=%d\n",filename, err);
671 		return err;
672 	}
673 	snd_printk(KERN_INFO "firmware size=0x%zx\n", fw_entry->size);
674 
675 	/* The FPGA is a Xilinx Spartan IIE XC2S50E */
676 	/* GPIO7 -> FPGA PGMN
677 	 * GPIO6 -> FPGA CCLK
678 	 * GPIO5 -> FPGA DIN
679 	 * FPGA CONFIG OFF -> FPGA PGMN
680 	 */
681 	spin_lock_irqsave(&emu->emu_lock, flags);
682 	outl(0x00, emu->port + A_IOCFG); /* Set PGMN low for 1uS. */
683 	write_post = inl(emu->port + A_IOCFG);
684 	udelay(100);
685 	outl(0x80, emu->port + A_IOCFG); /* Leave bit 7 set during netlist setup. */
686 	write_post = inl(emu->port + A_IOCFG);
687 	udelay(100); /* Allow FPGA memory to clean */
688 	for(n = 0; n < fw_entry->size; n++) {
689 		value=fw_entry->data[n];
690 		for(i = 0; i < 8; i++) {
691 			reg = 0x80;
692 			if (value & 0x1)
693 				reg = reg | 0x20;
694 			value = value >> 1;
695 			outl(reg, emu->port + A_IOCFG);
696 			write_post = inl(emu->port + A_IOCFG);
697 			outl(reg | 0x40, emu->port + A_IOCFG);
698 			write_post = inl(emu->port + A_IOCFG);
699 		}
700 	}
701 	/* After programming, set GPIO bit 4 high again. */
702 	outl(0x10, emu->port + A_IOCFG);
703 	write_post = inl(emu->port + A_IOCFG);
704 	spin_unlock_irqrestore(&emu->emu_lock, flags);
705 
706         release_firmware(fw_entry);
707 	return 0;
708 }
709 
710 static int emu1010_firmware_thread(void *data)
711 {
712 	struct snd_emu10k1 * emu = data;
713 	int tmp,tmp2;
714 	int reg;
715 	int err;
716 
717 	for (;;) {
718 		/* Delay to allow Audio Dock to settle */
719 		msleep_interruptible(1000);
720 		if (kthread_should_stop())
721 			break;
722 		snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &tmp ); /* IRQ Status */
723 		snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg ); /* OPTIONS: Which cards are attached to the EMU */
724 		if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) {
725 			/* Audio Dock attached */
726 			/* Return to Audio Dock programming mode */
727 			snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware\n");
728 			snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_AUDIODOCK );
729 			if (emu->card_capabilities->emu_model ==
730 			    EMU_MODEL_EMU1010) {
731 				if ((err = snd_emu1010_load_firmware(emu, DOCK_FILENAME)) != 0) {
732 					continue;
733 				}
734 			} else if (emu->card_capabilities->emu_model ==
735 				   EMU_MODEL_EMU1010B) {
736 				if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
737 					continue;
738 				}
739 			} else if (emu->card_capabilities->emu_model ==
740 				   EMU_MODEL_EMU1616) {
741 				if ((err = snd_emu1010_load_firmware(emu, MICRO_DOCK_FILENAME)) != 0) {
742 					continue;
743 				}
744 			}
745 
746 			snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0 );
747 			snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &reg );
748 			snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_IRQ_STATUS=0x%x\n",reg);
749 			/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
750 			snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
751 			snd_printk(KERN_INFO "emu1010: EMU_HANA+DOCK_ID=0x%x\n",reg);
752 			if ((reg & 0x1f) != 0x15) {
753 				/* FPGA failed to be programmed */
754 				snd_printk(KERN_INFO "emu1010: Loading Audio Dock Firmware file failed, reg=0x%x\n", reg);
755 				continue;
756 			}
757 			snd_printk(KERN_INFO "emu1010: Audio Dock Firmware loaded\n");
758 			snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp );
759 			snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2 );
760 			snd_printk("Audio Dock ver:%d.%d\n",tmp ,tmp2);
761 			/* Sync clocking between 1010 and Dock */
762 			/* Allow DLL to settle */
763 			msleep(10);
764 			/* Unmute all. Default is muted after a firmware load */
765 			snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE );
766 		}
767 	}
768 	snd_printk(KERN_INFO "emu1010: firmware thread stopping\n");
769 	return 0;
770 }
771 
772 /*
773  * EMU-1010 - details found out from this driver, official MS Win drivers,
774  * testing the card:
775  *
776  * Audigy2 (aka Alice2):
777  * ---------------------
778  * 	* communication over PCI
779  * 	* conversion of 32-bit data coming over EMU32 links from HANA FPGA
780  *	  to 2 x 16-bit, using internal DSP instructions
781  * 	* slave mode, clock supplied by HANA
782  * 	* linked to HANA using:
783  * 		32 x 32-bit serial EMU32 output channels
784  * 		16 x EMU32 input channels
785  * 		(?) x I2S I/O channels (?)
786  *
787  * FPGA (aka HANA):
788  * ---------------
789  * 	* provides all (?) physical inputs and outputs of the card
790  * 		(ADC, DAC, SPDIF I/O, ADAT I/O, etc.)
791  * 	* provides clock signal for the card and Alice2
792  * 	* two crystals - for 44.1kHz and 48kHz multiples
793  * 	* provides internal routing of signal sources to signal destinations
794  * 	* inputs/outputs to Alice2 - see above
795  *
796  * Current status of the driver:
797  * ----------------------------
798  * 	* only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz)
799  * 	* PCM device nb. 2:
800  *		16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops
801  * 		16 x 32-bit capture - snd_emu10k1_capture_efx_ops
802  */
803 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 * emu)
804 {
805 	unsigned int i;
806 	int tmp,tmp2;
807 	int reg;
808 	int err;
809 	const char *filename = NULL;
810 
811 	snd_printk(KERN_INFO "emu1010: Special config.\n");
812 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
813 	 * Lock Sound Memory Cache, Lock Tank Memory Cache,
814 	 * Mute all codecs.
815 	 */
816 	outl(0x0005a00c, emu->port + HCFG);
817 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
818 	 * Lock Tank Memory Cache,
819 	 * Mute all codecs.
820 	 */
821 	outl(0x0005a004, emu->port + HCFG);
822 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
823 	 * Mute all codecs.
824 	 */
825 	outl(0x0005a000, emu->port + HCFG);
826 	/* AC97 2.1, Any 16Meg of 4Gig address, Auto-Mute, EMU32 Slave,
827 	 * Mute all codecs.
828 	 */
829 	outl(0x0005a000, emu->port + HCFG);
830 
831 	/* Disable 48Volt power to Audio Dock */
832 	snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
833 
834 	/* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */
835 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
836 	snd_printdd("reg1=0x%x\n",reg);
837 	if ((reg & 0x3f) == 0x15) {
838 		/* FPGA netlist already present so clear it */
839 		/* Return to programming mode */
840 
841 		snd_emu1010_fpga_write(emu,  EMU_HANA_FPGA_CONFIG, 0x02 );
842 	}
843 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
844 	snd_printdd("reg2=0x%x\n",reg);
845 	if ((reg & 0x3f) == 0x15) {
846 		/* FPGA failed to return to programming mode */
847 		snd_printk(KERN_INFO "emu1010: FPGA failed to return to programming mode\n");
848 		return -ENODEV;
849 	}
850 	snd_printk(KERN_INFO "emu1010: EMU_HANA_ID=0x%x\n",reg);
851 	switch (emu->card_capabilities->emu_model) {
852 	case EMU_MODEL_EMU1010:
853 		filename = HANA_FILENAME;
854 		break;
855 	case EMU_MODEL_EMU1010B:
856 		filename = EMU1010B_FILENAME;
857 		break;
858 	case EMU_MODEL_EMU1616:
859 		filename = EMU1010_NOTEBOOK_FILENAME;
860 		break;
861 	case EMU_MODEL_EMU0404:
862 		filename = EMU0404_FILENAME;
863 		break;
864 	default:
865 		filename = NULL;
866 		return -ENODEV;
867 		break;
868 	}
869 	snd_printk(KERN_INFO "emu1010: filename %s testing\n", filename);
870 	err = snd_emu1010_load_firmware(emu, filename);
871 	if (err != 0) {
872 		snd_printk(
873 			KERN_INFO "emu1010: Loading Firmware file %s failed\n",
874 			filename);
875 		return err;
876 	}
877 
878 	/* ID, should read & 0x7f = 0x55 when FPGA programmed. */
879 	snd_emu1010_fpga_read(emu, EMU_HANA_ID, &reg );
880 	if ((reg & 0x3f) != 0x15) {
881 		/* FPGA failed to be programmed */
882 		snd_printk(KERN_INFO "emu1010: Loading Hana Firmware file failed, reg=0x%x\n", reg);
883 		return -ENODEV;
884 	}
885 
886 	snd_printk(KERN_INFO "emu1010: Hana Firmware loaded\n");
887 	snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp );
888 	snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2 );
889 	snd_printk("Hana ver:%d.%d\n",tmp ,tmp2);
890 	/* Enable 48Volt power to Audio Dock */
891 	snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  EMU_HANA_DOCK_PWR_ON );
892 
893 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
894 	snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
895 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
896 	snd_printk(KERN_INFO "emu1010: Card options=0x%x\n",reg);
897 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTICAL_TYPE, &tmp );
898 	/* Optical -> ADAT I/O  */
899 	/* 0 : SPDIF
900 	 * 1 : ADAT
901 	 */
902 	emu->emu1010.optical_in = 1; /* IN_ADAT */
903 	emu->emu1010.optical_out = 1; /* IN_ADAT */
904 	tmp = 0;
905 	tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : 0) |
906 		(emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : 0);
907 	snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp );
908 	snd_emu1010_fpga_read(emu, EMU_HANA_ADC_PADS, &tmp );
909 	/* Set no attenuation on Audio Dock pads. */
910 	snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, 0x00 );
911 	emu->emu1010.adc_pads = 0x00;
912 	snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
913 	/* Unmute Audio dock DACs, Headphone source DAC-4. */
914 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
915 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
916 	snd_emu1010_fpga_read(emu, EMU_HANA_DAC_PADS, &tmp );
917 	/* DAC PADs. */
918 	snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, 0x0f );
919 	emu->emu1010.dac_pads = 0x0f;
920 	snd_emu1010_fpga_read(emu, EMU_HANA_DOCK_MISC, &tmp );
921 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, 0x30 );
922 	snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
923 	/* SPDIF Format. Set Consumer mode, 24bit, copy enable */
924 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 );
925 	/* MIDI routing */
926 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 );
927 	/* Unknown. */
928 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c );
929 	/* snd_emu1010_fpga_write(emu, 0x09, 0x0f ); // IRQ Enable: All on */
930 	/* IRQ Enable: All off */
931 	snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 0x00 );
932 
933 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &reg );
934 	snd_printk(KERN_INFO "emu1010: Card options3=0x%x\n",reg);
935 	/* Default WCLK set to 48kHz. */
936 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x00 );
937 	/* Word Clock source, Internal 48kHz x1 */
938 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
939 	//snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
940 	/* Audio Dock LEDs. */
941 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12 );
942 
943 #if 0
944 	/* For 96kHz */
945 	snd_emu1010_fpga_link_dst_src_write(emu,
946 		EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
947 	snd_emu1010_fpga_link_dst_src_write(emu,
948 		EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
949 	snd_emu1010_fpga_link_dst_src_write(emu,
950 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT2);
951 	snd_emu1010_fpga_link_dst_src_write(emu,
952 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT2);
953 #endif
954 #if 0
955 	/* For 192kHz */
956 	snd_emu1010_fpga_link_dst_src_write(emu,
957 		EMU_DST_ALICE2_EMU32_0, EMU_SRC_HAMOA_ADC_LEFT1);
958 	snd_emu1010_fpga_link_dst_src_write(emu,
959 		EMU_DST_ALICE2_EMU32_1, EMU_SRC_HAMOA_ADC_RIGHT1);
960 	snd_emu1010_fpga_link_dst_src_write(emu,
961 		EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
962 	snd_emu1010_fpga_link_dst_src_write(emu,
963 		EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_RIGHT2);
964 	snd_emu1010_fpga_link_dst_src_write(emu,
965 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_HAMOA_ADC_LEFT3);
966 	snd_emu1010_fpga_link_dst_src_write(emu,
967 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_HAMOA_ADC_RIGHT3);
968 	snd_emu1010_fpga_link_dst_src_write(emu,
969 		EMU_DST_ALICE2_EMU32_6, EMU_SRC_HAMOA_ADC_LEFT4);
970 	snd_emu1010_fpga_link_dst_src_write(emu,
971 		EMU_DST_ALICE2_EMU32_7, EMU_SRC_HAMOA_ADC_RIGHT4);
972 #endif
973 #if 1
974 	/* For 48kHz */
975 	snd_emu1010_fpga_link_dst_src_write(emu,
976 		EMU_DST_ALICE2_EMU32_0, EMU_SRC_DOCK_MIC_A1);
977 	snd_emu1010_fpga_link_dst_src_write(emu,
978 		EMU_DST_ALICE2_EMU32_1, EMU_SRC_DOCK_MIC_B1);
979 	snd_emu1010_fpga_link_dst_src_write(emu,
980 		EMU_DST_ALICE2_EMU32_2, EMU_SRC_HAMOA_ADC_LEFT2);
981 	snd_emu1010_fpga_link_dst_src_write(emu,
982 		EMU_DST_ALICE2_EMU32_3, EMU_SRC_HAMOA_ADC_LEFT2);
983 	snd_emu1010_fpga_link_dst_src_write(emu,
984 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_DOCK_ADC1_LEFT1);
985 	snd_emu1010_fpga_link_dst_src_write(emu,
986 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_DOCK_ADC1_RIGHT1);
987 	snd_emu1010_fpga_link_dst_src_write(emu,
988 		EMU_DST_ALICE2_EMU32_6, EMU_SRC_DOCK_ADC2_LEFT1);
989 	snd_emu1010_fpga_link_dst_src_write(emu,
990 		EMU_DST_ALICE2_EMU32_7, EMU_SRC_DOCK_ADC2_RIGHT1);
991 	/* Pavel Hofman - setting defaults for 8 more capture channels
992 	 * Defaults only, users will set their own values anyways, let's
993 	 * just copy/paste.
994 	 */
995 
996 	snd_emu1010_fpga_link_dst_src_write(emu,
997 		EMU_DST_ALICE2_EMU32_8, EMU_SRC_DOCK_MIC_A1);
998 	snd_emu1010_fpga_link_dst_src_write(emu,
999 		EMU_DST_ALICE2_EMU32_9, EMU_SRC_DOCK_MIC_B1);
1000 	snd_emu1010_fpga_link_dst_src_write(emu,
1001 		EMU_DST_ALICE2_EMU32_A, EMU_SRC_HAMOA_ADC_LEFT2);
1002 	snd_emu1010_fpga_link_dst_src_write(emu,
1003 		EMU_DST_ALICE2_EMU32_B, EMU_SRC_HAMOA_ADC_LEFT2);
1004 	snd_emu1010_fpga_link_dst_src_write(emu,
1005 		EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_ADC1_LEFT1);
1006 	snd_emu1010_fpga_link_dst_src_write(emu,
1007 		EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_ADC1_RIGHT1);
1008 	snd_emu1010_fpga_link_dst_src_write(emu,
1009 		EMU_DST_ALICE2_EMU32_E, EMU_SRC_DOCK_ADC2_LEFT1);
1010 	snd_emu1010_fpga_link_dst_src_write(emu,
1011 		EMU_DST_ALICE2_EMU32_F, EMU_SRC_DOCK_ADC2_RIGHT1);
1012 #endif
1013 #if 0
1014 	/* Original */
1015 	snd_emu1010_fpga_link_dst_src_write(emu,
1016 		EMU_DST_ALICE2_EMU32_4, EMU_SRC_HANA_ADAT);
1017 	snd_emu1010_fpga_link_dst_src_write(emu,
1018 		EMU_DST_ALICE2_EMU32_5, EMU_SRC_HANA_ADAT + 1);
1019 	snd_emu1010_fpga_link_dst_src_write(emu,
1020 		EMU_DST_ALICE2_EMU32_6, EMU_SRC_HANA_ADAT + 2);
1021 	snd_emu1010_fpga_link_dst_src_write(emu,
1022 		EMU_DST_ALICE2_EMU32_7, EMU_SRC_HANA_ADAT + 3);
1023 	snd_emu1010_fpga_link_dst_src_write(emu,
1024 		EMU_DST_ALICE2_EMU32_8, EMU_SRC_HANA_ADAT + 4);
1025 	snd_emu1010_fpga_link_dst_src_write(emu,
1026 		EMU_DST_ALICE2_EMU32_9, EMU_SRC_HANA_ADAT + 5);
1027 	snd_emu1010_fpga_link_dst_src_write(emu,
1028 		EMU_DST_ALICE2_EMU32_A, EMU_SRC_HANA_ADAT + 6);
1029 	snd_emu1010_fpga_link_dst_src_write(emu,
1030 		EMU_DST_ALICE2_EMU32_B, EMU_SRC_HANA_ADAT + 7);
1031 	snd_emu1010_fpga_link_dst_src_write(emu,
1032 		EMU_DST_ALICE2_EMU32_C, EMU_SRC_DOCK_MIC_A1);
1033 	snd_emu1010_fpga_link_dst_src_write(emu,
1034 		EMU_DST_ALICE2_EMU32_D, EMU_SRC_DOCK_MIC_B1);
1035 	snd_emu1010_fpga_link_dst_src_write(emu,
1036 		EMU_DST_ALICE2_EMU32_E, EMU_SRC_HAMOA_ADC_LEFT2);
1037 	snd_emu1010_fpga_link_dst_src_write(emu,
1038 		EMU_DST_ALICE2_EMU32_F, EMU_SRC_HAMOA_ADC_LEFT2);
1039 #endif
1040 	for (i = 0;i < 0x20; i++ ) {
1041 		/* AudioDock Elink <-  Silence */
1042 		snd_emu1010_fpga_link_dst_src_write(emu, 0x0100+i, EMU_SRC_SILENCE);
1043 	}
1044 	for (i = 0;i < 4; i++) {
1045 		/* Hana SPDIF Out <- Silence */
1046 		snd_emu1010_fpga_link_dst_src_write(emu, 0x0200+i, EMU_SRC_SILENCE);
1047 	}
1048 	for (i = 0;i < 7; i++) {
1049 		/* Hamoa DAC <- Silence */
1050 		snd_emu1010_fpga_link_dst_src_write(emu, 0x0300+i, EMU_SRC_SILENCE);
1051 	}
1052 	for (i = 0;i < 7; i++) {
1053 		/* Hana ADAT Out <- Silence */
1054 		snd_emu1010_fpga_link_dst_src_write(emu, EMU_DST_HANA_ADAT + i, EMU_SRC_SILENCE);
1055 	}
1056 	snd_emu1010_fpga_link_dst_src_write(emu,
1057 		EMU_DST_ALICE_I2S0_LEFT, EMU_SRC_DOCK_ADC1_LEFT1);
1058 	snd_emu1010_fpga_link_dst_src_write(emu,
1059 		EMU_DST_ALICE_I2S0_RIGHT, EMU_SRC_DOCK_ADC1_RIGHT1);
1060 	snd_emu1010_fpga_link_dst_src_write(emu,
1061 		EMU_DST_ALICE_I2S1_LEFT, EMU_SRC_DOCK_ADC2_LEFT1);
1062 	snd_emu1010_fpga_link_dst_src_write(emu,
1063 		EMU_DST_ALICE_I2S1_RIGHT, EMU_SRC_DOCK_ADC2_RIGHT1);
1064 	snd_emu1010_fpga_link_dst_src_write(emu,
1065 		EMU_DST_ALICE_I2S2_LEFT, EMU_SRC_DOCK_ADC3_LEFT1);
1066 	snd_emu1010_fpga_link_dst_src_write(emu,
1067 		EMU_DST_ALICE_I2S2_RIGHT, EMU_SRC_DOCK_ADC3_RIGHT1);
1068 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x01 ); // Unmute all
1069 
1070 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1071 
1072 	/* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1073 	 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1074 	 * Mute all codecs.
1075 	 */
1076 	outl(0x0000a000, emu->port + HCFG);
1077 	/* AC97 1.03, Any 32Meg of 2Gig address, Auto-Mute, EMU32 Slave,
1078 	 * Lock Sound Memory Cache, Lock Tank Memory Cache,
1079 	 * Un-Mute all codecs.
1080 	 */
1081 	outl(0x0000a001, emu->port + HCFG);
1082 
1083 	/* Initial boot complete. Now patches */
1084 
1085 	snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, &tmp );
1086 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1087 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1088 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, 0x19 ); /* MIDI Route */
1089 	snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, 0x0c ); /* Unknown */
1090 	snd_emu1010_fpga_read(emu, EMU_HANA_SPDIF_MODE, &tmp );
1091 	snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, 0x10 ); /* SPDIF Format spdif  (or 0x11 for aes/ebu) */
1092 
1093 	/* Start Micro/Audio Dock firmware loader thread */
1094 	if (!emu->emu1010.firmware_thread) {
1095 		emu->emu1010.firmware_thread =
1096 			kthread_create(emu1010_firmware_thread, emu,
1097 				       "emu1010_firmware");
1098 		wake_up_process(emu->emu1010.firmware_thread);
1099 	}
1100 
1101 #if 0
1102 	snd_emu1010_fpga_link_dst_src_write(emu,
1103 		EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32B + 2); /* ALICE2 bus 0xa2 */
1104 	snd_emu1010_fpga_link_dst_src_write(emu,
1105 		EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32B + 3); /* ALICE2 bus 0xa3 */
1106 	snd_emu1010_fpga_link_dst_src_write(emu,
1107 		EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 2); /* ALICE2 bus 0xb2 */
1108 	snd_emu1010_fpga_link_dst_src_write(emu,
1109 		EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 3); /* ALICE2 bus 0xb3 */
1110 #endif
1111 	/* Default outputs */
1112 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1616) {
1113 		/* 1616(M) cardbus default outputs */
1114 		/* ALICE2 bus 0xa0 */
1115 		snd_emu1010_fpga_link_dst_src_write(emu,
1116 			EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1117 		emu->emu1010.output_source[0] = 17;
1118 		snd_emu1010_fpga_link_dst_src_write(emu,
1119 			EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1120 		emu->emu1010.output_source[1] = 18;
1121 		snd_emu1010_fpga_link_dst_src_write(emu,
1122 			EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1123 		emu->emu1010.output_source[2] = 19;
1124 		snd_emu1010_fpga_link_dst_src_write(emu,
1125 			EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1126 		emu->emu1010.output_source[3] = 20;
1127 		snd_emu1010_fpga_link_dst_src_write(emu,
1128 			EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1129 		emu->emu1010.output_source[4] = 21;
1130 		snd_emu1010_fpga_link_dst_src_write(emu,
1131 			EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1132 		emu->emu1010.output_source[5] = 22;
1133 		/* ALICE2 bus 0xa0 */
1134 		snd_emu1010_fpga_link_dst_src_write(emu,
1135 			EMU_DST_MANA_DAC_LEFT, EMU_SRC_ALICE_EMU32A + 0);
1136 		emu->emu1010.output_source[16] = 17;
1137 		snd_emu1010_fpga_link_dst_src_write(emu,
1138 			EMU_DST_MANA_DAC_RIGHT, EMU_SRC_ALICE_EMU32A + 1);
1139 		emu->emu1010.output_source[17] = 18;
1140 	} else {
1141 		/* ALICE2 bus 0xa0 */
1142 		snd_emu1010_fpga_link_dst_src_write(emu,
1143 			EMU_DST_DOCK_DAC1_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1144 		emu->emu1010.output_source[0] = 21;
1145 		snd_emu1010_fpga_link_dst_src_write(emu,
1146 			EMU_DST_DOCK_DAC1_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1147 		emu->emu1010.output_source[1] = 22;
1148 		snd_emu1010_fpga_link_dst_src_write(emu,
1149 			EMU_DST_DOCK_DAC2_LEFT1, EMU_SRC_ALICE_EMU32A + 2);
1150 		emu->emu1010.output_source[2] = 23;
1151 		snd_emu1010_fpga_link_dst_src_write(emu,
1152 			EMU_DST_DOCK_DAC2_RIGHT1, EMU_SRC_ALICE_EMU32A + 3);
1153 		emu->emu1010.output_source[3] = 24;
1154 		snd_emu1010_fpga_link_dst_src_write(emu,
1155 			EMU_DST_DOCK_DAC3_LEFT1, EMU_SRC_ALICE_EMU32A + 4);
1156 		emu->emu1010.output_source[4] = 25;
1157 		snd_emu1010_fpga_link_dst_src_write(emu,
1158 			EMU_DST_DOCK_DAC3_RIGHT1, EMU_SRC_ALICE_EMU32A + 5);
1159 		emu->emu1010.output_source[5] = 26;
1160 		snd_emu1010_fpga_link_dst_src_write(emu,
1161 			EMU_DST_DOCK_DAC4_LEFT1, EMU_SRC_ALICE_EMU32A + 6);
1162 		emu->emu1010.output_source[6] = 27;
1163 		snd_emu1010_fpga_link_dst_src_write(emu,
1164 			EMU_DST_DOCK_DAC4_RIGHT1, EMU_SRC_ALICE_EMU32A + 7);
1165 		emu->emu1010.output_source[7] = 28;
1166 		/* ALICE2 bus 0xa0 */
1167 		snd_emu1010_fpga_link_dst_src_write(emu,
1168 			EMU_DST_DOCK_PHONES_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1169 		emu->emu1010.output_source[8] = 21;
1170 		snd_emu1010_fpga_link_dst_src_write(emu,
1171 			EMU_DST_DOCK_PHONES_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1172 		emu->emu1010.output_source[9] = 22;
1173 		/* ALICE2 bus 0xa0 */
1174 		snd_emu1010_fpga_link_dst_src_write(emu,
1175 			EMU_DST_DOCK_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1176 		emu->emu1010.output_source[10] = 21;
1177 		snd_emu1010_fpga_link_dst_src_write(emu,
1178 			EMU_DST_DOCK_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1179 		emu->emu1010.output_source[11] = 22;
1180 		/* ALICE2 bus 0xa0 */
1181 		snd_emu1010_fpga_link_dst_src_write(emu,
1182 			EMU_DST_HANA_SPDIF_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1183 		emu->emu1010.output_source[12] = 21;
1184 		snd_emu1010_fpga_link_dst_src_write(emu,
1185 			EMU_DST_HANA_SPDIF_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1186 		emu->emu1010.output_source[13] = 22;
1187 		/* ALICE2 bus 0xa0 */
1188 		snd_emu1010_fpga_link_dst_src_write(emu,
1189 			EMU_DST_HAMOA_DAC_LEFT1, EMU_SRC_ALICE_EMU32A + 0);
1190 		emu->emu1010.output_source[14] = 21;
1191 		snd_emu1010_fpga_link_dst_src_write(emu,
1192 			EMU_DST_HAMOA_DAC_RIGHT1, EMU_SRC_ALICE_EMU32A + 1);
1193 		emu->emu1010.output_source[15] = 22;
1194 		/* ALICE2 bus 0xa0 */
1195 		snd_emu1010_fpga_link_dst_src_write(emu,
1196 			EMU_DST_HANA_ADAT, EMU_SRC_ALICE_EMU32A + 0);
1197 		emu->emu1010.output_source[16] = 21;
1198 		snd_emu1010_fpga_link_dst_src_write(emu,
1199 			EMU_DST_HANA_ADAT + 1, EMU_SRC_ALICE_EMU32A + 1);
1200 		emu->emu1010.output_source[17] = 22;
1201 		snd_emu1010_fpga_link_dst_src_write(emu,
1202 			EMU_DST_HANA_ADAT + 2, EMU_SRC_ALICE_EMU32A + 2);
1203 		emu->emu1010.output_source[18] = 23;
1204 		snd_emu1010_fpga_link_dst_src_write(emu,
1205 			EMU_DST_HANA_ADAT + 3, EMU_SRC_ALICE_EMU32A + 3);
1206 		emu->emu1010.output_source[19] = 24;
1207 		snd_emu1010_fpga_link_dst_src_write(emu,
1208 			EMU_DST_HANA_ADAT + 4, EMU_SRC_ALICE_EMU32A + 4);
1209 		emu->emu1010.output_source[20] = 25;
1210 		snd_emu1010_fpga_link_dst_src_write(emu,
1211 			EMU_DST_HANA_ADAT + 5, EMU_SRC_ALICE_EMU32A + 5);
1212 		emu->emu1010.output_source[21] = 26;
1213 		snd_emu1010_fpga_link_dst_src_write(emu,
1214 			EMU_DST_HANA_ADAT + 6, EMU_SRC_ALICE_EMU32A + 6);
1215 		emu->emu1010.output_source[22] = 27;
1216 		snd_emu1010_fpga_link_dst_src_write(emu,
1217 			EMU_DST_HANA_ADAT + 7, EMU_SRC_ALICE_EMU32A + 7);
1218 		emu->emu1010.output_source[23] = 28;
1219 	}
1220 	/* TEMP: Select SPDIF in/out */
1221 	//snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, 0x0); /* Output spdif */
1222 
1223 	/* TEMP: Select 48kHz SPDIF out */
1224 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x0); /* Mute all */
1225 	snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, 0x0); /* Default fallback clock 48kHz */
1226 	/* Word Clock source, Internal 48kHz x1 */
1227 	snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K );
1228 	//snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X );
1229 	emu->emu1010.internal_clock = 1; /* 48000 */
1230 	snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_LEDS_2, 0x12);/* Set LEDs on Audio Dock */
1231 	snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, 0x1); /* Unmute all */
1232 	//snd_emu1010_fpga_write(emu, 0x7, 0x0); /* Mute all */
1233 	//snd_emu1010_fpga_write(emu, 0x7, 0x1); /* Unmute all */
1234 	//snd_emu1010_fpga_write(emu, 0xe, 0x12); /* Set LEDs on Audio Dock */
1235 
1236 	return 0;
1237 }
1238 /*
1239  *  Create the EMU10K1 instance
1240  */
1241 
1242 #ifdef CONFIG_PM
1243 static int alloc_pm_buffer(struct snd_emu10k1 *emu);
1244 static void free_pm_buffer(struct snd_emu10k1 *emu);
1245 #endif
1246 
1247 static int snd_emu10k1_free(struct snd_emu10k1 *emu)
1248 {
1249 	if (emu->port) {	/* avoid access to already used hardware */
1250 	       	snd_emu10k1_fx8010_tram_setup(emu, 0);
1251 		snd_emu10k1_done(emu);
1252 		snd_emu10k1_free_efx(emu);
1253        	}
1254 	if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) {
1255 		/* Disable 48Volt power to Audio Dock */
1256 		snd_emu1010_fpga_write(emu,  EMU_HANA_DOCK_PWR,  0 );
1257 	}
1258 	if (emu->emu1010.firmware_thread)
1259 		kthread_stop(emu->emu1010.firmware_thread);
1260 	if (emu->irq >= 0)
1261 		free_irq(emu->irq, emu);
1262 	/* remove reserved page */
1263 	if (emu->reserved_page) {
1264 		snd_emu10k1_synth_free(emu,
1265 			(struct snd_util_memblk *)emu->reserved_page);
1266 		emu->reserved_page = NULL;
1267 	}
1268 	if (emu->memhdr)
1269 		snd_util_memhdr_free(emu->memhdr);
1270 	if (emu->silent_page.area)
1271 		snd_dma_free_pages(&emu->silent_page);
1272 	if (emu->ptb_pages.area)
1273 		snd_dma_free_pages(&emu->ptb_pages);
1274 	vfree(emu->page_ptr_table);
1275 	vfree(emu->page_addr_table);
1276 #ifdef CONFIG_PM
1277 	free_pm_buffer(emu);
1278 #endif
1279 	if (emu->port)
1280 		pci_release_regions(emu->pci);
1281 	if (emu->card_capabilities->ca0151_chip) /* P16V */
1282 		snd_p16v_free(emu);
1283 	pci_disable_device(emu->pci);
1284 	kfree(emu);
1285 	return 0;
1286 }
1287 
1288 static int snd_emu10k1_dev_free(struct snd_device *device)
1289 {
1290 	struct snd_emu10k1 *emu = device->device_data;
1291 	return snd_emu10k1_free(emu);
1292 }
1293 
1294 static struct snd_emu_chip_details emu_chip_details[] = {
1295 	/* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
1296 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1297 	/* DSP: CA0108-IAT
1298 	 * DAC: CS4382-KQ
1299 	 * ADC: Philips 1361T
1300 	 * AC97: STAC9750
1301 	 * CA0151: None
1302 	 */
1303 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
1304 	 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
1305 	 .id = "Audigy2",
1306 	 .emu10k2_chip = 1,
1307 	 .ca0108_chip = 1,
1308 	 .spk71 = 1,
1309 	 .ac97_chip = 1} ,
1310 	/* Audigy4 (Not PRO) SB0610 */
1311 	/* Tested by James@superbug.co.uk 4th April 2006 */
1312 	/* A_IOCFG bits
1313 	 * Output
1314 	 * 0: ?
1315 	 * 1: ?
1316 	 * 2: ?
1317 	 * 3: 0 - Digital Out, 1 - Line in
1318 	 * 4: ?
1319 	 * 5: ?
1320 	 * 6: ?
1321 	 * 7: ?
1322 	 * Input
1323 	 * 8: ?
1324 	 * 9: ?
1325 	 * A: Green jack sense (Front)
1326 	 * B: ?
1327 	 * C: Black jack sense (Rear/Side Right)
1328 	 * D: Yellow jack sense (Center/LFE/Side Left)
1329 	 * E: ?
1330 	 * F: ?
1331 	 *
1332 	 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08)
1333 	 * 0 - Digital Out
1334 	 * 1 - Line in
1335 	 */
1336 	/* Mic input not tested.
1337 	 * Analog CD input not tested
1338 	 * Digital Out not tested.
1339 	 * Line in working.
1340 	 * Audio output 5.1 working. Side outputs not working.
1341 	 */
1342 	/* DSP: CA10300-IAT LF
1343 	 * DAC: Cirrus Logic CS4382-KQZ
1344 	 * ADC: Philips 1361T
1345 	 * AC97: Sigmatel STAC9750
1346 	 * CA0151: None
1347 	 */
1348 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102,
1349 	 .driver = "Audigy2", .name = "Audigy 4 [SB0610]",
1350 	 .id = "Audigy2",
1351 	 .emu10k2_chip = 1,
1352 	 .ca0108_chip = 1,
1353 	 .spk71 = 1,
1354 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1355 	 .ac97_chip = 1} ,
1356 	/* Audigy 2 ZS Notebook Cardbus card.*/
1357 	/* Tested by James@superbug.co.uk 6th November 2006 */
1358 	/* Audio output 7.1/Headphones working.
1359 	 * Digital output working. (AC3 not checked, only PCM)
1360 	 * Audio Mic/Line inputs working.
1361 	 * Digital input not tested.
1362 	 */
1363 	/* DSP: Tina2
1364 	 * DAC: Wolfson WM8768/WM8568
1365 	 * ADC: Wolfson WM8775
1366 	 * AC97: None
1367 	 * CA0151: None
1368 	 */
1369 	/* Tested by James@superbug.co.uk 4th April 2006 */
1370 	/* A_IOCFG bits
1371 	 * Output
1372 	 * 0: Not Used
1373 	 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute.
1374 	 * 2: Analog input 0 = line in, 1 = mic in
1375 	 * 3: Not Used
1376 	 * 4: Digital output 0 = off, 1 = on.
1377 	 * 5: Not Used
1378 	 * 6: Not Used
1379 	 * 7: Not Used
1380 	 * Input
1381 	 *      All bits 1 (0x3fxx) means nothing plugged in.
1382 	 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing.
1383 	 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing.
1384 	 * C-D: 2 = Front/Rear/etc, 3 = nothing.
1385 	 * E-F: Always 0
1386 	 *
1387 	 */
1388 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102,
1389 	 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]",
1390 	 .id = "Audigy2",
1391 	 .emu10k2_chip = 1,
1392 	 .ca0108_chip = 1,
1393 	 .ca_cardbus_chip = 1,
1394 	 .spi_dac = 1,
1395 	 .i2c_adc = 1,
1396 	 .spk71 = 1} ,
1397 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1398 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102,
1399 	 .driver = "Audigy2", .name = "E-mu 1010 Notebook [MAEM8950]",
1400 	 .id = "EMU1010",
1401 	 .emu10k2_chip = 1,
1402 	 .ca0108_chip = 1,
1403 	 .ca_cardbus_chip = 1,
1404 	 .spk71 = 1 ,
1405 	 .emu_model = EMU_MODEL_EMU1616},
1406 	/* Tested by James@superbug.co.uk 4th Nov 2007. */
1407 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102,
1408 	 .driver = "Audigy2", .name = "E-mu 1010b PCI [MAEM????]",
1409 	 .id = "EMU1010",
1410 	 .emu10k2_chip = 1,
1411 	 .ca0108_chip = 1,
1412 	 .spk71 = 1,
1413 	 .emu_model = EMU_MODEL_EMU1010B},
1414 	/* Tested by James@superbug.co.uk 8th July 2005. */
1415 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102,
1416 	 .driver = "Audigy2", .name = "E-mu 1010 [4001]",
1417 	 .id = "EMU1010",
1418 	 .emu10k2_chip = 1,
1419 	 .ca0102_chip = 1,
1420 	 .spk71 = 1,
1421 	 .emu_model = EMU_MODEL_EMU1010}, /* Emu 1010 */
1422 	/* EMU0404b */
1423 	{.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102,
1424 	 .driver = "Audigy2", .name = "E-mu 0404b [4002]",
1425 	 .id = "EMU0404",
1426 	 .emu10k2_chip = 1,
1427 	 .ca0108_chip = 1,
1428 	 .spk71 = 1,
1429 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1430 	/* Tested by James@superbug.co.uk 20-3-2007. */
1431 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102,
1432 	 .driver = "Audigy2", .name = "E-mu 0404 [4002]",
1433 	 .id = "EMU0404",
1434 	 .emu10k2_chip = 1,
1435 	 .ca0102_chip = 1,
1436 	 .spk71 = 1,
1437 	 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */
1438 	/* Audigy4 (Not PRO) SB0610 */
1439 	{.vendor = 0x1102, .device = 0x0008,
1440 	 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
1441 	 .id = "Audigy2",
1442 	 .emu10k2_chip = 1,
1443 	 .ca0108_chip = 1,
1444 	 .ac97_chip = 1} ,
1445 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1446 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
1447 	 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
1448 	 .id = "Audigy2",
1449 	 .emu10k2_chip = 1,
1450 	 .ca0102_chip = 1,
1451 	 .ca0151_chip = 1,
1452 	 .spk71 = 1,
1453 	 .spdif_bug = 1,
1454 	 .ac97_chip = 1} ,
1455 	/* Tested by shane-alsa@cm.nu 5th Nov 2005 */
1456 	/* The 0x20061102 does have SB0350 written on it
1457 	 * Just like 0x20021102
1458 	 */
1459 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102,
1460 	 .driver = "Audigy2", .name = "Audigy 2 [SB0350b]",
1461 	 .id = "Audigy2",
1462 	 .emu10k2_chip = 1,
1463 	 .ca0102_chip = 1,
1464 	 .ca0151_chip = 1,
1465 	 .spk71 = 1,
1466 	 .spdif_bug = 1,
1467 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1468 	 .ac97_chip = 1} ,
1469 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
1470 	 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
1471 	 .id = "Audigy2",
1472 	 .emu10k2_chip = 1,
1473 	 .ca0102_chip = 1,
1474 	 .ca0151_chip = 1,
1475 	 .spk71 = 1,
1476 	 .spdif_bug = 1,
1477 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1478 	 .ac97_chip = 1} ,
1479 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
1480 	 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
1481 	 .id = "Audigy2",
1482 	 .emu10k2_chip = 1,
1483 	 .ca0102_chip = 1,
1484 	 .ca0151_chip = 1,
1485 	 .spk71 = 1,
1486 	 .spdif_bug = 1,
1487 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1488 	 .ac97_chip = 1} ,
1489 	/* Audigy 2 */
1490 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1491 	/* DSP: CA0102-IAT
1492 	 * DAC: CS4382-KQ
1493 	 * ADC: Philips 1361T
1494 	 * AC97: STAC9721
1495 	 * CA0151: Yes
1496 	 */
1497 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
1498 	 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
1499 	 .id = "Audigy2",
1500 	 .emu10k2_chip = 1,
1501 	 .ca0102_chip = 1,
1502 	 .ca0151_chip = 1,
1503 	 .spk71 = 1,
1504 	 .spdif_bug = 1,
1505 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit */
1506 	 .ac97_chip = 1} ,
1507 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
1508 	 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
1509 	 .id = "Audigy2",
1510 	 .emu10k2_chip = 1,
1511 	 .ca0102_chip = 1,
1512 	 .ca0151_chip = 1,
1513 	 .spk71 = 1,
1514 	 .spdif_bug = 1} ,
1515 	/* Dell OEM/Creative Labs Audigy 2 ZS */
1516 	/* See ALSA bug#1365 */
1517 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102,
1518 	 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0353]",
1519 	 .id = "Audigy2",
1520 	 .emu10k2_chip = 1,
1521 	 .ca0102_chip = 1,
1522 	 .ca0151_chip = 1,
1523 	 .spk71 = 1,
1524 	 .spdif_bug = 1,
1525 	 .ac97_chip = 1} ,
1526 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
1527 	 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
1528 	 .id = "Audigy2",
1529 	 .emu10k2_chip = 1,
1530 	 .ca0102_chip = 1,
1531 	 .ca0151_chip = 1,
1532 	 .spk71 = 1,
1533 	 .spdif_bug = 1,
1534 	 .invert_shared_spdif = 1,	/* digital/analog switch swapped */
1535 	 .adc_1361t = 1,  /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */
1536 	 .ac97_chip = 1} ,
1537 	{.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
1538 	 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
1539 	 .id = "Audigy2",
1540 	 .emu10k2_chip = 1,
1541 	 .ca0102_chip = 1,
1542 	 .ca0151_chip = 1,
1543 	 .spdif_bug = 1,
1544 	 .ac97_chip = 1} ,
1545 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
1546 	 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1547 	 .id = "Audigy",
1548 	 .emu10k2_chip = 1,
1549 	 .ca0102_chip = 1,
1550 	 .ac97_chip = 1} ,
1551 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102,
1552 	 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
1553 	 .id = "Audigy",
1554 	 .emu10k2_chip = 1,
1555 	 .ca0102_chip = 1,
1556 	 .spdif_bug = 1,
1557 	 .ac97_chip = 1} ,
1558 	{.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
1559 	 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
1560 	 .id = "Audigy",
1561 	 .emu10k2_chip = 1,
1562 	 .ca0102_chip = 1,
1563 	 .ac97_chip = 1} ,
1564 	{.vendor = 0x1102, .device = 0x0004,
1565 	 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
1566 	 .id = "Audigy",
1567 	 .emu10k2_chip = 1,
1568 	 .ca0102_chip = 1,
1569 	 .ac97_chip = 1} ,
1570 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
1571 	 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
1572 	 .id = "Live",
1573 	 .emu10k1_chip = 1,
1574 	 .ac97_chip = 1,
1575 	 .sblive51 = 1} ,
1576 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
1577 	 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
1578 	 .id = "Live",
1579 	 .emu10k1_chip = 1,
1580 	 .ac97_chip = 1,
1581 	 .sblive51 = 1} ,
1582 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
1583 	 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
1584 	 .id = "Live",
1585 	 .emu10k1_chip = 1,
1586 	 .ac97_chip = 1,
1587 	 .sblive51 = 1} ,
1588 	/* Tested by ALSA bug#1680 26th December 2005 */
1589 	/* note: It really has SB0220 written on the card. */
1590 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102,
1591 	 .driver = "EMU10K1", .name = "SB Live 5.1 Dell OEM [SB0220]",
1592 	 .id = "Live",
1593 	 .emu10k1_chip = 1,
1594 	 .ac97_chip = 1,
1595 	 .sblive51 = 1} ,
1596 	/* Tested by Thomas Zehetbauer 27th Aug 2005 */
1597 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102,
1598 	 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1599 	 .id = "Live",
1600 	 .emu10k1_chip = 1,
1601 	 .ac97_chip = 1,
1602 	 .sblive51 = 1} ,
1603 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102,
1604 	 .driver = "EMU10K1", .name = "SB Live 5.1 [SB0220]",
1605 	 .id = "Live",
1606 	 .emu10k1_chip = 1,
1607 	 .ac97_chip = 1,
1608 	 .sblive51 = 1} ,
1609 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
1610 	 .driver = "EMU10K1", .name = "SB Live 5.1",
1611 	 .id = "Live",
1612 	 .emu10k1_chip = 1,
1613 	 .ac97_chip = 1,
1614 	 .sblive51 = 1} ,
1615 	/* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */
1616 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
1617 	 .driver = "EMU10K1", .name = "SBLive 5.1 [SB0060]",
1618 	 .id = "Live",
1619 	 .emu10k1_chip = 1,
1620 	 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum
1621 			  * share the same IDs!
1622 			  */
1623 	 .sblive51 = 1} ,
1624 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
1625 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
1626 	 .id = "Live",
1627 	 .emu10k1_chip = 1,
1628 	 .ac97_chip = 1,
1629 	 .sblive51 = 1} ,
1630 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
1631 	 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
1632 	 .id = "Live",
1633 	 .emu10k1_chip = 1,
1634 	 .ac97_chip = 1} ,
1635 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
1636 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
1637 	 .id = "Live",
1638 	 .emu10k1_chip = 1,
1639 	 .ac97_chip = 1,
1640 	 .sblive51 = 1} ,
1641 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
1642 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
1643 	 .id = "Live",
1644 	 .emu10k1_chip = 1,
1645 	 .ac97_chip = 1,
1646 	 .sblive51 = 1} ,
1647 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
1648 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
1649 	 .id = "Live",
1650 	 .emu10k1_chip = 1,
1651 	 .ac97_chip = 1,
1652 	 .sblive51 = 1} ,
1653 	/* Tested by James@superbug.co.uk 3rd July 2005 */
1654 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
1655 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
1656 	 .id = "Live",
1657 	 .emu10k1_chip = 1,
1658 	 .ac97_chip = 1,
1659 	 .sblive51 = 1} ,
1660 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
1661 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
1662 	 .id = "Live",
1663 	 .emu10k1_chip = 1,
1664 	 .ac97_chip = 1,
1665 	 .sblive51 = 1} ,
1666 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
1667 	 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
1668 	 .id = "Live",
1669 	 .emu10k1_chip = 1,
1670 	 .ac97_chip = 1,
1671 	 .sblive51 = 1} ,
1672 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
1673 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
1674 	 .id = "Live",
1675 	 .emu10k1_chip = 1,
1676 	 .ac97_chip = 1,
1677 	 .sblive51 = 1} ,
1678 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
1679 	 .driver = "EMU10K1", .name = "E-mu APS [4001]",
1680 	 .id = "APS",
1681 	 .emu10k1_chip = 1,
1682 	 .ecard = 1} ,
1683 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
1684 	 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
1685 	 .id = "Live",
1686 	 .emu10k1_chip = 1,
1687 	 .ac97_chip = 1,
1688 	 .sblive51 = 1} ,
1689 	{.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
1690 	 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
1691 	 .id = "Live",
1692 	 .emu10k1_chip = 1,
1693 	 .ac97_chip = 1,
1694 	 .sblive51 = 1} ,
1695 	{.vendor = 0x1102, .device = 0x0002,
1696 	 .driver = "EMU10K1", .name = "SB Live [Unknown]",
1697 	 .id = "Live",
1698 	 .emu10k1_chip = 1,
1699 	 .ac97_chip = 1,
1700 	 .sblive51 = 1} ,
1701 	{ } /* terminator */
1702 };
1703 
1704 int __devinit snd_emu10k1_create(struct snd_card *card,
1705 		       struct pci_dev * pci,
1706 		       unsigned short extin_mask,
1707 		       unsigned short extout_mask,
1708 		       long max_cache_bytes,
1709 		       int enable_ir,
1710 		       uint subsystem,
1711 		       struct snd_emu10k1 ** remu)
1712 {
1713 	struct snd_emu10k1 *emu;
1714 	int idx, err;
1715 	int is_audigy;
1716 	unsigned int silent_page;
1717 	const struct snd_emu_chip_details *c;
1718 	static struct snd_device_ops ops = {
1719 		.dev_free =	snd_emu10k1_dev_free,
1720 	};
1721 
1722 	*remu = NULL;
1723 
1724 	/* enable PCI device */
1725 	if ((err = pci_enable_device(pci)) < 0)
1726 		return err;
1727 
1728 	emu = kzalloc(sizeof(*emu), GFP_KERNEL);
1729 	if (emu == NULL) {
1730 		pci_disable_device(pci);
1731 		return -ENOMEM;
1732 	}
1733 	emu->card = card;
1734 	spin_lock_init(&emu->reg_lock);
1735 	spin_lock_init(&emu->emu_lock);
1736 	spin_lock_init(&emu->spi_lock);
1737 	spin_lock_init(&emu->i2c_lock);
1738 	spin_lock_init(&emu->voice_lock);
1739 	spin_lock_init(&emu->synth_lock);
1740 	spin_lock_init(&emu->memblk_lock);
1741 	mutex_init(&emu->fx8010.lock);
1742 	INIT_LIST_HEAD(&emu->mapped_link_head);
1743 	INIT_LIST_HEAD(&emu->mapped_order_link_head);
1744 	emu->pci = pci;
1745 	emu->irq = -1;
1746 	emu->synth = NULL;
1747 	emu->get_synth_voice = NULL;
1748 	/* read revision & serial */
1749 	emu->revision = pci->revision;
1750 	pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
1751 	pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
1752 	snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
1753 
1754 	for (c = emu_chip_details; c->vendor; c++) {
1755 		if (c->vendor == pci->vendor && c->device == pci->device) {
1756 			if (subsystem) {
1757 				if (c->subsystem && (c->subsystem == subsystem) ) {
1758 					break;
1759 				} else continue;
1760 			} else {
1761 				if (c->subsystem && (c->subsystem != emu->serial) )
1762 					continue;
1763 				if (c->revision && c->revision != emu->revision)
1764 					continue;
1765 			}
1766 			break;
1767 		}
1768 	}
1769 	if (c->vendor == 0) {
1770 		snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
1771 		kfree(emu);
1772 		pci_disable_device(pci);
1773 		return -ENOENT;
1774 	}
1775 	emu->card_capabilities = c;
1776 	if (c->subsystem && !subsystem)
1777 		snd_printdd("Sound card name=%s\n", c->name);
1778 	else if (subsystem)
1779 		snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x. Forced to subsytem=0x%x\n",
1780 		       	c->name, pci->vendor, pci->device, emu->serial, c->subsystem);
1781 	else
1782 		snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x.\n",
1783 		      	c->name, pci->vendor, pci->device, emu->serial);
1784 
1785 	if (!*card->id && c->id) {
1786 		int i, n = 0;
1787 		strlcpy(card->id, c->id, sizeof(card->id));
1788 		for (;;) {
1789 			for (i = 0; i < snd_ecards_limit; i++) {
1790 				if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
1791 					break;
1792 			}
1793 			if (i >= snd_ecards_limit)
1794 				break;
1795 			n++;
1796 			if (n >= SNDRV_CARDS)
1797 				break;
1798 			snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
1799 		}
1800 	}
1801 
1802 	is_audigy = emu->audigy = c->emu10k2_chip;
1803 
1804 	/* set the DMA transfer mask */
1805 	emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
1806 	if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
1807 	    pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
1808 		snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
1809 		kfree(emu);
1810 		pci_disable_device(pci);
1811 		return -ENXIO;
1812 	}
1813 	if (is_audigy)
1814 		emu->gpr_base = A_FXGPREGBASE;
1815 	else
1816 		emu->gpr_base = FXGPREGBASE;
1817 
1818 	if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
1819 		kfree(emu);
1820 		pci_disable_device(pci);
1821 		return err;
1822 	}
1823 	emu->port = pci_resource_start(pci, 0);
1824 
1825 	emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
1826 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1827 				32 * 1024, &emu->ptb_pages) < 0) {
1828 		err = -ENOMEM;
1829 		goto error;
1830 	}
1831 
1832 	emu->page_ptr_table = vmalloc(emu->max_cache_pages * sizeof(void *));
1833 	emu->page_addr_table = vmalloc(emu->max_cache_pages *
1834 				       sizeof(unsigned long));
1835 	if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
1836 		err = -ENOMEM;
1837 		goto error;
1838 	}
1839 
1840 	if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
1841 				EMUPAGESIZE, &emu->silent_page) < 0) {
1842 		err = -ENOMEM;
1843 		goto error;
1844 	}
1845 	emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
1846 	if (emu->memhdr == NULL) {
1847 		err = -ENOMEM;
1848 		goto error;
1849 	}
1850 	emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) -
1851 		sizeof(struct snd_util_memblk);
1852 
1853 	pci_set_master(pci);
1854 
1855 	emu->fx8010.fxbus_mask = 0x303f;
1856 	if (extin_mask == 0)
1857 		extin_mask = 0x3fcf;
1858 	if (extout_mask == 0)
1859 		extout_mask = 0x7fff;
1860 	emu->fx8010.extin_mask = extin_mask;
1861 	emu->fx8010.extout_mask = extout_mask;
1862 	emu->enable_ir = enable_ir;
1863 
1864 	if (emu->card_capabilities->ca_cardbus_chip) {
1865 		if ((err = snd_emu10k1_cardbus_init(emu)) < 0)
1866 			goto error;
1867 	}
1868 	if (emu->card_capabilities->ecard) {
1869 		if ((err = snd_emu10k1_ecard_init(emu)) < 0)
1870 			goto error;
1871 	} else if (emu->card_capabilities->emu_model) {
1872  		if ((err = snd_emu10k1_emu1010_init(emu)) < 0) {
1873  			snd_emu10k1_free(emu);
1874  			return err;
1875  		}
1876 	} else {
1877 		/* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
1878 			does not support this, it shouldn't do any harm */
1879 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
1880 	}
1881 
1882 	/* initialize TRAM setup */
1883 	emu->fx8010.itram_size = (16 * 1024)/2;
1884 	emu->fx8010.etram_pages.area = NULL;
1885 	emu->fx8010.etram_pages.bytes = 0;
1886 
1887 	/* irq handler must be registered after I/O ports are activated */
1888 	if (request_irq(pci->irq, snd_emu10k1_interrupt, IRQF_SHARED,
1889 			"EMU10K1", emu)) {
1890 		err = -EBUSY;
1891 		goto error;
1892 	}
1893 	emu->irq = pci->irq;
1894 
1895 	/*
1896 	 *  Init to 0x02109204 :
1897 	 *  Clock accuracy    = 0     (1000ppm)
1898 	 *  Sample Rate       = 2     (48kHz)
1899 	 *  Audio Channel     = 1     (Left of 2)
1900 	 *  Source Number     = 0     (Unspecified)
1901 	 *  Generation Status = 1     (Original for Cat Code 12)
1902 	 *  Cat Code          = 12    (Digital Signal Mixer)
1903 	 *  Mode              = 0     (Mode 0)
1904 	 *  Emphasis          = 0     (None)
1905 	 *  CP                = 1     (Copyright unasserted)
1906 	 *  AN                = 0     (Audio data)
1907 	 *  P                 = 0     (Consumer)
1908 	 */
1909 	emu->spdif_bits[0] = emu->spdif_bits[1] =
1910 		emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
1911 		SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
1912 		SPCS_GENERATIONSTATUS | 0x00001200 |
1913 		0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
1914 
1915 	emu->reserved_page = (struct snd_emu10k1_memblk *)
1916 		snd_emu10k1_synth_alloc(emu, 4096);
1917 	if (emu->reserved_page)
1918 		emu->reserved_page->map_locked = 1;
1919 
1920 	/* Clear silent pages and set up pointers */
1921 	memset(emu->silent_page.area, 0, PAGE_SIZE);
1922 	silent_page = emu->silent_page.addr << 1;
1923 	for (idx = 0; idx < MAXPAGES; idx++)
1924 		((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
1925 
1926 	/* set up voice indices */
1927 	for (idx = 0; idx < NUM_G; idx++) {
1928 		emu->voices[idx].emu = emu;
1929 		emu->voices[idx].number = idx;
1930 	}
1931 
1932 	if ((err = snd_emu10k1_init(emu, enable_ir, 0)) < 0)
1933 		goto error;
1934 #ifdef CONFIG_PM
1935 	if ((err = alloc_pm_buffer(emu)) < 0)
1936 		goto error;
1937 #endif
1938 
1939 	/*  Initialize the effect engine */
1940 	if ((err = snd_emu10k1_init_efx(emu)) < 0)
1941 		goto error;
1942 	snd_emu10k1_audio_enable(emu);
1943 
1944 	if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0)
1945 		goto error;
1946 
1947 #ifdef CONFIG_PROC_FS
1948 	snd_emu10k1_proc_init(emu);
1949 #endif
1950 
1951 	snd_card_set_dev(card, &pci->dev);
1952 	*remu = emu;
1953 	return 0;
1954 
1955  error:
1956 	snd_emu10k1_free(emu);
1957 	return err;
1958 }
1959 
1960 #ifdef CONFIG_PM
1961 static unsigned char saved_regs[] = {
1962 	CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP,
1963 	FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL,
1964 	ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2,
1965 	TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA,
1966 	MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2,
1967 	SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX,
1968 	0xff /* end */
1969 };
1970 static unsigned char saved_regs_audigy[] = {
1971 	A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_SAMPLE_RATE,
1972 	A_FXRT2, A_SENDAMOUNTS, A_FXRT1,
1973 	0xff /* end */
1974 };
1975 
1976 static int __devinit alloc_pm_buffer(struct snd_emu10k1 *emu)
1977 {
1978 	int size;
1979 
1980 	size = ARRAY_SIZE(saved_regs);
1981 	if (emu->audigy)
1982 		size += ARRAY_SIZE(saved_regs_audigy);
1983 	emu->saved_ptr = vmalloc(4 * NUM_G * size);
1984 	if (! emu->saved_ptr)
1985 		return -ENOMEM;
1986 	if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0)
1987 		return -ENOMEM;
1988 	if (emu->card_capabilities->ca0151_chip &&
1989 	    snd_p16v_alloc_pm_buffer(emu) < 0)
1990 		return -ENOMEM;
1991 	return 0;
1992 }
1993 
1994 static void free_pm_buffer(struct snd_emu10k1 *emu)
1995 {
1996 	vfree(emu->saved_ptr);
1997 	snd_emu10k1_efx_free_pm_buffer(emu);
1998 	if (emu->card_capabilities->ca0151_chip)
1999 		snd_p16v_free_pm_buffer(emu);
2000 }
2001 
2002 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu)
2003 {
2004 	int i;
2005 	unsigned char *reg;
2006 	unsigned int *val;
2007 
2008 	val = emu->saved_ptr;
2009 	for (reg = saved_regs; *reg != 0xff; reg++)
2010 		for (i = 0; i < NUM_G; i++, val++)
2011 			*val = snd_emu10k1_ptr_read(emu, *reg, i);
2012 	if (emu->audigy) {
2013 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2014 			for (i = 0; i < NUM_G; i++, val++)
2015 				*val = snd_emu10k1_ptr_read(emu, *reg, i);
2016 	}
2017 	if (emu->audigy)
2018 		emu->saved_a_iocfg = inl(emu->port + A_IOCFG);
2019 	emu->saved_hcfg = inl(emu->port + HCFG);
2020 }
2021 
2022 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu)
2023 {
2024 	if (emu->card_capabilities->ca_cardbus_chip)
2025 		snd_emu10k1_cardbus_init(emu);
2026 	if (emu->card_capabilities->ecard)
2027 		snd_emu10k1_ecard_init(emu);
2028 	else if (emu->card_capabilities->emu_model)
2029  		snd_emu10k1_emu1010_init(emu);
2030 	else
2031 		snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
2032 	snd_emu10k1_init(emu, emu->enable_ir, 1);
2033 }
2034 
2035 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu)
2036 {
2037 	int i;
2038 	unsigned char *reg;
2039 	unsigned int *val;
2040 
2041 	snd_emu10k1_audio_enable(emu);
2042 
2043 	/* resore for spdif */
2044 	if (emu->audigy)
2045 		outl(emu->saved_a_iocfg, emu->port + A_IOCFG);
2046 	outl(emu->saved_hcfg, emu->port + HCFG);
2047 
2048 	val = emu->saved_ptr;
2049 	for (reg = saved_regs; *reg != 0xff; reg++)
2050 		for (i = 0; i < NUM_G; i++, val++)
2051 			snd_emu10k1_ptr_write(emu, *reg, i, *val);
2052 	if (emu->audigy) {
2053 		for (reg = saved_regs_audigy; *reg != 0xff; reg++)
2054 			for (i = 0; i < NUM_G; i++, val++)
2055 				snd_emu10k1_ptr_write(emu, *reg, i, *val);
2056 	}
2057 }
2058 #endif
2059