1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (c) by Jaroslav Kysela <perex@perex.cz> 4 * Creative Labs, Inc. 5 * Routines for control of EMU10K1 chips 6 * 7 * Copyright (c) by James Courtier-Dutton <James@superbug.co.uk> 8 * Added support for Audigy 2 Value. 9 * Added EMU 1010 support. 10 * General bug fixes and enhancements. 11 * 12 * BUGS: 13 * -- 14 * 15 * TODO: 16 * -- 17 */ 18 19 #include <linux/sched.h> 20 #include <linux/delay.h> 21 #include <linux/init.h> 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/iommu.h> 25 #include <linux/pci.h> 26 #include <linux/slab.h> 27 #include <linux/vmalloc.h> 28 #include <linux/mutex.h> 29 30 31 #include <sound/core.h> 32 #include <sound/emu10k1.h> 33 #include <linux/firmware.h> 34 #include "p16v.h" 35 #include "tina2.h" 36 #include "p17v.h" 37 38 39 #define HANA_FILENAME "emu/hana.fw" 40 #define DOCK_FILENAME "emu/audio_dock.fw" 41 #define EMU1010B_FILENAME "emu/emu1010b.fw" 42 #define MICRO_DOCK_FILENAME "emu/micro_dock.fw" 43 #define EMU0404_FILENAME "emu/emu0404.fw" 44 #define EMU1010_NOTEBOOK_FILENAME "emu/emu1010_notebook.fw" 45 46 MODULE_FIRMWARE(HANA_FILENAME); 47 MODULE_FIRMWARE(DOCK_FILENAME); 48 MODULE_FIRMWARE(EMU1010B_FILENAME); 49 MODULE_FIRMWARE(MICRO_DOCK_FILENAME); 50 MODULE_FIRMWARE(EMU0404_FILENAME); 51 MODULE_FIRMWARE(EMU1010_NOTEBOOK_FILENAME); 52 53 54 /************************************************************************* 55 * EMU10K1 init / done 56 *************************************************************************/ 57 58 void snd_emu10k1_voice_init(struct snd_emu10k1 *emu, int ch) 59 { 60 snd_emu10k1_ptr_write_multiple(emu, ch, 61 DCYSUSV, 0, 62 VTFT, VTFT_FILTERTARGET_MASK, 63 CVCF, CVCF_CURRENTFILTER_MASK, 64 PTRX, 0, 65 CPF, 0, 66 CCR, 0, 67 68 PSST, 0, 69 DSL, 0x10, 70 CCCA, 0, 71 Z1, 0, 72 Z2, 0, 73 FXRT, 0x32100000, 74 75 // The rest is meaningless as long as DCYSUSV_CHANNELENABLE_MASK is zero 76 DCYSUSM, 0, 77 ATKHLDV, 0, 78 ATKHLDM, 0, 79 IP, 0, 80 IFATN, IFATN_FILTERCUTOFF_MASK | IFATN_ATTENUATION_MASK, 81 PEFE, 0, 82 FMMOD, 0, 83 TREMFRQ, 24, /* 1 Hz */ 84 FM2FRQ2, 24, /* 1 Hz */ 85 LFOVAL2, 0, 86 LFOVAL1, 0, 87 ENVVOL, 0, 88 ENVVAL, 0, 89 90 REGLIST_END); 91 92 /* Audigy extra stuffs */ 93 if (emu->audigy) { 94 snd_emu10k1_ptr_write_multiple(emu, ch, 95 A_CSBA, 0, 96 A_CSDC, 0, 97 A_CSFE, 0, 98 A_CSHG, 0, 99 A_FXRT1, 0x03020100, 100 A_FXRT2, 0x07060504, 101 A_SENDAMOUNTS, 0, 102 REGLIST_END); 103 } 104 } 105 106 static const unsigned int spi_dac_init[] = { 107 0x00ff, 108 0x02ff, 109 0x0400, 110 0x0520, 111 0x0600, 112 0x08ff, 113 0x0aff, 114 0x0cff, 115 0x0eff, 116 0x10ff, 117 0x1200, 118 0x1400, 119 0x1480, 120 0x1800, 121 0x1aff, 122 0x1cff, 123 0x1e00, 124 0x0530, 125 0x0602, 126 0x0622, 127 0x1400, 128 }; 129 130 static const unsigned int i2c_adc_init[][2] = { 131 { 0x17, 0x00 }, /* Reset */ 132 { 0x07, 0x00 }, /* Timeout */ 133 { 0x0b, 0x22 }, /* Interface control */ 134 { 0x0c, 0x22 }, /* Master mode control */ 135 { 0x0d, 0x08 }, /* Powerdown control */ 136 { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */ 137 { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */ 138 { 0x10, 0x7b }, /* ALC Control 1 */ 139 { 0x11, 0x00 }, /* ALC Control 2 */ 140 { 0x12, 0x32 }, /* ALC Control 3 */ 141 { 0x13, 0x00 }, /* Noise gate control */ 142 { 0x14, 0xa6 }, /* Limiter control */ 143 { 0x15, ADC_MUX_2 }, /* ADC Mixer control. Mic for A2ZS Notebook */ 144 }; 145 146 static int snd_emu10k1_init(struct snd_emu10k1 *emu, int enable_ir) 147 { 148 unsigned int silent_page; 149 int ch; 150 u32 tmp; 151 152 /* disable audio and lock cache */ 153 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | 154 HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 155 156 outl(0, emu->port + INTE); 157 158 snd_emu10k1_ptr_write_multiple(emu, 0, 159 /* reset recording buffers */ 160 MICBS, ADCBS_BUFSIZE_NONE, 161 MICBA, 0, 162 FXBS, ADCBS_BUFSIZE_NONE, 163 FXBA, 0, 164 ADCBS, ADCBS_BUFSIZE_NONE, 165 ADCBA, 0, 166 167 /* disable channel interrupt */ 168 CLIEL, 0, 169 CLIEH, 0, 170 171 /* disable stop on loop end */ 172 SOLEL, 0, 173 SOLEH, 0, 174 175 REGLIST_END); 176 177 if (emu->audigy) { 178 /* set SPDIF bypass mode */ 179 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT); 180 /* enable rear left + rear right AC97 slots */ 181 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | 182 AC97SLOT_REAR_LEFT); 183 } 184 185 /* init envelope engine */ 186 for (ch = 0; ch < NUM_G; ch++) 187 snd_emu10k1_voice_init(emu, ch); 188 189 snd_emu10k1_ptr_write_multiple(emu, 0, 190 SPCS0, emu->spdif_bits[0], 191 SPCS1, emu->spdif_bits[1], 192 SPCS2, emu->spdif_bits[2], 193 REGLIST_END); 194 195 if (emu->card_capabilities->emu_model) { 196 } else if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 197 /* Hacks for Alice3 to work independent of haP16V driver */ 198 /* Setup SRCMulti_I2S SamplingRate */ 199 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 200 201 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 202 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14); 203 /* Setup SRCMulti Input Audio Enable */ 204 /* Use 0xFFFFFFFF to enable P16V sounds. */ 205 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF); 206 207 /* Enabled Phased (8-channel) P16V playback */ 208 outl(0x0201, emu->port + HCFG2); 209 /* Set playback routing. */ 210 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4); 211 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 Value */ 212 /* Hacks for Alice3 to work independent of haP16V driver */ 213 dev_info(emu->card->dev, "Audigy2 value: Special config.\n"); 214 /* Setup SRCMulti_I2S SamplingRate */ 215 snd_emu10k1_ptr_write(emu, A_I2S_CAPTURE_RATE, 0, A_I2S_CAPTURE_96000); 216 217 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */ 218 snd_emu10k1_ptr20_write(emu, P17V_SRCSel, 0, 0x14); 219 220 /* Setup SRCMulti Input Audio Enable */ 221 snd_emu10k1_ptr20_write(emu, P17V_MIXER_I2S_ENABLE, 0, 0xFF000000); 222 223 /* Setup SPDIF Out Audio Enable */ 224 /* The Audigy 2 Value has a separate SPDIF out, 225 * so no need for a mixer switch 226 */ 227 snd_emu10k1_ptr20_write(emu, P17V_MIXER_SPDIF_ENABLE, 0, 0xFF000000); 228 229 tmp = inw(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ 230 outw(tmp, emu->port + A_IOCFG); 231 } 232 if (emu->card_capabilities->spi_dac) { /* Audigy 2 ZS Notebook with DAC Wolfson WM8768/WM8568 */ 233 int size, n; 234 235 size = ARRAY_SIZE(spi_dac_init); 236 for (n = 0; n < size; n++) 237 snd_emu10k1_spi_write(emu, spi_dac_init[n]); 238 239 snd_emu10k1_ptr20_write(emu, 0x60, 0, 0x10); 240 /* Enable GPIOs 241 * GPIO0: Unknown 242 * GPIO1: Speakers-enabled. 243 * GPIO2: Unknown 244 * GPIO3: Unknown 245 * GPIO4: IEC958 Output on. 246 * GPIO5: Unknown 247 * GPIO6: Unknown 248 * GPIO7: Unknown 249 */ 250 outw(0x76, emu->port + A_IOCFG); /* Windows uses 0x3f76 */ 251 } 252 if (emu->card_capabilities->i2c_adc) { /* Audigy 2 ZS Notebook with ADC Wolfson WM8775 */ 253 int size, n; 254 255 snd_emu10k1_ptr20_write(emu, P17V_I2S_SRC_SEL, 0, 0x2020205f); 256 tmp = inw(emu->port + A_IOCFG); 257 outw(tmp | 0x4, emu->port + A_IOCFG); /* Set bit 2 for mic input */ 258 tmp = inw(emu->port + A_IOCFG); 259 size = ARRAY_SIZE(i2c_adc_init); 260 for (n = 0; n < size; n++) 261 snd_emu10k1_i2c_write(emu, i2c_adc_init[n][0], i2c_adc_init[n][1]); 262 for (n = 0; n < 4; n++) { 263 emu->i2c_capture_volume[n][0] = 0xcf; 264 emu->i2c_capture_volume[n][1] = 0xcf; 265 } 266 } 267 268 269 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr); 270 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */ 271 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_256K); /* taken from original driver */ 272 273 silent_page = (emu->silent_page.addr << emu->address_mode) | (emu->address_mode ? MAP_PTI_MASK1 : MAP_PTI_MASK0); 274 for (ch = 0; ch < NUM_G; ch++) { 275 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page); 276 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page); 277 } 278 279 if (emu->card_capabilities->emu_model) { 280 outl(HCFG_AUTOMUTE_ASYNC | 281 HCFG_EMU32_SLAVE | 282 HCFG_AUDIOENABLE, emu->port + HCFG); 283 /* 284 * Hokay, setup HCFG 285 * Mute Disable Audio = 0 286 * Lock Tank Memory = 1 287 * Lock Sound Memory = 0 288 * Auto Mute = 1 289 */ 290 } else if (emu->audigy) { 291 if (emu->revision == 4) /* audigy2 */ 292 outl(HCFG_AUDIOENABLE | 293 HCFG_AC3ENABLE_CDSPDIF | 294 HCFG_AC3ENABLE_GPSPDIF | 295 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 296 else 297 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 298 /* FIXME: Remove all these emu->model and replace it with a card recognition parameter, 299 * e.g. card_capabilities->joystick */ 300 } else if (emu->model == 0x20 || 301 emu->model == 0xc400 || 302 (emu->model == 0x21 && emu->revision < 6)) 303 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG); 304 else 305 /* With on-chip joystick */ 306 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG); 307 308 if (enable_ir) { /* enable IR for SB Live */ 309 if (emu->card_capabilities->emu_model) { 310 ; /* Disable all access to A_IOCFG for the emu1010 */ 311 } else if (emu->card_capabilities->i2c_adc) { 312 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 313 } else if (emu->audigy) { 314 u16 reg = inw(emu->port + A_IOCFG); 315 outw(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 316 udelay(500); 317 outw(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG); 318 udelay(100); 319 outw(reg, emu->port + A_IOCFG); 320 } else { 321 unsigned int reg = inl(emu->port + HCFG); 322 outl(reg | HCFG_GPOUT2, emu->port + HCFG); 323 udelay(500); 324 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG); 325 udelay(100); 326 outl(reg, emu->port + HCFG); 327 } 328 } 329 330 if (emu->card_capabilities->emu_model) { 331 ; /* Disable all access to A_IOCFG for the emu1010 */ 332 } else if (emu->card_capabilities->i2c_adc) { 333 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 334 } else if (emu->audigy) { /* enable analog output */ 335 u16 reg = inw(emu->port + A_IOCFG); 336 outw(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG); 337 } 338 339 if (emu->address_mode == 0) { 340 /* use 16M in 4G */ 341 outl(inl(emu->port + HCFG) | HCFG_EXPANDED_MEM, emu->port + HCFG); 342 } 343 344 return 0; 345 } 346 347 static void snd_emu10k1_audio_enable(struct snd_emu10k1 *emu) 348 { 349 /* 350 * Enable the audio bit 351 */ 352 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); 353 354 /* Enable analog/digital outs on audigy */ 355 if (emu->card_capabilities->emu_model) { 356 ; /* Disable all access to A_IOCFG for the emu1010 */ 357 } else if (emu->card_capabilities->i2c_adc) { 358 ; /* Disable A_IOCFG for Audigy 2 ZS Notebook */ 359 } else if (emu->audigy) { 360 outw(inw(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); 361 362 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */ 363 /* Unmute Analog now. Set GPO6 to 1 for Apollo. 364 * This has to be done after init ALice3 I2SOut beyond 48KHz. 365 * So, sequence is important. */ 366 outw(inw(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); 367 } else if (emu->card_capabilities->ca0108_chip) { /* audigy2 value */ 368 /* Unmute Analog now. */ 369 outw(inw(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); 370 } else { 371 /* Disable routing from AC97 line out to Front speakers */ 372 outw(inw(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG); 373 } 374 } 375 376 #if 0 377 { 378 unsigned int tmp; 379 /* FIXME: the following routine disables LiveDrive-II !! */ 380 /* TOSLink detection */ 381 emu->tos_link = 0; 382 tmp = inl(emu->port + HCFG); 383 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) { 384 outl(tmp|0x800, emu->port + HCFG); 385 udelay(50); 386 if (tmp != (inl(emu->port + HCFG) & ~0x800)) { 387 emu->tos_link = 1; 388 outl(tmp, emu->port + HCFG); 389 } 390 } 391 } 392 #endif 393 394 if (emu->card_capabilities->emu_model) 395 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE | INTE_A_GPIOENABLE); 396 else 397 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE); 398 } 399 400 int snd_emu10k1_done(struct snd_emu10k1 *emu) 401 { 402 int ch; 403 404 outl(0, emu->port + INTE); 405 406 /* 407 * Shutdown the voices 408 */ 409 for (ch = 0; ch < NUM_G; ch++) { 410 snd_emu10k1_ptr_write_multiple(emu, ch, 411 DCYSUSV, 0, 412 VTFT, 0, 413 CVCF, 0, 414 PTRX, 0, 415 CPF, 0, 416 REGLIST_END); 417 } 418 419 // stop the DSP 420 if (emu->audigy) 421 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP); 422 else 423 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP); 424 425 snd_emu10k1_ptr_write_multiple(emu, 0, 426 /* reset recording buffers */ 427 MICBS, 0, 428 MICBA, 0, 429 FXBS, 0, 430 FXBA, 0, 431 FXWC, 0, 432 ADCBS, ADCBS_BUFSIZE_NONE, 433 ADCBA, 0, 434 TCBS, TCBS_BUFFSIZE_16K, 435 TCB, 0, 436 437 /* disable channel interrupt */ 438 CLIEL, 0, 439 CLIEH, 0, 440 SOLEL, 0, 441 SOLEH, 0, 442 443 PTB, 0, 444 445 REGLIST_END); 446 447 /* disable audio and lock cache */ 448 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG); 449 450 return 0; 451 } 452 453 /************************************************************************* 454 * ECARD functional implementation 455 *************************************************************************/ 456 457 /* In A1 Silicon, these bits are in the HC register */ 458 #define HOOKN_BIT (1L << 12) 459 #define HANDN_BIT (1L << 11) 460 #define PULSEN_BIT (1L << 10) 461 462 #define EC_GDI1 (1 << 13) 463 #define EC_GDI0 (1 << 14) 464 465 #define EC_NUM_CONTROL_BITS 20 466 467 #define EC_AC3_DATA_SELN 0x0001L 468 #define EC_EE_DATA_SEL 0x0002L 469 #define EC_EE_CNTRL_SELN 0x0004L 470 #define EC_EECLK 0x0008L 471 #define EC_EECS 0x0010L 472 #define EC_EESDO 0x0020L 473 #define EC_TRIM_CSN 0x0040L 474 #define EC_TRIM_SCLK 0x0080L 475 #define EC_TRIM_SDATA 0x0100L 476 #define EC_TRIM_MUTEN 0x0200L 477 #define EC_ADCCAL 0x0400L 478 #define EC_ADCRSTN 0x0800L 479 #define EC_DACCAL 0x1000L 480 #define EC_DACMUTEN 0x2000L 481 #define EC_LEDN 0x4000L 482 483 #define EC_SPDIF0_SEL_SHIFT 15 484 #define EC_SPDIF1_SEL_SHIFT 17 485 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT) 486 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT) 487 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK) 488 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK) 489 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should 490 * be incremented any time the EEPROM's 491 * format is changed. */ 492 493 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */ 494 495 /* Addresses for special values stored in to EEPROM */ 496 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */ 497 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */ 498 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */ 499 500 #define EC_LAST_PROMFILE_ADDR 0x2f 501 502 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The 503 * can be up to 30 characters in length 504 * and is stored as a NULL-terminated 505 * ASCII string. Any unused bytes must be 506 * filled with zeros */ 507 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */ 508 509 510 /* Most of this stuff is pretty self-evident. According to the hardware 511 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC 512 * offset problem. Weird. 513 */ 514 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \ 515 EC_TRIM_CSN) 516 517 518 #define EC_DEFAULT_ADC_GAIN 0xC4C4 519 #define EC_DEFAULT_SPDIF0_SEL 0x0 520 #define EC_DEFAULT_SPDIF1_SEL 0x4 521 522 /************************************************************************** 523 * @func Clock bits into the Ecard's control latch. The Ecard uses a 524 * control latch will is loaded bit-serially by toggling the Modem control 525 * lines from function 2 on the E8010. This function hides these details 526 * and presents the illusion that we are actually writing to a distinct 527 * register. 528 */ 529 530 static void snd_emu10k1_ecard_write(struct snd_emu10k1 *emu, unsigned int value) 531 { 532 unsigned short count; 533 unsigned int data; 534 unsigned long hc_port; 535 unsigned int hc_value; 536 537 hc_port = emu->port + HCFG; 538 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT); 539 outl(hc_value, hc_port); 540 541 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) { 542 543 /* Set up the value */ 544 data = ((value & 0x1) ? PULSEN_BIT : 0); 545 value >>= 1; 546 547 outl(hc_value | data, hc_port); 548 549 /* Clock the shift register */ 550 outl(hc_value | data | HANDN_BIT, hc_port); 551 outl(hc_value | data, hc_port); 552 } 553 554 /* Latch the bits */ 555 outl(hc_value | HOOKN_BIT, hc_port); 556 outl(hc_value, hc_port); 557 } 558 559 /************************************************************************** 560 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The 561 * trim value consists of a 16bit value which is composed of two 562 * 8 bit gain/trim values, one for the left channel and one for the 563 * right channel. The following table maps from the Gain/Attenuation 564 * value in decibels into the corresponding bit pattern for a single 565 * channel. 566 */ 567 568 static void snd_emu10k1_ecard_setadcgain(struct snd_emu10k1 *emu, 569 unsigned short gain) 570 { 571 unsigned int bit; 572 573 /* Enable writing to the TRIM registers */ 574 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 575 576 /* Do it again to insure that we meet hold time requirements */ 577 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN); 578 579 for (bit = (1 << 15); bit; bit >>= 1) { 580 unsigned int value; 581 582 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA); 583 584 if (gain & bit) 585 value |= EC_TRIM_SDATA; 586 587 /* Clock the bit */ 588 snd_emu10k1_ecard_write(emu, value); 589 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK); 590 snd_emu10k1_ecard_write(emu, value); 591 } 592 593 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 594 } 595 596 static int snd_emu10k1_ecard_init(struct snd_emu10k1 *emu) 597 { 598 unsigned int hc_value; 599 600 /* Set up the initial settings */ 601 emu->ecard_ctrl = EC_RAW_RUN_MODE | 602 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) | 603 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL); 604 605 /* Step 0: Set the codec type in the hardware control register 606 * and enable audio output */ 607 hc_value = inl(emu->port + HCFG); 608 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG); 609 inl(emu->port + HCFG); 610 611 /* Step 1: Turn off the led and deassert TRIM_CS */ 612 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 613 614 /* Step 2: Calibrate the ADC and DAC */ 615 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN); 616 617 /* Step 3: Wait for awhile; XXX We can't get away with this 618 * under a real operating system; we'll need to block and wait that 619 * way. */ 620 snd_emu10k1_wait(emu, 48000); 621 622 /* Step 4: Switch off the DAC and ADC calibration. Note 623 * That ADC_CAL is actually an inverted signal, so we assert 624 * it here to stop calibration. */ 625 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN); 626 627 /* Step 4: Switch into run mode */ 628 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl); 629 630 /* Step 5: Set the analog input gain */ 631 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN); 632 633 return 0; 634 } 635 636 static int snd_emu10k1_cardbus_init(struct snd_emu10k1 *emu) 637 { 638 unsigned long special_port; 639 __always_unused unsigned int value; 640 641 /* Special initialisation routine 642 * before the rest of the IO-Ports become active. 643 */ 644 special_port = emu->port + 0x38; 645 value = inl(special_port); 646 outl(0x00d00000, special_port); 647 value = inl(special_port); 648 outl(0x00d00001, special_port); 649 value = inl(special_port); 650 outl(0x00d0005f, special_port); 651 value = inl(special_port); 652 outl(0x00d0007f, special_port); 653 value = inl(special_port); 654 outl(0x0090007f, special_port); 655 value = inl(special_port); 656 657 snd_emu10k1_ptr20_write(emu, TINA2_VOLUME, 0, 0xfefefefe); /* Defaults to 0x30303030 */ 658 /* Delay to give time for ADC chip to switch on. It needs 113ms */ 659 msleep(200); 660 return 0; 661 } 662 663 static int snd_emu1010_load_firmware_entry(struct snd_emu10k1 *emu, 664 const struct firmware *fw_entry) 665 { 666 int n, i; 667 u16 reg; 668 u8 value; 669 __always_unused u16 write_post; 670 671 if (!fw_entry) 672 return -EIO; 673 674 /* The FPGA is a Xilinx Spartan IIE XC2S50E */ 675 /* On E-MU 0404b it is a Xilinx Spartan III XC3S50 */ 676 /* GPIO7 -> FPGA PGMN 677 * GPIO6 -> FPGA CCLK 678 * GPIO5 -> FPGA DIN 679 * FPGA CONFIG OFF -> FPGA PGMN 680 */ 681 spin_lock_irq(&emu->emu_lock); 682 outw(0x00, emu->port + A_GPIO); /* Set PGMN low for 100uS. */ 683 write_post = inw(emu->port + A_GPIO); 684 udelay(100); 685 outw(0x80, emu->port + A_GPIO); /* Leave bit 7 set during netlist setup. */ 686 write_post = inw(emu->port + A_GPIO); 687 udelay(100); /* Allow FPGA memory to clean */ 688 for (n = 0; n < fw_entry->size; n++) { 689 value = fw_entry->data[n]; 690 for (i = 0; i < 8; i++) { 691 reg = 0x80; 692 if (value & 0x1) 693 reg = reg | 0x20; 694 value = value >> 1; 695 outw(reg, emu->port + A_GPIO); 696 write_post = inw(emu->port + A_GPIO); 697 outw(reg | 0x40, emu->port + A_GPIO); 698 write_post = inw(emu->port + A_GPIO); 699 } 700 } 701 /* After programming, set GPIO bit 4 high again. */ 702 outw(0x10, emu->port + A_GPIO); 703 write_post = inw(emu->port + A_GPIO); 704 spin_unlock_irq(&emu->emu_lock); 705 706 return 0; 707 } 708 709 /* firmware file names, per model, init-fw and dock-fw (optional) */ 710 static const char * const firmware_names[5][2] = { 711 [EMU_MODEL_EMU1010] = { 712 HANA_FILENAME, DOCK_FILENAME 713 }, 714 [EMU_MODEL_EMU1010B] = { 715 EMU1010B_FILENAME, MICRO_DOCK_FILENAME 716 }, 717 [EMU_MODEL_EMU1616] = { 718 EMU1010_NOTEBOOK_FILENAME, MICRO_DOCK_FILENAME 719 }, 720 [EMU_MODEL_EMU0404] = { 721 EMU0404_FILENAME, NULL 722 }, 723 }; 724 725 static int snd_emu1010_load_firmware(struct snd_emu10k1 *emu, int dock, 726 const struct firmware **fw) 727 { 728 const char *filename; 729 int err; 730 731 if (!*fw) { 732 filename = firmware_names[emu->card_capabilities->emu_model][dock]; 733 if (!filename) 734 return 0; 735 err = request_firmware(fw, filename, &emu->pci->dev); 736 if (err) 737 return err; 738 } 739 740 return snd_emu1010_load_firmware_entry(emu, *fw); 741 } 742 743 static void emu1010_firmware_work(struct work_struct *work) 744 { 745 struct snd_emu10k1 *emu; 746 u32 tmp, tmp2, reg; 747 int err; 748 749 emu = container_of(work, struct snd_emu10k1, 750 emu1010.firmware_work); 751 if (emu->card->shutdown) 752 return; 753 #ifdef CONFIG_PM_SLEEP 754 if (emu->suspend) 755 return; 756 #endif 757 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); /* OPTIONS: Which cards are attached to the EMU */ 758 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) { 759 /* Audio Dock attached */ 760 /* Return to Audio Dock programming mode */ 761 dev_info(emu->card->dev, 762 "emu1010: Loading Audio Dock Firmware\n"); 763 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 764 EMU_HANA_FPGA_CONFIG_AUDIODOCK); 765 err = snd_emu1010_load_firmware(emu, 1, &emu->dock_fw); 766 if (err < 0) 767 return; 768 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, 0); 769 snd_emu1010_fpga_read(emu, EMU_HANA_ID, &tmp); 770 dev_info(emu->card->dev, 771 "emu1010: EMU_HANA+DOCK_ID = 0x%x\n", tmp); 772 if ((tmp & 0x1f) != 0x15) { 773 /* FPGA failed to be programmed */ 774 dev_info(emu->card->dev, 775 "emu1010: Loading Audio Dock Firmware file failed, reg = 0x%x\n", 776 tmp); 777 return; 778 } 779 dev_info(emu->card->dev, 780 "emu1010: Audio Dock Firmware loaded\n"); 781 snd_emu1010_fpga_read(emu, EMU_DOCK_MAJOR_REV, &tmp); 782 snd_emu1010_fpga_read(emu, EMU_DOCK_MINOR_REV, &tmp2); 783 dev_info(emu->card->dev, "Audio Dock ver: %u.%u\n", tmp, tmp2); 784 /* Sync clocking between 1010 and Dock */ 785 /* Allow DLL to settle */ 786 msleep(10); 787 /* Unmute all. Default is muted after a firmware load */ 788 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 789 } 790 } 791 792 static void emu1010_interrupt(struct snd_emu10k1 *emu) 793 { 794 u32 sts; 795 796 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, &sts); 797 if (sts & EMU_HANA_IRQ_DOCK_LOST) { 798 /* Audio Dock removed */ 799 dev_info(emu->card->dev, "emu1010: Audio Dock detached\n"); 800 /* The hardware auto-mutes all, so we unmute again */ 801 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 802 } else if (sts & EMU_HANA_IRQ_DOCK) { 803 schedule_work(&emu->emu1010.firmware_work); 804 } 805 } 806 807 /* 808 * Current status of the driver: 809 * ---------------------------- 810 * * only 44.1/48kHz supported (the MS Win driver supports up to 192 kHz) 811 * * PCM device nb. 2: 812 * 16 x 16-bit playback - snd_emu10k1_fx8010_playback_ops 813 * 16 x 32-bit capture - snd_emu10k1_capture_efx_ops 814 */ 815 static int snd_emu10k1_emu1010_init(struct snd_emu10k1 *emu) 816 { 817 u32 tmp, tmp2, reg; 818 int err; 819 820 dev_info(emu->card->dev, "emu1010: Special config.\n"); 821 822 /* Mute, and disable audio and lock cache, just in case. 823 * Proper init follows in snd_emu10k1_init(). */ 824 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK, emu->port + HCFG); 825 826 /* Disable 48Volt power to Audio Dock */ 827 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 828 829 /* ID, should read & 0x7f = 0x55. (Bit 7 is the IRQ bit) */ 830 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 831 dev_dbg(emu->card->dev, "reg1 = 0x%x\n", reg); 832 if ((reg & 0x3f) == 0x15) { 833 /* FPGA netlist already present so clear it */ 834 /* Return to programming mode */ 835 836 snd_emu1010_fpga_write(emu, EMU_HANA_FPGA_CONFIG, EMU_HANA_FPGA_CONFIG_HANA); 837 } 838 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 839 dev_dbg(emu->card->dev, "reg2 = 0x%x\n", reg); 840 if ((reg & 0x3f) == 0x15) { 841 /* FPGA failed to return to programming mode */ 842 dev_info(emu->card->dev, 843 "emu1010: FPGA failed to return to programming mode\n"); 844 return -ENODEV; 845 } 846 dev_info(emu->card->dev, "emu1010: EMU_HANA_ID = 0x%x\n", reg); 847 848 err = snd_emu1010_load_firmware(emu, 0, &emu->firmware); 849 if (err < 0) { 850 dev_info(emu->card->dev, "emu1010: Loading Firmware failed\n"); 851 return err; 852 } 853 854 /* ID, should read & 0x7f = 0x55 when FPGA programmed. */ 855 snd_emu1010_fpga_read(emu, EMU_HANA_ID, ®); 856 if ((reg & 0x3f) != 0x15) { 857 /* FPGA failed to be programmed */ 858 dev_info(emu->card->dev, 859 "emu1010: Loading Hana Firmware file failed, reg = 0x%x\n", 860 reg); 861 return -ENODEV; 862 } 863 864 dev_info(emu->card->dev, "emu1010: Hana Firmware loaded\n"); 865 snd_emu1010_fpga_read(emu, EMU_HANA_MAJOR_REV, &tmp); 866 snd_emu1010_fpga_read(emu, EMU_HANA_MINOR_REV, &tmp2); 867 dev_info(emu->card->dev, "emu1010: Hana version: %u.%u\n", tmp, tmp2); 868 /* Enable 48Volt power to Audio Dock */ 869 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, EMU_HANA_DOCK_PWR_ON); 870 871 snd_emu1010_fpga_read(emu, EMU_HANA_OPTION_CARDS, ®); 872 dev_info(emu->card->dev, "emu1010: Card options = 0x%x\n", reg); 873 if (reg & EMU_HANA_OPTION_DOCK_OFFLINE) 874 schedule_work(&emu->emu1010.firmware_work); 875 if (emu->card_capabilities->no_adat) { 876 emu->emu1010.optical_in = 0; /* IN_SPDIF */ 877 emu->emu1010.optical_out = 0; /* OUT_SPDIF */ 878 } else { 879 /* Optical -> ADAT I/O */ 880 emu->emu1010.optical_in = 1; /* IN_ADAT */ 881 emu->emu1010.optical_out = 1; /* OUT_ADAT */ 882 } 883 tmp = (emu->emu1010.optical_in ? EMU_HANA_OPTICAL_IN_ADAT : EMU_HANA_OPTICAL_IN_SPDIF) | 884 (emu->emu1010.optical_out ? EMU_HANA_OPTICAL_OUT_ADAT : EMU_HANA_OPTICAL_OUT_SPDIF); 885 snd_emu1010_fpga_write(emu, EMU_HANA_OPTICAL_TYPE, tmp); 886 /* Set no attenuation on Audio Dock pads. */ 887 emu->emu1010.adc_pads = 0x00; 888 snd_emu1010_fpga_write(emu, EMU_HANA_ADC_PADS, emu->emu1010.adc_pads); 889 /* Unmute Audio dock DACs, Headphone source DAC-4. */ 890 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_MISC, EMU_HANA_DOCK_PHONES_192_DAC4); 891 /* DAC PADs. */ 892 emu->emu1010.dac_pads = EMU_HANA_DOCK_DAC_PAD1 | EMU_HANA_DOCK_DAC_PAD2 | 893 EMU_HANA_DOCK_DAC_PAD3 | EMU_HANA_DOCK_DAC_PAD4; 894 snd_emu1010_fpga_write(emu, EMU_HANA_DAC_PADS, emu->emu1010.dac_pads); 895 /* SPDIF Format. Set Consumer mode, 24bit, copy enable */ 896 snd_emu1010_fpga_write(emu, EMU_HANA_SPDIF_MODE, EMU_HANA_SPDIF_MODE_RX_INVALID); 897 /* MIDI routing */ 898 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_IN, EMU_HANA_MIDI_INA_FROM_HAMOA | EMU_HANA_MIDI_INB_FROM_DOCK2); 899 snd_emu1010_fpga_write(emu, EMU_HANA_MIDI_OUT, EMU_HANA_MIDI_OUT_DOCK2 | EMU_HANA_MIDI_OUT_SYNC2); 900 901 emu->gpio_interrupt = emu1010_interrupt; 902 // Note: The Audigy INTE is set later 903 snd_emu1010_fpga_write(emu, EMU_HANA_IRQ_ENABLE, 904 EMU_HANA_IRQ_DOCK | EMU_HANA_IRQ_DOCK_LOST); 905 snd_emu1010_fpga_read(emu, EMU_HANA_IRQ_STATUS, ®); // Clear pending IRQs 906 907 emu->emu1010.clock_source = 1; /* 48000 */ 908 emu->emu1010.clock_fallback = 1; /* 48000 */ 909 /* Default WCLK set to 48kHz. */ 910 snd_emu1010_fpga_write(emu, EMU_HANA_DEFCLOCK, EMU_HANA_DEFCLOCK_48K); 911 /* Word Clock source, Internal 48kHz x1 */ 912 emu->emu1010.wclock = EMU_HANA_WCLOCK_INT_48K; 913 snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K); 914 /* snd_emu1010_fpga_write(emu, EMU_HANA_WCLOCK, EMU_HANA_WCLOCK_INT_48K | EMU_HANA_WCLOCK_4X); */ 915 snd_emu1010_update_clock(emu); 916 917 // The routes are all set to EMU_SRC_SILENCE due to the reset, 918 // so it is safe to simply enable the outputs. 919 snd_emu1010_fpga_write(emu, EMU_HANA_UNMUTE, EMU_UNMUTE); 920 921 return 0; 922 } 923 /* 924 * Create the EMU10K1 instance 925 */ 926 927 #ifdef CONFIG_PM_SLEEP 928 static int alloc_pm_buffer(struct snd_emu10k1 *emu); 929 static void free_pm_buffer(struct snd_emu10k1 *emu); 930 #endif 931 932 static void snd_emu10k1_free(struct snd_card *card) 933 { 934 struct snd_emu10k1 *emu = card->private_data; 935 936 if (emu->port) { /* avoid access to already used hardware */ 937 snd_emu10k1_fx8010_tram_setup(emu, 0); 938 snd_emu10k1_done(emu); 939 snd_emu10k1_free_efx(emu); 940 } 941 if (emu->card_capabilities->emu_model == EMU_MODEL_EMU1010) { 942 /* Disable 48Volt power to Audio Dock */ 943 snd_emu1010_fpga_write(emu, EMU_HANA_DOCK_PWR, 0); 944 } 945 cancel_work_sync(&emu->emu1010.firmware_work); 946 release_firmware(emu->firmware); 947 release_firmware(emu->dock_fw); 948 snd_util_memhdr_free(emu->memhdr); 949 if (emu->silent_page.area) 950 snd_dma_free_pages(&emu->silent_page); 951 if (emu->ptb_pages.area) 952 snd_dma_free_pages(&emu->ptb_pages); 953 vfree(emu->page_ptr_table); 954 vfree(emu->page_addr_table); 955 #ifdef CONFIG_PM_SLEEP 956 free_pm_buffer(emu); 957 #endif 958 } 959 960 static const struct snd_emu_chip_details emu_chip_details[] = { 961 /* Audigy 5/Rx SB1550 */ 962 /* Tested by michael@gernoth.net 28 Mar 2015 */ 963 /* DSP: CA10300-IAT LF 964 * DAC: Cirrus Logic CS4382-KQZ 965 * ADC: Philips 1361T 966 * AC97: Sigmatel STAC9750 967 * CA0151: None 968 */ 969 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10241102, 970 .driver = "Audigy2", .name = "SB Audigy 5/Rx [SB1550]", 971 .id = "Audigy2", 972 .emu10k2_chip = 1, 973 .ca0108_chip = 1, 974 .spk71 = 1, 975 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 976 .ac97_chip = 1}, 977 /* Audigy4 (Not PRO) SB0610 */ 978 /* Tested by James@superbug.co.uk 4th April 2006 */ 979 /* A_IOCFG bits 980 * Output 981 * 0: ? 982 * 1: ? 983 * 2: ? 984 * 3: 0 - Digital Out, 1 - Line in 985 * 4: ? 986 * 5: ? 987 * 6: ? 988 * 7: ? 989 * Input 990 * 8: ? 991 * 9: ? 992 * A: Green jack sense (Front) 993 * B: ? 994 * C: Black jack sense (Rear/Side Right) 995 * D: Yellow jack sense (Center/LFE/Side Left) 996 * E: ? 997 * F: ? 998 * 999 * Digital Out/Line in switch using A_IOCFG bit 3 (0x08) 1000 * 0 - Digital Out 1001 * 1 - Line in 1002 */ 1003 /* Mic input not tested. 1004 * Analog CD input not tested 1005 * Digital Out not tested. 1006 * Line in working. 1007 * Audio output 5.1 working. Side outputs not working. 1008 */ 1009 /* DSP: CA10300-IAT LF 1010 * DAC: Cirrus Logic CS4382-KQZ 1011 * ADC: Philips 1361T 1012 * AC97: Sigmatel STAC9750 1013 * CA0151: None 1014 */ 1015 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10211102, 1016 .driver = "Audigy2", .name = "SB Audigy 4 [SB0610]", 1017 .id = "Audigy2", 1018 .emu10k2_chip = 1, 1019 .ca0108_chip = 1, 1020 .spk71 = 1, 1021 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1022 .ac97_chip = 1} , 1023 /* Audigy 2 Value AC3 out does not work yet. 1024 * Need to find out how to turn off interpolators. 1025 */ 1026 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1027 /* DSP: CA0108-IAT 1028 * DAC: CS4382-KQ 1029 * ADC: Philips 1361T 1030 * AC97: STAC9750 1031 * CA0151: None 1032 */ 1033 /* 1034 * A_IOCFG Input (GPIO) 1035 * 0x400 = Front analog jack plugged in. (Green socket) 1036 * 0x1000 = Rear analog jack plugged in. (Black socket) 1037 * 0x2000 = Center/LFE analog jack plugged in. (Orange socket) 1038 * A_IOCFG Output (GPIO) 1039 * 0x60 = Sound out of front Left. 1040 * Win sets it to 0xXX61 1041 */ 1042 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102, 1043 .driver = "Audigy2", .name = "SB Audigy 2 Value [SB0400]", 1044 .id = "Audigy2", 1045 .emu10k2_chip = 1, 1046 .ca0108_chip = 1, 1047 .spk71 = 1, 1048 .ac97_chip = 1} , 1049 /* Audigy 2 ZS Notebook Cardbus card.*/ 1050 /* Tested by James@superbug.co.uk 6th November 2006 */ 1051 /* Audio output 7.1/Headphones working. 1052 * Digital output working. (AC3 not checked, only PCM) 1053 * Audio Mic/Line inputs working. 1054 * Digital input not tested. 1055 */ 1056 /* DSP: Tina2 1057 * DAC: Wolfson WM8768/WM8568 1058 * ADC: Wolfson WM8775 1059 * AC97: None 1060 * CA0151: None 1061 */ 1062 /* Tested by James@superbug.co.uk 4th April 2006 */ 1063 /* A_IOCFG bits 1064 * Output 1065 * 0: Not Used 1066 * 1: 0 = Mute all the 7.1 channel out. 1 = unmute. 1067 * 2: Analog input 0 = line in, 1 = mic in 1068 * 3: Not Used 1069 * 4: Digital output 0 = off, 1 = on. 1070 * 5: Not Used 1071 * 6: Not Used 1072 * 7: Not Used 1073 * Input 1074 * All bits 1 (0x3fxx) means nothing plugged in. 1075 * 8-9: 0 = Line in/Mic, 2 = Optical in, 3 = Nothing. 1076 * A-B: 0 = Headphones, 2 = Optical out, 3 = Nothing. 1077 * C-D: 2 = Front/Rear/etc, 3 = nothing. 1078 * E-F: Always 0 1079 * 1080 */ 1081 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x20011102, 1082 .driver = "Audigy2", .name = "Audigy 2 ZS Notebook [SB0530]", 1083 .id = "Audigy2", 1084 .emu10k2_chip = 1, 1085 .ca0108_chip = 1, 1086 .ca_cardbus_chip = 1, 1087 .spi_dac = 1, 1088 .i2c_adc = 1, 1089 .spk71 = 1} , 1090 /* This is MAEM8950 "Mana" */ 1091 /* Attach MicroDock[M] to make it an E-MU 1616[m]. */ 1092 /* Does NOT support sync daughter card (obviously). */ 1093 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1094 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x42011102, 1095 .driver = "Audigy2", .name = "E-MU 02 CardBus [MAEM8950]", 1096 .id = "EMU1010", 1097 .emu10k2_chip = 1, 1098 .ca0108_chip = 1, 1099 .ca_cardbus_chip = 1, 1100 .spk71 = 1 , 1101 .emu_model = EMU_MODEL_EMU1616}, 1102 /* Tested by James@superbug.co.uk 4th Nov 2007. */ 1103 /* This is MAEM8960 "Hana3", 0202 is MAEM8980 */ 1104 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1105 * MicroDock[M] to make it an E-MU 1616[m]. */ 1106 /* Does NOT support sync daughter card. */ 1107 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40041102, 1108 .driver = "Audigy2", .name = "E-MU 1010b PCI [MAEM8960]", 1109 .id = "EMU1010", 1110 .emu10k2_chip = 1, 1111 .ca0108_chip = 1, 1112 .spk71 = 1, 1113 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 new revision */ 1114 /* Tested by Maxim Kachur <mcdebugger@duganet.ru> 17th Oct 2012. */ 1115 /* This is MAEM8986, 0202 is MAEM8980 */ 1116 /* Attach 0202 daughter card to make it an E-MU 1212m, OR a 1117 * MicroDockM to make it an E-MU 1616m. The non-m 1118 * version was never sold with this card, but should 1119 * still work. */ 1120 /* Does NOT support sync daughter card. */ 1121 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40071102, 1122 .driver = "Audigy2", .name = "E-MU 1010 PCIe [MAEM8986]", 1123 .id = "EMU1010", 1124 .emu10k2_chip = 1, 1125 .ca0108_chip = 1, 1126 .spk71 = 1, 1127 .emu_model = EMU_MODEL_EMU1010B}, /* EMU 1010 PCIe */ 1128 /* Tested by James@superbug.co.uk 8th July 2005. */ 1129 /* This is MAEM8810 "Hana", 0202 is MAEM8820 "Hamoa" */ 1130 /* Attach 0202 daughter card to make it an E-MU 1212m, OR an 1131 * AudioDock[M] to make it an E-MU 1820[m]. */ 1132 /* Supports sync daughter card. */ 1133 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40011102, 1134 .driver = "Audigy2", .name = "E-MU 1010 [MAEM8810]", 1135 .id = "EMU1010", 1136 .emu10k2_chip = 1, 1137 .ca0102_chip = 1, 1138 .spk71 = 1, 1139 .emu_model = EMU_MODEL_EMU1010}, /* EMU 1010 old revision */ 1140 /* This is MAEM8852 "HanaLiteLite" */ 1141 /* Supports sync daughter card. */ 1142 /* Tested by oswald.buddenhagen@gmx.de Mar 2023. */ 1143 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40021102, 1144 .driver = "Audigy2", .name = "E-MU 0404b PCI [MAEM8852]", 1145 .id = "EMU0404", 1146 .emu10k2_chip = 1, 1147 .ca0108_chip = 1, 1148 .spk20 = 1, 1149 .no_adat = 1, 1150 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 new revision */ 1151 /* This is MAEM8850 "HanaLite" */ 1152 /* Supports sync daughter card. */ 1153 /* Tested by James@superbug.co.uk 20-3-2007. */ 1154 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x40021102, 1155 .driver = "Audigy2", .name = "E-MU 0404 [MAEM8850]", 1156 .id = "EMU0404", 1157 .emu10k2_chip = 1, 1158 .ca0102_chip = 1, 1159 .spk20 = 1, 1160 .no_adat = 1, 1161 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 */ 1162 /* EMU0404 PCIe */ 1163 /* Does NOT support sync daughter card. */ 1164 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x40051102, 1165 .driver = "Audigy2", .name = "E-MU 0404 PCIe [MAEM8984]", 1166 .id = "EMU0404", 1167 .emu10k2_chip = 1, 1168 .ca0108_chip = 1, 1169 .spk20 = 1, 1170 .no_adat = 1, 1171 .emu_model = EMU_MODEL_EMU0404}, /* EMU 0404 PCIe ver_03 */ 1172 {.vendor = 0x1102, .device = 0x0008, 1173 .driver = "Audigy2", .name = "SB Audigy 2 Value [Unknown]", 1174 .id = "Audigy2", 1175 .emu10k2_chip = 1, 1176 .ca0108_chip = 1, 1177 .ac97_chip = 1} , 1178 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1179 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102, 1180 .driver = "Audigy2", .name = "SB Audigy 4 PRO [SB0380]", 1181 .id = "Audigy2", 1182 .emu10k2_chip = 1, 1183 .ca0102_chip = 1, 1184 .ca0151_chip = 1, 1185 .spk71 = 1, 1186 .spdif_bug = 1, 1187 .ac97_chip = 1} , 1188 /* Tested by shane-alsa@cm.nu 5th Nov 2005 */ 1189 /* The 0x20061102 does have SB0350 written on it 1190 * Just like 0x20021102 1191 */ 1192 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20061102, 1193 .driver = "Audigy2", .name = "SB Audigy 2 [SB0350b]", 1194 .id = "Audigy2", 1195 .emu10k2_chip = 1, 1196 .ca0102_chip = 1, 1197 .ca0151_chip = 1, 1198 .spk71 = 1, 1199 .spdif_bug = 1, 1200 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1201 .ac97_chip = 1} , 1202 /* 0x20051102 also has SB0350 written on it, treated as Audigy 2 ZS by 1203 Creative's Windows driver */ 1204 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20051102, 1205 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350a]", 1206 .id = "Audigy2", 1207 .emu10k2_chip = 1, 1208 .ca0102_chip = 1, 1209 .ca0151_chip = 1, 1210 .spk71 = 1, 1211 .spdif_bug = 1, 1212 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1213 .ac97_chip = 1} , 1214 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102, 1215 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0350]", 1216 .id = "Audigy2", 1217 .emu10k2_chip = 1, 1218 .ca0102_chip = 1, 1219 .ca0151_chip = 1, 1220 .spk71 = 1, 1221 .spdif_bug = 1, 1222 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1223 .ac97_chip = 1} , 1224 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102, 1225 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0360]", 1226 .id = "Audigy2", 1227 .emu10k2_chip = 1, 1228 .ca0102_chip = 1, 1229 .ca0151_chip = 1, 1230 .spk71 = 1, 1231 .spdif_bug = 1, 1232 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1233 .ac97_chip = 1} , 1234 /* Audigy 2 */ 1235 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1236 /* DSP: CA0102-IAT 1237 * DAC: CS4382-KQ 1238 * ADC: Philips 1361T 1239 * AC97: STAC9721 1240 * CA0151: Yes 1241 */ 1242 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102, 1243 .driver = "Audigy2", .name = "SB Audigy 2 [SB0240]", 1244 .id = "Audigy2", 1245 .emu10k2_chip = 1, 1246 .ca0102_chip = 1, 1247 .ca0151_chip = 1, 1248 .spk71 = 1, 1249 .spdif_bug = 1, 1250 .adc_1361t = 1, /* 24 bit capture instead of 16bit */ 1251 .ac97_chip = 1} , 1252 /* Audigy 2 Platinum EX */ 1253 /* Win driver sets A_IOCFG output to 0x1c00 */ 1254 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102, 1255 .driver = "Audigy2", .name = "Audigy 2 Platinum EX [SB0280]", 1256 .id = "Audigy2", 1257 .emu10k2_chip = 1, 1258 .ca0102_chip = 1, 1259 .ca0151_chip = 1, 1260 .spk71 = 1, 1261 .spdif_bug = 1} , 1262 /* Dell OEM/Creative Labs Audigy 2 ZS */ 1263 /* See ALSA bug#1365 */ 1264 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10031102, 1265 .driver = "Audigy2", .name = "SB Audigy 2 ZS [SB0353]", 1266 .id = "Audigy2", 1267 .emu10k2_chip = 1, 1268 .ca0102_chip = 1, 1269 .ca0151_chip = 1, 1270 .spk71 = 1, 1271 .spdif_bug = 1, 1272 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1273 .ac97_chip = 1} , 1274 /* Audigy 2 Platinum */ 1275 /* Win driver sets A_IOCFG output to 0xa00 */ 1276 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102, 1277 .driver = "Audigy2", .name = "SB Audigy 2 Platinum [SB0240P]", 1278 .id = "Audigy2", 1279 .emu10k2_chip = 1, 1280 .ca0102_chip = 1, 1281 .ca0151_chip = 1, 1282 .spk71 = 1, 1283 .spdif_bug = 1, 1284 .invert_shared_spdif = 1, /* digital/analog switch swapped */ 1285 .adc_1361t = 1, /* 24 bit capture instead of 16bit. Fixes ALSA bug#324 */ 1286 .ac97_chip = 1} , 1287 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04, 1288 .driver = "Audigy2", .name = "SB Audigy 2 [Unknown]", 1289 .id = "Audigy2", 1290 .emu10k2_chip = 1, 1291 .ca0102_chip = 1, 1292 .ca0151_chip = 1, 1293 .spdif_bug = 1, 1294 .ac97_chip = 1} , 1295 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102, 1296 .driver = "Audigy", .name = "SB Audigy 1 [SB0092]", 1297 .id = "Audigy", 1298 .emu10k2_chip = 1, 1299 .ca0102_chip = 1, 1300 .ac97_chip = 1} , 1301 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00521102, 1302 .driver = "Audigy", .name = "SB Audigy 1 ES [SB0160]", 1303 .id = "Audigy", 1304 .emu10k2_chip = 1, 1305 .ca0102_chip = 1, 1306 .spdif_bug = 1, 1307 .ac97_chip = 1} , 1308 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102, 1309 .driver = "Audigy", .name = "SB Audigy 1 [SB0090]", 1310 .id = "Audigy", 1311 .emu10k2_chip = 1, 1312 .ca0102_chip = 1, 1313 .ac97_chip = 1} , 1314 {.vendor = 0x1102, .device = 0x0004, 1315 .driver = "Audigy", .name = "Audigy 1 [Unknown]", 1316 .id = "Audigy", 1317 .emu10k2_chip = 1, 1318 .ca0102_chip = 1, 1319 .ac97_chip = 1} , 1320 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x100a1102, 1321 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1322 .id = "Live", 1323 .emu10k1_chip = 1, 1324 .ac97_chip = 1, 1325 .sblive51 = 1} , 1326 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806b1102, 1327 .driver = "EMU10K1", .name = "SB Live! [SB0105]", 1328 .id = "Live", 1329 .emu10k1_chip = 1, 1330 .ac97_chip = 1, 1331 .sblive51 = 1} , 1332 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806a1102, 1333 .driver = "EMU10K1", .name = "SB Live! Value [SB0103]", 1334 .id = "Live", 1335 .emu10k1_chip = 1, 1336 .ac97_chip = 1, 1337 .sblive51 = 1} , 1338 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102, 1339 .driver = "EMU10K1", .name = "SB Live! Value [SB0101]", 1340 .id = "Live", 1341 .emu10k1_chip = 1, 1342 .ac97_chip = 1, 1343 .sblive51 = 1} , 1344 /* Tested by ALSA bug#1680 26th December 2005 */ 1345 /* note: It really has SB0220 written on the card, */ 1346 /* but it's SB0228 according to kx.inf */ 1347 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80661102, 1348 .driver = "EMU10K1", .name = "SB Live! 5.1 Dell OEM [SB0228]", 1349 .id = "Live", 1350 .emu10k1_chip = 1, 1351 .ac97_chip = 1, 1352 .sblive51 = 1} , 1353 /* Tested by Thomas Zehetbauer 27th Aug 2005 */ 1354 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80651102, 1355 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0220]", 1356 .id = "Live", 1357 .emu10k1_chip = 1, 1358 .ac97_chip = 1, 1359 .sblive51 = 1} , 1360 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102, 1361 .driver = "EMU10K1", .name = "SB Live! 5.1", 1362 .id = "Live", 1363 .emu10k1_chip = 1, 1364 .ac97_chip = 1, 1365 .sblive51 = 1} , 1366 /* Tested by alsa bugtrack user "hus" bug #1297 12th Aug 2005 */ 1367 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102, 1368 .driver = "EMU10K1", .name = "SB Live! 5.1 [SB0060]", 1369 .id = "Live", 1370 .emu10k1_chip = 1, 1371 .ac97_chip = 2, /* ac97 is optional; both SBLive 5.1 and platinum 1372 * share the same IDs! 1373 */ 1374 .sblive51 = 1} , 1375 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102, 1376 .driver = "EMU10K1", .name = "SB Live! Value [CT4850]", 1377 .id = "Live", 1378 .emu10k1_chip = 1, 1379 .ac97_chip = 1, 1380 .sblive51 = 1} , 1381 /* SB Live! Platinum */ 1382 /* Win driver sets A_IOCFG output to 0 */ 1383 /* Tested by Jonathan Dowland <jon@dow.land> Apr 2023. */ 1384 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102, 1385 .driver = "EMU10K1", .name = "SB Live! Platinum [CT4760P]", 1386 .id = "Live", 1387 .emu10k1_chip = 1, 1388 .ac97_chip = 1} , 1389 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102, 1390 .driver = "EMU10K1", .name = "SB Live! Value [CT4871]", 1391 .id = "Live", 1392 .emu10k1_chip = 1, 1393 .ac97_chip = 1, 1394 .sblive51 = 1} , 1395 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102, 1396 .driver = "EMU10K1", .name = "SB Live! Value [CT4831]", 1397 .id = "Live", 1398 .emu10k1_chip = 1, 1399 .ac97_chip = 1, 1400 .sblive51 = 1} , 1401 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102, 1402 .driver = "EMU10K1", .name = "SB Live! Value [CT4870]", 1403 .id = "Live", 1404 .emu10k1_chip = 1, 1405 .ac97_chip = 1, 1406 .sblive51 = 1} , 1407 /* Tested by James@superbug.co.uk 3rd July 2005 */ 1408 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102, 1409 .driver = "EMU10K1", .name = "SB Live! Value [CT4832]", 1410 .id = "Live", 1411 .emu10k1_chip = 1, 1412 .ac97_chip = 1, 1413 .sblive51 = 1} , 1414 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102, 1415 .driver = "EMU10K1", .name = "SB Live! Value [CT4830]", 1416 .id = "Live", 1417 .emu10k1_chip = 1, 1418 .ac97_chip = 1, 1419 .sblive51 = 1} , 1420 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102, 1421 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]", 1422 .id = "Live", 1423 .emu10k1_chip = 1, 1424 .ac97_chip = 1, 1425 .sblive51 = 1} , 1426 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102, 1427 .driver = "EMU10K1", .name = "SB Live! Value [CT4780]", 1428 .id = "Live", 1429 .emu10k1_chip = 1, 1430 .ac97_chip = 1, 1431 .sblive51 = 1} , 1432 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102, 1433 .driver = "EMU10K1", .name = "E-MU APS [PC545]", 1434 .id = "APS", 1435 .emu10k1_chip = 1, 1436 .ecard = 1} , 1437 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102, 1438 .driver = "EMU10K1", .name = "SB Live! [CT4620]", 1439 .id = "Live", 1440 .emu10k1_chip = 1, 1441 .ac97_chip = 1, 1442 .sblive51 = 1} , 1443 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102, 1444 .driver = "EMU10K1", .name = "SB Live! Value [CT4670]", 1445 .id = "Live", 1446 .emu10k1_chip = 1, 1447 .ac97_chip = 1, 1448 .sblive51 = 1} , 1449 {.vendor = 0x1102, .device = 0x0002, 1450 .driver = "EMU10K1", .name = "SB Live! [Unknown]", 1451 .id = "Live", 1452 .emu10k1_chip = 1, 1453 .ac97_chip = 1, 1454 .sblive51 = 1} , 1455 { } /* terminator */ 1456 }; 1457 1458 /* 1459 * The chip (at least the Audigy 2 CA0102 chip, but most likely others, too) 1460 * has a problem that from time to time it likes to do few DMA reads a bit 1461 * beyond its normal allocation and gets very confused if these reads get 1462 * blocked by a IOMMU. 1463 * 1464 * This behaviour has been observed for the first (reserved) page 1465 * (for which it happens multiple times at every playback), often for various 1466 * synth pages and sometimes for PCM playback buffers and the page table 1467 * memory itself. 1468 * 1469 * As a workaround let's widen these DMA allocations by an extra page if we 1470 * detect that the device is behind a non-passthrough IOMMU. 1471 */ 1472 static void snd_emu10k1_detect_iommu(struct snd_emu10k1 *emu) 1473 { 1474 struct iommu_domain *domain; 1475 1476 emu->iommu_workaround = false; 1477 1478 domain = iommu_get_domain_for_dev(emu->card->dev); 1479 if (!domain || domain->type == IOMMU_DOMAIN_IDENTITY) 1480 return; 1481 1482 dev_notice(emu->card->dev, 1483 "non-passthrough IOMMU detected, widening DMA allocations"); 1484 emu->iommu_workaround = true; 1485 } 1486 1487 int snd_emu10k1_create(struct snd_card *card, 1488 struct pci_dev *pci, 1489 unsigned short extin_mask, 1490 unsigned short extout_mask, 1491 long max_cache_bytes, 1492 int enable_ir, 1493 uint subsystem) 1494 { 1495 struct snd_emu10k1 *emu = card->private_data; 1496 int idx, err; 1497 int is_audigy; 1498 size_t page_table_size; 1499 __le32 *pgtbl; 1500 unsigned int silent_page; 1501 const struct snd_emu_chip_details *c; 1502 1503 /* enable PCI device */ 1504 err = pcim_enable_device(pci); 1505 if (err < 0) 1506 return err; 1507 1508 card->private_free = snd_emu10k1_free; 1509 emu->card = card; 1510 spin_lock_init(&emu->reg_lock); 1511 spin_lock_init(&emu->emu_lock); 1512 spin_lock_init(&emu->spi_lock); 1513 spin_lock_init(&emu->i2c_lock); 1514 spin_lock_init(&emu->voice_lock); 1515 spin_lock_init(&emu->synth_lock); 1516 spin_lock_init(&emu->memblk_lock); 1517 mutex_init(&emu->fx8010.lock); 1518 INIT_LIST_HEAD(&emu->mapped_link_head); 1519 INIT_LIST_HEAD(&emu->mapped_order_link_head); 1520 emu->pci = pci; 1521 emu->irq = -1; 1522 emu->synth = NULL; 1523 emu->get_synth_voice = NULL; 1524 INIT_WORK(&emu->emu1010.firmware_work, emu1010_firmware_work); 1525 /* read revision & serial */ 1526 emu->revision = pci->revision; 1527 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial); 1528 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model); 1529 dev_dbg(card->dev, 1530 "vendor = 0x%x, device = 0x%x, subsystem_vendor_id = 0x%x, subsystem_id = 0x%x\n", 1531 pci->vendor, pci->device, emu->serial, emu->model); 1532 1533 for (c = emu_chip_details; c->vendor; c++) { 1534 if (c->vendor == pci->vendor && c->device == pci->device) { 1535 if (subsystem) { 1536 if (c->subsystem && (c->subsystem == subsystem)) 1537 break; 1538 else 1539 continue; 1540 } else { 1541 if (c->subsystem && (c->subsystem != emu->serial)) 1542 continue; 1543 if (c->revision && c->revision != emu->revision) 1544 continue; 1545 } 1546 break; 1547 } 1548 } 1549 if (c->vendor == 0) { 1550 dev_err(card->dev, "emu10k1: Card not recognised\n"); 1551 return -ENOENT; 1552 } 1553 emu->card_capabilities = c; 1554 if (c->subsystem && !subsystem) 1555 dev_dbg(card->dev, "Sound card name = %s\n", c->name); 1556 else if (subsystem) 1557 dev_dbg(card->dev, "Sound card name = %s, " 1558 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x. " 1559 "Forced to subsystem = 0x%x\n", c->name, 1560 pci->vendor, pci->device, emu->serial, c->subsystem); 1561 else 1562 dev_dbg(card->dev, "Sound card name = %s, " 1563 "vendor = 0x%x, device = 0x%x, subsystem = 0x%x.\n", 1564 c->name, pci->vendor, pci->device, 1565 emu->serial); 1566 1567 if (!*card->id && c->id) 1568 strscpy(card->id, c->id, sizeof(card->id)); 1569 1570 is_audigy = emu->audigy = c->emu10k2_chip; 1571 1572 snd_emu10k1_detect_iommu(emu); 1573 1574 /* set addressing mode */ 1575 emu->address_mode = is_audigy ? 0 : 1; 1576 /* set the DMA transfer mask */ 1577 emu->dma_mask = emu->address_mode ? EMU10K1_DMA_MASK : AUDIGY_DMA_MASK; 1578 if (dma_set_mask_and_coherent(&pci->dev, emu->dma_mask) < 0) { 1579 dev_err(card->dev, 1580 "architecture does not support PCI busmaster DMA with mask 0x%lx\n", 1581 emu->dma_mask); 1582 return -ENXIO; 1583 } 1584 if (is_audigy) 1585 emu->gpr_base = A_FXGPREGBASE; 1586 else 1587 emu->gpr_base = FXGPREGBASE; 1588 1589 err = pci_request_regions(pci, "EMU10K1"); 1590 if (err < 0) 1591 return err; 1592 emu->port = pci_resource_start(pci, 0); 1593 1594 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT; 1595 1596 page_table_size = sizeof(u32) * (emu->address_mode ? MAXPAGES1 : 1597 MAXPAGES0); 1598 if (snd_emu10k1_alloc_pages_maybe_wider(emu, page_table_size, 1599 &emu->ptb_pages) < 0) 1600 return -ENOMEM; 1601 dev_dbg(card->dev, "page table address range is %.8lx:%.8lx\n", 1602 (unsigned long)emu->ptb_pages.addr, 1603 (unsigned long)(emu->ptb_pages.addr + emu->ptb_pages.bytes)); 1604 1605 emu->page_ptr_table = vmalloc(array_size(sizeof(void *), 1606 emu->max_cache_pages)); 1607 emu->page_addr_table = vmalloc(array_size(sizeof(unsigned long), 1608 emu->max_cache_pages)); 1609 if (!emu->page_ptr_table || !emu->page_addr_table) 1610 return -ENOMEM; 1611 1612 if (snd_emu10k1_alloc_pages_maybe_wider(emu, EMUPAGESIZE, 1613 &emu->silent_page) < 0) 1614 return -ENOMEM; 1615 dev_dbg(card->dev, "silent page range is %.8lx:%.8lx\n", 1616 (unsigned long)emu->silent_page.addr, 1617 (unsigned long)(emu->silent_page.addr + 1618 emu->silent_page.bytes)); 1619 1620 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE); 1621 if (!emu->memhdr) 1622 return -ENOMEM; 1623 emu->memhdr->block_extra_size = sizeof(struct snd_emu10k1_memblk) - 1624 sizeof(struct snd_util_memblk); 1625 1626 pci_set_master(pci); 1627 1628 // The masks are not used for Audigy. 1629 // FIXME: these should come from the card_capabilites table. 1630 if (extin_mask == 0) 1631 extin_mask = 0x3fcf; // EXTIN_* 1632 if (extout_mask == 0) 1633 extout_mask = 0x7fff; // EXTOUT_* 1634 emu->fx8010.extin_mask = extin_mask; 1635 emu->fx8010.extout_mask = extout_mask; 1636 emu->enable_ir = enable_ir; 1637 1638 if (emu->card_capabilities->ca_cardbus_chip) { 1639 err = snd_emu10k1_cardbus_init(emu); 1640 if (err < 0) 1641 return err; 1642 } 1643 if (emu->card_capabilities->ecard) { 1644 err = snd_emu10k1_ecard_init(emu); 1645 if (err < 0) 1646 return err; 1647 } else if (emu->card_capabilities->emu_model) { 1648 err = snd_emu10k1_emu1010_init(emu); 1649 if (err < 0) 1650 return err; 1651 } else { 1652 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version 1653 does not support this, it shouldn't do any harm */ 1654 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, 1655 AC97SLOT_CNTR|AC97SLOT_LFE); 1656 } 1657 1658 /* initialize TRAM setup */ 1659 emu->fx8010.itram_size = (16 * 1024)/2; 1660 emu->fx8010.etram_pages.area = NULL; 1661 emu->fx8010.etram_pages.bytes = 0; 1662 1663 /* irq handler must be registered after I/O ports are activated */ 1664 if (devm_request_irq(&pci->dev, pci->irq, snd_emu10k1_interrupt, 1665 IRQF_SHARED, KBUILD_MODNAME, emu)) 1666 return -EBUSY; 1667 emu->irq = pci->irq; 1668 card->sync_irq = emu->irq; 1669 1670 /* 1671 * Init to 0x02109204 : 1672 * Clock accuracy = 0 (1000ppm) 1673 * Sample Rate = 2 (48kHz) 1674 * Audio Channel = 1 (Left of 2) 1675 * Source Number = 0 (Unspecified) 1676 * Generation Status = 1 (Original for Cat Code 12) 1677 * Cat Code = 12 (Digital Signal Mixer) 1678 * Mode = 0 (Mode 0) 1679 * Emphasis = 0 (None) 1680 * CP = 1 (Copyright unasserted) 1681 * AN = 0 (Audio data) 1682 * P = 0 (Consumer) 1683 */ 1684 emu->spdif_bits[0] = emu->spdif_bits[1] = 1685 emu->spdif_bits[2] = SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 | 1686 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC | 1687 SPCS_GENERATIONSTATUS | 0x00001200 | 1688 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT; 1689 1690 /* Clear silent pages and set up pointers */ 1691 memset(emu->silent_page.area, 0, emu->silent_page.bytes); 1692 silent_page = emu->silent_page.addr << emu->address_mode; 1693 pgtbl = (__le32 *)emu->ptb_pages.area; 1694 for (idx = 0; idx < (emu->address_mode ? MAXPAGES1 : MAXPAGES0); idx++) 1695 pgtbl[idx] = cpu_to_le32(silent_page | idx); 1696 1697 /* set up voice indices */ 1698 for (idx = 0; idx < NUM_G; idx++) 1699 emu->voices[idx].number = idx; 1700 1701 err = snd_emu10k1_init(emu, enable_ir); 1702 if (err < 0) 1703 return err; 1704 #ifdef CONFIG_PM_SLEEP 1705 err = alloc_pm_buffer(emu); 1706 if (err < 0) 1707 return err; 1708 #endif 1709 1710 /* Initialize the effect engine */ 1711 err = snd_emu10k1_init_efx(emu); 1712 if (err < 0) 1713 return err; 1714 snd_emu10k1_audio_enable(emu); 1715 1716 #ifdef CONFIG_SND_PROC_FS 1717 snd_emu10k1_proc_init(emu); 1718 #endif 1719 return 0; 1720 } 1721 1722 #ifdef CONFIG_PM_SLEEP 1723 static const unsigned char saved_regs[] = { 1724 CPF, PTRX, CVCF, VTFT, Z1, Z2, PSST, DSL, CCCA, CCR, CLP, 1725 FXRT, MAPA, MAPB, ENVVOL, ATKHLDV, DCYSUSV, LFOVAL1, ENVVAL, 1726 ATKHLDM, DCYSUSM, LFOVAL2, IP, IFATN, PEFE, FMMOD, TREMFRQ, FM2FRQ2, 1727 TEMPENV, ADCCR, FXWC, MICBA, ADCBA, FXBA, 1728 MICBS, ADCBS, FXBS, CDCS, GPSCS, SPCS0, SPCS1, SPCS2, 1729 SPBYPASS, AC97SLOT, CDSRCS, GPSRCS, ZVSRCS, MICIDX, ADCIDX, FXIDX, 1730 0xff /* end */ 1731 }; 1732 static const unsigned char saved_regs_audigy[] = { 1733 A_ADCIDX, A_MICIDX, A_FXWC1, A_FXWC2, A_EHC, 1734 A_FXRT2, A_SENDAMOUNTS, A_FXRT1, 1735 0xff /* end */ 1736 }; 1737 1738 static int alloc_pm_buffer(struct snd_emu10k1 *emu) 1739 { 1740 int size; 1741 1742 size = ARRAY_SIZE(saved_regs); 1743 if (emu->audigy) 1744 size += ARRAY_SIZE(saved_regs_audigy); 1745 emu->saved_ptr = vmalloc(array3_size(4, NUM_G, size)); 1746 if (!emu->saved_ptr) 1747 return -ENOMEM; 1748 if (snd_emu10k1_efx_alloc_pm_buffer(emu) < 0) 1749 return -ENOMEM; 1750 if (emu->card_capabilities->ca0151_chip && 1751 snd_p16v_alloc_pm_buffer(emu) < 0) 1752 return -ENOMEM; 1753 return 0; 1754 } 1755 1756 static void free_pm_buffer(struct snd_emu10k1 *emu) 1757 { 1758 vfree(emu->saved_ptr); 1759 snd_emu10k1_efx_free_pm_buffer(emu); 1760 if (emu->card_capabilities->ca0151_chip) 1761 snd_p16v_free_pm_buffer(emu); 1762 } 1763 1764 void snd_emu10k1_suspend_regs(struct snd_emu10k1 *emu) 1765 { 1766 int i; 1767 const unsigned char *reg; 1768 unsigned int *val; 1769 1770 val = emu->saved_ptr; 1771 for (reg = saved_regs; *reg != 0xff; reg++) 1772 for (i = 0; i < NUM_G; i++, val++) 1773 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1774 if (emu->audigy) { 1775 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1776 for (i = 0; i < NUM_G; i++, val++) 1777 *val = snd_emu10k1_ptr_read(emu, *reg, i); 1778 } 1779 if (emu->audigy) 1780 emu->saved_a_iocfg = inw(emu->port + A_IOCFG); 1781 emu->saved_hcfg = inl(emu->port + HCFG); 1782 } 1783 1784 void snd_emu10k1_resume_init(struct snd_emu10k1 *emu) 1785 { 1786 if (emu->card_capabilities->ca_cardbus_chip) 1787 snd_emu10k1_cardbus_init(emu); 1788 if (emu->card_capabilities->ecard) 1789 snd_emu10k1_ecard_init(emu); 1790 else if (emu->card_capabilities->emu_model) 1791 snd_emu10k1_emu1010_init(emu); 1792 else 1793 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE); 1794 snd_emu10k1_init(emu, emu->enable_ir); 1795 } 1796 1797 void snd_emu10k1_resume_regs(struct snd_emu10k1 *emu) 1798 { 1799 int i; 1800 const unsigned char *reg; 1801 unsigned int *val; 1802 1803 snd_emu10k1_audio_enable(emu); 1804 1805 /* resore for spdif */ 1806 if (emu->audigy) 1807 outw(emu->saved_a_iocfg, emu->port + A_IOCFG); 1808 outl(emu->saved_hcfg, emu->port + HCFG); 1809 1810 val = emu->saved_ptr; 1811 for (reg = saved_regs; *reg != 0xff; reg++) 1812 for (i = 0; i < NUM_G; i++, val++) 1813 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1814 if (emu->audigy) { 1815 for (reg = saved_regs_audigy; *reg != 0xff; reg++) 1816 for (i = 0; i < NUM_G; i++, val++) 1817 snd_emu10k1_ptr_write(emu, *reg, i, *val); 1818 } 1819 } 1820 #endif 1821