1 /***************************************************************************
2 
3    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
4    All rights reserved
5    www.echoaudio.com
6 
7    This file is part of Echo Digital Audio's generic driver library.
8 
9    Echo Digital Audio's generic driver library is free software;
10    you can redistribute it and/or modify it under the terms of
11    the GNU General Public License as published by the Free Software
12    Foundation.
13 
14    This program is distributed in the hope that it will be useful,
15    but WITHOUT ANY WARRANTY; without even the implied warranty of
16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17    GNU General Public License for more details.
18 
19    You should have received a copy of the GNU General Public License
20    along with this program; if not, write to the Free Software
21    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22    MA  02111-1307, USA.
23 
24    *************************************************************************
25 
26  Translation from C++ and adaptation for use in ALSA-Driver
27  were made by Giuliano Pochini <pochini@shiny.it>
28 
29 ****************************************************************************/
30 
31 
32 static int init_hw(struct echoaudio *chip, u16 device_id, u16 subdevice_id)
33 {
34 	int err;
35 
36 	DE_INIT(("init_hw() - Darla20\n"));
37 	if (snd_BUG_ON((subdevice_id & 0xfff0) != DARLA20))
38 		return -ENODEV;
39 
40 	if ((err = init_dsp_comm_page(chip))) {
41 		DE_INIT(("init_hw - could not initialize DSP comm page\n"));
42 		return err;
43 	}
44 
45 	chip->device_id = device_id;
46 	chip->subdevice_id = subdevice_id;
47 	chip->bad_board = TRUE;
48 	chip->dsp_code_to_load = &card_fw[FW_DARLA20_DSP];
49 	chip->spdif_status = GD_SPDIF_STATUS_UNDEF;
50 	chip->clock_state = GD_CLOCK_UNDEF;
51 	/* Since this card has no ASIC, mark it as loaded so everything
52 	   works OK */
53 	chip->asic_loaded = TRUE;
54 	chip->input_clock_types = ECHO_CLOCK_BIT_INTERNAL;
55 
56 	if ((err = load_firmware(chip)) < 0)
57 		return err;
58 	chip->bad_board = FALSE;
59 
60 	if ((err = init_line_levels(chip)) < 0)
61 		return err;
62 
63 	DE_INIT(("init_hw done\n"));
64 	return err;
65 }
66 
67 
68 
69 /* The Darla20 has no external clock sources */
70 static u32 detect_input_clocks(const struct echoaudio *chip)
71 {
72 	return ECHO_CLOCK_BIT_INTERNAL;
73 }
74 
75 
76 
77 /* The Darla20 has no ASIC. Just do nothing */
78 static int load_asic(struct echoaudio *chip)
79 {
80 	return 0;
81 }
82 
83 
84 
85 static int set_sample_rate(struct echoaudio *chip, u32 rate)
86 {
87 	u8 clock_state, spdif_status;
88 
89 	if (wait_handshake(chip))
90 		return -EIO;
91 
92 	switch (rate) {
93 	case 44100:
94 		clock_state = GD_CLOCK_44;
95 		spdif_status = GD_SPDIF_STATUS_44;
96 		break;
97 	case 48000:
98 		clock_state = GD_CLOCK_48;
99 		spdif_status = GD_SPDIF_STATUS_48;
100 		break;
101 	default:
102 		clock_state = GD_CLOCK_NOCHANGE;
103 		spdif_status = GD_SPDIF_STATUS_NOCHANGE;
104 		break;
105 	}
106 
107 	if (chip->clock_state == clock_state)
108 		clock_state = GD_CLOCK_NOCHANGE;
109 	if (spdif_status == chip->spdif_status)
110 		spdif_status = GD_SPDIF_STATUS_NOCHANGE;
111 
112 	chip->comm_page->sample_rate = cpu_to_le32(rate);
113 	chip->comm_page->gd_clock_state = clock_state;
114 	chip->comm_page->gd_spdif_status = spdif_status;
115 	chip->comm_page->gd_resampler_state = 3;	/* magic number - should always be 3 */
116 
117 	/* Save the new audio state if it changed */
118 	if (clock_state != GD_CLOCK_NOCHANGE)
119 		chip->clock_state = clock_state;
120 	if (spdif_status != GD_SPDIF_STATUS_NOCHANGE)
121 		chip->spdif_status = spdif_status;
122 	chip->sample_rate = rate;
123 
124 	clear_handshake(chip);
125 	return send_vector(chip, DSP_VC_SET_GD_AUDIO_STATE);
126 }
127