1 /** 2 * Copyright (C) 2008, Creative Technology Ltd. All Rights Reserved. 3 * 4 * This source file is released under GPL v2 license (no other versions). 5 * See the COPYING file included in the main directory of this source 6 * distribution for the license terms and conditions. 7 * 8 * @File cthardware.h 9 * 10 * @Brief 11 * This file contains the definition of hardware access methord. 12 * 13 * @Author Liu Chun 14 * @Date May 13 2008 15 * 16 */ 17 18 #ifndef CTHARDWARE_H 19 #define CTHARDWARE_H 20 21 #include <linux/types.h> 22 #include <linux/pci.h> 23 #include <sound/core.h> 24 25 enum CHIPTYP { 26 ATC20K1, 27 ATC20K2, 28 ATCNONE 29 }; 30 31 enum CTCARDS { 32 /* 20k1 models */ 33 CTSB055X, 34 CT20K1_MODEL_FIRST = CTSB055X, 35 CTSB073X, 36 CTUAA, 37 CT20K1_UNKNOWN, 38 /* 20k2 models */ 39 CTSB0760, 40 CT20K2_MODEL_FIRST = CTSB0760, 41 CTHENDRIX, 42 CTSB0880, 43 CTSB1270, 44 CT20K2_UNKNOWN, 45 NUM_CTCARDS /* This should always be the last */ 46 }; 47 48 /* Type of input source for ADC */ 49 enum ADCSRC{ 50 ADC_MICIN, 51 ADC_LINEIN, 52 ADC_VIDEO, 53 ADC_AUX, 54 ADC_NONE /* Switch to digital input */ 55 }; 56 57 struct card_conf { 58 /* device virtual mem page table page physical addr 59 * (supporting one page table page now) */ 60 unsigned long vm_pgt_phys; 61 unsigned int rsr; /* reference sample rate in Hzs*/ 62 unsigned int msr; /* master sample rate in rsrs */ 63 }; 64 65 struct capabilities { 66 unsigned int digit_io_switch:1; 67 unsigned int dedicated_mic:1; 68 unsigned int output_switch:1; 69 unsigned int mic_source_switch:1; 70 }; 71 72 struct hw { 73 int (*card_init)(struct hw *hw, struct card_conf *info); 74 int (*card_stop)(struct hw *hw); 75 int (*pll_init)(struct hw *hw, unsigned int rsr); 76 #ifdef CONFIG_PM_SLEEP 77 int (*suspend)(struct hw *hw); 78 int (*resume)(struct hw *hw, struct card_conf *info); 79 #endif 80 int (*is_adc_source_selected)(struct hw *hw, enum ADCSRC source); 81 int (*select_adc_source)(struct hw *hw, enum ADCSRC source); 82 struct capabilities (*capabilities)(struct hw *hw); 83 int (*output_switch_get)(struct hw *hw); 84 int (*output_switch_put)(struct hw *hw, int position); 85 int (*mic_source_switch_get)(struct hw *hw); 86 int (*mic_source_switch_put)(struct hw *hw, int position); 87 88 /* SRC operations */ 89 int (*src_rsc_get_ctrl_blk)(void **rblk); 90 int (*src_rsc_put_ctrl_blk)(void *blk); 91 int (*src_set_state)(void *blk, unsigned int state); 92 int (*src_set_bm)(void *blk, unsigned int bm); 93 int (*src_set_rsr)(void *blk, unsigned int rsr); 94 int (*src_set_sf)(void *blk, unsigned int sf); 95 int (*src_set_wr)(void *blk, unsigned int wr); 96 int (*src_set_pm)(void *blk, unsigned int pm); 97 int (*src_set_rom)(void *blk, unsigned int rom); 98 int (*src_set_vo)(void *blk, unsigned int vo); 99 int (*src_set_st)(void *blk, unsigned int st); 100 int (*src_set_ie)(void *blk, unsigned int ie); 101 int (*src_set_ilsz)(void *blk, unsigned int ilsz); 102 int (*src_set_bp)(void *blk, unsigned int bp); 103 int (*src_set_cisz)(void *blk, unsigned int cisz); 104 int (*src_set_ca)(void *blk, unsigned int ca); 105 int (*src_set_sa)(void *blk, unsigned int sa); 106 int (*src_set_la)(void *blk, unsigned int la); 107 int (*src_set_pitch)(void *blk, unsigned int pitch); 108 int (*src_set_clear_zbufs)(void *blk, unsigned int clear); 109 int (*src_set_dirty)(void *blk, unsigned int flags); 110 int (*src_set_dirty_all)(void *blk); 111 int (*src_commit_write)(struct hw *hw, unsigned int idx, void *blk); 112 int (*src_get_ca)(struct hw *hw, unsigned int idx, void *blk); 113 unsigned int (*src_get_dirty)(void *blk); 114 unsigned int (*src_dirty_conj_mask)(void); 115 int (*src_mgr_get_ctrl_blk)(void **rblk); 116 int (*src_mgr_put_ctrl_blk)(void *blk); 117 /* syncly enable src @idx */ 118 int (*src_mgr_enbs_src)(void *blk, unsigned int idx); 119 /* enable src @idx */ 120 int (*src_mgr_enb_src)(void *blk, unsigned int idx); 121 /* disable src @idx */ 122 int (*src_mgr_dsb_src)(void *blk, unsigned int idx); 123 int (*src_mgr_commit_write)(struct hw *hw, void *blk); 124 125 /* SRC Input Mapper operations */ 126 int (*srcimp_mgr_get_ctrl_blk)(void **rblk); 127 int (*srcimp_mgr_put_ctrl_blk)(void *blk); 128 int (*srcimp_mgr_set_imaparc)(void *blk, unsigned int slot); 129 int (*srcimp_mgr_set_imapuser)(void *blk, unsigned int user); 130 int (*srcimp_mgr_set_imapnxt)(void *blk, unsigned int next); 131 int (*srcimp_mgr_set_imapaddr)(void *blk, unsigned int addr); 132 int (*srcimp_mgr_commit_write)(struct hw *hw, void *blk); 133 134 /* AMIXER operations */ 135 int (*amixer_rsc_get_ctrl_blk)(void **rblk); 136 int (*amixer_rsc_put_ctrl_blk)(void *blk); 137 int (*amixer_mgr_get_ctrl_blk)(void **rblk); 138 int (*amixer_mgr_put_ctrl_blk)(void *blk); 139 int (*amixer_set_mode)(void *blk, unsigned int mode); 140 int (*amixer_set_iv)(void *blk, unsigned int iv); 141 int (*amixer_set_x)(void *blk, unsigned int x); 142 int (*amixer_set_y)(void *blk, unsigned int y); 143 int (*amixer_set_sadr)(void *blk, unsigned int sadr); 144 int (*amixer_set_se)(void *blk, unsigned int se); 145 int (*amixer_set_dirty)(void *blk, unsigned int flags); 146 int (*amixer_set_dirty_all)(void *blk); 147 int (*amixer_commit_write)(struct hw *hw, unsigned int idx, void *blk); 148 int (*amixer_get_y)(void *blk); 149 unsigned int (*amixer_get_dirty)(void *blk); 150 151 /* DAIO operations */ 152 int (*dai_get_ctrl_blk)(void **rblk); 153 int (*dai_put_ctrl_blk)(void *blk); 154 int (*dai_srt_set_srco)(void *blk, unsigned int src); 155 int (*dai_srt_set_srcm)(void *blk, unsigned int src); 156 int (*dai_srt_set_rsr)(void *blk, unsigned int rsr); 157 int (*dai_srt_set_drat)(void *blk, unsigned int drat); 158 int (*dai_srt_set_ec)(void *blk, unsigned int ec); 159 int (*dai_srt_set_et)(void *blk, unsigned int et); 160 int (*dai_commit_write)(struct hw *hw, unsigned int idx, void *blk); 161 int (*dao_get_ctrl_blk)(void **rblk); 162 int (*dao_put_ctrl_blk)(void *blk); 163 int (*dao_set_spos)(void *blk, unsigned int spos); 164 int (*dao_commit_write)(struct hw *hw, unsigned int idx, void *blk); 165 int (*dao_get_spos)(void *blk, unsigned int *spos); 166 167 int (*daio_mgr_get_ctrl_blk)(struct hw *hw, void **rblk); 168 int (*daio_mgr_put_ctrl_blk)(void *blk); 169 int (*daio_mgr_enb_dai)(void *blk, unsigned int idx); 170 int (*daio_mgr_dsb_dai)(void *blk, unsigned int idx); 171 int (*daio_mgr_enb_dao)(void *blk, unsigned int idx); 172 int (*daio_mgr_dsb_dao)(void *blk, unsigned int idx); 173 int (*daio_mgr_dao_init)(void *blk, unsigned int idx, 174 unsigned int conf); 175 int (*daio_mgr_set_imaparc)(void *blk, unsigned int slot); 176 int (*daio_mgr_set_imapnxt)(void *blk, unsigned int next); 177 int (*daio_mgr_set_imapaddr)(void *blk, unsigned int addr); 178 int (*daio_mgr_commit_write)(struct hw *hw, void *blk); 179 180 int (*set_timer_irq)(struct hw *hw, int enable); 181 int (*set_timer_tick)(struct hw *hw, unsigned int tick); 182 unsigned int (*get_wc)(struct hw *hw); 183 184 void (*irq_callback)(void *data, unsigned int bit); 185 void *irq_callback_data; 186 187 struct pci_dev *pci; /* the pci kernel structure of this card */ 188 struct snd_card *card; /* pointer to this card */ 189 int irq; 190 unsigned long io_base; 191 void __iomem *mem_base; 192 193 enum CHIPTYP chip_type; 194 enum CTCARDS model; 195 }; 196 197 int create_hw_obj(struct pci_dev *pci, enum CHIPTYP chip_type, 198 enum CTCARDS model, struct hw **rhw); 199 int destroy_hw_obj(struct hw *hw); 200 201 unsigned int get_field(unsigned int data, unsigned int field); 202 void set_field(unsigned int *data, unsigned int field, unsigned int value); 203 204 /* IRQ bits */ 205 #define PLL_INT (1 << 10) /* PLL input-clock out-of-range */ 206 #define FI_INT (1 << 9) /* forced interrupt */ 207 #define IT_INT (1 << 8) /* timer interrupt */ 208 #define PCI_INT (1 << 7) /* PCI bus error pending */ 209 #define URT_INT (1 << 6) /* UART Tx/Rx */ 210 #define GPI_INT (1 << 5) /* GPI pin */ 211 #define MIX_INT (1 << 4) /* mixer parameter segment FIFO channels */ 212 #define DAI_INT (1 << 3) /* DAI (SR-tracker or SPDIF-receiver) */ 213 #define TP_INT (1 << 2) /* transport priority queue */ 214 #define DSP_INT (1 << 1) /* DSP */ 215 #define SRC_INT (1 << 0) /* SRC channels */ 216 217 #endif /* CTHARDWARE_H */ 218